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-rw-r--r--board/freescale/mpc8313erdb/Kconfig25
-rw-r--r--board/freescale/mpc8313erdb/MAINTAINERS9
-rw-r--r--board/freescale/mpc8313erdb/Makefile6
-rw-r--r--board/freescale/mpc8313erdb/README111
-rw-r--r--board/freescale/mpc8313erdb/mpc8313erdb.c160
-rw-r--r--board/freescale/mpc8313erdb/sdram.c129
6 files changed, 0 insertions, 440 deletions
diff --git a/board/freescale/mpc8313erdb/Kconfig b/board/freescale/mpc8313erdb/Kconfig
deleted file mode 100644
index b6332a1..0000000
--- a/board/freescale/mpc8313erdb/Kconfig
+++ /dev/null
@@ -1,25 +0,0 @@
-if TARGET_MPC8313ERDB_NOR
-
-config SYS_BOARD
- default "mpc8313erdb"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_CONFIG_NAME
- default "MPC8313ERDB_NOR"
-
-endif
-
-if TARGET_MPC8313ERDB_NAND
-
-config SYS_BOARD
- default "mpc8313erdb"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_CONFIG_NAME
- default "MPC8313ERDB_NAND"
-
-endif
diff --git a/board/freescale/mpc8313erdb/MAINTAINERS b/board/freescale/mpc8313erdb/MAINTAINERS
deleted file mode 100644
index 807fb0b..0000000
--- a/board/freescale/mpc8313erdb/MAINTAINERS
+++ /dev/null
@@ -1,9 +0,0 @@
-MPC8313ERDB BOARD
-#M: -
-S: Maintained
-F: board/freescale/mpc8313erdb/
-F: include/configs/MPC8313ERDB.h
-F: configs/MPC8313ERDB_33_defconfig
-F: configs/MPC8313ERDB_66_defconfig
-F: configs/MPC8313ERDB_NAND_33_defconfig
-F: configs/MPC8313ERDB_NAND_66_defconfig
diff --git a/board/freescale/mpc8313erdb/Makefile b/board/freescale/mpc8313erdb/Makefile
deleted file mode 100644
index af600cc..0000000
--- a/board/freescale/mpc8313erdb/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-y := mpc8313erdb.o sdram.o
diff --git a/board/freescale/mpc8313erdb/README b/board/freescale/mpc8313erdb/README
deleted file mode 100644
index 697cee4..0000000
--- a/board/freescale/mpc8313erdb/README
+++ /dev/null
@@ -1,111 +0,0 @@
-Freescale MPC8313ERDB Board
------------------------------------------
-
-1. Board Switches and Jumpers
-
- S3 is used to set CONFIG_SYS_RESET_SOURCE.
-
- To boot the image at 0xFE000000 in NOR flash, use these DIP
- switch settings for S3 S4:
-
- +------+ +------+
- | | | **** |
- | **** | | |
- +------+ ON +------+ ON
- 4321 4321
- (where the '*' indicates the position of the tab of the switch.)
-
- To boot the image at the beginning of NAND flash, use these
- DIP switch settings for S3 S4:
-
- +------+ +------+
- | * | | *** |
- | *** | | * |
- +------+ ON +------+ ON
- 4321 4321
- (where the '*' indicates the position of the tab of the switch.)
-
- When booting from NAND, use u-boot-nand.bin, not u-boot.bin.
-
-2. Memory Map
- The memory map looks like this:
-
- 0x0000_0000 0x07ff_ffff DDR 128M
- 0x8000_0000 0x8fff_ffff PCI MEM 256M
- 0x9000_0000 0x9fff_ffff PCI_MMIO 256M
- 0xe000_0000 0xe00f_ffff IMMR 1M
- 0xe200_0000 0xe20f_ffff PCI IO 16M
- 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
- 0xf000_0000 0xf001_ffff VSC7385 (CS2) 128K
- 0xfa00_0000 0xfa00_7fff Board Status/ 32K
- LED Control (CS3)
- 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
-
- When booting from NAND, NAND flash is CS0 and NOR flash
- is CS1.
-
-3. Definitions
-
-3.1 Explanation of NEW definitions in:
-
- include/configs/MPC8313ERDB.h
-
- CONFIG_MPC83xx MPC83xx family
- CONFIG_MPC831x MPC831x specific
- CONFIG_MPC8313ERDB MPC8313ERDB board specific
-
-4. Compilation
-
- Assuming you're using BASH (or similar) as your shell:
-
- export CROSS_COMPILE=your-cross-compiler-prefix-
- make distclean
- make MPC8313ERDB_XXX_config
- (where XXX is:
- 33 - 33 MHz oscillator, boot from NOR flash
- 66 - 66 MHz oscillator, boot from NOR flash
- NAND_33 - 33 MHz oscillator, boot from NAND flash
- NAND_66 - 66 MHz oscillator, boot from NAND flash)
- make
-
-5. Downloading and Flashing Images
-
-5.1 Reflash U-Boot Image using U-Boot
-
- NOR flash:
-
- =>run tftpflash
-
- You may want to try
- =>tftpboot $loadaddr $uboot
- first, to make sure that the TFTP load will succeed before it
- goes ahead and wipes out your current firmware. And of course,
- have an alternate means of programming the flash available
- if the new U-Boot doesn't boot.
-
- NAND flash:
-
- =>tftpboot $loadaddr <filename>
- =>nand erase 0 0x80000
- =>nand write $loadaddr 0 0x80000
-
- ...where 0x80000 is the filesize rounded up to
- the next 0x20000 increment.
-
-5.2 Downloading and Booting Linux Kernel
-
- Ensure that all networking-related environment variables are set
- properly (including ipaddr, serverip, gatewayip (if needed),
- netmask, ethaddr, eth1addr, rootpath (if using NFS root),
- fdtfile, and bootfile).
-
- Then, do one of the following, depending on whether you
- want an NFS root or a ramdisk root:
-
- =>run nfsboot
- or
- =>run ramboot
-
-6 Notes
-
- The console baudrate for MPC8313ERDB is 115200bps.
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c
deleted file mode 100644
index 3bf5cff..0000000
--- a/board/freescale/mpc8313erdb/mpc8313erdb.c
+++ /dev/null
@@ -1,160 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
- *
- * Author: Scott Wood <scottwood@freescale.com>
- */
-
-#include <common.h>
-#include <clock_legacy.h>
-#include <fdt_support.h>
-#include <init.h>
-#if defined(CONFIG_OF_LIBFDT)
-#include <linux/libfdt.h>
-#endif
-#include <pci.h>
-#include <mpc83xx.h>
-#include <vsc7385.h>
-#include <ns16550.h>
-#include <nand.h>
-#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
-#include <asm/gpio.h>
-#endif
-#include <asm/global_data.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
-#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
- volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
-
- if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
- gd->flags |= GD_FLG_SILENT;
-#endif
-#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
- mpc83xx_gpio_init_f();
-#endif
-
- return 0;
-}
-
-int board_early_init_r(void)
-{
-#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
- mpc83xx_gpio_init_r();
-#endif
-
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: Freescale MPC8313ERDB\n");
- return 0;
-}
-
-#ifndef CONFIG_SPL_BUILD
-static struct pci_region pci_regions[] = {
- {
- .bus_start = CONFIG_SYS_PCI1_MEM_BASE,
- .phys_start = CONFIG_SYS_PCI1_MEM_PHYS,
- .size = CONFIG_SYS_PCI1_MEM_SIZE,
- .flags = PCI_REGION_MEM | PCI_REGION_PREFETCH
- },
- {
- .bus_start = CONFIG_SYS_PCI1_MMIO_BASE,
- .phys_start = CONFIG_SYS_PCI1_MMIO_PHYS,
- .size = CONFIG_SYS_PCI1_MMIO_SIZE,
- .flags = PCI_REGION_MEM
- },
- {
- .bus_start = CONFIG_SYS_PCI1_IO_BASE,
- .phys_start = CONFIG_SYS_PCI1_IO_PHYS,
- .size = CONFIG_SYS_PCI1_IO_SIZE,
- .flags = PCI_REGION_IO
- }
-};
-
-void pci_init_board(void)
-{
- volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
- volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
- volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
- struct pci_region *reg[] = { pci_regions };
-
- /* Enable all 3 PCI_CLK_OUTPUTs. */
- clk->occr |= 0xe0000000;
-
- /*
- * Configure PCI Local Access Windows
- */
- pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
-
- pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
-
- mpc83xx_pci_init(1, reg);
-}
-
-/*
- * Miscellaneous late-boot configurations
- *
- * If a VSC7385 microcode image is present, then upload it.
-*/
-int misc_init_r(void)
-{
- int rc = 0;
-
-#ifdef CONFIG_VSC7385_IMAGE
- if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE,
- CONFIG_VSC7385_IMAGE_SIZE)) {
- puts("Failure uploading VSC7385 microcode.\n");
- rc = 1;
- }
-#endif
-
- return rc;
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-int ft_board_setup(void *blob, struct bd_info *bd)
-{
- ft_cpu_setup(blob, bd);
-#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
-#endif
-
- return 0;
-}
-#endif
-#else /* CONFIG_SPL_BUILD */
-void board_init_f(ulong bootflag)
-{
- board_early_init_f();
- ns16550_init((struct ns16550 *)(CONFIG_SYS_IMMR + 0x4500),
- CONFIG_SYS_NS16550_CLK / 16 / CONFIG_BAUDRATE);
- puts("NAND boot... ");
- timer_init();
- dram_init();
- relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, (gd_t *)gd,
- CONFIG_SYS_NAND_U_BOOT_RELOC);
-}
-
-void board_init_r(gd_t *gd, ulong dest_addr)
-{
- nand_boot();
-}
-
-void putc(char c)
-{
- if (gd->flags & GD_FLG_SILENT)
- return;
-
- if (c == '\n')
- ns16550_putc((struct ns16550 *)(CONFIG_SYS_IMMR + 0x4500), '\r');
-
- ns16550_putc((struct ns16550 *)(CONFIG_SYS_IMMR + 0x4500), c);
-}
-#endif
diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
deleted file mode 100644
index f146ae5..0000000
--- a/board/freescale/mpc8313erdb/sdram.c
+++ /dev/null
@@ -1,129 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
- *
- * Authors: Nick.Spence@freescale.com
- * Wilson.Lo@freescale.com
- * scottwood@freescale.com
- */
-
-#include <common.h>
-#include <init.h>
-#include <mpc83xx.h>
-#include <spd_sdram.h>
-#include <asm/global_data.h>
-#include <linux/delay.h>
-
-#include <asm/bitops.h>
-#include <asm/io.h>
-
-#include <asm/processor.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
-static void resume_from_sleep(void)
-{
- u32 magic = *(u32 *)0;
-
- typedef void (*func_t)(void);
- func_t resume = *(func_t *)4;
-
- if (magic == 0xf5153ae5)
- resume();
-
- gd->flags &= ~GD_FLG_SILENT;
- puts("\nResume from sleep failed: bad magic word\n");
-}
-#endif
-
-/* Fixed sdram init -- doesn't use serial presence detect.
- *
- * This is useful for faster booting in configs where the RAM is unlikely
- * to be changed, or for things like NAND booting where space is tight.
- */
-static long fixed_sdram(void)
-{
- u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
-
-#ifndef CONFIG_SYS_RAMBOOT
- volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
- u32 msize_log2 = __ilog2(msize);
-
- im->sysconf.ddrlaw[0].bar = CONFIG_SYS_SDRAM_BASE & 0xfffff000;
- im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
- im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
-
- /*
- * Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg],
- * or the DDR2 controller may fail to initialize correctly.
- */
- __udelay(50000);
-
-#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0)
-#warning Chip select bounds is only configurable in 16MB increments
-#endif
- im->ddr.csbnds[0].csbnds =
- ((CONFIG_SYS_SDRAM_BASE >> CSBNDS_SA_SHIFT) & CSBNDS_SA) |
- (((CONFIG_SYS_SDRAM_BASE + msize - 1) >> CSBNDS_EA_SHIFT) &
- CSBNDS_EA);
- im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
-
- /* Currently we use only one CS, so disable the other bank. */
- im->ddr.cs_config[1] = 0;
-
- im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
- im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
- im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
- im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
-
-#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
- if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
- im->ddr.sdram_cfg = CONFIG_SYS_SDRAM_CFG | SDRAM_CFG_BI;
- else
-#endif
- im->ddr.sdram_cfg = CONFIG_SYS_SDRAM_CFG;
-
- im->ddr.sdram_cfg2 = CONFIG_SYS_SDRAM_CFG2;
- im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
- im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE_2;
-
- im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
- sync();
-
- /* enable DDR controller */
- im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-#endif
-
- return msize;
-}
-
-int dram_init(void)
-{
- volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
- volatile fsl_lbc_t *lbc = &im->im_lbc;
- u32 msize;
-
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
- return -ENXIO;
-
- /* DDR SDRAM - Main SODIMM */
- msize = fixed_sdram();
-
- /* Local Bus setup lbcr and mrtpr */
- lbc->lbcr = (0x00040000 | (0xFF << LBCR_BMT_SHIFT) | 0xF);
- /* LB refresh timer prescal, 266MHz/32 */
- lbc->mrtpr = 0x20000000;
- sync();
-
-#ifndef CONFIG_SYS_8313ERDB_BROKEN_PMC
- if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
- resume_from_sleep();
-#endif
-
- /* return total bus SDRAM size(bytes) -- DDR */
- gd->ram_size = msize;
-
- return 0;
-}
generated by cgit v1.1 at 2024-07-19 14:16:03 +0000