diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Kconfig | 23 | ||||
| -rw-r--r-- | arch/arc/include/asm/cache.h | 3 | ||||
| -rw-r--r-- | arch/arm/Kconfig | 15 | ||||
| -rw-r--r-- | arch/mips/include/asm/cache.h | 12 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/cache.h | 7 | ||||
| -rw-r--r-- | arch/riscv/Kconfig | 2 | ||||
| -rw-r--r-- | arch/sandbox/include/asm/cache.h | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/cache.h | 7 |
8 files changed, 26 insertions, 44 deletions
diff --git a/arch/Kconfig b/arch/Kconfig index b6f9e17..d43d348 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -7,6 +7,25 @@ config HAVE_ARCH_IOREMAP config NEEDS_MANUAL_RELOC bool +config SYS_CACHE_SHIFT_4 + bool + +config SYS_CACHE_SHIFT_5 + bool + +config SYS_CACHE_SHIFT_6 + bool + +config SYS_CACHE_SHIFT_7 + bool + +config SYS_CACHELINE_SIZE + int + default 128 if SYS_CACHE_SHIFT_7 + default 64 if SYS_CACHE_SHIFT_6 + default 32 if SYS_CACHE_SHIFT_5 + default 16 if SYS_CACHE_SHIFT_4 + config LINKER_LIST_ALIGN int default 32 if SANDBOX @@ -29,6 +48,7 @@ config ARC select DM select HAVE_PRIVATE_LIBGCC select SUPPORT_OF_CONTROL + select SYS_CACHE_SHIFT_7 select TIMER config ARM @@ -44,6 +64,7 @@ config M68K select NEEDS_MANUAL_RELOC select SYS_BOOT_GET_CMDLINE select SYS_BOOT_GET_KBD + select SYS_CACHE_SHIFT_4 select SUPPORT_OF_CONTROL config MICROBLAZE @@ -122,6 +143,7 @@ config SANDBOX select SPI select SUPPORT_OF_CONTROL select SYSRESET_CMD_POWEROFF + select SYS_CACHE_SHIFT_4 select IRQ select SUPPORT_EXTENSION_SCAN imply BITREVERSE @@ -188,6 +210,7 @@ config X86 select OF_CONTROL select PCI select SUPPORT_OF_CONTROL + select SYS_CACHE_SHIFT_6 select TIMER select USE_PRIVATE_LIBGCC select X86_TSC_TIMER diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h index ab61846..a48e1ae 100644 --- a/arch/arc/include/asm/cache.h +++ b/arch/arc/include/asm/cache.h @@ -16,9 +16,6 @@ */ #define ARCH_DMA_MINALIGN 128 -/* CONFIG_SYS_CACHELINE_SIZE is used a lot in drivers */ -#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN - #if defined(ARC_MMU_ABSENT) #define CONFIG_ARC_MMU_VER 0 #elif defined(CONFIG_ARC_MMU_V2) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d692139..e478b90 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -332,21 +332,6 @@ config SYS_ARM_ARCH default 4 if CPU_SA1100 default 8 if ARM64 -config SYS_CACHE_SHIFT_5 - bool - -config SYS_CACHE_SHIFT_6 - bool - -config SYS_CACHE_SHIFT_7 - bool - -config SYS_CACHELINE_SIZE - int - default 128 if SYS_CACHE_SHIFT_7 - default 64 if SYS_CACHE_SHIFT_6 - default 32 if SYS_CACHE_SHIFT_5 - choice prompt "Select the ARM data write cache policy" default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \ diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h index 00696e6..e048533 100644 --- a/arch/mips/include/asm/cache.h +++ b/arch/mips/include/asm/cache.h @@ -6,18 +6,6 @@ #ifndef __MIPS_CACHE_H__ #define __MIPS_CACHE_H__ -#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#define ARCH_DMA_MINALIGN (L1_CACHE_BYTES) - -/* - * CONFIG_SYS_CACHELINE_SIZE is still used in various drivers primarily for - * DMA buffer alignment. Satisfy those drivers by providing it as a synonym - * of ARCH_DMA_MINALIGN for now. - */ -#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN - #ifndef __ASSEMBLY__ /** * mips_cache_probe() - Probe the properties of the caches diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h index ac8eeb4..f753ddf 100644 --- a/arch/powerpc/include/asm/cache.h +++ b/arch/powerpc/include/asm/cache.h @@ -25,13 +25,6 @@ */ #define ARCH_DMA_MINALIGN L1_CACHE_BYTES -/* - * For compatibility reasons support the CONFIG_SYS_CACHELINE_SIZE too - */ -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES -#endif - #define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)) #define L1_CACHE_PAGES 8 diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 4b0c3df..691ed11 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -22,9 +22,11 @@ config TARGET_SIFIVE_UNLEASHED config TARGET_SIFIVE_UNMATCHED bool "Support SiFive Unmatched Board" + select SYS_CACHE_SHIFT_6 config TARGET_SIPEED_MAIX bool "Support Sipeed Maix Board" + select SYS_CACHE_SHIFT_6 config TARGET_OPENPITON_RISCV64 bool "Support RISC-V cores on OpenPiton SoC" diff --git a/arch/sandbox/include/asm/cache.h b/arch/sandbox/include/asm/cache.h index 9348a13..609a835 100644 --- a/arch/sandbox/include/asm/cache.h +++ b/arch/sandbox/include/asm/cache.h @@ -19,6 +19,5 @@ #else #define ARCH_DMA_MINALIGN 16 #endif -#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN #endif /* __SANDBOX_CACHE_H__ */ diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 145b878..256a3c0 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -7,13 +7,8 @@ #define __X86_CACHE_H__ /* - * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise - * use 64-bytes, a safe default for x86. + * Use CONFIG_SYS_CACHELINE_SIZE (which is set to 64-bytes) for DMA alignment. */ -#ifndef CONFIG_SYS_CACHELINE_SIZE -#define CONFIG_SYS_CACHELINE_SIZE 64 -#endif - #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE static inline void wbinvd(void) |