diff options
Diffstat (limited to 'arch/x86')
48 files changed, 144 insertions, 144 deletions
diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c index 319c78b..fb75e1f 100644 --- a/arch/x86/cpu/apollolake/fsp_bindings.c +++ b/arch/x86/cpu/apollolake/fsp_bindings.c @@ -44,7 +44,7 @@ static void read_u8_prop(ofnode node, char *name, size_t count, u8 *dst) * Set to 0 if the property is expected to be a scalar * @dst: Pointer to destination of where to save the value(s) read * from devicetree - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error */ static int read_u16_prop(ofnode node, char *name, size_t count, u16 *dst) { @@ -196,7 +196,7 @@ static void read_swizzle_prop(ofnode node, char *name, size_t count, u8 *dst) * @fsp_bindings: Binding describing which devicetree properties should * be stored where in the FSP configuration structure * The end of the list is declared by a NULL pointer in propname - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error * * This function reads the configuration for FSP from the provided * devicetree node and saves it in the FSP configuration structure. diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c index f012db9..37fcddb 100644 --- a/arch/x86/cpu/broadwell/pch.c +++ b/arch/x86/cpu/broadwell/pch.c @@ -522,7 +522,7 @@ static void serialio_init_once(bool acpi_mode) /** * pch_serialio_init() - set up serial I/O devices * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ static int pch_serialio_init(void) { diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c index 6c04dde..aced3e5 100644 --- a/arch/x86/cpu/broadwell/refcode.c +++ b/arch/x86/cpu/broadwell/refcode.c @@ -65,7 +65,7 @@ struct rmodule_header { * platform controller hub (PCH). This function should be implemented by the * CPU-specific code. * - * @return 0 on success, -ve on failure + * Return: 0 on success, -ve on failure */ static int cpu_run_reference_code(void) { diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c index f31fddb..af68c0f 100644 --- a/arch/x86/cpu/intel_common/lpc.c +++ b/arch/x86/cpu/intel_common/lpc.c @@ -39,7 +39,7 @@ static void enable_port80_on_lpc(struct udevice *pch) * lpc_early_init() - set up LPC serial ports and other early things * * @dev: LPC device - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int lpc_common_early_init(struct udevice *dev) { diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index 5a7b30d..e4e53f7 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -46,7 +46,7 @@ * This is needed by FSP-M which uses the High Precision Event Timer. * * @dev: P2SB device - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ static int p2sb_early_init(struct udevice *dev) { diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 0540b02..89312a8 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -39,7 +39,7 @@ static int pch_type = -1; * pch_silicon_revision() - Read silicon revision ID from the PCH * * @dev: PCH device - * @return silicon revision ID + * Return: silicon revision ID */ static int pch_silicon_revision(struct udevice *dev) { @@ -71,7 +71,7 @@ int pch_silicon_type(struct udevice *dev) * @dev: PCH device * @type: PCH type * @rev: Minimum required resion - * @return 0 if not supported, 1 if supported + * Return: 0 if not supported, 1 if supported */ static int pch_silicon_supported(struct udevice *dev, int type, int rev) { diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c index c09762a..7637c9b 100644 --- a/arch/x86/cpu/mp_init.c +++ b/arch/x86/cpu/mp_init.c @@ -423,7 +423,7 @@ static int apic_wait_timeout(int total_delay, const char *msg) * * @num_aps: Number of APs we expect to find * @ap_count: Initially zero. Incremented by this function for each AP found - * @return 0 if all APs were set up correctly or there are none to set up, + * Return: 0 if all APs were set up correctly or there are none to set up, * -ENOSPC if the SIPI vector is too high in memory, * -ETIMEDOUT if the ICR is busy or the second SIPI fails to complete * -EIO if not all APs check in correctly @@ -536,7 +536,7 @@ static int bsp_do_flight_plan(struct udevice *cpu, struct mp_flight_plan *plan, * * @devp: If non-NULL, returns CPU device corresponding to the BSP * @cpu_countp: If non-NULL, returns the total number of CPUs - * @return CPU number of the BSP, or -ve on error. If multiprocessing is not + * Return: CPU number of the BSP, or -ve on error. If multiprocessing is not * enabled, returns 0 */ static int get_bsp(struct udevice **devp, int *cpu_countp) @@ -573,7 +573,7 @@ static int get_bsp(struct udevice **devp, int *cpu_countp) * pointer to new instructions * * @slot: Pointer to the AP's callback slot - * @return value of that pointer + * Return: value of that pointer */ static struct mp_callback *read_callback(struct mp_callback **slot) { @@ -610,7 +610,7 @@ static void store_callback(struct mp_callback **slot, struct mp_callback *val) * @num_cpus: The number of CPUs in the system (= number of APs + 1) * @expire_ms: Timeout to wait for all APs to finish, in milliseconds, or 0 for * no timeout - * @return 0 if OK, -ETIMEDOUT if one or more APs failed to respond in time + * Return: 0 if OK, -ETIMEDOUT if one or more APs failed to respond in time */ static int run_ap_work(struct mp_callback *callback, struct udevice *bsp, int num_cpus, uint expire_ms) @@ -670,7 +670,7 @@ static int run_ap_work(struct mp_callback *callback, struct udevice *bsp, * * @cpu: CPU that is waiting * @unused: Optional argument provided by struct mp_flight_record, not used here - * @return Does not return + * Return: Does not return */ static int ap_wait_for_instruction(struct udevice *cpu, void *unused) { diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 260a008..e69dfb5 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -109,7 +109,7 @@ static void read_mtrrs(void *arg) /** * mtrr_copy_to_aps() - Copy the MTRRs from the boot CPU to other CPUs * - * @return 0 on success, -ve on failure + * Return: 0 on success, -ve on failure */ static int mtrr_copy_to_aps(void) { diff --git a/arch/x86/cpu/slimbootloader/sdram.c b/arch/x86/cpu/slimbootloader/sdram.c index 36d0d4d..c6f10e2 100644 --- a/arch/x86/cpu/slimbootloader/sdram.c +++ b/arch/x86/cpu/slimbootloader/sdram.c @@ -46,7 +46,7 @@ static struct sbl_memory_map_info *get_memory_map_info(void) * The memory map entries from Slim Bootloader hob are already sorted. * * @total_size: The memory size that u-boot occupies - * @return : The top available memory address lower than 4GB + * Return: : The top available memory address lower than 4GB */ ulong board_get_usable_ram_top(ulong total_size) { diff --git a/arch/x86/include/asm/acpi_table.h b/arch/x86/include/asm/acpi_table.h index d5c8805..55b1a3d 100644 --- a/arch/x86/include/asm/acpi_table.h +++ b/arch/x86/include/asm/acpi_table.h @@ -46,7 +46,7 @@ u32 acpi_fill_csrt(u32 current); * Write out the table for High-Precision Event Timers * * @ctx: Current ACPI context - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int acpi_write_hpet(struct acpi_ctx *ctx); @@ -56,7 +56,7 @@ int acpi_write_hpet(struct acpi_ctx *ctx); * @ctx: Current ACPI context * @dev: Debug UART device to describe * @access_size: Access size for UART (e.g. ACPI_ACCESS_SIZE_DWORD_ACCESS) - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, uint access_size); @@ -65,7 +65,7 @@ int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev, * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table * * @gnvs: Table to fill in - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int acpi_create_gnvs(struct acpi_global_nvs *gnvs); @@ -98,7 +98,7 @@ int arch_write_sci_irq_select(uint scis); * arch_madt_sci_irq_polarity() - Return the priority to use for the MADT * * @sci: System-control interrupt number - * @return priority to use (MP_IRQ_POLARITY_...) + * Return: priority to use (MP_IRQ_POLARITY_...) */ int arch_madt_sci_irq_polarity(int sci); @@ -155,7 +155,7 @@ void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base); * * @ctx: ACPI context pointer * @bdf: PCI device to add - * @return length of mapping in bytes + * Return: length of mapping in bytes */ int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf); @@ -166,7 +166,7 @@ int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf); * * @ctx: ACPI context pointer * @bdf: PCI device to add - * @return length of mapping in bytes + * Return: length of mapping in bytes */ int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf); @@ -176,7 +176,7 @@ int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf); * @ctx: ACPI context pointer * @enumeration_id: Enumeration ID (typically 2) * @bdf: PCI device to add - * @return length of mapping in bytes + * Return: length of mapping in bytes */ int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id, pci_dev_t bdf); @@ -190,7 +190,7 @@ int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id, * @ctx: ACPI context pointer * @enumeration_id: Enumeration ID (typically 0) * @bdf: PCI device to add - * @return length of mapping in bytes + * Return: length of mapping in bytes */ int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id, pci_dev_t bdf); diff --git a/arch/x86/include/asm/arch-apollolake/fsp_bindings.h b/arch/x86/include/asm/arch-apollolake/fsp_bindings.h index a80e66b..ae1f1b7 100644 --- a/arch/x86/include/asm/arch-apollolake/fsp_bindings.h +++ b/arch/x86/include/asm/arch-apollolake/fsp_bindings.h @@ -86,7 +86,7 @@ struct lpddr4_swizzle_cfg { * fsp_m_update_config_from_dtb() - Read FSP-M config from devicetree node * @node: Valid node reference to read property from * @cfg: Pointer to FSP-M config structure - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error * * This function reads the configuration for FSP-M from the provided * devicetree node and saves it in the FSP-M configuration structure. @@ -99,7 +99,7 @@ int fsp_m_update_config_from_dtb(ofnode node, struct fsp_m_config *cfg); * fsp_s_update_config_from_dtb() - Read FSP-S config from devicetree node * @node: Valid node reference to read property from * @cfg: Pointer to FSP-S config structure - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error * * This function reads the configuration for FSP-S from the provided * devicetree node and saves it in the FSP-S configuration structure. diff --git a/arch/x86/include/asm/arch-apollolake/lpc.h b/arch/x86/include/asm/arch-apollolake/lpc.h index 977b7ec..51d478f 100644 --- a/arch/x86/include/asm/arch-apollolake/lpc.h +++ b/arch/x86/include/asm/arch-apollolake/lpc.h @@ -67,7 +67,7 @@ void lpc_enable_fixed_io_ranges(uint io_enables); * * @base: Base I/O address (e.g. 0x800) * @size: Size of window (e.g. 0x100) - * @return 0 if OK, -ENOSPC if there are no more windows available, -EALREADY + * Return: 0 if OK, -ENOSPC if there are no more windows available, -EALREADY * if already set up */ int lpc_open_pmio_window(uint base, uint size); diff --git a/arch/x86/include/asm/arch-apollolake/systemagent.h b/arch/x86/include/asm/arch-apollolake/systemagent.h index 48e76c2..25dbc9c 100644 --- a/arch/x86/include/asm/arch-apollolake/systemagent.h +++ b/arch/x86/include/asm/arch-apollolake/systemagent.h @@ -45,7 +45,7 @@ void enable_bios_reset_cpl(void); * below 4GB * * @dev: hostbridge device - * @return TOLUD address + * Return: TOLUD address */ ulong sa_get_tolud_base(struct udevice *dev); @@ -56,7 +56,7 @@ ulong sa_get_tolud_base(struct udevice *dev); * for Graphics Translation Tables. * * @dev: hostbridge device - * @return GSM address + * Return: GSM address */ ulong sa_get_gsm_base(struct udevice *dev); @@ -65,7 +65,7 @@ ulong sa_get_gsm_base(struct udevice *dev); * * This returns the top address of DRAM available below 4GB * - * @return TSEG base + * Return: TSEG base */ ulong sa_get_tseg_base(struct udevice *dev); diff --git a/arch/x86/include/asm/arch-coreboot/timestamp.h b/arch/x86/include/asm/arch-coreboot/timestamp.h index 531526b..bbf8944 100644 --- a/arch/x86/include/asm/arch-coreboot/timestamp.h +++ b/arch/x86/include/asm/arch-coreboot/timestamp.h @@ -17,7 +17,7 @@ void timestamp_add_now(enum timestamp_id id); /** * timestamp_add_to_bootstage - Add important coreboot timestamps to bootstage * - * @return 0 if ok, -1 if no timestamps were found + * Return: 0 if ok, -1 if no timestamps were found */ int timestamp_add_to_bootstage(void); diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h b/arch/x86/include/asm/arch-ivybridge/pch.h index 8018bc0..0c980e5 100644 --- a/arch/x86/include/asm/arch-ivybridge/pch.h +++ b/arch/x86/include/asm/arch-ivybridge/pch.h @@ -380,7 +380,7 @@ * pch_silicon_revision() - Read silicon device ID from the PCH * * @dev: PCH device - * @return silicon device ID + * Return: silicon device ID */ int pch_silicon_type(struct udevice *dev); diff --git a/arch/x86/include/asm/arch-ivybridge/sandybridge.h b/arch/x86/include/asm/arch-ivybridge/sandybridge.h index a3a507f..4f2971c 100644 --- a/arch/x86/include/asm/arch-ivybridge/sandybridge.h +++ b/arch/x86/include/asm/arch-ivybridge/sandybridge.h @@ -111,7 +111,7 @@ * bridge_silicon_revision() - Get the Northbridge revision * * @dev: Northbridge device - * @return revision ID (bits 3:0) and bridge ID (bits 7:4) + * Return: revision ID (bits 3:0) and bridge ID (bits 7:4) */ int bridge_silicon_revision(struct udevice *dev); diff --git a/arch/x86/include/asm/bootm.h b/arch/x86/include/asm/bootm.h index bd8ce55..109f686 100644 --- a/arch/x86/include/asm/bootm.h +++ b/arch/x86/include/asm/bootm.h @@ -19,7 +19,7 @@ void bootm_announce_and_cleanup(void); * @image_64bit: true if the image is a raw 64-bit kernel, false if it * is raw 32-bit or any type of self-extracting kernel * such as a bzImage. - * @return -ve error code. This function does not return if the kernel was + * Return: -ve error code. This function does not return if the kernel was * booted successfully. */ int boot_linux_kernel(ulong setup_base, ulong load_address, bool image_64bit); diff --git a/arch/x86/include/asm/cb_sysinfo.h b/arch/x86/include/asm/cb_sysinfo.h index 7590135..0201ac6 100644 --- a/arch/x86/include/asm/cb_sysinfo.h +++ b/arch/x86/include/asm/cb_sysinfo.h @@ -222,14 +222,14 @@ extern struct sysinfo_t lib_sysinfo; * so. * * @info: Place to put the parsed information - * @return 0 if OK, -ENOENT if no table found + * Return: 0 if OK, -ENOENT if no table found */ int get_coreboot_info(struct sysinfo_t *info); /** * cb_get_sysinfo() - get a pointer to the parsed coreboot sysinfo * - * @return pointer to sysinfo, or NULL if not available + * Return: pointer to sysinfo, or NULL if not available */ const struct sysinfo_t *cb_get_sysinfo(void); diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h index a74654b..f131de5 100644 --- a/arch/x86/include/asm/coreboot_tables.h +++ b/arch/x86/include/asm/coreboot_tables.h @@ -554,7 +554,7 @@ void write_coreboot_table(u32 addr, struct memory_area *cfg_tables); /** * locate_coreboot_table() - Try to find coreboot tables at standard locations * - * @return address of table that was found, or -ve error number + * Return: address of table that was found, or -ve error number */ long locate_coreboot_table(void); diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h index 5b001bb..3346012 100644 --- a/arch/x86/include/asm/cpu.h +++ b/arch/x86/include/asm/cpu.h @@ -205,7 +205,7 @@ void cpu_disable_paging_pae(void); /** * cpu_has_64bit() - Check if the CPU has 64-bit support * - * @return 1 if this CPU supports long mode (64-bit), 0 if not + * Return: 1 if this CPU supports long mode (64-bit), 0 if not */ int cpu_has_64bit(void); @@ -224,7 +224,7 @@ const char *cpu_vendor_name(int vendor); * cpu_get_name() - Get the name of the current cpu * * @name: Place to put name, which must be CPU_MAX_NAME_LEN bytes including - * @return pointer to name, which will likely be a few bytes after the start + * Return: pointer to name, which will likely be a few bytes after the start * of @name * \0 terminator */ @@ -277,14 +277,14 @@ int cpu_jump_to_64bit_uboot(ulong target); /** * cpu_get_family_model() - Get the family and model for the CPU * - * @return the CPU ID masked with 0x0fff0ff0 + * Return: the CPU ID masked with 0x0fff0ff0 */ u32 cpu_get_family_model(void); /** * cpu_get_stepping() - Get the stepping value for the CPU * - * @return the CPU ID masked with 0xf + * Return: the CPU ID masked with 0xf */ u32 cpu_get_stepping(void); @@ -293,7 +293,7 @@ u32 cpu_get_stepping(void); * * This is 32 for older CPUs but newer ones may support 36. * - * @return address size (typically 32 or 36) + * Return: address size (typically 32 or 36) */ int cpu_phys_address_size(void); diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index e41ceda..dd4cf15 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -22,7 +22,7 @@ struct udevice; * This reports BIST failure, enables the LAPIC, updates microcode, enables * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA. * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int cpu_common_init(void); @@ -35,7 +35,7 @@ int cpu_common_init(void); * Some details are available here: * http://forum.hwbot.org/showthread.php?t=76092 * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int cpu_set_flex_ratio_to_tdp_nominal(void); @@ -49,7 +49,7 @@ int cpu_set_flex_ratio_to_tdp_nominal(void); * @info: cpu_info struct to fill in * @bclk_mz: the base clock in MHz * - * @return 0 always + * Return: 0 always */ int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); @@ -60,7 +60,7 @@ int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); * MSR_TEMPERATURE_TARGET value. * * @dev: CPU device - * @return 0 if OK, -ENOENT if no target is given in device tree + * Return: 0 if OK, -ENOENT if no target is given in device tree */ int cpu_configure_thermal_target(struct udevice *dev); @@ -76,7 +76,7 @@ void cpu_set_perf_control(uint clk_ratio); /** * cpu_config_tdp_levels() - Check for configurable TDP option * - * @return true if the CPU has configurable TDP (Thermal-design power) + * Return: true if the CPU has configurable TDP (Thermal-design power) */ bool cpu_config_tdp_levels(void); @@ -95,7 +95,7 @@ enum burst_mode_t { * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED. * Also checks cpuid 0x6 to see whether burst mode is supported. * - * @return current burst mode status + * Return: current burst mode status */ enum burst_mode_t cpu_get_burst_mode_state(void); @@ -134,14 +134,14 @@ void cpu_set_p_state_to_turbo_ratio(void); * * See ACPI spec v6.3 section 8.4.6.5 _PSD (P-State Dependency) * - * @return HW_ALL (always) + * Return: HW_ALL (always) */ int cpu_get_coord_type(void); /** * cpu_get_min_ratio() - get minimum support frequency ratio for CPU * - * @return minimum ratio + * Return: minimum ratio */ int cpu_get_min_ratio(void); @@ -151,7 +151,7 @@ int cpu_get_min_ratio(void); * If a nominal TDP ratio is available, it is returned. Otherwise this returns * the maximum non-turbo frequency ratio for this processor * - * @return max ratio + * Return: max ratio */ int cpu_get_max_ratio(void); @@ -160,28 +160,28 @@ int cpu_get_max_ratio(void); * * This is the value the clock ratio is multiplied with * - * @return bus-block frequency in KHz + * Return: bus-block frequency in KHz */ int cpu_get_bus_clock_khz(void); /** * cpu_get_power_max() - Get maximum CPU TDP * - * @return maximum CPU TDP (Thermal-design power) in mW + * Return: maximum CPU TDP (Thermal-design power) in mW */ int cpu_get_power_max(void); /** * cpu_get_max_turbo_ratio() - Get maximum turbo ratio * - * @return maximum ratio + * Return: maximum ratio */ int cpu_get_max_turbo_ratio(void); /** * cpu_get_cores_per_package() - Get the number of CPU cores in each package * - * @return number of cores + * Return: number of cores */ int cpu_get_cores_per_package(void); diff --git a/arch/x86/include/asm/cpu_x86.h b/arch/x86/include/asm/cpu_x86.h index 4fd5f03..7d04977 100644 --- a/arch/x86/include/asm/cpu_x86.h +++ b/arch/x86/include/asm/cpu_x86.h @@ -13,7 +13,7 @@ * like the processor local apic id. * * @dev: Device to check (UCLASS_CPU) - * @return 0 always + * Return: 0 always */ int cpu_x86_bind(struct udevice *dev); diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h index 850a0a7..1ab709a 100644 --- a/arch/x86/include/asm/e820.h +++ b/arch/x86/include/asm/e820.h @@ -34,7 +34,7 @@ unsigned int install_e820_map(unsigned int max_entries, * * @max_entries: Maximum number of entries to write * @entries: Place to put entires - * @return number of entries written + * Return: number of entries written */ unsigned int cb_install_e820_map(unsigned int max_entries, struct e820_entry *entries); diff --git a/arch/x86/include/asm/fast_spi.h b/arch/x86/include/asm/fast_spi.h index 82e3d8f..998847b 100644 --- a/arch/x86/include/asm/fast_spi.h +++ b/arch/x86/include/asm/fast_spi.h @@ -61,7 +61,7 @@ check_member(fast_spi_regs, ptdata, 0xd0); * @map_sizep: Returns size of mapped SPI * @offsetp: Returns start offset of SPI flash where the map works * correctly (offsets before this are not visible) - * @return 0 (always) + * Return: 0 (always) */ int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep, uint *offsetp); @@ -74,7 +74,7 @@ int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep, * @map_sizep: Returns size of mapped SPI * @offsetp: Returns start offset of SPI flash where the map works * correctly (offsets before this are not visible) - * @return 0 (always) + * Return: 0 (always) */ int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep, uint *map_sizep, uint *offsetp); diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index 3cd3e4f..68331eb 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -23,7 +23,7 @@ /** * fsp_find_header() - Find FSP header offset in FSP image * - * @return the offset of FSP header. If signature is invalid, returns 0. + * Return: the offset of FSP header. If signature is invalid, returns 0. */ struct fsp_header *fsp_find_header(void); @@ -33,7 +33,7 @@ struct fsp_header *fsp_find_header(void); * @fsp_hdr: Pointer to FSP information header * @phase: FSP initialization phase defined in enum fsp_phase * - * @return compatible status code with EFI_STATUS defined in PI spec + * Return: compatible status code with EFI_STATUS defined in PI spec */ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); @@ -42,7 +42,7 @@ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); * * @hob_list: A HOB list pointer. * - * @return Usable low memory top. + * Return: Usable low memory top. */ u32 fsp_get_usable_lowmem_top(const void *hob_list); @@ -51,7 +51,7 @@ u32 fsp_get_usable_lowmem_top(const void *hob_list); * * @hob_list: A HOB list pointer. * - * @return Usable high memory top. + * Return: Usable high memory top. */ u64 fsp_get_usable_highmem_top(const void *hob_list); @@ -63,7 +63,7 @@ u64 fsp_get_usable_highmem_top(const void *hob_list); * If the GUID HOB is located, the length will be updated. * @guid: A pointer to the owner guild. * - * @return Reserved region start address. + * Return: Reserved region start address. * 0 if this region does not exist. */ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, @@ -75,7 +75,7 @@ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, * @hob_list: A HOB list pointer. * @len: A pointer to the FSP reserved memory length buffer. * If the GUID HOB is located, the length will be updated. - * @return FSP reserved memory base + * Return: FSP reserved memory base * 0 if this region does not exist. */ u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); @@ -87,8 +87,8 @@ u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); * @len: A pointer to the TSEG reserved memory length buffer. * If the GUID HOB is located, the length will be updated. * - * @return NULL: Failed to find the TSEG reserved memory. - * @return others: TSEG reserved memory base. + * Return: NULL: Failed to find the TSEG reserved memory. + * Return: others: TSEG reserved memory base. */ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); @@ -99,8 +99,8 @@ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); * @len: A pointer to the NVS data buffer length. * If the HOB is located, the length will be updated. * - * @return NULL: Failed to find the NVS HOB. - * @return others: FSP NVS data buffer pointer. + * Return: NULL: Failed to find the NVS HOB. + * Return: others: FSP NVS data buffer pointer. */ void *fsp_get_nvs_data(const void *hob_list, u32 *len); @@ -111,8 +111,8 @@ void *fsp_get_nvs_data(const void *hob_list, u32 *len); * @len: A pointer to the NVS data buffer length. * If the HOB is located, the length will be updated. * - * @return NULL: Failed to find the NVS HOB. - * @return others: FSP NVS data buffer pointer. + * Return: NULL: Failed to find the NVS HOB. + * Return: others: FSP NVS data buffer pointer. */ void *fsp_get_var_nvs_data(const void *hob_list, u32 *len); @@ -123,15 +123,15 @@ void *fsp_get_var_nvs_data(const void *hob_list, u32 *len); * @len: A pointer to the graphics info HOB length. * If the HOB is located, the length will be updated. * - * @return NULL: Failed to find the graphics info HOB. - * @return others: A pointer to struct hob_graphics_info. + * Return: NULL: Failed to find the graphics info HOB. + * Return: others: A pointer to struct hob_graphics_info. */ void *fsp_get_graphics_info(const void *hob_list, u32 *len); /** * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init * - * @return 0 if OK, -EPERM if the FSP gave an error. + * Return: 0 if OK, -EPERM if the FSP gave an error. */ int fsp_init_phase_pci(void); @@ -140,7 +140,7 @@ int fsp_init_phase_pci(void); * * This sets gd->ram_size based on what it finds. * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int fsp_scan_for_ram_size(void); @@ -150,7 +150,7 @@ int fsp_scan_for_ram_size(void); * @fsp_hdr: Pointer to FSP information header * @phase: FSP initialization phase defined in enum fsp_phase * - * @return compatible status code with EFI_STATUS defined in PI spec + * Return: compatible status code with EFI_STATUS defined in PI spec */ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h index a44a550..b5d0f6d 100644 --- a/arch/x86/include/asm/fsp1/fsp_support.h +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -33,7 +33,7 @@ void fsp_init_done(void *hob_list); * @status: Always 0 * @hob_list: HOB list pointer * - * @return Never returns + * Return: Never returns */ void fsp_continue(u32 status, void *hob_list); @@ -53,8 +53,8 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); * @len: A pointer to the bootloader temporary stack length. * If the HOB is located, the length will be updated. * - * @return NULL: Failed to find the bootloader temporary stack HOB. - * @return others: Bootloader temporary stackbuffer pointer. + * Return: NULL: Failed to find the bootloader temporary stack HOB. + * Return: others: Bootloader temporary stackbuffer pointer. */ void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); @@ -64,7 +64,7 @@ void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); * @config: A pointer to the FSP configuration data structure * @rt_buf: A pointer to the FSP runtime buffer data structure * - * @return None + * Return: None */ void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf); diff --git a/arch/x86/include/asm/fsp2/fsp_api.h b/arch/x86/include/asm/fsp2/fsp_api.h index af1e885..dccbfa4 100644 --- a/arch/x86/include/asm/fsp2/fsp_api.h +++ b/arch/x86/include/asm/fsp2/fsp_api.h @@ -38,7 +38,7 @@ struct __packed fsp_upd_header { * from scatch since we will lose its contents * @use_spi_flash: true to use the fast SPI driver to read FSP, otherwise use * mapped SPI - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int fsp_memory_init(bool s3wake, bool use_spi_flash); @@ -54,7 +54,7 @@ typedef asmlinkage int (*fsp_memory_init_func)(struct fspm_upd *params, * from scatch since we will lose its contents * @use_spi_flash: true to use the fast SPI driver to read FSP, otherwise use * mapped SPI - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int fsp_silicon_init(bool s3wake, bool use_spi_flash); diff --git a/arch/x86/include/asm/fsp2/fsp_internal.h b/arch/x86/include/asm/fsp2/fsp_internal.h index b4a4fbb..836660d 100644 --- a/arch/x86/include/asm/fsp2/fsp_internal.h +++ b/arch/x86/include/asm/fsp2/fsp_internal.h @@ -57,7 +57,7 @@ int arch_fsps_preinit(void); * * @dev: Hostbridge device containing config * @upd: Config data to fill in - * @return 0 if OK, -ENOENT if OK but no MRC-cache data was found, other -ve on + * Return: 0 if OK, -ENOENT if OK but no MRC-cache data was found, other -ve on * error */ int fspm_update_config(struct udevice *dev, struct fspm_upd *upd); @@ -69,7 +69,7 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd *upd); * continue. * * @dev: Hostbridge device - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int fspm_done(struct udevice *dev); @@ -79,7 +79,7 @@ int fspm_done(struct udevice *dev); * @dev: Hostbridge device containing config * @rom_offset: Value to add to convert from ROM offset to memory-mapped address * @upd: Config data to fill in - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int fsps_update_config(struct udevice *dev, ulong rom_offset, struct fsps_upd *upd); @@ -90,7 +90,7 @@ int fsps_update_config(struct udevice *dev, ulong rom_offset, * This looks for cached Memory-reference code (MRC) data and stores it into * @upd for use by the FSP-M binary. * - * @return 0 if OK, -ENOENT if no data (whereupon the caller can continue and + * Return: 0 if OK, -ENOENT if no data (whereupon the caller can continue and * expect a slower boot), other -ve value on other error */ int prepare_mrc_cache(struct fspm_upd *upd); diff --git a/arch/x86/include/asm/hob.h b/arch/x86/include/asm/hob.h index 2f5b6e2..224bc08 100644 --- a/arch/x86/include/asm/hob.h +++ b/arch/x86/include/asm/hob.h @@ -135,7 +135,7 @@ struct hob_guid { * * @hdr: A pointer to a HOB. * - * @return A pointer to the next HOB in the HOB list. + * Return: A pointer to the next HOB in the HOB list. */ static inline const struct hob_header *get_next_hob(const struct hob_header *hdr) @@ -152,8 +152,8 @@ static inline const struct hob_header *get_next_hob(const struct hob_header * * @hdr: A pointer to a HOB. * - * @return true: The HOB specified by hdr is the last HOB in the HOB list. - * @return false: The HOB specified by hdr is not the last HOB in the HOB list. + * Return: true: The HOB specified by hdr is the last HOB in the HOB list. + * Return: false: The HOB specified by hdr is not the last HOB in the HOB list. */ static inline bool end_of_hob(const struct hob_header *hdr) { @@ -169,7 +169,7 @@ static inline bool end_of_hob(const struct hob_header *hdr) * * @hdr: A pointer to a HOB. * - * @return A pointer to the data buffer in a HOB. + * Return: A pointer to the data buffer in a HOB. */ static inline void *get_guid_hob_data(const struct hob_header *hdr) { @@ -185,7 +185,7 @@ static inline void *get_guid_hob_data(const struct hob_header *hdr) * * @hdr: A pointer to a HOB. * - * @return The size of the data buffer. + * Return: The size of the data buffer. */ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) { @@ -198,7 +198,7 @@ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) * @type: HOB type to search * @hob_list: A pointer to the HOB list * - * @return A HOB object with matching type; Otherwise NULL. + * Return: A HOB object with matching type; Otherwise NULL. */ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list); @@ -208,7 +208,7 @@ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list); * @guid: GUID to search * @hob_list: A pointer to the HOB list * - * @return A HOB object with matching GUID; Otherwise NULL. + * Return: A HOB object with matching GUID; Otherwise NULL. */ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list); @@ -221,8 +221,8 @@ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, * If the GUID HOB is located, the length will be updated. * @guid A pointer to HOB GUID. * - * @return NULL: Failed to find the GUID HOB. - * @return others: GUID HOB data buffer pointer. + * Return: NULL: Failed to find the GUID HOB. + * Return: others: GUID HOB data buffer pointer. */ void *hob_get_guid_hob_data(const void *hob_list, u32 *len, const efi_guid_t *guid); diff --git a/arch/x86/include/asm/i8254.h b/arch/x86/include/asm/i8254.h index 4069b9a..0b999a1 100644 --- a/arch/x86/include/asm/i8254.h +++ b/arch/x86/include/asm/i8254.h @@ -42,7 +42,7 @@ * after a delay with i8254_disable_beep(). * * @frequency_hz: Frequency of beep in Hz - * @return 0 if OK, -EINVAL if frequency_hz is 0 + * Return: 0 if OK, -EINVAL if frequency_hz is 0 */ int i8254_enable_beep(uint frequency_hz); diff --git a/arch/x86/include/asm/intel_acpi.h b/arch/x86/include/asm/intel_acpi.h index a5781f1..c1f5048 100644 --- a/arch/x86/include/asm/intel_acpi.h +++ b/arch/x86/include/asm/intel_acpi.h @@ -22,7 +22,7 @@ struct udevice; * @core_id: CPU core number, as numbered by the SoC * @c_state_map: Information about each C state * @num_cstates: Number of entries in @c_state_map - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int acpi_generate_cpu_header(struct acpi_ctx *ctx, int core_id, const struct acpi_cstate *c_state_map, diff --git a/arch/x86/include/asm/intel_opregion.h b/arch/x86/include/asm/intel_opregion.h index fb3e386..182398a 100644 --- a/arch/x86/include/asm/intel_opregion.h +++ b/arch/x86/include/asm/intel_opregion.h @@ -239,7 +239,7 @@ struct __packed optionrom_vbt { * * This is called from ACPI code and OS drivers * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int intel_gma_init_igd_opregion(struct udevice *dev, struct igd_opregion *opregion); diff --git a/arch/x86/include/asm/intel_pinctrl.h b/arch/x86/include/asm/intel_pinctrl.h index 44eedc2..b0ff470 100644 --- a/arch/x86/include/asm/intel_pinctrl.h +++ b/arch/x86/include/asm/intel_pinctrl.h @@ -167,7 +167,7 @@ int intel_pinctrl_probe(struct udevice *dev); * @dev: Pinctrl device * @comm: Pad community for this device * @num_cfgs: Number of configuration words for each pad - * @return 0 if OK, -EDOM if @comm is NULL, other -ve value on other error + * Return: 0 if OK, -EDOM if @comm is NULL, other -ve value on other error */ int intel_pinctrl_of_to_plat(struct udevice *dev, const struct pad_community *comm, int num_cfgs); @@ -185,7 +185,7 @@ int intel_pinctrl_of_to_plat(struct udevice *dev, * @gpe0b: Value for GPE0B * @gpe0c: Value for GPE0C * @gpe0d: Value for GPE0D - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pinctrl_route_gpe(struct udevice *dev, uint gpe0b, uint gpe0c, uint gpe0d); @@ -198,7 +198,7 @@ int pinctrl_route_gpe(struct udevice *dev, uint gpe0b, uint gpe0c, uint gpe0d); * @pads: Pad data, consisting of a pad number followed by num_cfgs entries * containing the data for that pad (num_cfgs is set by the pinctrl device) * @pads_count: Number of pads to configure - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pinctrl_config_pads(struct udevice *dev, u32 *pads, int pads_count); @@ -207,7 +207,7 @@ int pinctrl_config_pads(struct udevice *dev, u32 *pads, int pads_count); * * This enables the interrupt inputs and clears the status register bits * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pinctrl_gpi_clear_int_cfg(void); @@ -218,7 +218,7 @@ int pinctrl_gpi_clear_int_cfg(void); * * @dev: pinctrl device (any will do) * @node: Node containing the 'pads' property with the data in it - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pinctrl_config_pads_for_node(struct udevice *dev, ofnode node); @@ -255,7 +255,7 @@ int pinctrl_read_pads(struct udevice *dev, ofnode node, const char *prop, * @dev: pinctrl device (any will do) * @pads: Array of pad data * @size: Size of pad data in bytes - * @return number of pads represented by the data + * Return: number of pads represented by the data */ int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size); @@ -266,7 +266,7 @@ int pinctrl_count_pads(struct udevice *dev, u32 *pads, int size); * * @dev: Pinctrl device * @offset: GPIO offset within this device - * @return register offset of first register within the GPIO p2sb region + * Return: register offset of first register within the GPIO p2sb region */ u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset); @@ -276,7 +276,7 @@ u32 intel_pinctrl_get_config_reg_offset(struct udevice *dev, uint offset); * This works out the absolute address of the registers for a pin * @dev: Pinctrl device * @offset: GPIO offset within this device - * @return register address of first register within the GPIO p2sb region + * Return: register address of first register within the GPIO p2sb region */ u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset); @@ -285,7 +285,7 @@ u32 intel_pinctrl_get_config_reg_addr(struct udevice *dev, uint offset); * * @dev: Pinctrl device * @offset: GPIO offset within this device - * @return register value within the GPIO p2sb region + * Return: register value within the GPIO p2sb region */ u32 intel_pinctrl_get_config_reg(struct udevice *dev, uint offset); @@ -297,7 +297,7 @@ u32 intel_pinctrl_get_config_reg(struct udevice *dev, uint offset); * @pad: Pad to check * @devp: Returns pinctrl device containing that pad * @offsetp: Returns offset of pad within that pinctrl device - * @return 0 if OK, -ENOTBLK if pad number is invalid + * Return: 0 if OK, -ENOTBLK if pad number is invalid */ int intel_pinctrl_get_pad(uint pad, struct udevice **devp, uint *offsetp); @@ -309,7 +309,7 @@ int intel_pinctrl_get_pad(uint pad, struct udevice **devp, uint *offsetp); * * @dev: Pinctrl device to check * @offset: Offset of pin within that device (0 = first) - * @return associated ACPI GPIO pin-table entry, or standard pin number if the + * Return: associated ACPI GPIO pin-table entry, or standard pin number if the * ACPI pad base is not set */ int intel_pinctrl_get_acpi_pin(struct udevice *dev, uint offset); diff --git a/arch/x86/include/asm/lpc_common.h b/arch/x86/include/asm/lpc_common.h index d462c2e..aa3ac62 100644 --- a/arch/x86/include/asm/lpc_common.h +++ b/arch/x86/include/asm/lpc_common.h @@ -49,7 +49,7 @@ * also puts the RCB in the correct place so that RCB_REG() works. * * @dev: LPC device (a child of the PCH) - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error */ int lpc_common_early_init(struct udevice *dev); diff --git a/arch/x86/include/asm/me_common.h b/arch/x86/include/asm/me_common.h index 49d8862..8570368 100644 --- a/arch/x86/include/asm/me_common.h +++ b/arch/x86/include/asm/me_common.h @@ -325,7 +325,7 @@ void intel_me_status(struct udevice *me_dev); * intel_early_me_init() - Early Intel Management Engine init * * @me_dev: Management engine PCI device - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int intel_early_me_init(struct udevice *me_dev); @@ -333,7 +333,7 @@ int intel_early_me_init(struct udevice *me_dev); * intel_early_me_uma_size() - Get UMA size from the Intel Management Engine * * @me_dev: Management engine PCI device - * @return UMA size if OK, -EINVAL on error + * Return: UMA size if OK, -EINVAL on error */ int intel_early_me_uma_size(struct udevice *me_dev); @@ -343,7 +343,7 @@ int intel_early_me_uma_size(struct udevice *me_dev); * @dev: Northbridge device * @me_dev: Management engine PCI device * @status: Status result (ME_INIT_...) - * @return 0 to continue to boot, -EINVAL on unknown result data, -ETIMEDOUT + * Return: 0 to continue to boot, -EINVAL on unknown result data, -ETIMEDOUT * if ME did not respond */ int intel_early_me_init_done(struct udevice *dev, struct udevice *me_dev, diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index 4ab7504..09652b9 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -17,7 +17,7 @@ extern u32 ucode_size; * * Applies any microcode updates in the device tree. * - * @return 0 if OK, -EEXIST if the updates were already applied, -ENOENT if + * Return: 0 if OK, -EEXIST if the updates were already applied, -ENOENT if * not updates were found, -EINVAL if an update was invalid */ int microcode_update_intel(void); @@ -27,7 +27,7 @@ int microcode_update_intel(void); * * This reads the microcode version of the currently running CPU * - * @return microcode version number + * Return: microcode version number */ int microcode_read_rev(void); #endif /* __ASSEMBLY__ */ diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h index e48ba05..f4c4d6c 100644 --- a/arch/x86/include/asm/mp.h +++ b/arch/x86/include/asm/mp.h @@ -124,7 +124,7 @@ typedef void (*mp_run_func)(void *arg); * all, or MP_SELECT_BSP for BSP * @func: Function to run * @arg: Argument to pass to the function - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error */ int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg); @@ -133,7 +133,7 @@ int mp_run_on_cpus(int cpu_select, mp_run_func func, void *arg); * * This halts all CPUs except the main one, ready for the OS to use them * - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int mp_park_aps(void); @@ -145,7 +145,7 @@ int mp_park_aps(void); * -EFBIG. * * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...) - * @return next CPU number to run on (e.g. 0) + * Return: next CPU number to run on (e.g. 0) */ int mp_first_cpu(int cpu_select); @@ -160,7 +160,7 @@ int mp_first_cpu(int cpu_select); * * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...) * @prev_cpu: Previous value returned by mp_first_cpu()/mp_next_cpu() - * @return next CPU number to run on (e.g. 0) + * Return: next CPU number to run on (e.g. 0) */ int mp_next_cpu(int cpu_select, int prev_cpu); #else diff --git a/arch/x86/include/asm/mrc_common.h b/arch/x86/include/asm/mrc_common.h index d4e56bf..3d7f00c 100644 --- a/arch/x86/include/asm/mrc_common.h +++ b/arch/x86/include/asm/mrc_common.h @@ -17,7 +17,7 @@ * @pei_data: Platform-specific data required by the MRC * @use_asm_linkage: true if the call to MRC requires asmlinkage, false if it * uses normal U-Boot calling - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int mrc_common_init(struct udevice *dev, void *pei_data, bool use_asm_linkage); diff --git a/arch/x86/include/asm/mrccache.h b/arch/x86/include/asm/mrccache.h index 8b104a2..8ed6e0e 100644 --- a/arch/x86/include/asm/mrccache.h +++ b/arch/x86/include/asm/mrccache.h @@ -46,7 +46,7 @@ struct udevice; * for setting up SDRAM * * @entry: Position and size of MRC cache in SPI flash - * @return pointer to latest record, or NULL if none + * Return: pointer to latest record, or NULL if none */ struct mrc_data_container *mrccache_find_current(struct mrc_region *entry); @@ -60,7 +60,7 @@ struct mrc_data_container *mrccache_find_current(struct mrc_region *entry); * This routine should be called by reserve_arch() before U-Boot is relocated * when MRC cache is enabled. * - * @return 0 always + * Return: 0 always */ int mrccache_reserve(void); @@ -75,7 +75,7 @@ int mrccache_reserve(void); * @type: Type of MRC data to use * @devp: Returns pointer to the SPI flash device, if found * @entry: Position and size of MRC cache in SPI flash - * @return 0 if success, -ENOENT if SPI flash node does not exist in the + * Return: 0 if success, -ENOENT if SPI flash node does not exist in the * device tree, -EPERM if MRC region subnode does not exist in the device * tree, -EINVAL if MRC region properties format is incorrect, other error * if SPI flash probe failed. @@ -89,7 +89,7 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp, * This saves MRC data stored previously by gd->arch.mrc_output to a proper * place within the MRC region on the SPI flash. * - * @return 0 if saved to SPI flash successfully, other error if failed + * Return: 0 if saved to SPI flash successfully, other error if failed */ int mrccache_save(void); @@ -100,7 +100,7 @@ int mrccache_save(void); * data in SPL to avoid needing to pass it up to U-Boot proper to save. This * function handles that. * - * @return 0 if saved to SPI flash successfully, other error if failed + * Return: 0 if saved to SPI flash successfully, other error if failed */ int mrccache_spl_save(void); diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index d1aa86b..ca2edc7 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -145,7 +145,7 @@ int mtrr_commit(bool do_caches); * @type: Requested type (MTRR_TYPE_) * @start: Start address * @size: Size, must be power of 2 - * @return 0 on success, -EINVAL if size is not power of 2, + * Return: 0 on success, -EINVAL if size is not power of 2, * -ENOSPC if there are no more MTRRs */ int mtrr_set_next_var(uint type, uint64_t base, uint64_t size); @@ -166,7 +166,7 @@ void mtrr_read_all(struct mtrr_info *info); * @cpu_select: Selected CPUs (either a CPU number or MP_SELECT_...) * @reg: MTRR register to write (0-7) * @valid: Valid flag to write - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error */ int mtrr_set_valid(int cpu_select, int reg, bool valid); @@ -177,7 +177,7 @@ int mtrr_set_valid(int cpu_select, int reg, bool valid); * @reg: MTRR register to write (0-7) * @base: Base address and MTRR_BASE_TYPE_MASK * @mask: Mask and MTRR_PHYS_MASK_VALID - * @return 0 on success, -ve on error + * Return: 0 on success, -ve on error */ int mtrr_set(int cpu_select, int reg, u64 base, u64 mask); @@ -186,7 +186,7 @@ int mtrr_set(int cpu_select, int reg, u64 base, u64 mask); * * Some CPUs have more than 8 MTRRs. This function returns the actual number * - * @return number of variable MTRRs + * Return: number of variable MTRRs */ int mtrr_get_var_count(void); diff --git a/arch/x86/include/asm/pch_common.h b/arch/x86/include/asm/pch_common.h index c4614d3f..5b8d19f 100644 --- a/arch/x86/include/asm/pch_common.h +++ b/arch/x86/include/asm/pch_common.h @@ -39,7 +39,7 @@ * * @dev: SATA device * @idx: Register index to read - * @return value read from register + * Return: value read from register */ u32 pch_common_sir_read(struct udevice *dev, int idx); diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 2a72073..1c30b32 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -26,7 +26,7 @@ * @offset: Register offset to read * @valuep: Place to put the returned value * @size: Access size - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size); @@ -40,7 +40,7 @@ int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, * @offset: Register offset to write * @value: Value to write * @size: Access size - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, enum pci_size_t size); @@ -55,7 +55,7 @@ int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, * @offset: Register offset to update * @clr: Bits to clear * @set: Bits to set - * @return 0 if OK, -ve on error + * Return: 0 if OK, -ve on error */ int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set, enum pci_size_t size); diff --git a/arch/x86/include/asm/sfi.h b/arch/x86/include/asm/sfi.h index 09d4700..10bd1c5 100644 --- a/arch/x86/include/asm/sfi.h +++ b/arch/x86/include/asm/sfi.h @@ -148,7 +148,7 @@ typedef int (*sfi_table_handler) (struct sfi_table_header *table); * write_sfi_table() - Write Simple Firmware Interface tables * * @base: Address to write table to - * @return address to use for the next table + * Return: address to use for the next table */ ulong write_sfi_table(ulong base); diff --git a/arch/x86/include/asm/tables.h b/arch/x86/include/asm/tables.h index bf66e79..aa93883 100644 --- a/arch/x86/include/asm/tables.h +++ b/arch/x86/include/asm/tables.h @@ -50,7 +50,7 @@ void table_fill_string(char *dest, const char *src, size_t n, char pad); * Multi-Processor table and ACPI table. Whether a specific type of * configuration table is written is controlled by a Kconfig option. * - * @return 0 if OK, -ENOSPC if table too large + * Return: 0 if OK, -ENOSPC if table too large */ int write_tables(void); diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index d732661..a1655e1 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -30,7 +30,7 @@ int x86_cpu_init_f(void); * identify so that CPU functions can be used correctly, but does not change * anything. * - * @return 0 (indicating success, to mimic cpu_init_f()) + * Return: 0 (indicating success, to mimic cpu_init_f()) */ int x86_cpu_reinit_f(void); @@ -39,7 +39,7 @@ int x86_cpu_reinit_f(void); * * This just sets up the CPU features and figured out the identity * - * @return 0 (indicating success, to mimic cpu_init_f()) + * Return: 0 (indicating success, to mimic cpu_init_f()) */ int x86_cpu_init_tpl(void); diff --git a/arch/x86/include/asm/zimage.h b/arch/x86/include/asm/zimage.h index fa6e7f7..000b38e 100644 --- a/arch/x86/include/asm/zimage.h +++ b/arch/x86/include/asm/zimage.h @@ -39,7 +39,7 @@ * @kernel_size: Size of kernel including setup block (or 0 if the kernel is * new enough to have a 'syssize' value) * @load_addressp: Returns the address where the kernel has been loaded - * @return address of setup block, or NULL if something went wrong + * Return: address of setup block, or NULL if something went wrong */ struct boot_params *load_zimage(char *image, unsigned long kernel_size, ulong *load_addressp); @@ -57,7 +57,7 @@ struct boot_params *load_zimage(char *image, unsigned long kernel_size, * BZIMAGE_LOAD_ADDR or ZIMAGE_LOAD_ADDR * @cmdline_force: Address of 'override' command line, or 0 to use the one in * the * setup block - * @return 0 (always) + * Return: 0 (always) */ int setup_zimage(struct boot_params *setup_base, char *cmd_line, int auto_boot, ulong initrd_addr, ulong initrd_size, ulong cmdline_force); diff --git a/arch/x86/lib/hob.c b/arch/x86/lib/hob.c index f2c4724..b35248e 100644 --- a/arch/x86/lib/hob.c +++ b/arch/x86/lib/hob.c @@ -13,7 +13,7 @@ * @type: HOB type to search * @hob_list: A pointer to the HOB list * - * @return A HOB object with matching type; Otherwise NULL. + * Return: A HOB object with matching type; Otherwise NULL. */ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list) { @@ -38,7 +38,7 @@ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list) * @guid: GUID to search * @hob_list: A pointer to the HOB list * - * @return A HOB object with matching GUID; Otherwise NULL. + * Return: A HOB object with matching GUID; Otherwise NULL. */ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list) @@ -65,8 +65,8 @@ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, * If the GUID HOB is located, the length will be updated. * @guid A pointer to HOB GUID. * - * @return NULL: Failed to find the GUID HOB. - * @return others: GUID HOB data buffer pointer. + * Return: NULL: Failed to find the GUID HOB. + * Return: others: GUID HOB data buffer pointer. */ void *hob_get_guid_hob_data(const void *hob_list, u32 *len, const efi_guid_t *guid) diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index b526915..38632e5 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -93,7 +93,7 @@ struct mrc_data_container *mrccache_find_current(struct mrc_region *entry) * @data_size: Required data size of the new entry. Note that we assume that * all cache entries are the same size * - * @return next cache entry if found, NULL if we got to the end + * Return: next cache entry if found, NULL if we got to the end */ static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry, struct mrc_data_container *prev, int data_size) @@ -130,7 +130,7 @@ static struct mrc_data_container *find_next_mrc_cache(struct mrc_region *entry, * @sf: SPI flash to write to * @entry: Position and size of MRC cache in SPI flash * @cur: Record to write - * @return 0 if updated, -EEXIST if the record is the same as the latest + * Return: 0 if updated, -EEXIST if the record is the same as the latest * record, -EINVAL if the record is not valid, other error if SPI write failed */ static int mrccache_update(struct udevice *sf, struct mrc_region *entry, |