diff options
Diffstat (limited to 'arch/x86')
25 files changed, 238 insertions, 135 deletions
diff --git a/arch/x86/cpu/apollolake/Kconfig b/arch/x86/cpu/apollolake/Kconfig index c6c1350..f5dbd6c 100644 --- a/arch/x86/cpu/apollolake/Kconfig +++ b/arch/x86/cpu/apollolake/Kconfig @@ -19,6 +19,7 @@ config INTEL_APOLLOLAKE select SMP_AP_WORK select INTEL_GMA_SWSMISCI select ACPI_GNVS_EXTERNAL + select TPL_OF_PLATDATA_PARENT imply ENABLE_MRC_CACHE imply AHCI_PCI imply SCSI diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c index cef9375..c6be707 100644 --- a/arch/x86/cpu/apollolake/fsp_m.c +++ b/arch/x86/cpu/apollolake/fsp_m.c @@ -32,7 +32,10 @@ int fspm_update_config(struct udevice *dev, struct fspm_upd *upd) node = dev_ofnode(dev); if (!ofnode_valid(node)) - return log_msg_ret("fsp-m settings", -ENOENT); + return log_msg_ret("node", -ENOENT); + node = ofnode_find_subnode(node, "fsp-m"); + if (!ofnode_valid(node)) + return log_msg_ret("fspm", -ENOENT); ret = fsp_m_update_config_from_dtb(node, cfg); if (ret) diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c index e4674f3..9decab7 100644 --- a/arch/x86/cpu/apollolake/hostbridge.c +++ b/arch/x86/cpu/apollolake/hostbridge.c @@ -24,6 +24,7 @@ #include <asm/io.h> #include <asm/pci.h> #include <asm/arch/acpi.h> +#include <asm/arch/hostbridge.h> #include <asm/arch/systemagent.h> #include <dt-bindings/sound/nhlt.h> #include <dm/acpi.h> @@ -41,25 +42,7 @@ enum { TOLUD = 0xbc, }; -/** - * struct apl_hostbridge_plat - platform data for hostbridge - * - * @dtplat: Platform data for of-platdata - * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) - * @early_pads_count: Number of pads to process - * @pciex_region_size: BAR length in bytes - * @bdf: Bus/device/function of hostbridge - */ -struct apl_hostbridge_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_hostbridge dtplat; -#endif - u32 *early_pads; - int early_pads_count; - uint pciex_region_size; - pci_dev_t bdf; -}; - +#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) static const struct nhlt_format_config dmic_1ch_formats[] = { /* 48 KHz 16-bits per sample. */ { @@ -155,6 +138,7 @@ static const struct nhlt_endp_descriptor dmic_4ch_descriptors[] = { .num_formats = ARRAY_SIZE(dmic_4ch_formats), }, }; +#endif static int apl_hostbridge_early_init_pinctrl(struct udevice *dev) { @@ -283,7 +267,7 @@ static int apl_acpi_hb_get_name(const struct udevice *dev, char *out_name) return acpi_copy_name(out_name, "RHUB"); } -#ifdef CONFIG_GENERATE_ACPI_TABLE +#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) static int apl_acpi_hb_write_tables(const struct udevice *dev, struct acpi_ctx *ctx) { @@ -322,7 +306,6 @@ static int apl_acpi_hb_write_tables(const struct udevice *dev, return 0; } -#endif static int apl_acpi_setup_nhlt(const struct udevice *dev, struct acpi_ctx *ctx) { @@ -347,6 +330,7 @@ static int apl_acpi_setup_nhlt(const struct udevice *dev, struct acpi_ctx *ctx) return log_msg_ret("channels", -EINVAL); } +#endif static int apl_hostbridge_remove(struct udevice *dev) { @@ -385,21 +369,23 @@ ulong sa_get_tseg_base(struct udevice *dev) struct acpi_ops apl_hostbridge_acpi_ops = { .get_name = apl_acpi_hb_get_name, -#ifdef CONFIG_GENERATE_ACPI_TABLE +#if CONFIG_IS_ENABLED(GENERATE_ACPI_TABLE) .write_tables = apl_acpi_hb_write_tables, -#endif .setup_nhlt = apl_acpi_setup_nhlt, +#endif }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_hostbridge_ids[] = { { .compatible = "intel,apl-hostbridge" }, { } }; +#endif U_BOOT_DRIVER(intel_apl_hostbridge) = { .name = "intel_apl_hostbridge", .id = UCLASS_NORTHBRIDGE, - .of_match = apl_hostbridge_ids, + .of_match = of_match_ptr(apl_hostbridge_ids), .of_to_plat = apl_hostbridge_of_to_plat, .probe = apl_hostbridge_probe, .remove = apl_hostbridge_remove, diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c index d8e05f6..e085890 100644 --- a/arch/x86/cpu/apollolake/lpc.c +++ b/arch/x86/cpu/apollolake/lpc.c @@ -81,10 +81,11 @@ int lpc_open_pmio_window(uint base, uint size) lgir_reg_num = find_unused_pmio_window(); if (lgir_reg_num < 0) { - log_err("LPC: Cannot open IO window: %lx size %lx\n", - bridge_base, size - bridged_size); - log_err("No more IO windows\n"); - + if (spl_phase() > PHASE_TPL) { + log_err("LPC: Cannot open IO window: %lx size %lx\n", + bridge_base, size - bridged_size); + log_err("No more IO windows\n"); + } return -ENOSPC; } lgir_reg_offset = LPC_GENERIC_IO_RANGE(lgir_reg_num); @@ -127,15 +128,17 @@ struct acpi_ops apl_lpc_acpi_ops = { .inject_dsdt = southbridge_inject_dsdt, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_lpc_ids[] = { { .compatible = "intel,apl-lpc" }, { } }; +#endif /* All pads are LPC already configured by the hostbridge, so no probing here */ U_BOOT_DRIVER(intel_apl_lpc) = { .name = "intel_apl_lpc", .id = UCLASS_LPC, - .of_match = apl_lpc_ids, + .of_match = of_match_ptr(apl_lpc_ids), ACPI_OPS_PTR(&apl_lpc_acpi_ops) }; diff --git a/arch/x86/cpu/apollolake/pch.c b/arch/x86/cpu/apollolake/pch.c index d9832ff..39d6ad5 100644 --- a/arch/x86/cpu/apollolake/pch.c +++ b/arch/x86/cpu/apollolake/pch.c @@ -23,14 +23,16 @@ static const struct pch_ops apl_pch_ops = { .set_spi_protect = apl_set_spi_protect, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_pch_ids[] = { { .compatible = "intel,apl-pch" }, { } }; +#endif U_BOOT_DRIVER(intel_apl_pch) = { .name = "intel_apl_pch", .id = UCLASS_PCH, - .of_match = apl_pch_ids, + .of_match = of_match_ptr(apl_pch_ids), .ops = &apl_pch_ops, }; diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c index 290b2cb..e23d38e 100644 --- a/arch/x86/cpu/apollolake/pmc.c +++ b/arch/x86/cpu/apollolake/pmc.c @@ -16,6 +16,7 @@ #include <acpi/acpi_s3.h> #include <asm/io.h> #include <asm/pci.h> +#include <asm/arch/pmc.h> #include <linux/bitops.h> #include <power/acpi_pmc.h> @@ -53,13 +54,6 @@ enum { CF9_GLB_RST = 1 << 20, }; -struct apl_pmc_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_pmc dtplat; -#endif - pci_dev_t bdf; -}; - static int apl_pmc_fill_power_state(struct udevice *dev) { struct acpi_pmc_upriv *upriv = dev_get_uclass_priv(dev); @@ -205,22 +199,24 @@ static int apl_pmc_probe(struct udevice *dev) return 0; } -static struct acpi_pmc_ops apl_pmc_ops = { +static const struct acpi_pmc_ops apl_pmc_ops = { .init = apl_pmc_fill_power_state, .prev_sleep_state = apl_prev_sleep_state, .disable_tco = apl_disable_tco, .global_reset_set_enable = apl_global_reset_set_enable, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_pmc_ids[] = { { .compatible = "intel,apl-pmc" }, { } }; +#endif U_BOOT_DRIVER(intel_apl_pmc) = { .name = "intel_apl_pmc", .id = UCLASS_ACPI_PMC, - .of_match = apl_pmc_ids, + .of_match = of_match_ptr(apl_pmc_ids), .of_to_plat = apl_pmc_ofdata_to_uc_plat, .probe = apl_pmc_probe, .ops = &apl_pmc_ops, diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c index 3a1588b..8991d5e 100644 --- a/arch/x86/cpu/apollolake/spl.c +++ b/arch/x86/cpu/apollolake/spl.c @@ -83,33 +83,6 @@ static int apl_flash_probe(struct udevice *dev) return spi_flash_std_probe(dev); } -/* - * Manually set the parent of the SPI flash to SPI, since dtoc doesn't. We also - * need to allocate the parent_plat since by the time this function is - * called device_bind() has already gone past that step. - */ -static int apl_flash_bind(struct udevice *dev) -{ - if (CONFIG_IS_ENABLED(OF_PLATDATA) && - !CONFIG_IS_ENABLED(OF_PLATDATA_PARENT)) { - struct dm_spi_slave_plat *plat; - struct udevice *spi; - int ret; - - ret = uclass_first_device_err(UCLASS_SPI, &spi); - if (ret) - return ret; - dev->parent = spi; - - plat = calloc(sizeof(*plat), 1); - if (!plat) - return -ENOMEM; - dev->parent_plat = plat; - } - - return 0; -} - static const struct dm_spi_flash_ops apl_flash_ops = { .read = apl_flash_std_read, }; @@ -123,9 +96,8 @@ U_BOOT_DRIVER(winbond_w25q128fw) = { .name = "winbond_w25q128fw", .id = UCLASS_SPI_FLASH, .of_match = apl_flash_ids, - .bind = apl_flash_bind, .probe = apl_flash_probe, - .priv_auto = sizeof(struct spi_flash), + .priv_auto = sizeof(struct spi_nor), .ops = &apl_flash_ops, }; diff --git a/arch/x86/cpu/apollolake/uart.c b/arch/x86/cpu/apollolake/uart.c index 26aef65..876fa59 100644 --- a/arch/x86/cpu/apollolake/uart.c +++ b/arch/x86/cpu/apollolake/uart.c @@ -16,6 +16,8 @@ #include <asm/io.h> #include <asm/pci.h> #include <asm/lpss.h> +#include <dm/device-internal.h> +#include <asm/arch/uart.h> /* Low-power Subsystem (LPSS) clock register */ enum { @@ -68,7 +70,7 @@ void apl_uart_init(pci_dev_t bdf, ulong base) * This driver uses its own compatible string but almost everything else from * the standard ns16550 driver. This allows us to provide an of-platdata * implementation, since the platdata produced by of-platdata does not match - * struct ns16550_plat. + * struct apl_ns16550_plat. * * When running with of-platdata (generally TPL), the platdata is converted to * something that ns16550 expects. When running withoutof-platdata (SPL, U-Boot @@ -77,10 +79,10 @@ void apl_uart_init(pci_dev_t bdf, ulong base) static int apl_ns16550_probe(struct udevice *dev) { - struct ns16550_plat *plat = dev_get_plat(dev); + struct apl_ns16550_plat *plat = dev_get_plat(dev); if (!CONFIG_IS_ENABLED(PCI)) - apl_uart_init(plat->bdf, plat->base); + apl_uart_init(plat->ns16550.bdf, plat->ns16550.base); return ns16550_serial_probe(dev); } @@ -88,24 +90,28 @@ static int apl_ns16550_probe(struct udevice *dev) static int apl_ns16550_of_to_plat(struct udevice *dev) { #if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_apl_ns16550 *dtplat = dev_get_plat(dev); - struct ns16550_plat *plat; + struct dtd_intel_apl_ns16550 *dtplat; + struct apl_ns16550_plat *plat = dev_get_plat(dev); + struct ns16550_plat ns; /* - * Convert our plat to the ns16550's plat, so we can just use - * that driver + * The device's plat uses struct apl_ns16550_plat which starts with the + * dtd struct, but the ns16550 driver expects it to be struct ns16550. + * Set up what that driver expects. Note that this means that the values + * cannot be read in this driver when using of-platdata. + * + * TODO(sjg@chromium.org): Consider having a separate plat pointer for + * of-platdata so that it is not necessary to overwrite this. */ - plat = malloc(sizeof(*plat)); - if (!plat) - return -ENOMEM; - plat->base = dtplat->early_regs[0]; - plat->reg_width = 1; - plat->reg_shift = dtplat->reg_shift; - plat->reg_offset = 0; - plat->clock = dtplat->clock_frequency; - plat->fcr = UART_FCR_DEFVAL; - plat->bdf = pci_ofplat_get_devfn(dtplat->reg[0]); - dev->plat = plat; + dtplat = &plat->dtplat; + ns.base = dtplat->early_regs[0]; + ns.reg_width = 1; + ns.reg_shift = dtplat->reg_shift; + ns.reg_offset = 0; + ns.clock = dtplat->clock_frequency; + ns.fcr = UART_FCR_DEFVAL; + ns.bdf = pci_ofplat_get_devfn(dtplat->reg[0]); + memcpy(plat, &ns, sizeof(ns)); #else int ret; @@ -117,17 +123,19 @@ static int apl_ns16550_of_to_plat(struct udevice *dev) return 0; } +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id apl_ns16550_serial_ids[] = { { .compatible = "intel,apl-ns16550" }, { }, }; +#endif U_BOOT_DRIVER(intel_apl_ns16550) = { .name = "intel_apl_ns16550", .id = UCLASS_SERIAL, - .of_match = apl_ns16550_serial_ids, - .plat_auto = sizeof(struct ns16550_plat), - .priv_auto = sizeof(struct NS16550), + .of_match = of_match_ptr(apl_ns16550_serial_ids), + .plat_auto = sizeof(struct apl_ns16550_plat), + .priv_auto = sizeof(struct ns16550), .ops = &ns16550_serial_ops, .of_to_plat = apl_ns16550_of_to_plat, .probe = apl_ns16550_probe, diff --git a/arch/x86/cpu/i386/call64.S b/arch/x86/cpu/i386/call64.S index 275063c..0ffc100 100644 --- a/arch/x86/cpu/i386/call64.S +++ b/arch/x86/cpu/i386/call64.S @@ -11,6 +11,7 @@ #include <asm/processor-flags.h> .code32 +.section .text_call64 .globl cpu_call64 cpu_call64: /* diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile index 4a5cf17..8b9a810 100644 --- a/arch/x86/cpu/intel_common/Makefile +++ b/arch/x86/cpu/intel_common/Makefile @@ -26,7 +26,7 @@ obj-y += cpu.o obj-y += fast_spi.o obj-y += lpc.o obj-y += lpss.o -obj-$(CONFIG_INTEL_GENERIC_WIFI) += generic_wifi.o +obj-$(CONFIG_$(SPL_)INTEL_GENERIC_WIFI) += generic_wifi.o ifndef CONFIG_TARGET_EFI_APP obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += microcode.o ifndef CONFIG_$(SPL_)X86_64 diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c index e71ea02..ae4de4c 100644 --- a/arch/x86/cpu/intel_common/itss.c +++ b/arch/x86/cpu/intel_common/itss.c @@ -19,25 +19,6 @@ #include <spl.h> #include <asm/itss.h> -struct itss_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - /* Put this first since driver model will copy the data here */ - struct dtd_intel_itss dtplat; -#endif -}; - -/* struct pmc_route - Routing for PMC to GPIO */ -struct pmc_route { - u32 pmc; - u32 gpio; -}; - -struct itss_priv { - struct pmc_route *route; - uint route_count; - u32 irq_snapshot[NUM_IPC_REGS]; -}; - static int set_polarity(struct udevice *dev, uint irq, bool active_low) { u32 mask; @@ -230,15 +211,17 @@ static const struct irq_ops itss_ops = { #endif }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id itss_ids[] = { { .compatible = "intel,itss", .data = X86_IRQT_ITSS }, { } }; +#endif U_BOOT_DRIVER(intel_itss) = { .name = "intel_itss", .id = UCLASS_IRQ, - .of_match = itss_ids, + .of_match = of_match_ptr(itss_ids), .ops = &itss_ops, .bind = itss_bind, .of_to_plat = itss_of_to_plat, diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index e6edab0..d73ae43 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -13,20 +13,13 @@ #include <log.h> #include <p2sb.h> #include <spl.h> +#include <asm/p2sb.h> #include <asm/pci.h> #include <linux/bitops.h> #define PCH_P2SB_E0 0xe0 #define HIDE_BIT BIT(0) -struct p2sb_plat { -#if CONFIG_IS_ENABLED(OF_PLATDATA) - struct dtd_intel_p2sb dtplat; -#endif - ulong mmio_base; - pci_dev_t bdf; -}; - /* PCI config space registers */ #define HPTC_OFFSET 0x60 #define HPTC_ADDR_ENABLE_BIT BIT(7) @@ -180,19 +173,21 @@ static int p2sb_child_post_bind(struct udevice *dev) return 0; } -struct p2sb_ops p2sb_ops = { +static const struct p2sb_ops p2sb_ops = { .set_hide = intel_p2sb_set_hide, }; +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id p2sb_ids[] = { { .compatible = "intel,p2sb" }, { } }; +#endif U_BOOT_DRIVER(intel_p2sb) = { .name = "intel_p2sb", .id = UCLASS_P2SB, - .of_match = p2sb_ids, + .of_match = of_match_ptr(p2sb_ids), .probe = p2sb_probe, .remove = p2sb_remove, .ops = &p2sb_ops, diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c index 5d89632..772a94c 100644 --- a/arch/x86/cpu/slimbootloader/serial.c +++ b/arch/x86/cpu/slimbootloader/serial.c @@ -18,7 +18,7 @@ static int slimbootloader_serial_of_to_plat(struct udevice *dev) { const efi_guid_t guid = SBL_SERIAL_PORT_INFO_GUID; struct sbl_serial_port_info *data; - struct ns16550_plat *plat = dev->plat; + struct ns16550_plat *plat = dev_get_plat(dev); if (!gd->arch.hob_list) panic("hob list not found!"); @@ -59,7 +59,7 @@ U_BOOT_DRIVER(serial_slimbootloader) = { .of_match = slimbootloader_serial_ids, .of_to_plat = slimbootloader_serial_of_to_plat, .plat_auto = sizeof(struct ns16550_plat), - .priv_auto = sizeof(struct NS16550), + .priv_auto = sizeof(struct ns16550), .probe = ns16550_serial_probe, .ops = &ns16550_serial_ops, }; diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index f8d85d5..4a73cb2 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -35,12 +35,15 @@ static inline void set_global_turbo_state(int state) } #endif +/* gcc 7.3 does not wwant to drop strings, so use #ifdef */ +#ifndef CONFIG_TPL_BUILD static const char *const turbo_state_desc[] = { [TURBO_UNKNOWN] = "unknown", [TURBO_UNAVAILABLE] = "unavailable", [TURBO_DISABLED] = "available but hidden", [TURBO_ENABLED] = "available and visible" }; +#endif /* * Determine the current state of Turbo and cache it for later. @@ -76,7 +79,9 @@ int turbo_get_state(void) } set_global_turbo_state(turbo_state); +#ifndef CONFIG_TPL_BUILD debug("Turbo is %s\n", turbo_state_desc[turbo_state]); +#endif return turbo_state; } diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts index d66e128..a846022 100644 --- a/arch/x86/dts/chromebook_coral.dts +++ b/arch/x86/dts/chromebook_coral.dts @@ -102,12 +102,13 @@ }; cpus { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; #address-cells = <1>; #size-cells = <0>; cpu_0: cpu@0 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; device_type = "cpu"; compatible = "intel,apl-cpu"; reg = <0>; @@ -174,6 +175,9 @@ */ fsp_s: fsp-s { }; + fsp_m: fsp-m { + u-boot,dm-spl; + }; nhlt { intel,dmic-channels = <4>; @@ -181,12 +185,14 @@ }; punit@0,1 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x00000800 0 0 0 0>; compatible = "intel,apl-punit"; }; gma@2,0 { + u-boot,dm-pre-proper; reg = <0x00001000 0 0 0 0>; compatible = "fsp-fb"; }; @@ -321,7 +327,8 @@ }; spi: fast-spi@d,2 { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0x02006a10 0 0 0 0>; #address-cells = <1>; #size-cells = <0>; @@ -332,7 +339,8 @@ fwstore_spi: spi-flash@0 { #size-cells = <1>; #address-cells = <1>; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; + u-boot,dm-spl; reg = <0>; compatible = "winbond,w25q128fw", "jedec,spi-nor"; @@ -574,7 +582,7 @@ #size-cells = <0>; u-boot,dm-pre-reloc; cros_ec: cros-ec { - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; compatible = "google,cros-ec-lpc"; reg = <0x204 1 0x200 1 0x880 0x80>; @@ -650,7 +658,9 @@ PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1) /* LPC_CLKRUN_N */ PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1) /* LPC_FRAME_N */ >; +}; +&fsp_m { fspm,package = <PACKAGE_BGA>; fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>; fspm,memory-down = <MEMORY_DOWN_YES>; diff --git a/arch/x86/dts/rtc.dtsi b/arch/x86/dts/rtc.dtsi index d0bbd84..942cc93 100644 --- a/arch/x86/dts/rtc.dtsi +++ b/arch/x86/dts/rtc.dtsi @@ -1,7 +1,7 @@ / { rtc: rtc { compatible = "motorola,mc146818"; - u-boot,dm-pre-reloc; + u-boot,dm-pre-proper; reg = <0x70 2>; }; }; diff --git a/arch/x86/include/asm/arch-apollolake/gpio.h b/arch/x86/include/asm/arch-apollolake/gpio.h index ab5860c..762160d 100644 --- a/arch/x86/include/asm/arch-apollolake/gpio.h +++ b/arch/x86/include/asm/arch-apollolake/gpio.h @@ -485,4 +485,22 @@ /* This is needed by ACPI */ #define GPIO_NUM_PAD_CFG_REGS 2 /* DW0, DW1 */ +#ifndef __ASSEMBLY__ + +#include <dt-structs.h> + +/** + * struct apl_gpio_plat - platform data for each device + * + * @dtplat: of-platdata data from C struct + */ +struct apl_gpio_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + /* Put this first since driver model will copy the data here */ + struct dtd_intel_apl_pinctrl dtplat; +#endif +}; + +#endif /* __ASSEMBLY__ */ + #endif /* _ASM_ARCH_GPIO_H_ */ diff --git a/arch/x86/include/asm/arch-apollolake/hostbridge.h b/arch/x86/include/asm/arch-apollolake/hostbridge.h new file mode 100644 index 0000000..f4dce0d --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/hostbridge.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef _ASM_ARCH_HOSTBRIDGE_H_ +#define _ASM_ARCH_HOSTBRIDGE_H_ + +/** + * struct apl_hostbridge_plat - platform data for hostbridge + * + * @dtplat: Platform data for of-platdata + * @early_pads: Early pad data to set up, each (pad, cfg0, cfg1) + * @early_pads_count: Number of pads to process + * @pciex_region_size: BAR length in bytes + * @bdf: Bus/device/function of hostbridge + */ +struct apl_hostbridge_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_hostbridge dtplat; +#endif + u32 *early_pads; + int early_pads_count; + uint pciex_region_size; + pci_dev_t bdf; +}; + +#endif /* _ASM_ARCH_HOSTBRIDGE_H_ */ diff --git a/arch/x86/include/asm/arch-apollolake/pmc.h b/arch/x86/include/asm/arch-apollolake/pmc.h new file mode 100644 index 0000000..23ac8fe --- /dev/null +++ b/arch/x86/include/asm/arch-apollolake/pmc.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef ASM_ARCH_PMC_H +#define ASM_ARCH_PMC_H + +struct apl_pmc_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_pmc dtplat; +#endif + pci_dev_t bdf; +}; + +#endif /* ASM_ARCH_PMC_H */ diff --git a/arch/x86/include/asm/arch-apollolake/uart.h b/arch/x86/include/asm/arch-apollolake/uart.h index d4fffe6..38335b0 100644 --- a/arch/x86/include/asm/arch-apollolake/uart.h +++ b/arch/x86/include/asm/arch-apollolake/uart.h @@ -6,6 +6,23 @@ #ifndef _ASM_ARCH_UART_H #define _ASM_ARCH_UART_H +#include <ns16550.h> + +/** + * struct apl_ns16550_plat - platform data for the APL UART + * + * Note that when of-platdata is in use, apl_ns16550_of_to_plat() actually + * copies the ns16550_plat contents to the start of this struct, meaning that + * dtplat is no-longer valid. This is done so that the ns16550 driver can use + * dev_get_plat() without any offsets or adjustments. + */ +struct apl_ns16550_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_apl_ns16550 dtplat; +#endif + struct ns16550_plat ns16550; +}; + /** * apl_uart_init() - Set up the APL UART device and clock * @@ -15,6 +32,6 @@ * The UART won't actually work unless the GPIO settings are correct and the * signals actually exit the SoC. See board_debug_uart_init() for that. */ -int apl_uart_init(pci_dev_t bdf, ulong base); +void apl_uart_init(pci_dev_t bdf, ulong base); #endif diff --git a/arch/x86/include/asm/itss.h b/arch/x86/include/asm/itss.h index f7d3240..6d47932 100644 --- a/arch/x86/include/asm/itss.h +++ b/arch/x86/include/asm/itss.h @@ -11,6 +11,8 @@ #ifndef _ASM_ARCH_ITSS_H #define _ASM_ARCH_ITSS_H +#include <irq.h> + #define GPIO_IRQ_START 50 #define GPIO_IRQ_END ITSS_MAX_IRQ @@ -42,4 +44,23 @@ /* ITSS Power reduction control */ #define PCR_ITSS_ITSSPRC 0x3300 +struct itss_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + /* Put this first since driver model will copy the data here */ + struct dtd_intel_itss dtplat; +#endif +}; + +/* struct pmc_route - Routing for PMC to GPIO */ +struct pmc_route { + u32 pmc; + u32 gpio; +}; + +struct itss_priv { + struct pmc_route *route; + uint route_count; + u32 irq_snapshot[NUM_IPC_REGS]; +}; + #endif /* _ASM_ARCH_ITSS_H */ diff --git a/arch/x86/include/asm/p2sb.h b/arch/x86/include/asm/p2sb.h new file mode 100644 index 0000000..6f63eae --- /dev/null +++ b/arch/x86/include/asm/p2sb.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ + +#ifndef ASM_P2SB_H +#define ASM_P2SB_H + +/* Platform data for the P2SB */ +struct p2sb_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_intel_p2sb dtplat; +#endif + ulong mmio_base; + pci_dev_t bdf; +}; + +#endif /* ASM_P2SB_H */ diff --git a/arch/x86/include/asm/pmu.h b/arch/x86/include/asm/pmu.h index b76bdf6..818e808 100644 --- a/arch/x86/include/asm/pmu.h +++ b/arch/x86/include/asm/pmu.h @@ -2,9 +2,9 @@ /* * Copyright (c) 2017 Intel Corporation */ -#ifndef _X86_ASM_PMU_IPC_H_ -#define _X86_ASM_PMU_IPC_H_ +#ifndef _X86_ASM_PMU_H_ +#define _X86_ASM_PMU_H_ int pmu_turn_power(unsigned int lss, bool on); -#endif /* _X86_ASM_PMU_IPC_H_ */ +#endif /* _X86_ASM_PMU_H_ */ diff --git a/arch/x86/include/asm/sysreset.h b/arch/x86/include/asm/sysreset.h new file mode 100644 index 0000000..5e586f5 --- /dev/null +++ b/arch/x86/include/asm/sysreset.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Google LLC + */ +#ifndef _X86_ASM_SYSRESET_H_ +#define _X86_ASM_SYSRESET_H_ + +#include <dt-structs.h> + +struct x86_sysreset_plat { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_x86_reset dtplat; +#endif + + struct udevice *pch; +}; + +#endif /* _X86_ASM_SYSRESET_H_ */ diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 15b0212..04ff322 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -133,14 +133,16 @@ void spl_board_init(void) * for devices, so the TPL BARs continue to be used. Once U-Boot starts it does * the auto allocation (after relocation). */ +#if !CONFIG_IS_ENABLED(OF_PLATDATA) static const struct udevice_id tpl_fake_pci_ids[] = { { .compatible = "pci-x86" }, { } }; +#endif U_BOOT_DRIVER(pci_x86) = { .name = "pci_x86", .id = UCLASS_SIMPLE_BUS, - .of_match = tpl_fake_pci_ids, + .of_match = of_match_ptr(tpl_fake_pci_ids), }; #endif |