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Diffstat (limited to 'arch/x86/dts/crownbay.dts')
-rw-r--r--arch/x86/dts/crownbay.dts18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
index 5768352..6428230 100644
--- a/arch/x86/dts/crownbay.dts
+++ b/arch/x86/dts/crownbay.dts
@@ -71,7 +71,7 @@
#address-cells = <3>;
#size-cells = <2>;
compatible = "pci-x86";
- u-boot,dm-pre-reloc;
+ bootph-all;
ranges = <0x02000000 0x0 0x40000000 0x40000000 0 0x80000000
0x42000000 0x0 0xc0000000 0xc0000000 0 0x20000000
0x01000000 0x0 0x2000 0x2000 0 0xe000>;
@@ -80,14 +80,14 @@
#address-cells = <3>;
#size-cells = <2>;
compatible = "pci-bridge";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x0000b800 0x0 0x0 0x0 0x0>;
topcliff@0,0 {
#address-cells = <3>;
#size-cells = <2>;
compatible = "pci-bridge";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x00010000 0x0 0x0 0x0 0x0>;
pciuart0: uart@a,1 {
@@ -96,7 +96,7 @@
"pciclass,070002",
"pciclass,0700",
"ns16550";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x00025100 0x0 0x0 0x0 0x0
0x01025110 0x0 0x0 0x0 0x0>;
reg-shift = <0>;
@@ -110,7 +110,7 @@
"pciclass,070002",
"pciclass,0700",
"ns16550";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x00025200 0x0 0x0 0x0 0x0
0x01025210 0x0 0x0 0x0 0x0>;
reg-shift = <0>;
@@ -124,7 +124,7 @@
"pciclass,070002",
"pciclass,0700",
"ns16550";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x00025300 0x0 0x0 0x0 0x0
0x01025310 0x0 0x0 0x0 0x0>;
reg-shift = <0>;
@@ -138,7 +138,7 @@
"pciclass,070002",
"pciclass,0700",
"ns16550";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x00025400 0x0 0x0 0x0 0x0
0x01025410 0x0 0x0 0x0 0x0>;
reg-shift = <0>;
@@ -233,14 +233,14 @@
gpioa {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0 0x20>;
bank-name = "A";
};
gpiob {
compatible = "intel,ich6-gpio";
- u-boot,dm-pre-reloc;
+ bootph-all;
reg = <0x20 0x20>;
bank-name = "B";
};