diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/start.S')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 9d44fa4..5341756 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -80,7 +80,7 @@ /* Definitions from C header file asm/immap_85xx.h */ -#define CONFIG_SYS_MPC85xx_L2_OFFSET 0x20000 +#define CFG_SYS_MPC85xx_L2_OFFSET 0x20000 #define MPC85xx_L2CTL 0x000 #define MPC85xx_L2CTL_L2E 0x80000000 @@ -127,13 +127,13 @@ bootsect: .org 0x80 /* Start of configuration */ .Lconf_pair_start: - .long CONFIG_SYS_CCSRBAR_DEFAULT + CONFIG_SYS_MPC85xx_L2_OFFSET + MPC85xx_L2SRBAR0 /* Address: L2 memory-mapped SRAM base addr 0 */ + .long CONFIG_SYS_CCSRBAR_DEFAULT + CFG_SYS_MPC85xx_L2_OFFSET + MPC85xx_L2SRBAR0 /* Address: L2 memory-mapped SRAM base addr 0 */ .long CONFIG_SYS_INIT_L2_ADDR - .long CONFIG_SYS_CCSRBAR_DEFAULT + CONFIG_SYS_MPC85xx_L2_OFFSET + MPC85xx_L2ERRDIS /* Address: L2 cache error disable */ + .long CONFIG_SYS_CCSRBAR_DEFAULT + CFG_SYS_MPC85xx_L2_OFFSET + MPC85xx_L2ERRDIS /* Address: L2 cache error disable */ .long MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC - .long CONFIG_SYS_CCSRBAR_DEFAULT + CONFIG_SYS_MPC85xx_L2_OFFSET + MPC85xx_L2CTL /* Address: L2 configuration 0 */ + .long CONFIG_SYS_CCSRBAR_DEFAULT + CFG_SYS_MPC85xx_L2_OFFSET + MPC85xx_L2CTL /* Address: L2 configuration 0 */ .long MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE .long CONFIG_SYS_CCSRBAR_DEFAULT + ESDHCCTL /* Address: eSDHC DMA control */ @@ -966,7 +966,7 @@ delete_ccsr_l2_tlb: erratum_set_dcsr 0xb0e38 0xe0400000 erratum_set_dcsr 0xb0008 0x00900000 erratum_set_dcsr 0xb0e40 0xe00a0000 - erratum_set_ccsr 0x18600 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY + erratum_set_ccsr 0x18600 CFG_SYS_FSL_CORENET_SNOOPVEC_COREONLY #ifdef CONFIG_RAMBOOT_PBL erratum_set_ccsr 0x10f00 0x495e5000 #else |