diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15-u-boot.dtsi | 29 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp157c-ed1.dts | 4 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi | 9 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi | 9 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp15xx-dkx.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-stm32/gpio.h | 86 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f4/gpio.h | 15 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-stm32f7/gpio.h | 12 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-stm32h7/gpio.h | 12 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/Kconfig | 9 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/bsec.c | 15 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig | 3 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/config.mk | 29 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/cpu.c | 52 | ||||
| -rw-r--r-- | arch/arm/mach-stm32mp/include/mach/gpio.h | 87 |
16 files changed, 73 insertions, 312 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ae911d6..f7f0383 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1813,7 +1813,6 @@ config ARCH_STM32 select CPU_V7M select DM select DM_SERIAL - select GPIO_EXTRA_HEADER imply CMD_DM config ARCH_STI @@ -1839,7 +1838,6 @@ config ARCH_STM32MP select DM_GPIO select DM_RESET select DM_SERIAL - select GPIO_EXTRA_HEADER select MISC select OF_CONTROL select OF_LIBFDT diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi index 43a7909..db23d80 100644 --- a/arch/arm/dts/stm32mp15-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi @@ -21,6 +21,10 @@ pinctrl1 = &pinctrl_z; }; + binman: binman { + multiple-images; + }; + clocks { u-boot,dm-pre-reloc; }; @@ -228,3 +232,28 @@ resets = <&rcc UART8_R>; }; +#if defined(CONFIG_STM32MP15x_STM32IMAGE) +&binman { + u-boot-stm32 { + filename = "u-boot.stm32"; + mkimage { + args = "-T stm32image -a 0xC0100000 -e 0xC0100000"; + u-boot { + }; + }; + }; +}; +#endif + +#if defined(CONFIG_SPL) +&binman { + spl-stm32 { + filename = "u-boot-spl.stm32"; + mkimage { + args = "-T stm32image -a 0x2FFC2500 -e 0x2FFC2500"; + u-boot-spl { + }; + }; + }; +}; +#endif diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 6e89f88..f62b46b 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -321,8 +321,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 11bc247..71b0486 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -50,15 +50,6 @@ }; }; -&gpiof { - snor-nwp { - gpio-hog; - gpios = <7 0>; - output-high; - line-name = "spi-nor-nwp"; - }; -}; - &i2c4 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 9d3db20..502cd95 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -25,15 +25,6 @@ u-boot,dm-spl; }; -&gpiof { - snor-nwp { - gpio-hog; - gpios = <7 0>; - output-high; - line-name = "spi-nor-nwp"; - }; -}; - &i2c4 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 68987f6..8fc93b0 100644 --- a/arch/arm/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi @@ -228,15 +228,15 @@ cs42l51_tx_endpoint: endpoint@0 { reg = <0>; remote-endpoint = <&sai2a_endpoint>; - frame-master; - bitclock-master; + frame-master = <&cs42l51_tx_endpoint>; + bitclock-master = <&cs42l51_tx_endpoint>; }; cs42l51_rx_endpoint: endpoint@1 { reg = <1>; remote-endpoint = <&sai2b_endpoint>; - frame-master; - bitclock-master; + frame-master = <&cs42l51_rx_endpoint>; + bitclock-master = <&cs42l51_rx_endpoint>; }; }; }; @@ -478,8 +478,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/include/asm/arch-stm32/gpio.h b/arch/arm/include/asm/arch-stm32/gpio.h deleted file mode 100644 index 233ce27..0000000 --- a/arch/arm/include/asm/arch-stm32/gpio.h +++ /dev/null @@ -1,86 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2016, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. - */ - -#ifndef _GPIO_H_ -#define _GPIO_H_ - -enum stm32_gpio_mode { - STM32_GPIO_MODE_IN = 0, - STM32_GPIO_MODE_OUT, - STM32_GPIO_MODE_AF, - STM32_GPIO_MODE_AN -}; - -enum stm32_gpio_otype { - STM32_GPIO_OTYPE_PP = 0, - STM32_GPIO_OTYPE_OD -}; - -enum stm32_gpio_speed { - STM32_GPIO_SPEED_2M = 0, - STM32_GPIO_SPEED_25M, - STM32_GPIO_SPEED_50M, - STM32_GPIO_SPEED_100M -}; - -enum stm32_gpio_pupd { - STM32_GPIO_PUPD_NO = 0, - STM32_GPIO_PUPD_UP, - STM32_GPIO_PUPD_DOWN -}; - -enum stm32_gpio_af { - STM32_GPIO_AF0 = 0, - STM32_GPIO_AF1, - STM32_GPIO_AF2, - STM32_GPIO_AF3, - STM32_GPIO_AF4, - STM32_GPIO_AF5, - STM32_GPIO_AF6, - STM32_GPIO_AF7, - STM32_GPIO_AF8, - STM32_GPIO_AF9, - STM32_GPIO_AF10, - STM32_GPIO_AF11, - STM32_GPIO_AF12, - STM32_GPIO_AF13, - STM32_GPIO_AF14, - STM32_GPIO_AF15 -}; - -struct stm32_gpio_dsc { - u8 port; - u8 pin; -}; - -struct stm32_gpio_ctl { - enum stm32_gpio_mode mode; - enum stm32_gpio_otype otype; - enum stm32_gpio_speed speed; - enum stm32_gpio_pupd pupd; - enum stm32_gpio_af af; -}; - -struct stm32_gpio_regs { - u32 moder; /* GPIO port mode */ - u32 otyper; /* GPIO port output type */ - u32 ospeedr; /* GPIO port output speed */ - u32 pupdr; /* GPIO port pull-up/pull-down */ - u32 idr; /* GPIO port input data */ - u32 odr; /* GPIO port output data */ - u32 bsrr; /* GPIO port bit set/reset */ - u32 lckr; /* GPIO port configuration lock */ - u32 afr[2]; /* GPIO alternate function */ -}; - -struct stm32_gpio_priv { - struct stm32_gpio_regs *regs; - unsigned int gpio_range; -}; - -int stm32_offset_to_index(struct udevice *dev, unsigned int offset); - -#endif /* _GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-stm32f4/gpio.h b/arch/arm/include/asm/arch-stm32f4/gpio.h deleted file mode 100644 index 490f686..0000000 --- a/arch/arm/include/asm/arch-stm32f4/gpio.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 - * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com - * - * (C) Copyright 2015 - * Kamil Lulko, <kamil.lulko@gmail.com> - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ - -#include <asm/arch-stm32/gpio.h> - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h deleted file mode 100644 index 21f4e0f..0000000 --- a/arch/arm/include/asm/arch-stm32f7/gpio.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2016, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ - -#include <asm/arch-stm32/gpio.h> - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-stm32h7/gpio.h b/arch/arm/include/asm/arch-stm32h7/gpio.h deleted file mode 100644 index 4f57f17..0000000 --- a/arch/arm/include/asm/arch-stm32h7/gpio.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017, STMicroelectronics - All Rights Reserved - * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics. - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ - -#include <asm/arch-stm32/gpio.h> - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 69d56c2..a6c7fc5 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,10 +35,10 @@ config ENV_SIZE config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" - select ARCH_SUPPORT_PSCI if !TFABOOT - select ARM_SMCCC if TFABOOT + select ARCH_SUPPORT_PSCI + select BINMAN select CPU_V7A - select CPU_V7_HAS_NONSEC if !TFABOOT + select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select OF_BOARD_SETUP select PINCTRL_STM32 @@ -47,8 +47,6 @@ config STM32MP15x select STM32_SERIAL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO - imply SYSRESET_PSCI if TFABOOT - imply SYSRESET_SYSCON if !TFABOOT help support of STMicroelectronics SOC STM32MP15x family STM32MP157, STM32MP153 or STM32MP151 @@ -153,7 +151,6 @@ config NR_DRAM_BANKS config DDR_CACHEABLE_SIZE hex "Size of the DDR marked cacheable in pre-reloc stage" - default 0x10000000 if TFABOOT default 0x40000000 help Define the size of the DDR marked as cacheable in U-Boot diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd8..27d1829 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -295,7 +295,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) u32 tmp_data = 0; int ret; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_OTP, otp, 0, val); @@ -326,7 +326,7 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) { struct stm32mp_bsec_plat *plat; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_SHADOW, otp, 0, val); @@ -350,7 +350,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_PROG_OTP, otp, val); @@ -365,7 +365,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRITE_SHADOW, otp, val); @@ -377,7 +377,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) { - if (!IS_ENABLED(CONFIG_TFABOOT)) + if (!IS_ENABLED(CONFIG_ARM_SMCCC) || IS_ENABLED(CONFIG_SPL_BUILD)) return -ENOTSUPP; if (val == 1) @@ -503,10 +503,9 @@ static int stm32mp_bsec_probe(struct udevice *dev) /* * update unlocked shadow for OTP cleared by the rom code - * only executed in U-Boot proper when TF-A is not used + * only executed in SPL, it is done in TF-A for TFABOOT */ - - if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev); for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig index f4c0d18..dd166a1 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig @@ -1,4 +1,3 @@ - config CMD_STM32PROG bool "command stm32prog for STM32CudeProgrammer" select DFU @@ -31,4 +30,4 @@ config CMD_STM32PROG_SERIAL help activate the command "stm32prog serial" for STM32MP soc family with the tools STM32CubeProgrammer using U-Boot serial device - and UART protocol.
\ No newline at end of file + and UART protocol. diff --git a/arch/arm/mach-stm32mp/config.mk b/arch/arm/mach-stm32mp/config.mk deleted file mode 100644 index f7f5b77..0000000 --- a/arch/arm/mach-stm32mp/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -# -# Copyright (C) 2018, STMicroelectronics - All Rights Reserved -# - -ifndef CONFIG_SPL -INPUTS-$(CONFIG_STM32MP15x_STM32IMAGE) += u-boot.stm32 -else -ifdef CONFIG_SPL_BUILD -INPUTS-y += u-boot-spl.stm32 -endif -endif - -MKIMAGEFLAGS_u-boot.stm32 = -T stm32image -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) - -u-boot.stm32: MKIMAGEOUTPUT = u-boot.stm32.log - -u-boot.stm32: u-boot.bin FORCE - $(call if_changed,mkimage) - -MKIMAGEFLAGS_u-boot-spl.stm32 = -T stm32image -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) - -spl/u-boot-spl.stm32: MKIMAGEOUTPUT = spl/u-boot-spl.stm32.log - -spl/u-boot-spl.stm32: spl/u-boot-spl.bin FORCE - $(call if_changed,mkimage) - -u-boot-spl.stm32 : spl/u-boot-spl.stm32 - $(call if_changed,copy) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index eb79f3f..325d710 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -93,8 +93,6 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000); struct lmb lmb; -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT static void security_init(void) { /* Disable the backup domain write protection */ @@ -154,7 +152,6 @@ static void security_init(void) writel(BIT(0), RCC_MP_AHB5ENSETR); writel(0x0, GPIOZ_SECCFGR); } -#endif /* CONFIG_TFABOOT */ /* * Debug init @@ -166,7 +163,7 @@ static void dbgmcu_init(void) * done in TF-A for TRUSTED boot and * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ - if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) { + if (bsec_dbgswenable()) { setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); } @@ -174,12 +171,17 @@ static void dbgmcu_init(void) void spl_board_init(void) { + struct udevice *dev; + int ret; + dbgmcu_init(); + + /* force probe of BSEC driver to shadow the upper OTP */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); + if (ret) + log_warning("BSEC probe failed: %d\n", ret); } -#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */ -#if !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* get bootmode from ROM code boot context: saved in TAMP register */ static void update_bootmode(void) { @@ -205,7 +207,6 @@ static void update_bootmode(void) TAMP_BOOT_MODE_MASK, boot_mode << TAMP_BOOT_MODE_SHIFT); } -#endif u32 get_bootmode(void) { @@ -283,29 +284,26 @@ int arch_cpu_init(void) /* early armv7 timer init: needed for polling */ timer_init(); -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT - security_init(); - update_bootmode(); -#endif - /* Reset Coprocessor state unless it wakes up from Standby power mode */ - if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { - writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); - writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + if (IS_ENABLED(CONFIG_SPL_BUILD)) { + security_init(); + update_bootmode(); + } +/* reset copro state in SPL, when used, or in U-Boot */ + if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) { + /* Reset Coprocessor state unless it wakes up from Standby power mode */ + if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { + writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); + writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + } } -#endif boot_mode = get_bootmode(); if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#if defined(CONFIG_DEBUG_UART) && \ - !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) - else + else if (IS_ENABLED(CONFIG_DEBUG_UART) && IS_ENABLED(CONFIG_SPL_BUILD)) debug_uart_init(); -#endif return 0; } @@ -459,7 +457,7 @@ void get_soc_name(char name[SOC_NAME_SIZE]) soc_type[type], soc_pkg[pkg], soc_rev[rev]); } -#if defined(CONFIG_DISPLAY_CPUINFO) +/* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) { char name[SOC_NAME_SIZE]; @@ -469,7 +467,6 @@ int print_cpuinfo(void) return 0; } -#endif /* CONFIG_DISPLAY_CPUINFO */ static void setup_boot_mode(void) { @@ -599,13 +596,15 @@ static void setup_boot_mode(void) */ __weak int setup_mac_address(void) { -#if defined(CONFIG_NET) int ret; int i; u32 otp[2]; uchar enetaddr[6]; struct udevice *dev; + if (!IS_ENABLED(CONFIG_NET)) + return 0; + /* MAC already in environment */ if (eth_env_get_enetaddr("ethaddr", enetaddr)) return 0; @@ -632,7 +631,6 @@ __weak int setup_mac_address(void) ret = eth_env_set_enetaddr("ethaddr", enetaddr); if (ret) log_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret); -#endif return 0; } diff --git a/arch/arm/mach-stm32mp/include/mach/gpio.h b/arch/arm/mach-stm32mp/include/mach/gpio.h deleted file mode 100644 index 7a0f293..0000000 --- a/arch/arm/mach-stm32mp/include/mach/gpio.h +++ /dev/null @@ -1,87 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ -#include <asm/gpio.h> - -enum stm32_gpio_mode { - STM32_GPIO_MODE_IN = 0, - STM32_GPIO_MODE_OUT, - STM32_GPIO_MODE_AF, - STM32_GPIO_MODE_AN -}; - -enum stm32_gpio_otype { - STM32_GPIO_OTYPE_PP = 0, - STM32_GPIO_OTYPE_OD -}; - -enum stm32_gpio_speed { - STM32_GPIO_SPEED_2M = 0, - STM32_GPIO_SPEED_25M, - STM32_GPIO_SPEED_50M, - STM32_GPIO_SPEED_100M -}; - -enum stm32_gpio_pupd { - STM32_GPIO_PUPD_NO = 0, - STM32_GPIO_PUPD_UP, - STM32_GPIO_PUPD_DOWN -}; - -enum stm32_gpio_af { - STM32_GPIO_AF0 = 0, - STM32_GPIO_AF1, - STM32_GPIO_AF2, - STM32_GPIO_AF3, - STM32_GPIO_AF4, - STM32_GPIO_AF5, - STM32_GPIO_AF6, - STM32_GPIO_AF7, - STM32_GPIO_AF8, - STM32_GPIO_AF9, - STM32_GPIO_AF10, - STM32_GPIO_AF11, - STM32_GPIO_AF12, - STM32_GPIO_AF13, - STM32_GPIO_AF14, - STM32_GPIO_AF15 -}; - -struct stm32_gpio_dsc { - u8 port; - u8 pin; -}; - -struct stm32_gpio_ctl { - enum stm32_gpio_mode mode; - enum stm32_gpio_otype otype; - enum stm32_gpio_speed speed; - enum stm32_gpio_pupd pupd; - enum stm32_gpio_af af; -}; - -struct stm32_gpio_regs { - u32 moder; /* GPIO port mode */ - u32 otyper; /* GPIO port output type */ - u32 ospeedr; /* GPIO port output speed */ - u32 pupdr; /* GPIO port pull-up/pull-down */ - u32 idr; /* GPIO port input data */ - u32 odr; /* GPIO port output data */ - u32 bsrr; /* GPIO port bit set/reset */ - u32 lckr; /* GPIO port configuration lock */ - u32 afr[2]; /* GPIO alternate function */ -}; - -struct stm32_gpio_priv { - struct stm32_gpio_regs *regs; - unsigned int gpio_range; -}; - -int stm32_offset_to_index(struct udevice *dev, unsigned int offset); - -#endif /* _STM32_GPIO_H_ */ |