3 files changed, 23 insertions, 53 deletions

diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index df6e9ce..d7d7798 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -35,7 +35,7 @@ u32 is_mem_sdr(void)
  * get_sdr_cs_size -
  *  - Get size of chip select 0/1
  */
-u32 get_sdr_cs_size(u32 cs)
+static u32 get_sdr_cs_size(u32 cs)
 {
 	u32 size = 0;
 
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 4d85b1d..07f534a 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -45,12 +45,27 @@ u32 is_mem_sdr(void)
 }
 
 /*
+ * get_sdr_cs_size -
+ *  - Get size of chip select 0/1
+ */
+static u32 get_sdr_cs_size(u32 cs)
+{
+	u32 size;
+
+	/* get ram size field */
+	size = readl(&sdrc_base->cs[cs].mcfg) >> 8;
+	size &= 0x3FF;		/* remove unwanted bits */
+	size <<= 21;		/* multiply by 2 MiB to find size in MB */
+	return size;
+}
+
+/*
  * make_cs1_contiguous -
  * - When we have CS1 populated we want to have it mapped after cs0 to allow
  *   command line mem=xyz use all memory with out discontinuous support
  *   compiled in.  We could do it in the ATAG, but there really is two banks...
  */
-void make_cs1_contiguous(void)
+static void make_cs1_contiguous(void)
 {
 	u32 size, a_add_low, a_add_high;
 
@@ -62,22 +77,6 @@ void make_cs1_contiguous(void)
 
 }
 
-
-/*
- * get_sdr_cs_size -
- *  - Get size of chip select 0/1
- */
-u32 get_sdr_cs_size(u32 cs)
-{
-	u32 size;
-
-	/* get ram size field */
-	size = readl(&sdrc_base->cs[cs].mcfg) >> 8;
-	size &= 0x3FF;		/* remove unwanted bits */
-	size <<= 21;		/* multiply by 2 MiB to find size in MB */
-	return size;
-}
-
 /*
  * get_sdr_cs_offset -
  *  - Get offset of cs from cs0 start
@@ -128,7 +127,7 @@ static void write_sdrc_timings(u32 cs, struct sdrc_actim *sdrc_actim_base,
  *    true and a possible 2nd time depending on memory configuration from
  *    stack+global context.
  */
-void do_sdrc_init(u32 cs, u32 early)
+static void do_sdrc_init(u32 cs, u32 early)
 {
 	struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1;
 	struct board_sdrc_timings timings;
diff --git a/arch/arm/mach-omap2/omap3/sys_info.c b/arch/arm/mach-omap2/omap3/sys_info.c
index ac72633..5f535e2 100644
--- a/arch/arm/mach-omap2/omap3/sys_info.c
+++ b/arch/arm/mach-omap2/omap3/sys_info.c
@@ -55,7 +55,7 @@ void omap_die_id(unsigned int *die_id)
 /******************************************
  * get_cpu_type(void) - extract cpu info
  ******************************************/
-u32 get_cpu_type(void)
+static u32 get_cpu_type(void)
 {
 	return readl(&ctrl_base->ctrl_omap_stat);
 }
@@ -64,7 +64,7 @@ u32 get_cpu_type(void)
  * get_cpu_id(void) - extract cpu id
  * returns 0 for ES1.0, cpuid otherwise
  ******************************************/
-u32 get_cpu_id(void)
+static u32 get_cpu_id(void)
 {
 	struct ctrl_id *id_base;
 	u32 cpuid = 0;
@@ -89,7 +89,7 @@ u32 get_cpu_id(void)
 /******************************************
  * get_cpu_family(void) - extract cpu info
  ******************************************/
-u32 get_cpu_family(void)
+__used u32 get_cpu_family(void)
 {
 	u16 hawkeye;
 	u32 cpu_family;
@@ -119,7 +119,7 @@ u32 get_cpu_family(void)
 /******************************************
  * get_cpu_rev(void) - extract version info
  ******************************************/
-u32 get_cpu_rev(void)
+__used u32 get_cpu_rev(void)
 {
 	u32 cpuid = get_cpu_id();
 
@@ -132,41 +132,12 @@ u32 get_cpu_rev(void)
 /*****************************************************************
  * get_sku_id(void) - read sku_id to get info on max clock rate
  *****************************************************************/
-u32 get_sku_id(void)
+static u32 get_sku_id(void)
 {
 	struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
 	return readl(&id_base->sku_id) & SKUID_CLK_MASK;
 }
 
-/***************************************************************************
- *  get_gpmc0_base() - Return current address hardware will be
- *     fetching from. The below effectively gives what is correct, its a bit
- *   mis-leading compared to the TRM.  For the most general case the mask
- *   needs to be also taken into account this does work in practice.
- *   - for u-boot we currently map:
- *       -- 0 to nothing,
- *       -- 4 to flash
- *       -- 8 to enent
- *       -- c to wifi
- ****************************************************************************/
-u32 get_gpmc0_base(void)
-{
-	u32 b;
-
-	b = readl(&gpmc_cfg->cs[0].config7);
-	b &= 0x1F;		/* keep base [5:0] */
-	b = b << 24;		/* ret 0x0b000000 */
-	return b;
-}
-
-/*******************************************************************
- * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
- *******************************************************************/
-u32 get_gpmc0_width(void)
-{
-	return WIDTH_16BIT;
-}
-
 /*************************************************************************
  * get_board_rev() - setup to pass kernel board revision information
  * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)