4 files changed, 57 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index e14713c..a70d51b 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -27,7 +27,7 @@ endif
 obj-$(CONFIG_GPT_TIMER) += timer.o
 obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
 endif
-ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8))
+ifeq ($(SOC),$(filter $(SOC),mx7 mx6 mxs imx8m imx8 imxrt))
 obj-y	+= misc.o
 obj-$(CONFIG_SPL_BUILD)	+= spl.o
 endif
@@ -226,5 +226,6 @@ obj-$(CONFIG_MX7) += mx7/
 obj-$(CONFIG_ARCH_MX7ULP) += mx7ulp/
 obj-$(CONFIG_IMX8M) += imx8m/
 obj-$(CONFIG_ARCH_IMX8) += imx8/
+obj-$(CONFIG_ARCH_IMXRT) += imxrt/
 
 obj-$(CONFIG_SPL_BOOTROM_SUPPORT) += spl_imx_romapi.o
diff --git a/arch/arm/mach-imx/imxrt/Kconfig b/arch/arm/mach-imx/imxrt/Kconfig
new file mode 100644
index 0000000..96ad2e9
--- /dev/null
+++ b/arch/arm/mach-imx/imxrt/Kconfig
@@ -0,0 +1,13 @@
+if ARCH_IMXRT
+
+config IMXRT
+	bool
+
+config IMXRT1050
+	bool
+	select IMXRT
+
+config SYS_SOC
+	default "imxrt"
+
+endif
diff --git a/arch/arm/mach-imx/imxrt/Makefile b/arch/arm/mach-imx/imxrt/Makefile
new file mode 100644
index 0000000..9621a83
--- /dev/null
+++ b/arch/arm/mach-imx/imxrt/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2019
+# Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
+#
+
+obj-y	:= soc.o
diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c
new file mode 100644
index 0000000..e1eea23
--- /dev/null
+++ b/arch/arm/mach-imx/imxrt/soc.c
@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019
+ * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/armv7_mpu.h>
+
+int arch_cpu_init(void)
+{
+	int i;
+
+	struct mpu_region_config imxrt1050_region_config[] = {
+		{ 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
+		  STRONG_ORDER, REGION_4GB },
+		{ PHYS_SDRAM, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+		  O_I_WB_RD_WR_ALLOC, (ffs(PHYS_SDRAM_SIZE) - 2) },
+		{ DMAMEM_BASE,
+		  REGION_2, XN_DIS, PRIV_RW_USR_RW,
+		  STRONG_ORDER, (ffs(DMAMEM_SZ_ALL) - 2) },
+	};
+
+	/*
+	 * Configure the memory protection unit (MPU) to allow full access to
+	 * the whole 4GB address space.
+	 */
+	disable_mpu();
+	for (i = 0; i < ARRAY_SIZE(imxrt1050_region_config); i++)
+		mpu_config(&imxrt1050_region_config[i]);
+	enable_mpu();
+
+	return 0;
+}