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-rw-r--r--arch/arm/dts/Makefile4
-rw-r--r--arch/arm/dts/am335x-brxre1.dts371
-rw-r--r--arch/arm/dts/fsl-lx2160a-qds.dts17
-rw-r--r--arch/arm/dts/fsl-lx2160a-rdb.dts44
-rw-r--r--arch/arm/dts/fsl-lx2160a.dtsi63
-rw-r--r--arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi2
-rw-r--r--arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi6
-rw-r--r--arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi2
-rw-r--r--arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi2
-rw-r--r--arch/arm/dts/omap3-beagle-u-boot.dtsi14
-rw-r--r--arch/arm/dts/omap3-beagle-xm-ab-u-boot.dtsi14
-rw-r--r--arch/arm/dts/omap3-beagle-xm-u-boot.dtsi14
-rw-r--r--arch/arm/dts/omap3-evm-37xx-u-boot.dtsi14
-rw-r--r--arch/arm/dts/omap3-evm-u-boot.dtsi14
-rw-r--r--arch/arm/dts/omap3-u-boot.dtsi81
-rw-r--r--arch/arm/dts/tegra124-nyan-big-u-boot.dtsi2
-rw-r--r--arch/arm/dts/tegra124-nyan.dtsi1
17 files changed, 598 insertions, 67 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fbc0f8a..2a040b2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -246,7 +246,9 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
fsl-ls2081a-rdb.dtb \
fsl-ls2088a-rdb-qspi.dtb \
fsl-ls1088a-rdb.dtb \
- fsl-ls1088a-qds.dtb
+ fsl-ls1088a-qds.dtb \
+ fsl-lx2160a-rdb.dtb \
+ fsl-lx2160a-qds.dtb
dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb \
diff --git a/arch/arm/dts/am335x-brxre1.dts b/arch/arm/dts/am335x-brxre1.dts
new file mode 100644
index 0000000..708407d
--- /dev/null
+++ b/arch/arm/dts/am335x-brxre1.dts
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 B&R Industrial Automation GmbH
+ * http://www.br-automation.com
+ *
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+
+/ {
+ model = "BRXRE1 Panel";
+ compatible = "ti,am33xx";
+
+ fset: factory-settings {
+ bl-version = " ";
+ order-no = " ";
+ cpu-order-no = " ";
+ hw-revision = " ";
+ serial-no = <0>;
+ device-id = <0xE681>;
+ parent-id = <0xE681>;
+ hw-variant = <0x3>;
+ hw-platform = <0x0>;
+ fram-offset = <0x1000>;
+ fram-size = <0x3000>;
+ cache-disable = <0x0>;
+ cpu-clock = <0x0>;
+ };
+ chosen {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ bootargs = "console=ttyO0,115200 earlyprintk";
+ stdout-path = &uart0;
+
+ framebuffer: framebuffer@8fbe0000 {
+ display = <&lcdscreen0>;
+ compatible = "simple-framebuffer";
+ status = "okay";
+ reg = <0x8fbef000 (1024 * 600 * 4)>;
+ width = <1024>;
+ height = <600>;
+ stride = <(1024 * 4)>;
+ format = "a8r8g8b8";
+ clocks = <&dpll_disp_m2_ck>, <&dpll_per_m2_ck>;
+ };
+ };
+
+ aliases {
+ fset = &fset;
+ mmc = &mmc2;
+ spi0 = &spi0;
+ spi1 = &spi1;
+ touch0 = &burtouch0;
+ screen0 = &lcdscreen0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
+ panel {
+ compatible = "ti,tilcdc,panel";
+ status = "okay";
+ };
+
+ vmmcsd_fixed: fixedregulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmcsd_fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ lcdscreen0: lcdscreen@0 {
+ status = "okay";
+ compatible = "ti,tilcdc,panel";
+
+ backlight = <&tps_bl>;
+
+ panel-info {
+ ac-bias = <255>;
+ ac-bias-intrpt = <0>;
+ dma-burst-sz = <16>;
+ bpp = <32>;
+ fdd = <0x80>;
+ sync-edge = <0>;
+ sync-ctrl = <1>;
+ raster-order = <0>;
+ fifo-th = <0>;
+ };
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: lcd {
+ clock-frequency = <9142857>;
+ hactive = <480>;
+ vactive = <272>;
+ hfront-porch = <8>;
+ hback-porch = <43>;
+ hsync-len = <2>;
+ vfront-porch = <4>;
+ vback-porch = <2>;
+ vsync-len = <10>;
+ hsync-active = <1>;
+ vsync-active = <1>;
+ pupdelay = <10>;
+ pondelay = <10>;
+ };
+ };
+ };
+};
+
+&uart0 { /* console uart */
+ u-boot,dm-spl;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
+
+&uart3 {
+ status = "okay";
+};
+
+&uart4 {
+ status = "okay";
+};
+
+&i2c0 {
+ u-boot,dm-spl;
+ status = "okay";
+ clock-frequency = <100000>;
+
+ tps: tps@24 { /* PMIC controller */
+ u-boot,dm-spl;
+ reg = <0x24>;
+ compatible = "ti,tps65217";
+
+ tps_bl: backlight {
+ compatible = "ti,tps65217-bl";
+ isel = <1>; /* 1 - ISET1, 2 ISET2 */
+ fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */
+ default-brightness = <50>;
+ };
+ };
+ resetc: rstpsc@75 { /* reset controller */
+ compatible = "bur,rstpsc";
+ reg = <0x75>;
+
+ cooling-min-state = <0>;
+ cooling-max-state = <1>; /* reset gets fired */
+ #cooling-cells = <2>; /* min followed by max */
+ };
+ rtc0: rv3029c2@56 {
+ status = "okay";
+ #thermal-sensor-cells = <0>;
+ compatible = "rv3029c2";
+ reg = <0x56>;
+ };
+};
+
+&spi0 {
+ status = "okay";
+};
+
+&spi1 {
+ status = "okay";
+};
+
+&edma {
+ status = "okay";
+};
+
+&cppi41dma {
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_ctrl_mod {
+ status = "okay";
+};
+
+&usb0_phy {
+ status = "okay";
+};
+
+&usb1_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&usb1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&davinci_mdio {
+ status = "okay";
+};
+
+&mac {
+ status = "okay";
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <1>;
+ phy-mode = "mii";
+};
+
+&cpsw_emac1 {
+ phy_id = <&davinci_mdio>, <2>;
+ phy-mode = "mii";
+};
+
+&mmc1 {
+ u-boot,dm-pre-reloc;
+ vmmc-supply = <&vmmcsd_fixed>;
+ bus-width = <0x4>;
+ ti,non-removable;
+ ti,needs-special-hs-handling;
+ ti,vcc-aux-disable-is-sleep;
+ status = "okay";
+};
+
+&mmc2 {
+ u-boot,dm-pre-reloc;
+ vmmc-supply = <&vmmcsd_fixed>;
+ bus-width = <0x8>;
+ ti,non-removable;
+ ti,needs-special-hs-handling;
+ ti,vcc-aux-disable-is-sleep;
+ status = "okay";
+};
+
+&lcdc {
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&elm {
+ status = "okay";
+};
+
+&sham {
+ status = "okay";
+};
+
+&aes {
+ status = "okay";
+};
+
+&gpio0 {
+ u-boot,dm-spl;
+ ti,no-reset-on-init;
+};
+
+&gpio1 {
+ u-boot,dm-spl;
+ ti,no-reset-on-init;
+};
+
+&gpio2 {
+ u-boot,dm-spl;
+ ti,no-reset-on-init;
+};
+
+&gpio3 {
+ u-boot,dm-spl;
+ ti,no-reset-on-init;
+};
+
+&timer1 { /* today unused */
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&timer2 { /* used for vxworks primary timer device */
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&timer3 { /* used sysdelay and hal tsc counter*/
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&timer4 { /* used for PWM beeper */
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&timer5 { /* used for PWM backlight */
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&timer6 { /* used for cpsw end device */
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&timer7 { /* used for cpsw end device */
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&wdt2 {
+ status = "okay";
+ ti,no-reset-on-init;
+ ti,no-idle-on-init;
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&tscadc {
+ status = "okay";
+
+ tsc {
+ burtouch0: burtouch@0 {
+ status = "okay";
+ compatible = "bur,DdVxSfTouchXXX";
+ bur,hwtree = "IF7";
+ bur,KX0 = <0x0>;
+ bur,KX1 = <0x0>;
+ bur,KX2 = <0x0>;
+ bur,KY0 = <0x0>;
+ bur,KY1 = <0x0>;
+ bur,KY2 = <0x0>;
+ };
+ };
+};
+
+&dcan0 {
+ status = "okay";
+};
+
+&dcan1 {
+ status = "okay";
+};
+
+&sham {
+ status = "disabled";
+};
+
+&aes {
+ status = "disabled";
+};
+
+&rng {
+ status = "disabled";
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dts b/arch/arm/dts/fsl-lx2160a-qds.dts
new file mode 100644
index 0000000..6192156
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source
+ *
+ * Copyright 2018-2019 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "NXP Layerscape LX2160AQDS Board";
+ compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+};
+
diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
new file mode 100644
index 0000000..4b52644
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160ARDB device tree source
+ *
+ * Author: Priyanka Jain <priyanka.jain@nxp.com>
+ * Sriram Dash <sriram.dash@nxp.com>
+ *
+ * Copyright 2018 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "NXP Layerscape LX2160ARDB Board";
+ compatible = "fsl,lx2160ardb", "fsl,lx2160a";
+
+};
+
+&esdhc0 {
+ status = "okay";
+};
+
+&esdhc1 {
+ status = "okay";
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index b407dc6..510b070 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -89,7 +89,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x2110000 0x0 0x10000>;
- interrupts = <0 240 0x4>; /* Level high type */
+ interrupts = <0 26 0x4>; /* Level high type */
num-cs = <6>;
};
@@ -115,4 +115,65 @@
interrupts = <0 81 0x4>; /* Level high type */
dr_mode = "host";
};
+
+ esdhc0: esdhc@2140000 {
+ compatible = "fsl,esdhc";
+ reg = <0x0 0x2140000 0x0 0x10000>;
+ interrupts = <0 28 0x4>; /* Level high type */
+ clocks = <&clockgen 4 1>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ little-endian;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
+ esdhc1: esdhc@2150000 {
+ compatible = "fsl,esdhc";
+ reg = <0x0 0x2150000 0x0 0x10000>;
+ interrupts = <0 63 0x4>; /* Level high type */
+ clocks = <&clockgen 4 1>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ non-removable;
+ little-endian;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
+ sata0: sata@3200000 {
+ compatible = "fsl,ls2080a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>;
+ interrupts = <0 133 4>;
+ clocks = <&clockgen 4 3>;
+ status = "disabled";
+
+ };
+
+ sata1: sata@3210000 {
+ compatible = "fsl,ls2080a-ahci";
+ reg = <0x0 0x3210000 0x0 0x10000>;
+ interrupts = <0 136 4>;
+ clocks = <&clockgen 4 3>;
+ status = "disabled";
+
+ };
+
+ sata2: sata@3220000 {
+ compatible = "fsl,ls2080a-ahci";
+ reg = <0x0 0x3220000 0x0 0x10000>;
+ interrupts = <0 97 4>;
+ clocks = <&clockgen 4 3>;
+ status = "disabled";
+
+ };
+
+ sata3: sata@3230000 {
+ compatible = "fsl,ls2080a-ahci";
+ reg = <0x0 0x3230000 0x0 0x10000>;
+ interrupts = <0 100 4>;
+ clocks = <&clockgen 4 3>;
+ status = "disabled";
+
+ };
};
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
index 6445048..b3da8b1 100644
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
@@ -4,6 +4,8 @@
* Logic PD - http://www.logicpd.com
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart1;
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
index 6445048..956199a 100644
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
@@ -4,6 +4,8 @@
* Logic PD - http://www.logicpd.com
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart1;
@@ -18,10 +20,6 @@
clock-frequency = <400000>;
};
-&mmc1 {
- cd-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* gpio_110 */
-};
-
&mmc2 {
status = "disabled";
};
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
index 41ed5d7..2c599f1 100644
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
@@ -4,6 +4,8 @@
* Logic PD - http://www.logicpd.com
*/
+#include "omap3-u-boot.dtsi"
+
&i2c1 {
clock-frequency = <400000>;
};
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
index 41ed5d7..2c599f1 100644
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
@@ -4,6 +4,8 @@
* Logic PD - http://www.logicpd.com
*/
+#include "omap3-u-boot.dtsi"
+
&i2c1 {
clock-frequency = <400000>;
};
diff --git a/arch/arm/dts/omap3-beagle-u-boot.dtsi b/arch/arm/dts/omap3-beagle-u-boot.dtsi
index 41beaf0..2c03701 100644
--- a/arch/arm/dts/omap3-beagle-u-boot.dtsi
+++ b/arch/arm/dts/omap3-beagle-u-boot.dtsi
@@ -5,20 +5,10 @@
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart3;
};
};
-
-&uart1 {
- reg-shift = <2>;
-};
-
-&uart2 {
- reg-shift = <2>;
-};
-
-&uart3 {
- reg-shift = <2>;
-};
diff --git a/arch/arm/dts/omap3-beagle-xm-ab-u-boot.dtsi b/arch/arm/dts/omap3-beagle-xm-ab-u-boot.dtsi
index 41beaf0..2c03701 100644
--- a/arch/arm/dts/omap3-beagle-xm-ab-u-boot.dtsi
+++ b/arch/arm/dts/omap3-beagle-xm-ab-u-boot.dtsi
@@ -5,20 +5,10 @@
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart3;
};
};
-
-&uart1 {
- reg-shift = <2>;
-};
-
-&uart2 {
- reg-shift = <2>;
-};
-
-&uart3 {
- reg-shift = <2>;
-};
diff --git a/arch/arm/dts/omap3-beagle-xm-u-boot.dtsi b/arch/arm/dts/omap3-beagle-xm-u-boot.dtsi
index 41beaf0..2c03701 100644
--- a/arch/arm/dts/omap3-beagle-xm-u-boot.dtsi
+++ b/arch/arm/dts/omap3-beagle-xm-u-boot.dtsi
@@ -5,20 +5,10 @@
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart3;
};
};
-
-&uart1 {
- reg-shift = <2>;
-};
-
-&uart2 {
- reg-shift = <2>;
-};
-
-&uart3 {
- reg-shift = <2>;
-};
diff --git a/arch/arm/dts/omap3-evm-37xx-u-boot.dtsi b/arch/arm/dts/omap3-evm-37xx-u-boot.dtsi
index de41131..b9e433f 100644
--- a/arch/arm/dts/omap3-evm-37xx-u-boot.dtsi
+++ b/arch/arm/dts/omap3-evm-37xx-u-boot.dtsi
@@ -5,20 +5,10 @@
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart1;
};
};
-
-&uart1 {
- reg-shift = <2>;
-};
-
-&uart2 {
- reg-shift = <2>;
-};
-
-&uart3 {
- reg-shift = <2>;
-};
diff --git a/arch/arm/dts/omap3-evm-u-boot.dtsi b/arch/arm/dts/omap3-evm-u-boot.dtsi
index de41131..b9e433f 100644
--- a/arch/arm/dts/omap3-evm-u-boot.dtsi
+++ b/arch/arm/dts/omap3-evm-u-boot.dtsi
@@ -5,20 +5,10 @@
* (C) Copyright 2017 Derald D. Woods <woods.technical@gmail.com>
*/
+#include "omap3-u-boot.dtsi"
+
/ {
chosen {
stdout-path = &uart1;
};
};
-
-&uart1 {
- reg-shift = <2>;
-};
-
-&uart2 {
- reg-shift = <2>;
-};
-
-&uart3 {
- reg-shift = <2>;
-};
diff --git a/arch/arm/dts/omap3-u-boot.dtsi b/arch/arm/dts/omap3-u-boot.dtsi
new file mode 100644
index 0000000..32bea6b
--- /dev/null
+++ b/arch/arm/dts/omap3-u-boot.dtsi
@@ -0,0 +1,81 @@
+/*
+ * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ * Based on "omap5-u-boot.dtsi"
+ */
+
+/{
+ ocp@68000000 {
+ u-boot,dm-spl;
+
+ bandgap@48002524 {
+ u-boot,dm-spl;
+ };
+ };
+};
+
+&uart1 {
+ u-boot,dm-spl;
+ reg-shift = <2>;
+};
+
+&uart2 {
+ u-boot,dm-spl;
+ reg-shift = <2>;
+};
+
+&uart3 {
+ u-boot,dm-spl;
+ reg-shift = <2>;
+};
+
+&mmc1 {
+ u-boot,dm-spl;
+};
+
+&mmc2 {
+ u-boot,dm-spl;
+};
+
+&l4_core {
+ u-boot,dm-spl;
+};
+
+&scm {
+ u-boot,dm-spl;
+};
+
+&scm_conf {
+ u-boot,dm-spl;
+};
+
+&gpio1 {
+ u-boot,dm-spl;
+};
+
+&gpio2 {
+ u-boot,dm-spl;
+};
+
+&gpio3 {
+ u-boot,dm-spl;
+};
+
+&gpio4 {
+ u-boot,dm-spl;
+};
+
+&gpio5 {
+ u-boot,dm-spl;
+};
+
+&gpio6 {
+ u-boot,dm-spl;
+};
+
+&i2c1 {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi
index 3ff2f67..ddfeba8 100644
--- a/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi
+++ b/arch/arm/dts/tegra124-nyan-big-u-boot.dtsi
@@ -15,7 +15,7 @@
};
spi@7000d400 {
- spi-deactivate-delay = <200>;
+ spi-deactivate-delay = <500>;
spi-max-frequency = <3000000>;
cros_ec: cros-ec@0 {
diff --git a/arch/arm/dts/tegra124-nyan.dtsi b/arch/arm/dts/tegra124-nyan.dtsi
index 51895e4..2b28fe1 100644
--- a/arch/arm/dts/tegra124-nyan.dtsi
+++ b/arch/arm/dts/tegra124-nyan.dtsi
@@ -414,6 +414,7 @@
usb@7d000000 { /* Rear external USB port. */
status = "okay";
+ dr_mode = "otg";
nvidia,vbus-gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
};
generated by cgit v1.1 at 2024-07-14 14:44:28 +0000