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Diffstat (limited to 'arch/arm/dts/zynqmp-zcu102-revA.dts')
-rw-r--r--arch/arm/dts/zynqmp-zcu102-revA.dts15
1 files changed, 3 insertions, 12 deletions
diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts
index ec61b70..c1af5fc 100644
--- a/arch/arm/dts/zynqmp-zcu102-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revA.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU102 RevA
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@ -22,10 +22,10 @@
aliases {
ethernet0 = &gem3;
- gpio0 = &gpio;
i2c0 = &i2c0;
i2c1 = &i2c1;
mmc0 = &sdhci1;
+ nvmem0 = &eeprom;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &uart1;
@@ -37,7 +37,6 @@
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
- xlnx,eeprom = &eeprom;
};
memory@0 {
@@ -605,15 +604,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
- si5328: clock-generator@69 {/* SI5328 - u20 */
- compatible = "silabs,si5328";
- reg = <0x69>;
- /*
- * Chip has interrupt present connected to PL
- * interrupt-parent = <&>;
- * interrupts = <>;
- */
- };
+ /* SI5328 - u20 */
};
/* 5 - 7 unconnected */
};