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Diffstat (limited to 'arch/arm/dts/zynq-cse-nor.dts')
-rw-r--r--arch/arm/dts/zynq-cse-nor.dts27
1 files changed, 17 insertions, 10 deletions
diff --git a/arch/arm/dts/zynq-cse-nor.dts b/arch/arm/dts/zynq-cse-nor.dts
index 9710aba..197fbd7 100644
--- a/arch/arm/dts/zynq-cse-nor.dts
+++ b/arch/arm/dts/zynq-cse-nor.dts
@@ -5,7 +5,6 @@
* Copyright (C) 2018 Xilinx, Inc.
*/
/dts-v1/;
-#include "zynq-7000.dtsi"
/ {
#address-cells = <1>;
@@ -33,27 +32,21 @@
};
amba: amba {
+ u-boot,dm-pre-reloc;
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- interrupt-parent = <&intc>;
ranges;
- intc: interrupt-controller@f8f01000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
- interrupt-controller;
- reg = <0xF8F01000 0x1000>,
- <0xF8F00100 0x100>;
- };
-
slcr: slcr@f8000000 {
+ u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "xlnx,zynq-slcr", "syscon", "simple-bus";
reg = <0xF8000000 0x1000>;
ranges;
clkc: clkc@100 {
+ u-boot,dm-pre-reloc;
#clock-cells = <1>;
compatible = "xlnx,ps7-clkc";
clock-output-names = "armpll", "ddrpll",
@@ -78,6 +71,20 @@
reg = <0x100 0x100>;
};
};
+
+ /*
+ * This is partially hack because it is normally subnode of smcc
+ * but for mini U-Boot there is no reason to enable SMCC driver
+ * which does almost nothing in NOR flash configuration that's
+ * why place cfi-flash directly here.
+ */
+ flash@e2000000 {
+ u-boot,dm-pre-reloc;
+ compatible = "cfi-flash";
+ reg = <0xe2000000 0x2000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
};
};