diff options
Diffstat (limited to 'arch/arm/dts/at91-sama5d2_icp.dts')
-rw-r--r-- | arch/arm/dts/at91-sama5d2_icp.dts | 134 |
1 files changed, 66 insertions, 68 deletions
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts b/arch/arm/dts/at91-sama5d2_icp.dts index 0b0db1b..2dffae9 100644 --- a/arch/arm/dts/at91-sama5d2_icp.dts +++ b/arch/arm/dts/at91-sama5d2_icp.dts @@ -86,75 +86,73 @@ }; }; - pioA: gpio@fc038000 { + pioA: pinctrl@fc038000 { status = "okay"; - pinctrl { - pinctrl_i2c1_default: i2c1_default { - pinmux = <PIN_PD19__TWD1>, - <PIN_PD20__TWCK1>; - bias-disable; - }; - - pinctrl_macb0_rmii: macb0_rmii { - pinmux = <PIN_PD1__GRXCK>, - <PIN_PD2__GTXER>, - <PIN_PD5__GRX2>, - <PIN_PD6__GRX3>, - <PIN_PD7__GTX2>, - <PIN_PD8__GTX3>, - <PIN_PD9__GTXCK>, - <PIN_PD10__GTXEN>, - <PIN_PD11__GRXDV>, - <PIN_PD12__GRXER>, - <PIN_PD13__GRX0>, - <PIN_PD14__GRX1>, - <PIN_PD15__GTX0>, - <PIN_PD16__GTX1>, - <PIN_PD17__GMDC>, - <PIN_PD18__GMDIO>; - bias-disable; - }; - - pinctrl_macb0_phy_irq: macb0_phy_irq { - pinmux = <PIN_PD3__GPIO>; - bias-disable; - }; - - pinctrl_macb0_rst: macb0_sw_rst { - pinmux = <PIN_PD4__GPIO>; - bias-pull-up; - }; - - pinctrl_mikrobus1_uart: mikrobus1_uart { - pinmux = <PIN_PB26__URXD0>, - <PIN_PB27__UTXD0>; - bias-disable; - }; - - pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { - pinmux = <PIN_PA6__QSPI1_SCK>, - <PIN_PA11__QSPI1_CS>; - bias-disable; - }; - - pinctrl_qspi1_dat_default: qspi1_dat_default { - pinmux = <PIN_PA7__QSPI1_IO0>, - <PIN_PA8__QSPI1_IO1>, - <PIN_PA9__QSPI1_IO2>, - <PIN_PA10__QSPI1_IO3>; - bias-pull-up; - }; - - pinctrl_sdmmc0_default: sdmmc0_default { - pinmux = <PIN_PA1__SDMMC0_CMD>, - <PIN_PA2__SDMMC0_DAT0>, - <PIN_PA3__SDMMC0_DAT1>, - <PIN_PA4__SDMMC0_DAT2>, - <PIN_PA5__SDMMC0_DAT3>, - <PIN_PA0__SDMMC0_CK>, - <PIN_PA13__SDMMC0_CD>; - bias-disable; - }; + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PD19__TWD1>, + <PIN_PD20__TWCK1>; + bias-disable; + }; + + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PD1__GRXCK>, + <PIN_PD2__GTXER>, + <PIN_PD5__GRX2>, + <PIN_PD6__GRX3>, + <PIN_PD7__GTX2>, + <PIN_PD8__GTX3>, + <PIN_PD9__GTXCK>, + <PIN_PD10__GTXEN>, + <PIN_PD11__GRXDV>, + <PIN_PD12__GRXER>, + <PIN_PD13__GRX0>, + <PIN_PD14__GRX1>, + <PIN_PD15__GTX0>, + <PIN_PD16__GTX1>, + <PIN_PD17__GMDC>, + <PIN_PD18__GMDIO>; + bias-disable; + }; + + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PD3__GPIO>; + bias-disable; + }; + + pinctrl_macb0_rst: macb0_sw_rst { + pinmux = <PIN_PD4__GPIO>; + bias-pull-up; + }; + + pinctrl_mikrobus1_uart: mikrobus1_uart { + pinmux = <PIN_PB26__URXD0>, + <PIN_PB27__UTXD0>; + bias-disable; + }; + + pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default { + pinmux = <PIN_PA6__QSPI1_SCK>, + <PIN_PA11__QSPI1_CS>; + bias-disable; + }; + + pinctrl_qspi1_dat_default: qspi1_dat_default { + pinmux = <PIN_PA7__QSPI1_IO0>, + <PIN_PA8__QSPI1_IO1>, + <PIN_PA9__QSPI1_IO2>, + <PIN_PA10__QSPI1_IO3>; + bias-pull-up; + }; + + pinctrl_sdmmc0_default: sdmmc0_default { + pinmux = <PIN_PA1__SDMMC0_CMD>, + <PIN_PA2__SDMMC0_DAT0>, + <PIN_PA3__SDMMC0_DAT1>, + <PIN_PA4__SDMMC0_DAT2>, + <PIN_PA5__SDMMC0_DAT3>, + <PIN_PA0__SDMMC0_CK>, + <PIN_PA13__SDMMC0_CD>; + bias-disable; }; }; }; |