diff options
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape')
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 4 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 11 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/spl.c | 3 |
3 files changed, 7 insertions, 11 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 2ded3e4..177f568 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -8,7 +8,6 @@ #include <clock_legacy.h> #include <cpu_func.h> #include <env.h> -#include <fsl_ddr_sdram.h> #include <init.h> #include <hang.h> #include <log.h> @@ -36,6 +35,7 @@ #endif #include <asm/armv8/sec_firmware.h> #ifdef CONFIG_SYS_FSL_DDR +#include <fsl_ddr_sdram.h> #include <fsl_ddr.h> #endif #include <asm/arch/clock.h> @@ -1632,12 +1632,14 @@ void update_early_mmu_table(void) __weak int dram_init(void) { +#ifdef CONFIG_SYS_FSL_DDR fsl_initdram(); #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \ defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); #endif +#endif return 0; } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 3aa1a9c..2fb4e40 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -74,15 +74,6 @@ ENDPROC(smp_kick_all_cpus) ENTRY(lowlevel_init) mov x29, lr /* Save LR */ - /* unmask SError and abort */ - msr daifclr, #4 - - /* Set HCR_EL2[AMO] so SError @EL2 is taken */ - mrs x0, hcr_el2 - orr x0, x0, #0x20 /* AMO */ - msr hcr_el2, x0 - isb - switch_el x1, 1f, 100f, 100f /* skip if not in EL3 */ 1: @@ -209,7 +200,7 @@ ENTRY(lowlevel_init) #endif 100: - branch_if_master x0, x1, 2f + branch_if_master x0, 2f #if defined(CONFIG_MP) && defined(CONFIG_ARMV8_MULTIENTRY) /* diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 564cc27..5f09ef0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -12,6 +12,7 @@ #include <image.h> #include <init.h> #include <log.h> +#include <semihosting.h> #include <spl.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -27,6 +28,8 @@ DECLARE_GLOBAL_DATA_PTR; u32 spl_boot_device(void) { + if (semihosting_enabled()) + return BOOT_DEVICE_SMH; #ifdef CONFIG_SPL_MMC return BOOT_DEVICE_MMC1; #endif |