diff options
498 files changed, 25559 insertions, 8722 deletions
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 0c43434..967abed 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found at: # https://gitlab.denx.de/u-boot/gitlab-ci-runner -image: trini/u-boot-gitlab-ci-runner:xenial-20190720-02Aug2019 +image: trini/u-boot-gitlab-ci-runner:bionic-20190912.1-03Oct2019 # We run some tests in different order, to catch some failures quicker. stages: @@ -22,8 +22,9 @@ stages: - . /tmp/venv/bin/activate - pip install pytest==2.8.7 - pip install python-subunit - - grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - - grub-mkimage -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd + - pip install coverage + - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd + - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - mkdir ~/grub2-arm - ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di ) - mkdir ~/grub2-arm64 @@ -36,9 +37,9 @@ stages: # use clang only do one configuration. - if [[ "${BUILDMAN}" != "" ]]; then ret=0; - tools/buildman/buildman -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?; + tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?; if [[ $ret -ne 0 && $ret -ne 129 ]]; then - tools/buildman/buildman -sdeP ${BUILDMAN}; + tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN}; exit $ret; fi; fi @@ -46,7 +47,7 @@ stages: # never prevent any test from running. That way, we can always pass # "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom # value. - - export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD}; + - export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD}; export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin; export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci; if [[ "${TEST_PY_BD}" != "" ]]; then @@ -64,9 +65,9 @@ build all 32bit ARM platforms: stage: world build script: - ret=0; - ./tools/buildman/buildman -P -E arm -x aarch64 || ret=$?; + ./tools/buildman/buildman -o /tmp -P -E arm -x aarch64 || ret=$?; if [[ $ret -ne 0 && $ret -ne 129 ]]; then - ./tools/buildman/buildman -sdeP; + ./tools/buildman/buildman -o /tmp -sdeP; exit $ret; fi; @@ -78,9 +79,9 @@ build all 64bit ARM platforms: - . /tmp/venv/bin/activate - pip install pyelftools - ret=0; - ./tools/buildman/buildman -P -E aarch64 || ret=$?; + ./tools/buildman/buildman -o /tmp -P -E aarch64 || ret=$?; if [[ $ret -ne 0 && $ret -ne 129 ]]; then - ./tools/buildman/buildman -sdeP; + ./tools/buildman/buildman -o /tmp -sdeP; exit $ret; fi; @@ -89,9 +90,9 @@ build all PowerPC platforms: stage: world build script: - ret=0; - ./tools/buildman/buildman -P -E powerpc || ret=$?; + ./tools/buildman/buildman -o /tmp -P -E powerpc || ret=$?; if [[ $ret -ne 0 && $ret -ne 129 ]]; then - ./tools/buildman/buildman -sdeP; + ./tools/buildman/buildman -o /tmp -sdeP; exit $ret; fi; @@ -100,9 +101,9 @@ build all other platforms: stage: world build script: - ret=0; - ./tools/buildman/buildman -P -E -x arm,powerpc || ret=$?; + ./tools/buildman/buildman -o /tmp -P -E -x arm,powerpc || ret=$?; if [[ $ret -ne 0 && $ret -ne 129 ]]; then - ./tools/buildman/buildman -sdeP; + ./tools/buildman/buildman -o /tmp -sdeP; exit $ret; fi; @@ -162,10 +163,10 @@ Run binman, buildman, dtoc and patman testsuites: virtualenv /tmp/venv; . /tmp/venv/bin/activate; pip install pyelftools; - export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/sandbox_spl; + export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl; export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"; export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"; - ./tools/buildman/buildman -P sandbox_spl; + ./tools/buildman/buildman -o /tmp -P sandbox_spl; ./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test; ./tools/buildman/buildman -t; ./tools/dtoc/dtoc -t; diff --git a/.travis.yml b/.travis.yml index 0ce09e3..caad1ee 100644 --- a/.travis.yml +++ b/.travis.yml @@ -4,7 +4,7 @@ # build U-Boot on Travis CI - https://travis-ci.org/ sudo: required -dist: xenial +dist: bionic language: c @@ -12,7 +12,7 @@ addons: apt: sources: - ubuntu-toolchain-r-test - - llvm-toolchain-xenial-7 + - llvm-toolchain-bionic-7 packages: - cppcheck - sloccount @@ -52,12 +52,13 @@ install: - pip install pytest==2.8.7 - pip install python-subunit - pip install pyelftools - - grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - - grub-mkimage -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd + - grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd + - grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd - mkdir ~/grub2-arm - ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di ) - mkdir ~/grub2-arm64 - ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di ) + - wget http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb && sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb env: global: @@ -179,6 +180,9 @@ matrix: - name: "buildman boundary engicam toradex" env: - BUILDMAN="boundary engicam toradex" + - name: "buildman bcm" + env: + - BUILDMAN="bcm" - name: "buildman NXP ARM32" env: - BUILDMAN="freescale -x powerpc,m68k,aarch64" @@ -206,9 +210,9 @@ matrix: - name: "buildman i.MX (non-NXP,i.MX6,toradex)" env: - BUILDMAN="mx -x freescale,mx6,toradex" - - name: "buildman k2" + - name: "buildman keystone 2/3" env: - - BUILDMAN="k2" + - BUILDMAN="k2 k3" - name: "buildman samsung socfpga" env: - BUILDMAN="samsung socfpga" @@ -238,7 +242,7 @@ matrix: - BUILDMAN="sun50i" - name: "buildman catch-all ARM" env: - - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx" + - BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,bcm,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,k3,xilinx" - name: "buildman sandbox x86" env: - BUILDMAN="sandbox x86" @@ -309,7 +313,7 @@ matrix: - BUILDMAN="uniphier" - name: "buildman catch-all AArch64" env: - - BUILDMAN="aarch64 -x tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" + - BUILDMAN="aarch64 -x bcm,k3,tegra,ls1,ls2,mvebu,uniphier,sunxi,samsung,rockchip,xilinx" - name: "buildman rockchip" env: - BUILDMAN="rockchip" @@ -256,6 +256,7 @@ config BUILD_TARGET ARCH_SUNXI || RISCV) default "u-boot.kwb" if KIRKWOOD default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT + default "u-boot-with-spl.imx" if ARCH_MX6 && SPL help Some SoCs need special image types (e.g. U-Boot binary with a special header) as build targets. By defining @@ -337,14 +337,18 @@ endif # KBUILD_MODULES := 1 #endif +# Check ths size of a binary: +# Args: +# $1: File to check +# #2: Size limit in bytes (decimal or 0xhex) define size_check actual=$$( wc -c $1 | awk '{print $$1}'); \ limit=$$( printf "%d" $2 ); \ if test $$actual -gt $$limit; then \ echo "$1 exceeds file size limit:" >&2; \ - echo " limit: $$limit bytes" >&2; \ - echo " actual: $$actual bytes" >&2; \ - echo " excess: $$((actual - limit)) bytes" >&2; \ + echo " limit: $$(printf %#x bytes $$limit) bytes" >&2; \ + echo " actual: $$(printf %#x $$actual) bytes" >&2; \ + echo " excess: $$(printf %#x $$((actual - limit))) bytes" >&2;\ exit 1; \ fi endef @@ -830,10 +834,10 @@ ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl endif endif ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin -ifeq ($(CONFIG_MX6)$(CONFIG_SECURE_BOOT), yy) +ifeq ($(CONFIG_MX6)$(CONFIG_IMX_HAB), yy) ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img else -ifeq ($(CONFIG_MX7)$(CONFIG_SECURE_BOOT), yy) +ifeq ($(CONFIG_MX7)$(CONFIG_IMX_HAB), yy) ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot-ivt.img else ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img @@ -1213,7 +1217,9 @@ u-boot.ldr: u-boot # Use 'make BINMAN_DEBUG=1' to enable debugging quiet_cmd_binman = BINMAN $@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ - build -u -d u-boot.dtb -O . -m \ + --toolpath $(objtree)/tools \ + $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ + build -u -d u-boot.dtb -O . -m \ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ $(BINMAN_$(@F)) @@ -1365,9 +1371,17 @@ SPL: spl/u-boot-spl.bin FORCE $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ ifeq ($(CONFIG_ARCH_IMX8M)$(CONFIG_ARCH_IMX8), y) +ifeq ($(CONFIG_SPL_LOAD_IMX_CONTAINER), y) +u-boot.cnt: u-boot.bin FORCE + $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ + +flash.bin: spl/u-boot-spl.bin u-boot.cnt FORCE + $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ +else flash.bin: spl/u-boot-spl.bin u-boot.itb FORCE $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ endif +endif u-boot-with-spl.imx u-boot-with-nand-spl.imx: SPL u-boot.bin FORCE $(Q)$(MAKE) $(build)=arch/arm/mach-imx $@ diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 90bcc8d..c5027c1 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -828,7 +828,7 @@ config ARCH_MX7 select ARCH_MISC_INIT select BOARD_EARLY_INIT_F select CPU_V7A - select SYS_FSL_HAS_SEC if SECURE_BOOT + select SYS_FSL_HAS_SEC if IMX_HAB select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE imply MXC_GPIO @@ -836,7 +836,7 @@ config ARCH_MX7 config ARCH_MX6 bool "Freescale MX6" select CPU_V7A - select SYS_FSL_HAS_SEC if SECURE_BOOT + select SYS_FSL_HAS_SEC if IMX_HAB select SYS_FSL_SEC_COMPAT_4 select SYS_FSL_SEC_LE select SYS_THUMB_BUILD if SPL @@ -970,7 +970,7 @@ config ARCH_SUNXI select USB if DISTRO_DEFAULTS select USB_KEYBOARD if DISTRO_DEFAULTS select USB_STORAGE if DISTRO_DEFAULTS - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM imply CMD_GPT imply CMD_UBI if NAND diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile index fdb0c92..b051025 100644 --- a/arch/arm/cpu/arm926ejs/Makefile +++ b/arch/arm/cpu/arm926ejs/Makefile @@ -7,7 +7,7 @@ extra-y = start.o obj-y = cpu.o cache.o ifdef CONFIG_SPL_BUILD -ifdef CONFIG_SPL_NO_CPU_SUPPORT_CODE +ifdef CONFIG_SPL_NO_CPU_SUPPORT extra-y := endif endif diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c index fc332fb..a919a45 100644 --- a/arch/arm/cpu/arm926ejs/spear/spl.c +++ b/arch/arm/cpu/arm926ejs/spear/spl.c @@ -277,7 +277,8 @@ void board_init_f(ulong dummy) * BootROM code right after having initialized a few components like the DRAM). * The following function is called from SPL common code (board_init_r). */ -void board_return_to_bootrom(void) +int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) { /* * Retrieve the BootROM's stack pointer and jump back to the start of @@ -294,4 +295,6 @@ void board_return_to_bootrom(void) "bl back_to_bootrom;" #endif ); + + return 0; } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch2 b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch2 index 9583bf7..d7f7b9f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch2 +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch2 @@ -16,6 +16,5 @@ You can enable it by setting CONFIG_IMX_WATCHDOG. Use following config to set watchdog timeout, if this config is not defined, the default timeout value is 128s which is the maximum. Set 10 seconds for example: - #define CONFIG_WATCHDOG_TIMEOUT_MSECS 10000 Set CONFIG_WATCHDOG_RESET_DISABLE to disable reset watchdog, so that the watchdog will not be fed in u-boot. diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 2d95a99..727da1a 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -556,33 +556,44 @@ dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \ imx53-kp.dtb \ imx53-m53menlo.dtb -dtb-$(CONFIG_MX6Q) += \ - imx6-apalis.dtb \ - imx6q-display5.dtb \ - imx6q-logicpd.dtb \ - imx6q-novena.dtb \ - imx6q-tbs2910.dtb - -dtb-$(CONFIG_MX6QDL) += \ +ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),) +dtb-y += \ imx6dl-dhcom-pdk2.dtb \ imx6dl-icore.dtb \ imx6dl-icore-mipi.dtb \ imx6dl-icore-rqs.dtb \ imx6dl-mamoj.dtb \ + imx6dl-nitrogen6x.dtb \ + imx6dl-pico.dtb \ imx6dl-sabreauto.dtb \ imx6dl-sabresd.dtb \ imx6dl-wandboard-revb1.dtb \ + +endif + +ifneq ($(CONFIG_MX6Q)$(CONFIG_MX6QDL),) +dtb-y += \ + imx6-apalis.dtb \ imx6q-cm-fx6.dtb \ imx6q-dhcom-pdk2.dtb \ + imx6q-display5.dtb \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \ imx6q-icore-rqs.dtb \ + imx6q-logicpd.dtb \ + imx6q-nitrogen6x.dtb \ + imx6q-novena.dtb \ + imx6q-pico.dtb \ imx6q-sabreauto.dtb \ + imx6q-sabrelite.dtb \ imx6q-sabresd.dtb \ + imx6q-tbs2910.dtb \ imx6q-wandboard-revb1.dtb \ imx6qp-sabreauto.dtb \ imx6qp-sabresd.dtb \ - imx6qp-wandboard-revd1.dtb + imx6qp-wandboard-revd1.dtb \ + +endif dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb @@ -610,7 +621,8 @@ dtb-$(CONFIG_MX6ULL) += \ imx6ull-14x14-evk.dtb \ imx6ull-colibri.dtb \ imx6ull-phycore-segin.dtb \ - imx6ull-dart-6ul.dtb + imx6ull-dart-6ul.dtb \ + imx6ulz-14x14-evk.dtb dtb-$(CONFIG_ARCH_MX6) += \ imx6-apalis.dtb \ @@ -633,7 +645,8 @@ dtb-$(CONFIG_ARCH_IMX8) += \ fsl-imx8qxp-colibri.dtb \ fsl-imx8qxp-mek.dtb -dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-evk.dtb +dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-evk.dtb \ + imx8mm-evk.dtb dtb-$(CONFIG_RCAR_GEN2) += \ r8a7790-lager-u-boot.dtb \ @@ -695,6 +708,8 @@ dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \ at91sam9x25ek.dtb \ at91sam9x35ek.dtb +dtb-$(CONFIG_TARGET_SAM9X60EK) += sam9x60ek.dtb + dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb dtb-$(CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM) += \ @@ -731,6 +746,9 @@ dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \ at91-sama5d27_som1_ek.dtb +dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \ + at91-sama5d27_wlsom1_ek.dtb + dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \ at91-sama5d2_icp.dtb diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi new file mode 100644 index 0000000..8c84dd0 --- /dev/null +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek-u-boot.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * at91-sama5d27_wlsom1_ek-u-boot.dts - Device Tree file for SAMA5D27 WLSOM1 EK + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Eugen Hristev <eugen.hristev@microchip.com> + */ + +/ { + chosen { + u-boot,dm-pre-reloc; + }; +}; + +&hlcdc { + u-boot,dm-pre-reloc; +}; + +&qspi1 { + u-boot,dm-pre-reloc; +}; + +&qspi1_flash { + u-boot,dm-pre-reloc; +}; + +&sdmmc0 { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&sfr { + u-boot,dm-pre-reloc; +}; + +&pinctrl_sdmmc0_cmd_dat_default { + u-boot,dm-pre-reloc; +}; + +&pinctrl_sdmmc0_ck_cd_default { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0_default { + u-boot,dm-pre-reloc; +}; + +&pinctrl_qspi1_default { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts new file mode 100644 index 0000000..ab23f5c --- /dev/null +++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + */ +/dts-v1/; +#include "sama5d27_wlsom1.dtsi" + +/ { + model = "Microchip SAMA5D27 WLSOM1 EK"; + compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d2", "atmel,sama5"; + + chosen { + stdout-path = &uart0; + }; + + onewire_tm: onewire { + gpios = <&pioA PIN_PC9 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_onewire_tm_default>; + status = "okay"; + + w1_eeprom: w1_eeprom@0 { + compatible = "maxim,ds24b33"; + status = "okay"; + }; + }; + + ahb { + sdmmc0: sdio-host@a0000000 { + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>; + status = "okay"; + }; + + apb { + hlcdc: hlcdc@f0000000 { + atmel,vl-bpix = <4>; + atmel,output-mode = <24>; + atmel,guard-time = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_pwm &pinctrl_lcd_rgb666>; + status = "okay"; + + display-timings { + 800x480 { + clock-frequency = <33300000>; + xres = <800>; + yres = <480>; + hactive = <800>; + vactive = <480>; + hsync-len = <64>; + hfront-porch = <1>; + hback-porch = <64>; + vfront-porch = <1>; + vback-porch = <22>; + vsync-len = <23>; + }; + }; + }; + + qspi1: spi@f0024000 { + status = "okay"; + }; + + macb0: ethernet@f8008000 { + status = "okay"; + }; + + uart0: serial@f801c000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0_default>; + status = "okay"; + }; + + pioA: gpio@fc038000 { + pinctrl { + pinctrl_lcd_base: pinctrl_lcd_base { + pinmux = <PIN_PC30__LCDVSYNC>, + <PIN_PC31__LCDHSYNC>, + <PIN_PD1__LCDDEN>, + <PIN_PD0__LCDPCK>; + bias-disable; + }; + + pinctrl_lcd_pwm: pinctrl_lcd_pwm { + pinmux = <PIN_PC28__LCDPWM>; + bias-disable; + }; + + pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 { + pinmux = <PIN_PC10__LCDDAT2>, + <PIN_PC11__LCDDAT3>, + <PIN_PC12__LCDDAT4>, + <PIN_PC13__LCDDAT5>, + <PIN_PC14__LCDDAT6>, + <PIN_PC15__LCDDAT7>, + <PIN_PC16__LCDDAT10>, + <PIN_PC17__LCDDAT11>, + <PIN_PC18__LCDDAT12>, + <PIN_PC19__LCDDAT13>, + <PIN_PC20__LCDDAT14>, + <PIN_PC21__LCDDAT15>, + <PIN_PC22__LCDDAT18>, + <PIN_PC23__LCDDAT19>, + <PIN_PC24__LCDDAT20>, + <PIN_PC25__LCDDAT21>, + <PIN_PC26__LCDDAT22>, + <PIN_PC27__LCDDAT23>; + bias-disable; + }; + + pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default { + pinmux = <PIN_PA1__SDMMC0_CMD>, + <PIN_PA2__SDMMC0_DAT0>, + <PIN_PA3__SDMMC0_DAT1>, + <PIN_PA4__SDMMC0_DAT2>, + <PIN_PA5__SDMMC0_DAT3>; + bias-disable; + }; + + pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default { + pinmux = <PIN_PA0__SDMMC0_CK>, + <PIN_PA11__SDMMC0_VDDSEL>, + <PIN_PA12__SDMMC0_WP>, + <PIN_PA13__SDMMC0_CD>; + bias-disable; + }; + + pinctrl_uart0_default: uart0_default { + pinmux = <PIN_PB26__URXD0>, + <PIN_PB27__UTXD0>; + bias-disable; + }; + + pinctrl_onewire_tm_default: onewire_tm_default { + pinmux = <PIN_PC9__GPIO>; + bias-pull-up; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi index 814a1b7..d0206c9 100644 --- a/arch/arm/dts/fsl-imx8mq.dtsi +++ b/arch/arm/dts/fsl-imx8mq.dtsi @@ -19,6 +19,8 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/pins-imx8mq.h> +#include <dt-bindings/reset/imx8mq-reset.h> +#include <dt-bindings/power/imx8mq-power.h> #include <dt-bindings/thermal/thermal.h> / { @@ -71,12 +73,6 @@ interrupt-parent = <&gic>; }; - power: power-controller { - compatible = "fsl,imx8mq-pm-domain"; - num-domains = <11>; - #power-domain-cells = <1>; - }; - pwm2: pwm@30670000 { compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm"; reg = <0x0 0x30670000 0x0 0x10000>; @@ -269,6 +265,12 @@ #clock-cells = <1>; }; + src: reset-controller@30390000 { + compatible = "fsl,imx8mq-src", "syscon"; + reg = <0x0 0x30390000 0x0 0x10000>; + #reset-cells = <1>; + }; + gpc: gpc@303a0000 { compatible = "fsl,imx8mq-gpc", "fsl,imx7d-gpc", "syscon"; reg = <0x0 0x303a0000 0x0 0x10000>; @@ -276,6 +278,37 @@ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <3>; interrupt-parent = <&gic>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + /* + * As per comment in ATF source code: + * + * PCIE1 and PCIE2 share the + * same reset signal, if we + * power down PCIE2, PCIE1 + * will be held in reset too. + * + * So instead of creating two + * separate power domains for + * PCIE1 and PCIE2 we create a + * link between both and use + * it as a shared PCIE power + * domain. + */ + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8M_POWER_DOMAIN_PCIE1>; + power-domains = <&pgc_pcie2>; + }; + + pgc_pcie2: power-domain@a { + #power-domain-cells = <0>; + reg = <IMX8M_POWER_DOMAIN_PCIE2>; + }; + }; }; usdhc1: usdhc@30b40000 { diff --git a/arch/arm/dts/fsl-imx8qm.dtsi b/arch/arm/dts/fsl-imx8qm.dtsi index af060db..6808f68 100644 --- a/arch/arm/dts/fsl-imx8qm.dtsi +++ b/arch/arm/dts/fsl-imx8qm.dtsi @@ -21,6 +21,13 @@ aliases { ethernet0 = &fec1; ethernet1 = &fec2; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + gpio4 = &gpio5; + gpio5 = &gpio6; + gpio6 = &gpio7; serial0 = &lpuart0; serial1 = &lpuart1; serial2 = &lpuart2; diff --git a/arch/arm/dts/imx28-u-boot.dtsi b/arch/arm/dts/imx28-u-boot.dtsi index d545b40..9db72a6 100644 --- a/arch/arm/dts/imx28-u-boot.dtsi +++ b/arch/arm/dts/imx28-u-boot.dtsi @@ -5,7 +5,6 @@ * * SPDX-License-Identifier: GPL-2.0+ or X11 */ -#include "imx28.dtsi" &gpio0 { gpio-ranges = <&pinctrl 0 0 29>; diff --git a/arch/arm/dts/imx6dl-nitrogen6x.dts b/arch/arm/dts/imx6dl-nitrogen6x.dts new file mode 100644 index 0000000..9427ab6 --- /dev/null +++ b/arch/arm/dts/imx6dl-nitrogen6x.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2013-2019 Boundary Devices, Inc. +// Copyright 2012 Freescale Semiconductor, Inc. +// Copyright 2011 Linaro Ltd. + +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-nitrogen6x.dtsi" + +/ { + model = "Boundary Devices i.MX6 DualLite Nitrogen6x Board"; + compatible = "boundary,imx6dl-nitrogen6x", "fsl,imx6dl"; +}; diff --git a/arch/arm/dts/imx6dl-pico.dts b/arch/arm/dts/imx6dl-pico.dts new file mode 100644 index 0000000..43763c1 --- /dev/null +++ b/arch/arm/dts/imx6dl-pico.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright 2018 Technexion Ltd. +// +// Author: Wig Cheng <wig.cheng@technexion.com> +// Richard Hu <richard.hu@technexion.com> +// Tapani Utriainen <tapani@technexion.com> + +/dts-v1/; + +#include "imx6dl.dtsi" +#include "imx6qdl-pico.dtsi" + +/ { + model = "TechNexion PICO-IMX6 DualLite/Solo"; + compatible = "technexion,imx6dl-pico", "fsl,imx6dl"; +}; diff --git a/arch/arm/dts/imx6q-display5-u-boot.dtsi b/arch/arm/dts/imx6q-display5-u-boot.dtsi index b942218..aa660b5 100644 --- a/arch/arm/dts/imx6q-display5-u-boot.dtsi +++ b/arch/arm/dts/imx6q-display5-u-boot.dtsi @@ -31,6 +31,11 @@ chosen { stdout-path = &uart5; }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdog1>; + }; }; &i2c3 { diff --git a/arch/arm/dts/imx6q-nitrogen6x.dts b/arch/arm/dts/imx6q-nitrogen6x.dts new file mode 100644 index 0000000..ebb22a4 --- /dev/null +++ b/arch/arm/dts/imx6q-nitrogen6x.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2013-2019 Boundary Devices, Inc. +// Copyright 2012 Freescale Semiconductor, Inc. +// Copyright 2011 Linaro Ltd. + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-nitrogen6x.dtsi" + +/ { + model = "Boundary Devices i.MX6 Quad Nitrogen6x Board"; + compatible = "boundary,imx6q-nitrogen6x", "fsl,imx6q"; +}; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6q-pico.dts b/arch/arm/dts/imx6q-pico.dts new file mode 100644 index 0000000..bfc6f9c --- /dev/null +++ b/arch/arm/dts/imx6q-pico.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright 2018 Technexion Ltd. +// +// Author: Wig Cheng <wig.cheng@technexion.com> +// Richard Hu <richard.hu@technexion.com> +// Tapani Utriainen <tapani@technexion.com> + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-pico.dtsi" + +/ { + model = "TechNexion PICO-IMX6 Quad"; + compatible = "technexion,imx6q-pico", "fsl,imx6q"; +}; diff --git a/arch/arm/dts/imx6q-sabrelite.dts b/arch/arm/dts/imx6q-sabrelite.dts new file mode 100644 index 0000000..91e031c --- /dev/null +++ b/arch/arm/dts/imx6q-sabrelite.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2013-2019 Boundary Devices, Inc. +// Copyright 2012 Freescale Semiconductor, Inc. +// Copyright 2011 Linaro Ltd. + +/dts-v1/; + +#include "imx6q.dtsi" +#include "imx6qdl-sabrelite.dtsi" + +/ { + model = "Freescale i.MX6 Quad SABRE Lite Board"; + compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; +}; + +&sata { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/dts/imx6qdl-nitrogen6x.dtsi new file mode 100644 index 0000000..5094929 --- /dev/null +++ b/arch/arm/dts/imx6qdl-nitrogen6x.dtsi @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2013-2019 Boundary Devices, Inc. +// Copyright 2012 Freescale Semiconductor, Inc. +// Copyright 2011 Linaro Ltd. + +#include "imx6qdl-sabrelite.dtsi" + +&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 +#undef GP_ENET_PHY_RESET +#define GP_ENET_PHY_RESET <&gpio1 27 GPIO_ACTIVE_LOW> + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x030b0 +#define GPIRQ_ENET_PHY <&gpio1 28 IRQ_TYPE_LEVEL_LOW> + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* Spare */ + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 + >; + }; +}; + +&fec { +#if 0 + phy-reset-gpios = GP_ENET_PHY_RESET; +#endif +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&usdhc3 { + /delete-property/ wp-gpios; +}; diff --git a/arch/arm/dts/imx6qdl-pico.dtsi b/arch/arm/dts/imx6qdl-pico.dtsi new file mode 100644 index 0000000..50379d0 --- /dev/null +++ b/arch/arm/dts/imx6qdl-pico.dtsi @@ -0,0 +1,424 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright 2018 Technexion Ltd. +// +// Author: Wig Cheng <wig.cheng@technexion.com> +// Richard Hu <richard.hu@technexion.com> +// Tapani Utriainen <tapani@technexion.com> + +#include <dt-bindings/gpio/gpio.h> + +/ { + aliases { + mmc0 = &usdhc3; + usb0 = &usbotg; + }; + + chosen { + stdout-path = &uart1; + }; + + reg_2p5v: regulator-2p5v { + compatible = "regulator-fixed"; + regulator-name = "2P5V"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg_vbus>; + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + status = "okay"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + status = "okay"; +}; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; +}; + +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii-id"; + phy-reset-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c2>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie_reset>; + reset-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&ssi1 { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { /* Bluetooth module */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&usbh1 { + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + dr_mode = "otg"; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <8>; + cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usdhc2 { /* Wifi/BT */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + no-1-8-v; + keep-power-in-suspend; + non-removable; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + no-1-8-v; + non-removable; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x4001b0b5 /* PICO_P24 */ + MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x4001b0b5 /* PICO_P25 */ + MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x4001b0b5 /* PICO_P26 */ + MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x4001b0b5 /* PICO_P28 */ + MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x4001b0b5 /* PICO_P30 */ + MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x4001b0b5 /* PICO_P32 */ + MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x4001b0b5 /* PICO_P34 */ + MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x4001b0b5 /* PICO_P42 */ + MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x4001b0b5 /* PICO_P44 */ + MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x4001b0b5 /* PICO_P48 */ + >; + }; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 + >; + }; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000f0b0 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x1b0b1 + MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x1b0b1 + MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x1b0b1 + MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000f0b0 + MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x000f0b0 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1f0b1 + >; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b0 + >; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 + >; + }; + + pinctrl_pcie_reset: pciegrp { + fsl,pins = < + MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x130b0 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 + >; + }; + + pinctrl_usbotg_vbus: usbotgvbusgrp { + fsl,pins = < + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x17071 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0xb0b1 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; + }; +}; diff --git a/arch/arm/dts/imx6qdl-sabrelite.dtsi b/arch/arm/dts/imx6qdl-sabrelite.dtsi new file mode 100644 index 0000000..673a19c --- /dev/null +++ b/arch/arm/dts/imx6qdl-sabrelite.dtsi @@ -0,0 +1,384 @@ +// SPDX-License-Identifier: GPL-2.0+ +// +// Copyright 2013-2019 Boundary Devices, Inc. +// Copyright 2012 Freescale Semiconductor, Inc. +// Copyright 2011 Linaro Ltd. + +#include <dt-bindings/clock/imx6qdl-clock.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x000b1 +#define GP_ECSPI1_NOR_CS <&gpio3 19 GPIO_ACTIVE_LOW> + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x0b0b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 +#undef GP_ENET_PHY_RESET +#define GP_ENET_PHY_RESET <&gpio3 23 GPIO_ACTIVE_LOW> + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x030b0 +#define GPIRQ_ENET_PHY <&gpio1 28 IRQ_TYPE_LEVEL_LOW> + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + /* Spare */ + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c1_1: i2c1-1grp { + fsl,pins = < +#define GP_I2C1_SCL <&gpio3 21 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 +#define GP_I2C1_SDA <&gpio3 28 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2_1: i2c2-1grp { + fsl,pins = < +#define GP_I2C2_SCL <&gpio4 12 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1 +#define GP_I2C2_SDA <&gpio4 13 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 +#define GPIRQ_I2C3_J7 <&gpio1 9 IRQ_TYPE_EDGE_FALLING> +#define GP_I2C3_J7 <&gpio1 9 GPIO_ACTIVE_LOW> + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 + >; + }; + + pinctrl_i2c3_1: i2c3-1grp { + fsl,pins = < +#define GP_I2C3_SCL <&gpio1 5 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x4001b8b1 +#define GP_I2C3_SDA <&gpio7 11 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x4001b8b1 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 + >; + }; + + pinctrl_reg_usbotg_vbus: reg-usbotg-vbusgrp { + fsl,pins = < +#define GP_REG_USBOTG <&gpio3 22 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x030b0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < +#define GP_USBH1_HUB_RESET <&gpio7 12 GPIO_ACTIVE_LOW> + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x0b0b0 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 + MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 +#define GP_USDHC3_CD <&gpio7 0 GPIO_ACTIVE_LOW> + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 +#define GP_USDHC3_WP <&gpio7 1 GPIO_ACTIVE_HIGH> + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b0 + >; + }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 +#define GP_USDHC4_CD <&gpio2 6 GPIO_ACTIVE_LOW> + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 + >; + }; +}; + +/ { + aliases { + mmc0 = &usdhc3; + mmc1 = &usdhc4; + pwm_lcd = &pwm1; + pwm_lvds = &pwm4; + }; + + chosen { + stdout-path = &uart2; + }; + + memory { + reg = <0x10000000 0x40000000>; + }; + + reg_3p3v: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = GP_REG_USBOTG; + enable-active-high; + }; +}; + +&ecspi1 { + cs-gpios = GP_ECSPI1_NOR_CS; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + status = "okay"; + + flash: m25p80@0 { + compatible = "sst,sst25vf016b", "jedec,spi-nor"; + spi-max-frequency = <20000000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + mtd@00000000 { + label = "U-Boot"; + reg = <0x0 0xC0000>; + }; + + mtd@000C0000 { + label = "env"; + reg = <0xC0000 0x2000>; + }; + mtd@000C2000 { + label = "splash"; + reg = <0xC2000 0x13e000>; + }; + }; +}; + +&fec { + phy-handle = <ðphy>; + phy-mode = "rgmii"; +#if 0 + phy-reset-gpios = GP_ENET_PHY_RESET; +#endif + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + rxc-skew-ps = <3000>; + rxd0-skew-ps = <0>; + rxd1-skew-ps = <0>; + rxd2-skew-ps = <0>; + rxd3-skew-ps = <0>; + rxdv-skew-ps = <0>; + status = "okay"; + txc-skew-ps = <3000>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; + txen-skew-ps = <0>; + + mdio { + #address-cells = <0>; + #size-cells = <1>; + + ethphy: ethernet-phy { + interrupts-extended = GPIRQ_ENET_PHY; + }; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_1>; + scl-gpios = GP_I2C1_SCL; + sda-gpios = GP_I2C1_SDA; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_1>; + scl-gpios = GP_I2C2_SCL; + sda-gpios = GP_I2C2_SDA; + status = "okay"; + + hdmi_edid: edid@50 { + compatible = "fsl,imx6-hdmi-i2c"; + reg = <0x50>; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_1>; + scl-gpios = GP_I2C3_SCL; + sda-gpios = GP_I2C3_SDA; + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + disable-over-current; + reset-gpios = GP_USBH1_HUB_RESET; + status = "okay"; +}; + +&usbotg { + vbus-supply = <®_usb_otg_vbus>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + disable-over-current; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = GP_USDHC3_CD; + wp-gpios = GP_USDHC3_WP; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; + +&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + cd-gpios = GP_USDHC4_CD; + vmmc-supply = <®_3p3v>; + status = "okay"; +}; diff --git a/arch/arm/dts/imx6qdl-u-boot.dtsi b/arch/arm/dts/imx6qdl-u-boot.dtsi index e161ebb..1279cc2 100644 --- a/arch/arm/dts/imx6qdl-u-boot.dtsi +++ b/arch/arm/dts/imx6qdl-u-boot.dtsi @@ -6,10 +6,12 @@ / { aliases { usb0 = &usbotg; + video0 = &ipu1; }; soc { u-boot,dm-spl; + u-boot,dm-pre-reloc; aips-bus@2000000 { u-boot,dm-spl; @@ -31,3 +33,7 @@ &iomuxc { u-boot,dm-spl; }; + +&ipu1 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/imx6qdl-wandboard.dtsi b/arch/arm/dts/imx6qdl-wandboard.dtsi index 90aa43d..35a88bf 100644 --- a/arch/arm/dts/imx6qdl-wandboard.dtsi +++ b/arch/arm/dts/imx6qdl-wandboard.dtsi @@ -229,11 +229,21 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; + phy-handle = <ðphy>; phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; fsl,err006687-workaround-present; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@1 { + reg = <1>; + }; + }; }; &spdif { diff --git a/arch/arm/dts/imx6qdl.dtsi b/arch/arm/dts/imx6qdl.dtsi index 83eeb5c..e4daf15 100644 --- a/arch/arm/dts/imx6qdl.dtsi +++ b/arch/arm/dts/imx6qdl.dtsi @@ -33,7 +33,6 @@ i2c1 = &i2c2; i2c2 = &i2c3; ipu0 = &ipu1; - video0 = &ipu1; mmc0 = &usdhc1; mmc1 = &usdhc2; mmc2 = &usdhc3; @@ -146,7 +145,6 @@ compatible = "simple-bus"; interrupt-parent = <&gpc>; ranges; - u-boot,dm-pre-reloc; dma_apbh: dma-apbh@110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; @@ -1263,7 +1261,6 @@ <&clks IMX6QDL_CLK_IPU1_DI1>; clock-names = "bus", "di0", "di1"; resets = <&src 2>; - u-boot,dm-pre-reloc; ipu1_csi0: port@0 { reg = <0>; diff --git a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi index 77cb461..e9efdb9 100644 --- a/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi +++ b/arch/arm/dts/imx6ul-14x14-evk-u-boot.dtsi @@ -3,8 +3,55 @@ * Copyright 2018 NXP */ +&{/aliases} { + u-boot,dm-pre-reloc; + display0 = &lcdif; +}; + &qspi { flash0: n25q256a@0 { compatible = "jedec,spi-nor"; }; -};
\ No newline at end of file +}; + +&{/soc} { + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-pre-reloc; +}; + +&iomuxc { + u-boot,dm-pre-reloc; +}; + +&lcdif { + display = <&display0>; + u-boot,dm-pre-reloc; + + display0: display@0 { + bits-per-pixel = <16>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + + timing0: timing0 { + clock-frequency = <9200000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <8>; + hback-porch = <4>; + hsync-len = <41>; + vback-porch = <2>; + vfront-porch = <4>; + vsync-len = <10>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <0>; + }; + }; + }; +}; diff --git a/arch/arm/dts/imx6ul-14x14-evk.dts b/arch/arm/dts/imx6ul-14x14-evk.dts index a642d77..2438669 100644 --- a/arch/arm/dts/imx6ul-14x14-evk.dts +++ b/arch/arm/dts/imx6ul-14x14-evk.dts @@ -1,427 +1,13 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2015 Freescale Semiconductor, Inc. - * Copyright 2017-2018 NXP - */ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2015 Freescale Semiconductor, Inc. /dts-v1/; #include "imx6ul.dtsi" +#include "imx6ul-14x14-evk.dtsi" / { model = "Freescale i.MX6 UltraLite 14x14 EVK Board"; compatible = "fsl,imx6ul-14x14-evk", "fsl,imx6ul"; - - aliases { - spi5 = &soft_spi; - }; - - chosen { - stdout-path = &uart1; - }; - - memory { - reg = <0x80000000 0x20000000>; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_sd1_vmmc: regulator@1 { - compatible = "regulator-fixed"; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; - off-on-delay = <20000>; - enable-active-high; - }; - - reg_can_3v3: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "can-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>; - }; - - reg_gpio_dvfs: regulator-gpio { - compatible = "regulator-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_dvfs>; - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1400000>; - regulator-name = "gpio_dvfs"; - regulator-type = "voltage"; - gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; - states = <1300000 0x1 1400000 0x0>; - }; - }; - - soft_spi: soft-spi { - compatible = "spi-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi4>; - pinctrl-assert-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; - status = "okay"; - gpio-sck = <&gpio5 11 0>; - gpio-mosi = <&gpio5 10 0>; - cs-gpios = <&gpio5 7 0>; - num-chipselects = <1>; - #address-cells = <1>; - #size-cells = <0>; - - gpio_spi: gpio_spi@0 { - compatible = "fairchild,74hc595"; - gpio-controller; - #gpio-cells = <2>; - reg = <0>; - registers-number = <1>; - registers-default = /bits/ 8 <0x57>; - spi-max-frequency = <100000>; - }; - }; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet1>; - phy-mode = "rmii"; - phy-handle = <ðphy0>; - status = "okay"; -}; - -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet2>; - phy-mode = "rmii"; - phy-handle = <ðphy1>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@2 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <2>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; - }; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; - status = "okay"; - - mag3110@0e { - compatible = "fsl,mag3110"; - reg = <0x0e>; - position = <2>; - }; - - fxls8471@1e { - compatible = "fsl,fxls8471"; - reg = <0x1e>; - position = <0>; - interrupt-parent = <&gpio5>; - interrupts = <0 8>; - }; -}; - -&i2c2 { - clock_frequency = <100000>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c2>; - pinctrl-1 = <&pinctrl_i2c2_gpio>; - scl-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog_1>; - imx6ul-evk { - pinctrl_hog_1: hoggrp-1 { - fsl,pins = < - MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ - MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ - MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ - MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 - >; - }; - - pinctrl_dvfs: dvfsgrp { - fsl,pins = < - MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 - >; - }; - - pinctrl_enet1: enet1grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 - MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 - >; - }; - - pinctrl_enet2: enet2grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 - MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 - MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 - MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c1_gpio: i2c1grp_gpio { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 - MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c2_gpio: i2c2grp_gpio { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x1b8b0 - MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x1b8b0 - >; - }; - - pinctrl_qspi: qspigrp { - fsl,pins = < - MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1 - MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1 - MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1 - MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1 - MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1 - MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 - >; - }; - - pinctrl_spi4: spi4grp { - fsl,pins = < - MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 - MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 - MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 - MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 - MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 - >; - }; - - pinctrl_usb_otg1_id: usbotg1idgrp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 - >; - }; - - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 - >; - }; - - pinctrl_usdhc2_8bit: usdhc2grp_8bit { - fsl,pins = < - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 - MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059 - MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059 - MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059 - MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 - >; - }; - - pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz { - fsl,pins = < - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100b9 - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170b9 - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9 - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9 - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9 - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9 - MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9 - MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9 - MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9 - MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9 - >; - }; - - pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz { - fsl,pins = < - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 - MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 - MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 - MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 - MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 - >; - }; - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 - >; - }; - }; -}; - -&qspi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_qspi>; - status = "okay"; - ddrsmp=<0>; - - flash0: n25q256a@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "micron,n25q256a"; - spi-max-frequency = <29000000>; - spi-nor,ddr-quad-read-dummy = <6>; - reg = <0>; - }; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&usbotg1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usb_otg1_id>; - dr_mode = "otg"; - srp-disable; - hnp-disable; - adp-disable; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "host"; - disable-over-current; - status = "okay"; -}; - -&usbphy1 { - tx-d-cal = <0x5>; -}; - -&usbphy2 { - tx-d-cal = <0x5>; -}; - -&usdhc1 { - pinctrl-names = "default", "state_100mhz", "state_200mhz"; - pinctrl-0 = <&pinctrl_usdhc1>; - pinctrl-1 = <&pinctrl_usdhc1_100mhz>; - pinctrl-2 = <&pinctrl_usdhc1_200mhz>; - cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; - keep-power-in-suspend; - wakeup-source; - vmmc-supply = <®_sd1_vmmc>; - status = "okay"; -}; - -&usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; - non-removable; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,ext-reset-output; }; diff --git a/arch/arm/dts/imx6ul-14x14-evk.dtsi b/arch/arm/dts/imx6ul-14x14-evk.dtsi new file mode 100644 index 0000000..d1baf0f --- /dev/null +++ b/arch/arm/dts/imx6ul-14x14-evk.dtsi @@ -0,0 +1,531 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2015 Freescale Semiconductor, Inc. + +/ { + aliases { + spi5 = &{/spi4}; + }; + + chosen { + stdout-path = &uart1; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0x20000000>; + }; + + backlight_display: backlight-display { + compatible = "pwm-backlight"; + pwms = <&pwm1 0 5000000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + status = "okay"; + }; + + + reg_sd1_vmmc: regulator-sd1-vmmc { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_can_3v3: regulator-can-3v3 { + compatible = "regulator-fixed"; + regulator-name = "can-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>; + }; + + spi4 { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi4>; + status = "okay"; + gpio-sck = <&gpio5 11 0>; + gpio-mosi = <&gpio5 10 0>; + cs-gpios = <&gpio5 7 0>; + num-chipselects = <1>; + #address-cells = <1>; + #size-cells = <0>; + + gpio_spi: gpio@0 { + compatible = "fairchild,74hc595"; + gpio-controller; + #gpio-cells = <2>; + reg = <0>; + registers-number = <1>; + spi-max-frequency = <100000>; + }; + }; + + panel { + compatible = "innolux,at043tn24"; + backlight = <&backlight_display>; + + port { + panel_in: endpoint { + remote-endpoint = <&display_out>; + }; + }; + }; +}; + +&clks { + assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <786432000>; +}; + +&i2c2 { + clock_frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: wm8960@1a { + #sound-dai-cells = <0>; + compatible = "wlf,wm8960"; + reg = <0x1a>; + wlf,shared-lrclk; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + phy-mode = "rmii"; + phy-handle = <ðphy0>; + status = "okay"; +}; + +&fec2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2>; + phy-mode = "rmii"; + phy-handle = <ðphy1>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@2 { + reg = <2>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET_REF>; + clock-names = "rmii-ref"; + }; + + ethphy1: ethernet-phy@1 { + reg = <1>; + micrel,led-mode = <1>; + clocks = <&clks IMX6UL_CLK_ENET2_REF>; + clock-names = "rmii-ref"; + }; + }; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; + +&can2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_can_3v3>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; + status = "okay"; + + mag3110@e { + compatible = "fsl,mag3110"; + reg = <0x0e>; + }; +}; + +&lcdif { + assigned-clocks = <&clks IMX6UL_CLK_LCDIF_PRE_SEL>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL5_VIDEO_DIV>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif_dat + &pinctrl_lcdif_ctrl>; + status = "okay"; + + port { + display_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&qspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash0: n25q256a@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,n25q256a"; + spi-max-frequency = <29000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + reg = <0>; + }; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>, + <&clks IMX6UL_CLK_SAI2>; + assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; + assigned-clock-rates = <0>, <12288000>; + fsl,sai-mclk-direction-output; + status = "okay"; +}; + +&snvs_poweroff { + status = "okay"; +}; + +&tsc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tsc>; + xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + measure-delay-time = <0xffff>; + pre-charge-time = <0xfff>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; + status = "okay"; +}; + +&usbotg1 { + dr_mode = "otg"; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usbphy1 { + fsl,tx-d-cal = <106>; +}; + +&usbphy2 { + fsl,tx-d-cal = <106>; +}; + +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + keep-power-in-suspend; + wakeup-source; + vmmc-supply = <®_sd1_vmmc>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + no-1-8-v; + keep-power-in-suspend; + wakeup-source; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_csi1: csi1grp { + fsl,pins = < + MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 + MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 + MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 + MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 + MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 + MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 + MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 + MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 + MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 + MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 + MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 + MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 + MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 + MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 + MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 + MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 + >; + }; + + pinctrl_enet2: enet2grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 + MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 + MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 + MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 + MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 + MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 + MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 + >; + }; + + pinctrl_flexcan1: flexcan1grp{ + fsl,pins = < + MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 + MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 + >; + }; + + pinctrl_flexcan2: flexcan2grp{ + fsl,pins = < + MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 + MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 + MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 + >; + }; + + pinctrl_i2c1_gpio: i2c1grp_gpio { + fsl,pins = < + MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 + MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + >; + }; + + pinctrl_lcdif_dat: lcdifdatgrp { + fsl,pins = < + MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 + MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 + MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 + MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 + MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 + MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 + MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 + MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 + MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 + MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 + MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 + MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 + MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 + MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 + MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 + MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 + MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 + MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 + MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 + MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 + MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 + MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 + MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 + MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 + >; + }; + + pinctrl_lcdif_ctrl: lcdifctrlgrp { + fsl,pins = < + MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 + MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 + MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 + MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 + /* used for lcd reset */ + MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79 + >; + }; + + pinctrl_qspi: qspigrp { + fsl,pins = < + MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1 + MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1 + MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1 + MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1 + MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1 + MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 + >; + }; + + pinctrl_sai2: sai2grp { + fsl,pins = < + MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 + MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 + MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x11088 + MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x11088 + MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x17088 + MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 + >; + }; + + pinctrl_sim2: sim2grp { + fsl,pins = < + MX6UL_PAD_CSI_DATA03__SIM2_PORT1_PD 0xb808 + MX6UL_PAD_CSI_DATA04__SIM2_PORT1_CLK 0x31 + MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B 0xb808 + MX6UL_PAD_CSI_DATA06__SIM2_PORT1_SVEN 0xb808 + MX6UL_PAD_CSI_DATA07__SIM2_PORT1_TRXD 0xb809 + MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x3008 + >; + }; + + pinctrl_spi4: spi4grp { + fsl,pins = < + MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 + MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 + MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 + MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 + >; + }; + + pinctrl_tsc: tscgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0xb0 + MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0xb0 + MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0xb0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 + MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 + MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 + MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 + MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 + MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ + MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059 + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 + >; + }; +}; diff --git a/arch/arm/dts/imx6ul-pinfunc.h b/arch/arm/dts/imx6ul-pinfunc.h index 0034eeb..380d2db 100644 --- a/arch/arm/dts/imx6ul-pinfunc.h +++ b/arch/arm/dts/imx6ul-pinfunc.h @@ -1,10 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (C) 2015 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * + * Copyright 2014 - 2015 Freescale Semiconductor, Inc. */ #ifndef __DTS_IMX6UL_PINFUNC_H @@ -34,14 +30,14 @@ #define MX6UL_PAD_JTAG_MOD__ENET1_REF_CLK_25M 0x0044 0x02d0 0x0000 3 0 #define MX6UL_PAD_JTAG_MOD__CCM_PMIC_RDY 0x0044 0x02d0 0x04c0 4 0 #define MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0x0044 0x02d0 0x0000 5 0 -#define MX6UL_PAD_JTAG_MOD__SDMA_EXT_EVENT00 0x0044 0x02d0 0x0000 6 0 +#define MX6UL_PAD_JTAG_MOD__SDMA_EXT_EVENT00 0x0044 0x02d0 0x0610 6 0 #define MX6UL_PAD_JTAG_TMS__SJC_TMS 0x0048 0x02d4 0x0000 0 0 #define MX6UL_PAD_JTAG_TMS__GPT2_CAPTURE1 0x0048 0x02d4 0x0598 1 0 -#define MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x0048 0x02d4 0x0000 2 0 +#define MX6UL_PAD_JTAG_TMS__SAI2_MCLK 0x0048 0x02d4 0x05f0 2 0 #define MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x0048 0x02d4 0x0000 3 0 #define MX6UL_PAD_JTAG_TMS__CCM_WAIT 0x0048 0x02d4 0x0000 4 0 #define MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x0048 0x02d4 0x0000 5 0 -#define MX6UL_PAD_JTAG_TMS__SDMA_EXT_EVENT01 0x0048 0x02d4 0x0000 6 0 +#define MX6UL_PAD_JTAG_TMS__SDMA_EXT_EVENT01 0x0048 0x02d4 0x0614 6 0 #define MX6UL_PAD_JTAG_TMS__EPIT1_OUT 0x0048 0x02d4 0x0000 8 0 #define MX6UL_PAD_JTAG_TDO__SJC_TDO 0x004c 0x02d8 0x0000 0 0 #define MX6UL_PAD_JTAG_TDO__GPT2_CAPTURE2 0x004c 0x02d8 0x059c 1 0 @@ -63,12 +59,14 @@ #define MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x0054 0x02e0 0x05f4 2 0 #define MX6UL_PAD_JTAG_TCK__PWM7_OUT 0x0054 0x02e0 0x0000 4 0 #define MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x0054 0x02e0 0x0000 5 0 +#define MX6UL_PAD_JTAG_TCK__OSC32K_32K_OUT 0x0054 0x02e0 0x0000 6 0 #define MX6UL_PAD_JTAG_TCK__SIM2_POWER_FAIL 0x0054 0x02e0 0x0000 8 0 #define MX6UL_PAD_JTAG_TRST_B__SJC_TRSTB 0x0058 0x02e4 0x0000 0 0 #define MX6UL_PAD_JTAG_TRST_B__GPT2_COMPARE3 0x0058 0x02e4 0x0000 1 0 #define MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x0058 0x02e4 0x0000 2 0 #define MX6UL_PAD_JTAG_TRST_B__PWM8_OUT 0x0058 0x02e4 0x0000 4 0 #define MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x0058 0x02e4 0x0000 5 0 +#define MX6UL_PAD_JTAG_TRST_B__REF_CLK_24M 0x0058 0x02e4 0x0000 6 0 #define MX6UL_PAD_JTAG_TRST_B__CAAM_RNG_OSC_OBS 0x0058 0x02e4 0x0000 8 0 #define MX6UL_PAD_GPIO1_IO00__I2C2_SCL 0x005c 0x02e8 0x05ac 0 1 #define MX6UL_PAD_GPIO1_IO00__GPT1_CAPTURE1 0x005c 0x02e8 0x058c 1 0 @@ -94,22 +92,24 @@ #define MX6UL_PAD_GPIO1_IO02__ENET1_REF_CLK_25M 0x0064 0x02f0 0x0000 3 0 #define MX6UL_PAD_GPIO1_IO02__USDHC1_WP 0x0064 0x02f0 0x066c 4 0 #define MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x0064 0x02f0 0x0000 5 0 -#define MX6UL_PAD_GPIO1_IO02__SDMA_EXT_EVENT00 0x0064 0x02f0 0x0000 6 0 +#define MX6UL_PAD_GPIO1_IO02__SDMA_EXT_EVENT00 0x0064 0x02f0 0x0610 6 1 #define MX6UL_PAD_GPIO1_IO02__SRC_ANY_PU_RESET 0x0064 0x02f0 0x0000 7 0 #define MX6UL_PAD_GPIO1_IO02__UART1_DCE_TX 0x0064 0x02f0 0x0000 8 0 #define MX6UL_PAD_GPIO1_IO02__UART1_DTE_RX 0x0064 0x02f0 0x0624 8 0 #define MX6UL_PAD_GPIO1_IO03__I2C1_SDA 0x0068 0x02f4 0x05a8 0 1 #define MX6UL_PAD_GPIO1_IO03__GPT1_COMPARE3 0x0068 0x02f4 0x0000 1 0 #define MX6UL_PAD_GPIO1_IO03__USB_OTG2_OC 0x0068 0x02f4 0x0660 2 0 +#define MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x0068 0x02f4 0x0000 3 0 #define MX6UL_PAD_GPIO1_IO03__USDHC1_CD_B 0x0068 0x02f4 0x0668 4 0 #define MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x0068 0x02f4 0x0000 5 0 -#define MX6UL_PAD_GPIO1_IO03__CCM_DI0_eXT_CLK 0x0068 0x02f4 0x0000 6 0 +#define MX6UL_PAD_GPIO1_IO03__CCM_DI0_EXT_CLK 0x0068 0x02f4 0x0000 6 0 #define MX6UL_PAD_GPIO1_IO03__SRC_TESTER_ACK 0x0068 0x02f4 0x0000 7 0 -#define MX6UL_PAD_GPIO1_IO03__UART1_DTE_TX 0x0068 0x02f4 0x0000 8 0 #define MX6UL_PAD_GPIO1_IO03__UART1_DCE_RX 0x0068 0x02f4 0x0624 8 1 +#define MX6UL_PAD_GPIO1_IO03__UART1_DTE_TX 0x0068 0x02f4 0x0000 8 0 #define MX6UL_PAD_GPIO1_IO04__ENET1_REF_CLK1 0x006c 0x02f8 0x0574 0 1 #define MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x006c 0x02f8 0x0000 1 0 #define MX6UL_PAD_GPIO1_IO04__USB_OTG1_PWR 0x006c 0x02f8 0x0000 2 0 +#define MX6UL_PAD_GPIO1_IO04__REF_CLK_24M 0x006c 0x02f8 0x0000 3 0 #define MX6UL_PAD_GPIO1_IO04__USDHC1_RESET_B 0x006c 0x02f8 0x0000 4 0 #define MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x006c 0x02f8 0x0000 5 0 #define MX6UL_PAD_GPIO1_IO04__ENET2_1588_EVENT0_IN 0x006c 0x02f8 0x0000 6 0 @@ -200,7 +200,7 @@ #define MX6UL_PAD_UART2_TX_DATA__CSI_DATA06 0x0094 0x0320 0x04dc 3 0 #define MX6UL_PAD_UART2_TX_DATA__GPT1_CAPTURE1 0x0094 0x0320 0x058c 4 1 #define MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20 0x0094 0x0320 0x0000 5 0 -#define MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x0094 0x0320 0x0000 8 0 +#define MX6UL_PAD_UART2_TX_DATA__ECSPI3_SS0 0x0094 0x0320 0x0560 8 0 #define MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x0098 0x0324 0x062c 0 1 #define MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x0098 0x0324 0x0000 0 0 #define MX6UL_PAD_UART2_RX_DATA__ENET1_TDATA03 0x0098 0x0324 0x0000 1 0 @@ -232,7 +232,7 @@ #define MX6UL_PAD_UART3_TX_DATA__UART3_DTE_RX 0x00a4 0x0330 0x0634 0 0 #define MX6UL_PAD_UART3_TX_DATA__ENET2_RDATA02 0x00a4 0x0330 0x0000 1 0 #define MX6UL_PAD_UART3_TX_DATA__SIM1_PORT0_PD 0x00a4 0x0330 0x0000 2 0 -#define MX6UL_PAD_UART3_TX_DATA__CSI_DATA01 0x00a4 0x0330 0x0000 3 0 +#define MX6UL_PAD_UART3_TX_DATA__CSI_DATA01 0x00a4 0x0330 0x04d4 3 0 #define MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x00a4 0x0330 0x0000 4 0 #define MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS 0x00a4 0x0330 0x0628 4 2 #define MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x00a4 0x0330 0x0000 5 0 @@ -242,7 +242,7 @@ #define MX6UL_PAD_UART3_RX_DATA__UART3_DTE_TX 0x00a8 0x0334 0x0000 0 0 #define MX6UL_PAD_UART3_RX_DATA__ENET2_RDATA03 0x00a8 0x0334 0x0000 1 0 #define MX6UL_PAD_UART3_RX_DATA__SIM2_PORT0_PD 0x00a8 0x0334 0x0000 2 0 -#define MX6UL_PAD_UART3_RX_DATA__CSI_DATA00 0x00a8 0x0334 0x0000 3 0 +#define MX6UL_PAD_UART3_RX_DATA__CSI_DATA00 0x00a8 0x0334 0x04d0 3 0 #define MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x00a8 0x0334 0x0628 4 3 #define MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS 0x00a8 0x0334 0x0000 4 0 #define MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x00a8 0x0334 0x0000 5 0 @@ -251,7 +251,7 @@ #define MX6UL_PAD_UART3_CTS_B__UART3_DTE_RTS 0x00ac 0x0338 0x0630 0 0 #define MX6UL_PAD_UART3_CTS_B__ENET2_RX_CLK 0x00ac 0x0338 0x0000 1 0 #define MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x00ac 0x0338 0x0000 2 0 -#define MX6UL_PAD_UART3_CTS_B__CSI_DATA10 0x00ac 0x0338 0x0000 3 0 +#define MX6UL_PAD_UART3_CTS_B__CSI_DATA10 0x00ac 0x0338 0x04ec 3 0 #define MX6UL_PAD_UART3_CTS_B__ENET1_1588_EVENT1_IN 0x00ac 0x0338 0x0000 4 0 #define MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x00ac 0x0338 0x0000 5 0 #define MX6UL_PAD_UART3_CTS_B__EPIT2_OUT 0x00ac 0x0338 0x0000 8 0 @@ -259,7 +259,7 @@ #define MX6UL_PAD_UART3_RTS_B__UART3_DTE_CTS 0x00b0 0x033c 0x0000 0 0 #define MX6UL_PAD_UART3_RTS_B__ENET2_TX_ER 0x00b0 0x033c 0x0000 1 0 #define MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x00b0 0x033c 0x0584 2 0 -#define MX6UL_PAD_UART3_RTS_B__CSI_DATA11 0x00b0 0x033c 0x0000 3 0 +#define MX6UL_PAD_UART3_RTS_B__CSI_DATA11 0x00b0 0x033c 0x04f0 3 0 #define MX6UL_PAD_UART3_RTS_B__ENET1_1588_EVENT1_OUT 0x00b0 0x033c 0x0000 4 0 #define MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x00b0 0x033c 0x0000 5 0 #define MX6UL_PAD_UART3_RTS_B__WDOG1_WDOG_B 0x00b0 0x033c 0x0000 8 0 @@ -267,7 +267,7 @@ #define MX6UL_PAD_UART4_TX_DATA__UART4_DTE_RX 0x00b4 0x0340 0x063c 0 0 #define MX6UL_PAD_UART4_TX_DATA__ENET2_TDATA02 0x00b4 0x0340 0x0000 1 0 #define MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x00b4 0x0340 0x05a4 2 1 -#define MX6UL_PAD_UART4_TX_DATA__CSI_DATA12 0x00b4 0x0340 0x0000 3 0 +#define MX6UL_PAD_UART4_TX_DATA__CSI_DATA12 0x00b4 0x0340 0x04f4 3 0 #define MX6UL_PAD_UART4_TX_DATA__CSU_CSU_ALARM_AUT02 0x00b4 0x0340 0x0000 4 0 #define MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x00b4 0x0340 0x0000 5 0 #define MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK 0x00b4 0x0340 0x0544 8 1 @@ -275,23 +275,23 @@ #define MX6UL_PAD_UART4_RX_DATA__UART4_DTE_TX 0x00b8 0x0344 0x0000 0 0 #define MX6UL_PAD_UART4_RX_DATA__ENET2_TDATA03 0x00b8 0x0344 0x0000 1 0 #define MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x00b8 0x0344 0x05a8 2 2 -#define MX6UL_PAD_UART4_RX_DATA__CSI_DATA13 0x00b8 0x0344 0x0000 3 0 +#define MX6UL_PAD_UART4_RX_DATA__CSI_DATA13 0x00b8 0x0344 0x04f8 3 0 #define MX6UL_PAD_UART4_RX_DATA__CSU_CSU_ALARM_AUT01 0x00b8 0x0344 0x0000 4 0 #define MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x00b8 0x0344 0x0000 5 0 -#define MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0 0x00b8 0x0344 0x0000 8 0 +#define MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0 0x00b8 0x0344 0x0550 8 1 #define MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x00bc 0x0348 0x0000 5 0 #define MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI 0x00bc 0x0348 0x054c 8 0 #define MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x00bc 0x0348 0x0000 0 0 #define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00bc 0x0348 0x0644 0 4 #define MX6UL_PAD_UART5_TX_DATA__ENET2_CRS 0x00bc 0x0348 0x0000 1 0 #define MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x00bc 0x0348 0x05ac 2 2 -#define MX6UL_PAD_UART5_TX_DATA__CSI_DATA14 0x00bc 0x0348 0x0000 3 0 +#define MX6UL_PAD_UART5_TX_DATA__CSI_DATA14 0x00bc 0x0348 0x04fc 3 0 #define MX6UL_PAD_UART5_TX_DATA__CSU_CSU_ALARM_AUT00 0x00bc 0x0348 0x0000 4 0 #define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00c0 0x034c 0x0644 0 5 #define MX6UL_PAD_UART5_RX_DATA__UART5_DTE_TX 0x00c0 0x034c 0x0000 0 0 #define MX6UL_PAD_UART5_RX_DATA__ENET2_COL 0x00c0 0x034c 0x0000 1 0 #define MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x00c0 0x034c 0x05b0 2 2 -#define MX6UL_PAD_UART5_RX_DATA__CSI_DATA15 0x00c0 0x034c 0x0000 3 0 +#define MX6UL_PAD_UART5_RX_DATA__CSI_DATA15 0x00c0 0x034c 0x0500 3 0 #define MX6UL_PAD_UART5_RX_DATA__CSU_CSU_INT_DEB 0x00c0 0x034c 0x0000 4 0 #define MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x00c0 0x034c 0x0000 5 0 #define MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO 0x00c0 0x034c 0x0548 8 1 @@ -299,59 +299,61 @@ #define MX6UL_PAD_ENET1_RX_DATA0__UART4_DCE_RTS 0x00c4 0x0350 0x0638 1 0 #define MX6UL_PAD_ENET1_RX_DATA0__UART4_DTE_CTS 0x00c4 0x0350 0x0000 1 0 #define MX6UL_PAD_ENET1_RX_DATA0__PWM1_OUT 0x00c4 0x0350 0x0000 2 0 -#define MX6UL_PAD_ENET1_RX_DATA0__CSI_DATA16 0x00c4 0x0350 0x0000 3 0 +#define MX6UL_PAD_ENET1_RX_DATA0__CSI_DATA16 0x00c4 0x0350 0x0504 3 0 #define MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x00c4 0x0350 0x0000 4 0 #define MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x00c4 0x0350 0x0000 5 0 -#define MX6UL_PAD_ENET1_RX_DATA0__KPP_ROW00 0x00c4 0x0350 0x0000 6 0 +#define MX6UL_PAD_ENET1_RX_DATA0__KPP_ROW00 0x00c4 0x0350 0x05d0 6 0 #define MX6UL_PAD_ENET1_RX_DATA0__USDHC1_LCTL 0x00c4 0x0350 0x0000 8 0 #define MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x00c8 0x0354 0x0000 0 0 #define MX6UL_PAD_ENET1_RX_DATA1__UART4_DCE_CTS 0x00c8 0x0354 0x0000 1 0 #define MX6UL_PAD_ENET1_RX_DATA1__UART4_DTE_RTS 0x00c8 0x0354 0x0638 1 1 #define MX6UL_PAD_ENET1_RX_DATA1__PWM2_OUT 0x00c8 0x0354 0x0000 2 0 -#define MX6UL_PAD_ENET1_RX_DATA1__CSI_DATA17 0x00c8 0x0354 0x0000 3 0 +#define MX6UL_PAD_ENET1_RX_DATA1__CSI_DATA17 0x00c8 0x0354 0x0508 3 0 #define MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x00c8 0x0354 0x0584 4 1 #define MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x00c8 0x0354 0x0000 5 0 -#define MX6UL_PAD_ENET1_RX_DATA1__KPP_COL00 0x00c8 0x0354 0x0000 6 0 +#define MX6UL_PAD_ENET1_RX_DATA1__KPP_COL00 0x00c8 0x0354 0x05c4 6 0 #define MX6UL_PAD_ENET1_RX_DATA1__USDHC2_LCTL 0x00c8 0x0354 0x0000 8 0 #define MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x00cc 0x0358 0x0000 0 0 #define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00cc 0x0358 0x0640 1 3 #define MX6UL_PAD_ENET1_RX_EN__UART5_DTE_CTS 0x00cc 0x0358 0x0000 1 0 -#define MX6UL_PAD_ENET1_RX_EN__CSI_DATA18 0x00cc 0x0358 0x0000 3 0 +#define MX6UL_PAD_ENET1_RX_EN__OSC32K_32K_OUT 0x00cc 0x0358 0x0000 2 0 +#define MX6UL_PAD_ENET1_RX_EN__CSI_DATA18 0x00cc 0x0358 0x050c 3 0 #define MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x00cc 0x0358 0x0000 4 0 #define MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x00cc 0x0358 0x0000 5 0 -#define MX6UL_PAD_ENET1_RX_EN__KPP_ROW01 0x00cc 0x0358 0x0000 6 0 +#define MX6UL_PAD_ENET1_RX_EN__KPP_ROW01 0x00cc 0x0358 0x05d4 6 0 #define MX6UL_PAD_ENET1_RX_EN__USDHC1_VSELECT 0x00cc 0x0358 0x0000 8 0 #define MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x00d0 0x035c 0x0000 0 0 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DCE_CTS 0x00d0 0x035c 0x0000 1 0 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00d0 0x035c 0x0640 1 4 -#define MX6UL_PAD_ENET1_TX_DATA0__CSI_DATA19 0x00d0 0x035c 0x0000 3 0 +#define MX6UL_PAD_ENET1_TX_DATA0__REF_CLK_24M 0x00d0 0x035c 0x0000 2 0 +#define MX6UL_PAD_ENET1_TX_DATA0__CSI_DATA19 0x00d0 0x035c 0x0510 3 0 #define MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x00d0 0x035c 0x0588 4 1 #define MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x00d0 0x035c 0x0000 5 0 -#define MX6UL_PAD_ENET1_TX_DATA0__KPP_COL01 0x00d0 0x035c 0x0000 6 0 +#define MX6UL_PAD_ENET1_TX_DATA0__KPP_COL01 0x00d0 0x035c 0x05c8 6 0 #define MX6UL_PAD_ENET1_TX_DATA0__USDHC2_VSELECT 0x00d0 0x035c 0x0000 8 0 #define MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x00d4 0x0360 0x0000 0 0 #define MX6UL_PAD_ENET1_TX_DATA1__UART6_DCE_CTS 0x00d4 0x0360 0x0000 1 0 #define MX6UL_PAD_ENET1_TX_DATA1__UART6_DTE_RTS 0x00d4 0x0360 0x0648 1 2 #define MX6UL_PAD_ENET1_TX_DATA1__PWM5_OUT 0x00d4 0x0360 0x0000 2 0 -#define MX6UL_PAD_ENET1_TX_DATA1__CSI_DATA20 0x00d4 0x0360 0x0000 3 0 +#define MX6UL_PAD_ENET1_TX_DATA1__CSI_DATA20 0x00d4 0x0360 0x0514 3 0 #define MX6UL_PAD_ENET1_TX_DATA1__ENET2_MDIO 0x00d4 0x0360 0x0580 4 1 #define MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x00d4 0x0360 0x0000 5 0 -#define MX6UL_PAD_ENET1_TX_DATA1__KPP_ROW02 0x00d4 0x0360 0x0000 6 0 +#define MX6UL_PAD_ENET1_TX_DATA1__KPP_ROW02 0x00d4 0x0360 0x05d8 6 0 #define MX6UL_PAD_ENET1_TX_DATA1__WDOG1_WDOG_RST_B_DEB 0x00d4 0x0360 0x0000 8 0 #define MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x00d8 0x0364 0x0000 0 0 #define MX6UL_PAD_ENET1_TX_EN__UART6_DCE_RTS 0x00d8 0x0364 0x0648 1 3 #define MX6UL_PAD_ENET1_TX_EN__UART6_DTE_CTS 0x00d8 0x0364 0x0000 1 0 #define MX6UL_PAD_ENET1_TX_EN__PWM6_OUT 0x00d8 0x0364 0x0000 2 0 -#define MX6UL_PAD_ENET1_TX_EN__CSI_DATA21 0x00d8 0x0364 0x0000 3 0 +#define MX6UL_PAD_ENET1_TX_EN__CSI_DATA21 0x00d8 0x0364 0x0518 3 0 #define MX6UL_PAD_ENET1_TX_EN__ENET2_MDC 0x00d8 0x0364 0x0000 4 0 #define MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0x00d8 0x0364 0x0000 5 0 -#define MX6UL_PAD_ENET1_TX_EN__KPP_COL02 0x00d8 0x0364 0x0000 6 0 +#define MX6UL_PAD_ENET1_TX_EN__KPP_COL02 0x00d8 0x0364 0x05cc 6 0 #define MX6UL_PAD_ENET1_TX_EN__WDOG2_WDOG_RST_B_DEB 0x00d8 0x0364 0x0000 8 0 #define MX6UL_PAD_ENET1_TX_CLK__ENET1_TX_CLK 0x00dc 0x0368 0x0000 0 0 #define MX6UL_PAD_ENET1_TX_CLK__UART7_DCE_CTS 0x00dc 0x0368 0x0000 1 0 #define MX6UL_PAD_ENET1_TX_CLK__UART7_DTE_RTS 0x00dc 0x0368 0x0650 1 0 #define MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x00dc 0x0368 0x0000 2 0 -#define MX6UL_PAD_ENET1_TX_CLK__CSI_DATA22 0x00dc 0x0368 0x0000 3 0 +#define MX6UL_PAD_ENET1_TX_CLK__CSI_DATA22 0x00dc 0x0368 0x051c 3 0 #define MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x00dc 0x0368 0x0574 4 2 #define MX6UL_PAD_ENET1_TX_CLK__GPIO2_IO06 0x00dc 0x0368 0x0000 5 0 #define MX6UL_PAD_ENET1_TX_CLK__KPP_ROW03 0x00dc 0x0368 0x0000 6 0 @@ -360,7 +362,7 @@ #define MX6UL_PAD_ENET1_RX_ER__UART7_DCE_RTS 0x00e0 0x036c 0x0650 1 1 #define MX6UL_PAD_ENET1_RX_ER__UART7_DTE_CTS 0x00e0 0x036c 0x0000 1 0 #define MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x00e0 0x036c 0x0000 2 0 -#define MX6UL_PAD_ENET1_RX_ER__CSI_DATA23 0x00e0 0x036c 0x0000 3 0 +#define MX6UL_PAD_ENET1_RX_ER__CSI_DATA23 0x00e0 0x036c 0x0520 3 0 #define MX6UL_PAD_ENET1_RX_ER__EIM_CRE 0x00e0 0x036c 0x0000 4 0 #define MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07 0x00e0 0x036c 0x0000 5 0 #define MX6UL_PAD_ENET1_RX_ER__KPP_COL03 0x00e0 0x036c 0x0000 6 0 @@ -377,7 +379,7 @@ #define MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x00e8 0x0374 0x0000 0 0 #define MX6UL_PAD_ENET2_RX_DATA1__UART6_DCE_RX 0x00e8 0x0374 0x064c 1 2 #define MX6UL_PAD_ENET2_RX_DATA1__UART6_DTE_TX 0x00e8 0x0374 0x0000 1 0 -#define MX6UL_PAD_ENET2_RX_DATA1__SIM1_PORT0_cLK 0x00e8 0x0374 0x0000 2 0 +#define MX6UL_PAD_ENET2_RX_DATA1__SIM1_PORT0_CLK 0x00e8 0x0374 0x0000 2 0 #define MX6UL_PAD_ENET2_RX_DATA1__I2C3_SDA 0x00e8 0x0374 0x05b8 3 1 #define MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC 0x00e8 0x0374 0x0000 4 0 #define MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x00e8 0x0374 0x0000 5 0 @@ -400,6 +402,7 @@ #define MX6UL_PAD_ENET2_TX_DATA0__EIM_EB_B02 0x00f0 0x037c 0x0000 4 0 #define MX6UL_PAD_ENET2_TX_DATA0__GPIO2_IO11 0x00f0 0x037c 0x0000 5 0 #define MX6UL_PAD_ENET2_TX_DATA0__KPP_COL05 0x00f0 0x037c 0x0000 6 0 +#define MX6UL_PAD_ENET2_TX_DATA0__REF_CLK_24M 0x00f0 0x037c 0x0000 8 0 #define MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x00f4 0x0380 0x0000 0 0 #define MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX 0x00f4 0x0380 0x0000 1 0 #define MX6UL_PAD_ENET2_TX_DATA1__UART8_DTE_RX 0x00f4 0x0380 0x065c 1 0 @@ -412,7 +415,7 @@ #define MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x00f8 0x0384 0x0000 0 0 #define MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX 0x00f8 0x0384 0x065c 1 1 #define MX6UL_PAD_ENET2_TX_EN__UART8_DTE_TX 0x00f8 0x0384 0x0000 1 0 -#define MX6UL_PAD_ENET2_TX_EN__SIM2_PORT0_cLK 0x00f8 0x0384 0x0000 2 0 +#define MX6UL_PAD_ENET2_TX_EN__SIM2_PORT0_CLK 0x00f8 0x0384 0x0000 2 0 #define MX6UL_PAD_ENET2_TX_EN__ECSPI4_MOSI 0x00f8 0x0384 0x056c 3 0 #define MX6UL_PAD_ENET2_TX_EN__EIM_ACLK_FREERUN 0x00f8 0x0384 0x0000 4 0 #define MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x00f8 0x0384 0x0000 5 0 @@ -431,7 +434,7 @@ #define MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS 0x0100 0x038c 0x0658 1 1 #define MX6UL_PAD_ENET2_RX_ER__UART8_DTE_CTS 0x0100 0x038c 0x0000 1 0 #define MX6UL_PAD_ENET2_RX_ER__SIM2_PORT0_SVEN 0x0100 0x038c 0x0000 2 0 -#define MX6UL_PAD_ENET2_RX_ER__ECSPI4_SS0 0x0100 0x038c 0x0000 3 0 +#define MX6UL_PAD_ENET2_RX_ER__ECSPI4_SS0 0x0100 0x038c 0x0570 3 0 #define MX6UL_PAD_ENET2_RX_ER__EIM_ADDR25 0x0100 0x038c 0x0000 4 0 #define MX6UL_PAD_ENET2_RX_ER__GPIO2_IO15 0x0100 0x038c 0x0000 5 0 #define MX6UL_PAD_ENET2_RX_ER__KPP_COL07 0x0100 0x038c 0x0000 6 0 @@ -440,7 +443,7 @@ #define MX6UL_PAD_LCD_CLK__LCDIF_WR_RWN 0x0104 0x0390 0x0000 1 0 #define MX6UL_PAD_LCD_CLK__UART4_DCE_TX 0x0104 0x0390 0x0000 2 0 #define MX6UL_PAD_LCD_CLK__UART4_DTE_RX 0x0104 0x0390 0x063c 2 2 -#define MX6UL_PAD_LCD_CLK__SAI3_MCLK 0x0104 0x0390 0x0000 3 0 +#define MX6UL_PAD_LCD_CLK__SAI3_MCLK 0x0104 0x0390 0x0600 3 0 #define MX6UL_PAD_LCD_CLK__EIM_CS2_B 0x0104 0x0390 0x0000 4 0 #define MX6UL_PAD_LCD_CLK__GPIO3_IO00 0x0104 0x0390 0x0000 5 0 #define MX6UL_PAD_LCD_CLK__WDOG1_WDOG_RST_B_DEB 0x0104 0x0390 0x0000 8 0 @@ -464,7 +467,7 @@ #define MX6UL_PAD_LCD_VSYNC__LCDIF_BUSY 0x0110 0x039c 0x05dc 1 1 #define MX6UL_PAD_LCD_VSYNC__UART4_DCE_RTS 0x0110 0x039c 0x0638 2 3 #define MX6UL_PAD_LCD_VSYNC__UART4_DTE_CTS 0x0110 0x039c 0x0000 2 0 -#define MX6UL_PAD_LCD_VSYNC__SAI3_RX_DATA 0x0110 0x039c 0x0000 3 0 +#define MX6UL_PAD_LCD_VSYNC__SAI3_RX_DATA 0x0110 0x039c 0x0604 3 0 #define MX6UL_PAD_LCD_VSYNC__WDOG2_WDOG_B 0x0110 0x039c 0x0000 4 0 #define MX6UL_PAD_LCD_VSYNC__GPIO3_IO03 0x0110 0x039c 0x0000 5 0 #define MX6UL_PAD_LCD_VSYNC__ECSPI2_SS2 0x0110 0x039c 0x0000 8 0 @@ -477,13 +480,15 @@ #define MX6UL_PAD_LCD_RESET__ECSPI2_SS3 0x0114 0x03a0 0x0000 8 0 #define MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x0118 0x03a4 0x0000 0 0 #define MX6UL_PAD_LCD_DATA00__PWM1_OUT 0x0118 0x03a4 0x0000 1 0 +#define MX6UL_PAD_LCD_DATA00__CA7_MX6UL_TRACE0 0x0118 0x03a4 0x0000 2 0 #define MX6UL_PAD_LCD_DATA00__ENET1_1588_EVENT2_IN 0x0118 0x03a4 0x0000 3 0 #define MX6UL_PAD_LCD_DATA00__I2C3_SDA 0x0118 0x03a4 0x05b8 4 2 #define MX6UL_PAD_LCD_DATA00__GPIO3_IO05 0x0118 0x03a4 0x0000 5 0 #define MX6UL_PAD_LCD_DATA00__SRC_BT_CFG00 0x0118 0x03a4 0x0000 6 0 -#define MX6UL_PAD_LCD_DATA00__SAI1_MCLK 0x0118 0x03a4 0x0000 8 0 +#define MX6UL_PAD_LCD_DATA00__SAI1_MCLK 0x0118 0x03a4 0x05e0 8 1 #define MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x011c 0x03a8 0x0000 0 0 #define MX6UL_PAD_LCD_DATA01__PWM2_OUT 0x011c 0x03a8 0x0000 1 0 +#define MX6UL_PAD_LCD_DATA01__CA7_MX6UL_TRACE1 0x011c 0x03a8 0x0000 2 0 #define MX6UL_PAD_LCD_DATA01__ENET1_1588_EVENT2_OUT 0x011c 0x03a8 0x0000 3 0 #define MX6UL_PAD_LCD_DATA01__I2C3_SCL 0x011c 0x03a8 0x05b4 4 2 #define MX6UL_PAD_LCD_DATA01__GPIO3_IO06 0x011c 0x03a8 0x0000 5 0 @@ -491,6 +496,7 @@ #define MX6UL_PAD_LCD_DATA01__SAI1_TX_SYNC 0x011c 0x03a8 0x05ec 8 0 #define MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x0120 0x03ac 0x0000 0 0 #define MX6UL_PAD_LCD_DATA02__PWM3_OUT 0x0120 0x03ac 0x0000 1 0 +#define MX6UL_PAD_LCD_DATA02__CA7_MX6UL_TRACE2 0x0120 0x03ac 0x0000 2 0 #define MX6UL_PAD_LCD_DATA02__ENET1_1588_EVENT3_IN 0x0120 0x03ac 0x0000 3 0 #define MX6UL_PAD_LCD_DATA02__I2C4_SDA 0x0120 0x03ac 0x05c0 4 2 #define MX6UL_PAD_LCD_DATA02__GPIO3_IO07 0x0120 0x03ac 0x0000 5 0 @@ -498,14 +504,16 @@ #define MX6UL_PAD_LCD_DATA02__SAI1_TX_BCLK 0x0120 0x03ac 0x05e8 8 0 #define MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x0124 0x03b0 0x0000 0 0 #define MX6UL_PAD_LCD_DATA03__PWM4_OUT 0x0124 0x03b0 0x0000 1 0 +#define MX6UL_PAD_LCD_DATA03__CA7_MX6UL_TRACE3 0x0124 0x03b0 0x0000 2 0 #define MX6UL_PAD_LCD_DATA03__ENET1_1588_EVENT3_OUT 0x0124 0x03b0 0x0000 3 0 #define MX6UL_PAD_LCD_DATA03__I2C4_SCL 0x0124 0x03b0 0x05bc 4 2 #define MX6UL_PAD_LCD_DATA03__GPIO3_IO08 0x0124 0x03b0 0x0000 5 0 #define MX6UL_PAD_LCD_DATA03__SRC_BT_CFG03 0x0124 0x03b0 0x0000 6 0 -#define MX6UL_PAD_LCD_DATA03__SAI1_RX_DATA 0x0124 0x03b0 0x0000 8 0 +#define MX6UL_PAD_LCD_DATA03__SAI1_RX_DATA 0x0124 0x03b0 0x05e4 8 0 #define MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x0128 0x03b4 0x0000 0 0 #define MX6UL_PAD_LCD_DATA04__UART8_DCE_CTS 0x0128 0x03b4 0x0000 1 0 #define MX6UL_PAD_LCD_DATA04__UART8_DTE_RTS 0x0128 0x03b4 0x0658 1 2 +#define MX6UL_PAD_LCD_DATA04__CA7_MX6UL_TRACE4 0x0128 0x03b4 0x0000 2 0 #define MX6UL_PAD_LCD_DATA04__ENET2_1588_EVENT2_IN 0x0128 0x03b4 0x0000 3 0 #define MX6UL_PAD_LCD_DATA04__SPDIF_SR_CLK 0x0128 0x03b4 0x0000 4 0 #define MX6UL_PAD_LCD_DATA04__GPIO3_IO09 0x0128 0x03b4 0x0000 5 0 @@ -514,6 +522,7 @@ #define MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x012c 0x03b8 0x0000 0 0 #define MX6UL_PAD_LCD_DATA05__UART8_DCE_RTS 0x012c 0x03b8 0x0658 1 3 #define MX6UL_PAD_LCD_DATA05__UART8_DTE_CTS 0x012c 0x03b8 0x0000 1 0 +#define MX6UL_PAD_LCD_DATA05__CA7_MX6UL_TRACE5 0x012c 0x03b8 0x0000 2 0 #define MX6UL_PAD_LCD_DATA05__ENET2_1588_EVENT2_OUT 0x012c 0x03b8 0x0000 3 0 #define MX6UL_PAD_LCD_DATA05__SPDIF_OUT 0x012c 0x03b8 0x0000 4 0 #define MX6UL_PAD_LCD_DATA05__GPIO3_IO10 0x012c 0x03b8 0x0000 5 0 @@ -522,6 +531,7 @@ #define MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x0130 0x03bc 0x0000 0 0 #define MX6UL_PAD_LCD_DATA06__UART7_DCE_CTS 0x0130 0x03bc 0x0000 1 0 #define MX6UL_PAD_LCD_DATA06__UART7_DTE_RTS 0x0130 0x03bc 0x0650 1 2 +#define MX6UL_PAD_LCD_DATA06__CA7_MX6UL_TRACE6 0x0130 0x03bc 0x0000 2 0 #define MX6UL_PAD_LCD_DATA06__ENET2_1588_EVENT3_IN 0x0130 0x03bc 0x0000 3 0 #define MX6UL_PAD_LCD_DATA06__SPDIF_LOCK 0x0130 0x03bc 0x0000 4 0 #define MX6UL_PAD_LCD_DATA06__GPIO3_IO11 0x0130 0x03bc 0x0000 5 0 @@ -530,6 +540,7 @@ #define MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x0134 0x03c0 0x0000 0 0 #define MX6UL_PAD_LCD_DATA07__UART7_DCE_RTS 0x0134 0x03c0 0x0650 1 3 #define MX6UL_PAD_LCD_DATA07__UART7_DTE_CTS 0x0134 0x03c0 0x0000 1 0 +#define MX6UL_PAD_LCD_DATA07__CA7_MX6UL_TRACE7 0x0134 0x03c0 0x0000 2 0 #define MX6UL_PAD_LCD_DATA07__ENET2_1588_EVENT3_OUT 0x0134 0x03c0 0x0000 3 0 #define MX6UL_PAD_LCD_DATA07__SPDIF_EXT_CLK 0x0134 0x03c0 0x061c 4 0 #define MX6UL_PAD_LCD_DATA07__GPIO3_IO12 0x0134 0x03c0 0x0000 5 0 @@ -537,56 +548,64 @@ #define MX6UL_PAD_LCD_DATA07__ECSPI1_SS3 0x0134 0x03c0 0x0000 8 0 #define MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x0138 0x03c4 0x0000 0 0 #define MX6UL_PAD_LCD_DATA08__SPDIF_IN 0x0138 0x03c4 0x0618 1 2 -#define MX6UL_PAD_LCD_DATA08__CSI_DATA16 0x0138 0x03c4 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA08__CA7_MX6UL_TRACE8 0x0138 0x03c4 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA08__CSI_DATA16 0x0138 0x03c4 0x0504 3 1 #define MX6UL_PAD_LCD_DATA08__EIM_DATA00 0x0138 0x03c4 0x0000 4 0 #define MX6UL_PAD_LCD_DATA08__GPIO3_IO13 0x0138 0x03c4 0x0000 5 0 #define MX6UL_PAD_LCD_DATA08__SRC_BT_CFG08 0x0138 0x03c4 0x0000 6 0 #define MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x0138 0x03c4 0x0000 8 0 #define MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x013c 0x03c8 0x0000 0 0 -#define MX6UL_PAD_LCD_DATA09__SAI3_MCLK 0x013c 0x03c8 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA09__CSI_DATA17 0x013c 0x03c8 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA09__SAI3_MCLK 0x013c 0x03c8 0x0600 1 1 +#define MX6UL_PAD_LCD_DATA09__CA7_MX6UL_TRACE9 0x013c 0x03c8 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA09__CSI_DATA17 0x013c 0x03c8 0x0508 3 1 #define MX6UL_PAD_LCD_DATA09__EIM_DATA01 0x013c 0x03c8 0x0000 4 0 #define MX6UL_PAD_LCD_DATA09__GPIO3_IO14 0x013c 0x03c8 0x0000 5 0 #define MX6UL_PAD_LCD_DATA09__SRC_BT_CFG09 0x013c 0x03c8 0x0000 6 0 #define MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x013c 0x03c8 0x0584 8 2 #define MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x0140 0x03cc 0x0000 0 0 #define MX6UL_PAD_LCD_DATA10__SAI3_RX_SYNC 0x0140 0x03cc 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA10__CSI_DATA18 0x0140 0x03cc 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA10__CA7_MX6UL_TRACE10 0x0140 0x03cc 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA10__CSI_DATA18 0x0140 0x03cc 0x050c 3 1 #define MX6UL_PAD_LCD_DATA10__EIM_DATA02 0x0140 0x03cc 0x0000 4 0 #define MX6UL_PAD_LCD_DATA10__GPIO3_IO15 0x0140 0x03cc 0x0000 5 0 #define MX6UL_PAD_LCD_DATA10__SRC_BT_CFG10 0x0140 0x03cc 0x0000 6 0 #define MX6UL_PAD_LCD_DATA10__FLEXCAN2_TX 0x0140 0x03cc 0x0000 8 0 #define MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x0144 0x03d0 0x0000 0 0 #define MX6UL_PAD_LCD_DATA11__SAI3_RX_BCLK 0x0144 0x03d0 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA11__CSI_DATA19 0x0144 0x03d0 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA11__CA7_MX6UL_TRACE11 0x0144 0x03d0 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA11__CSI_DATA19 0x0144 0x03d0 0x0510 3 1 #define MX6UL_PAD_LCD_DATA11__EIM_DATA03 0x0144 0x03d0 0x0000 4 0 #define MX6UL_PAD_LCD_DATA11__GPIO3_IO16 0x0144 0x03d0 0x0000 5 0 #define MX6UL_PAD_LCD_DATA11__SRC_BT_CFG11 0x0144 0x03d0 0x0000 6 0 #define MX6UL_PAD_LCD_DATA11__FLEXCAN2_RX 0x0144 0x03d0 0x0588 8 2 #define MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x0148 0x03d4 0x0000 0 0 #define MX6UL_PAD_LCD_DATA12__SAI3_TX_SYNC 0x0148 0x03d4 0x060c 1 1 -#define MX6UL_PAD_LCD_DATA12__CSI_DATA20 0x0148 0x03d4 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA12__CA7_MX6UL_TRACE12 0x0148 0x03d4 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA12__CSI_DATA20 0x0148 0x03d4 0x0514 3 1 #define MX6UL_PAD_LCD_DATA12__EIM_DATA04 0x0148 0x03d4 0x0000 4 0 #define MX6UL_PAD_LCD_DATA12__GPIO3_IO17 0x0148 0x03d4 0x0000 5 0 #define MX6UL_PAD_LCD_DATA12__SRC_BT_CFG12 0x0148 0x03d4 0x0000 6 0 #define MX6UL_PAD_LCD_DATA12__ECSPI1_RDY 0x0148 0x03d4 0x0000 8 0 #define MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x014c 0x03d8 0x0000 0 0 #define MX6UL_PAD_LCD_DATA13__SAI3_TX_BCLK 0x014c 0x03d8 0x0608 1 1 -#define MX6UL_PAD_LCD_DATA13__CSI_DATA21 0x014c 0x03d8 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA13__CA7_MX6UL_TRACE13 0x014c 0x03d8 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA13__CSI_DATA21 0x014c 0x03d8 0x0518 3 1 #define MX6UL_PAD_LCD_DATA13__EIM_DATA05 0x014c 0x03d8 0x0000 4 0 #define MX6UL_PAD_LCD_DATA13__GPIO3_IO18 0x014c 0x03d8 0x0000 5 0 #define MX6UL_PAD_LCD_DATA13__SRC_BT_CFG13 0x014c 0x03d8 0x0000 6 0 #define MX6UL_PAD_LCD_DATA13__USDHC2_RESET_B 0x014c 0x03d8 0x0000 8 0 #define MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x0150 0x03dc 0x0000 0 0 -#define MX6UL_PAD_LCD_DATA14__SAI3_RX_DATA 0x0150 0x03dc 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA14__CSI_DATA22 0x0150 0x03dc 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA14__SAI3_RX_DATA 0x0150 0x03dc 0x0604 1 1 +#define MX6UL_PAD_LCD_DATA14__CA7_MX6UL_TRACE14 0x0150 0x03dc 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA14__CSI_DATA22 0x0150 0x03dc 0x051c 3 1 #define MX6UL_PAD_LCD_DATA14__EIM_DATA06 0x0150 0x03dc 0x0000 4 0 #define MX6UL_PAD_LCD_DATA14__GPIO3_IO19 0x0150 0x03dc 0x0000 5 0 #define MX6UL_PAD_LCD_DATA14__SRC_BT_CFG14 0x0150 0x03dc 0x0000 6 0 #define MX6UL_PAD_LCD_DATA14__USDHC2_DATA4 0x0150 0x03dc 0x068c 8 0 #define MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x0154 0x03e0 0x0000 0 0 #define MX6UL_PAD_LCD_DATA15__SAI3_TX_DATA 0x0154 0x03e0 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA15__CSI_DATA23 0x0154 0x03e0 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA15__CA7_MX6UL_TRACE15 0x0154 0x03e0 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA15__CSI_DATA23 0x0154 0x03e0 0x0520 3 1 #define MX6UL_PAD_LCD_DATA15__EIM_DATA07 0x0154 0x03e0 0x0000 4 0 #define MX6UL_PAD_LCD_DATA15__GPIO3_IO20 0x0154 0x03e0 0x0000 5 0 #define MX6UL_PAD_LCD_DATA15__SRC_BT_CFG15 0x0154 0x03e0 0x0000 6 0 @@ -594,7 +613,8 @@ #define MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x0158 0x03e4 0x0000 0 0 #define MX6UL_PAD_LCD_DATA16__UART7_DCE_TX 0x0158 0x03e4 0x0000 1 0 #define MX6UL_PAD_LCD_DATA16__UART7_DTE_RX 0x0158 0x03e4 0x0654 1 2 -#define MX6UL_PAD_LCD_DATA16__CSI_DATA01 0x0158 0x03e4 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA16__CA7_MX6UL_TRACE_CLK 0x0158 0x03e4 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA16__CSI_DATA01 0x0158 0x03e4 0x04d4 3 1 #define MX6UL_PAD_LCD_DATA16__EIM_DATA08 0x0158 0x03e4 0x0000 4 0 #define MX6UL_PAD_LCD_DATA16__GPIO3_IO21 0x0158 0x03e4 0x0000 5 0 #define MX6UL_PAD_LCD_DATA16__SRC_BT_CFG24 0x0158 0x03e4 0x0000 6 0 @@ -602,7 +622,8 @@ #define MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x015c 0x03e8 0x0000 0 0 #define MX6UL_PAD_LCD_DATA17__UART7_DCE_RX 0x015c 0x03e8 0x0654 1 3 #define MX6UL_PAD_LCD_DATA17__UART7_DTE_TX 0x015c 0x03e8 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA17__CSI_DATA00 0x015c 0x03e8 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA17__CA7_MX6UL_TRACE_CTL 0x015c 0x03e8 0x0000 2 0 +#define MX6UL_PAD_LCD_DATA17__CSI_DATA00 0x015c 0x03e8 0x04d0 3 1 #define MX6UL_PAD_LCD_DATA17__EIM_DATA09 0x015c 0x03e8 0x0000 4 0 #define MX6UL_PAD_LCD_DATA17__GPIO3_IO22 0x015c 0x03e8 0x0000 5 0 #define MX6UL_PAD_LCD_DATA17__SRC_BT_CFG25 0x015c 0x03e8 0x0000 6 0 @@ -610,7 +631,7 @@ #define MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x0160 0x03ec 0x0000 0 0 #define MX6UL_PAD_LCD_DATA18__PWM5_OUT 0x0160 0x03ec 0x0000 1 0 #define MX6UL_PAD_LCD_DATA18__CA7_MX6UL_EVENTO 0x0160 0x03ec 0x0000 2 0 -#define MX6UL_PAD_LCD_DATA18__CSI_DATA10 0x0160 0x03ec 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA18__CSI_DATA10 0x0160 0x03ec 0x04ec 3 1 #define MX6UL_PAD_LCD_DATA18__EIM_DATA10 0x0160 0x03ec 0x0000 4 0 #define MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x0160 0x03ec 0x0000 5 0 #define MX6UL_PAD_LCD_DATA18__SRC_BT_CFG26 0x0160 0x03ec 0x0000 6 0 @@ -622,7 +643,7 @@ #define MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x0164 0x03f0 0x0000 0 0 #define MX6UL_PAD_LCD_DATA19__PWM6_OUT 0x0164 0x03f0 0x0000 1 0 #define MX6UL_PAD_LCD_DATA19__WDOG1_WDOG_ANY 0x0164 0x03f0 0x0000 2 0 -#define MX6UL_PAD_LCD_DATA19__CSI_DATA11 0x0164 0x03f0 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA19__CSI_DATA11 0x0164 0x03f0 0x04f0 3 1 #define MX6UL_PAD_LCD_DATA20__EIM_DATA12 0x0168 0x03f4 0x0000 4 0 #define MX6UL_PAD_LCD_DATA20__GPIO3_IO25 0x0168 0x03f4 0x0000 5 0 #define MX6UL_PAD_LCD_DATA20__SRC_BT_CFG28 0x0168 0x03f4 0x0000 6 0 @@ -631,12 +652,12 @@ #define MX6UL_PAD_LCD_DATA20__UART8_DCE_TX 0x0168 0x03f4 0x0000 1 0 #define MX6UL_PAD_LCD_DATA20__UART8_DTE_RX 0x0168 0x03f4 0x065c 1 2 #define MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x0168 0x03f4 0x0534 2 0 -#define MX6UL_PAD_LCD_DATA20__CSI_DATA12 0x0168 0x03f4 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA20__CSI_DATA12 0x0168 0x03f4 0x04f4 3 1 #define MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x016c 0x03f8 0x0000 0 0 #define MX6UL_PAD_LCD_DATA21__UART8_DCE_RX 0x016c 0x03f8 0x065c 1 3 #define MX6UL_PAD_LCD_DATA21__UART8_DTE_TX 0x016c 0x03f8 0x0000 1 0 -#define MX6UL_PAD_LCD_DATA21__ECSPI1_SS0 0x016c 0x03f8 0x0000 2 0 -#define MX6UL_PAD_LCD_DATA21__CSI_DATA13 0x016c 0x03f8 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA21__ECSPI1_SS0 0x016c 0x03f8 0x0540 2 0 +#define MX6UL_PAD_LCD_DATA21__CSI_DATA13 0x016c 0x03f8 0x04f8 3 1 #define MX6UL_PAD_LCD_DATA21__EIM_DATA13 0x016c 0x03f8 0x0000 4 0 #define MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x016c 0x03f8 0x0000 5 0 #define MX6UL_PAD_LCD_DATA21__SRC_BT_CFG29 0x016c 0x03f8 0x0000 6 0 @@ -644,7 +665,7 @@ #define MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x0170 0x03fc 0x0000 0 0 #define MX6UL_PAD_LCD_DATA22__MQS_RIGHT 0x0170 0x03fc 0x0000 1 0 #define MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x0170 0x03fc 0x053c 2 0 -#define MX6UL_PAD_LCD_DATA22__CSI_DATA14 0x0170 0x03fc 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA22__CSI_DATA14 0x0170 0x03fc 0x04fc 3 1 #define MX6UL_PAD_LCD_DATA22__EIM_DATA14 0x0170 0x03fc 0x0000 4 0 #define MX6UL_PAD_LCD_DATA22__GPIO3_IO27 0x0170 0x03fc 0x0000 5 0 #define MX6UL_PAD_LCD_DATA22__SRC_BT_CFG30 0x0170 0x03fc 0x0000 6 0 @@ -652,7 +673,7 @@ #define MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x0174 0x0400 0x0000 0 0 #define MX6UL_PAD_LCD_DATA23__MQS_LEFT 0x0174 0x0400 0x0000 1 0 #define MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x0174 0x0400 0x0538 2 0 -#define MX6UL_PAD_LCD_DATA23__CSI_DATA15 0x0174 0x0400 0x0000 3 0 +#define MX6UL_PAD_LCD_DATA23__CSI_DATA15 0x0174 0x0400 0x0500 3 1 #define MX6UL_PAD_LCD_DATA23__EIM_DATA15 0x0174 0x0400 0x0000 4 0 #define MX6UL_PAD_LCD_DATA23__GPIO3_IO28 0x0174 0x0400 0x0000 5 0 #define MX6UL_PAD_LCD_DATA23__SRC_BT_CFG31 0x0174 0x0400 0x0000 6 0 @@ -660,42 +681,42 @@ #define MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x0178 0x0404 0x0000 0 0 #define MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x0178 0x0404 0x0670 1 2 #define MX6UL_PAD_NAND_RE_B__QSPI_B_SCLK 0x0178 0x0404 0x0000 2 0 -#define MX6UL_PAD_NAND_RE_B__KPP_ROW00 0x0178 0x0404 0x0000 3 0 +#define MX6UL_PAD_NAND_RE_B__KPP_ROW00 0x0178 0x0404 0x05d0 3 1 #define MX6UL_PAD_NAND_RE_B__EIM_EB_B00 0x0178 0x0404 0x0000 4 0 #define MX6UL_PAD_NAND_RE_B__GPIO4_IO00 0x0178 0x0404 0x0000 5 0 #define MX6UL_PAD_NAND_RE_B__ECSPI3_SS2 0x0178 0x0404 0x0000 8 0 #define MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x017c 0x0408 0x0000 0 0 #define MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x017c 0x0408 0x0678 1 2 #define MX6UL_PAD_NAND_WE_B__QSPI_B_SS0_B 0x017c 0x0408 0x0000 2 0 -#define MX6UL_PAD_NAND_WE_B__KPP_COL00 0x017c 0x0408 0x0000 3 0 +#define MX6UL_PAD_NAND_WE_B__KPP_COL00 0x017c 0x0408 0x05c4 3 1 #define MX6UL_PAD_NAND_WE_B__EIM_EB_B01 0x017c 0x0408 0x0000 4 0 #define MX6UL_PAD_NAND_WE_B__GPIO4_IO01 0x017c 0x0408 0x0000 5 0 #define MX6UL_PAD_NAND_WE_B__ECSPI3_SS3 0x017c 0x0408 0x0000 8 0 #define MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x0180 0x040c 0x0000 0 0 #define MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x0180 0x040c 0x067c 1 2 #define MX6UL_PAD_NAND_DATA00__QSPI_B_SS1_B 0x0180 0x040c 0x0000 2 0 -#define MX6UL_PAD_NAND_DATA00__KPP_ROW01 0x0180 0x040c 0x0000 3 0 +#define MX6UL_PAD_NAND_DATA00__KPP_ROW01 0x0180 0x040c 0x05d4 3 1 #define MX6UL_PAD_NAND_DATA00__EIM_AD08 0x0180 0x040c 0x0000 4 0 #define MX6UL_PAD_NAND_DATA00__GPIO4_IO02 0x0180 0x040c 0x0000 5 0 #define MX6UL_PAD_NAND_DATA00__ECSPI4_RDY 0x0180 0x040c 0x0000 8 0 #define MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x0184 0x0410 0x0000 0 0 #define MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x0184 0x0410 0x0680 1 2 #define MX6UL_PAD_NAND_DATA01__QSPI_B_DQS 0x0184 0x0410 0x0000 2 0 -#define MX6UL_PAD_NAND_DATA01__KPP_COL01 0x0184 0x0410 0x0000 3 0 +#define MX6UL_PAD_NAND_DATA01__KPP_COL01 0x0184 0x0410 0x05c8 3 1 #define MX6UL_PAD_NAND_DATA01__EIM_AD09 0x0184 0x0410 0x0000 4 0 #define MX6UL_PAD_NAND_DATA01__GPIO4_IO03 0x0184 0x0410 0x0000 5 0 #define MX6UL_PAD_NAND_DATA01__ECSPI4_SS1 0x0184 0x0410 0x0000 8 0 #define MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x0188 0x0414 0x0000 0 0 #define MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x0188 0x0414 0x0684 1 1 #define MX6UL_PAD_NAND_DATA02__QSPI_B_DATA00 0x0188 0x0414 0x0000 2 0 -#define MX6UL_PAD_NAND_DATA02__KPP_ROW02 0x0188 0x0414 0x0000 3 0 +#define MX6UL_PAD_NAND_DATA02__KPP_ROW02 0x0188 0x0414 0x05d8 3 1 #define MX6UL_PAD_NAND_DATA02__EIM_AD10 0x0188 0x0414 0x0000 4 0 #define MX6UL_PAD_NAND_DATA02__GPIO4_IO04 0x0188 0x0414 0x0000 5 0 #define MX6UL_PAD_NAND_DATA02__ECSPI4_SS2 0x0188 0x0414 0x0000 8 0 #define MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x018c 0x0418 0x0000 0 0 #define MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x018c 0x0418 0x0688 1 2 #define MX6UL_PAD_NAND_DATA03__QSPI_B_DATA01 0x018c 0x0418 0x0000 2 0 -#define MX6UL_PAD_NAND_DATA03__KPP_COL02 0x018c 0x0418 0x0000 3 0 +#define MX6UL_PAD_NAND_DATA03__KPP_COL02 0x018c 0x0418 0x05cc 3 1 #define MX6UL_PAD_NAND_DATA03__EIM_AD11 0x018c 0x0418 0x0000 4 0 #define MX6UL_PAD_NAND_DATA03__GPIO4_IO05 0x018c 0x0418 0x0000 5 0 #define MX6UL_PAD_NAND_DATA03__ECSPI4_SS3 0x018c 0x0418 0x0000 8 0 @@ -726,7 +747,7 @@ #define MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x019c 0x0428 0x0000 0 0 #define MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x019c 0x0428 0x0698 1 1 #define MX6UL_PAD_NAND_DATA07__QSPI_A_SS1_B 0x019c 0x0428 0x0000 2 0 -#define MX6UL_PAD_NAND_DATA07__ECSPI4_SS0 0x019c 0x0428 0x0000 3 0 +#define MX6UL_PAD_NAND_DATA07__ECSPI4_SS0 0x019c 0x0428 0x0570 3 1 #define MX6UL_PAD_NAND_DATA07__EIM_AD15 0x019c 0x0428 0x0000 4 0 #define MX6UL_PAD_NAND_DATA07__GPIO4_IO09 0x019c 0x0428 0x0000 5 0 #define MX6UL_PAD_NAND_DATA07__UART2_DCE_RTS 0x019c 0x0428 0x0628 8 5 @@ -748,7 +769,7 @@ #define MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x01a8 0x0434 0x0000 0 0 #define MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x01a8 0x0434 0x0000 1 0 #define MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x01a8 0x0434 0x0000 2 0 -#define MX6UL_PAD_NAND_READY_B__ECSPI3_SS0 0x01a8 0x0434 0x0000 3 0 +#define MX6UL_PAD_NAND_READY_B__ECSPI3_SS0 0x01a8 0x0434 0x0560 3 1 #define MX6UL_PAD_NAND_READY_B__EIM_CS1_B 0x01a8 0x0434 0x0000 4 0 #define MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x01a8 0x0434 0x0000 5 0 #define MX6UL_PAD_NAND_READY_B__UART3_DCE_TX 0x01a8 0x0434 0x0000 8 0 @@ -783,7 +804,7 @@ #define MX6UL_PAD_NAND_DQS__PWM5_OUT 0x01b8 0x0444 0x0000 3 0 #define MX6UL_PAD_NAND_DQS__EIM_WAIT 0x01b8 0x0444 0x0000 4 0 #define MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x01b8 0x0444 0x0000 5 0 -#define MX6UL_PAD_NAND_DQS__SDMA_EXT_EVENT01 0x01b8 0x0444 0x0000 6 0 +#define MX6UL_PAD_NAND_DQS__SDMA_EXT_EVENT01 0x01b8 0x0444 0x0614 6 1 #define MX6UL_PAD_NAND_DQS__SPDIF_EXT_CLK 0x01b8 0x0444 0x061c 8 1 #define MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x01bc 0x0448 0x0000 0 0 #define MX6UL_PAD_SD1_CMD__GPT2_COMPARE1 0x01bc 0x0448 0x0000 1 0 @@ -791,11 +812,11 @@ #define MX6UL_PAD_SD1_CMD__SPDIF_OUT 0x01bc 0x0448 0x0000 3 0 #define MX6UL_PAD_SD1_CMD__EIM_ADDR19 0x01bc 0x0448 0x0000 4 0 #define MX6UL_PAD_SD1_CMD__GPIO2_IO16 0x01bc 0x0448 0x0000 5 0 -#define MX6UL_PAD_SD1_CMD__SDMA_EXT_EVENT00 0x01bc 0x0448 0x0000 6 0 +#define MX6UL_PAD_SD1_CMD__SDMA_EXT_EVENT00 0x01bc 0x0448 0x0610 6 2 #define MX6UL_PAD_SD1_CMD__USB_OTG1_PWR 0x01bc 0x0448 0x0000 8 0 #define MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x01c0 0x044c 0x0000 0 0 #define MX6UL_PAD_SD1_CLK__GPT2_COMPARE2 0x01c0 0x044c 0x0000 1 0 -#define MX6UL_PAD_SD1_CLK__SAI2_MCLK 0x01c0 0x044c 0x0000 2 0 +#define MX6UL_PAD_SD1_CLK__SAI2_MCLK 0x01c0 0x044c 0x05f0 2 1 #define MX6UL_PAD_SD1_CLK__SPDIF_IN 0x01c0 0x044c 0x0618 3 3 #define MX6UL_PAD_SD1_CLK__EIM_ADDR20 0x01c0 0x044c 0x0000 4 0 #define MX6UL_PAD_SD1_CLK__GPIO2_IO17 0x01c0 0x044c 0x0000 5 0 @@ -878,10 +899,10 @@ #define MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x01e8 0x0474 0x04c8 0 0 #define MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x01e8 0x0474 0x0680 1 0 #define MX6UL_PAD_CSI_DATA01__SIM1_PORT1_SVEN 0x01e8 0x0474 0x0000 2 0 -#define MX6UL_PAD_CSI_DATA01__ECSPI2_SS0 0x01e8 0x0474 0x0000 3 0 +#define MX6UL_PAD_CSI_DATA01__ECSPI2_SS0 0x01e8 0x0474 0x0550 3 0 #define MX6UL_PAD_CSI_DATA01__EIM_AD01 0x01e8 0x0474 0x0000 4 0 #define MX6UL_PAD_CSI_DATA01__GPIO4_IO22 0x01e8 0x0474 0x0000 5 0 -#define MX6UL_PAD_CSI_DATA01__SAI1_MCLK 0x01e8 0x0474 0x0000 6 0 +#define MX6UL_PAD_CSI_DATA01__SAI1_MCLK 0x01e8 0x0474 0x05e0 6 0 #define MX6UL_PAD_CSI_DATA01__UART5_DCE_RX 0x01e8 0x0474 0x0644 8 1 #define MX6UL_PAD_CSI_DATA01__UART5_DTE_TX 0x01e8 0x0474 0x0000 8 0 #define MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x01ec 0x0478 0x04d8 0 1 @@ -913,7 +934,7 @@ #define MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x01f8 0x0484 0x04e0 0 1 #define MX6UL_PAD_CSI_DATA05__USDHC2_DATA5 0x01f8 0x0484 0x0690 1 2 #define MX6UL_PAD_CSI_DATA05__SIM2_PORT1_RST_B 0x01f8 0x0484 0x0000 2 0 -#define MX6UL_PAD_CSI_DATA05__ECSPI1_SS0 0x01f8 0x0484 0x0000 3 0 +#define MX6UL_PAD_CSI_DATA05__ECSPI1_SS0 0x01f8 0x0484 0x0540 3 1 #define MX6UL_PAD_CSI_DATA05__EIM_AD05 0x01f8 0x0484 0x0000 4 0 #define MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x01f8 0x0484 0x0000 5 0 #define MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x01f8 0x0484 0x05e8 6 1 @@ -924,7 +945,7 @@ #define MX6UL_PAD_CSI_DATA06__ECSPI1_MOSI 0x01fc 0x0488 0x053c 3 1 #define MX6UL_PAD_CSI_DATA06__EIM_AD06 0x01fc 0x0488 0x0000 4 0 #define MX6UL_PAD_CSI_DATA06__GPIO4_IO27 0x01fc 0x0488 0x0000 5 0 -#define MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x01fc 0x0488 0x0000 6 0 +#define MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x01fc 0x0488 0x05e4 6 1 #define MX6UL_PAD_CSI_DATA06__USDHC1_RESET_B 0x01fc 0x0488 0x0000 8 0 #define MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x0200 0x048c 0x04e8 0 1 #define MX6UL_PAD_CSI_DATA07__USDHC2_DATA7 0x0200 0x048c 0x0698 1 2 diff --git a/arch/arm/dts/imx6ul.dtsi b/arch/arm/dts/imx6ul.dtsi index 71b42d4..5644b0f 100644 --- a/arch/arm/dts/imx6ul.dtsi +++ b/arch/arm/dts/imx6ul.dtsi @@ -1,19 +1,23 @@ -/* - * Copyright 2015 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright 2015 Freescale Semiconductor, Inc. #include <dt-bindings/clock/imx6ul-clock.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "imx6ul-pinfunc.h" -#include "skeleton.dtsi" / { + #address-cells = <1>; + #size-cells = <1>; + /* + * The decompressor and also some bootloaders rely on a + * pre-existing /chosen node to be available to insert the + * command line and merge other ATAGS info. + */ + chosen {}; + aliases { ethernet0 = &fec1; ethernet1 = &fec2; @@ -59,14 +63,17 @@ device_type = "cpu"; reg = <0>; clock-latency = <61036>; /* two CLK32 periods */ + #cooling-cells = <2>; operating-points = < /* kHz uV */ + 696000 1275000 528000 1175000 396000 1025000 198000 950000 >; fsl,soc-operating-points = < /* KHz uV */ + 696000 1275000 528000 1175000 396000 1175000 198000 1175000 @@ -77,30 +84,39 @@ <&clks IMX6UL_CA7_SECONDARY_SEL>, <&clks IMX6UL_CLK_STEP>, <&clks IMX6UL_CLK_PLL1_SW>, - <&clks IMX6UL_CLK_PLL1_SYS>, - <&clks IMX6UL_PLL1_BYPASS>, - <&clks IMX6UL_CLK_PLL1>, - <&clks IMX6UL_PLL1_BYPASS_SRC>, - <&clks IMX6UL_CLK_OSC>; + <&clks IMX6UL_CLK_PLL1_SYS>; clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step", "pll1_sw", - "pll1_sys", "pll1_bypass", "pll1", - "pll1_bypass_src", "osc"; + "pll1_sys"; arm-supply = <®_arm>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; - intc: interrupt-controller@00a01000 { - compatible = "arm,cortex-a7-gic"; + intc: interrupt-controller@a01000 { + compatible = "arm,gic-400", "arm,cortex-a7-gic"; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; #interrupt-cells = <3>; interrupt-controller; + interrupt-parent = <&intc>; reg = <0x00a01000 0x1000>, - <0x00a02000 0x1000>, + <0x00a02000 0x2000>, <0x00a04000 0x2000>, <0x00a06000 0x2000>; }; + timer { + compatible = "arm,armv7-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; + interrupt-parent = <&intc>; + status = "disabled"; + }; + ckil: clock-cli { compatible = "fixed-clock"; #clock-cells = <0>; @@ -129,6 +145,22 @@ clock-output-names = "ipp_di1"; }; + tempmon: tempmon { + compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; + interrupt-parent = <&gpc>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + fsl,tempmon = <&anatop>; + nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; + nvmem-cell-names = "calib", "temp_grade"; + clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; + }; + + pmu { + compatible = "arm,cortex-a7-pmu"; + interrupt-parent = <&gpc>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + }; + soc { #address-cells = <1>; #size-cells = <1>; @@ -136,18 +168,12 @@ interrupt-parent = <&gpc>; ranges; - pmu { - compatible = "arm,cortex-a7-pmu"; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - ocram: sram@00900000 { + ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; }; - dma_apbh: dma-apbh@01804000 { + dma_apbh: dma-apbh@1804000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; reg = <0x01804000 0x2000>; interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, @@ -160,7 +186,7 @@ clocks = <&clks IMX6UL_CLK_APBHDMA>; }; - gpmi: gpmi-nand@01806000 { + gpmi: gpmi-nand@1806000 { compatible = "fsl,imx6q-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; @@ -180,22 +206,21 @@ status = "disabled"; }; - aips1: aips-bus@02000000 { + aips1: aips-bus@2000000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x02000000 0x100000>; ranges; - spba-bus@02000000 { + spba-bus@2000000 { compatible = "fsl,spba-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x02000000 0x40000>; ranges; - u-boot,dm-spl; - ecspi1: ecspi@02008000 { + ecspi1: spi@2008000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; @@ -207,7 +232,7 @@ status = "disabled"; }; - ecspi2: ecspi@0200c000 { + ecspi2: spi@200c000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; @@ -219,7 +244,7 @@ status = "disabled"; }; - ecspi3: ecspi@02010000 { + ecspi3: spi@2010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; @@ -231,7 +256,7 @@ status = "disabled"; }; - ecspi4: ecspi@02014000 { + ecspi4: spi@2014000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; @@ -243,7 +268,7 @@ status = "disabled"; }; - uart7: serial@02018000 { + uart7: serial@2018000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x02018000 0x4000>; @@ -254,7 +279,7 @@ status = "disabled"; }; - uart1: serial@02020000 { + uart1: serial@2020000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x02020000 0x4000>; @@ -265,7 +290,7 @@ status = "disabled"; }; - uart8: serial@02024000 { + uart8: serial@2024000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x02024000 0x4000>; @@ -276,7 +301,7 @@ status = "disabled"; }; - sai1: sai@02028000 { + sai1: sai@2028000 { #sound-dai-cells = <0>; compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; reg = <0x02028000 0x4000>; @@ -291,7 +316,7 @@ status = "disabled"; }; - sai2: sai@0202c000 { + sai2: sai@202c000 { #sound-dai-cells = <0>; compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; reg = <0x0202c000 0x4000>; @@ -306,7 +331,7 @@ status = "disabled"; }; - sai3: sai@02030000 { + sai3: sai@2030000 { #sound-dai-cells = <0>; compatible = "fsl,imx6ul-sai", "fsl,imx6sx-sai"; reg = <0x02030000 0x4000>; @@ -322,7 +347,7 @@ }; }; - tsc: tsc@02040000 { + tsc: tsc@2040000 { compatible = "fsl,imx6ul-tsc"; reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, @@ -333,10 +358,10 @@ status = "disabled"; }; - pwm1: pwm@02080000 { + pwm1: pwm@2080000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02080000 0x4000>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM1>, <&clks IMX6UL_CLK_PWM1>; clock-names = "ipg", "per"; @@ -344,10 +369,10 @@ status = "disabled"; }; - pwm2: pwm@02084000 { + pwm2: pwm@2084000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02084000 0x4000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM2>, <&clks IMX6UL_CLK_PWM2>; clock-names = "ipg", "per"; @@ -355,10 +380,10 @@ status = "disabled"; }; - pwm3: pwm@02088000 { + pwm3: pwm@2088000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x02088000 0x4000>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM3>, <&clks IMX6UL_CLK_PWM3>; clock-names = "ipg", "per"; @@ -366,10 +391,10 @@ status = "disabled"; }; - pwm4: pwm@0208c000 { + pwm4: pwm@208c000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x0208c000 0x4000>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_PWM4>, <&clks IMX6UL_CLK_PWM4>; clock-names = "ipg", "per"; @@ -377,27 +402,29 @@ status = "disabled"; }; - can1: flexcan@02090000 { + can1: flexcan@2090000 { compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; reg = <0x02090000 0x4000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_CAN1_IPG>, <&clks IMX6UL_CLK_CAN1_SERIAL>; clock-names = "ipg", "per"; + fsl,stop-mode = <&gpr 0x10 1 0x10 17>; status = "disabled"; }; - can2: flexcan@02094000 { + can2: flexcan@2094000 { compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; reg = <0x02094000 0x4000>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_CAN2_IPG>, <&clks IMX6UL_CLK_CAN2_SERIAL>; clock-names = "ipg", "per"; + fsl,stop-mode = <&gpr 0x10 2 0x10 18>; status = "disabled"; }; - gpt1: gpt@02098000 { + gpt1: gpt@2098000 { compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt"; reg = <0x02098000 0x4000>; interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; @@ -406,11 +433,12 @@ clock-names = "ipg", "per"; }; - gpio1: gpio@0209c000 { + gpio1: gpio@209c000 { compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; reg = <0x0209c000 0x4000>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_GPIO1>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -419,11 +447,12 @@ <&iomuxc 16 33 16>; }; - gpio2: gpio@020a0000 { + gpio2: gpio@20a0000 { compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; reg = <0x020a0000 0x4000>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_GPIO2>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -431,11 +460,12 @@ gpio-ranges = <&iomuxc 0 49 16>, <&iomuxc 16 111 6>; }; - gpio3: gpio@020a4000 { + gpio3: gpio@20a4000 { compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; reg = <0x020a4000 0x4000>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_GPIO3>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -443,11 +473,12 @@ gpio-ranges = <&iomuxc 0 65 29>; }; - gpio4: gpio@020a8000 { + gpio4: gpio@20a8000 { compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; reg = <0x020a8000 0x4000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_GPIO4>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -455,11 +486,12 @@ gpio-ranges = <&iomuxc 0 94 17>, <&iomuxc 17 117 12>; }; - gpio5: gpio@020ac000 { + gpio5: gpio@20ac000 { compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; reg = <0x020ac000 0x4000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_GPIO5>; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -467,9 +499,10 @@ gpio-ranges = <&iomuxc 0 7 10>, <&iomuxc 10 5 2>; }; - fec2: ethernet@020b4000 { + fec2: ethernet@20b4000 { compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; reg = <0x020b4000 0x4000>; + interrupt-names = "int0", "pps"; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_ENET>, @@ -484,7 +517,7 @@ status = "disabled"; }; - kpp: kpp@020b8000 { + kpp: kpp@20b8000 { compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp"; reg = <0x020b8000 0x4000>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; @@ -492,14 +525,14 @@ status = "disabled"; }; - wdog1: wdog@020bc000 { + wdog1: wdog@20bc000 { compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; reg = <0x020bc000 0x4000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_WDOG1>; }; - wdog2: wdog@020c0000 { + wdog2: wdog@20c0000 { compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; reg = <0x020c0000 0x4000>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; @@ -507,7 +540,7 @@ status = "disabled"; }; - clks: ccm@020c4000 { + clks: ccm@20c4000 { compatible = "fsl,imx6ul-ccm"; reg = <0x020c4000 0x4000>; interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, @@ -517,7 +550,7 @@ clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; }; - anatop: anatop@020c8000 { + anatop: anatop@20c8000 { compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", "syscon", "simple-bus"; reg = <0x020c8000 0x1000>; @@ -574,7 +607,7 @@ }; }; - usbphy1: usbphy@020c9000 { + usbphy1: usbphy@20c9000 { compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; @@ -583,7 +616,7 @@ fsl,anatop = <&anatop>; }; - usbphy2: usbphy@020ca000 { + usbphy2: usbphy@20ca000 { compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; reg = <0x020ca000 0x1000>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; @@ -592,7 +625,7 @@ fsl,anatop = <&anatop>; }; - snvs: snvs@020cc000 { + snvs: snvs@20cc000 { compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; reg = <0x020cc000 0x4000>; @@ -608,6 +641,7 @@ compatible = "syscon-poweroff"; regmap = <&snvs>; offset = <0x38>; + value = <0x60>; mask = <0x60>; status = "disabled"; }; @@ -619,19 +653,23 @@ linux,keycode = <KEY_POWER>; wakeup-source; }; + + snvs_lpgpr: snvs-lpgpr { + compatible = "fsl,imx6ul-snvs-lpgpr"; + }; }; - epit1: epit@020d0000 { + epit1: epit@20d0000 { reg = <0x020d0000 0x4000>; interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; }; - epit2: epit@020d4000 { + epit2: epit@20d4000 { reg = <0x020d4000 0x4000>; interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; }; - src: src@020d8000 { + src: src@20d8000 { compatible = "fsl,imx6ul-src", "fsl,imx51-src"; reg = <0x020d8000 0x4000>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, @@ -639,7 +677,7 @@ #reset-cells = <1>; }; - gpc: gpc@020dc000 { + gpc: gpc@20dc000 { compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; reg = <0x020dc000 0x4000>; interrupt-controller; @@ -648,18 +686,18 @@ interrupt-parent = <&intc>; }; - iomuxc: iomuxc@020e0000 { + iomuxc: iomuxc@20e0000 { compatible = "fsl,imx6ul-iomuxc"; reg = <0x020e0000 0x4000>; }; - gpr: iomuxc-gpr@020e4000 { + gpr: iomuxc-gpr@20e4000 { compatible = "fsl,imx6ul-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon"; reg = <0x020e4000 0x4000>; }; - gpt2: gpt@020e8000 { + gpt2: gpt@20e8000 { compatible = "fsl,imx6ul-gpt", "fsl,imx6sx-gpt"; reg = <0x020e8000 0x4000>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; @@ -668,19 +706,19 @@ clock-names = "ipg", "per"; }; - sdma: sdma@020ec000 { + sdma: sdma@20ec000 { compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_SDMA>, + clocks = <&clks IMX6UL_CLK_IPG>, <&clks IMX6UL_CLK_SDMA>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; }; - pwm5: pwm@020f0000 { + pwm5: pwm@20f0000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020f0000 0x4000>; interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; @@ -691,7 +729,7 @@ status = "disabled"; }; - pwm6: pwm@020f4000 { + pwm6: pwm@20f4000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020f4000 0x4000>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; @@ -702,7 +740,7 @@ status = "disabled"; }; - pwm7: pwm@020f8000 { + pwm7: pwm@20f8000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020f8000 0x4000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; @@ -713,7 +751,7 @@ status = "disabled"; }; - pwm8: pwm@020fc000 { + pwm8: pwm@20fc000 { compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; reg = <0x020fc000 0x4000>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; @@ -725,14 +763,44 @@ }; }; - aips2: aips-bus@02100000 { + aips2: aips-bus@2100000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x02100000 0x100000>; ranges; - usbotg1: usb@02184000 { + crypto: caam@2140000 { + compatible = "fsl,imx6ul-caam", "fsl,sec-v4.0"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2140000 0x3c000>; + ranges = <0 0x2140000 0x3c000>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_CAAM_IPG>, <&clks IMX6UL_CLK_CAAM_ACLK>, + <&clks IMX6UL_CLK_CAAM_MEM>; + clock-names = "ipg", "aclk", "mem"; + + sec_jr0: jr0@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr1: jr1@2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr2: jr2@3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + usbotg1: usb@2184000 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; @@ -746,7 +814,7 @@ status = "disabled"; }; - usbotg2: usb@02184200 { + usbotg2: usb@2184200 { compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; @@ -759,15 +827,16 @@ status = "disabled"; }; - usbmisc: usbmisc@02184800 { + usbmisc: usbmisc@2184800 { #index-cells = <1>; compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; reg = <0x02184800 0x200>; }; - fec1: ethernet@02188000 { + fec1: ethernet@2188000 { compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; + interrupt-names = "int0", "pps"; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_ENET>, @@ -782,7 +851,7 @@ status = "disabled"; }; - usdhc1: usdhc@02190000 { + usdhc1: usdhc@2190000 { compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; reg = <0x02190000 0x4000>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; @@ -794,7 +863,7 @@ status = "disabled"; }; - usdhc2: usdhc@02194000 { + usdhc2: usdhc@2194000 { compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; reg = <0x02194000 0x4000>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; @@ -806,7 +875,7 @@ status = "disabled"; }; - adc1: adc@02198000 { + adc1: adc@2198000 { compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; reg = <0x02198000 0x4000>; interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; @@ -818,7 +887,7 @@ status = "disabled"; }; - i2c1: i2c@021a0000 { + i2c1: i2c@21a0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; @@ -828,7 +897,7 @@ status = "disabled"; }; - i2c2: i2c@021a4000 { + i2c2: i2c@21a4000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; @@ -838,7 +907,7 @@ status = "disabled"; }; - i2c3: i2c@021a8000 { + i2c3: i2c@21a8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; @@ -848,12 +917,44 @@ status = "disabled"; }; - mmdc: mmdc@021b0000 { + memory-controller@21b0000 { compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>; + }; + + weim: weim@21b8000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; + reg = <0x021b8000 0x4000>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_EIM>; + fsl,weim-cs-gpr = <&gpr>; + status = "disabled"; + }; + + ocotp: ocotp-ctrl@21bc000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,imx6ul-ocotp", "syscon"; + reg = <0x021bc000 0x4000>; + clocks = <&clks IMX6UL_CLK_OCOTP>; + + tempmon_calib: calib@38 { + reg = <0x38 4>; + }; + + tempmon_temp_grade: temp-grade@20 { + reg = <0x20 4>; + }; + + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; }; - lcdif: lcdif@021c8000 { + lcdif: lcdif@21c8000 { compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; reg = <0x021c8000 0x4000>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; @@ -864,7 +965,7 @@ status = "disabled"; }; - qspi: qspi@021e0000 { + qspi: spi@21e0000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi"; @@ -877,7 +978,7 @@ status = "disabled"; }; - wdog3: wdog@021e4000 { + wdog3: wdog@21e4000 { compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; reg = <0x021e4000 0x4000>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; @@ -885,7 +986,7 @@ status = "disabled"; }; - uart2: serial@021e8000 { + uart2: serial@21e8000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x021e8000 0x4000>; @@ -896,7 +997,7 @@ status = "disabled"; }; - uart3: serial@021ec000 { + uart3: serial@21ec000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x021ec000 0x4000>; @@ -907,7 +1008,7 @@ status = "disabled"; }; - uart4: serial@021f0000 { + uart4: serial@21f0000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x021f0000 0x4000>; @@ -918,7 +1019,7 @@ status = "disabled"; }; - uart5: serial@021f4000 { + uart5: serial@21f4000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x021f4000 0x4000>; @@ -929,7 +1030,7 @@ status = "disabled"; }; - i2c4: i2c@021f8000 { + i2c4: i2c@21f8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; @@ -939,7 +1040,7 @@ status = "disabled"; }; - uart6: serial@021fc000 { + uart6: serial@21fc000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart"; reg = <0x021fc000 0x4000>; diff --git a/arch/arm/dts/imx6ull-14x14-evk.dts b/arch/arm/dts/imx6ull-14x14-evk.dts index 9ebcfe1..74aaa8a 100644 --- a/arch/arm/dts/imx6ull-14x14-evk.dts +++ b/arch/arm/dts/imx6ull-14x14-evk.dts @@ -1,527 +1,18 @@ -/* - * Copyright (C) 2016 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright (C) 2016 Freescale Semiconductor, Inc. /dts-v1/; #include "imx6ull.dtsi" +#include "imx6ul-14x14-evk.dtsi" / { - model = "Freescale i.MX6 ULL 14x14 EVK Board"; + model = "Freescale i.MX6 UltraLiteLite 14x14 EVK Board"; compatible = "fsl,imx6ull-14x14-evk", "fsl,imx6ull"; - - chosen { - stdout-path = &uart1; - }; - - memory { - reg = <0x80000000 0x20000000>; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&pwm1 0 5000000>; - brightness-levels = <0 4 8 16 32 64 128 255>; - default-brightness-level = <6>; - status = "okay"; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_can_3v3: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "can-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpios = <&gpio_spi 3 GPIO_ACTIVE_LOW>; - }; - - reg_sd1_vmmc: regulator@1 { - compatible = "regulator-fixed"; - regulator-name = "VSD_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - reg_gpio_dvfs: regulator-gpio { - compatible = "regulator-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_dvfs>; - regulator-min-microvolt = <1300000>; - regulator-max-microvolt = <1400000>; - regulator-name = "gpio_dvfs"; - regulator-type = "voltage"; - gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; - states = <1300000 0x1 1400000 0x0>; - }; - }; - - spi5 { - compatible = "spi-gpio"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_spi4>; - status = "okay"; - gpio-sck = <&gpio5 11 0>; - gpio-mosi = <&gpio5 10 0>; - cs-gpios = <&gpio5 7 0>; - num-chipselects = <1>; - #address-cells = <1>; - #size-cells = <0>; - - gpio_spi: gpio_spi@0 { - compatible = "fairchild,74hc595"; - gpio-controller; - oe-gpios = <&gpio5 8 0>; - #gpio-cells = <2>; - reg = <0>; - registers-number = <1>; - registers-default = /bits/ 8 <0x57>; - spi-max-frequency = <100000>; - }; - }; -}; - -&cpu0 { - arm-supply = <®_arm>; - soc-supply = <®_soc>; - dc-supply = <®_gpio_dvfs>; }; &clks { - assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>; - assigned-clock-rates = <786432000>; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet1>; - phy-mode = "rmii"; - phy-handle = <ðphy0>; - status = "okay"; -}; - -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet2>; - phy-mode = "rmii"; - phy-handle = <ðphy1>; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - - ethphy0: ethernet-phy@2 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <2>; - }; - - ethphy1: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <1>; - }; - }; -}; - -&gpc { - fsl,cpu_pupscr_sw2iso = <0x1>; - fsl,cpu_pupscr_sw = <0x0>; - fsl,cpu_pdnscr_iso2sw = <0x1>; - fsl,cpu_pdnscr_iso = <0x1>; - fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - status = "okay"; - - mag3110@0e { - compatible = "fsl,mag3110"; - reg = <0x0e>; - position = <2>; - }; - - fxls8471@1e { - compatible = "fsl,fxls8471"; - reg = <0x1e>; - position = <0>; - interrupt-parent = <&gpio5>; - interrupts = <0 8>; - }; -}; - -&i2c2 { - clock_frequency = <100000>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; -}; - -&iomuxc { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog_1>; - imx6ul-evk { - pinctrl_hog_1: hoggrp-1 { - fsl,pins = < - MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */ - MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */ - MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */ - >; - }; - - pinctrl_csi1: csi1grp { - fsl,pins = < - MX6UL_PAD_CSI_MCLK__CSI_MCLK 0x1b088 - MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 - MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 - MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 - MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 - MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 - MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 - MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 - MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 - MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 - MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 - MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 - >; - }; - - pinctrl_enet1: enet1grp { - fsl,pins = < - MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 - MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 - MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 - MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 - MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 - >; - }; - - pinctrl_enet2: enet2grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 - MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 - MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 - MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 - MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 - MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 - MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 - >; - }; - - pinctrl_flexcan1: flexcan1grp{ - fsl,pins = < - MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020 - MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020 - >; - }; - - pinctrl_flexcan2: flexcan2grp{ - fsl,pins = < - MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020 - MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 - MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 - >; - }; - - pinctrl_lcdif_dat: lcdifdatgrp { - fsl,pins = < - MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 - MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 - MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 - MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 - MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 - MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 - MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 - MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 - MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 - MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 - MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 - MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 - MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 - MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 - MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 - MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 - MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 - MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 - MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 - MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 - MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 - MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 - MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 - MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 - >; - }; - - pinctrl_lcdif_ctrl: lcdifctrlgrp { - fsl,pins = < - MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 - MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 - MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 - MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 - >; - }; - - pinctrl_pwm1: pwm1grp { - fsl,pins = < - MX6UL_PAD_GPIO1_IO08__PWM1_OUT 0x110b0 - >; - }; - - pinctrl_qspi: qspigrp { - fsl,pins = < - MX6UL_PAD_NAND_WP_B__QSPI_A_SCLK 0x70a1 - MX6UL_PAD_NAND_READY_B__QSPI_A_DATA00 0x70a1 - MX6UL_PAD_NAND_CE0_B__QSPI_A_DATA01 0x70a1 - MX6UL_PAD_NAND_CE1_B__QSPI_A_DATA02 0x70a1 - MX6UL_PAD_NAND_CLE__QSPI_A_DATA03 0x70a1 - MX6UL_PAD_NAND_DQS__QSPI_A_SS0_B 0x70a1 - >; - }; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 - MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 - MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 - MX6UL_PAD_UART3_RX_DATA__UART2_DCE_RTS 0x1b0b1 - MX6UL_PAD_UART3_TX_DATA__UART2_DCE_CTS 0x1b0b1 - >; - }; - - pinctrl_uart2dte: uart2dtegrp { - fsl,pins = < - MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 - MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 - MX6UL_PAD_UART3_RX_DATA__UART2_DTE_CTS 0x1b0b1 - MX6UL_PAD_UART3_TX_DATA__UART2_DTE_RTS 0x1b0b1 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10071 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 - >; - }; - - pinctrl_usdhc2: usdhc2grp { - fsl,pins = < - MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069 - MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059 - MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059 - MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059 - MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059 - MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059 - >; - }; - - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 - >; - }; - }; -}; - -&iomuxc_snvs { - pinctrl-names = "default_snvs"; - pinctrl-0 = <&pinctrl_hog_2>; - imx6ul-evk { - pinctrl_hog_2: hoggrp-2 { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000 - >; - }; - - pinctrl_dvfs: dvfsgrp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79 - >; - }; - - pinctrl_lcdif_reset: lcdifresetgrp { - fsl,pins = < - /* used for lcd reset */ - MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x79 - >; - }; - - pinctrl_spi4: spi4grp { - fsl,pins = < - MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x70a1 - MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x70a1 - MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x70a1 - MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x80000000 - >; - }; - - pinctrl_sai2_hp_det_b: sai2_hp_det_grp { - fsl,pins = < - MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x17059 - >; - }; - }; -}; - - -&lcdif { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lcdif_dat - &pinctrl_lcdif_ctrl - &pinctrl_lcdif_reset>; - display = <&display0>; - status = "okay"; - - display0: display { - bits-per-pixel = <16>; - bus-width = <24>; - - display-timings { - native-mode = <&timing0>; - timing0: timing0 { - clock-frequency = <9200000>; - hactive = <480>; - vactive = <272>; - hfront-porch = <8>; - hback-porch = <4>; - hsync-len = <41>; - vback-porch = <2>; - vfront-porch = <4>; - vsync-len = <10>; - - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <0>; - }; - }; - }; -}; - -&pwm1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pwm1>; - status = "okay"; -}; - -&qspi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_qspi>; - status = "okay"; - ddrsmp=<0>; - - flash0: n25q256a@0 { - #address-cells = <1>; - #size-cells = <1>; - /* compatible = "micron,n25q256a"; */ - compatible = "jedec,spi-nor"; - spi-max-frequency = <29000000>; - spi-nor,ddr-quad-read-dummy = <6>; - reg = <0>; - }; -}; - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - fsl,uart-has-rtscts; - /* for DTE mode, add below change */ - /* fsl,dte-mode; */ - /* pinctrl-0 = <&pinctrl_uart2dte>; */ - status = "okay"; -}; - -&usbotg1 { - dr_mode = "otg"; - srp-disable; - hnp-disable; - adp-disable; - status = "okay"; -}; - -&usbotg2 { - dr_mode = "host"; - disable-over-current; - status = "okay"; -}; - -&usbphy1 { - tx-d-cal = <0x5>; -}; - -&usbphy2 { - tx-d-cal = <0x5>; -}; - -&usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1>; - cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; - keep-power-in-suspend; - enable-sdio-wakeup; - vmmc-supply = <®_sd1_vmmc>; - status = "okay"; -}; - -&usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; - no-1-8-v; - non-removable; - keep-power-in-suspend; - enable-sdio-wakeup; - status = "okay"; -}; - -&wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; - fsl,wdog_b; + assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>; + assigned-clock-rates = <320000000>; }; diff --git a/arch/arm/dts/imx6ull-pinfunc-snvs.h b/arch/arm/dts/imx6ull-pinfunc-snvs.h index da3f412..54cfe72 100644 --- a/arch/arm/dts/imx6ull-pinfunc-snvs.h +++ b/arch/arm/dts/imx6ull-pinfunc-snvs.h @@ -1,9 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2017 NXP */ #ifndef __DTS_IMX6ULL_PINFUNC_SNVS_H @@ -26,4 +24,3 @@ #define MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x002C 0x0070 0x0000 0x5 0x0 #endif /* __DTS_IMX6ULL_PINFUNC_SNVS_H */ - diff --git a/arch/arm/dts/imx6ull-pinfunc.h b/arch/arm/dts/imx6ull-pinfunc.h index 7770ed3..eb025a9 100644 --- a/arch/arm/dts/imx6ull-pinfunc.h +++ b/arch/arm/dts/imx6ull-pinfunc.h @@ -1,9 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2016 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ #ifndef __DTS_IMX6ULL_PINFUNC_H @@ -14,46 +11,77 @@ * The pin function ID is a tuple of * <mux_reg conf_reg input_reg mux_mode input_val> */ -#define MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x0068 0x02f4 0x0000 0x3 0x0 +/* signals common for i.MX6UL and i.MX6ULL */ +#undef MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX +#define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6 +#undef MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX +#define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7 +#undef MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS +#define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5 +#undef MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS +#define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6 +#undef MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS +#define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7 -#define MX6UL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 0x00E4 0x0370 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 0x00E8 0x0374 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_RX_EN__EPDC_SDDO10 0x00EC 0x0378 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_TX_DATA0__EPDC_SDDO11 0x00F0 0x037C 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_TX_DATA1__EPDC_SDDO12 0x00F4 0x0380 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_TX_EN__EPDC_SDDO13 0x00F8 0x0384 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_TX_CLK__EPDC_SDDO14 0x00FC 0x0388 0x0000 0x9 0x0 -#define MX6UL_PAD_ENET2_RX_ER__EPDC_SDDO15 0x0100 0x038C 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_CLK__EPDC_SDCLK 0x0104 0x0390 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_ENABLE__EPDC_SDLE 0x0108 0x0394 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_HSYNC__EPDC_SDOE 0x010C 0x0398 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_VSYNC__EPDC_SDCE0 0x0110 0x039C 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_RESET__EPDC_GDOE 0x0114 0x03A0 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA00__EPDC_SDDO00 0x0118 0x03A4 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA01__EPDC_SDDO01 0x011C 0x03A8 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA02__EPDC_SDDO02 0x0120 0x03AC 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA03__EPDC_SDDO03 0x0124 0x03B0 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA04__EPDC_SDDO04 0x0128 0x03B4 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA05__EPDC_SDDO05 0x012C 0x03B8 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA06__EPDC_SDDO06 0x0130 0x03BC 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA07__EPDC_SDDO07 0x0134 0x03C0 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA14__EPDC_SDSHR 0x0150 0x03DC 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA15__EPDC_GDRL 0x0154 0x03E0 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA16__EPDC_GDCLK 0x0158 0x03E4 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA17__EPDC_GDSP 0x015C 0x03E8 0x0000 0x9 0x0 -#define MX6UL_PAD_LCD_DATA21__EPDC_SDCE1 0x016C 0x03F8 0x0000 0x9 0x0 - -#define MX6UL_PAD_CSI_MCLK__ESAI_TX3_RX2 0x01D4 0x0460 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_PIXCLK__ESAI_TX2_RX3 0x01D8 0x0464 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_VSYNC__ESAI_TX4_RX1 0x01DC 0x0468 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_HSYNC__ESAI_TX1 0x01E0 0x046C 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA00__ESAI_TX_HF_CLK 0x01E4 0x0470 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA01__ESAI_RX_HF_CLK 0x01E8 0x0474 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA02__ESAI_RX_FS 0x01EC 0x0478 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA03__ESAI_RX_CLK 0x01F0 0x047C 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0 -#define MX6UL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0 +/* signals for i.MX6ULL only */ +#define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0 +#define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4 +#define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5 +#define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0 +#define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0 +#define MX6ULL_PAD_UART1_CTS_B__UART5_DTE_RTS 0x008C 0x0318 0x0640 0x9 0x3 +#define MX6ULL_PAD_UART1_RTS_B__UART5_DCE_RTS 0x0090 0x031C 0x0640 0x9 0x4 +#define MX6ULL_PAD_UART1_RTS_B__UART5_DTE_CTS 0x0090 0x031C 0x0000 0x9 0x0 +#define MX6ULL_PAD_UART4_RX_DATA__EPDC_PWRCTRL01 0x00B8 0x0344 0x0000 0x9 0x0 +#define MX6ULL_PAD_UART5_TX_DATA__EPDC_PWRCTRL02 0x00BC 0x0348 0x0000 0x9 0x0 +#define MX6ULL_PAD_UART5_RX_DATA__EPDC_PWRCTRL03 0x00C0 0x034C 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_RX_DATA0__EPDC_SDCE04 0x00C4 0x0350 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_RX_DATA1__EPDC_SDCE05 0x00C8 0x0354 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_RX_EN__EPDC_SDCE06 0x00CC 0x0358 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_TX_DATA0__EPDC_SDCE07 0x00D0 0x035C 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_TX_DATA1__EPDC_SDCE08 0x00D4 0x0360 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_TX_EN__EPDC_SDCE09 0x00D8 0x0364 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_TX_CLK__EPDC_SDOED 0x00DC 0x0368 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET1_RX_ER__EPDC_SDOEZ 0x00E0 0x036C 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_RX_DATA0__EPDC_SDDO08 0x00E4 0x0370 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_RX_DATA1__EPDC_SDDO09 0x00E8 0x0374 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_RX_EN__EPDC_SDDO10 0x00EC 0x0378 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_TX_DATA0__EPDC_SDDO11 0x00F0 0x037C 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_TX_DATA1__EPDC_SDDO12 0x00F4 0x0380 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_TX_EN__EPDC_SDDO13 0x00F8 0x0384 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_TX_CLK__EPDC_SDDO14 0x00FC 0x0388 0x0000 0x9 0x0 +#define MX6ULL_PAD_ENET2_RX_ER__EPDC_SDDO15 0x0100 0x038C 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_CLK__EPDC_SDCLK 0x0104 0x0390 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_ENABLE__EPDC_SDLE 0x0108 0x0394 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_HSYNC__EPDC_SDOE 0x010C 0x0398 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_VSYNC__EPDC_SDCE0 0x0110 0x039C 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_RESET__EPDC_GDOE 0x0114 0x03A0 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA00__EPDC_SDDO00 0x0118 0x03A4 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA01__EPDC_SDDO01 0x011C 0x03A8 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA02__EPDC_SDDO02 0x0120 0x03AC 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA03__EPDC_SDDO03 0x0124 0x03B0 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA04__EPDC_SDDO04 0x0128 0x03B4 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA05__EPDC_SDDO05 0x012C 0x03B8 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA06__EPDC_SDDO06 0x0130 0x03BC 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA07__EPDC_SDDO07 0x0134 0x03C0 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA14__EPDC_SDSHR 0x0150 0x03DC 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA15__EPDC_GDRL 0x0154 0x03E0 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA16__EPDC_GDCLK 0x0158 0x03E4 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA17__EPDC_GDSP 0x015C 0x03E8 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA21__EPDC_SDCE1 0x016C 0x03F8 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA22__EPDC_SDCE02 0x0170 0x03FC 0x0000 0x9 0x0 +#define MX6ULL_PAD_LCD_DATA23__EPDC_SDCE03 0x0174 0x0400 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_MCLK__ESAI_TX3_RX2 0x01D4 0x0460 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_PIXCLK__ESAI_TX2_RX3 0x01D8 0x0464 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_VSYNC__ESAI_TX4_RX1 0x01DC 0x0468 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_HSYNC__ESAI_TX1 0x01E0 0x046C 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA00__ESAI_TX_HF_CLK 0x01E4 0x0470 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA01__ESAI_RX_HF_CLK 0x01E8 0x0474 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA02__ESAI_RX_FS 0x01EC 0x0478 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA03__ESAI_RX_CLK 0x01F0 0x047C 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0 +#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0 #endif /* __DTS_IMX6ULL_PINFUNC_H */ diff --git a/arch/arm/dts/imx6ull.dtsi b/arch/arm/dts/imx6ull.dtsi index 4598f2f..22e4a30 100644 --- a/arch/arm/dts/imx6ull.dtsi +++ b/arch/arm/dts/imx6ull.dtsi @@ -1,1173 +1,81 @@ -/* - * Copyright 2015-2016 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright 2016 Freescale Semiconductor, Inc. -#include <dt-bindings/clock/imx6ul-clock.h> -#include <dt-bindings/gpio/gpio.h> -#include <dt-bindings/input/input.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "imx6ul.dtsi" #include "imx6ull-pinfunc.h" #include "imx6ull-pinfunc-snvs.h" -#include "skeleton.dtsi" -/ { - aliases { - can0 = &flexcan1; - can1 = &flexcan2; - ethernet0 = &fec1; - ethernet1 = &fec2; - gpio0 = &gpio1; - gpio1 = &gpio2; - gpio2 = &gpio3; - gpio3 = &gpio4; - gpio4 = &gpio5; - i2c0 = &i2c1; - i2c1 = &i2c2; - i2c2 = &i2c3; - i2c3 = &i2c4; - mmc0 = &usdhc1; - mmc1 = &usdhc2; - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - serial3 = &uart4; - serial4 = &uart5; - serial5 = &uart6; - serial6 = &uart7; - serial7 = &uart8; - spi0 = &qspi; - spi1 = &ecspi1; - spi2 = &ecspi2; - spi3 = &ecspi3; - spi4 = &ecspi4; - usbphy0 = &usbphy1; - usbphy1 = &usbphy2; - usb0 = &usbotg1; - usb1 = &usbotg2; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0>; - clock-latency = <61036>; /* two CLK32 periods */ - operating-points = < - /* kHz uV */ - 528000 1175000 - 99000 950000 - >; - fsl,soc-operating-points = < - /* KHz uV */ - 528000 1175000 - 99000 1175000 - >; - clocks = <&clks IMX6UL_CLK_ARM>, - <&clks IMX6UL_CLK_PLL2_BUS>, - <&clks IMX6UL_CLK_PLL2_PFD2>, - <&clks IMX6UL_CA7_SECONDARY_SEL>, - <&clks IMX6UL_CLK_STEP>, - <&clks IMX6UL_CLK_PLL1_SW>, - <&clks IMX6UL_CLK_PLL1_SYS>, - <&clks IMX6UL_PLL1_BYPASS>, - <&clks IMX6UL_CLK_PLL1>, - <&clks IMX6UL_PLL1_BYPASS_SRC>, - <&clks IMX6UL_CLK_OSC>; - clock-names = "arm", "pll2_bus", "pll2_pfd2_396m", "secondary_sel", "step", - "pll1_sw", "pll1_sys", "pll1_bypass", "pll1", "pll1_bypass_src", "osc"; - }; - }; - - intc: interrupt-controller@00a01000 { - compatible = "arm,cortex-a7-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x00a01000 0x1000>, - <0x00a02000 0x100>; - }; - - clocks { - #address-cells = <1>; - #size-cells = <0>; - - ckil: clock@0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "ckil"; - }; +/* Delete UART8 in AIPS-1 (i.MX6UL specific) */ +/delete-node/ &uart8; +/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */ +/delete-node/ &crypto; + +&cpu0 { + operating-points = < + /* kHz uV */ + 900000 1275000 + 792000 1225000 + 528000 1175000 + 396000 1025000 + 198000 950000 + >; + fsl,soc-operating-points = < + /* KHz uV */ + 900000 1250000 + 792000 1175000 + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; +}; - osc: clock@1 { - compatible = "fixed-clock"; - reg = <1>; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "osc"; - }; +&ocotp { + compatible = "fsl,imx6ull-ocotp", "syscon"; +}; - ipp_di0: clock@2 { - compatible = "fixed-clock"; - reg = <2>; - #clock-cells = <0>; - clock-frequency = <0>; - clock-output-names = "ipp_di0"; - }; +&usdhc1 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; +}; - ipp_di1: clock@3 { - compatible = "fixed-clock"; - reg = <3>; - #clock-cells = <0>; - clock-frequency = <0>; - clock-output-names = "ipp_di1"; - }; - }; +&usdhc2 { + compatible = "fsl,imx6ull-usdhc", "fsl,imx6sx-usdhc"; +}; +/ { soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - interrupt-parent = <&gpc>; - ranges; - - busfreq { - compatible = "fsl,imx_busfreq"; - clocks = <&clks IMX6UL_CLK_PLL2_PFD2>, <&clks IMX6UL_CLK_PLL2_198M>, - <&clks IMX6UL_CLK_PLL2_BUS>, <&clks IMX6UL_CLK_ARM>, - <&clks IMX6UL_CLK_PLL3_USB_OTG>, <&clks IMX6UL_CLK_PERIPH>, - <&clks IMX6UL_CLK_PERIPH_PRE>, <&clks IMX6UL_CLK_PERIPH_CLK2>, - <&clks IMX6UL_CLK_PERIPH_CLK2_SEL>, <&clks IMX6UL_CLK_OSC>, - <&clks IMX6UL_CLK_AHB>, <&clks IMX6UL_CLK_AXI>, - <&clks IMX6UL_CLK_PERIPH2>, <&clks IMX6UL_CLK_PERIPH2_PRE>, - <&clks IMX6UL_CLK_PERIPH2_CLK2>, <&clks IMX6UL_CLK_PERIPH2_CLK2_SEL>, - <&clks IMX6UL_CLK_STEP>, <&clks IMX6UL_CLK_MMDC_P0_FAST>, <&clks IMX6UL_PLL1_BYPASS_SRC>, - <&clks IMX6UL_PLL1_BYPASS>, <&clks IMX6UL_CLK_PLL1_SYS>, <&clks IMX6UL_CLK_PLL1_SW>, - <&clks IMX6UL_CLK_PLL1>; - clock-names = "pll2_pfd2_396m", "pll2_198m", "pll2_bus", "arm", "pll3_usb_otg", - "periph", "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", - "ahb", "ocram", "periph2", "periph2_pre", "periph2_clk2", "periph2_clk2_sel", - "step", "mmdc", "pll1_bypass_src", "pll1_bypass", "pll1_sys", "pll1_sw", "pll1"; - fsl,max_ddr_freq = <400000000>; - }; - - pmu { - compatible = "arm,cortex-a7-pmu"; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - ocrams: sram@00900000 { - compatible = "fsl,lpm-sram"; - reg = <0x00900000 0x4000>; - }; - - ocrams_ddr: sram@00904000 { - compatible = "fsl,ddr-lpm-sram"; - reg = <0x00904000 0x1000>; - }; - - ocram: sram@00905000 { - compatible = "mmio-sram"; - reg = <0x00905000 0x1B000>; - }; - - dma_apbh: dma-apbh@01804000 { - compatible = "fsl,imx6ul-dma-apbh", "fsl,imx28-dma-apbh"; - reg = <0x01804000 0x2000>; - interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; - #dma-cells = <1>; - dma-channels = <4>; - clocks = <&clks IMX6UL_CLK_APBHDMA>; - }; - - gpmi: gpmi-nand@01806000{ - compatible = "fsl,imx6q-gpmi-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x01806000 0x2000>, <0x01808000 0x4000>; - reg-names = "gpmi-nand", "bch"; - interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "bch"; - clocks = <&clks IMX6UL_CLK_GPMI_IO>, - <&clks IMX6UL_CLK_GPMI_APB>, - <&clks IMX6UL_CLK_GPMI_BCH>, - <&clks IMX6UL_CLK_GPMI_BCH_APB>, - <&clks IMX6UL_CLK_PER_BCH>; - clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", - "gpmi_bch_apb", "per1_bch"; - dmas = <&dma_apbh 0>; - dma-names = "rx-tx"; - status = "disabled"; - }; - - aips1: aips-bus@02000000 { - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x02000000 0x100000>; - ranges; - - spba-bus@02000000 { - compatible = "fsl,spba-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x02000000 0x40000>; - ranges; - - spdif: spdif@02004000 { - compatible = "fsl,imx6ul-spdif", "fsl,imx35-spdif"; - reg = <0x02004000 0x4000>; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; - dmas = <&sdma 41 18 0>, - <&sdma 42 18 0>; - dma-names = "rx", "tx"; - clocks = <&clks IMX6UL_CLK_SPDIF_GCLK>, - <&clks IMX6UL_CLK_OSC>, - <&clks IMX6UL_CLK_SPDIF>, - <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_SPBA>; - clock-names = "core", "rxtx0", - "rxtx1", "rxtx2", - "rxtx3", "rxtx4", - "rxtx5", "rxtx6", - "rxtx7", "dma"; - status = "disabled"; - }; - - ecspi1: ecspi@02008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; - reg = <0x02008000 0x4000>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ECSPI1>, - <&clks IMX6UL_CLK_ECSPI1>; - clock-names = "ipg", "per"; - dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - ecspi2: ecspi@0200c000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; - reg = <0x0200c000 0x4000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ECSPI2>, - <&clks IMX6UL_CLK_ECSPI2>; - clock-names = "ipg", "per"; - dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - ecspi3: ecspi@02010000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; - reg = <0x02010000 0x4000>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ECSPI3>, - <&clks IMX6UL_CLK_ECSPI3>; - clock-names = "ipg", "per"; - dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - ecspi4: ecspi@02014000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; - reg = <0x02014000 0x4000>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ECSPI4>, - <&clks IMX6UL_CLK_ECSPI4>; - clock-names = "ipg", "per"; - dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart7: serial@02018000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x02018000 0x4000>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART7_IPG>, - <&clks IMX6UL_CLK_UART7_SERIAL>; - clock-names = "ipg", "per"; - dmas = <&sdma 43 4 0>, <&sdma 44 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart1: serial@02020000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x02020000 0x4000>; - interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART1_IPG>, - <&clks IMX6UL_CLK_UART1_SERIAL>; - clock-names = "ipg", "per"; - status = "disabled"; - }; - - esai: esai@02024000 { - compatible = "fsl,imx6ull-esai"; - reg = <0x02024000 0x4000>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ESAI_IPG>, - <&clks IMX6UL_CLK_ESAI_MEM>, - <&clks IMX6UL_CLK_ESAI_EXTAL>, - <&clks IMX6UL_CLK_ESAI_IPG>, - <&clks IMX6UL_CLK_SPBA>; - clock-names = "core", "mem", "extal", - "fsys", "dma"; - dmas = <&sdma 0 21 0>, <&sdma 47 21 0>; - dma-names = "rx", "tx"; - dma-source = <&gpr 0 14 0 15>; - status = "disabled"; - }; - - sai1: sai@02028000 { - compatible = "fsl,imx6ul-sai", - "fsl,imx6sx-sai"; - reg = <0x02028000 0x4000>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_SAI1_IPG>, - <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_SAI1>, - <&clks 0>, <&clks 0>; - clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; - dma-names = "rx", "tx"; - dmas = <&sdma 35 24 0>, <&sdma 36 24 0>; - status = "disabled"; - }; - - sai2: sai@0202c000 { - compatible = "fsl,imx6ul-sai", - "fsl,imx6sx-sai"; - reg = <0x0202c000 0x4000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_SAI2_IPG>, - <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_SAI2>, - <&clks 0>, <&clks 0>; - clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; - dma-names = "rx", "tx"; - dmas = <&sdma 37 24 0>, <&sdma 38 24 0>; - status = "disabled"; - }; - - sai3: sai@02030000 { - compatible = "fsl,imx6ul-sai", - "fsl,imx6sx-sai"; - reg = <0x02030000 0x4000>; - interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_SAI3_IPG>, - <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_SAI3>, - <&clks 0>, <&clks 0>; - clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; - dma-names = "rx", "tx"; - dmas = <&sdma 39 24 0>, <&sdma 40 24 0>; - status = "disabled"; - }; - - asrc: asrc@02034000 { - compatible = "fsl,imx53-asrc"; - reg = <0x02034000 0x4000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ASRC_IPG>, - <&clks IMX6UL_CLK_ASRC_MEM>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>, - <&clks IMX6UL_CLK_SPDIF>, <&clks 0>, <&clks 0>, - <&clks IMX6UL_CLK_SPBA>; - clock-names = "mem", "ipg", "asrck_0", - "asrck_1", "asrck_2", "asrck_3", "asrck_4", - "asrck_5", "asrck_6", "asrck_7", "asrck_8", - "asrck_9", "asrck_a", "asrck_b", "asrck_c", - "asrck_d", "asrck_e", "asrck_f", "dma"; - dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>, - <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; - dma-names = "rxa", "rxb", "rxc", - "txa", "txb", "txc"; - fsl,asrc-rate = <48000>; - fsl,asrc-width = <16>; - status = "okay"; - }; - }; - - tsc: tsc@02040000 { - compatible = "fsl,imx6ul-tsc"; - reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; - interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_IPG>, - <&clks IMX6UL_CLK_ADC2>; - clock-names = "tsc", "adc"; - status = "disabled"; - }; - - pwm1: pwm@02080000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x02080000 0x4000>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_PWM1>, - <&clks IMX6UL_CLK_PWM1>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - pwm2: pwm@02084000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x02084000 0x4000>; - interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - pwm3: pwm@02088000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x02088000 0x4000>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_PWM3>, - <&clks IMX6UL_CLK_PWM3>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - pwm4: pwm@0208c000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x0208c000 0x4000>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - flexcan1: can@02090000 { - compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; - reg = <0x02090000 0x4000>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_CAN1_IPG>, - <&clks IMX6UL_CLK_CAN1_SERIAL>; - clock-names = "ipg", "per"; - stop-mode = <&gpr 0x10 1 0x10 17>; - status = "disabled"; - }; - - flexcan2: can@02094000 { - compatible = "fsl,imx6ul-flexcan", "fsl,imx6q-flexcan"; - reg = <0x02094000 0x4000>; - interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_CAN2_IPG>, - <&clks IMX6UL_CLK_CAN2_SERIAL>; - clock-names = "ipg", "per"; - stop-mode = <&gpr 0x10 2 0x10 18>; - status = "disabled"; - }; - - gpt1: gpt@02098000 { - compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; - reg = <0x02098000 0x4000>; - interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_GPT1_BUS>, - <&clks IMX6UL_CLK_GPT1_SERIAL>; - clock-names = "ipg", "per"; - }; - - gpio1: gpio@0209c000 { - compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; - reg = <0x0209c000 0x4000>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@020a0000 { - compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; - reg = <0x020a0000 0x4000>; - interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@020a4000 { - compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; - reg = <0x020a4000 0x4000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio@020a8000 { - compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; - reg = <0x020a8000 0x4000>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio5: gpio@020ac000 { - compatible = "fsl,imx6ul-gpio", "fsl,imx35-gpio"; - reg = <0x020ac000 0x4000>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - snvslp: snvs@020b0000 { - compatible = "fsl,imx6ul-snvs"; - reg = <0x020b0000 0x4000>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - }; - - fec2: ethernet@020b4000 { - compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; - reg = <0x020b4000 0x4000>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ENET>, - <&clks IMX6UL_CLK_ENET_AHB>, - <&clks IMX6UL_CLK_ENET_PTP>, - <&clks IMX6UL_CLK_ENET2_REF_125M>, - <&clks IMX6UL_CLK_ENET2_REF_125M>; - clock-names = "ipg", "ahb", "ptp", - "enet_clk_ref", "enet_out"; - stop-mode = <&gpr 0x10 4>; - fsl,num-tx-queues=<1>; - fsl,num-rx-queues=<1>; - fsl,magic-packet; - fsl,wakeup_irq = <0>; - status = "disabled"; - }; - - kpp: kpp@020b8000 { - compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; - reg = <0x020b8000 0x4000>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>; - status = "disabled"; - }; - - wdog1: wdog@020bc000 { - compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; - reg = <0x020bc000 0x4000>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_WDOG1>; - }; - - wdog2: wdog@020c0000 { - compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; - reg = <0x020c0000 0x4000>; - interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_WDOG2>; - status = "disabled"; - }; - - clks: ccm@020c4000 { - compatible = "fsl,imx6ul-ccm"; - reg = <0x020c4000 0x4000>; - interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; - #clock-cells = <1>; - clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>; - clock-names = "ckil", "osc", "ipp_di0", "ipp_di1"; - }; - - anatop: anatop@020c8000 { - compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop", - "syscon", "simple-bus"; - reg = <0x020c8000 0x1000>; - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - - reg_3p0: regulator-3p0@120 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vdd3p0"; - regulator-min-microvolt = <2625000>; - regulator-max-microvolt = <3400000>; - anatop-reg-offset = <0x120>; - anatop-vol-bit-shift = <8>; - anatop-vol-bit-width = <5>; - anatop-min-bit-val = <0>; - anatop-min-voltage = <2625000>; - anatop-max-voltage = <3400000>; - anatop-enable-bit = <0>; - }; - - reg_arm: regulator-vddcore@140 { - compatible = "fsl,anatop-regulator"; - regulator-name = "cpu"; - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - anatop-reg-offset = <0x140>; - anatop-vol-bit-shift = <0>; - anatop-vol-bit-width = <5>; - anatop-delay-reg-offset = <0x170>; - anatop-delay-bit-shift = <24>; - anatop-delay-bit-width = <2>; - anatop-min-bit-val = <1>; - anatop-min-voltage = <725000>; - anatop-max-voltage = <1450000>; - }; - - reg_soc: regulator-vddsoc@140 { - compatible = "fsl,anatop-regulator"; - regulator-name = "vddsoc"; - regulator-min-microvolt = <725000>; - regulator-max-microvolt = <1450000>; - regulator-always-on; - anatop-reg-offset = <0x140>; - anatop-vol-bit-shift = <18>; - anatop-vol-bit-width = <5>; - anatop-delay-reg-offset = <0x170>; - anatop-delay-bit-shift = <28>; - anatop-delay-bit-width = <2>; - anatop-min-bit-val = <1>; - anatop-min-voltage = <725000>; - anatop-max-voltage = <1450000>; - }; - }; - - usbphy1: usbphy@020c9000 { - compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; - reg = <0x020c9000 0x1000>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_USBPHY1>; - phy-3p0-supply = <®_3p0>; - fsl,anatop = <&anatop>; - }; - - usbphy2: usbphy@020ca000 { - compatible = "fsl,imx6ul-usbphy", "fsl,imx23-usbphy"; - reg = <0x020ca000 0x1000>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_USBPHY2>; - phy-3p0-supply = <®_3p0>; - fsl,anatop = <&anatop>; - }; - - tempmon: tempmon { - compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon"; - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; - fsl,tempmon = <&anatop>; - fsl,tempmon-data = <&ocotp>; - clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; - }; - - snvs: snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; - reg = <0x020cc000 0x4000>; - - snvs_rtc: snvs-rtc-lp { - compatible = "fsl,sec-v4.0-mon-rtc-lp"; - regmap = <&snvs>; - offset = <0x34>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; - }; - - snvs_poweroff: snvs-poweroff { - compatible = "syscon-poweroff"; - regmap = <&snvs>; - offset = <0x38>; - mask = <0x61>; - }; - - snvs_pwrkey: snvs-powerkey { - compatible = "fsl,sec-v4.0-pwrkey"; - regmap = <&snvs>; - interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; - linux,keycode = <KEY_POWER>; - wakeup; - }; - }; - - epit1: epit@020d0000 { - reg = <0x020d0000 0x4000>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; - }; - - epit2: epit@020d4000 { - reg = <0x020d4000 0x4000>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; - }; - - src: src@020d8000 { - compatible = "fsl,imx6ul-src", "fsl,imx51-src"; - reg = <0x020d8000 0x4000>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - #reset-cells = <1>; - }; - - gpc: gpc@020dc000 { - compatible = "fsl,imx6ul-gpc", "fsl,imx6q-gpc"; - reg = <0x020dc000 0x4000>; - interrupt-controller; - #interrupt-cells = <3>; - interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; - interrupt-parent = <&intc>; - fsl,mf-mix-wakeup-irq = <0xfc00000 0x7d00 0x0 0x1400640>; - }; - - iomuxc: iomuxc@020e0000 { - compatible = "fsl,imx6ul-iomuxc"; - reg = <0x020e0000 0x4000>; - }; - - gpr: iomuxc-gpr@020e4000 { - compatible = "fsl,imx6ul-iomuxc-gpr", "syscon"; - reg = <0x020e4000 0x4000>; - }; - - mqs: mqs { - compatible = "fsl,imx6sx-mqs"; - gpr = <&gpr>; - status = "disabled"; - }; - - gpt2: gpt@020e8000 { - compatible = "fsl,imx6ul-gpt", "fsl,imx31-gpt"; - reg = <0x020e8000 0x4000>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - }; - - sdma: sdma@020ec000 { - compatible = "fsl,imx6ul-sdma", "fsl,imx35-sdma"; - reg = <0x020ec000 0x4000>; - interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_SDMA>, - <&clks IMX6UL_CLK_SDMA>; - clock-names = "ipg", "ahb"; - #dma-cells = <3>; - iram = <&ocram>; - fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; - }; - - pwm5: pwm@020f0000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x020f0000 0x4000>; - interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - pwm6: pwm@020f4000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x020f4000 0x4000>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - pwm7: pwm@020f8000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x020f8000 0x4000>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - - pwm8: pwm@020fc000 { - compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; - reg = <0x020fc000 0x4000>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "ipg", "per"; - #pwm-cells = <2>; - }; - }; - - aips2: aips-bus@02100000 { - compatible = "fsl,aips-bus", "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x02100000 0x100000>; - ranges; - - usbotg1: usb@02184000 { - compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; - reg = <0x02184000 0x200>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_USBOH3>; - fsl,usbphy = <&usbphy1>; - fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; - ahb-burst-config = <0x0>; - tx-burst-size-dword = <0x10>; - rx-burst-size-dword = <0x10>; - status = "disabled"; - }; - - usbotg2: usb@02184200 { - compatible = "fsl,imx6ul-usb", "fsl,imx27-usb"; - reg = <0x02184200 0x200>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_USBOH3>; - fsl,usbphy = <&usbphy2>; - fsl,usbmisc = <&usbmisc 1>; - ahb-burst-config = <0x0>; - tx-burst-size-dword = <0x10>; - rx-burst-size-dword = <0x10>; - status = "disabled"; - }; - - usbmisc: usbmisc@02184800 { - #index-cells = <1>; - compatible = "fsl,imx6ul-usbmisc", "fsl,imx6q-usbmisc"; - reg = <0x02184800 0x200>; - }; - - fec1: ethernet@02188000 { - compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; - reg = <0x02188000 0x4000>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ENET>, - <&clks IMX6UL_CLK_ENET_AHB>, - <&clks IMX6UL_CLK_ENET_PTP>, - <&clks IMX6UL_CLK_ENET_REF>, - <&clks IMX6UL_CLK_ENET_REF>; - clock-names = "ipg", "ahb", "ptp", - "enet_clk_ref", "enet_out"; - stop-mode = <&gpr 0x10 3>; - fsl,num-tx-queues=<1>; - fsl,num-rx-queues=<1>; - fsl,magic-packet; - fsl,wakeup_irq = <0>; - status = "disabled"; - }; - - usdhc1: usdhc@02190000 { - compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; - reg = <0x02190000 0x4000>; - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_USDHC1>, - <&clks IMX6UL_CLK_USDHC1>, - <&clks IMX6UL_CLK_USDHC1>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - fsl,tuning-step= <2>; - status = "disabled"; - }; - - usdhc2: usdhc@02194000 { - compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; - reg = <0x02194000 0x4000>; - interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_USDHC2>, - <&clks IMX6UL_CLK_USDHC2>, - <&clks IMX6UL_CLK_USDHC2>; - clock-names = "ipg", "ahb", "per"; - bus-width = <4>; - fsl,tuning-step= <2>; - status = "disabled"; - }; - - adc1: adc@02198000 { - compatible = "fsl,imx6ul-adc", "fsl,vf610-adc"; - reg = <0x02198000 0x4000>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_ADC1>; - num-channels = <2>; - clock-names = "adc"; - status = "disabled"; - }; - - i2c1: i2c@021a0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; - reg = <0x021a0000 0x4000>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_I2C1>; - status = "disabled"; - }; - - i2c2: i2c@021a4000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; - reg = <0x021a4000 0x4000>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_I2C2>; - status = "disabled"; - }; - - i2c3: i2c@021a8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; - reg = <0x021a8000 0x4000>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_I2C3>; - status = "disabled"; - }; - - romcp@021ac000 { - compatible = "fsl,imx6ul-romcp", "syscon"; - reg = <0x021ac000 0x4000>; - }; - - mmdc: mmdc@021b0000 { - compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; - reg = <0x021b0000 0x4000>; - }; - - weim: weim@021b8000 { - compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; - reg = <0x021b8000 0x4000>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>; - }; - - ocotp: ocotp-ctrl@021bc000 { - compatible = "fsl,imx6ull-ocotp", "syscon"; - reg = <0x021bc000 0x4000>; - clocks = <&clks IMX6UL_CLK_OCOTP>; - }; - - csu: csu@021c0000 { - compatible = "fsl,imx6ul-csu"; - reg = <0x021c0000 0x4000>; - interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - csi: csi@021c4000 { - compatible = "fsl,imx6ul-csi", "fsl,imx6s-csi"; - reg = <0x021c4000 0x4000>; - interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, - <&clks IMX6UL_CLK_CSI>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "disp-axi", "csi_mclk", "disp_dcic"; - status = "disabled"; - }; - - lcdif: lcdif@021c8000 { - compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; - reg = <0x021c8000 0x4000>; - interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_LCDIF_PIX>, - <&clks IMX6UL_CLK_LCDIF_APB>, - <&clks IMX6UL_CLK_DUMMY>; - clock-names = "pix", "axi", "disp_axi"; - status = "disabled"; - }; - - pxp: pxp@021cc000 { - compatible = "fsl,imx6ull-pxp-dma", "fsl,imx7d-pxp-dma"; - reg = <0x021cc000 0x4000>; - interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_DUMMY>, <&clks IMX6UL_CLK_PXP>; - clock-names = "pxp_ipg", "pxp_axi"; - status = "disabled"; - }; - - qspi: qspi@021e0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ull-qspi", "fsl,imx6ul-qspi"; - reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>; - reg-names = "QuadSPI", "QuadSPI-memory"; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_QSPI>, - <&clks IMX6UL_CLK_QSPI>; - clock-names = "qspi_en", "qspi"; - status = "disabled"; - }; - - wdog3: wdog@021e4000 { - compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; - reg = <0x021e4000 0x4000>; - interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_WDOG3>; - status = "disabled"; - }; - - uart2: serial@021e8000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021e8000 0x4000>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART2_IPG>, - <&clks IMX6UL_CLK_UART2_SERIAL>; - clock-names = "ipg", "per"; - dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart3: serial@021ec000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021ec000 0x4000>; - interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART3_IPG>, - <&clks IMX6UL_CLK_UART3_SERIAL>; - clock-names = "ipg", "per"; - dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart4: serial@021f0000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021f0000 0x4000>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART4_IPG>, - <&clks IMX6UL_CLK_UART4_SERIAL>; - clock-names = "ipg", "per"; - dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - uart5: serial@021f4000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021f4000 0x4000>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART5_IPG>, - <&clks IMX6UL_CLK_UART5_SERIAL>; - clock-names = "ipg", "per"; - dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - i2c4: i2c@021f8000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,imx6ul-i2c", "fsl,imx21-i2c"; - reg = <0x021f8000 0x4000>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_I2C4>; - status = "disabled"; - }; - - uart6: serial@021fc000 { - compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; - reg = <0x021fc000 0x4000>; - interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6UL_CLK_UART6_IPG>, - <&clks IMX6UL_CLK_UART6_SERIAL>; - clock-names = "ipg", "per"; - dmas = <&sdma 0 4 0>, <&sdma 47 4 0>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - }; - - aips3: aips-bus@02200000 { + aips3: aips-bus@2200000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; reg = <0x02200000 0x100000>; ranges; - dcp: dcp@02280000 { + dcp: crypto@2280000 { + compatible = "fsl,imx6ull-dcp", "fsl,imx28-dcp"; reg = <0x02280000 0x4000>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - /*clocks = <&clks IMX6UL_CLK_DCP>;*/ + clocks = <&clks IMX6ULL_CLK_DCP_CLK>; clock-names = "dcp"; - status = "disabled"; }; - rngb: rngb@02284000 { - reg = <0x02284000 0x4000>; - interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + iomuxc_snvs: iomuxc-snvs@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; }; - uart8: serial@02288000 { + uart8: serial@2288000 { compatible = "fsl,imx6ul-uart", - "fsl,imx6q-uart", "fsl,imx21-uart"; + "fsl,imx6q-uart"; reg = <0x02288000 0x4000>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6UL_CLK_UART8_IPG>, <&clks IMX6UL_CLK_UART8_SERIAL>; clock-names = "ipg", "per"; - dmas = <&sdma 45 4 0>, <&sdma 46 4 0>; - dma-names = "rx", "tx"; status = "disabled"; }; - - epdc: epdc@0228c000 { - compatible = "fsl,imx7d-epdc"; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - reg = <0x0228c000 0x4000>; - clocks = <&clks IMX6UL_CLK_EPDC_ACLK>, - <&clks IMX6UL_CLK_EPDC_PIX>; - clock-names = "epdc_axi", "epdc_pix"; - /* Need to fix epdc-ram */ - /* epdc-ram = <&gpr 0x4 30>; */ - status = "disabled"; - }; - - iomuxc_snvs: iomuxc-snvs@02290000 { - compatible = "fsl,imx6ull-iomuxc-snvs"; - reg = <0x02290000 0x10000>; - }; - - snvs_gpr: snvs-gpr@0x02294000 { - compatible = "fsl, imx6ull-snvs-gpr"; - reg = <0x02294000 0x10000>; - }; }; }; }; diff --git a/arch/arm/dts/imx6ulz-14x14-evk.dts b/arch/arm/dts/imx6ulz-14x14-evk.dts new file mode 100644 index 0000000..483d973 --- /dev/null +++ b/arch/arm/dts/imx6ulz-14x14-evk.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright 2018 NXP. + +/dts-v1/; + +#include "imx6ulz.dtsi" +#include "imx6ul-14x14-evk.dtsi" + +/delete-node/ &fec1; +/delete-node/ &fec2; +/delete-node/ &can1; +/delete-node/ &can2; +/delete-node/ &lcdif; +/delete-node/ &tsc; + +/ { + model = "Freescale i.MX6 ULZ 14x14 EVK Board"; + compatible = "fsl,imx6ulz-14x14-evk", "fsl,imx6ull", "fsl,imx6ulz"; + + /delete-node/ panel; +}; diff --git a/arch/arm/dts/imx6ulz.dtsi b/arch/arm/dts/imx6ulz.dtsi new file mode 100644 index 0000000..aeb2ddc --- /dev/null +++ b/arch/arm/dts/imx6ulz.dtsi @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Copyright 2018 NXP. + +#include "imx6ull.dtsi" + +/ { + aliases { + /delete-property/ ethernet0; + /delete-property/ ethernet1; + /delete-property/ i2c2; + /delete-property/ i2c3; + /delete-property/ serial4; + /delete-property/ serial5; + /delete-property/ serial6; + /delete-property/ serial7; + /delete-property/ spi2; + /delete-property/ spi3; + /delete-property/ spi4; + }; +}; + +/delete-node/ &adc1; +/delete-node/ &ecspi3; +/delete-node/ &ecspi4; +/delete-node/ &epit2; +/delete-node/ &gpt2; +/delete-node/ &i2c3; +/delete-node/ &i2c4; +/delete-node/ &pwm5; +/delete-node/ &pwm6; +/delete-node/ &pwm7; +/delete-node/ &pwm8; +/delete-node/ &uart5; +/delete-node/ &uart6; +/delete-node/ &uart7; +/delete-node/ &uart8; diff --git a/arch/arm/dts/imx7d-pico-u-boot.dtsi b/arch/arm/dts/imx7d-pico-u-boot.dtsi new file mode 100644 index 0000000..7307fba --- /dev/null +++ b/arch/arm/dts/imx7d-pico-u-boot.dtsi @@ -0,0 +1,87 @@ +/{ + aliases { + mmc0 = &usdhc3; + usb0 = &usbotg1; + display0 = &lcdif; + }; +}; + +&usbotg1 { + dr_mode = "peripheral"; + }; + +&lcdif { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcdif>; + status = "okay"; + display = <&display0>; + u-boot,dm-pre-reloc; + + display0: display { + bits-per-pixel = <16>; + bus-width = <24>; + + display-timings { + native-mode = <&timing0>; + timing0: timing0 { + clock-frequency = <33260000>; + hactive = <800>; + vactive = <480>; + hback-porch = <11>; + hfront-porch = <11>; + vback-porch = <12>; + vfront-porch = <11>; + hsync-len = <46>; + vsync-len = <210>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + interlaced = <0>; + }; + }; + }; +}; + +&iomuxc { + pinctrl_backlight: backlight { + fsl,pins = < + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x0 + >; + }; + + pinctrl_lcdif: lcdifgrp { + fsl,pins = < + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x78 + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x78 + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x78 + MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 + >; + }; + +}; diff --git a/arch/arm/dts/imx7d-pico.dtsi b/arch/arm/dts/imx7d-pico.dtsi index 7cd8be2..57391fc 100644 --- a/arch/arm/dts/imx7d-pico.dtsi +++ b/arch/arm/dts/imx7d-pico.dtsi @@ -5,14 +5,9 @@ /dts-v1/; #include "imx7d.dtsi" - +#include "imx7d-pico-u-boot.dtsi" / { - aliases { - mmc0 = &usdhc3; - usb0 = &usbotg1; - }; - /* Will be filled by the bootloader */ memory@80000000 { device_type = "memory"; @@ -98,7 +93,7 @@ <&clks IMX7D_ENET1_TIME_ROOT_CLK>; assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; assigned-clock-rates = <0>, <100000000>; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <ðphy0>; fsl,magic-packet; phy-reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; @@ -297,7 +292,6 @@ &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; - dr_mode = "peripheral"; status = "okay"; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi new file mode 100644 index 0000000..1095d36 --- /dev/null +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +&{/soc} { + u-boot,dm-pre-reloc; + u-boot,dm-spl; +}; + +&clk { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&osc_24m { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips1 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&aips3 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&pinctrl_reg_usdhc2_vmmc { + u-boot,dm-spl; +}; + +&pinctrl_uart2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2_gpio { + u-boot,dm-spl; +}; + +&pinctrl_usdhc2 { + u-boot,dm-spl; +}; + +&pinctrl_usdhc3 { + u-boot,dm-spl; +}; + +&gpio1 { + u-boot,dm-spl; +}; + +&gpio2 { + u-boot,dm-spl; +}; + +&gpio3 { + u-boot,dm-spl; +}; + +&gpio4 { + u-boot,dm-spl; +}; + +&gpio5 { + u-boot,dm-spl; +}; + +&uart2 { + u-boot,dm-spl; +}; + +&usdhc1 { + u-boot,dm-spl; +}; + +&usdhc2 { + u-boot,dm-spl; +}; + +&usdhc3 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx8mm-evk.dts b/arch/arm/dts/imx8mm-evk.dts new file mode 100644 index 0000000..2d5d894 --- /dev/null +++ b/arch/arm/dts/imx8mm-evk.dts @@ -0,0 +1,235 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include "imx8mm.dtsi" + +/ { + model = "FSL i.MX8MM EVK board"; + compatible = "fsl,imx8mm-evk", "fsl,imx8mm"; + + chosen { + stdout-path = &uart2; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_led>; + + status { + label = "status"; + gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + at803x,led-act-blind-workaround; + at803x,eee-okay; + at803x,vddio-1p8v; + }; + }; +}; + +&uart2 { /* console */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + bus-width = <4>; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_fec1: fec1grp { + fsl,pins = < + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f + MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 + MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 + MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f + MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 + MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f + MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19 + >; + }; + + pinctrl_gpio_led: gpioledgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 + >; + }; + + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc { + fsl,pins = < + MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 + MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + >; + }; +}; diff --git a/arch/arm/dts/imx8mm-pinfunc.h b/arch/arm/dts/imx8mm-pinfunc.h new file mode 100644 index 0000000..e25f7fc --- /dev/null +++ b/arch/arm/dts/imx8mm-pinfunc.h @@ -0,0 +1,629 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2017-2018 NXP + */ + +#ifndef __DTS_IMX8MM_PINFUNC_H +#define __DTS_IMX8MM_PINFUNC_H + +/* + * The pin function ID is a tuple of + * <mux_reg conf_reg input_reg mux_mode input_val> + */ + +#define MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO01_ANAMIX_REF_CLK_24M 0x02C 0x294 0x4BC 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO01_CCMSRCGPCMIX_EXT_CLK2 0x02C 0x294 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO02_GPIO1_IO2 0x030 0x298 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x030 0x298 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_ANY 0x030 0x298 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO02_SJC_DE_B 0x030 0x298 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x034 0x29C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO03_USDHC1_VSELECT 0x034 0x29C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO03_SDMA1_EXT_EVENT0 0x034 0x29C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO03_ANAMIX_XTAL_OK 0x034 0x29C 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO03_SJC_DONE 0x034 0x29C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x038 0x2A0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x038 0x2A0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO04_SDMA1_EXT_EVENT1 0x038 0x2A0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO04_ANAMIX_XTAL_OK_LV 0x038 0x2A0 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO04_USDHC1_TEST_TRIG 0x038 0x2A0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x03C 0x2A4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO05_M4_NMI 0x03C 0x2A4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO05_CCMSRCGPCMIX_PMIC_READY 0x03C 0x2A4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO05_CCMSRCGPCMIX_INT_BOOT 0x03C 0x2A4 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO05_USDHC2_TEST_TRIG 0x03C 0x2A4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x040 0x2A8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO06_ENET1_MDC 0x040 0x2A8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO06_USDHC1_CD_B 0x040 0x2A8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO06_CCMSRCGPCMIX_EXT_CLK3 0x040 0x2A8 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO06_ECSPI1_TEST_TRIG 0x040 0x2A8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x044 0x2AC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO07_ENET1_MDIO 0x044 0x2AC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO07_USDHC1_WP 0x044 0x2AC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO07_CCMSRCGPCMIX_EXT_CLK4 0x044 0x2AC 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO07_ECSPI2_TEST_TRIG 0x044 0x2AC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x048 0x2B0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN 0x048 0x2B0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO08_USDHC2_RESET_B 0x048 0x2B0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO08_CCMSRCGPCMIX_WAIT 0x048 0x2B0 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO08_QSPI_TEST_TRIG 0x048 0x2B0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x04C 0x2B4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT 0x04C 0x2B4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO09_SDMA2_EXT_EVENT0 0x04C 0x2B4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO09_CCMSRCGPCMIX_STOP 0x04C 0x2B4 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO09_RAWNAND_TEST_TRIG 0x04C 0x2B4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x050 0x2B8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO10_USB1_OTG_ID 0x050 0x2B8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO10_OCOTP_CTRL_WRAPPER_FUSE_LATCHED 0x050 0x2B8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x054 0x2BC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO11_USB2_OTG_ID 0x054 0x2BC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO11_CCMSRCGPCMIX_PMIC_READY 0x054 0x2BC 0x4BC 0x5 0x1 +#define MX8MM_IOMUXC_GPIO1_IO11_CCMSRCGPCMIX_OUT0 0x054 0x2BC 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO11_CAAM_WRAPPER_RNG_OSC_OBS 0x054 0x2BC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO12_GPIO1_IO12 0x058 0x2C0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x058 0x2C0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO12_SDMA2_EXT_EVENT1 0x058 0x2C0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO12_CCMSRCGPCMIX_OUT1 0x058 0x2C0 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO12_CSU_CSU_ALARM_AUT0 0x058 0x2C0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x05C 0x2C4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x05C 0x2C4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO13_PWM2_OUT 0x05C 0x2C4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO13_CCMSRCGPCMIX_OUT2 0x05C 0x2C4 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO13_CSU_CSU_ALARM_AUT1 0x05C 0x2C4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x060 0x2C8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR 0x060 0x2C8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO14_PWM3_OUT 0x060 0x2C8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x060 0x2C8 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO14_CSU_CSU_ALARM_AUT2 0x060 0x2C8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x064 0x2CC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC 0x064 0x2CC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_GPIO1_IO15_PWM4_OUT 0x064 0x2CC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2 0x064 0x2CC 0x000 0x6 0x0 +#define MX8MM_IOMUXC_GPIO1_IO15_CSU_CSU_INT_DEB 0x064 0x2CC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x068 0x2D0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_MDC_GPIO1_IO16 0x068 0x2D0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x06C 0x2D4 0x4C0 0x0 0x1 +#define MX8MM_IOMUXC_ENET_MDIO_GPIO1_IO17 0x06C 0x2D4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x070 0x2D8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_TD3_GPIO1_IO18 0x070 0x2D8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x074 0x2DC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_TD2_ENET1_TX_CLK 0x074 0x2DC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ENET_TD2_GPIO1_IO19 0x074 0x2DC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x078 0x2E0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_TD1_GPIO1_IO20 0x078 0x2E0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x07C 0x2E4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_TD0_GPIO1_IO21 0x07C 0x2E4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x080 0x2E8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_TX_CTL_GPIO1_IO22 0x080 0x2E8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x084 0x2EC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_TXC_ENET1_TX_ER 0x084 0x2EC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ENET_TXC_GPIO1_IO23 0x084 0x2EC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x088 0x2F0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x088 0x2F0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x08C 0x2F4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_RXC_ENET1_RX_ER 0x08C 0x2F4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ENET_RXC_GPIO1_IO25 0x08C 0x2F4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x090 0x2F8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_RD0_GPIO1_IO26 0x090 0x2F8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x094 0x2FC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_RD1_GPIO1_IO27 0x094 0x2FC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x098 0x300 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_RD2_GPIO1_IO28 0x098 0x300 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x09C 0x304 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ENET_RD3_GPIO1_IO29 0x09C 0x304 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x0A0 0x308 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_CLK_GPIO2_IO0 0x0A0 0x308 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD 0x0A4 0x30C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_CMD_GPIO2_IO1 0x0A4 0x30C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0 0x0A8 0x310 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA0_GPIO2_IO2 0x0A8 0x31 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1 0x0AC 0x314 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA1_GPIO2_IO3 0x0AC 0x314 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2 0x0B0 0x318 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA2_GPIO2_IO4 0x0B0 0x318 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3 0x0B4 0x31C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA3_GPIO2_IO5 0x0B4 0x31C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA4_USDHC1_DATA4 0x0B8 0x320 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6 0x0B8 0x320 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA5_USDHC1_DATA5 0x0BC 0x324 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7 0x0BC 0x324 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA6_USDHC1_DATA6 0x0C0 0x328 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x0C0 0x328 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_DATA7_USDHC1_DATA7 0x0C4 0x32C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9 0x0C4 0x32C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0x0C8 0x330 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x0C8 0x330 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x0CC 0x334 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x0CC 0x334 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x0D0 0x338 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x0D0 0x338 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x0D4 0x33C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_CLK_GPIO2_IO13 0x0D4 0x33C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_CLK_CCMSRCGPCMIX_OBSERVE0 0x0D4 0x33C 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_CLK_OBSERVE_MUX_OUT0 0x0D4 0x33C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x0D8 0x340 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_CMD_GPIO2_IO14 0x0D8 0x340 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_CMD_CCMSRCGPCMIX_OBSERVE1 0x0D8 0x340 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_CMD_OBSERVE_MUX_OUT1 0x0D8 0x340 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x0DC 0x344 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_DATA0_GPIO2_IO15 0x0DC 0x344 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_DATA0_CCMSRCGPCMIX_OBSERVE2 0x0DC 0x344 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_DATA0_OBSERVE_MUX_OUT2 0x0DC 0x344 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x0E0 0x348 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_DATA1_GPIO2_IO16 0x0E0 0x348 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_DATA1_CCMSRCGPCMIX_WAIT 0x0E0 0x348 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_DATA1_OBSERVE_MUX_OUT3 0x0E0 0x348 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x0E4 0x34C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_DATA2_GPIO2_IO17 0x0E4 0x34C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_DATA2_CCMSRCGPCMIX_STOP 0x0E4 0x34C 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_DATA2_OBSERVE_MUX_OUT4 0x0E4 0x34C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x0E8 0x350 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_DATA3_GPIO2_IO18 0x0E8 0x350 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_DATA3_CCMSRCGPCMIX_EARLY_RESET 0x0E8 0x350 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0x0EC 0x354 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x0EC 0x354 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_RESET_B_CCMSRCGPCMIX_SYSTEM_RESET 0x0EC 0x354 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SD2_WP_USDHC2_WP 0x0F0 0x358 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 0x0F0 0x358 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SD2_WP_SIM_M_HMASTLOCK 0x0F0 0x358 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_ALE_RAWNAND_ALE 0x0F4 0x35C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x0F4 0x35C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x0F4 0x35C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_ALE_SIM_M_HPROT0 0x0F4 0x35C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B 0x0F8 0x360 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x0F8 0x360 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x0F8 0x360 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_CE0_B_SIM_M_HPROT1 0x0F8 0x360 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_CE1_B_RAWNAND_CE1_B 0x0FC 0x364 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_CE1_B_QSPI_A_SS1_B 0x0FC 0x364 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x0FC 0x364 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x0FC 0x364 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_CE1_B_SIM_M_HPROT2 0x0FC 0x364 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_CE2_B_RAWNAND_CE2_B 0x100 0x368 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_CE2_B_QSPI_B_SS0_B 0x100 0x368 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x100 0x368 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x100 0x368 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_CE2_B_SIM_M_HPROT3 0x100 0x368 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_CE3_B_RAWNAND_CE3_B 0x104 0x36C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_CE3_B_QSPI_B_SS1_B 0x104 0x36C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x104 0x36C 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4 0x104 0x36C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_CE3_B_SIM_M_HADDR0 0x104 0x36C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_CLE_RAWNAND_CLE 0x108 0x370 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_CLE_QSPI_B_SCLK 0x108 0x370 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x108 0x370 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 0x108 0x370 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_CLE_SIM_M_HADDR1 0x108 0x370 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA00_RAWNAND_DATA00 0x10C 0x374 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x10C 0x374 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6 0x10C 0x374 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA00_SIM_M_HADDR2 0x10C 0x374 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA01_RAWNAND_DATA01 0x110 0x378 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x110 0x378 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x110 0x378 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA01_SIM_M_HADDR3 0x110 0x378 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA02_RAWNAND_DATA02 0x114 0x37C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x114 0x37C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA02_GPIO3_IO8 0x114 0x37C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA02_SIM_M_HADDR4 0x114 0x37C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA03_RAWNAND_DATA03 0x118 0x380 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x118 0x380 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9 0x118 0x380 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA03_SIM_M_HADDR5 0x118 0x380 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA04_RAWNAND_DATA04 0x11C 0x384 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA04_QSPI_B_DATA0 0x11C 0x384 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x11C 0x384 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_DATA04_GPIO3_IO10 0x11C 0x384 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA04_SIM_M_HADDR6 0x11C 0x384 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA05_RAWNAND_DATA05 0x120 0x388 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA05_QSPI_B_DATA1 0x120 0x388 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x120 0x388 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_DATA05_GPIO3_IO11 0x120 0x388 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA05_SIM_M_HADDR7 0x120 0x388 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA06_RAWNAND_DATA06 0x124 0x38C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA06_QSPI_B_DATA2 0x124 0x38C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x124 0x38C 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_DATA06_GPIO3_IO12 0x124 0x38C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA06_SIM_M_HADDR8 0x124 0x38C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DATA07_RAWNAND_DATA07 0x128 0x390 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DATA07_QSPI_B_DATA3 0x128 0x390 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x128 0x390 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_DATA07_GPIO3_IO13 0x128 0x390 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DATA07_SIM_M_HADDR9 0x128 0x390 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_DQS_RAWNAND_DQS 0x12C 0x394 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_DQS_QSPI_A_DQS 0x12C 0x394 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_DQS_GPIO3_IO14 0x12C 0x394 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_DQS_SIM_M_HADDR10 0x12C 0x394 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_RE_B_RAWNAND_RE_B 0x130 0x398 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_RE_B_QSPI_B_DQS 0x130 0x398 0x000 0x1 0x0 +#define MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x130 0x398 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 0x130 0x398 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_RE_B_SIM_M_HADDR11 0x130 0x398 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_READY_B_RAWNAND_READY_B 0x134 0x39C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x134 0x39C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_READY_B_SIM_M_HADDR12 0x134 0x39C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_WE_B_RAWNAND_WE_B 0x138 0x3A0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x138 0x3A0 0x000 0x12 0x0 +#define MX8MM_IOMUXC_NAND_WE_B_GPIO3_IO17 0x138 0x3A0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_WE_B_SIM_M_HADDR13 0x138 0x3A0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_NAND_WP_B_RAWNAND_WP_B 0x13C 0x3A4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x13C 0x3A4 0x000 0x2 0x0 +#define MX8MM_IOMUXC_NAND_WP_B_GPIO3_IO18 0x13C 0x3A4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_NAND_WP_B_SIM_M_HADDR14 0x13C 0x3A4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC 0x140 0x3A8 0x4E4 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_RXFS_SAI1_TX_DATA0 0x140 0x3A8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x140 0x3A8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_RXC_SAI5_RX_BCLK 0x144 0x3AC 0x4D0 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_RXC_SAI1_TX_DATA1 0x144 0x3AC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_RXC_PDM_CLK 0x144 0x3AC 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x144 0x3AC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0x148 0x3B0 0x4D4 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_RXD0_SAI1_TX_DATA2 0x148 0x3B0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_RXD0_PDM_DATA0 0x148 0x3B0 0x534 0x4 0x0 +#define MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x148 0x3B0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_RXD1_SAI5_RX_DATA1 0x14C 0x3B4 0x4D8 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_RXD1_SAI1_TX_DATA3 0x14C 0x3B4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_RXD1_SAI1_TX_SYNC 0x14C 0x3B4 0x4CC 0x2 0x0 +#define MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0x14C 0x3B4 0x4EC 0x3 0x0 +#define MX8MM_IOMUXC_SAI5_RXD1_PDM_DATA1 0x14C 0x3B4 0x538 0x4 0x0 +#define MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x14C 0x3B4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_RXD2_SAI5_RX_DATA2 0x150 0x3B8 0x4DC 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_RXD2_SAI1_TX_DATA4 0x150 0x3B8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_RXD2_SAI1_TX_SYNC 0x150 0x3B8 0x4CC 0x2 0x1 +#define MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0x150 0x3B8 0x4E8 0x3 0x0 +#define MX8MM_IOMUXC_SAI5_RXD2_PDM_DATA2 0x150 0x3B8 0x53c 0x4 0x0 +#define MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x150 0x3B8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_RXD3_SAI5_RX_DATA3 0x154 0x3BC 0x4E0 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_RXD3_SAI1_TX_DATA5 0x154 0x3BC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_RXD3_SAI1_TX_SYNC 0x154 0x3BC 0x4CC 0x2 0x2 +#define MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0x154 0x3BC 0x000 0x3 0x0 +#define MX8MM_IOMUXC_SAI5_RXD3_PDM_DATA3 0x154 0x3BC 0x540 0x4 0x0 +#define MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x154 0x3BC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0x158 0x3C0 0x52C 0x0 0x0 +#define MX8MM_IOMUXC_SAI5_MCLK_SAI1_TX_BCLK 0x158 0x3C0 0x4C8 0x1 0x0 +#define MX8MM_IOMUXC_SAI5_MCLK_SAI4_MCLK 0x158 0x3C0 0x000 0x2 0x0 +#define MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x158 0x3C0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI5_MCLK_CCMSRCGPCMIX_TESTER_ACK 0x158 0x3C0 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXFS_SAI1_RX_SYNC 0x15C 0x3C4 0x4C4 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXFS_SAI5_RX_SYNC 0x15C 0x3C4 0x4E4 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_RXFS_CORESIGHT_TRACE_CLK 0x15C 0x3C4 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x15C 0x3C4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXFS_SIM_M_HADDR15 0x15C 0x3C4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXC_SAI1_RX_BCLK 0x160 0x3C8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXC_SAI5_RX_BCLK 0x160 0x3C8 0x4D0 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_RXC_CORESIGHT_TRACE_CTL 0x160 0x3C8 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXC_GPIO4_IO1 0x160 0x3C8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXC_SIM_M_HADDR16 0x160 0x3C8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0x164 0x3CC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD0_SAI5_RX_DATA0 0x164 0x3CC 0x4D4 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_RXD0_PDM_DATA0 0x164 0x3CC 0x534 0x3 0x1 +#define MX8MM_IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0 0x164 0x3CC 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD0_GPIO4_IO2 0x164 0x3CC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD0_CCMSRCGPCMIX_BOOT_CFG0 0x164 0x3CC 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD0_SIM_M_HADDR17 0x164 0x3CC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD1_SAI1_RX_DATA1 0x168 0x3D0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD1_SAI5_RX_DATA1 0x168 0x3D0 0x4D8 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_RXD1_PDM_DATA1 0x168 0x3D0 0x538 0x3 0x1 +#define MX8MM_IOMUXC_SAI1_RXD1_CORESIGHT_TRACE1 0x168 0x3D0 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD1_GPIO4_IO3 0x168 0x3D0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD1_CCMSRCGPCMIX_BOOT_CFG1 0x168 0x3D0 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD1_SIM_M_HADDR18 0x168 0x3D0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD2_SAI1_RX_DATA2 0x16C 0x3D4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD2_SAI5_RX_DATA2 0x16C 0x3D4 0x4DC 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_RXD2_PDM_DATA2 0x16C 0x3D4 0x53C 0x3 0x1 +#define MX8MM_IOMUXC_SAI1_RXD2_CORESIGHT_TRACE2 0x16C 0x3D4 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x16C 0x3D4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD2_CCMSRCGPCMIX_BOOT_CFG2 0x16C 0x3D4 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD2_SIM_M_HADDR19 0x16C 0x3D4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD3_SAI1_RX_DATA3 0x170 0x3D8 0x4E0 0x0 0x1 +#define MX8MM_IOMUXC_SAI1_RXD3_SAI5_RX_DATA3 0x170 0x3D8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_RXD3_PDM_DATA3 0x170 0x3D8 0x540 0x3 0x1 +#define MX8MM_IOMUXC_SAI1_RXD3_CORESIGHT_TRACE3 0x170 0x3D8 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x170 0x3D8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD3_CCMSRCGPCMIX_BOOT_CFG3 0x170 0x3D8 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD3_SIM_M_HADDR20 0x170 0x3D8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_SAI1_RX_DATA4 0x174 0x3DC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_SAI6_TX_BCLK 0x174 0x3DC 0x51C 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_SAI6_RX_BCLK 0x174 0x3DC 0x510 0x2 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_CORESIGHT_TRACE4 0x174 0x3DC 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_GPIO4_IO6 0x174 0x3DC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_CCMSRCGPCMIX_BOOT_CFG4 0x174 0x3DC 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD4_SIM_M_HADDR21 0x174 0x3DC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_SAI1_RX_DATA5 0x178 0x3E0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_SAI6_TX_DATA0 0x178 0x3E0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0x178 0x3E0 0x514 0x2 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_SAI1_RX_SYNC 0x178 0x3E0 0x4C4 0x3 0x1 +#define MX8MM_IOMUXC_SAI1_RXD5_CORESIGHT_TRACE5 0x178 0x3E0 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x178 0x3E0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_CCMSRCGPCMIX_BOOT_CFG5 0x178 0x3E0 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD5_SIM_M_HADDR22 0x178 0x3E0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_SAI1_RX_DATA6 0x17C 0x3E4 0x520 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_SAI6_TX_SYNC 0x17C 0x3E4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0x17C 0x3E4 0x518 0x2 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_CORESIGHT_TRACE6 0x17C 0x3E4 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x17C 0x3E4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_CCMSRCGPCMIX_BOOT_CFG6 0x17C 0x3E4 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD6_SIM_M_HADDR23 0x17C 0x3E4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_SAI1_RX_DATA7 0x180 0x3E8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_SAI6_MCLK 0x180 0x3E8 0x530 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC 0x180 0x3E8 0x4CC 0x2 0x4 +#define MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4 0x180 0x3E8 0x000 0x3 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_CORESIGHT_TRACE7 0x180 0x3E8 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x180 0x3E8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_CCMSRCGPCMIX_BOOT_CFG7 0x180 0x3E8 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_RXD7_SIM_M_HADDR24 0x180 0x3E8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0x184 0x3EC 0x4CC 0x0 0x3 +#define MX8MM_IOMUXC_SAI1_TXFS_SAI5_TX_SYNC 0x184 0x3EC 0x4EC 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_TXFS_CORESIGHT_EVENTO 0x184 0x3EC 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXFS_GPIO4_IO10 0x184 0x3EC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXFS_SIM_M_HADDR25 0x184 0x3EC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0x188 0x3F0 0x4C8 0x0 0x1 +#define MX8MM_IOMUXC_SAI1_TXC_SAI5_TX_BCLK 0x188 0x3F0 0x4E8 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_TXC_CORESIGHT_EVENTI 0x188 0x3F0 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x188 0x3F0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXC_SIM_M_HADDR26 0x188 0x3F0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0x18C 0x3F4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD0_SAI5_TX_DATA0 0x18C 0x3F4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_TXD0_CORESIGHT_TRACE8 0x18C 0x3F4 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x18C 0x3F4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD0_CCMSRCGPCMIX_BOOT_CFG8 0x18C 0x3F4 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD0_SIM_M_HADDR27 0x18C 0x3F4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0x190 0x3F8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD1_SAI5_TX_DATA1 0x190 0x3F8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_TXD1_CORESIGHT_TRACE9 0x190 0x3F8 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x190 0x3F8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD1_CCMSRCGPCMIX_BOOT_CFG9 0x190 0x3F8 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD1_SIM_M_HADDR28 0x190 0x3F8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 0x194 0x3FC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD2_SAI5_TX_DATA2 0x194 0x3FC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_TXD2_CORESIGHT_TRACE10 0x194 0x3FC 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x194 0x3FC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD2_CCMSRCGPCMIX_BOOT_CFG10 0x194 0x3FC 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD2_SIM_M_HADDR29 0x194 0x3FC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0x198 0x400 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD3_SAI5_TX_DATA3 0x198 0x400 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI1_TXD3_CORESIGHT_TRACE11 0x198 0x400 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x198 0x400 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD3_CCMSRCGPCMIX_BOOT_CFG11 0x198 0x400 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD3_SIM_M_HADDR30 0x198 0x400 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4 0x19C 0x404 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0x19C 0x404 0x510 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_TXD4_SAI6_TX_BCLK 0x19C 0x404 0x51C 0x2 0x1 +#define MX8MM_IOMUXC_SAI1_TXD4_CORESIGHT_TRACE12 0x19C 0x404 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x19C 0x404 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD4_CCMSRCGPCMIX_BOOT_CFG12 0x19C 0x404 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD4_SIM_M_HADDR31 0x19C 0x404 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5 0x1A0 0x408 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD5_SAI6_RX_DATA0 0x1A0 0x408 0x514 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0x1A0 0x408 0x000 0x2 0x0 +#define MX8MM_IOMUXC_SAI1_TXD5_CORESIGHT_TRACE13 0x1A0 0x408 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x1A0 0x408 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD5_CCMSRCGPCMIX_BOOT_CFG13 0x1A0 0x408 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD5_SIM_M_HBURST0 0x1A0 0x408 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6 0x1A4 0x40C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD6_SAI6_RX_SYNC 0x1A4 0x40C 0x518 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_TXD6_SAI6_TX_SYNC 0x1A4 0x40C 0x520 0x2 0x1 +#define MX8MM_IOMUXC_SAI1_TXD6_CORESIGHT_TRACE14 0x1A4 0x40C 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x1A4 0x40C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD6_CCMSRCGPCMIX_BOOT_CFG14 0x1A4 0x40C 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD6_SIM_M_HBURST1 0x1A4 0x40C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7 0x1A8 0x410 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_TXD7_SAI6_MCLK 0x1A8 0x410 0x530 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_TXD7_PDM_CLK 0x1A8 0x410 0x000 0x3 0x0 +#define MX8MM_IOMUXC_SAI1_TXD7_CORESIGHT_TRACE15 0x1A8 0x410 0x000 0x4 0x0 +#define MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x1A8 0x410 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_TXD7_CCMSRCGPCMIX_BOOT_CFG15 0x1A8 0x410 0x000 0x6 0x0 +#define MX8MM_IOMUXC_SAI1_TXD7_SIM_M_HBURST2 0x1A8 0x410 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0x1AC 0x414 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI1_MCLK_SAI5_MCLK 0x1AC 0x414 0x52C 0x1 0x1 +#define MX8MM_IOMUXC_SAI1_MCLK_SAI1_TX_BCLK 0x1AC 0x414 0x4C8 0x2 0x2 +#define MX8MM_IOMUXC_SAI1_MCLK_PDM_CLK 0x1AC 0x414 0x000 0x3 0x0 +#define MX8MM_IOMUXC_SAI1_MCLK_GPIO4_IO20 0x1AC 0x414 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI1_MCLK_SIM_M_HRESP 0x1AC 0x414 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_RXFS_SAI2_RX_SYNC 0x1B0 0x418 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_RXFS_SAI5_TX_SYNC 0x1B0 0x418 0x4EC 0x1 0x2 +#define MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x1B0 0x418 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_RXFS_SIM_M_HSIZE0 0x1B0 0x418 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_RXC_SAI2_RX_BCLK 0x1B4 0x41C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_RXC_SAI5_TX_BCLK 0x1B4 0x41C 0x4E8 0x1 0x2 +#define MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1B4 0x41C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_RXC_SIM_M_HSIZE1 0x1B4 0x41C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0x1B8 0x420 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_RXD0_SAI5_TX_DATA0 0x1B8 0x420 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x1B8 0x420 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_RXD0_SIM_M_HSIZE2 0x1B8 0x420 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0x1BC 0x424 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_TXFS_SAI5_TX_DATA1 0x1BC 0x424 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI2_TXFS_GPIO4_IO24 0x1BC 0x424 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_TXFS_SIM_M_HWRITE 0x1BC 0x424 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0x1C0 0x428 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_TXC_SAI5_TX_DATA2 0x1C0 0x428 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x1C0 0x428 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_TXC_SIM_M_HREADYOUT 0x1C0 0x428 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0x1C4 0x42C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_TXD0_SAI5_TX_DATA3 0x1C4 0x42C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI2_TXD0_GPIO4_IO26 0x1C4 0x42C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_TXD0_TPSMP_CLK 0x1C4 0x42C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI2_MCLK_SAI2_MCLK 0x1C8 0x430 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI2_MCLK_SAI5_MCLK 0x1C8 0x430 0x52C 0x1 0x2 +#define MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x1C8 0x430 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI2_MCLK_TPSMP_HDATA_DIR 0x1C8 0x430 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_RXFS_SAI3_RX_SYNC 0x1CC 0x434 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_RXFS_GPT1_CAPTURE1 0x1CC 0x434 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_RXFS_SAI5_RX_SYNC 0x1CC 0x434 0x4E4 0x2 0x2 +#define MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x1CC 0x434 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_RXFS_TPSMP_HTRANS0 0x1CC 0x434 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x1D0 0x438 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_RXC_GPT1_CAPTURE2 0x1D0 0x438 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_RXC_SAI5_RX_BCLK 0x1D0 0x438 0x4D0 0x2 0x2 +#define MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x1D0 0x438 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_RXC_TPSMP_HTRANS1 0x1D0 0x438 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0x1D4 0x43C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_RXD_GPT1_COMPARE1 0x1D4 0x43C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_RXD_SAI5_RX_DATA0 0x1D4 0x43C 0x4D4 0x2 0x2 +#define MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x1D4 0x43C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_RXD_TPSMP_HDATA0 0x1D4 0x43C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x1D8 0x440 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CLK 0x1D8 0x440 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_TXFS_SAI5_RX_DATA1 0x1D8 0x440 0x4D8 0x2 0x2 +#define MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x1D8 0x440 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_TXFS_TPSMP_HDATA1 0x1D8 0x440 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0x1DC 0x444 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_TXC_GPT1_COMPARE2 0x1DC 0x444 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_TXC_SAI5_RX_DATA2 0x1DC 0x444 0x4DC 0x2 0x2 +#define MX8MM_IOMUXC_SAI3_TXC_GPIO5_IO0 0x1DC 0x444 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_TXC_TPSMP_HDATA2 0x1DC 0x444 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0x1E0 0x448 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_TXD_GPT1_COMPARE3 0x1E0 0x448 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_TXD_SAI5_RX_DATA3 0x1E0 0x448 0x4E0 0x2 0x2 +#define MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x1E0 0x448 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_TXD_TPSMP_HDATA3 0x1E0 0x448 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0x1E4 0x44C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x1E4 0x44C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SAI3_MCLK_SAI5_MCLK 0x1E4 0x44C 0x52C 0x2 0x3 +#define MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x1E4 0x44C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SAI3_MCLK_TPSMP_HDATA4 0x1E4 0x44C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SPDIF_TX_SPDIF1_OUT 0x1E8 0x450 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x1E8 0x450 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 0x1E8 0x450 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SPDIF_TX_TPSMP_HDATA5 0x1E8 0x450 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SPDIF_RX_SPDIF1_IN 0x1EC 0x454 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x1EC 0x454 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SPDIF_RX_GPIO5_IO4 0x1EC 0x454 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SPDIF_RX_TPSMP_HDATA6 0x1EC 0x454 0x000 0x7 0x0 +#define MX8MM_IOMUXC_SPDIF_EXT_CLK_SPDIF1_EXT_CLK 0x1F0 0x458 0x000 0x0 0x0 +#define MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x1F0 0x458 0x000 0x1 0x0 +#define MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 0x1F0 0x458 0x000 0x5 0x0 +#define MX8MM_IOMUXC_SPDIF_EXT_CLK_TPSMP_HDATA7 0x1F0 0x458 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x1F4 0x45C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x1F4 0x45C 0x504 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DTE_TX 0x1F4 0x45C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI1_SCLK_GPIO5_IO6 0x1F4 0x45C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI1_SCLK_TPSMP_HDATA8 0x1F4 0x45C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x1F8 0x460 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x1F8 0x460 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DTE_RX 0x1F8 0x460 0x504 0x1 0x1 +#define MX8MM_IOMUXC_ECSPI1_MOSI_GPIO5_IO7 0x1F8 0x460 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI1_MOSI_TPSMP_HDATA9 0x1F8 0x460 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x1FC 0x464 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x1FC 0x464 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI1_MISO_UART3_DTE_RTS_B 0x1FC 0x464 0x500 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x1FC 0x464 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI1_MISO_TPSMP_HDATA10 0x1FC 0x464 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI1_SS0_ECSPI1_SS0 0x200 0x468 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x200 0x468 0x500 0x1 0x1 +#define MX8MM_IOMUXC_ECSPI1_SS0_UART3_DTE_CTS_B 0x200 0x468 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x200 0x468 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI1_SS0_TPSMP_HDATA11 0x200 0x468 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x204 0x46C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x204 0x46C 0x50C 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI2_SCLK_UART4_DTE_TX 0x204 0x46C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x204 0x46C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI2_SCLK_TPSMP_HDATA12 0x204 0x46C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x208 0x470 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x208 0x470 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI2_MOSI_UART4_DTE_RX 0x208 0x470 0x50C 0x1 0x1 +#define MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x208 0x470 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI2_MOSI_TPSMP_HDATA13 0x208 0x470 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x20C 0x474 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x20C 0x474 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI2_MISO_UART4_DTE_RTS_B 0x20C 0x474 0x508 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI2_MISO_GPIO5_IO12 0x20C 0x474 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI2_MISO_TPSMP_HDATA14 0x20C 0x474 0x000 0x7 0x0 +#define MX8MM_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x210 0x478 0x000 0x0 0x0 +#define MX8MM_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x210 0x478 0x508 0x1 0x1 +#define MX8MM_IOMUXC_ECSPI2_SS0_UART4_DTE_CTS_B 0x210 0x478 0x000 0x1 0x0 +#define MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x210 0x478 0x000 0x5 0x0 +#define MX8MM_IOMUXC_ECSPI2_SS0_TPSMP_HDATA15 0x210 0x478 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x214 0x47C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C1_SCL_ENET1_MDC 0x214 0x47C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x214 0x47C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C1_SCL_TPSMP_HDATA16 0x214 0x47C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x218 0x480 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C1_SDA_ENET1_MDIO 0x218 0x480 0x4C0 0x1 0x2 +#define MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15 0x218 0x480 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C1_SDA_TPSMP_HDATA17 0x218 0x480 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x21C 0x484 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C2_SCL_ENET1_1588_EVENT1_IN 0x21C 0x484 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 0x21C 0x484 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C2_SCL_TPSMP_HDATA18 0x21C 0x484 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x220 0x488 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C2_SDA_ENET1_1588_EVENT1_OUT 0x220 0x488 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 0x220 0x488 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C2_SDA_TPSMP_HDATA19 0x220 0x488 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x224 0x48C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C3_SCL_PWM4_OUT 0x224 0x48C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C3_SCL_GPT2_CLK 0x224 0x48C 0x000 0x2 0x0 +#define MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x224 0x48C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C3_SCL_TPSMP_HDATA20 0x224 0x48C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x228 0x490 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C3_SDA_PWM3_OUT 0x228 0x490 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C3_SDA_GPT3_CLK 0x228 0x490 0x000 0x2 0x0 +#define MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x228 0x490 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C3_SDA_TPSMP_HDATA21 0x228 0x490 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x22C 0x494 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C4_SCL_PWM2_OUT 0x22C 0x494 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x22C 0x494 0x524 0x12 0x0 +#define MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20 0x22C 0x494 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C4_SCL_TPSMP_HDATA22 0x22C 0x494 0x000 0x7 0x0 +#define MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x230 0x498 0x000 0x0 0x0 +#define MX8MM_IOMUXC_I2C4_SDA_PWM1_OUT 0x230 0x498 0x000 0x1 0x0 +#define MX8MM_IOMUXC_I2C4_SDA_PCIE2_CLKREQ_B 0x230 0x498 0x528 0x2 0x0 +#define MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0x230 0x498 0x000 0x5 0x0 +#define MX8MM_IOMUXC_I2C4_SDA_TPSMP_HDATA23 0x230 0x498 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x234 0x49C 0x4F4 0x0 0x0 +#define MX8MM_IOMUXC_UART1_RXD_UART1_DTE_TX 0x234 0x49C 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x234 0x49C 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART1_RXD_GPIO5_IO22 0x234 0x49C 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART1_RXD_TPSMP_HDATA24 0x234 0x49C 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x238 0x4A0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART1_TXD_UART1_DTE_RX 0x238 0x4A0 0x4F4 0x0 0x0 +#define MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x238 0x4A0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART1_TXD_GPIO5_IO23 0x238 0x4A0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART1_TXD_TPSMP_HDATA25 0x238 0x4A0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x23C 0x4A4 0x4FC 0x0 0x0 +#define MX8MM_IOMUXC_UART2_RXD_UART2_DTE_TX 0x23C 0x4A4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x23C 0x4A4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART2_RXD_GPIO5_IO24 0x23C 0x4A4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART2_RXD_TPSMP_HDATA26 0x23C 0x4A4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x240 0x4A8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART2_TXD_UART2_DTE_RX 0x240 0x4A8 0x4FC 0x0 0x1 +#define MX8MM_IOMUXC_UART2_TXD_ECSPI3_SS0 0x240 0x4A8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x240 0x4A8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART2_TXD_TPSMP_HDATA27 0x240 0x4A8 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 0x244 0x4AC 0x504 0x0 0x2 +#define MX8MM_IOMUXC_UART3_RXD_UART3_DTE_TX 0x244 0x4AC 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x244 0x4AC 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART3_RXD_UART1_DTE_RTS_B 0x244 0x4AC 0x4F0 0x1 0x0 +#define MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26 0x244 0x4AC 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART3_RXD_TPSMP_HDATA28 0x244 0x4AC 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 0x248 0x4B0 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART3_TXD_UART3_DTE_RX 0x248 0x4B0 0x504 0x0 0x3 +#define MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x248 0x4B0 0x4F0 0x1 0x1 +#define MX8MM_IOMUXC_UART3_TXD_UART1_DTE_CTS_B 0x248 0x4B0 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART3_TXD_GPIO5_IO27 0x248 0x4B0 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART3_TXD_TPSMP_HDATA29 0x248 0x4B0 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x24C 0x4B4 0x50C 0x0 0x2 +#define MX8MM_IOMUXC_UART4_RXD_UART4_DTE_TX 0x24C 0x4B4 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x24C 0x4B4 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART4_RXD_UART2_DTE_RTS_B 0x24C 0x4B4 0x4F8 0x1 0x0 +#define MX8MM_IOMUXC_UART4_RXD_PCIE1_CLKREQ_B 0x24C 0x4B4 0x524 0x2 0x1 +#define MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 0x24C 0x4B4 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART4_RXD_TPSMP_HDATA30 0x24C 0x4B4 0x000 0x7 0x0 +#define MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x250 0x4B8 0x000 0x0 0x0 +#define MX8MM_IOMUXC_UART4_TXD_UART4_DTE_RX 0x250 0x4B8 0x50C 0x0 0x3 +#define MX8MM_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x250 0x4B8 0x4F8 0x1 0x1 +#define MX8MM_IOMUXC_UART4_TXD_UART2_DTE_CTS_B 0x250 0x4B8 0x000 0x1 0x0 +#define MX8MM_IOMUXC_UART4_TXD_PCIE2_CLKREQ_B 0x250 0x4B8 0x528 0x2 0x1 +#define MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29 0x250 0x4B8 0x000 0x5 0x0 +#define MX8MM_IOMUXC_UART4_TXD_TPSMP_HDATA31 0x250 0x4B8 0x000 0x7 0x0 + +#endif /* __DTS_IMX8MM_PINFUNC_H */ diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi new file mode 100644 index 0000000..6b407a9 --- /dev/null +++ b/arch/arm/dts/imx8mm.dtsi @@ -0,0 +1,733 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2019 NXP + */ + +#include <dt-bindings/clock/imx8mm-clock.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/thermal/thermal.h> + +#include "imx8mm-pinfunc.h" + +/ { + compatible = "fsl,imx8mm"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + ethernet0 = &fec1; + i2c0 = &i2c1; + i2c1 = &i2c2; + i2c2 = &i2c3; + i2c3 = &i2c4; + serial0 = &uart1; + serial1 = &uart2; + serial2 = &uart3; + serial3 = &uart4; + spi0 = &ecspi1; + spi1 = &ecspi2; + spi2 = &ecspi3; + mmc0 = &usdhc1; + mmc1 = &usdhc2; + mmc2 = &usdhc3; + gpio0 = &gpio1; + gpio1 = &gpio2; + gpio2 = &gpio3; + gpio3 = &gpio4; + gpio4 = &gpio5; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + A53_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clk IMX8MM_CLK_ARM>; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; + }; + + A53_1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x1>; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clk IMX8MM_CLK_ARM>; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; + }; + + A53_2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x2>; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clk IMX8MM_CLK_ARM>; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; + }; + + A53_3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x3>; + clock-latency = <61036>; /* two CLK32 periods */ + clocks = <&clk IMX8MM_CLK_ARM>; + enable-method = "psci"; + next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; + }; + + A53_L2: l2-cache0 { + compatible = "cache"; + }; + }; + + a53_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <850000>; + clock-latency-ns = <150000>; + }; + + opp-1600000000 { + opp-hz = /bits/ 64 <1600000000>; + opp-microvolt = <900000>; + clock-latency-ns = <150000>; + opp-suspend; + }; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0 0x80000000>; + }; + + osc_32k: clock-osc-32k { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "osc_32k"; + }; + + osc_24m: clock-osc-24m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "osc_24m"; + }; + + clk_ext1: clock-ext1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133000000>; + clock-output-names = "clk_ext1"; + }; + + clk_ext2: clock-ext2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133000000>; + clock-output-names = "clk_ext2"; + }; + + clk_ext3: clock-ext3 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <133000000>; + clock-output-names = "clk_ext3"; + }; + + clk_ext4: clock-ext4 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency= <133000000>; + clock-output-names = "clk_ext4"; + }; + + gic: interrupt-controller@38800000 { + compatible = "arm,gic-v3"; + reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */ + <0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */ + #interrupt-cells = <3>; + interrupt-controller; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 + (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; + interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */ + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */ + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, /* Virtual */ + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */ + clock-frequency = <8000000>; + arm,no-tick-in-suspend; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x0 0x3e000000>; + + aips1: bus@30000000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gpio1: gpio@30200000 { + compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; + reg = <0x30200000 0x10000>; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio2: gpio@30210000 { + compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; + reg = <0x30210000 0x10000>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio3: gpio@30220000 { + compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; + reg = <0x30220000 0x10000>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio4: gpio@30230000 { + compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; + reg = <0x30230000 0x10000>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio5: gpio@30240000 { + compatible = "fsl,imx8mm-gpio", "fsl,imx35-gpio"; + reg = <0x30240000 0x10000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + wdog1: watchdog@30280000 { + compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; + reg = <0x30280000 0x10000>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_WDOG1_ROOT>; + status = "disabled"; + }; + + wdog2: watchdog@30290000 { + compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; + reg = <0x30290000 0x10000>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_WDOG2_ROOT>; + status = "disabled"; + }; + + wdog3: watchdog@302a0000 { + compatible = "fsl,imx8mm-wdt", "fsl,imx21-wdt"; + reg = <0x302a0000 0x10000>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_WDOG3_ROOT>; + status = "disabled"; + }; + + sdma2: dma-controller@302c0000 { + compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; + reg = <0x302c0000 0x10000>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>, + <&clk IMX8MM_CLK_SDMA2_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + + sdma3: dma-controller@302b0000 { + compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; + reg = <0x302b0000 0x10000>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>, + <&clk IMX8MM_CLK_SDMA3_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + + iomuxc: pinctrl@30330000 { + compatible = "fsl,imx8mm-iomuxc"; + reg = <0x30330000 0x10000>; + }; + + gpr: iomuxc-gpr@30340000 { + compatible = "fsl,imx8mm-iomuxc-gpr", "syscon"; + reg = <0x30340000 0x10000>; + }; + + ocotp: ocotp-ctrl@30350000 { + compatible = "fsl,imx8mm-ocotp", "fsl,imx7d-ocotp", "syscon"; + reg = <0x30350000 0x10000>; + clocks = <&clk IMX8MM_CLK_OCOTP_ROOT>; + /* For nvmem subnodes */ + #address-cells = <1>; + #size-cells = <1>; + }; + + anatop: anatop@30360000 { + compatible = "fsl,imx8mm-anatop", "syscon", "simple-bus"; + reg = <0x30360000 0x10000>; + }; + + snvs: snvs@30370000 { + compatible = "fsl,sec-v4.0-mon","syscon", "simple-mfd"; + reg = <0x30370000 0x10000>; + + snvs_rtc: snvs-rtc-lp { + compatible = "fsl,sec-v4.0-mon-rtc-lp"; + regmap = <&snvs>; + offset = <0x34>; + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + }; + + snvs_pwrkey: snvs-powerkey { + compatible = "fsl,sec-v4.0-pwrkey"; + regmap = <&snvs>; + interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; + linux,keycode = <KEY_POWER>; + wakeup-source; + }; + }; + + clk: clock-controller@30380000 { + compatible = "fsl,imx8mm-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, + <&clk_ext3>, <&clk_ext4>; + clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4"; + }; + + src: reset-controller@30390000 { + compatible = "fsl,imx8mm-src", "syscon"; + reg = <0x30390000 0x10000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + #reset-cells = <1>; + }; + }; + + aips2: bus@30400000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pwm1: pwm@30660000 { + compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; + reg = <0x30660000 0x10000>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_PWM1_ROOT>, + <&clk IMX8MM_CLK_PWM1_ROOT>; + clock-names = "ipg", "per"; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm2: pwm@30670000 { + compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; + reg = <0x30670000 0x10000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_PWM2_ROOT>, + <&clk IMX8MM_CLK_PWM2_ROOT>; + clock-names = "ipg", "per"; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm3: pwm@30680000 { + compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; + reg = <0x30680000 0x10000>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_PWM3_ROOT>, + <&clk IMX8MM_CLK_PWM3_ROOT>; + clock-names = "ipg", "per"; + #pwm-cells = <2>; + status = "disabled"; + }; + + pwm4: pwm@30690000 { + compatible = "fsl,imx8mm-pwm", "fsl,imx27-pwm"; + reg = <0x30690000 0x10000>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_PWM4_ROOT>, + <&clk IMX8MM_CLK_PWM4_ROOT>; + clock-names = "ipg", "per"; + #pwm-cells = <2>; + status = "disabled"; + }; + }; + + aips3: bus@30800000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + ecspi1: spi@30820000 { + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30820000 0x10000>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_ECSPI1_ROOT>, + <&clk IMX8MM_CLK_ECSPI1_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 0 7 1>, <&sdma1 1 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi2: spi@30830000 { + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30830000 0x10000>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>, + <&clk IMX8MM_CLK_ECSPI2_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + ecspi3: spi@30840000 { + compatible = "fsl,imx8mm-ecspi", "fsl,imx51-ecspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30840000 0x10000>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_ECSPI3_ROOT>, + <&clk IMX8MM_CLK_ECSPI3_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 4 7 1>, <&sdma1 5 7 2>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart1: serial@30860000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30860000 0x10000>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_UART1_ROOT>, + <&clk IMX8MM_CLK_UART1_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 22 4 0>, <&sdma1 23 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart3: serial@30880000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30880000 0x10000>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_UART3_ROOT>, + <&clk IMX8MM_CLK_UART3_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart2: serial@30890000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30890000 0x10000>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_UART2_ROOT>, + <&clk IMX8MM_CLK_UART2_ROOT>; + clock-names = "ipg", "per"; + status = "disabled"; + }; + + i2c1: i2c@30a20000 { + compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30a20000 0x10000>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_I2C1_ROOT>; + status = "disabled"; + }; + + i2c2: i2c@30a30000 { + compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30a30000 0x10000>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_I2C2_ROOT>; + status = "disabled"; + }; + + i2c3: i2c@30a40000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; + reg = <0x30a40000 0x10000>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_I2C3_ROOT>; + status = "disabled"; + }; + + i2c4: i2c@30a50000 { + compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x30a50000 0x10000>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_I2C4_ROOT>; + status = "disabled"; + }; + + uart4: serial@30a60000 { + compatible = "fsl,imx8mm-uart", "fsl,imx6q-uart"; + reg = <0x30a60000 0x10000>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_UART4_ROOT>, + <&clk IMX8MM_CLK_UART4_ROOT>; + clock-names = "ipg", "per"; + dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + usdhc1: mmc@30b40000 { + compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; + reg = <0x30b40000 0x10000>; + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_NAND_USDHC_BUS>, + <&clk IMX8MM_CLK_USDHC1_ROOT>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <&clk IMX8MM_CLK_USDHC1>; + assigned-clock-rates = <400000000>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + bus-width = <4>; + status = "disabled"; + }; + + usdhc2: mmc@30b50000 { + compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; + reg = <0x30b50000 0x10000>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_NAND_USDHC_BUS>, + <&clk IMX8MM_CLK_USDHC2_ROOT>; + clock-names = "ipg", "ahb", "per"; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + bus-width = <4>; + status = "disabled"; + }; + + usdhc3: mmc@30b60000 { + compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; + reg = <0x30b60000 0x10000>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_NAND_USDHC_BUS>, + <&clk IMX8MM_CLK_USDHC3_ROOT>; + clock-names = "ipg", "ahb", "per"; + assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>; + assigned-clock-rates = <400000000>; + fsl,tuning-start-tap = <20>; + fsl,tuning-step= <2>; + bus-width = <4>; + status = "disabled"; + }; + + sdma1: dma-controller@30bd0000 { + compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma"; + reg = <0x30bd0000 0x10000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>, + <&clk IMX8MM_CLK_SDMA1_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + + fec1: ethernet@30be0000 { + compatible = "fsl,imx8mm-fec", "fsl,imx6sx-fec"; + reg = <0x30be0000 0x10000>; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_ENET1_ROOT>, + <&clk IMX8MM_CLK_ENET1_ROOT>, + <&clk IMX8MM_CLK_ENET_TIMER>, + <&clk IMX8MM_CLK_ENET_REF>, + <&clk IMX8MM_CLK_ENET_PHY_REF>; + clock-names = "ipg", "ahb", "ptp", + "enet_clk_ref", "enet_out"; + assigned-clocks = <&clk IMX8MM_CLK_ENET_AXI>, + <&clk IMX8MM_CLK_ENET_TIMER>, + <&clk IMX8MM_CLK_ENET_REF>, + <&clk IMX8MM_CLK_ENET_TIMER>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>, + <&clk IMX8MM_SYS_PLL2_100M>, + <&clk IMX8MM_SYS_PLL2_125M>; + assigned-clock-rates = <0>, <0>, <125000000>, <100000000>; + fsl,num-tx-queues = <3>; + fsl,num-rx-queues = <3>; + status = "disabled"; + }; + + }; + + aips4: bus@32c00000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbotg1: usb@32e40000 { + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; + reg = <0x32e40000 0x200>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; + clock-names = "usb1_ctrl_root_clk"; + assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>, + <&clk IMX8MM_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>, + <&clk IMX8MM_SYS_PLL1_100M>; + fsl,usbphy = <&usbphynop1>; + fsl,usbmisc = <&usbmisc1 0>; + status = "disabled"; + }; + + usbphynop1: usbphynop1 { + compatible = "usb-nop-xceiv"; + clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; + assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; + clock-names = "main_clk"; + }; + + usbmisc1: usbmisc@32e40200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc"; + #index-cells = <1>; + reg = <0x32e40200 0x200>; + }; + + usbotg2: usb@32e50000 { + compatible = "fsl,imx8mm-usb", "fsl,imx7d-usb"; + reg = <0x32e50000 0x200>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_USB1_CTRL_ROOT>; + clock-names = "usb1_ctrl_root_clk"; + assigned-clocks = <&clk IMX8MM_CLK_USB_BUS>, + <&clk IMX8MM_CLK_USB_CORE_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_500M>, + <&clk IMX8MM_SYS_PLL1_100M>; + fsl,usbphy = <&usbphynop2>; + fsl,usbmisc = <&usbmisc2 0>; + status = "disabled"; + }; + + usbphynop2: usbphynop2 { + compatible = "usb-nop-xceiv"; + clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; + assigned-clocks = <&clk IMX8MM_CLK_USB_PHY_REF>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_100M>; + clock-names = "main_clk"; + }; + + usbmisc2: usbmisc@32e50200 { + compatible = "fsl,imx8mm-usbmisc", "fsl,imx7d-usbmisc"; + #index-cells = <1>; + reg = <0x32e50200 0x200>; + }; + + }; + + dma_apbh: dma-controller@33000000 { + compatible = "fsl,imx7d-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x33000000 0x2000>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; + #dma-cells = <1>; + dma-channels = <4>; + clocks = <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>; + }; + + gpmi: nand-controller@33002000{ + compatible = "fsl,imx8mm-gpmi-nand", "fsl,imx7d-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x33002000 0x2000>, <0x33004000 0x4000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "bch"; + clocks = <&clk IMX8MM_CLK_NAND_ROOT>, + <&clk IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK>; + clock-names = "gpmi_io", "gpmi_bch_apb"; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/pcl063-common.dtsi b/arch/arm/dts/pcl063-common.dtsi index 2b14b2d..b88dde2 100644 --- a/arch/arm/dts/pcl063-common.dtsi +++ b/arch/arm/dts/pcl063-common.dtsi @@ -113,7 +113,7 @@ pinctrl_enet1: enet1grp { fsl,pins = < MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 - MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0X1b0b0 + MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 @@ -191,6 +191,7 @@ MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x170f9 >; }; }; diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi new file mode 100644 index 0000000..e01539e --- /dev/null +++ b/arch/arm/dts/sam9x60.dtsi @@ -0,0 +1,304 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sam9x60.dtsi - Device Tree Include file for SAM9X60 SoC. + * + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + * + * Author: Sandeep Sheriker M <sandeepsheriker.mallikarjun@microchip.com> + */ + +#include "skeleton.dtsi" +#include <dt-bindings/dma/at91.h> +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/clock/at91.h> + +/{ + model = "Microchip SAM9X60 SoC"; + compatible = "microchip,sam9x60"; + + aliases { + serial0 = &dbgu; + gpio0 = &pioA; + gpio1 = &pioB; + gpio3 = &pioD; + spi0 = &qspi; + }; + + clocks { + slow_xtal: slow_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + + main_xtal: main_xtal { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + }; + + ahb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sdhci0: sdhci-host@80000000 { + compatible = "microchip,sam9x60-sdhci"; + reg = <0x80000000 0x300>; + clocks = <&sdhci0_clk>, <&sdhci0_gclk>, <&main>; + clock-names = "hclock", "multclk", "baseclk"; + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0>; + }; + + apb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + qspi: spi@f0014000 { + compatible = "microchip,sam9x60-qspi"; + reg = <0xf0014000 0x100>, <0x70000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + clocks = <&qspi_clk>, <&qspick>; + clock-names = "pclk", "qspick"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + macb0: ethernet@f802c000 { + compatible = "cdns,sam9x60-macb", "cdns,macb"; + reg = <0xf802c000 0x100>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_rmii>; + clock-names = "hclk", "pclk"; + clocks = <&macb0_clk>, <&macb0_clk>; + status = "disabled"; + }; + + dbgu: serial@fffff200 { + compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; + reg = <0xfffff200 0x200>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dbgu>; + clocks = <&dbgu_clk>; + clock-names = "usart"; + }; + + pinctrl { + #address-cells = <1>; + #size-cells = <1>; + compatible = "microchip,sam9x60-pinctrl", "simple-bus"; + ranges = <0xfffff400 0xfffff400 0x800>; + reg = <0xfffff400 0x200 /* pioA */ + 0xfffff600 0x200 /* pioB */ + 0xfffff800 0x200 /* pioC */ + 0xfffffa00 0x200>; /* pioD */ + + /* shared pinctrl settings */ + dbgu { + pinctrl_dbgu: dbgu-0 { + atmel,pins = + <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + + macb0 { + pinctrl_macb0_rmii: macb0_rmii-0 { + atmel,pins = + <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */ + AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */ + AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */ + AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */ + AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */ + AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */ + AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ + AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ + AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ + AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */ + }; + }; + + sdhci0 { + pinctrl_sdhci0: sdhci0 { + atmel,pins = + <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT /* PA17 CK periph A with pullup */ + AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 CMD periph A with pullup */ + AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA15 DAT0 periph A */ + AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 DAT1 periph A with pullup */ + AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 DAT2 periph A with pullup */ + AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 DAT3 periph A with pullup */ + }; + }; + }; + + pioA: gpio@fffff400 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; + #gpio-cells = <2>; + gpio-controller; + clocks = <&pioA_clk>; + }; + + pioB: gpio@fffff600 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffff600 0x200>; + #gpio-cells = <2>; + gpio-controller; + clocks = <&pioB_clk>; + }; + + pioD: gpio@fffffa00 { + compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; + reg = <0xfffffa00 0x200>; + #gpio-cells = <2>; + gpio-controller; + clocks = <&pioD_clk>; + }; + + pmc: pmc@fffffc00 { + compatible = "atmel,at91sam9x5-pmc"; + reg = <0xfffffc00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + + main: mainck { + compatible = "atmel,at91sam9x5-clk-main"; + #clock-cells = <0>; + }; + + plla: pllack { + compatible = "microchip,sam9x60-clk-pll"; + #clock-cells = <0>; + clocks = <&main>; + reg = <0>; + atmel,clk-input-range = <8000000 24000000>; + #atmel,pll-clk-output-range-cells = <4>; + atmel,pll-clk-output-ranges = <140000000 1200000000 0 0>; + }; + + mck: masterck { + compatible = "atmel,at91sam9x5-clk-master"; + #clock-cells = <0>; + clocks = <&md_slck>, <&main>, <&plla>; + atmel,clk-output-range = <140000000 200000000>; + atmel,clk-divisors = <1 2 4 6>; + }; + + system: systemck { + compatible = "atmel,at91rm9200-clk-system"; + #address-cells = <1>; + #size-cells = <0>; + + qspick: qspick { + #clock-cells = <0>; + reg = <19>; + clocks = <&mck>; + }; + }; + + periph: periphck { + compatible = "microchip,sam9x60-clk-peripheral"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&mck>; + + pioA_clk: pioA_clk { + #clock-cells = <0>; + reg = <2>; + }; + + pioB_clk: pioB_clk { + #clock-cells = <0>; + reg = <3>; + }; + + pioD_clk: pioD_clk { + #clock-cells = <0>; + reg = <44>; + }; + + sdhci0_clk: sdhci0_clk { + #clock-cells = <0>; + reg = <12>; + }; + + dbgu_clk: dbgu_clk { + #clock-cells = <0>; + reg = <47>; + }; + + macb0_clk: macb0_clk { + #clock-cells = <0>; + reg = <24>; + }; + + qspi_clk: qspi_clk { + #clock-cells = <0>; + reg = <35>; + }; + }; + + generic: gck { + compatible = "microchip,sam9x60-clk-generated"; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&md_slck>, <&td_slck>, <&main>, <&mck>, <&plla>; + + sdhci0_gclk: sdhci0_gclk { + #clock-cells = <0>; + reg = <12>; + }; + }; + }; + + pit: timer@fffffe40 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe40 0x10>; + clocks = <&mck>; + }; + + slowckc: sckc@fffffe50 { + compatible = "atmel,at91sam9x5-sckc"; + reg = <0xfffffe50 0x4>; + + slow_osc: slow_osc { + compatible = "atmel,at91sam9x5-clk-slow-osc"; + #clock-cells = <0>; + clocks = <&slow_xtal>; + }; + + slow_rc_osc: slow_rc_osc { + compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; + #clock-cells = <0>; + clock-frequency = <32768>; + }; + + td_slck: td_slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc>, <&slow_osc>; + }; + + md_slck: md_slck { + compatible = "atmel,at91sam9x5-clk-slow"; + #clock-cells = <0>; + clocks = <&slow_rc_osc>; + }; + }; + }; + }; + + onewire_tm: onewire { + compatible = "w1-gpio"; + status = "disabled"; + }; +}; diff --git a/arch/arm/dts/sam9x60ek-u-boot.dtsi b/arch/arm/dts/sam9x60ek-u-boot.dtsi new file mode 100644 index 0000000..93cf126 --- /dev/null +++ b/arch/arm/dts/sam9x60ek-u-boot.dtsi @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sam9x60-u-boot.dts - Device Tree file for SAM9X60 SoC. + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + */ + +/ { + chosen { + u-boot,dm-pre-reloc; + }; + + ahb { + u-boot,dm-pre-reloc; + + apb { + u-boot,dm-pre-reloc; + + pinctrl { + u-boot,dm-pre-reloc; + }; + }; + }; +}; + +&sdhci0 { + u-boot,dm-pre-reloc; +}; + +&dbgu { + u-boot,dm-pre-reloc; +}; + +&qspi { + u-boot,dm-pre-reloc; +}; + +&pinctrl_dbgu { + u-boot,dm-pre-reloc; +}; + +&pinctrl_sdhci0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl_qspi { + u-boot,dm-pre-reloc; +}; + +&pioA { + u-boot,dm-pre-reloc; +}; + +&pioB { + u-boot,dm-pre-reloc; +}; + +&pmc { + u-boot,dm-pre-reloc; +}; + +&main { + u-boot,dm-pre-reloc; +}; + +&plla { + u-boot,dm-pre-reloc; +}; + +&mck { + u-boot,dm-pre-reloc; +}; + +&system { + u-boot,dm-pre-reloc; +}; + +&qspick { + u-boot,dm-pre-reloc; +}; + +&periph { + u-boot,dm-pre-reloc; +}; + +&pioA_clk { + u-boot,dm-pre-reloc; +}; + +&pioB_clk { + u-boot,dm-pre-reloc; +}; + +&sdhci0_clk { + u-boot,dm-pre-reloc; +}; + +&dbgu_clk { + u-boot,dm-pre-reloc; +}; + +&qspi_clk { + u-boot,dm-pre-reloc; +}; + +&generic { + u-boot,dm-pre-reloc; +}; + +&sdhci0_gclk { + u-boot,dm-pre-reloc; +}; + +&slowckc { + u-boot,dm-pre-reloc; +}; + +&slow_osc { + u-boot,dm-pre-reloc; +}; + +&slow_rc_osc { + u-boot,dm-pre-reloc; +}; + +&td_slck { + u-boot,dm-pre-reloc; +}; + +&md_slck { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts new file mode 100644 index 0000000..bed59f3 --- /dev/null +++ b/arch/arm/dts/sam9x60ek.dts @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sam9x60ek.dts - Device Tree file for SAM9X60 EK board + * + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + * + * Author: Sandeep Sheriker M <Sandeepsheriker.mallikarjun@microchip.com> + */ +/dts-v1/; +#include "sam9x60.dtsi" + +/ { + model = "Microchip SAM9X60-Ek"; + compatible = "microchip,sam9x60ek", "microchip,sam9x60", "atmel,at91sam9"; + + chosen { + stdout-path = &dbgu; + }; + + onewire_tm: onewire { + gpios = <&pioD 14 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_onewire_tm_default>; + status = "okay"; + + w1_eeprom: w1_eeprom@0 { + compatible = "maxim,ds24b33"; + status = "okay"; + }; + }; + + ahb { + apb { + qspi: spi@f0014000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + nor_flash: sst26vf064@0 { + compatible = "spi-flash"; + reg = <0>; + spi-max-frequency = <80000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + }; + }; + + pinctrl { + pinctrl_qspi: qspi { + atmel,pins = + <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE + AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE + AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP + AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; + }; + + pinctrl_onewire_tm_default: onewire_tm_default { + atmel,pins = + <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; + + }; + }; + }; +}; + +&macb0 { + phy-mode = "rmii"; + status = "okay"; +}; diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index 830251a..5adc47b 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -7,6 +7,7 @@ aliases { spi0 = &spi0; spi1 = &qspi0; + spi2 = &qspi1; i2c0 = &i2c0; i2c1 = &i2c1; }; diff --git a/arch/arm/dts/sama5d27_wlsom1.dtsi b/arch/arm/dts/sama5d27_wlsom1.dtsi new file mode 100644 index 0000000..889a003 --- /dev/null +++ b/arch/arm/dts/sama5d27_wlsom1.dtsi @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * sama5d27_wlsom1.dtsi - Device Tree file for SAMA5D27 WLSOM1 + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + */ +#include "sama5d2.dtsi" +#include "sama5d2-pinfunc.h" +/ { + model = "Microchip SAMA5D27 WLSOM1"; + compatible = "microchip,sama5d27-wlsom1", "atmel,sama5d2", "atmel,sama5"; + + memory { + reg = <0x20000000 0x10000000>; + }; + + ahb { + apb { + qspi1: spi@f0024000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi1_default>; + + qspi1_flash: spi_flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + }; + }; + + macb0: ethernet@f8008000 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; + phy-mode = "rmii"; + + ethernet-phy@0 { + reg = <0x0>; + }; + }; + + pioA: gpio@fc038000 { + pinctrl { + pinctrl_macb0_phy_irq: macb0_phy_irq { + pinmux = <PIN_PB24__GPIO>; + bias-disable; + }; + + pinctrl_macb0_rmii: macb0_rmii { + pinmux = <PIN_PB14__GTXCK>, + <PIN_PB15__GTXEN>, + <PIN_PB16__GRXDV>, + <PIN_PB17__GRXER>, + <PIN_PB18__GRX0>, + <PIN_PB19__GRX1>, + <PIN_PB20__GTX0>, + <PIN_PB21__GTX1>, + <PIN_PB22__GMDC>, + <PIN_PB23__GMDIO>; + bias-disable; + }; + + pinctrl_qspi1_default: qspi1_default { + pinmux = <PIN_PB5__QSPI1_SCK>, + <PIN_PB6__QSPI1_CS>, + <PIN_PB7__QSPI1_IO0>, + <PIN_PB8__QSPI1_IO1>, + <PIN_PB9__QSPI1_IO2>, + <PIN_PB10__QSPI1_IO3>; + bias-pull-up; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index d4a83ee..3a85492 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -17,6 +17,7 @@ #define MXC_CPU_MX6Q 0x63 #define MXC_CPU_MX6UL 0x64 #define MXC_CPU_MX6ULL 0x65 +#define MXC_CPU_MX6ULZ 0x6B #define MXC_CPU_MX6SOLO 0x66 /* dummy */ #define MXC_CPU_MX6SLL 0x67 #define MXC_CPU_MX6D 0x6A @@ -25,6 +26,12 @@ #define MXC_CPU_MX7S 0x71 /* dummy ID */ #define MXC_CPU_MX7D 0x72 #define MXC_CPU_IMX8MQ 0x82 +#define MXC_CPU_IMX8MM 0x85 /* dummy ID */ +#define MXC_CPU_IMX8MML 0x86 /* dummy ID */ +#define MXC_CPU_IMX8MMD 0x87 /* dummy ID */ +#define MXC_CPU_IMX8MMDL 0x88 /* dummy ID */ +#define MXC_CPU_IMX8MMS 0x89 /* dummy ID */ +#define MXC_CPU_IMX8MMSL 0x8a /* dummy ID */ #define MXC_CPU_IMX8QXP_A0 0x90 /* dummy ID */ #define MXC_CPU_IMX8QM 0x91 /* dummy ID */ #define MXC_CPU_IMX8QXP 0x92 /* dummy ID */ diff --git a/arch/arm/include/asm/arch-imx8/image.h b/arch/arm/include/asm/arch-imx8/image.h new file mode 100644 index 0000000..c1e5700 --- /dev/null +++ b/arch/arm/include/asm/arch-imx8/image.h @@ -0,0 +1,56 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018-2019 NXP + */ + +#ifndef __CONTAINER_HEADER_H_ +#define __CONTAINER_HEADER_H_ + +#include <linux/sizes.h> +#include <linux/types.h> + +#define IV_MAX_LEN 32 +#define HASH_MAX_LEN 64 + +#define CONTAINER_HDR_ALIGNMENT 0x400 +#define CONTAINER_HDR_EMMC_OFFSET 0 +#define CONTAINER_HDR_MMCSD_OFFSET SZ_32K +#define CONTAINER_HDR_QSPI_OFFSET SZ_4K +#define CONTAINER_HDR_NAND_OFFSET SZ_128M + +struct container_hdr { + u8 version; + u8 length_lsb; + u8 length_msb; + u8 tag; + u32 flags; + u16 sw_version; + u8 fuse_version; + u8 num_images; + u16 sig_blk_offset; + u16 reserved; +} __packed; + +struct boot_img_t { + u32 offset; + u32 size; + u64 dst; + u64 entry; + u32 hab_flags; + u32 meta; + u8 hash[HASH_MAX_LEN]; + u8 iv[IV_MAX_LEN]; +} __packed; + +struct signature_block_hdr { + u8 version; + u8 length_lsb; + u8 length_msb; + u8 tag; + u16 srk_table_offset; + u16 cert_offset; + u16 blob_offset; + u16 signature_offset; + u32 reserved; +} __packed; +#endif diff --git a/arch/arm/include/asm/arch-imx8/sci/rpc.h b/arch/arm/include/asm/arch-imx8/sci/rpc.h index 746c2fa..8e1e9bb 100644 --- a/arch/arm/include/asm/arch-imx8/sci/rpc.h +++ b/arch/arm/include/asm/arch-imx8/sci/rpc.h @@ -32,7 +32,9 @@ #define SC_RPC_SVC_PAD 6U #define SC_RPC_SVC_MISC 7U #define SC_RPC_SVC_IRQ 8U -#define SC_RPC_SVC_ABORT 9U +#define SC_RPC_SVC_SECO 9U +#define SC_RPC_SVC_ABORT 10U + /* Types */ @@ -74,6 +76,7 @@ struct sc_rpc_msg_s { #define PM_FUNC_REBOOT 9U #define PM_FUNC_REBOOT_PARTITION 12U #define PM_FUNC_CPU_START 11U +#define PM_FUNC_IS_PARTITION_STARTED 24U /* MISC RPC */ #define MISC_FUNC_UNKNOWN 0 @@ -139,6 +142,7 @@ struct sc_rpc_msg_s { #define RM_FUNC_SET_MASTER_SID 11U #define RM_FUNC_SET_PERIPHERAL_PERMISSIONS 12U #define RM_FUNC_IS_RESOURCE_OWNED 13U +#define RM_FUNC_GET_RESOURCE_OWNER 33U #define RM_FUNC_IS_RESOURCE_MASTER 14U #define RM_FUNC_IS_RESOURCE_PERIPHERAL 15U #define RM_FUNC_GET_RESOURCE_INFO 16U @@ -155,4 +159,27 @@ struct sc_rpc_msg_s { #define RM_FUNC_IS_PAD_OWNED 25U #define RM_FUNC_DUMP 27U +/* SECO RPC */ +#define SECO_FUNC_UNKNOWN 0 +#define SECO_FUNC_IMAGE_LOAD 1U +#define SECO_FUNC_AUTHENTICATE 2U +#define SECO_FUNC_FORWARD_LIFECYCLE 3U +#define SECO_FUNC_RETURN_LIFECYCLE 4U +#define SECO_FUNC_COMMIT 5U +#define SECO_FUNC_ATTEST_MODE 6U +#define SECO_FUNC_ATTEST 7U +#define SECO_FUNC_GET_ATTEST_PKEY 8U +#define SECO_FUNC_GET_ATTEST_SIGN 9U +#define SECO_FUNC_ATTEST_VERIFY 10U +#define SECO_FUNC_GEN_KEY_BLOB 11U +#define SECO_FUNC_LOAD_KEY 12U +#define SECO_FUNC_GET_MP_KEY 13U +#define SECO_FUNC_UPDATE_MPMR 14U +#define SECO_FUNC_GET_MP_SIGN 15U +#define SECO_FUNC_BUILD_INFO 16U +#define SECO_FUNC_CHIP_INFO 17U +#define SECO_FUNC_ENABLE_DEBUG 18U +#define SECO_FUNC_GET_EVENT 19U +#define SECO_FUNC_FUSE_WRITE 20U + #endif /* SC_RPC_H */ diff --git a/arch/arm/include/asm/arch-imx8/sci/sci.h b/arch/arm/include/asm/arch-imx8/sci/sci.h index 901b90d..14ee6f9 100644 --- a/arch/arm/include/asm/arch-imx8/sci/sci.h +++ b/arch/arm/include/asm/arch-imx8/sci/sci.h @@ -11,6 +11,7 @@ #include <asm/arch/sci/svc/pad/api.h> #include <asm/arch/sci/svc/pm/api.h> #include <asm/arch/sci/svc/rm/api.h> +#include <asm/arch/sci/svc/seco/api.h> #include <asm/arch/sci/rpc.h> #include <dt-bindings/soc/imx_rsrc.h> #include <linux/errno.h> @@ -58,14 +59,23 @@ static inline int sc_err_to_linux(sc_err_t err) /* PM API*/ int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode); +int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_power_mode_t *mode); int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_pm_clock_rate_t *rate); int sc_pm_get_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_pm_clock_rate_t *rate); int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_bool_t enable, sc_bool_t autog); +int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, + sc_pm_clk_parent_t parent); +int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, + sc_faddr_t address); +sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt); /* MISC API */ +int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, + sc_ctrl_t ctrl, u32 val); int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, u32 *val); void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev); @@ -77,10 +87,40 @@ int sc_misc_get_temp(sc_ipc_t ipc, sc_rsrc_t resource, sc_misc_temp_t temp, /* RM API */ sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr); +int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start, + sc_faddr_t addr_end); +int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, + sc_rm_pt_t pt, sc_rm_perm_t perm); int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start, sc_faddr_t *addr_end); sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource); +int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, + sc_bool_t isolated, sc_bool_t restricted, + sc_bool_t grant, sc_bool_t coherent); +int sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt); +int sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt); +int sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent); +int sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource); +int sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad); +sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad); +int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rm_pt_t *pt); /* PAD API */ int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val); + +/* SMMU API */ +int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid); + +/* SECO API */ +int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, + sc_faddr_t addr); +int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change); +int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l, + u32 *uid_h); +void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit); +int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event); +int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr, + sc_faddr_t export_addr, u16 max_size); + #endif diff --git a/arch/arm/include/asm/arch-imx8/sci/svc/seco/api.h b/arch/arm/include/asm/arch-imx8/sci/svc/seco/api.h new file mode 100644 index 0000000..3ed0584 --- /dev/null +++ b/arch/arm/include/asm/arch-imx8/sci/svc/seco/api.h @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#ifndef SC_SECO_API_H +#define SC_SECO_API_H + +/* Includes */ + +#include <asm/arch/sci/types.h> + +/* Defines */ +#define SC_SECO_AUTH_CONTAINER 0U /* Authenticate container */ +#define SC_SECO_VERIFY_IMAGE 1U /* Verify image */ +#define SC_SECO_REL_CONTAINER 2U /* Release container */ +#define SC_SECO_AUTH_SECO_FW 3U /* SECO Firmware */ +#define SC_SECO_AUTH_HDMI_TX_FW 4U /* HDMI TX Firmware */ +#define SC_SECO_AUTH_HDMI_RX_FW 5U /* HDMI RX Firmware */ + +#define SC_SECO_RNG_STAT_UNAVAILABLE 0U /* Unable to initialize the RNG */ +#define SC_SECO_RNG_STAT_INPROGRESS 1U /* Initialization is on-going */ +#define SC_SECO_RNG_STAT_READY 2U /* Initialized */ + +/* Types */ + +/*! + * This type is used to issue SECO authenticate commands. + */ +typedef u8 sc_seco_auth_cmd_t; + +/*! + * This type is used to return the RNG initialization status. + */ +typedef u32 sc_seco_rng_stat_t; + +#endif /* SC_SECO_API_H */ diff --git a/arch/arm/include/asm/arch-imx8/sys_proto.h b/arch/arm/include/asm/arch-imx8/sys_proto.h index b8d2a0b..0e981ae 100644 --- a/arch/arm/include/asm/arch-imx8/sys_proto.h +++ b/arch/arm/include/asm/arch-imx8/sys_proto.h @@ -16,6 +16,7 @@ struct pass_over_info_t { u32 g_ap_mu; }; +extern unsigned long boot_pointer[]; void build_info(void); enum boot_device get_boot_device(void); int print_bootinfo(void); diff --git a/arch/arm/include/asm/arch-imx8m/clock.h b/arch/arm/include/asm/arch-imx8m/clock.h index e7c1670..dded6e0 100644 --- a/arch/arm/include/asm/arch-imx8m/clock.h +++ b/arch/arm/include/asm/arch-imx8m/clock.h @@ -2,27 +2,32 @@ /* * Copyright 2017 NXP * - * Peng Fan <peng.fan@nxp.com> + * Peng Fan <peng.fan at nxp.com> */ -#ifndef _ASM_ARCH_IMX8M_CLOCK_H -#define _ASM_ARCH_IMX8M_CLOCK_H - #include <linux/bitops.h> +#ifdef CONFIG_IMX8MQ +#include <asm/arch/clock_imx8mq.h> +#elif defined(CONFIG_IMX8MM) +#include <asm/arch/clock_imx8mm.h> +#else +#error "Error no clock.h" +#endif + #define MHZ(X) ((X) * 1000000UL) -enum pll_clocks { - ANATOP_ARM_PLL, - ANATOP_GPU_PLL, - ANATOP_SYSTEM_PLL1, - ANATOP_SYSTEM_PLL2, - ANATOP_SYSTEM_PLL3, - ANATOP_AUDIO_PLL1, - ANATOP_AUDIO_PLL2, - ANATOP_VIDEO_PLL1, - ANATOP_VIDEO_PLL2, - ANATOP_DRAM_PLL, +/* Mainly for compatible to imx common code. */ +enum mxc_clock { + MXC_ARM_CLK = 0, + MXC_IPG_CLK, + MXC_CSPI_CLK, + MXC_ESDHC_CLK, + MXC_ESDHC2_CLK, + MXC_ESDHC3_CLK, + MXC_I2C_CLK, + MXC_UART_CLK, + MXC_QSPI_CLK, }; enum clk_slice_type { @@ -35,297 +40,6 @@ enum clk_slice_type { DRAM_SEL_CLOCK_SLICE, }; -enum clk_root_index { - MXC_ARM_CLK = 0, - ARM_A53_CLK_ROOT = 0, - ARM_M4_CLK_ROOT = 1, - VPU_A53_CLK_ROOT = 2, - GPU_CORE_CLK_ROOT = 3, - GPU_SHADER_CLK_ROOT = 4, - MAIN_AXI_CLK_ROOT = 16, - ENET_AXI_CLK_ROOT = 17, - NAND_USDHC_BUS_CLK_ROOT = 18, - VPU_BUS_CLK_ROOT = 19, - DISPLAY_AXI_CLK_ROOT = 20, - DISPLAY_APB_CLK_ROOT = 21, - DISPLAY_RTRM_CLK_ROOT = 22, - USB_BUS_CLK_ROOT = 23, - GPU_AXI_CLK_ROOT = 24, - GPU_AHB_CLK_ROOT = 25, - NOC_CLK_ROOT = 26, - NOC_APB_CLK_ROOT = 27, - AHB_CLK_ROOT = 32, - IPG_CLK_ROOT = 33, - MXC_IPG_CLK = 33, - AUDIO_AHB_CLK_ROOT = 34, - MIPI_DSI_ESC_RX_CLK_ROOT = 36, - DRAM_SEL_CFG = 48, - CORE_SEL_CFG = 49, - DRAM_ALT_CLK_ROOT = 64, - DRAM_APB_CLK_ROOT = 65, - VPU_G1_CLK_ROOT = 66, - VPU_G2_CLK_ROOT = 67, - DISPLAY_DTRC_CLK_ROOT = 68, - DISPLAY_DC8000_CLK_ROOT = 69, - PCIE1_CTRL_CLK_ROOT = 70, - PCIE1_PHY_CLK_ROOT = 71, - PCIE1_AUX_CLK_ROOT = 72, - DC_PIXEL_CLK_ROOT = 73, - LCDIF_PIXEL_CLK_ROOT = 74, - SAI1_CLK_ROOT = 75, - SAI2_CLK_ROOT = 76, - SAI3_CLK_ROOT = 77, - SAI4_CLK_ROOT = 78, - SAI5_CLK_ROOT = 79, - SAI6_CLK_ROOT = 80, - SPDIF1_CLK_ROOT = 81, - SPDIF2_CLK_ROOT = 82, - ENET_REF_CLK_ROOT = 83, - ENET_TIMER_CLK_ROOT = 84, - ENET_PHY_REF_CLK_ROOT = 85, - NAND_CLK_ROOT = 86, - QSPI_CLK_ROOT = 87, - MXC_ESDHC_CLK = 88, - USDHC1_CLK_ROOT = 88, - MXC_ESDHC2_CLK = 89, - USDHC2_CLK_ROOT = 89, - I2C1_CLK_ROOT = 90, - MXC_I2C_CLK = 90, - I2C2_CLK_ROOT = 91, - I2C3_CLK_ROOT = 92, - I2C4_CLK_ROOT = 93, - UART1_CLK_ROOT = 94, - UART2_CLK_ROOT = 95, - UART3_CLK_ROOT = 96, - UART4_CLK_ROOT = 97, - USB_CORE_REF_CLK_ROOT = 98, - USB_PHY_REF_CLK_ROOT = 99, - GIC_CLK_ROOT = 100, - ECSPI1_CLK_ROOT = 101, - ECSPI2_CLK_ROOT = 102, - PWM1_CLK_ROOT = 103, - PWM2_CLK_ROOT = 104, - PWM3_CLK_ROOT = 105, - PWM4_CLK_ROOT = 106, - GPT1_CLK_ROOT = 107, - GPT2_CLK_ROOT = 108, - GPT3_CLK_ROOT = 109, - GPT4_CLK_ROOT = 110, - GPT5_CLK_ROOT = 111, - GPT6_CLK_ROOT = 112, - TRACE_CLK_ROOT = 113, - WDOG_CLK_ROOT = 114, - WRCLK_CLK_ROOT = 115, - IPP_DO_CLKO1 = 116, - IPP_DO_CLKO2 = 117, - MIPI_DSI_CORE_CLK_ROOT = 118, - MIPI_DSI_PHY_REF_CLK_ROOT = 119, - MIPI_DSI_DBI_CLK_ROOT = 120, - OLD_MIPI_DSI_ESC_CLK_ROOT = 121, - MIPI_CSI1_CORE_CLK_ROOT = 122, - MIPI_CSI1_PHY_REF_CLK_ROOT = 123, - MIPI_CSI1_ESC_CLK_ROOT = 124, - MIPI_CSI2_CORE_CLK_ROOT = 125, - MIPI_CSI2_PHY_REF_CLK_ROOT = 126, - MIPI_CSI2_ESC_CLK_ROOT = 127, - PCIE2_CTRL_CLK_ROOT = 128, - PCIE2_PHY_CLK_ROOT = 129, - PCIE2_AUX_CLK_ROOT = 130, - ECSPI3_CLK_ROOT = 131, - OLD_MIPI_DSI_ESC_RX_ROOT = 132, - DISPLAY_HDMI_CLK_ROOT = 133, - CLK_ROOT_MAX, -}; - -enum clk_root_src { - OSC_25M_CLK, - ARM_PLL_CLK, - DRAM_PLL1_CLK, - VIDEO_PLL2_CLK, - VPU_PLL_CLK, - GPU_PLL_CLK, - SYSTEM_PLL1_800M_CLK, - SYSTEM_PLL1_400M_CLK, - SYSTEM_PLL1_266M_CLK, - SYSTEM_PLL1_200M_CLK, - SYSTEM_PLL1_160M_CLK, - SYSTEM_PLL1_133M_CLK, - SYSTEM_PLL1_100M_CLK, - SYSTEM_PLL1_80M_CLK, - SYSTEM_PLL1_40M_CLK, - SYSTEM_PLL2_1000M_CLK, - SYSTEM_PLL2_500M_CLK, - SYSTEM_PLL2_333M_CLK, - SYSTEM_PLL2_250M_CLK, - SYSTEM_PLL2_200M_CLK, - SYSTEM_PLL2_166M_CLK, - SYSTEM_PLL2_125M_CLK, - SYSTEM_PLL2_100M_CLK, - SYSTEM_PLL2_50M_CLK, - SYSTEM_PLL3_CLK, - AUDIO_PLL1_CLK, - AUDIO_PLL2_CLK, - VIDEO_PLL_CLK, - OSC_32K_CLK, - EXT_CLK_1, - EXT_CLK_2, - EXT_CLK_3, - EXT_CLK_4, - OSC_27M_CLK, -}; - -/* CCGR index */ -enum clk_ccgr_index { - CCGR_DVFS = 0, - CCGR_ANAMIX = 1, - CCGR_CPU = 2, - CCGR_CSU = 4, - CCGR_DRAM1 = 5, - CCGR_DRAM2_OBSOLETE = 6, - CCGR_ECSPI1 = 7, - CCGR_ECSPI2 = 8, - CCGR_ECSPI3 = 9, - CCGR_ENET1 = 10, - CCGR_GPIO1 = 11, - CCGR_GPIO2 = 12, - CCGR_GPIO3 = 13, - CCGR_GPIO4 = 14, - CCGR_GPIO5 = 15, - CCGR_GPT1 = 16, - CCGR_GPT2 = 17, - CCGR_GPT3 = 18, - CCGR_GPT4 = 19, - CCGR_GPT5 = 20, - CCGR_GPT6 = 21, - CCGR_HS = 22, - CCGR_I2C1 = 23, - CCGR_I2C2 = 24, - CCGR_I2C3 = 25, - CCGR_I2C4 = 26, - CCGR_IOMUX = 27, - CCGR_IOMUX1 = 28, - CCGR_IOMUX2 = 29, - CCGR_IOMUX3 = 30, - CCGR_IOMUX4 = 31, - CCGR_M4 = 32, - CCGR_MU = 33, - CCGR_OCOTP = 34, - CCGR_OCRAM = 35, - CCGR_OCRAM_S = 36, - CCGR_PCIE = 37, - CCGR_PERFMON1 = 38, - CCGR_PERFMON2 = 39, - CCGR_PWM1 = 40, - CCGR_PWM2 = 41, - CCGR_PWM3 = 42, - CCGR_PWM4 = 43, - CCGR_QOS = 44, - CCGR_DISMIX = 45, - CCGR_MEGAMIX = 46, - CCGR_QSPI = 47, - CCGR_RAWNAND = 48, - CCGR_RDC = 49, - CCGR_ROM = 50, - CCGR_SAI1 = 51, - CCGR_SAI2 = 52, - CCGR_SAI3 = 53, - CCGR_SAI4 = 54, - CCGR_SAI5 = 55, - CCGR_SAI6 = 56, - CCGR_SCTR = 57, - CCGR_SDMA1 = 58, - CCGR_SDMA2 = 59, - CCGR_SEC_DEBUG = 60, - CCGR_SEMA1 = 61, - CCGR_SEMA2 = 62, - CCGR_SIM_DISPLAY = 63, - CCGR_SIM_ENET = 64, - CCGR_SIM_M = 65, - CCGR_SIM_MAIN = 66, - CCGR_SIM_S = 67, - CCGR_SIM_WAKEUP = 68, - CCGR_SIM_USB = 69, - CCGR_SIM_VPU = 70, - CCGR_SNVS = 71, - CCGR_TRACE = 72, - CCGR_UART1 = 73, - CCGR_UART2 = 74, - CCGR_UART3 = 75, - CCGR_UART4 = 76, - CCGR_USB_CTRL1 = 77, - CCGR_USB_CTRL2 = 78, - CCGR_USB_PHY1 = 79, - CCGR_USB_PHY2 = 80, - CCGR_USDHC1 = 81, - CCGR_USDHC2 = 82, - CCGR_WDOG1 = 83, - CCGR_WDOG2 = 84, - CCGR_WDOG3 = 85, - CCGR_VA53 = 86, - CCGR_GPU = 87, - CCGR_HEVC = 88, - CCGR_AVC = 89, - CCGR_VP9 = 90, - CCGR_HEVC_INTER = 91, - CCGR_GIC = 92, - CCGR_DISPLAY = 93, - CCGR_HDMI = 94, - CCGR_HDMI_PHY = 95, - CCGR_XTAL = 96, - CCGR_PLL = 97, - CCGR_TSENSOR = 98, - CCGR_VPU_DEC = 99, - CCGR_PCIE2 = 100, - CCGR_MIPI_CSI1 = 101, - CCGR_MIPI_CSI2 = 102, - CCGR_MAX, -}; - -/* src index */ -enum clk_src_index { - CLK_SRC_CKIL_SYNC_REQ = 0, - CLK_SRC_ARM_PLL_EN = 1, - CLK_SRC_GPU_PLL_EN = 2, - CLK_SRC_VPU_PLL_EN = 3, - CLK_SRC_DRAM_PLL_EN = 4, - CLK_SRC_SYSTEM_PLL1_EN = 5, - CLK_SRC_SYSTEM_PLL2_EN = 6, - CLK_SRC_SYSTEM_PLL3_EN = 7, - CLK_SRC_AUDIO_PLL1_EN = 8, - CLK_SRC_AUDIO_PLL2_EN = 9, - CLK_SRC_VIDEO_PLL1_EN = 10, - CLK_SRC_VIDEO_PLL2_EN = 11, - CLK_SRC_ARM_PLL = 12, - CLK_SRC_GPU_PLL = 13, - CLK_SRC_VPU_PLL = 14, - CLK_SRC_DRAM_PLL = 15, - CLK_SRC_SYSTEM_PLL1_800M = 16, - CLK_SRC_SYSTEM_PLL1_400M = 17, - CLK_SRC_SYSTEM_PLL1_266M = 18, - CLK_SRC_SYSTEM_PLL1_200M = 19, - CLK_SRC_SYSTEM_PLL1_160M = 20, - CLK_SRC_SYSTEM_PLL1_133M = 21, - CLK_SRC_SYSTEM_PLL1_100M = 22, - CLK_SRC_SYSTEM_PLL1_80M = 23, - CLK_SRC_SYSTEM_PLL1_40M = 24, - CLK_SRC_SYSTEM_PLL2_1000M = 25, - CLK_SRC_SYSTEM_PLL2_500M = 26, - CLK_SRC_SYSTEM_PLL2_333M = 27, - CLK_SRC_SYSTEM_PLL2_250M = 28, - CLK_SRC_SYSTEM_PLL2_200M = 29, - CLK_SRC_SYSTEM_PLL2_166M = 30, - CLK_SRC_SYSTEM_PLL2_125M = 31, - CLK_SRC_SYSTEM_PLL2_100M = 32, - CLK_SRC_SYSTEM_PLL2_50M = 33, - CLK_SRC_SYSTEM_PLL3 = 34, - CLK_SRC_AUDIO_PLL1 = 35, - CLK_SRC_AUDIO_PLL2 = 36, - CLK_SRC_VIDEO_PLL1 = 37, - CLK_SRC_VIDEO_PLL2 = 38, - CLK_SRC_OSC_25M = 39, - CLK_SRC_OSC_27M = 40, -}; - enum root_pre_div { CLK_ROOT_PRE_DIV1 = 0, CLK_ROOT_PRE_DIV2, @@ -466,6 +180,29 @@ struct ccm_reg { struct ccm_root ip_root[78]; }; +enum enet_freq { + ENET_25MHZ = 0, + ENET_50MHZ, + ENET_125MHZ, +}; + +#define DRAM_BYPASS_ROOT_CONFIG(_rate, _m, _p, _s, _k) \ + { \ + .clk = (_rate), \ + .alt_root_sel = (_m), \ + .alt_pre_div = (_p), \ + .apb_root_sel = (_s), \ + .apb_pre_div = (_k), \ + } + +struct dram_bypass_clk_setting { + ulong clk; + int alt_root_sel; + enum root_pre_div alt_pre_div; + int apb_root_sel; + enum root_pre_div apb_pre_div; +}; + #define CCGR_CLK_ON_MASK 0x03 #define CLK_SRC_ON_MASK 0x03 @@ -503,117 +240,6 @@ struct ccm_reg { #define CLK_ROOT_IPG_POST_DIV_MASK 0x3 #define CLK_ROOT_POST_DIV_SHIFT 0 #define CLK_ROOT_POST_DIV(n) ((n) & 0x3f) - -/* AUDIO PLL1/2 VIDEO PLL1 GPU PLL VPU PLL ARM PLL*/ -#define FRAC_PLL_LOCK_MASK BIT(31) -#define FRAC_PLL_CLKE_MASK BIT(21) -#define FRAC_PLL_PD_MASK BIT(19) -#define FRAC_PLL_REFCLK_SEL_MASK BIT(16) -#define FRAC_PLL_LOCK_SEL_MASK BIT(15) -#define FRAC_PLL_BYPASS_MASK BIT(14) -#define FRAC_PLL_COUNTCLK_SEL_MASK BIT(13) -#define FRAC_PLL_NEWDIV_VAL_MASK BIT(12) -#define FRAC_PLL_NEWDIV_ACK_MASK BIT(11) -#define FRAC_PLL_REFCLK_DIV_VAL(n) (((n) << 5) & (0x3f << 5)) -#define FRAC_PLL_REFCLK_DIV_VAL_MASK (0x3f << 5) -#define FRAC_PLL_REFCLK_DIV_VAL_SHIFT 5 -#define FRAC_PLL_OUTPUT_DIV_VAL_MASK 0x1f -#define FRAC_PLL_OUTPUT_DIV_VAL(n) ((n) & 0x1f) - -#define FRAC_PLL_REFCLK_SEL_OSC_25M (0 << 16) -#define FRAC_PLL_REFCLK_SEL_OSC_27M BIT(16) -#define FRAC_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) -#define FRAC_PLL_REFCLK_SEL_CLK_PN (3 << 16) - -#define FRAC_PLL_FRAC_DIV_CTL_MASK (0x1ffffff << 7) -#define FRAC_PLL_FRAC_DIV_CTL_SHIFT 7 -#define FRAC_PLL_INT_DIV_CTL_MASK 0x7f -#define FRAC_PLL_INT_DIV_CTL_VAL(n) ((n) & 0x7f) - -/* SYS PLL1/2/3 VIDEO PLL2 DRAM PLL */ -#define SSCG_PLL_LOCK_MASK BIT(31) -#define SSCG_PLL_CLKE_MASK BIT(25) -#define SSCG_PLL_DIV2_CLKE_MASK BIT(23) -#define SSCG_PLL_DIV3_CLKE_MASK BIT(21) -#define SSCG_PLL_DIV4_CLKE_MASK BIT(19) -#define SSCG_PLL_DIV5_CLKE_MASK BIT(17) -#define SSCG_PLL_DIV6_CLKE_MASK BIT(15) -#define SSCG_PLL_DIV8_CLKE_MASK BIT(13) -#define SSCG_PLL_DIV10_CLKE_MASK BIT(11) -#define SSCG_PLL_DIV20_CLKE_MASK BIT(9) -#define SSCG_PLL_VIDEO_PLL2_CLKE_MASK BIT(9) -#define SSCG_PLL_DRAM_PLL_CLKE_MASK BIT(9) -#define SSCG_PLL_PLL3_CLKE_MASK BIT(9) -#define SSCG_PLL_PD_MASK BIT(7) -#define SSCG_PLL_BYPASS1_MASK BIT(5) -#define SSCG_PLL_BYPASS2_MASK BIT(4) -#define SSCG_PLL_LOCK_SEL_MASK BIT(3) -#define SSCG_PLL_COUNTCLK_SEL_MASK BIT(2) -#define SSCG_PLL_REFCLK_SEL_MASK 0x3 -#define SSCG_PLL_REFCLK_SEL_OSC_25M (0 << 16) -#define SSCG_PLL_REFCLK_SEL_OSC_27M BIT(16) -#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) -#define SSCG_PLL_REFCLK_SEL_CLK_PN (3 << 16) - -#define SSCG_PLL_SSDS_MASK BIT(8) -#define SSCG_PLL_SSMD_MASK (0x7 << 5) -#define SSCG_PLL_SSMF_MASK (0xf << 1) -#define SSCG_PLL_SSE_MASK 0x1 - -#define SSCG_PLL_REF_DIVR1_MASK (0x7 << 25) -#define SSCG_PLL_REF_DIVR1_SHIFT 25 -#define SSCG_PLL_REF_DIVR1_VAL(n) (((n) << 25) & SSCG_PLL_REF_DIVR1_MASK) -#define SSCG_PLL_REF_DIVR2_MASK (0x3f << 19) -#define SSCG_PLL_REF_DIVR2_SHIFT 19 -#define SSCG_PLL_REF_DIVR2_VAL(n) (((n) << 19) & SSCG_PLL_REF_DIVR2_MASK) -#define SSCG_PLL_FEEDBACK_DIV_F1_MASK (0x3f << 13) -#define SSCG_PLL_FEEDBACK_DIV_F1_SHIFT 13 -#define SSCG_PLL_FEEDBACK_DIV_F1_VAL(n) (((n) << 13) & \ - SSCG_PLL_FEEDBACK_DIV_F1_MASK) -#define SSCG_PLL_FEEDBACK_DIV_F2_MASK (0x3f << 7) -#define SSCG_PLL_FEEDBACK_DIV_F2_SHIFT 7 -#define SSCG_PLL_FEEDBACK_DIV_F2_VAL(n) (((n) << 7) & \ - SSCG_PLL_FEEDBACK_DIV_F2_MASK) -#define SSCG_PLL_OUTPUT_DIV_VAL_MASK (0x3f << 1) -#define SSCG_PLL_OUTPUT_DIV_VAL_SHIFT 1 -#define SSCG_PLL_OUTPUT_DIV_VAL(n) (((n) << 1) & \ - SSCG_PLL_OUTPUT_DIV_VAL_MASK) -#define SSCG_PLL_FILTER_RANGE_MASK 0x1 - -#define HW_DIGPROG_MAJOR_UPPER_MASK (0xff << 16) -#define HW_DIGPROG_MAJOR_LOWER_MASK (0xff << 8) -#define HW_DIGPROG_MINOR_MASK 0xff - -#define HW_OSC_27M_CLKE_MASK BIT(4) -#define HW_OSC_25M_CLKE_MASK BIT(2) -#define HW_OSC_32K_SEL_MASK 0x1 -#define HW_OSC_32K_SEL_RTC 0x1 -#define HW_OSC_32K_SEL_25M_DIV800 0x0 - -#define HW_FRAC_ARM_PLL_DIV_MASK (0x7 << 20) -#define HW_FRAC_ARM_PLL_DIV_SHIFT 20 -#define HW_FRAC_VPU_PLL_DIV_MASK (0x7 << 16) -#define HW_FRAC_VPU_PLL_DIV_SHIFT 16 -#define HW_FRAC_GPU_PLL_DIV_MASK (0x7 << 12) -#define HW_FRAC_GPU_PLL_DIV_SHIFT 12 -#define HW_FRAC_VIDEO_PLL1_DIV_MASK (0x7 << 10) -#define HW_FRAC_VIDEO_PLL1_DIV_SHIFT 10 -#define HW_FRAC_AUDIO_PLL2_DIV_MASK (0x7 << 4) -#define HW_FRAC_AUDIO_PLL2_DIV_SHIFT 4 -#define HW_FRAC_AUDIO_PLL1_DIV_MASK 0x7 -#define HW_FRAC_AUDIO_PLL1_DIV_SHIFT 0 - -#define HW_SSCG_VIDEO_PLL2_DIV_MASK (0x7 << 16) -#define HW_SSCG_VIDEO_PLL2_DIV_SHIFT 16 -#define HW_SSCG_DRAM_PLL_DIV_MASK (0x7 << 14) -#define HW_SSCG_DRAM_PLL_DIV_SHIFT 14 -#define HW_SSCG_SYSTEM_PLL3_DIV_MASK (0x7 << 8) -#define HW_SSCG_SYSTEM_PLL3_DIV_SHIFT 8 -#define HW_SSCG_SYSTEM_PLL2_DIV_MASK (0x7 << 4) -#define HW_SSCG_SYSTEM_PLL2_DIV_SHIFT 4 -#define HW_SSCG_SYSTEM_PLL1_DIV_MASK 0x7 -#define HW_SSCG_SYSTEM_PLL1_DIV_SHIFT 0 - #define ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK 0x01000000 #define ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK 0x02000000 #define ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK 0x03000000 @@ -622,34 +248,6 @@ struct ccm_reg { #define ENET1_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK 0x01000000 #define ENET_PHY_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK 0x01000000 -enum enet_freq { - ENET_25MHZ = 0, - ENET_50MHZ, - ENET_125MHZ, -}; - -enum frac_pll_out_val { - FRAC_PLL_OUT_1000M, - FRAC_PLL_OUT_1600M, -}; - -#define DRAM_BYPASS_ROOT_CONFIG(_rate, _m, _p, _s, _k) \ - { \ - .clk = (_rate), \ - .alt_root_sel = (_m), \ - .alt_pre_div = (_p), \ - .apb_root_sel = (_s), \ - .apb_pre_div = (_k), \ - } - -struct dram_bypass_clk_setting { - ulong clk; - int alt_root_sel; - enum root_pre_div alt_pre_div; - int apb_root_sel; - enum root_pre_div apb_pre_div; -}; - void dram_pll_init(ulong pll_val); void dram_enable_bypass(ulong clk_val); void dram_disable_bypass(void); @@ -659,7 +257,7 @@ int clock_init(void); void init_clk_usdhc(u32 index); void init_uart_clk(u32 index); void init_wdog_clk(void); -unsigned int mxc_get_clock(enum clk_root_index clk); +unsigned int mxc_get_clock(enum mxc_clock clk); int clock_enable(enum clk_ccgr_index index, bool enable); int clock_root_enabled(enum clk_root_index clock_id); int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div, @@ -675,4 +273,3 @@ int set_clk_qspi(void); void enable_ocotp_clk(unsigned char enable); int enable_i2c_clk(unsigned char enable, unsigned int i2c_num); int set_clk_enet(enum enet_freq type); -#endif diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h new file mode 100644 index 0000000..305514a --- /dev/null +++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h @@ -0,0 +1,387 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018-2019 NXP + * + * Peng Fan <peng.fan@nxp.com> + */ + +#ifndef _ASM_ARCH_IMX8MM_CLOCK_H +#define _ASM_ARCH_IMX8MM_CLOCK_H + +#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ + { \ + .rate = (_rate), \ + .mdiv = (_m), \ + .pdiv = (_p), \ + .sdiv = (_s), \ + .kdiv = (_k), \ + } + +#define LOCK_STATUS BIT(31) +#define LOCK_SEL_MASK BIT(29) +#define CLKE_MASK BIT(11) +#define RST_MASK BIT(9) +#define BYPASS_MASK BIT(4) +#define MDIV_SHIFT 12 +#define MDIV_MASK GENMASK(21, 12) +#define PDIV_SHIFT 4 +#define PDIV_MASK GENMASK(9, 4) +#define SDIV_SHIFT 0 +#define SDIV_MASK GENMASK(2, 0) +#define KDIV_SHIFT 0 +#define KDIV_MASK GENMASK(15, 0) + +struct imx_int_pll_rate_table { + u32 rate; + int mdiv; + int pdiv; + int sdiv; + int kdiv; +}; + +enum pll_clocks { + ANATOP_ARM_PLL, + ANATOP_VPU_PLL, + ANATOP_GPU_PLL, + ANATOP_SYSTEM_PLL1, + ANATOP_SYSTEM_PLL2, + ANATOP_SYSTEM_PLL3, + ANATOP_AUDIO_PLL1, + ANATOP_AUDIO_PLL2, + ANATOP_VIDEO_PLL, + ANATOP_DRAM_PLL, +}; + +enum clk_root_index { + ARM_A53_CLK_ROOT = 0, + ARM_M4_CLK_ROOT = 1, + VPU_A53_CLK_ROOT = 2, + GPU3D_CLK_ROOT = 3, + GPU2D_CLK_ROOT = 4, + MAIN_AXI_CLK_ROOT = 16, + ENET_AXI_CLK_ROOT = 17, + NAND_USDHC_BUS_CLK_ROOT = 18, + VPU_BUS_CLK_ROOT = 19, + DISPLAY_AXI_CLK_ROOT = 20, + DISPLAY_APB_CLK_ROOT = 21, + DISPLAY_RTRM_CLK_ROOT = 22, + USB_BUS_CLK_ROOT = 23, + GPU_AXI_CLK_ROOT = 24, + GPU_AHB_CLK_ROOT = 25, + NOC_CLK_ROOT = 26, + NOC_APB_CLK_ROOT = 27, + AHB_CLK_ROOT = 32, + IPG_CLK_ROOT = 33, + AUDIO_AHB_CLK_ROOT = 34, + MIPI_DSI_ESC_RX_CLK_ROOT = 36, + DRAM_SEL_CFG = 48, + CORE_SEL_CFG = 49, + DRAM_ALT_CLK_ROOT = 64, + DRAM_APB_CLK_ROOT = 65, + VPU_G1_CLK_ROOT = 66, + VPU_G2_CLK_ROOT = 67, + DISPLAY_DTRC_CLK_ROOT = 68, + DISPLAY_DC8000_CLK_ROOT = 69, + PCIE_CTRL_CLK_ROOT = 70, + PCIE_PHY_CLK_ROOT = 71, + PCIE_AUX_CLK_ROOT = 72, + DC_PIXEL_CLK_ROOT = 73, + LCDIF_PIXEL_CLK_ROOT = 74, + SAI1_CLK_ROOT = 75, + SAI2_CLK_ROOT = 76, + SAI3_CLK_ROOT = 77, + SAI4_CLK_ROOT = 78, + SAI5_CLK_ROOT = 79, + SAI6_CLK_ROOT = 80, + SPDIF1_CLK_ROOT = 81, + SPDIF2_CLK_ROOT = 82, + ENET_REF_CLK_ROOT = 83, + ENET_TIMER_CLK_ROOT = 84, + ENET_PHY_REF_CLK_ROOT = 85, + NAND_CLK_ROOT = 86, + QSPI_CLK_ROOT = 87, + USDHC1_CLK_ROOT = 88, + USDHC2_CLK_ROOT = 89, + I2C1_CLK_ROOT = 90, + I2C2_CLK_ROOT = 91, + I2C3_CLK_ROOT = 92, + I2C4_CLK_ROOT = 93, + UART1_CLK_ROOT = 94, + UART2_CLK_ROOT = 95, + UART3_CLK_ROOT = 96, + UART4_CLK_ROOT = 97, + USB_CORE_REF_CLK_ROOT = 98, + USB_PHY_REF_CLK_ROOT = 99, + GIC_CLK_ROOT = 100, + ECSPI1_CLK_ROOT = 101, + ECSPI2_CLK_ROOT = 102, + PWM1_CLK_ROOT = 103, + PWM2_CLK_ROOT = 104, + PWM3_CLK_ROOT = 105, + PWM4_CLK_ROOT = 106, + GPT1_CLK_ROOT = 107, + GPT2_CLK_ROOT = 108, + GPT3_CLK_ROOT = 109, + GPT4_CLK_ROOT = 110, + GPT5_CLK_ROOT = 111, + GPT6_CLK_ROOT = 112, + TRACE_CLK_ROOT = 113, + WDOG_CLK_ROOT = 114, + WRCLK_CLK_ROOT = 115, + IPP_DO_CLKO1 = 116, + IPP_DO_CLKO2 = 117, + MIPI_DSI_CORE_CLK_ROOT = 118, + MIPI_DSI_PHY_REF_CLK_ROOT = 119, + MIPI_DSI_DBI_CLK_ROOT = 120, + USDHC3_CLK_ROOT = 121, + MIPI_CSI1_CORE_CLK_ROOT = 122, + MIPI_CSI1_PHY_REF_CLK_ROOT = 123, + MIPI_CSI1_ESC_CLK_ROOT = 124, + MIPI_CSI2_CORE_CLK_ROOT = 125, + MIPI_CSI2_PHY_REF_CLK_ROOT = 126, + MIPI_CSI2_ESC_CLK_ROOT = 127, + PCIE2_CTRL_CLK_ROOT = 128, + PCIE2_PHY_CLK_ROOT = 129, + PCIE2_AUX_CLK_ROOT = 130, + ECSPI3_CLK_ROOT = 131, + PDM_CLK_ROOT = 132, + VPU_H1_CLK_ROOT = 133, + CLK_ROOT_MAX, +}; + +enum clk_root_src { + OSC_24M_CLK, + ARM_PLL_CLK, + DRAM_PLL1_CLK, + VIDEO_PLL2_CLK, + VPU_PLL_CLK, + GPU_PLL_CLK, + SYSTEM_PLL1_800M_CLK, + SYSTEM_PLL1_400M_CLK, + SYSTEM_PLL1_266M_CLK, + SYSTEM_PLL1_200M_CLK, + SYSTEM_PLL1_160M_CLK, + SYSTEM_PLL1_133M_CLK, + SYSTEM_PLL1_100M_CLK, + SYSTEM_PLL1_80M_CLK, + SYSTEM_PLL1_40M_CLK, + SYSTEM_PLL2_1000M_CLK, + SYSTEM_PLL2_500M_CLK, + SYSTEM_PLL2_333M_CLK, + SYSTEM_PLL2_250M_CLK, + SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL2_166M_CLK, + SYSTEM_PLL2_125M_CLK, + SYSTEM_PLL2_100M_CLK, + SYSTEM_PLL2_50M_CLK, + SYSTEM_PLL3_CLK, + AUDIO_PLL1_CLK, + AUDIO_PLL2_CLK, + VIDEO_PLL_CLK, + OSC_32K_CLK, + EXT_CLK_1, + EXT_CLK_2, + EXT_CLK_3, + EXT_CLK_4, + OSC_HDMI_CLK +}; + +enum clk_ccgr_index { + CCGR_DVFS = 0, + CCGR_ANAMIX = 1, + CCGR_CPU = 2, + CCGR_CSU = 3, + CCGR_DEBUG = 4, + CCGR_DDR1 = 5, + CCGR_ECSPI1 = 7, + CCGR_ECSPI2 = 8, + CCGR_ECSPI3 = 9, + CCGR_ENET1 = 10, + CCGR_GPIO1 = 11, + CCGR_GPIO2 = 12, + CCGR_GPIO3 = 13, + CCGR_GPIO4 = 14, + CCGR_GPIO5 = 15, + CCGR_GPT1 = 16, + CCGR_GPT2 = 17, + CCGR_GPT3 = 18, + CCGR_GPT4 = 19, + CCGR_GPT5 = 20, + CCGR_GPT6 = 21, + CCGR_HS = 22, + CCGR_I2C1 = 23, + CCGR_I2C2 = 24, + CCGR_I2C3 = 25, + CCGR_I2C4 = 26, + CCGR_IOMUX = 27, + CCGR_IOMUX1 = 28, + CCGR_IOMUX2 = 29, + CCGR_IOMUX3 = 30, + CCGR_IOMUX4 = 31, + CCGR_SNVSMIX_IPG_CLK = 32, + CCGR_MU = 33, + CCGR_OCOTP = 34, + CCGR_OCRAM = 35, + CCGR_OCRAM_S = 36, + CCGR_PCIE = 37, + CCGR_PERFMON1 = 38, + CCGR_PERFMON2 = 39, + CCGR_PWM1 = 40, + CCGR_PWM2 = 41, + CCGR_PWM3 = 42, + CCGR_PWM4 = 43, + CCGR_QOS = 44, + CCGR_QOS_DISPMIX = 45, + CCGR_QOS_ETHENET = 46, + CCGR_QSPI = 47, + CCGR_RAWNAND = 48, + CCGR_RDC = 49, + CCGR_ROM = 50, + CCGR_SAI1 = 51, + CCGR_SAI2 = 52, + CCGR_SAI3 = 53, + CCGR_SAI4 = 54, + CCGR_SAI5 = 55, + CCGR_SAI6 = 56, + CCGR_SCTR = 57, + CCGR_SDMA1 = 58, + CCGR_SDMA2 = 59, + CCGR_SEC_DEBUG = 60, + CCGR_SEMA1 = 61, + CCGR_SEMA2 = 62, + CCGR_SIM_DISPLAY = 63, + CCGR_SIM_ENET = 64, + CCGR_SIM_M = 65, + CCGR_SIM_MAIN = 66, + CCGR_SIM_S = 67, + CCGR_SIM_WAKEUP = 68, + CCGR_SIM_HSIO = 69, + CCGR_SIM_VPU = 70, + CCGR_SNVS = 71, + CCGR_TRACE = 72, + CCGR_UART1 = 73, + CCGR_UART2 = 74, + CCGR_UART3 = 75, + CCGR_UART4 = 76, + CCGR_USB_MSCALE_PL301 = 77, + CCGR_GPU3D = 79, + CCGR_USDHC1 = 81, + CCGR_USDHC2 = 82, + CCGR_WDOG1 = 83, + CCGR_WDOG2 = 84, + CCGR_WDOG3 = 85, + CCGR_VPUG1 = 86, + CCGR_GPU_BUS = 87, + CCGR_VPUH1 = 89, + CCGR_VPUG2 = 90, + CCGR_PDM = 91, + CCGR_GIC = 92, + CCGR_DISPMIX = 93, + CCGR_USDHC3 = 94, + CCGR_SDMA3 = 95, + CCGR_XTAL = 96, + CCGR_PLL = 97, + CCGR_TEMP_SENSOR = 98, + CCGR_VPUMIX_BUS = 99, + CCGR_GPU2D = 102, + CCGR_MAX +}; + +enum clk_src_index { + CLK_SRC_CKIL_SYNC_REQ = 0, + CLK_SRC_ARM_PLL_EN = 1, + CLK_SRC_GPU_PLL_EN = 2, + CLK_SRC_VPU_PLL_EN = 3, + CLK_SRC_DRAM_PLL_EN = 4, + CLK_SRC_SYSTEM_PLL1_EN = 5, + CLK_SRC_SYSTEM_PLL2_EN = 6, + CLK_SRC_SYSTEM_PLL3_EN = 7, + CLK_SRC_AUDIO_PLL1_EN = 8, + CLK_SRC_AUDIO_PLL2_EN = 9, + CLK_SRC_VIDEO_PLL1_EN = 10, + CLK_SRC_RESERVED = 11, + CLK_SRC_ARM_PLL = 12, + CLK_SRC_GPU_PLL = 13, + CLK_SRC_VPU_PLL = 14, + CLK_SRC_DRAM_PLL = 15, + CLK_SRC_SYSTEM_PLL1_800M = 16, + CLK_SRC_SYSTEM_PLL1_400M = 17, + CLK_SRC_SYSTEM_PLL1_266M = 18, + CLK_SRC_SYSTEM_PLL1_200M = 19, + CLK_SRC_SYSTEM_PLL1_160M = 20, + CLK_SRC_SYSTEM_PLL1_133M = 21, + CLK_SRC_SYSTEM_PLL1_100M = 22, + CLK_SRC_SYSTEM_PLL1_80M = 23, + CLK_SRC_SYSTEM_PLL1_40M = 24, + CLK_SRC_SYSTEM_PLL2_1000M = 25, + CLK_SRC_SYSTEM_PLL2_500M = 26, + CLK_SRC_SYSTEM_PLL2_333M = 27, + CLK_SRC_SYSTEM_PLL2_250M = 28, + CLK_SRC_SYSTEM_PLL2_200M = 29, + CLK_SRC_SYSTEM_PLL2_166M = 30, + CLK_SRC_SYSTEM_PLL2_125M = 31, + CLK_SRC_SYSTEM_PLL2_100M = 32, + CLK_SRC_SYSTEM_PLL2_50M = 33, + CLK_SRC_SYSTEM_PLL3 = 34, + CLK_SRC_AUDIO_PLL1 = 35, + CLK_SRC_AUDIO_PLL2 = 36, + CLK_SRC_VIDEO_PLL1 = 37, +}; + +#define INTPLL_LOCK_MASK BIT(31) +#define INTPLL_LOCK_SEL_MASK BIT(29) +#define INTPLL_EXT_BYPASS_MASK BIT(28) +#define INTPLL_DIV20_CLKE_MASK BIT(27) +#define INTPLL_DIV20_CLKE_OVERRIDE_MASK BIT(26) +#define INTPLL_DIV10_CLKE_MASK BIT(25) +#define INTPLL_DIV10_CLKE_OVERRIDE_MASK BIT(24) +#define INTPLL_DIV8_CLKE_MASK BIT(23) +#define INTPLL_DIV8_CLKE_OVERRIDE_MASK BIT(22) +#define INTPLL_DIV6_CLKE_MASK BIT(21) +#define INTPLL_DIV6_CLKE_OVERRIDE_MASK BIT(20) +#define INTPLL_DIV5_CLKE_MASK BIT(19) +#define INTPLL_DIV5_CLKE_OVERRIDE_MASK BIT(18) +#define INTPLL_DIV4_CLKE_MASK BIT(17) +#define INTPLL_DIV4_CLKE_OVERRIDE_MASK BIT(16) +#define INTPLL_DIV3_CLKE_MASK BIT(15) +#define INTPLL_DIV3_CLKE_OVERRIDE_MASK BIT(14) +#define INTPLL_DIV2_CLKE_MASK BIT(13) +#define INTPLL_DIV2_CLKE_OVERRIDE_MASK BIT(12) +#define INTPLL_CLKE_MASK BIT(11) +#define INTPLL_CLKE_OVERRIDE_MASK BIT(10) +#define INTPLL_RST_MASK BIT(9) +#define INTPLL_RST_OVERRIDE_MASK BIT(8) +#define INTPLL_BYPASS_MASK BIT(4) +#define INTPLL_PAD_CLK_SEL_MASK GENMASK(3, 2) +#define INTPLL_REF_CLK_SEL_MASK GENMASK(1, 0) + +#define INTPLL_MAIN_DIV_MASK GENMASK(21, 12) +#define INTPLL_MAIN_DIV_VAL(n) ((n << 12) & GENMASK(21, 12)) +#define INTPLL_MAIN_DIV_SHIFT 12 +#define INTPLL_PRE_DIV_MASK GENMASK(9, 4) +#define INTPLL_PRE_DIV_VAL(n) ((n << 4) & GENMASK(9, 4)) +#define INTPLL_PRE_DIV_SHIFT 4 +#define INTPLL_POST_DIV_MASK GENMASK(2, 0) +#define INTPLL_POST_DIV_VAL(n) ((n << 0) & GENMASK(2, 0)) +#define INTPLL_POST_DIV_SHIFT 0 + +#define INTPLL_LOCK_CON_DLY_MASK GENMASK(5, 4) +#define INTPLL_LOCK_CON_DLY_SHIFT 4 +#define INTPLL_LOCK_CON_OUT_MASK GENMASK(3, 2) +#define INTPLL_LOCK_CON_OUT_SHIFT 2 +#define INTPLL_LOCK_CON_IN_MASK GENMASK(1, 0) +#define INTPLL_LOCK_CON_IN_SHIFT 0 + +#define INTPLL_LRD_EN_MASK BIT(21) +#define INTPLL_FOUT_MASK BIT(20) +#define INTPLL_AFC_SEL_MASK BIT(19) +#define INTPLL_PBIAS_CTRL_MASK BIT(18) +#define INTPLL_PBIAS_CTRL_EN_MASK BIT(17) +#define INTPLL_AFCINIT_SEL_MASK BIT(16) +#define INTPLL_FSEL_MASK BIT(14) +#define INTPLL_FEED_EN_MASK BIT(13) +#define INTPLL_EXTAFC_MASK GENMASK(7, 3) +#define INTPLL_AFC_EN_MASK BIT(2) +#define INTPLL_ICP_MASK GENMASK(1, 0) + +#endif diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h new file mode 100644 index 0000000..9fa9eb2 --- /dev/null +++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h @@ -0,0 +1,424 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2017 NXP + * + * Peng Fan <peng.fan@nxp.com> + */ + +#ifndef _ASM_ARCH_IMX8M_CLOCK_H +#define _ASM_ARCH_IMX8M_CLOCK_H + +enum pll_clocks { + ANATOP_ARM_PLL, + ANATOP_GPU_PLL, + ANATOP_SYSTEM_PLL1, + ANATOP_SYSTEM_PLL2, + ANATOP_SYSTEM_PLL3, + ANATOP_AUDIO_PLL1, + ANATOP_AUDIO_PLL2, + ANATOP_VIDEO_PLL1, + ANATOP_VIDEO_PLL2, + ANATOP_DRAM_PLL, +}; + +enum clk_root_index { + ARM_A53_CLK_ROOT = 0, + ARM_M4_CLK_ROOT = 1, + VPU_A53_CLK_ROOT = 2, + GPU_CORE_CLK_ROOT = 3, + GPU_SHADER_CLK_ROOT = 4, + MAIN_AXI_CLK_ROOT = 16, + ENET_AXI_CLK_ROOT = 17, + NAND_USDHC_BUS_CLK_ROOT = 18, + VPU_BUS_CLK_ROOT = 19, + DISPLAY_AXI_CLK_ROOT = 20, + DISPLAY_APB_CLK_ROOT = 21, + DISPLAY_RTRM_CLK_ROOT = 22, + USB_BUS_CLK_ROOT = 23, + GPU_AXI_CLK_ROOT = 24, + GPU_AHB_CLK_ROOT = 25, + NOC_CLK_ROOT = 26, + NOC_APB_CLK_ROOT = 27, + AHB_CLK_ROOT = 32, + IPG_CLK_ROOT = 33, + AUDIO_AHB_CLK_ROOT = 34, + MIPI_DSI_ESC_RX_CLK_ROOT = 36, + DRAM_SEL_CFG = 48, + CORE_SEL_CFG = 49, + DRAM_ALT_CLK_ROOT = 64, + DRAM_APB_CLK_ROOT = 65, + VPU_G1_CLK_ROOT = 66, + VPU_G2_CLK_ROOT = 67, + DISPLAY_DTRC_CLK_ROOT = 68, + DISPLAY_DC8000_CLK_ROOT = 69, + PCIE1_CTRL_CLK_ROOT = 70, + PCIE1_PHY_CLK_ROOT = 71, + PCIE1_AUX_CLK_ROOT = 72, + DC_PIXEL_CLK_ROOT = 73, + LCDIF_PIXEL_CLK_ROOT = 74, + SAI1_CLK_ROOT = 75, + SAI2_CLK_ROOT = 76, + SAI3_CLK_ROOT = 77, + SAI4_CLK_ROOT = 78, + SAI5_CLK_ROOT = 79, + SAI6_CLK_ROOT = 80, + SPDIF1_CLK_ROOT = 81, + SPDIF2_CLK_ROOT = 82, + ENET_REF_CLK_ROOT = 83, + ENET_TIMER_CLK_ROOT = 84, + ENET_PHY_REF_CLK_ROOT = 85, + NAND_CLK_ROOT = 86, + QSPI_CLK_ROOT = 87, + USDHC1_CLK_ROOT = 88, + USDHC2_CLK_ROOT = 89, + I2C1_CLK_ROOT = 90, + I2C2_CLK_ROOT = 91, + I2C3_CLK_ROOT = 92, + I2C4_CLK_ROOT = 93, + UART1_CLK_ROOT = 94, + UART2_CLK_ROOT = 95, + UART3_CLK_ROOT = 96, + UART4_CLK_ROOT = 97, + USB_CORE_REF_CLK_ROOT = 98, + USB_PHY_REF_CLK_ROOT = 99, + GIC_CLK_ROOT = 100, + ECSPI1_CLK_ROOT = 101, + ECSPI2_CLK_ROOT = 102, + PWM1_CLK_ROOT = 103, + PWM2_CLK_ROOT = 104, + PWM3_CLK_ROOT = 105, + PWM4_CLK_ROOT = 106, + GPT1_CLK_ROOT = 107, + GPT2_CLK_ROOT = 108, + GPT3_CLK_ROOT = 109, + GPT4_CLK_ROOT = 110, + GPT5_CLK_ROOT = 111, + GPT6_CLK_ROOT = 112, + TRACE_CLK_ROOT = 113, + WDOG_CLK_ROOT = 114, + WRCLK_CLK_ROOT = 115, + IPP_DO_CLKO1 = 116, + IPP_DO_CLKO2 = 117, + MIPI_DSI_CORE_CLK_ROOT = 118, + MIPI_DSI_PHY_REF_CLK_ROOT = 119, + MIPI_DSI_DBI_CLK_ROOT = 120, + OLD_MIPI_DSI_ESC_CLK_ROOT = 121, + MIPI_CSI1_CORE_CLK_ROOT = 122, + MIPI_CSI1_PHY_REF_CLK_ROOT = 123, + MIPI_CSI1_ESC_CLK_ROOT = 124, + MIPI_CSI2_CORE_CLK_ROOT = 125, + MIPI_CSI2_PHY_REF_CLK_ROOT = 126, + MIPI_CSI2_ESC_CLK_ROOT = 127, + PCIE2_CTRL_CLK_ROOT = 128, + PCIE2_PHY_CLK_ROOT = 129, + PCIE2_AUX_CLK_ROOT = 130, + ECSPI3_CLK_ROOT = 131, + OLD_MIPI_DSI_ESC_RX_ROOT = 132, + DISPLAY_HDMI_CLK_ROOT = 133, + CLK_ROOT_MAX, +}; + +enum clk_root_src { + OSC_25M_CLK, + ARM_PLL_CLK, + DRAM_PLL1_CLK, + VIDEO_PLL2_CLK, + VPU_PLL_CLK, + GPU_PLL_CLK, + SYSTEM_PLL1_800M_CLK, + SYSTEM_PLL1_400M_CLK, + SYSTEM_PLL1_266M_CLK, + SYSTEM_PLL1_200M_CLK, + SYSTEM_PLL1_160M_CLK, + SYSTEM_PLL1_133M_CLK, + SYSTEM_PLL1_100M_CLK, + SYSTEM_PLL1_80M_CLK, + SYSTEM_PLL1_40M_CLK, + SYSTEM_PLL2_1000M_CLK, + SYSTEM_PLL2_500M_CLK, + SYSTEM_PLL2_333M_CLK, + SYSTEM_PLL2_250M_CLK, + SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL2_166M_CLK, + SYSTEM_PLL2_125M_CLK, + SYSTEM_PLL2_100M_CLK, + SYSTEM_PLL2_50M_CLK, + SYSTEM_PLL3_CLK, + AUDIO_PLL1_CLK, + AUDIO_PLL2_CLK, + VIDEO_PLL_CLK, + OSC_32K_CLK, + EXT_CLK_1, + EXT_CLK_2, + EXT_CLK_3, + EXT_CLK_4, + OSC_27M_CLK, +}; + +/* CCGR index */ +enum clk_ccgr_index { + CCGR_DVFS = 0, + CCGR_ANAMIX = 1, + CCGR_CPU = 2, + CCGR_CSU = 4, + CCGR_DRAM1 = 5, + CCGR_DRAM2_OBSOLETE = 6, + CCGR_ECSPI1 = 7, + CCGR_ECSPI2 = 8, + CCGR_ECSPI3 = 9, + CCGR_ENET1 = 10, + CCGR_GPIO1 = 11, + CCGR_GPIO2 = 12, + CCGR_GPIO3 = 13, + CCGR_GPIO4 = 14, + CCGR_GPIO5 = 15, + CCGR_GPT1 = 16, + CCGR_GPT2 = 17, + CCGR_GPT3 = 18, + CCGR_GPT4 = 19, + CCGR_GPT5 = 20, + CCGR_GPT6 = 21, + CCGR_HS = 22, + CCGR_I2C1 = 23, + CCGR_I2C2 = 24, + CCGR_I2C3 = 25, + CCGR_I2C4 = 26, + CCGR_IOMUX = 27, + CCGR_IOMUX1 = 28, + CCGR_IOMUX2 = 29, + CCGR_IOMUX3 = 30, + CCGR_IOMUX4 = 31, + CCGR_M4 = 32, + CCGR_MU = 33, + CCGR_OCOTP = 34, + CCGR_OCRAM = 35, + CCGR_OCRAM_S = 36, + CCGR_PCIE = 37, + CCGR_PERFMON1 = 38, + CCGR_PERFMON2 = 39, + CCGR_PWM1 = 40, + CCGR_PWM2 = 41, + CCGR_PWM3 = 42, + CCGR_PWM4 = 43, + CCGR_QOS = 44, + CCGR_DISMIX = 45, + CCGR_MEGAMIX = 46, + CCGR_QSPI = 47, + CCGR_RAWNAND = 48, + CCGR_RDC = 49, + CCGR_ROM = 50, + CCGR_SAI1 = 51, + CCGR_SAI2 = 52, + CCGR_SAI3 = 53, + CCGR_SAI4 = 54, + CCGR_SAI5 = 55, + CCGR_SAI6 = 56, + CCGR_SCTR = 57, + CCGR_SDMA1 = 58, + CCGR_SDMA2 = 59, + CCGR_SEC_DEBUG = 60, + CCGR_SEMA1 = 61, + CCGR_SEMA2 = 62, + CCGR_SIM_DISPLAY = 63, + CCGR_SIM_ENET = 64, + CCGR_SIM_M = 65, + CCGR_SIM_MAIN = 66, + CCGR_SIM_S = 67, + CCGR_SIM_WAKEUP = 68, + CCGR_SIM_USB = 69, + CCGR_SIM_VPU = 70, + CCGR_SNVS = 71, + CCGR_TRACE = 72, + CCGR_UART1 = 73, + CCGR_UART2 = 74, + CCGR_UART3 = 75, + CCGR_UART4 = 76, + CCGR_USB_CTRL1 = 77, + CCGR_USB_CTRL2 = 78, + CCGR_USB_PHY1 = 79, + CCGR_USB_PHY2 = 80, + CCGR_USDHC1 = 81, + CCGR_USDHC2 = 82, + CCGR_WDOG1 = 83, + CCGR_WDOG2 = 84, + CCGR_WDOG3 = 85, + CCGR_VA53 = 86, + CCGR_GPU = 87, + CCGR_HEVC = 88, + CCGR_AVC = 89, + CCGR_VP9 = 90, + CCGR_HEVC_INTER = 91, + CCGR_GIC = 92, + CCGR_DISPLAY = 93, + CCGR_HDMI = 94, + CCGR_HDMI_PHY = 95, + CCGR_XTAL = 96, + CCGR_PLL = 97, + CCGR_TSENSOR = 98, + CCGR_VPU_DEC = 99, + CCGR_PCIE2 = 100, + CCGR_MIPI_CSI1 = 101, + CCGR_MIPI_CSI2 = 102, + CCGR_MAX, +}; + +/* src index */ +enum clk_src_index { + CLK_SRC_CKIL_SYNC_REQ = 0, + CLK_SRC_ARM_PLL_EN = 1, + CLK_SRC_GPU_PLL_EN = 2, + CLK_SRC_VPU_PLL_EN = 3, + CLK_SRC_DRAM_PLL_EN = 4, + CLK_SRC_SYSTEM_PLL1_EN = 5, + CLK_SRC_SYSTEM_PLL2_EN = 6, + CLK_SRC_SYSTEM_PLL3_EN = 7, + CLK_SRC_AUDIO_PLL1_EN = 8, + CLK_SRC_AUDIO_PLL2_EN = 9, + CLK_SRC_VIDEO_PLL1_EN = 10, + CLK_SRC_VIDEO_PLL2_EN = 11, + CLK_SRC_ARM_PLL = 12, + CLK_SRC_GPU_PLL = 13, + CLK_SRC_VPU_PLL = 14, + CLK_SRC_DRAM_PLL = 15, + CLK_SRC_SYSTEM_PLL1_800M = 16, + CLK_SRC_SYSTEM_PLL1_400M = 17, + CLK_SRC_SYSTEM_PLL1_266M = 18, + CLK_SRC_SYSTEM_PLL1_200M = 19, + CLK_SRC_SYSTEM_PLL1_160M = 20, + CLK_SRC_SYSTEM_PLL1_133M = 21, + CLK_SRC_SYSTEM_PLL1_100M = 22, + CLK_SRC_SYSTEM_PLL1_80M = 23, + CLK_SRC_SYSTEM_PLL1_40M = 24, + CLK_SRC_SYSTEM_PLL2_1000M = 25, + CLK_SRC_SYSTEM_PLL2_500M = 26, + CLK_SRC_SYSTEM_PLL2_333M = 27, + CLK_SRC_SYSTEM_PLL2_250M = 28, + CLK_SRC_SYSTEM_PLL2_200M = 29, + CLK_SRC_SYSTEM_PLL2_166M = 30, + CLK_SRC_SYSTEM_PLL2_125M = 31, + CLK_SRC_SYSTEM_PLL2_100M = 32, + CLK_SRC_SYSTEM_PLL2_50M = 33, + CLK_SRC_SYSTEM_PLL3 = 34, + CLK_SRC_AUDIO_PLL1 = 35, + CLK_SRC_AUDIO_PLL2 = 36, + CLK_SRC_VIDEO_PLL1 = 37, + CLK_SRC_VIDEO_PLL2 = 38, + CLK_SRC_OSC_25M = 39, + CLK_SRC_OSC_27M = 40, +}; + +/* AUDIO PLL1/2 VIDEO PLL1 GPU PLL VPU PLL ARM PLL*/ +#define FRAC_PLL_LOCK_MASK BIT(31) +#define FRAC_PLL_CLKE_MASK BIT(21) +#define FRAC_PLL_PD_MASK BIT(19) +#define FRAC_PLL_REFCLK_SEL_MASK BIT(16) +#define FRAC_PLL_LOCK_SEL_MASK BIT(15) +#define FRAC_PLL_BYPASS_MASK BIT(14) +#define FRAC_PLL_COUNTCLK_SEL_MASK BIT(13) +#define FRAC_PLL_NEWDIV_VAL_MASK BIT(12) +#define FRAC_PLL_NEWDIV_ACK_MASK BIT(11) +#define FRAC_PLL_REFCLK_DIV_VAL(n) (((n) << 5) & (0x3f << 5)) +#define FRAC_PLL_REFCLK_DIV_VAL_MASK (0x3f << 5) +#define FRAC_PLL_REFCLK_DIV_VAL_SHIFT 5 +#define FRAC_PLL_OUTPUT_DIV_VAL_MASK 0x1f +#define FRAC_PLL_OUTPUT_DIV_VAL(n) ((n) & 0x1f) + +#define FRAC_PLL_REFCLK_SEL_OSC_25M (0 << 16) +#define FRAC_PLL_REFCLK_SEL_OSC_27M BIT(16) +#define FRAC_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) +#define FRAC_PLL_REFCLK_SEL_CLK_PN (3 << 16) + +#define FRAC_PLL_FRAC_DIV_CTL_MASK (0x1ffffff << 7) +#define FRAC_PLL_FRAC_DIV_CTL_SHIFT 7 +#define FRAC_PLL_INT_DIV_CTL_MASK 0x7f +#define FRAC_PLL_INT_DIV_CTL_VAL(n) ((n) & 0x7f) + +/* SYS PLL1/2/3 VIDEO PLL2 DRAM PLL */ +#define SSCG_PLL_LOCK_MASK BIT(31) +#define SSCG_PLL_CLKE_MASK BIT(25) +#define SSCG_PLL_DIV2_CLKE_MASK BIT(23) +#define SSCG_PLL_DIV3_CLKE_MASK BIT(21) +#define SSCG_PLL_DIV4_CLKE_MASK BIT(19) +#define SSCG_PLL_DIV5_CLKE_MASK BIT(17) +#define SSCG_PLL_DIV6_CLKE_MASK BIT(15) +#define SSCG_PLL_DIV8_CLKE_MASK BIT(13) +#define SSCG_PLL_DIV10_CLKE_MASK BIT(11) +#define SSCG_PLL_DIV20_CLKE_MASK BIT(9) +#define SSCG_PLL_VIDEO_PLL2_CLKE_MASK BIT(9) +#define SSCG_PLL_DRAM_PLL_CLKE_MASK BIT(9) +#define SSCG_PLL_PLL3_CLKE_MASK BIT(9) +#define SSCG_PLL_PD_MASK BIT(7) +#define SSCG_PLL_BYPASS1_MASK BIT(5) +#define SSCG_PLL_BYPASS2_MASK BIT(4) +#define SSCG_PLL_LOCK_SEL_MASK BIT(3) +#define SSCG_PLL_COUNTCLK_SEL_MASK BIT(2) +#define SSCG_PLL_REFCLK_SEL_MASK 0x3 +#define SSCG_PLL_REFCLK_SEL_OSC_25M (0 << 16) +#define SSCG_PLL_REFCLK_SEL_OSC_27M BIT(16) +#define SSCG_PLL_REFCLK_SEL_HDMI_PHY_27M (2 << 16) +#define SSCG_PLL_REFCLK_SEL_CLK_PN (3 << 16) + +#define SSCG_PLL_SSDS_MASK BIT(8) +#define SSCG_PLL_SSMD_MASK (0x7 << 5) +#define SSCG_PLL_SSMF_MASK (0xf << 1) +#define SSCG_PLL_SSE_MASK 0x1 + +#define SSCG_PLL_REF_DIVR1_MASK (0x7 << 25) +#define SSCG_PLL_REF_DIVR1_SHIFT 25 +#define SSCG_PLL_REF_DIVR1_VAL(n) (((n) << 25) & SSCG_PLL_REF_DIVR1_MASK) +#define SSCG_PLL_REF_DIVR2_MASK (0x3f << 19) +#define SSCG_PLL_REF_DIVR2_SHIFT 19 +#define SSCG_PLL_REF_DIVR2_VAL(n) (((n) << 19) & SSCG_PLL_REF_DIVR2_MASK) +#define SSCG_PLL_FEEDBACK_DIV_F1_MASK (0x3f << 13) +#define SSCG_PLL_FEEDBACK_DIV_F1_SHIFT 13 +#define SSCG_PLL_FEEDBACK_DIV_F1_VAL(n) (((n) << 13) & \ + SSCG_PLL_FEEDBACK_DIV_F1_MASK) +#define SSCG_PLL_FEEDBACK_DIV_F2_MASK (0x3f << 7) +#define SSCG_PLL_FEEDBACK_DIV_F2_SHIFT 7 +#define SSCG_PLL_FEEDBACK_DIV_F2_VAL(n) (((n) << 7) & \ + SSCG_PLL_FEEDBACK_DIV_F2_MASK) +#define SSCG_PLL_OUTPUT_DIV_VAL_MASK (0x3f << 1) +#define SSCG_PLL_OUTPUT_DIV_VAL_SHIFT 1 +#define SSCG_PLL_OUTPUT_DIV_VAL(n) (((n) << 1) & \ + SSCG_PLL_OUTPUT_DIV_VAL_MASK) +#define SSCG_PLL_FILTER_RANGE_MASK 0x1 + +#define HW_DIGPROG_MAJOR_UPPER_MASK (0xff << 16) +#define HW_DIGPROG_MAJOR_LOWER_MASK (0xff << 8) +#define HW_DIGPROG_MINOR_MASK 0xff + +#define HW_OSC_27M_CLKE_MASK BIT(4) +#define HW_OSC_25M_CLKE_MASK BIT(2) +#define HW_OSC_32K_SEL_MASK 0x1 +#define HW_OSC_32K_SEL_RTC 0x1 +#define HW_OSC_32K_SEL_25M_DIV800 0x0 + +#define HW_FRAC_ARM_PLL_DIV_MASK (0x7 << 20) +#define HW_FRAC_ARM_PLL_DIV_SHIFT 20 +#define HW_FRAC_VPU_PLL_DIV_MASK (0x7 << 16) +#define HW_FRAC_VPU_PLL_DIV_SHIFT 16 +#define HW_FRAC_GPU_PLL_DIV_MASK (0x7 << 12) +#define HW_FRAC_GPU_PLL_DIV_SHIFT 12 +#define HW_FRAC_VIDEO_PLL1_DIV_MASK (0x7 << 10) +#define HW_FRAC_VIDEO_PLL1_DIV_SHIFT 10 +#define HW_FRAC_AUDIO_PLL2_DIV_MASK (0x7 << 4) +#define HW_FRAC_AUDIO_PLL2_DIV_SHIFT 4 +#define HW_FRAC_AUDIO_PLL1_DIV_MASK 0x7 +#define HW_FRAC_AUDIO_PLL1_DIV_SHIFT 0 + +#define HW_SSCG_VIDEO_PLL2_DIV_MASK (0x7 << 16) +#define HW_SSCG_VIDEO_PLL2_DIV_SHIFT 16 +#define HW_SSCG_DRAM_PLL_DIV_MASK (0x7 << 14) +#define HW_SSCG_DRAM_PLL_DIV_SHIFT 14 +#define HW_SSCG_SYSTEM_PLL3_DIV_MASK (0x7 << 8) +#define HW_SSCG_SYSTEM_PLL3_DIV_SHIFT 8 +#define HW_SSCG_SYSTEM_PLL2_DIV_MASK (0x7 << 4) +#define HW_SSCG_SYSTEM_PLL2_DIV_SHIFT 4 +#define HW_SSCG_SYSTEM_PLL1_DIV_MASK 0x7 +#define HW_SSCG_SYSTEM_PLL1_DIV_SHIFT 0 + +enum frac_pll_out_val { + FRAC_PLL_OUT_1000M, + FRAC_PLL_OUT_1600M, +}; +#endif diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 68666a5..62640d9 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -10,117 +10,49 @@ #include <asm/mach-imx/regs-lcdif.h> -#define ROM_VERSION_A0 0x800 -#define ROM_VERSION_B0 0x83C +#define ROM_VERSION_A0 IS_ENABLED(CONFIG_IMX8MQ) ? 0x800 : 0x800 +#define ROM_VERSION_B0 IS_ENABLED(CONFIG_IMX8MQ) ? 0x83C : 0x800 -#define M4_BOOTROM_BASE_ADDR 0x007E0000 +#define M4_BOOTROM_BASE_ADDR 0x007E0000 -#define SAI1_BASE_ADDR 0x30010000 -#define SAI6_BASE_ADDR 0x30030000 -#define SAI5_BASE_ADDR 0x30040000 -#define SAI4_BASE_ADDR 0x30050000 -#define SPBA2_BASE_ADDR 0x300F0000 -#define AIPS1_BASE_ADDR 0x301F0000 #define GPIO1_BASE_ADDR 0X30200000 #define GPIO2_BASE_ADDR 0x30210000 #define GPIO3_BASE_ADDR 0x30220000 #define GPIO4_BASE_ADDR 0x30230000 #define GPIO5_BASE_ADDR 0x30240000 -#define ANA_TSENSOR_BASE_ADDR 0x30260000 -#define ANA_OSC_BASE_ADDR 0x30270000 #define WDOG1_BASE_ADDR 0x30280000 #define WDOG2_BASE_ADDR 0x30290000 #define WDOG3_BASE_ADDR 0x302A0000 -#define SDMA2_BASE_ADDR 0x302C0000 -#define GPT1_BASE_ADDR 0x302D0000 -#define GPT2_BASE_ADDR 0x302E0000 -#define GPT3_BASE_ADDR 0x302F0000 -#define ROMCP_BASE_ADDR 0x30310000 -#define LCDIF_BASE_ADDR 0x30320000 #define IOMUXC_BASE_ADDR 0x30330000 #define IOMUXC_GPR_BASE_ADDR 0x30340000 #define OCOTP_BASE_ADDR 0x30350000 #define ANATOP_BASE_ADDR 0x30360000 -#define SNVS_HP_BASE_ADDR 0x30370000 #define CCM_BASE_ADDR 0x30380000 #define SRC_BASE_ADDR 0x30390000 #define GPC_BASE_ADDR 0x303A0000 -#define SEMAPHORE1_BASE_ADDR 0x303B0000 -#define SEMAPHORE2_BASE_ADDR 0x303C0000 -#define RDC_BASE_ADDR 0x303D0000 -#define CSU_BASE_ADDR 0x303E0000 -#define AIPS2_BASE_ADDR 0x305F0000 -#define PWM1_BASE_ADDR 0x30660000 -#define PWM2_BASE_ADDR 0x30670000 -#define PWM3_BASE_ADDR 0x30680000 -#define PWM4_BASE_ADDR 0x30690000 #define SYSCNT_RD_BASE_ADDR 0x306A0000 #define SYSCNT_CMP_BASE_ADDR 0x306B0000 #define SYSCNT_CTRL_BASE_ADDR 0x306C0000 -#define GPT6_BASE_ADDR 0x306E0000 -#define GPT5_BASE_ADDR 0x306F0000 -#define GPT4_BASE_ADDR 0x30700000 -#define PERFMON1_BASE_ADDR 0x307C0000 -#define PERFMON2_BASE_ADDR 0x307D0000 -#define QOSC_BASE_ADDR 0x307F0000 -#define SPDIF1_BASE_ADDR 0x30810000 -#define ECSPI1_BASE_ADDR 0x30820000 -#define ECSPI2_BASE_ADDR 0x30830000 -#define ECSPI3_BASE_ADDR 0x30840000 #define UART1_BASE_ADDR 0x30860000 #define UART3_BASE_ADDR 0x30880000 #define UART2_BASE_ADDR 0x30890000 -#define SPDIF2_BASE_ADDR 0x308A0000 -#define SAI2_BASE_ADDR 0x308B0000 -#define SAI3_BASE_ADDR 0x308C0000 -#define SPBA1_BASE_ADDR 0x308F0000 -#define CAAM_BASE_ADDR 0x30900000 -#define AIPS3_BASE_ADDR 0x309F0000 -#define MIPI_PHY_BASE_ADDR 0x30A00000 -#define MIPI_DSI_BASE_ADDR 0x30A10000 #define I2C1_BASE_ADDR 0x30A20000 #define I2C2_BASE_ADDR 0x30A30000 #define I2C3_BASE_ADDR 0x30A40000 #define I2C4_BASE_ADDR 0x30A50000 #define UART4_BASE_ADDR 0x30A60000 -#define MIPI_CSI_BASE_ADDR 0x30A70000 -#define MIPI_CSI_PHY1_BASE_ADDR 0x30A80000 -#define CSI1_BASE_ADDR 0x30A90000 -#define MU_A_BASE_ADDR 0x30AA0000 -#define MU_B_BASE_ADDR 0x30AB0000 -#define SEMAPHOR_HS_BASE_ADDR 0x30AC0000 #define USDHC1_BASE_ADDR 0x30B40000 #define USDHC2_BASE_ADDR 0x30B50000 -#define MIPI_CS2_BASE_ADDR 0x30B60000 -#define MIPI_CSI_PHY2_BASE_ADDR 0x30B70000 -#define CSI2_BASE_ADDR 0x30B80000 -#define QSPI0_BASE_ADDR 0x30BB0000 -#define QSPI0_AMBA_BASE 0x08000000 -#define SDMA1_BASE_ADDR 0x30BD0000 -#define ENET1_BASE_ADDR 0x30BE0000 +#ifdef CONFIG_IMX8MM +#define USDHC3_BASE_ADDR 0x30B60000 +#endif -#define HDMI_CTRL_BASE_ADDR 0x32C00000 -#define AIPS4_BASE_ADDR 0x32DF0000 -#define DC1_BASE_ADDR 0x32E00000 -#define DC2_BASE_ADDR 0x32E10000 -#define DC3_BASE_ADDR 0x32E20000 -#define HDMI_SEC_BASE_ADDR 0x32E40000 #define TZASC_BASE_ADDR 0x32F80000 -#define MTR_BASE_ADDR 0x32FB0000 -#define PLATFORM_CTRL_BASE_ADDR 0x32FE0000 - -#define MXS_APBH_BASE 0x33000000 -#define MXS_GPMI_BASE 0x33002000 -#define MXS_BCH_BASE 0x33004000 - -#define USB1_BASE_ADDR 0x38100000 -#define USB2_BASE_ADDR 0x38200000 -#define USB1_PHY_BASE_ADDR 0x381F0000 -#define USB2_PHY_BASE_ADDR 0x382F0000 -#define MXS_LCDIF_BASE LCDIF_BASE_ADDR +#define MXS_LCDIF_BASE IS_ENABLED(CONFIG_IMX8MQ) ? \ + 0x30320000 : 0x32e00000 #define SRC_IPS_BASE_ADDR 0x30390000 #define SRC_DDRC_RCR_ADDR 0x30391000 @@ -205,6 +137,7 @@ struct fuse_bank1_regs { u32 rsvd3[3]; }; +#ifdef CONFIG_IMX8MQ struct anamix_pll { u32 audio_pll1_cfg0; u32 audio_pll1_cfg1; @@ -239,6 +172,60 @@ struct anamix_pll { u32 frac_pllout_div_cfg; u32 sscg_pllout_div_cfg; }; +#else +struct anamix_pll { + u32 audio_pll1_gnrl_ctl; + u32 audio_pll1_fdiv_ctl0; + u32 audio_pll1_fdiv_ctl1; + u32 audio_pll1_sscg_ctl; + u32 audio_pll1_mnit_ctl; + u32 audio_pll2_gnrl_ctl; + u32 audio_pll2_fdiv_ctl0; + u32 audio_pll2_fdiv_ctl1; + u32 audio_pll2_sscg_ctl; + u32 audio_pll2_mnit_ctl; + u32 video_pll1_gnrl_ctl; + u32 video_pll1_fdiv_ctl0; + u32 video_pll1_fdiv_ctl1; + u32 video_pll1_sscg_ctl; + u32 video_pll1_mnit_ctl; + u32 reserved[5]; + u32 dram_pll_gnrl_ctl; + u32 dram_pll_fdiv_ctl0; + u32 dram_pll_fdiv_ctl1; + u32 dram_pll_sscg_ctl; + u32 dram_pll_mnit_ctl; + u32 gpu_pll_gnrl_ctl; + u32 gpu_pll_div_ctl; + u32 gpu_pll_locked_ctl1; + u32 gpu_pll_mnit_ctl; + u32 vpu_pll_gnrl_ctl; + u32 vpu_pll_div_ctl; + u32 vpu_pll_locked_ctl1; + u32 vpu_pll_mnit_ctl; + u32 arm_pll_gnrl_ctl; + u32 arm_pll_div_ctl; + u32 arm_pll_locked_ctl1; + u32 arm_pll_mnit_ctl; + u32 sys_pll1_gnrl_ctl; + u32 sys_pll1_div_ctl; + u32 sys_pll1_locked_ctl1; + u32 reserved2[24]; + u32 sys_pll1_mnit_ctl; + u32 sys_pll2_gnrl_ctl; + u32 sys_pll2_div_ctl; + u32 sys_pll2_locked_ctl1; + u32 sys_pll2_mnit_ctl; + u32 sys_pll3_gnrl_ctl; + u32 sys_pll3_div_ctl; + u32 sys_pll3_locked_ctl1; + u32 sys_pll3_mnit_ctl; + u32 anamix_misc_ctl; + u32 anamix_clk_mnit_ctl; + u32 reserved3[437]; + u32 digprog; +}; +#endif struct fuse_bank9_regs { u32 mac_addr0; @@ -288,155 +275,6 @@ struct src { u32 ddr2_rcr; }; -struct gpc_reg { - u32 lpcr_bsc; - u32 lpcr_ad; - u32 lpcr_cpu1; - u32 lpcr_cpu2; - u32 lpcr_cpu3; - u32 slpcr; - u32 mst_cpu_mapping; - u32 mmdc_cpu_mapping; - u32 mlpcr; - u32 pgc_ack_sel; - u32 pgc_ack_sel_m4; - u32 gpc_misc; - u32 imr1_core0; - u32 imr2_core0; - u32 imr3_core0; - u32 imr4_core0; - u32 imr1_core1; - u32 imr2_core1; - u32 imr3_core1; - u32 imr4_core1; - u32 imr1_cpu1; - u32 imr2_cpu1; - u32 imr3_cpu1; - u32 imr4_cpu1; - u32 imr1_cpu3; - u32 imr2_cpu3; - u32 imr3_cpu3; - u32 imr4_cpu3; - u32 isr1_cpu0; - u32 isr2_cpu0; - u32 isr3_cpu0; - u32 isr4_cpu0; - u32 isr1_cpu1; - u32 isr2_cpu1; - u32 isr3_cpu1; - u32 isr4_cpu1; - u32 isr1_cpu2; - u32 isr2_cpu2; - u32 isr3_cpu2; - u32 isr4_cpu2; - u32 isr1_cpu3; - u32 isr2_cpu3; - u32 isr3_cpu3; - u32 isr4_cpu3; - u32 slt0_cfg; - u32 slt1_cfg; - u32 slt2_cfg; - u32 slt3_cfg; - u32 slt4_cfg; - u32 slt5_cfg; - u32 slt6_cfg; - u32 slt7_cfg; - u32 slt8_cfg; - u32 slt9_cfg; - u32 slt10_cfg; - u32 slt11_cfg; - u32 slt12_cfg; - u32 slt13_cfg; - u32 slt14_cfg; - u32 pgc_cpu_0_1_mapping; - u32 cpu_pgc_up_trg; - u32 mix_pgc_up_trg; - u32 pu_pgc_up_trg; - u32 cpu_pgc_dn_trg; - u32 mix_pgc_dn_trg; - u32 pu_pgc_dn_trg; - u32 lpcr_bsc2; - u32 pgc_cpu_2_3_mapping; - u32 lps_cpu0; - u32 lps_cpu1; - u32 lps_cpu2; - u32 lps_cpu3; - u32 gpc_gpr; - u32 gtor; - u32 debug_addr1; - u32 debug_addr2; - u32 cpu_pgc_up_status1; - u32 mix_pgc_up_status0; - u32 mix_pgc_up_status1; - u32 mix_pgc_up_status2; - u32 m4_mix_pgc_up_status0; - u32 m4_mix_pgc_up_status1; - u32 m4_mix_pgc_up_status2; - u32 pu_pgc_up_status0; - u32 pu_pgc_up_status1; - u32 pu_pgc_up_status2; - u32 m4_pu_pgc_up_status0; - u32 m4_pu_pgc_up_status1; - u32 m4_pu_pgc_up_status2; - u32 a53_lp_io_0; - u32 a53_lp_io_1; - u32 a53_lp_io_2; - u32 cpu_pgc_dn_status1; - u32 mix_pgc_dn_status0; - u32 mix_pgc_dn_status1; - u32 mix_pgc_dn_status2; - u32 m4_mix_pgc_dn_status0; - u32 m4_mix_pgc_dn_status1; - u32 m4_mix_pgc_dn_status2; - u32 pu_pgc_dn_status0; - u32 pu_pgc_dn_status1; - u32 pu_pgc_dn_status2; - u32 m4_pu_pgc_dn_status0; - u32 m4_pu_pgc_dn_status1; - u32 m4_pu_pgc_dn_status2; - u32 res[3]; - u32 mix_pdn_flg; - u32 pu_pdn_flg; - u32 m4_mix_pdn_flg; - u32 m4_pu_pdn_flg; - u32 imr1_core2; - u32 imr2_core2; - u32 imr3_core2; - u32 imr4_core2; - u32 imr1_core3; - u32 imr2_core3; - u32 imr3_core3; - u32 imr4_core3; - u32 pgc_ack_sel_pu; - u32 pgc_ack_sel_m4_pu; - u32 slt15_cfg; - u32 slt16_cfg; - u32 slt17_cfg; - u32 slt18_cfg; - u32 slt19_cfg; - u32 gpc_pu_pwrhsk; - u32 slt0_cfg_pu; - u32 slt1_cfg_pu; - u32 slt2_cfg_pu; - u32 slt3_cfg_pu; - u32 slt4_cfg_pu; - u32 slt5_cfg_pu; - u32 slt6_cfg_pu; - u32 slt7_cfg_pu; - u32 slt8_cfg_pu; - u32 slt9_cfg_pu; - u32 slt10_cfg_pu; - u32 slt11_cfg_pu; - u32 slt12_cfg_pu; - u32 slt13_cfg_pu; - u32 slt14_cfg_pu; - u32 slt15_cfg_pu; - u32 slt16_cfg_pu; - u32 slt17_cfg_pu; - u32 slt18_cfg_pu; - u32 slt19_cfg_pu; -}; - #define WDOG_WDT_MASK BIT(3) #define WDOG_WDZST_MASK BIT(0) struct wdog_regs { @@ -459,7 +297,8 @@ struct bootrom_sw_info { u32 reserved_3[3]; }; -#define ROM_SW_INFO_ADDR_B0 0x00000968 +#define ROM_SW_INFO_ADDR_B0 (IS_ENABLED(CONFIG_IMX8MQ) ? 0x00000968 :\ + 0x000009e8) #define ROM_SW_INFO_ADDR_A0 0x000009e8 #define ROM_SW_INFO_ADDR is_soc_rev(CHIP_REV_1_0) ? \ diff --git a/arch/arm/include/asm/arch-imx8m/imx8mm_pins.h b/arch/arm/include/asm/arch-imx8m/imx8mm_pins.h new file mode 100644 index 0000000..210e96e --- /dev/null +++ b/arch/arm/include/asm/arch-imx8m/imx8mm_pins.h @@ -0,0 +1,691 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018-2019 NXP + */ + +#ifndef __ASM_ARCH_IMX8MM_PINS_H__ +#define __ASM_ARCH_IMX8MM_PINS_H__ + +#include <asm/mach-imx/iomux-v3.h> + +enum { + IMX8MM_PAD_GPIO1_IO00_GPIO1_IO0 = IOMUX_PAD(0x0290, 0x0028, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO00_CCM_ENET_PHY_REF_CLK_ROOT = IOMUX_PAD(0x0290, 0x0028, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO00_XTALOSC_REF_CLK_32K = IOMUX_PAD(0x0290, 0x0028, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO00_CCM_EXT_CLK1 = IOMUX_PAD(0x0290, 0x0028, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO01_GPIO1_IO1 = IOMUX_PAD(0x0294, 0x002C, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO01_PWM1_OUT = IOMUX_PAD(0x0294, 0x002C, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO01_XTALOSC_REF_CLK_24M = IOMUX_PAD(0x0294, 0x002C, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO01_CCM_EXT_CLK2 = IOMUX_PAD(0x0294, 0x002C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO02_GPIO1_IO2 = IOMUX_PAD(0x0298, 0x0030, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B = IOMUX_PAD(0x0298, 0x0030, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_ANY = IOMUX_PAD(0x0298, 0x0030, 5, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO03_GPIO1_IO3 = IOMUX_PAD(0x029C, 0x0034, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO03_USDHC1_VSELECT = IOMUX_PAD(0x029C, 0x0034, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO03_SDMA1_EXT_EVENT0 = IOMUX_PAD(0x029C, 0x0034, 5, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO04_GPIO1_IO4 = IOMUX_PAD(0x02A0, 0x0038, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO04_USDHC2_VSELECT = IOMUX_PAD(0x02A0, 0x0038, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO04_SDMA1_EXT_EVENT1 = IOMUX_PAD(0x02A0, 0x0038, 5, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO05_GPIO1_IO5 = IOMUX_PAD(0x02A4, 0x003C, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO05_ARM_PLATFORM_M4_NMI = IOMUX_PAD(0x02A4, 0x003C, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO05_CCM_PMIC_READY = IOMUX_PAD(0x02A4, 0x003C, 5, 0x04BC, 0, 0), + IMX8MM_PAD_GPIO1_IO05_SRC_INT_BOOT = IOMUX_PAD(0x02A4, 0x003C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO06_GPIO1_IO6 = IOMUX_PAD(0x02A8, 0x0040, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO06_ENET1_MDC = IOMUX_PAD(0x02A8, 0x0040, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO06_USDHC1_CD_B = IOMUX_PAD(0x02A8, 0x0040, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO06_CCM_EXT_CLK3 = IOMUX_PAD(0x02A8, 0x0040, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO07_GPIO1_IO7 = IOMUX_PAD(0x02AC, 0x0044, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO07_ENET1_MDIO = IOMUX_PAD(0x02AC, 0x0044, 1, 0x04C0, 0, 0), + IMX8MM_PAD_GPIO1_IO07_USDHC1_WP = IOMUX_PAD(0x02AC, 0x0044, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO07_CCM_EXT_CLK4 = IOMUX_PAD(0x02AC, 0x0044, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO08_GPIO1_IO8 = IOMUX_PAD(0x02B0, 0x0048, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO08_ENET1_1588_EVENT0_IN = IOMUX_PAD(0x02B0, 0x0048, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO08_USDHC2_RESET_B = IOMUX_PAD(0x02B0, 0x0048, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO08_CCM_WAIT = IOMUX_PAD(0x02B0, 0x0048, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO09_GPIO1_IO9 = IOMUX_PAD(0x02B4, 0x004C, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO09_ENET1_1588_EVENT0_OUT = IOMUX_PAD(0x02B4, 0x004C, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO09_USDHC3_RESET_B = IOMUX_PAD(0x02B4, 0x004C, 4, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO09_SDMA2_EXT_EVENT0 = IOMUX_PAD(0x02B4, 0x004C, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO09_CCM_STOP = IOMUX_PAD(0x02B4, 0x004C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO10_GPIO1_IO10 = IOMUX_PAD(0x02B8, 0x0050, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO10_USB1_OTG_ID = IOMUX_PAD(0x02B8, 0x0050, 1, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO11_GPIO1_IO11 = IOMUX_PAD(0x02BC, 0x0054, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO11_USB2_OTG_ID = IOMUX_PAD(0x02BC, 0x0054, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO11_USDHC3_VSELECT = IOMUX_PAD(0x02BC, 0x0054, 4, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO11_CCM_PMIC_READY = IOMUX_PAD(0x02BC, 0x0054, 5, 0x04BC, 1, 0), + IMX8MM_PAD_GPIO1_IO11_CCM_OUT0 = IOMUX_PAD(0x02BC, 0x0054, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO12_GPIO1_IO12 = IOMUX_PAD(0x02C0, 0x0058, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO12_USB1_OTG_PWR = IOMUX_PAD(0x02C0, 0x0058, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO12_SDMA2_EXT_EVENT1 = IOMUX_PAD(0x02C0, 0x0058, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO12_CCM_OUT1 = IOMUX_PAD(0x02C0, 0x0058, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO13_GPIO1_IO13 = IOMUX_PAD(0x02C4, 0x005C, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO13_USB1_OTG_OC = IOMUX_PAD(0x02C4, 0x005C, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO13_PWM2_OUT = IOMUX_PAD(0x02C4, 0x005C, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO13_CCM_OUT2 = IOMUX_PAD(0x02C4, 0x005C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO14_GPIO1_IO14 = IOMUX_PAD(0x02C8, 0x0060, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO14_USB2_OTG_PWR = IOMUX_PAD(0x02C8, 0x0060, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO14_USDHC3_CD_B = IOMUX_PAD(0x02C8, 0x0060, 4, 0x0544, 2, 0), + IMX8MM_PAD_GPIO1_IO14_PWM3_OUT = IOMUX_PAD(0x02C8, 0x0060, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO14_CCM_CLKO1 = IOMUX_PAD(0x02C8, 0x0060, 6, 0x0000, 0, 0), + + IMX8MM_PAD_GPIO1_IO15_GPIO1_IO15 = IOMUX_PAD(0x02CC, 0x0064, 0, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO15_USB2_OTG_OC = IOMUX_PAD(0x02CC, 0x0064, 1, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO15_USDHC3_WP = IOMUX_PAD(0x02CC, 0x0064, 4, 0x0548, 2, 0), + IMX8MM_PAD_GPIO1_IO15_PWM4_OUT = IOMUX_PAD(0x02CC, 0x0064, 5, 0x0000, 0, 0), + IMX8MM_PAD_GPIO1_IO15_CCM_CLKO2 = IOMUX_PAD(0x02CC, 0x0064, 6, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_MDC_ENET1_MDC = IOMUX_PAD(0x02D0, 0x0068, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_MDC_GPIO1_IO16 = IOMUX_PAD(0x02D0, 0x0068, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_MDIO_ENET1_MDIO = IOMUX_PAD(0x02D4, 0x006C, 0, 0x04C0, 1, 0), + IMX8MM_PAD_ENET_MDIO_GPIO1_IO17 = IOMUX_PAD(0x02D4, 0x006C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_TD3_ENET1_RGMII_TD3 = IOMUX_PAD(0x02D8, 0x0070, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TD3_GPIO1_IO18 = IOMUX_PAD(0x02D8, 0x0070, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_TD2_ENET1_RGMII_TD2 = IOMUX_PAD(0x02DC, 0x0074, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TD2_ENET1_TX_CLK = IOMUX_PAD(0x02DC, 0x0074, 1, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TD2_CCM_ENET_REF_CLK_ROOT = IOMUX_PAD(0x02DC, 0x0074, 1, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TD2_GPIO1_IO19 = IOMUX_PAD(0x02DC, 0x0074, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_TD1_ENET1_RGMII_TD1 = IOMUX_PAD(0x02E0, 0x0078, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TD1_GPIO1_IO20 = IOMUX_PAD(0x02E0, 0x0078, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_TD0_ENET1_RGMII_TD0 = IOMUX_PAD(0x02E4, 0x007C, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TD0_GPIO1_IO21 = IOMUX_PAD(0x02E4, 0x007C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_TX_CTL_ENET1_RGMII_TX_CTL = IOMUX_PAD(0x02E8, 0x0080, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TX_CTL_GPIO1_IO22 = IOMUX_PAD(0x02E8, 0x0080, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_TXC_ENET1_RGMII_TXC = IOMUX_PAD(0x02EC, 0x0084, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TXC_ENET1_TX_ER = IOMUX_PAD(0x02EC, 0x0084, 1, 0x0000, 0, 0), + IMX8MM_PAD_ENET_TXC_GPIO1_IO23 = IOMUX_PAD(0x02EC, 0x0084, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_RX_CTL_ENET1_RGMII_RX_CTL = IOMUX_PAD(0x02F0, 0x0088, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RX_CTL_GPIO1_IO24 = IOMUX_PAD(0x02F0, 0x0088, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_RXC_ENET1_RGMII_RXC = IOMUX_PAD(0x02F4, 0x008C, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RXC_ENET1_RX_ER = IOMUX_PAD(0x02F4, 0x008C, 1, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RXC_GPIO1_IO25 = IOMUX_PAD(0x02F4, 0x008C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_RD0_ENET1_RGMII_RD0 = IOMUX_PAD(0x02F8, 0x0090, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RD0_GPIO1_IO26 = IOMUX_PAD(0x02F8, 0x0090, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_RD1_ENET1_RGMII_RD1 = IOMUX_PAD(0x02FC, 0x0094, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RD1_GPIO1_IO27 = IOMUX_PAD(0x02FC, 0x0094, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_RD2_ENET1_RGMII_RD2 = IOMUX_PAD(0x0300, 0x0098, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RD2_GPIO1_IO28 = IOMUX_PAD(0x0300, 0x0098, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ENET_RD3_ENET1_RGMII_RD3 = IOMUX_PAD(0x0304, 0x009C, 0, 0x0000, 0, 0), + IMX8MM_PAD_ENET_RD3_GPIO1_IO29 = IOMUX_PAD(0x0304, 0x009C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_CLK_USDHC1_CLK = IOMUX_PAD(0x0308, 0x00A0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_CLK_GPIO2_IO0 = IOMUX_PAD(0x0308, 0x00A0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_CMD_USDHC1_CMD = IOMUX_PAD(0x030C, 0x00A4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_CMD_GPIO2_IO1 = IOMUX_PAD(0x030C, 0x00A4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA0_USDHC1_DATA0 = IOMUX_PAD(0x0310, 0x00A8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA0_GPIO2_IO2 = IOMUX_PAD(0x0310, 0x00A8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA1_USDHC1_DATA1 = IOMUX_PAD(0x0314, 0x00AC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA1_GPIO2_IO3 = IOMUX_PAD(0x0314, 0x00AC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA2_USDHC1_DATA2 = IOMUX_PAD(0x0318, 0x00B0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA2_GPIO2_IO4 = IOMUX_PAD(0x0318, 0x00B0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA3_USDHC1_DATA3 = IOMUX_PAD(0x031C, 0x00B4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA3_GPIO2_IO5 = IOMUX_PAD(0x031C, 0x00B4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA4_USDHC1_DATA4 = IOMUX_PAD(0x0320, 0x00B8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA4_GPIO2_IO6 = IOMUX_PAD(0x0320, 0x00B8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA5_USDHC1_DATA5 = IOMUX_PAD(0x0324, 0x00BC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA5_GPIO2_IO7 = IOMUX_PAD(0x0324, 0x00BC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA6_USDHC1_DATA6 = IOMUX_PAD(0x0328, 0x00C0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA6_GPIO2_IO8 = IOMUX_PAD(0x0328, 0x00C0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_DATA7_USDHC1_DATA7 = IOMUX_PAD(0x032C, 0x00C4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_DATA7_GPIO2_IO9 = IOMUX_PAD(0x032C, 0x00C4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_RESET_B_USDHC1_RESET_B = IOMUX_PAD(0x0330, 0x00C8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_RESET_B_GPIO2_IO10 = IOMUX_PAD(0x0330, 0x00C8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD1_STROBE_USDHC1_STROBE = IOMUX_PAD(0x0334, 0x00CC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD1_STROBE_GPIO2_IO11 = IOMUX_PAD(0x0334, 0x00CC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_CD_B_USDHC2_CD_B = IOMUX_PAD(0x0338, 0x00D0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_CD_B_GPIO2_IO12 = IOMUX_PAD(0x0338, 0x00D0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_CLK_USDHC2_CLK = IOMUX_PAD(0x033C, 0x00D4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_CLK_GPIO2_IO13 = IOMUX_PAD(0x033C, 0x00D4, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_CLK_CCM_OBSERVE0 = IOMUX_PAD(0x033C, 0x00D4, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_CMD_USDHC2_CMD = IOMUX_PAD(0x0340, 0x00D8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_CMD_GPIO2_IO14 = IOMUX_PAD(0x0340, 0x00D8, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_CMD_CCM_OBSERVE1 = IOMUX_PAD(0x0340, 0x00D8, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_DATA0_USDHC2_DATA0 = IOMUX_PAD(0x0344, 0x00DC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA0_GPIO2_IO15 = IOMUX_PAD(0x0344, 0x00DC, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA0_CCM_OBSERVE2 = IOMUX_PAD(0x0344, 0x00DC, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_DATA1_USDHC2_DATA1 = IOMUX_PAD(0x0348, 0x00E0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA1_GPIO2_IO16 = IOMUX_PAD(0x0348, 0x00E0, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA1_CCM_WAIT = IOMUX_PAD(0x0348, 0x00E0, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_DATA2_USDHC2_DATA2 = IOMUX_PAD(0x034C, 0x00E4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA2_GPIO2_IO17 = IOMUX_PAD(0x034C, 0x00E4, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA2_CCM_STOP = IOMUX_PAD(0x034C, 0x00E4, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_DATA3_USDHC2_DATA3 = IOMUX_PAD(0x0350, 0x00E8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA3_GPIO2_IO18 = IOMUX_PAD(0x0350, 0x00E8, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_DATA3_SRC_EARLY_RESET = IOMUX_PAD(0x0350, 0x00E8, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_RESET_B_USDHC2_RESET_B = IOMUX_PAD(0x0354, 0x00EC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_RESET_B_GPIO2_IO19 = IOMUX_PAD(0x0354, 0x00EC, 5, 0x0000, 0, 0), + IMX8MM_PAD_SD2_RESET_B_SRC_SYSTEM_RESET = IOMUX_PAD(0x0354, 0x00EC, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SD2_WP_USDHC2_WP = IOMUX_PAD(0x0358, 0x00F0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SD2_WP_GPIO2_IO20 = IOMUX_PAD(0x0358, 0x00F0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_ALE_RAWNAND_ALE = IOMUX_PAD(0x035C, 0x00F4, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_ALE_QSPI_A_SCLK = IOMUX_PAD(0x035C, 0x00F4, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_ALE_GPIO3_IO0 = IOMUX_PAD(0x035C, 0x00F4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_CE0_B_RAWNAND_CE0_B = IOMUX_PAD(0x0360, 0x00F8, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE0_B_QSPI_A_SS0_B = IOMUX_PAD(0x0360, 0x00F8, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE0_B_GPIO3_IO1 = IOMUX_PAD(0x0360, 0x00F8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_CE1_B_RAWNAND_CE1_B = IOMUX_PAD(0x0364, 0x00FC, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE1_B_QSPI_A_SS1_B = IOMUX_PAD(0x0364, 0x00FC, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE1_B_USDHC3_STROBE = IOMUX_PAD(0x0364, 0x00FC, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE1_B_GPIO3_IO2 = IOMUX_PAD(0x0364, 0x00FC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_CE2_B_RAWNAND_CE2_B = IOMUX_PAD(0x0368, 0x0100, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE2_B_QSPI_B_SS0_B = IOMUX_PAD(0x0368, 0x0100, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE2_B_USDHC3_DATA5 = IOMUX_PAD(0x0368, 0x0100, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE2_B_GPIO3_IO3 = IOMUX_PAD(0x0368, 0x0100, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_CE3_B_RAWNAND_CE3_B = IOMUX_PAD(0x036C, 0x0104, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE3_B_QSPI_B_SS1_B = IOMUX_PAD(0x036C, 0x0104, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE3_B_USDHC3_DATA6 = IOMUX_PAD(0x036C, 0x0104, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CE3_B_GPIO3_IO4 = IOMUX_PAD(0x036C, 0x0104, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_CLE_RAWNAND_CLE = IOMUX_PAD(0x0370, 0x0108, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CLE_QSPI_B_SCLK = IOMUX_PAD(0x0370, 0x0108, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CLE_USDHC3_DATA7 = IOMUX_PAD(0x0370, 0x0108, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_CLE_GPIO3_IO5 = IOMUX_PAD(0x0370, 0x0108, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA00_RAWNAND_DATA00 = IOMUX_PAD(0x0374, 0x010C, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA00_QSPI_A_DATA0 = IOMUX_PAD(0x0374, 0x010C, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA00_GPIO3_IO6 = IOMUX_PAD(0x0374, 0x010C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA01_RAWNAND_DATA01 = IOMUX_PAD(0x0378, 0x0110, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA01_QSPI_A_DATA1 = IOMUX_PAD(0x0378, 0x0110, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA01_GPIO3_IO7 = IOMUX_PAD(0x0378, 0x0110, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA02_RAWNAND_DATA02 = IOMUX_PAD(0x037C, 0x0114, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA02_QSPI_A_DATA2 = IOMUX_PAD(0x037C, 0x0114, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA02_USDHC3_CD_B = IOMUX_PAD(0x037C, 0x0114, 2, 0x0544, 0, 0), + IMX8MM_PAD_NAND_DATA02_GPIO3_IO8 = IOMUX_PAD(0x037C, 0x0114, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA03_RAWNAND_DATA03 = IOMUX_PAD(0x0380, 0x0118, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA03_QSPI_A_DATA3 = IOMUX_PAD(0x0380, 0x0118, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA03_USDHC3_WP = IOMUX_PAD(0x0380, 0x0118, 2, 0x0548, 0, 0), + IMX8MM_PAD_NAND_DATA03_GPIO3_IO9 = IOMUX_PAD(0x0380, 0x0118, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA04_RAWNAND_DATA04 = IOMUX_PAD(0x0384, 0x011C, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA04_QSPI_B_DATA0 = IOMUX_PAD(0x0384, 0x011C, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA04_USDHC3_DATA0 = IOMUX_PAD(0x0384, 0x011C, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA04_GPIO3_IO10 = IOMUX_PAD(0x0384, 0x011C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA05_RAWNAND_DATA05 = IOMUX_PAD(0x0388, 0x0120, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA05_QSPI_B_DATA1 = IOMUX_PAD(0x0388, 0x0120, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA05_USDHC3_DATA1 = IOMUX_PAD(0x0388, 0x0120, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA05_GPIO3_IO11 = IOMUX_PAD(0x0388, 0x0120, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA06_RAWNAND_DATA06 = IOMUX_PAD(0x038C, 0x0124, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA06_QSPI_B_DATA2 = IOMUX_PAD(0x038C, 0x0124, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA06_USDHC3_DATA2 = IOMUX_PAD(0x038C, 0x0124, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA06_GPIO3_IO12 = IOMUX_PAD(0x038C, 0x0124, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DATA07_RAWNAND_DATA07 = IOMUX_PAD(0x0390, 0x0128, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA07_QSPI_B_DATA3 = IOMUX_PAD(0x0390, 0x0128, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA07_USDHC3_DATA3 = IOMUX_PAD(0x0390, 0x0128, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DATA07_GPIO3_IO13 = IOMUX_PAD(0x0390, 0x0128, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_DQS_RAWNAND_DQS = IOMUX_PAD(0x0394, 0x012C, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DQS_QSPI_A_DQS = IOMUX_PAD(0x0394, 0x012C, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_DQS_GPIO3_IO14 = IOMUX_PAD(0x0394, 0x012C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_RE_B_RAWNAND_RE_B = IOMUX_PAD(0x0398, 0x0130, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_RE_B_QSPI_B_DQS = IOMUX_PAD(0x0398, 0x0130, 1, 0x0000, 0, 0), + IMX8MM_PAD_NAND_RE_B_USDHC3_DATA4 = IOMUX_PAD(0x0398, 0x0130, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_RE_B_GPIO3_IO15 = IOMUX_PAD(0x0398, 0x0130, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_READY_B_RAWNAND_READY_B = IOMUX_PAD(0x039C, 0x0134, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_READY_B_USDHC3_RESET_B = IOMUX_PAD(0x039C, 0x0134, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_READY_B_GPIO3_IO16 = IOMUX_PAD(0x039C, 0x0134, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_WE_B_RAWNAND_WE_B = IOMUX_PAD(0x03A0, 0x0138, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_WE_B_USDHC3_CLK = IOMUX_PAD(0x03A0, 0x0138, 2 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + IMX8MM_PAD_NAND_WE_B_GPIO3_IO17 = IOMUX_PAD(0x03A0, 0x0138, 5, 0x0000, 0, 0), + + IMX8MM_PAD_NAND_WP_B_RAWNAND_WP_B = IOMUX_PAD(0x03A4, 0x013C, 0, 0x0000, 0, 0), + IMX8MM_PAD_NAND_WP_B_USDHC3_CMD = IOMUX_PAD(0x03A4, 0x013C, 2, 0x0000, 0, 0), + IMX8MM_PAD_NAND_WP_B_GPIO3_IO18 = IOMUX_PAD(0x03A4, 0x013C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_RXFS_SAI5_RX_SYNC = IOMUX_PAD(0x03A8, 0x0140, 0, 0x04E4, 0, 0), + IMX8MM_PAD_SAI5_RXFS_SAI1_TX_DATA0 = IOMUX_PAD(0x03A8, 0x0140, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXFS_GPIO3_IO19 = IOMUX_PAD(0x03A8, 0x0140, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_RXC_SAI5_RX_BCLK = IOMUX_PAD(0x03AC, 0x0144, 0, 0x04D0, 0, 0), + IMX8MM_PAD_SAI5_RXC_SAI1_TX_DATA1 = IOMUX_PAD(0x03AC, 0x0144, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXC_PDM_CLK = IOMUX_PAD(0x03AC, 0x0144, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXC_GPIO3_IO20 = IOMUX_PAD(0x03AC, 0x0144, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_RXD0_SAI5_RX_DATA0 = IOMUX_PAD(0x03B0, 0x0148, 0, 0x04D4, 0, 0), + IMX8MM_PAD_SAI5_RXD0_SAI1_TX_DATA2 = IOMUX_PAD(0x03B0, 0x0148, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXD0_PDM_BIT_STREAM0 = IOMUX_PAD(0x03B0, 0x0148, 4, 0x0534, 0, 0), + IMX8MM_PAD_SAI5_RXD0_GPIO3_IO21 = IOMUX_PAD(0x03B0, 0x0148, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_RXD1_SAI5_RX_DATA1 = IOMUX_PAD(0x03B4, 0x014C, 0, 0x04D8, 0, 0), + IMX8MM_PAD_SAI5_RXD1_SAI1_TX_DATA3 = IOMUX_PAD(0x03B4, 0x014C, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXD1_SAI1_TX_SYNC = IOMUX_PAD(0x03B4, 0x014C, 2, 0x04CC, 0, 0), + IMX8MM_PAD_SAI5_RXD1_SAI5_TX_SYNC = IOMUX_PAD(0x03B4, 0x014C, 3, 0x04EC, 0, 0), + IMX8MM_PAD_SAI5_RXD1_PDM_BIT_STREAM1 = IOMUX_PAD(0x03B4, 0x014C, 4, 0x0538, 0, 0), + IMX8MM_PAD_SAI5_RXD1_GPIO3_IO22 = IOMUX_PAD(0x03B4, 0x014C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_RXD2_SAI5_RX_DATA2 = IOMUX_PAD(0x03B8, 0x0150, 0, 0x04DC, 0, 0), + IMX8MM_PAD_SAI5_RXD2_SAI1_TX_DATA4 = IOMUX_PAD(0x03B8, 0x0150, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXD2_SAI1_TX_SYNC = IOMUX_PAD(0x03B8, 0x0150, 2, 0x04CC, 1, 0), + IMX8MM_PAD_SAI5_RXD2_SAI5_TX_BCLK = IOMUX_PAD(0x03B8, 0x0150, 3, 0x04E8, 0, 0), + IMX8MM_PAD_SAI5_RXD2_PDM_BIT_STREAM2 = IOMUX_PAD(0x03B8, 0x0150, 4, 0x053C, 0, 0), + IMX8MM_PAD_SAI5_RXD2_GPIO3_IO23 = IOMUX_PAD(0x03B8, 0x0150, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_RXD3_SAI5_RX_DATA3 = IOMUX_PAD(0x03BC, 0x0154, 0, 0x04E0, 0, 0), + IMX8MM_PAD_SAI5_RXD3_SAI1_TX_DATA5 = IOMUX_PAD(0x03BC, 0x0154, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXD3_SAI1_TX_SYNC = IOMUX_PAD(0x03BC, 0x0154, 2, 0x04CC, 2, 0), + IMX8MM_PAD_SAI5_RXD3_SAI5_TX_DATA0 = IOMUX_PAD(0x03BC, 0x0154, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_RXD3_PDM_BIT_STREAM3 = IOMUX_PAD(0x03BC, 0x0154, 4, 0x0540, 0, 0), + IMX8MM_PAD_SAI5_RXD3_GPIO3_IO24 = IOMUX_PAD(0x03BC, 0x0154, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI5_MCLK_SAI5_MCLK = IOMUX_PAD(0x03C0, 0x0158, 0, 0x052C, 0, 0), + IMX8MM_PAD_SAI5_MCLK_SAI1_TX_BCLK = IOMUX_PAD(0x03C0, 0x0158, 1, 0x04C8, 0, 0), + IMX8MM_PAD_SAI5_MCLK_GPIO3_IO25 = IOMUX_PAD(0x03C0, 0x0158, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI5_MCLK_SRC_TESTER_ACK = IOMUX_PAD(0x03C0, 0x0158, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXFS_SAI1_RX_SYNC = IOMUX_PAD(0x03C4, 0x015C, 0, 0x04C4, 0, 0), + IMX8MM_PAD_SAI1_RXFS_SAI5_RX_SYNC = IOMUX_PAD(0x03C4, 0x015C, 1, 0x04E4, 1, 0), + IMX8MM_PAD_SAI1_RXFS_ARM_PLATFORM_TRACE_CLK = IOMUX_PAD(0x03C4, 0x015C, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXFS_GPIO4_IO0 = IOMUX_PAD(0x03C4, 0x015C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXC_SAI1_RX_BCLK = IOMUX_PAD(0x03C8, 0x0160, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXC_SAI5_RX_BCLK = IOMUX_PAD(0x03C8, 0x0160, 1, 0x04D0, 1, 0), + IMX8MM_PAD_SAI1_RXC_ARM_PLATFORM_TRACE_CTL = IOMUX_PAD(0x03C8, 0x0160, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXC_GPIO4_IO1 = IOMUX_PAD(0x03C8, 0x0160, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD0_SAI1_RX_DATA0 = IOMUX_PAD(0x03CC, 0x0164, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD0_SAI5_RX_DATA0 = IOMUX_PAD(0x03CC, 0x0164, 1, 0x04D4, 1, 0), + IMX8MM_PAD_SAI1_RXD0_SAI1_TX_DATA1 = IOMUX_PAD(0x03CC, 0x0164, 2, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD0_PDM_BIT_STREAM0 = IOMUX_PAD(0x03CC, 0x0164, 3, 0x0534, 1, 0), + IMX8MM_PAD_SAI1_RXD0_ARM_PLATFORM_TRACE0 = IOMUX_PAD(0x03CC, 0x0164, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD0_GPIO4_IO2 = IOMUX_PAD(0x03CC, 0x0164, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD0_SRC_BOOT_CFG0 = IOMUX_PAD(0x03CC, 0x0164, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD1_SAI1_RX_DATA1 = IOMUX_PAD(0x03D0, 0x0168, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD1_SAI5_RX_DATA1 = IOMUX_PAD(0x03D0, 0x0168, 1, 0x04D8, 1, 0), + IMX8MM_PAD_SAI1_RXD1_PDM_BIT_STREAM1 = IOMUX_PAD(0x03D0, 0x0168, 3, 0x0538, 1, 0), + IMX8MM_PAD_SAI1_RXD1_ARM_PLATFORM_TRACE1 = IOMUX_PAD(0x03D0, 0x0168, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD1_GPIO4_IO3 = IOMUX_PAD(0x03D0, 0x0168, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD1_SRC_BOOT_CFG1 = IOMUX_PAD(0x03D0, 0x0168, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD2_SAI1_RX_DATA2 = IOMUX_PAD(0x03D4, 0x016C, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD2_SAI5_RX_DATA2 = IOMUX_PAD(0x03D4, 0x016C, 1, 0x04DC, 1, 0), + IMX8MM_PAD_SAI1_RXD2_PDM_BIT_STREAM2 = IOMUX_PAD(0x03D4, 0x016C, 3, 0x053C, 1, 0), + IMX8MM_PAD_SAI1_RXD2_ARM_PLATFORM_TRACE2 = IOMUX_PAD(0x03D4, 0x016C, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD2_GPIO4_IO4 = IOMUX_PAD(0x03D4, 0x016C, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD2_SRC_BOOT_CFG2 = IOMUX_PAD(0x03D4, 0x016C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD3_SAI1_RX_DATA3 = IOMUX_PAD(0x03D8, 0x0170, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD3_SAI5_RX_DATA3 = IOMUX_PAD(0x03D8, 0x0170, 1, 0x04E0, 1, 0), + IMX8MM_PAD_SAI1_RXD3_PDM_BIT_STREAM3 = IOMUX_PAD(0x03D8, 0x0170, 3, 0x0540, 1, 0), + IMX8MM_PAD_SAI1_RXD3_ARM_PLATFORM_TRACE3 = IOMUX_PAD(0x03D8, 0x0170, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD3_GPIO4_IO5 = IOMUX_PAD(0x03D8, 0x0170, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD3_SRC_BOOT_CFG3 = IOMUX_PAD(0x03D8, 0x0170, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD4_SAI1_RX_DATA4 = IOMUX_PAD(0x03DC, 0x0174, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD4_SAI6_TX_BCLK = IOMUX_PAD(0x03DC, 0x0174, 1, 0x051C, 0, 0), + IMX8MM_PAD_SAI1_RXD4_SAI6_RX_BCLK = IOMUX_PAD(0x03DC, 0x0174, 2, 0x0510, 0, 0), + IMX8MM_PAD_SAI1_RXD4_ARM_PLATFORM_TRACE4 = IOMUX_PAD(0x03DC, 0x0174, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD4_GPIO4_IO6 = IOMUX_PAD(0x03DC, 0x0174, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD4_SRC_BOOT_CFG4 = IOMUX_PAD(0x03DC, 0x0174, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD5_SAI1_RX_DATA5 = IOMUX_PAD(0x03E0, 0x0178, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD5_SAI6_TX_DATA0 = IOMUX_PAD(0x03E0, 0x0178, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD5_SAI6_RX_DATA0 = IOMUX_PAD(0x03E0, 0x0178, 2, 0x0514, 0, 0), + IMX8MM_PAD_SAI1_RXD5_SAI1_RX_SYNC = IOMUX_PAD(0x03E0, 0x0178, 3, 0x04C4, 1, 0), + IMX8MM_PAD_SAI1_RXD5_ARM_PLATFORM_TRACE5 = IOMUX_PAD(0x03E0, 0x0178, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD5_GPIO4_IO7 = IOMUX_PAD(0x03E0, 0x0178, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD5_SRC_BOOT_CFG5 = IOMUX_PAD(0x03E0, 0x0178, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD6_SAI1_RX_DATA6 = IOMUX_PAD(0x03E4, 0x017C, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD6_SAI6_TX_SYNC = IOMUX_PAD(0x03E4, 0x017C, 1, 0x0520, 0, 0), + IMX8MM_PAD_SAI1_RXD6_SAI6_RX_SYNC = IOMUX_PAD(0x03E4, 0x017C, 2, 0x0518, 0, 0), + IMX8MM_PAD_SAI1_RXD6_ARM_PLATFORM_TRACE6 = IOMUX_PAD(0x03E4, 0x017C, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD6_GPIO4_IO8 = IOMUX_PAD(0x03E4, 0x017C, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD6_SRC_BOOT_CFG6 = IOMUX_PAD(0x03E4, 0x017C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_RXD7_SAI1_RX_DATA7 = IOMUX_PAD(0x03E8, 0x0180, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD7_SAI6_MCLK = IOMUX_PAD(0x03E8, 0x0180, 1, 0x0530, 0, 0), + IMX8MM_PAD_SAI1_RXD7_SAI1_TX_SYNC = IOMUX_PAD(0x03E8, 0x0180, 2, 0x04CC, 4, 0), + IMX8MM_PAD_SAI1_RXD7_SAI1_TX_DATA4 = IOMUX_PAD(0x03E8, 0x0180, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD7_ARM_PLATFORM_TRACE7 = IOMUX_PAD(0x03E8, 0x0180, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD7_GPIO4_IO9 = IOMUX_PAD(0x03E8, 0x0180, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_RXD7_SRC_BOOT_CFG7 = IOMUX_PAD(0x03E8, 0x0180, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXFS_SAI1_TX_SYNC = IOMUX_PAD(0x03EC, 0x0184, 0, 0x04CC, 3, 0), + IMX8MM_PAD_SAI1_TXFS_SAI5_TX_SYNC = IOMUX_PAD(0x03EC, 0x0184, 1, 0x04EC, 1, 0), + IMX8MM_PAD_SAI1_TXFS_ARM_PLATFORM_EVENTO = IOMUX_PAD(0x03EC, 0x0184, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXFS_GPIO4_IO10 = IOMUX_PAD(0x03EC, 0x0184, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXC_SAI1_TX_BCLK = IOMUX_PAD(0x03F0, 0x0188, 0, 0x04C8, 1, 0), + IMX8MM_PAD_SAI1_TXC_SAI5_TX_BCLK = IOMUX_PAD(0x03F0, 0x0188, 1, 0x04E8, 1, 0), + IMX8MM_PAD_SAI1_TXC_ARM_PLATFORM_EVENTI = IOMUX_PAD(0x03F0, 0x0188, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXC_GPIO4_IO11 = IOMUX_PAD(0x03F0, 0x0188, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD0_SAI1_TX_DATA0 = IOMUX_PAD(0x03F4, 0x018C, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD0_SAI5_TX_DATA0 = IOMUX_PAD(0x03F4, 0x018C, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD0_ARM_PLATFORM_TRACE8 = IOMUX_PAD(0x03F4, 0x018C, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD0_GPIO4_IO12 = IOMUX_PAD(0x03F4, 0x018C, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD0_SRC_BOOT_CFG8 = IOMUX_PAD(0x03F4, 0x018C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD1_SAI1_TX_DATA1 = IOMUX_PAD(0x03F8, 0x0190, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD1_SAI5_TX_DATA1 = IOMUX_PAD(0x03F8, 0x0190, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD1_ARM_PLATFORM_TRACE9 = IOMUX_PAD(0x03F8, 0x0190, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD1_GPIO4_IO13 = IOMUX_PAD(0x03F8, 0x0190, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD1_SRC_BOOT_CFG9 = IOMUX_PAD(0x03F8, 0x0190, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD2_SAI1_TX_DATA2 = IOMUX_PAD(0x03FC, 0x0194, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD2_SAI5_TX_DATA2 = IOMUX_PAD(0x03FC, 0x0194, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD2_ARM_PLATFORM_TRACE10 = IOMUX_PAD(0x03FC, 0x0194, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD2_GPIO4_IO14 = IOMUX_PAD(0x03FC, 0x0194, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD2_SRC_BOOT_CFG10 = IOMUX_PAD(0x03FC, 0x0194, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD3_SAI1_TX_DATA3 = IOMUX_PAD(0x0400, 0x0198, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD3_SAI5_TX_DATA3 = IOMUX_PAD(0x0400, 0x0198, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD3_ARM_PLATFORM_TRACE11 = IOMUX_PAD(0x0400, 0x0198, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD3_GPIO4_IO15 = IOMUX_PAD(0x0400, 0x0198, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD3_SRC_BOOT_CFG11 = IOMUX_PAD(0x0400, 0x0198, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD4_SAI1_TX_DATA4 = IOMUX_PAD(0x0404, 0x019C, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD4_SAI6_RX_BCLK = IOMUX_PAD(0x0404, 0x019C, 1, 0x0510, 1, 0), + IMX8MM_PAD_SAI1_TXD4_SAI6_TX_BCLK = IOMUX_PAD(0x0404, 0x019C, 2, 0x051C, 1, 0), + IMX8MM_PAD_SAI1_TXD4_ARM_PLATFORM_TRACE12 = IOMUX_PAD(0x0404, 0x019C, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD4_GPIO4_IO16 = IOMUX_PAD(0x0404, 0x019C, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD4_SRC_BOOT_CFG12 = IOMUX_PAD(0x0404, 0x019C, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD5_SAI1_TX_DATA5 = IOMUX_PAD(0x0408, 0x01A0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD5_SAI6_RX_DATA0 = IOMUX_PAD(0x0408, 0x01A0, 1, 0x0514, 1, 0), + IMX8MM_PAD_SAI1_TXD5_SAI6_TX_DATA0 = IOMUX_PAD(0x0408, 0x01A0, 2, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD5_ARM_PLATFORM_TRACE13 = IOMUX_PAD(0x0408, 0x01A0, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD5_GPIO4_IO17 = IOMUX_PAD(0x0408, 0x01A0, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD5_SRC_BOOT_CFG13 = IOMUX_PAD(0x0408, 0x01A0, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD6_SAI1_TX_DATA6 = IOMUX_PAD(0x040C, 0x01A4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD6_SAI6_RX_SYNC = IOMUX_PAD(0x040C, 0x01A4, 1, 0x0518, 1, 0), + IMX8MM_PAD_SAI1_TXD6_SAI6_TX_SYNC = IOMUX_PAD(0x040C, 0x01A4, 2, 0x0520, 1, 0), + IMX8MM_PAD_SAI1_TXD6_ARM_PLATFORM_TRACE14 = IOMUX_PAD(0x040C, 0x01A4, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD6_GPIO4_IO18 = IOMUX_PAD(0x040C, 0x01A4, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD6_SRC_BOOT_CFG14 = IOMUX_PAD(0x040C, 0x01A4, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_TXD7_SAI1_TX_DATA7 = IOMUX_PAD(0x0410, 0x01A8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD7_SAI6_MCLK = IOMUX_PAD(0x0410, 0x01A8, 1, 0x0530, 1, 0), + IMX8MM_PAD_SAI1_TXD7_PDM_CLK = IOMUX_PAD(0x0410, 0x01A8, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD7_ARM_PLATFORM_TRACE15 = IOMUX_PAD(0x0410, 0x01A8, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD7_GPIO4_IO19 = IOMUX_PAD(0x0410, 0x01A8, 5, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_TXD7_SRC_BOOT_CFG15 = IOMUX_PAD(0x0410, 0x01A8, 6, 0x0000, 0, 0), + + IMX8MM_PAD_SAI1_MCLK_SAI1_MCLK = IOMUX_PAD(0x0414, 0x01AC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_MCLK_SAI5_MCLK = IOMUX_PAD(0x0414, 0x01AC, 1, 0x052C, 1, 0), + IMX8MM_PAD_SAI1_MCLK_SAI1_TX_BCLK = IOMUX_PAD(0x0414, 0x01AC, 2, 0x04C8, 2, 0), + IMX8MM_PAD_SAI1_MCLK_PDM_CLK = IOMUX_PAD(0x0414, 0x01AC, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI1_MCLK_GPIO4_IO20 = IOMUX_PAD(0x0414, 0x01AC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_RXFS_SAI2_RX_SYNC = IOMUX_PAD(0x0418, 0x01B0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXFS_SAI5_TX_SYNC = IOMUX_PAD(0x0418, 0x01B0, 1, 0x04EC, 2, 0), + IMX8MM_PAD_SAI2_RXFS_SAI5_TX_DATA1 = IOMUX_PAD(0x0418, 0x01B0, 2, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXFS_SAI2_RX_DATA1 = IOMUX_PAD(0x0418, 0x01B0, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXFS_UART1_TX = IOMUX_PAD(0x0418, 0x01B0, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXFS_UART1_RX = IOMUX_PAD(0x0418, 0x01B0, 4, 0x04F4, 2, 0), + IMX8MM_PAD_SAI2_RXFS_GPIO4_IO21 = IOMUX_PAD(0x0418, 0x01B0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_RXC_SAI2_RX_BCLK = IOMUX_PAD(0x041C, 0x01B4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXC_SAI5_TX_BCLK = IOMUX_PAD(0x041C, 0x01B4, 1, 0x04E8, 2, 0), + IMX8MM_PAD_SAI2_RXC_UART1_RX = IOMUX_PAD(0x041C, 0x01B4, 4, 0x04F4, 3, 0), + IMX8MM_PAD_SAI2_RXC_UART1_TX = IOMUX_PAD(0x041C, 0x01B4, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXC_GPIO4_IO22 = IOMUX_PAD(0x041C, 0x01B4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_RXD0_SAI2_RX_DATA0 = IOMUX_PAD(0x0420, 0x01B8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXD0_SAI5_TX_DATA0 = IOMUX_PAD(0x0420, 0x01B8, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXD0_UART1_RTS_B = IOMUX_PAD(0x0420, 0x01B8, 4, 0x04F0, 2, 0), + IMX8MM_PAD_SAI2_RXD0_UART1_CTS_B = IOMUX_PAD(0x0420, 0x01B8, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_RXD0_GPIO4_IO23 = IOMUX_PAD(0x0420, 0x01B8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_TXFS_SAI2_TX_SYNC = IOMUX_PAD(0x0424, 0x01BC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXFS_SAI5_TX_DATA1 = IOMUX_PAD(0x0424, 0x01BC, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXFS_SAI2_TX_DATA1 = IOMUX_PAD(0x0424, 0x01BC, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXFS_UART1_CTS_B = IOMUX_PAD(0x0424, 0x01BC, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXFS_UART1_RTS_B = IOMUX_PAD(0x0424, 0x01BC, 4, 0x04F0, 3, 0), + IMX8MM_PAD_SAI2_TXFS_GPIO4_IO24 = IOMUX_PAD(0x0424, 0x01BC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_TXC_SAI2_TX_BCLK = IOMUX_PAD(0x0428, 0x01C0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXC_SAI5_TX_DATA2 = IOMUX_PAD(0x0428, 0x01C0, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXC_GPIO4_IO25 = IOMUX_PAD(0x0428, 0x01C0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_TXD0_SAI2_TX_DATA0 = IOMUX_PAD(0x042C, 0x01C4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXD0_SAI5_TX_DATA3 = IOMUX_PAD(0x042C, 0x01C4, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_TXD0_GPIO4_IO26 = IOMUX_PAD(0x042C, 0x01C4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI2_MCLK_SAI2_MCLK = IOMUX_PAD(0x0430, 0x01C8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI2_MCLK_SAI5_MCLK = IOMUX_PAD(0x0430, 0x01C8, 1, 0x052C, 2, 0), + IMX8MM_PAD_SAI2_MCLK_GPIO4_IO27 = IOMUX_PAD(0x0430, 0x01C8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_RXFS_SAI3_RX_SYNC = IOMUX_PAD(0x0434, 0x01CC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXFS_GPT1_CAPTURE1 = IOMUX_PAD(0x0434, 0x01CC, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXFS_SAI5_RX_SYNC = IOMUX_PAD(0x0434, 0x01CC, 2, 0x04E4, 2, 0), + IMX8MM_PAD_SAI3_RXFS_SAI3_RX_DATA1 = IOMUX_PAD(0x0434, 0x01CC, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXFS_GPIO4_IO28 = IOMUX_PAD(0x0434, 0x01CC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_RXC_SAI3_RX_BCLK = IOMUX_PAD(0x0438, 0x01D0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXC_GPT1_CLK = IOMUX_PAD(0x0438, 0x01D0, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXC_SAI5_RX_BCLK = IOMUX_PAD(0x0438, 0x01D0, 2, 0x04D0, 2, 0), + IMX8MM_PAD_SAI3_RXC_UART2_CTS_B = IOMUX_PAD(0x0438, 0x01D0, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXC_UART2_RTS_B = IOMUX_PAD(0x0438, 0x01D0, 4, 0x04F8, 2, 0), + IMX8MM_PAD_SAI3_RXC_GPIO4_IO29 = IOMUX_PAD(0x0438, 0x01D0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_RXD_SAI3_RX_DATA0 = IOMUX_PAD(0x043C, 0x01D4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXD_GPT1_COMPARE1 = IOMUX_PAD(0x043C, 0x01D4, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXD_SAI5_RX_DATA0 = IOMUX_PAD(0x043C, 0x01D4, 2, 0x04D4, 2, 0), + IMX8MM_PAD_SAI3_RXD_UART2_RTS_B = IOMUX_PAD(0x043C, 0x01D4, 4, 0x04F8, 3, 0), + IMX8MM_PAD_SAI3_RXD_UART2_CTS_B = IOMUX_PAD(0x043C, 0x01D4, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_RXD_GPIO4_IO30 = IOMUX_PAD(0x043C, 0x01D4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_TXFS_SAI3_TX_SYNC = IOMUX_PAD(0x0440, 0x01D8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXFS_GPT1_CAPTURE2 = IOMUX_PAD(0x0440, 0x01D8, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXFS_SAI5_RX_DATA1 = IOMUX_PAD(0x0440, 0x01D8, 2, 0x04D8, 2, 0), + IMX8MM_PAD_SAI3_TXFS_SAI3_TX_DATA1 = IOMUX_PAD(0x0440, 0x01D8, 3, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXFS_UART2_RX = IOMUX_PAD(0x0440, 0x01D8, 4, 0x04FC, 2, 0), + IMX8MM_PAD_SAI3_TXFS_UART2_TX = IOMUX_PAD(0x0440, 0x01D8, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXFS_GPIO4_IO31 = IOMUX_PAD(0x0440, 0x01D8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_TXC_SAI3_TX_BCLK = IOMUX_PAD(0x0444, 0x01DC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXC_GPT1_COMPARE2 = IOMUX_PAD(0x0444, 0x01DC, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXC_SAI5_RX_DATA2 = IOMUX_PAD(0x0444, 0x01DC, 2, 0x04DC, 2, 0), + IMX8MM_PAD_SAI3_TXC_UART2_TX = IOMUX_PAD(0x0444, 0x01DC, 4, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXC_UART2_RX = IOMUX_PAD(0x0444, 0x01DC, 4, 0x04FC, 3, 0), + IMX8MM_PAD_SAI3_TXC_GPIO5_IO0 = IOMUX_PAD(0x0444, 0x01DC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_TXD_SAI3_TX_DATA0 = IOMUX_PAD(0x0448, 0x01E0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXD_GPT1_COMPARE3 = IOMUX_PAD(0x0448, 0x01E0, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_TXD_SAI5_RX_DATA3 = IOMUX_PAD(0x0448, 0x01E0, 2, 0x04E0, 2, 0), + IMX8MM_PAD_SAI3_TXD_GPIO5_IO1 = IOMUX_PAD(0x0448, 0x01E0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SAI3_MCLK_SAI3_MCLK = IOMUX_PAD(0x044C, 0x01E4, 0, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_MCLK_PWM4_OUT = IOMUX_PAD(0x044C, 0x01E4, 1, 0x0000, 0, 0), + IMX8MM_PAD_SAI3_MCLK_SAI5_MCLK = IOMUX_PAD(0x044C, 0x01E4, 2, 0x052C, 3, 0), + IMX8MM_PAD_SAI3_MCLK_GPIO5_IO2 = IOMUX_PAD(0x044C, 0x01E4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SPDIF_TX_SPDIF1_OUT = IOMUX_PAD(0x0450, 0x01E8, 0, 0x0000, 0, 0), + IMX8MM_PAD_SPDIF_TX_PWM3_OUT = IOMUX_PAD(0x0450, 0x01E8, 1, 0x0000, 0, 0), + IMX8MM_PAD_SPDIF_TX_GPIO5_IO3 = IOMUX_PAD(0x0450, 0x01E8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SPDIF_RX_SPDIF1_IN = IOMUX_PAD(0x0454, 0x01EC, 0, 0x0000, 0, 0), + IMX8MM_PAD_SPDIF_RX_PWM2_OUT = IOMUX_PAD(0x0454, 0x01EC, 1, 0x0000, 0, 0), + IMX8MM_PAD_SPDIF_RX_GPIO5_IO4 = IOMUX_PAD(0x0454, 0x01EC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_SPDIF_EXT_CLK_SPDIF1_EXT_CLK = IOMUX_PAD(0x0458, 0x01F0, 0, 0x0000, 0, 0), + IMX8MM_PAD_SPDIF_EXT_CLK_PWM1_OUT = IOMUX_PAD(0x0458, 0x01F0, 1, 0x0000, 0, 0), + IMX8MM_PAD_SPDIF_EXT_CLK_GPIO5_IO5 = IOMUX_PAD(0x0458, 0x01F0, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI1_SCLK_ECSPI1_SCLK = IOMUX_PAD(0x045C, 0x01F4, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_SCLK_UART3_RX = IOMUX_PAD(0x045C, 0x01F4, 1, 0x0504, 0, 0), + IMX8MM_PAD_ECSPI1_SCLK_UART3_TX = IOMUX_PAD(0x045C, 0x01F4, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_SCLK_GPIO5_IO6 = IOMUX_PAD(0x045C, 0x01F4, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI1_MOSI_ECSPI1_MOSI = IOMUX_PAD(0x0460, 0x01F8, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_MOSI_UART3_TX = IOMUX_PAD(0x0460, 0x01F8, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_MOSI_UART3_RX = IOMUX_PAD(0x0460, 0x01F8, 1, 0x0504, 1, 0), + IMX8MM_PAD_ECSPI1_MOSI_GPIO5_IO7 = IOMUX_PAD(0x0460, 0x01F8, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI1_MISO_ECSPI1_MISO = IOMUX_PAD(0x0464, 0x01FC, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_MISO_UART3_CTS_B = IOMUX_PAD(0x0464, 0x01FC, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_MISO_UART3_RTS_B = IOMUX_PAD(0x0464, 0x01FC, 1, 0x0500, 0, 0), + IMX8MM_PAD_ECSPI1_MISO_GPIO5_IO8 = IOMUX_PAD(0x0464, 0x01FC, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI1_SS0_ECSPI1_SS0 = IOMUX_PAD(0x0468, 0x0200, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_SS0_UART3_RTS_B = IOMUX_PAD(0x0468, 0x0200, 1, 0x0500, 1, 0), + IMX8MM_PAD_ECSPI1_SS0_UART3_CTS_B = IOMUX_PAD(0x0468, 0x0200, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI1_SS0_GPIO5_IO9 = IOMUX_PAD(0x0468, 0x0200, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI2_SCLK_ECSPI2_SCLK = IOMUX_PAD(0x046C, 0x0204, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_SCLK_UART4_RX = IOMUX_PAD(0x046C, 0x0204, 1, 0x050C, 0, 0), + IMX8MM_PAD_ECSPI2_SCLK_UART4_TX = IOMUX_PAD(0x046C, 0x0204, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_SCLK_GPIO5_IO10 = IOMUX_PAD(0x046C, 0x0204, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI2_MOSI_ECSPI2_MOSI = IOMUX_PAD(0x0470, 0x0208, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_MOSI_UART4_TX = IOMUX_PAD(0x0470, 0x0208, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_MOSI_UART4_RX = IOMUX_PAD(0x0470, 0x0208, 1, 0x050C, 1, 0), + IMX8MM_PAD_ECSPI2_MOSI_GPIO5_IO11 = IOMUX_PAD(0x0470, 0x0208, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI2_MISO_ECSPI2_MISO = IOMUX_PAD(0x0474, 0x020C, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_MISO_UART4_CTS_B = IOMUX_PAD(0x0474, 0x020C, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_MISO_UART4_RTS_B = IOMUX_PAD(0x0474, 0x020C, 1, 0x0508, 0, 0), + IMX8MM_PAD_ECSPI2_MISO_GPIO5_IO12 = IOMUX_PAD(0x0474, 0x020C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_ECSPI2_SS0_ECSPI2_SS0 = IOMUX_PAD(0x0478, 0x0210, 0, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_SS0_UART4_RTS_B = IOMUX_PAD(0x0478, 0x0210, 1, 0x0508, 1, 0), + IMX8MM_PAD_ECSPI2_SS0_UART4_CTS_B = IOMUX_PAD(0x0478, 0x0210, 1, 0x0000, 0, 0), + IMX8MM_PAD_ECSPI2_SS0_GPIO5_IO13 = IOMUX_PAD(0x0478, 0x0210, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C1_SCL_I2C1_SCL = IOMUX_PAD(0x047C, 0x0214, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + IMX8MM_PAD_I2C1_SCL_ENET1_MDC = IOMUX_PAD(0x047C, 0x0214, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C1_SCL_GPIO5_IO14 = IOMUX_PAD(0x047C, 0x0214, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C1_SDA_I2C1_SDA = IOMUX_PAD(0x0480, 0x0218, 0 | IOMUX_CONFIG_SION, 0x0000, 0, 0), + IMX8MM_PAD_I2C1_SDA_ENET1_MDIO = IOMUX_PAD(0x0480, 0x0218, 1, 0x04C0, 2, 0), + IMX8MM_PAD_I2C1_SDA_GPIO5_IO15 = IOMUX_PAD(0x0480, 0x0218, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C2_SCL_I2C2_SCL = IOMUX_PAD(0x0484, 0x021C, 0, 0x0000, 0, 0), + IMX8MM_PAD_I2C2_SCL_ENET1_1588_EVENT1_IN = IOMUX_PAD(0x0484, 0x021C, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C2_SCL_USDHC3_CD_B = IOMUX_PAD(0x0484, 0x021C, 2, 0x0544, 1, 0), + IMX8MM_PAD_I2C2_SCL_GPIO5_IO16 = IOMUX_PAD(0x0484, 0x021C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C2_SDA_I2C2_SDA = IOMUX_PAD(0x0488, 0x0220, 0, 0x0000, 0, 0), + IMX8MM_PAD_I2C2_SDA_ENET1_1588_EVENT1_OUT = IOMUX_PAD(0x0488, 0x0220, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C2_SDA_USDHC3_WP = IOMUX_PAD(0x0488, 0x0220, 2, 0x0548, 1, 0), + IMX8MM_PAD_I2C2_SDA_GPIO5_IO17 = IOMUX_PAD(0x0488, 0x0220, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C3_SCL_I2C3_SCL = IOMUX_PAD(0x048C, 0x0224, 0, 0x0000, 0, 0), + IMX8MM_PAD_I2C3_SCL_PWM4_OUT = IOMUX_PAD(0x048C, 0x0224, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C3_SCL_GPT2_CLK = IOMUX_PAD(0x048C, 0x0224, 2, 0x0000, 0, 0), + IMX8MM_PAD_I2C3_SCL_GPIO5_IO18 = IOMUX_PAD(0x048C, 0x0224, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C3_SDA_I2C3_SDA = IOMUX_PAD(0x0490, 0x0228, 0, 0x0000, 0, 0), + IMX8MM_PAD_I2C3_SDA_PWM3_OUT = IOMUX_PAD(0x0490, 0x0228, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C3_SDA_GPT3_CLK = IOMUX_PAD(0x0490, 0x0228, 2, 0x0000, 0, 0), + IMX8MM_PAD_I2C3_SDA_GPIO5_IO19 = IOMUX_PAD(0x0490, 0x0228, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C4_SCL_I2C4_SCL = IOMUX_PAD(0x0494, 0x022C, 0, 0x0000, 0, 0), + IMX8MM_PAD_I2C4_SCL_PWM2_OUT = IOMUX_PAD(0x0494, 0x022C, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C4_SCL_PCIE1_CLKREQ_B = IOMUX_PAD(0x0494, 0x022C, 2, 0x0524, 0, 0), + IMX8MM_PAD_I2C4_SCL_GPIO5_IO20 = IOMUX_PAD(0x0494, 0x022C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_I2C4_SDA_I2C4_SDA = IOMUX_PAD(0x0498, 0x0230, 0, 0x0000, 0, 0), + IMX8MM_PAD_I2C4_SDA_PWM1_OUT = IOMUX_PAD(0x0498, 0x0230, 1, 0x0000, 0, 0), + IMX8MM_PAD_I2C4_SDA_GPIO5_IO21 = IOMUX_PAD(0x0498, 0x0230, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART1_RXD_UART1_RX = IOMUX_PAD(0x049C, 0x0234, 0, 0x04F4, 0, 0), + IMX8MM_PAD_UART1_RXD_UART1_TX = IOMUX_PAD(0x049C, 0x0234, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART1_RXD_ECSPI3_SCLK = IOMUX_PAD(0x049C, 0x0234, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART1_RXD_GPIO5_IO22 = IOMUX_PAD(0x049C, 0x0234, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART1_TXD_UART1_TX = IOMUX_PAD(0x04A0, 0x0238, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART1_TXD_UART1_RX = IOMUX_PAD(0x04A0, 0x0238, 0, 0x04F4, 1, 0), + IMX8MM_PAD_UART1_TXD_ECSPI3_MOSI = IOMUX_PAD(0x04A0, 0x0238, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART1_TXD_GPIO5_IO23 = IOMUX_PAD(0x04A0, 0x0238, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART2_RXD_UART2_RX = IOMUX_PAD(0x04A4, 0x023C, 0, 0x04FC, 0, 0), + IMX8MM_PAD_UART2_RXD_UART2_TX = IOMUX_PAD(0x04A4, 0x023C, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART2_RXD_ECSPI3_MISO = IOMUX_PAD(0x04A4, 0x023C, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART2_RXD_GPIO5_IO24 = IOMUX_PAD(0x04A4, 0x023C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART2_TXD_UART2_TX = IOMUX_PAD(0x04A8, 0x0240, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART2_TXD_UART2_RX = IOMUX_PAD(0x04A8, 0x0240, 0, 0x04FC, 1, 0), + IMX8MM_PAD_UART2_TXD_ECSPI3_SS0 = IOMUX_PAD(0x04A8, 0x0240, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART2_TXD_GPIO5_IO25 = IOMUX_PAD(0x04A8, 0x0240, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART3_RXD_UART3_RX = IOMUX_PAD(0x04AC, 0x0244, 0, 0x0504, 2, 0), + IMX8MM_PAD_UART3_RXD_UART3_TX = IOMUX_PAD(0x04AC, 0x0244, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART3_RXD_UART1_CTS_B = IOMUX_PAD(0x04AC, 0x0244, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART3_RXD_UART1_RTS_B = IOMUX_PAD(0x04AC, 0x0244, 1, 0x04F0, 0, 0), + IMX8MM_PAD_UART3_RXD_USDHC3_RESET_B = IOMUX_PAD(0x04AC, 0x0244, 2, 0x0000, 0, 0), + IMX8MM_PAD_UART3_RXD_GPIO5_IO26 = IOMUX_PAD(0x04AC, 0x0244, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART3_TXD_UART3_TX = IOMUX_PAD(0x04B0, 0x0248, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART3_TXD_UART3_RX = IOMUX_PAD(0x04B0, 0x0248, 0, 0x0504, 3, 0), + IMX8MM_PAD_UART3_TXD_UART1_RTS_B = IOMUX_PAD(0x04B0, 0x0248, 1, 0x04F0, 1, 0), + IMX8MM_PAD_UART3_TXD_UART1_CTS_B = IOMUX_PAD(0x04B0, 0x0248, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART3_TXD_USDHC3_VSELECT = IOMUX_PAD(0x04B0, 0x0248, 2, 0x0000, 0, 0), + IMX8MM_PAD_UART3_TXD_GPIO5_IO27 = IOMUX_PAD(0x04B0, 0x0248, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART4_RXD_UART4_RX = IOMUX_PAD(0x04B4, 0x024C, 0, 0x050C, 2, 0), + IMX8MM_PAD_UART4_RXD_UART4_TX = IOMUX_PAD(0x04B4, 0x024C, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART4_RXD_UART2_CTS_B = IOMUX_PAD(0x04B4, 0x024C, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART4_RXD_UART2_RTS_B = IOMUX_PAD(0x04B4, 0x024C, 1, 0x04F8, 0, 0), + IMX8MM_PAD_UART4_RXD_PCIE1_CLKREQ_B = IOMUX_PAD(0x04B4, 0x024C, 2, 0x0524, 1, 0), + IMX8MM_PAD_UART4_RXD_GPIO5_IO28 = IOMUX_PAD(0x04B4, 0x024C, 5, 0x0000, 0, 0), + + IMX8MM_PAD_UART4_TXD_UART4_TX = IOMUX_PAD(0x04B8, 0x0250, 0, 0x0000, 0, 0), + IMX8MM_PAD_UART4_TXD_UART4_RX = IOMUX_PAD(0x04B8, 0x0250, 0, 0x050C, 3, 0), + IMX8MM_PAD_UART4_TXD_UART2_RTS_B = IOMUX_PAD(0x04B8, 0x0250, 1, 0x04F8, 1, 0), + IMX8MM_PAD_UART4_TXD_UART2_CTS_B = IOMUX_PAD(0x04B8, 0x0250, 1, 0x0000, 0, 0), + IMX8MM_PAD_UART4_TXD_GPIO5_IO29 = IOMUX_PAD(0x04B8, 0x0250, 5, 0x0000, 0, 0), +}; +#endif diff --git a/arch/arm/include/asm/arch-imx8m/power-domain.h b/arch/arm/include/asm/arch-imx8m/power-domain.h new file mode 100644 index 0000000..0f94945 --- /dev/null +++ b/arch/arm/include/asm/arch-imx8m/power-domain.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2017 NXP + */ + +#ifndef _ASM_ARCH_IMX8M_POWER_DOMAIN_H +#define _ASM_ARCH_IMX8M_POWER_DOMAIN_H + +struct imx8m_power_domain_platdata { + int resource_id; + int has_pd; + struct power_domain pd; +}; + +#endif diff --git a/arch/arm/include/asm/arch-mx7/clock.h b/arch/arm/include/asm/arch-mx7/clock.h index 1d07fde..984bd3f 100644 --- a/arch/arm/include/asm/arch-mx7/clock.h +++ b/arch/arm/include/asm/arch-mx7/clock.h @@ -357,7 +357,7 @@ int set_clk_nand(void); void enable_ocotp_clk(unsigned char enable); #endif void enable_usboh3_clk(unsigned char enable); -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB void hab_caam_clock_enable(unsigned char enable); #endif void mxs_set_lcdclk(uint32_t base_addr, uint32_t freq); diff --git a/arch/arm/include/asm/arch-mx7ulp/clock.h b/arch/arm/include/asm/arch-mx7ulp/clock.h index bf69785..eb02a20 100644 --- a/arch/arm/include/asm/arch-mx7ulp/clock.h +++ b/arch/arm/include/asm/arch-mx7ulp/clock.h @@ -26,7 +26,7 @@ enum mxc_clock { u32 mxc_get_clock(enum mxc_clock clk); u32 get_lpuart_clk(void); -#ifdef CONFIG_SYS_LPI2C_IMX +#ifdef CONFIG_SYS_I2C_IMX_LPI2C int enable_i2c_clk(unsigned char enable, unsigned i2c_num); u32 imx_get_i2cclk(unsigned i2c_num); #endif diff --git a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h index 63b02de..3c82e99 100644 --- a/arch/arm/include/asm/arch-mx7ulp/imx-regs.h +++ b/arch/arm/include/asm/arch-mx7ulp/imx-regs.h @@ -10,6 +10,8 @@ #define ARCH_MXC +#define ROM_SW_INFO_ADDR 0x000001E8 + #define CAAM_SEC_SRAM_BASE (0x26000000) #define CAAM_SEC_SRAM_SIZE (SZ_32K) #define CAAM_SEC_SRAM_END (CAAM_SEC_SRAM_BASE + CAAM_SEC_SRAM_SIZE - 1) @@ -56,6 +58,7 @@ #define USDHC1_AIPS2_SLOT (56) #define RGPIO2P0_AIPS0_SLOT (15) #define RGPIO2P1_AIPS2_SLOT (15) +#define SNVS_AIPS2_SLOT (35) #define IOMUXC0_AIPS0_SLOT (61) #define OCOTP_CTRL_AIPS1_SLOT (38) #define OCOTP_CTRL_PCC1_SLOT (38) @@ -175,6 +178,9 @@ #define USDHC0_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * USDHC0_AIPS2_SLOT))) #define USDHC1_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * USDHC1_AIPS2_SLOT))) +#define SNVS_BASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * SNVS_AIPS2_SLOT))) +#define SNVS_LP_LPCR (SNVS_BASE + 0x38) + #define RGPIO2P0_RBASE ((AIPS0_BASE + (AIPS0_SLOT_SIZE * RGPIO2P0_AIPS0_SLOT))) #define RGPIO2P1_RBASE ((AIPS2_BASE + (AIPS2_SLOT_SIZE * RGPIO2P1_AIPS2_SLOT))) @@ -937,6 +943,9 @@ #define MMDC_MPWRDQBY3DL_WR_DQ25_DEL_MASK ((0x3f << MMDC_MPWRDQBY3DL_WR_DQ25_DEL)) #define MMDC_MPWRDQBY3DL_WR_DQ24_DEL_MASK ((0x3f << MMDC_MPWRDQBY3DL_WR_DQ24_DEL)) +#define SNVS_LPCR_DPEN (0x20) +#define SNVS_LPCR_SRTC_ENV (0x1) + #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) #include <asm/types.h> @@ -1112,6 +1121,17 @@ struct usbphy_regs { u32 usb1_pfda_ctrl1_tog; /* 0x14c */ }; +struct bootrom_sw_info { + u8 reserved_1; + u8 boot_dev_instance; + u8 boot_dev_type; + u8 reserved_2; + u32 core_freq; + u32 axi_freq; + u32 ddr_freq; + u32 rom_tick_freq; + u32 reserved_3[3]; +}; #define is_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20))) #define disconnect_from_pc(void) writel(0x0, USBOTG0_RBASE + 0x140) diff --git a/arch/arm/include/asm/arch-mx7ulp/pcc.h b/arch/arm/include/asm/arch-mx7ulp/pcc.h index 67a0936..dee3cfc 100644 --- a/arch/arm/include/asm/arch-mx7ulp/pcc.h +++ b/arch/arm/include/asm/arch-mx7ulp/pcc.h @@ -289,10 +289,10 @@ enum pcc3_entry { #define PCC_INUSE_MASK (0x1 << PCC_INUSE_OFFSET) #define PCC_PCS_OFFSET 24 #define PCC_PCS_MASK (0x7 << PCC_PCS_OFFSET) -#define PCC_FRAC_OFFSET 4 +#define PCC_FRAC_OFFSET 3 #define PCC_FRAC_MASK (0x1 << PCC_FRAC_OFFSET) #define PCC_PCD_OFFSET 0 -#define PCC_PCD_MASK (0xf << PCC_PCD_OFFSET) +#define PCC_PCD_MASK (0x7 << PCC_PCD_OFFSET) enum pcc_clksrc_type { diff --git a/arch/arm/include/asm/arch-mx7ulp/scg.h b/arch/arm/include/asm/arch-mx7ulp/scg.h index f1fae01..531d8f3 100644 --- a/arch/arm/include/asm/arch-mx7ulp/scg.h +++ b/arch/arm/include/asm/arch-mx7ulp/scg.h @@ -337,5 +337,6 @@ void scg_a7_nicclk_init(void); void scg_a7_sys_clk_sel(enum scg_sys_src clk); void scg_a7_info(void); void scg_a7_soscdiv_init(void); +void scg_a7_init_core_clk(void); #endif diff --git a/arch/arm/include/asm/arch-mx7ulp/sys_proto.h b/arch/arm/include/asm/arch-mx7ulp/sys_proto.h index 6ecde7d..0e4c8ad 100644 --- a/arch/arm/include/asm/arch-mx7ulp/sys_proto.h +++ b/arch/arm/include/asm/arch-mx7ulp/sys_proto.h @@ -17,4 +17,5 @@ enum bt_mode { SINGLE_BOOT /* LP_BT = 0, DUAL_BT = 0 */ }; +enum boot_device get_boot_device(void); #endif diff --git a/arch/arm/include/asm/mach-imx/hab.h b/arch/arm/include/asm/mach-imx/hab.h index 95df884..b905d84 100644 --- a/arch/arm/include/asm/mach-imx/hab.h +++ b/arch/arm/include/asm/mach-imx/hab.h @@ -130,7 +130,7 @@ struct imx_sec_config_fuse_t { int word; }; -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_IMX_HAB) extern struct imx_sec_config_fuse_t const imx_sec_config_fuse; #endif diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h index b899a4f..720e8f7 100644 --- a/arch/arm/include/asm/mach-imx/iomux-v3.h +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h @@ -104,7 +104,11 @@ typedef u64 iomux_v3_cfg_t; #define PAD_CTL_ODE (0x1 << 5) #define PAD_CTL_PUE (0x1 << 6) #define PAD_CTL_HYS (0x1 << 7) +#ifdef CONFIG_IMX8MM +#define PAD_CTL_PE (0x1 << 8) +#else #define PAD_CTL_LVTTL (0x1 << 8) +#endif #elif defined CONFIG_MX7 diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index 4925dd7..aa66fdc 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -38,11 +38,21 @@ #define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO)) #define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL)) #define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL)) +#define is_mx6ulz() (is_cpu_type(MXC_CPU_MX6ULZ)) #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL)) #define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP)) #define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ)) +#define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM)) +#define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM) || is_cpu_type(MXC_CPU_IMX8MML) ||\ + is_cpu_type(MXC_CPU_IMX8MMD) || is_cpu_type(MXC_CPU_IMX8MMDL) || \ + is_cpu_type(MXC_CPU_IMX8MMS) || is_cpu_type(MXC_CPU_IMX8MMSL)) +#define is_imx8mml() (is_cpu_type(MXC_CPU_IMX8MML)) +#define is_imx8mmd() (is_cpu_type(MXC_CPU_IMX8MMD)) +#define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL)) +#define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS)) +#define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL)) #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP)) #ifdef CONFIG_MX6 diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c3b21b7..8552400 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -43,9 +43,14 @@ config AT91SAM9X5 bool select CPU_ARM926EJS +config SAM9X60 + bool + select CPU_ARM926EJS + config SAMA5D2 bool select CPU_V7A + select ATMEL_SFR config SAMA5D3 bool @@ -54,6 +59,7 @@ config SAMA5D3 config SAMA5D4 bool select CPU_V7A + select ATMEL_SFR choice prompt "Atmel AT91 board select" @@ -154,6 +160,12 @@ config TARGET_GARDENA_SMART_GATEWAY_AT91SAM select BOARD_LATE_INIT select SUPPORT_SPL +config TARGET_SAM9X60EK + bool "SAM9X60-EK board" + select SAM9X60 + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + config TARGET_SAMA5D2_PTC_EK bool "SAMA5D2 PTC EK board" select BOARD_EARLY_INIT_F @@ -173,6 +185,7 @@ config TARGET_SAMA5D27_SOM1_EK select BOARD_LATE_INIT select CPU_V7A select SUPPORT_SPL + select ATMEL_SFR help The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package), a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM @@ -180,9 +193,24 @@ config TARGET_SAMA5D27_SOM1_EK processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM in a single package. +config TARGET_SAMA5D27_WLSOM1_EK + bool "SAMA5D27 WLSOM1 EK board" + select SAMA5D2 + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + select CPU_V7A + select SUPPORT_SPL + help + The SAMA5D27 WLSOM1 embeds SAMA5D2 SiP (System in Package), + a 64Mbit QSPI flash with Mac-address, KSZ8081 Phy. A wireless + module providing bluetooth and wifi is also embedded. + The SAMA5D2 SiP integrates the ARM Cortex-A5 + processor-based SAMA5D2 MPU with 2 Gbit LPDDR2-SDRAM + in a single package. + config TARGET_SAMA5D2_ICP bool "SAMA5D2 Industrial Connectivity Platform (ICP)" - select CPU_V7A + select SAMA5D2 select SUPPORT_SPL select BOARD_EARLY_INIT_F select BOARD_LATE_INIT @@ -275,9 +303,14 @@ config TARGET_WB50N select BOARD_LATE_INIT select CPU_V7A select SUPPORT_SPL + select ATMEL_SFR endchoice +config ATMEL_SFR + bool + default n + config SYS_SOC default "at91" @@ -289,9 +322,11 @@ source "board/atmel/at91sam9m10g45ek/Kconfig" source "board/atmel/at91sam9n12ek/Kconfig" source "board/atmel/at91sam9rlek/Kconfig" source "board/atmel/at91sam9x5ek/Kconfig" +source "board/atmel/sam9x60ek/Kconfig" source "board/atmel/sama5d2_ptc_ek/Kconfig" source "board/atmel/sama5d2_xplained/Kconfig" source "board/atmel/sama5d27_som1_ek/Kconfig" +source "board/atmel/sama5d27_wlsom1_ek/Kconfig" source "board/atmel/sama5d2_icp/Kconfig" source "board/atmel/sama5d3_xplained/Kconfig" source "board/atmel/sama5d3xek/Kconfig" diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 045ac88..cbd0ed6 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -7,10 +7,11 @@ obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o obj-$(CONFIG_AT91SAM9M10G45) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9N12) += mpddrc.o spl_at91.o obj-$(CONFIG_AT91SAM9X5) += mpddrc.o spl_at91.o -obj-$(CONFIG_SAMA5D2) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o atmel_sfr.o +obj-$(CONFIG_SAMA5D2) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o obj-$(CONFIG_SAMA5D3) += bootparams_atmel.o mpddrc.o spl_atmel.o -obj-$(CONFIG_SAMA5D4) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o atmel_sfr.o +obj-$(CONFIG_SAMA5D4) += bootparams_atmel.o mpddrc.o spl_atmel.o matrix.o obj-y += spl.o +obj-$(CONFIG_ATMEL_SFR) += atmel_sfr.o endif obj-y += clock.o diff --git a/arch/arm/mach-at91/arm926ejs/Makefile b/arch/arm/mach-at91/arm926ejs/Makefile index 6b0b289..8de6a2f 100644 --- a/arch/arm/mach-at91/arm926ejs/Makefile +++ b/arch/arm/mach-at91/arm926ejs/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o obj-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o obj-$(CONFIG_AT91SAM9N12) += at91sam9n12_devices.o obj-$(CONFIG_AT91SAM9X5) += at91sam9x5_devices.o +obj-$(CONFIG_SAM9X60) += sam9x60_devices.o obj-$(CONFIG_AT91_EFLASH) += eflash.o obj-$(CONFIG_AT91_LED) += led.o obj-y += clock.o diff --git a/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c new file mode 100644 index 0000000..d463bbc --- /dev/null +++ b/arch/arm/mach-at91/arm926ejs/sam9x60_devices.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + */ + +#include <common.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/io.h> + +unsigned int get_chip_id(void) +{ + /* The 0x40 is the offset of cidr in DBGU */ + return readl(ATMEL_BASE_DBGU + 0x40) & ~ARCH_ID_VERSION_MASK; +} + +unsigned int get_extension_chip_id(void) +{ + /* The 0x44 is the offset of exid in DBGU */ + return readl(ATMEL_BASE_DBGU + 0x44); +} + +unsigned int has_emac1(void) +{ + return cpu_is_sam9x60(); +} + +unsigned int has_emac0(void) +{ + return cpu_is_sam9x60(); +} + +unsigned int has_lcdc(void) +{ + return cpu_is_sam9x60(); +} + +char *get_cpu_name(void) +{ + unsigned int extension_id = get_extension_chip_id(); + + if (cpu_is_sam9x60()) { + switch (extension_id) { + case ARCH_EXID_SAM9X60: + return "SAM9X60"; + default: + return "Unknown CPU type"; + } + } else { + return "Unknown CPU type"; + } +} + +void at91_seriald_hw_init(void) +{ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 1); /* DRXD */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */ + + at91_periph_clk_enable(ATMEL_ID_DBGU); +} + +void at91_mci_hw_init(void) +{ + /* Initialize the SDMMC0 */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 1); /* CLK */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 1); /* CMD */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 1); /* DAT0 */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 1); /* DAT1 */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 1); /* DAT2 */ + at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 1); /* DAT3 */ + + at91_periph_clk_enable(ATMEL_ID_SDMMC0); +} + +#ifdef CONFIG_MACB +void at91_macb_hw_init(void) +{ + if (has_emac0()) { + /* Enable EMAC0 clock */ + at91_periph_clk_enable(ATMEL_ID_EMAC0); + /* EMAC0 pins setup */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 4, 0); /* ETXCK */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 3, 0); /* ERXDV */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 0, 0); /* ERX0 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 1, 0); /* ERX1 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 2, 0); /* ERXER */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 7, 0); /* ETXEN */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 9, 0); /* ETX0 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 10, 0); /* ETX1 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 5, 0); /* EMDIO */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 6, 0); /* EMDC */ + } + + if (has_emac1()) { + /* Enable EMAC1 clock */ + at91_periph_clk_enable(ATMEL_ID_EMAC1); + /* EMAC1 pins setup */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 29, 0); /* ETXCK */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 28, 0); /* ECRSDV */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 20, 0); /* ERXO */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 21, 0); /* ERX1 */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 16, 0); /* ERXER */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 27, 0); /* ETXEN */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 18, 0); /* ETX0 */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 19, 0); /* ETX1 */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 31, 0); /* EMDIO */ + at91_pio3_set_b_periph(AT91_PIO_PORTC, 30, 0); /* EMDC */ + } + +#ifndef CONFIG_RMII + /* Only emac0 support MII */ + if (has_emac0()) { + at91_pio3_set_a_periph(AT91_PIO_PORTB, 16, 0); /* ECRS */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 17, 0); /* ECOL */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 13, 0); /* ERX2 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 14, 0); /* ERX3 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 15, 0); /* ERXCK */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 11, 0); /* ETX2 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 12, 0); /* ETX3 */ + at91_pio3_set_a_periph(AT91_PIO_PORTB, 8, 0); /* ETXER */ + } +#endif +} +#endif diff --git a/arch/arm/mach-at91/armv7/sama5d2_devices.c b/arch/arm/mach-at91/armv7/sama5d2_devices.c index 59a0c44..9e9d026 100644 --- a/arch/arm/mach-at91/armv7/sama5d2_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d2_devices.c @@ -57,8 +57,16 @@ char *get_cpu_name(void) return "SAMA5D27 512M bits DDR2 SDRAM"; case ARCH_EXID_SAMA5D27C_D1G: return "SAMA5D27 1G bits DDR2 SDRAM"; + case ARCH_EXID_SAMA5D27C_LD1G: + return "SAMA5D27 1G bits LPDDR2 SDRAM"; + case ARCH_EXID_SAMA5D27C_LD2G: + return "SAMA5D27 2G bits LPDDR2 SDRAM"; case ARCH_EXID_SAMA5D28C_D1G: return "SAMA5D28 1G bits DDR2 SDRAM"; + case ARCH_EXID_SAMA5D28C_LD1G: + return "SAMA5D28 1G bits LPDDR2 SDRAM"; + case ARCH_EXID_SAMA5D28C_LD2G: + return "SAMA5D28 2G bits LPDDR2 SDRAM"; } } diff --git a/arch/arm/mach-at91/armv7/sama5d4_devices.c b/arch/arm/mach-at91/armv7/sama5d4_devices.c index 5c693df..e68ae99 100644 --- a/arch/arm/mach-at91/armv7/sama5d4_devices.c +++ b/arch/arm/mach-at91/armv7/sama5d4_devices.c @@ -8,7 +8,7 @@ #include <asm/io.h> #include <asm/arch/at91_common.h> #include <asm/arch/clk.h> -#include <asm/arch/sama5_sfr.h> +#include <asm/arch/at91_sfr.h> #include <asm/arch/sama5d4.h> char *get_cpu_name() diff --git a/arch/arm/mach-at91/atmel_sfr.c b/arch/arm/mach-at91/atmel_sfr.c index 2225115..b142224 100644 --- a/arch/arm/mach-at91/atmel_sfr.c +++ b/arch/arm/mach-at91/atmel_sfr.c @@ -7,8 +7,9 @@ #include <common.h> #include <asm/hardware.h> #include <asm/io.h> -#include <asm/arch/sama5_sfr.h> +#include <asm/arch/at91_sfr.h> +#if defined(CONFIG_SAMA5D2) || defined(CONFIG_SAMA5D4) void redirect_int_from_saic_to_aic(void) { struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; @@ -26,3 +27,16 @@ void configure_2nd_sram_as_l2_cache(void) writel(1, &sfr->l2cc_hramc); } +#endif + +void configure_ddrcfg_input_buffers(bool open) +{ + struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; + + if (open) + writel(ATMEL_SFR_DDRCFG_FDQIEN | ATMEL_SFR_DDRCFG_FDQSIEN, + &sfr->ddrcfg); + else + writel(0, &sfr->ddrcfg); +} + diff --git a/arch/arm/mach-at91/include/mach/at91_common.h b/arch/arm/mach-at91/include/mach/at91_common.h index df7d0e7..e929b5e 100644 --- a/arch/arm/mach-at91/include/mach/at91_common.h +++ b/arch/arm/mach-at91/include/mach/at91_common.h @@ -35,6 +35,9 @@ void at91_disable_wdt(void); void matrix_init(void); void redirect_int_from_saic_to_aic(void); void configure_2nd_sram_as_l2_cache(void); +#ifdef CONFIG_ATMEL_SFR +void configure_ddrcfg_input_buffers(bool open); +#endif int at91_set_ethaddr(int offset); int at91_video_show_board_info(void); diff --git a/arch/arm/mach-at91/include/mach/sama5_sfr.h b/arch/arm/mach-at91/include/mach/at91_sfr.h index f9c412f..0300c33 100644 --- a/arch/arm/mach-at91/include/mach/sama5_sfr.h +++ b/arch/arm/mach-at91/include/mach/at91_sfr.h @@ -6,12 +6,15 @@ * Bo Shen <voice.shen@atmel.com> */ -#ifndef __SAMA5_SFR_H -#define __SAMA5_SFR_H +#ifndef __AT91_SFR_H +#define __AT91_SFR_H struct atmel_sfr { u32 reserved1; /* 0x00 */ - u32 ddrcfg; /* 0x04: DDR Configuration Register */ + union { + u32 ddrcfg; /* 0x04: DDR Configuration Register */ + u32 ebicsa; /* 0x04: EBI Chip Select Register */ + }; u32 reserved2; /* 0x08 */ u32 reserved3; /* 0x0c */ u32 ohciicr; /* 0x10: OHCI Interrupt Configuration Register */ @@ -28,7 +31,16 @@ struct atmel_sfr { }; /* Register Mapping*/ +#define AT91_SFR_DDRCFG 0x04 /* DDR Configuration Register */ +#define AT91_SFR_CCFG_EBICSA 0x04 /* EBI Chip Select Register */ +/* 0x08 ~ 0x0c: Reserved */ +#define AT91_SFR_OHCIICR 0x10 /* OHCI INT Configuration Register */ +#define AT91_SFR_OHCIISR 0x14 /* OHCI INT Status Register */ #define AT91_SFR_UTMICKTRIM 0x30 /* UTMI Clock Trimming Register */ +#define AT91_SFR_UTMISWAP 0x3c /* UTMI DP/DM Pin Swapping Register */ +#define AT91_SFR_LS 0x7c /* Light Sleep Register */ +#define AT91_SFR_I2SCLKSEL 0x90 /* I2SC Register */ +#define AT91_SFR_WPMR 0xe4 /* Write Protection Mode Register */ /* Bit field in DDRCFG */ #define ATMEL_SFR_DDRCFG_FDQIEN 0x00010000 @@ -58,9 +70,39 @@ struct atmel_sfr { #define AT91_SFR_EBICFG_SCH1_OFF (0x0 << 12) #define AT91_SFR_EBICFG_SCH1_ON (0x1 << 12) -#define AT91_UTMICKTRIM_FREQ GENMASK(1, 0) - /* Bit field in AICREDIR */ #define ATMEL_SFR_AICREDIR_NSAIC 0x00000001 +/* Bit field in DDRCFG */ +#define ATMEL_SFR_DDRCFG_FDQIEN 0x00010000 +#define ATMEL_SFR_DDRCFG_FDQSIEN 0x00020000 + +#define AT91_SFR_CCFG_EBI_CSA(cs, val) ((val) << (cs)) +#define AT91_SFR_CCFG_EBI_DBPUC BIT(8) +#define AT91_SFR_CCFG_EBI_DBPDC BIT(9) +#define AT91_SFR_CCFG_EBI_DRIVE_SAM9X60 BIT(16) +#define AT91_SFR_CCFG_EBI_DRIVE BIT(17) +#define AT91_SFR_CCFG_DQIEN_F BIT(20) +#define AT91_SFR_CCFG_NFD0_ON_D16 BIT(24) +#define AT91_SFR_CCFG_DDR_MP_EN BIT(25) + +#define AT91_SFR_OHCIICR_RES(x) BIT(x) +#define AT91_SFR_OHCIICR_ARIE BIT(4) +#define AT91_SFR_OHCIICR_APPSTART BIT(5) +#define AT91_SFR_OHCIICR_USB_SUSP(x) BIT(8 + (x)) +#define AT91_SFR_OHCIICR_UDPPUDIS BIT(23) +#define AT91_OHCIICR_USB_SUSPEND GENMASK(10, 8) + +#define AT91_SFR_OHCIISR_RIS(x) BIT(x) + +#define AT91_UTMICKTRIM_FREQ GENMASK(1, 0) + +#define AT91_SFR_UTMISWAP_PORT(x) BIT(x) + +#define AT91_SFR_LS_VALUE(x) BIT(x) +#define AT91_SFR_LS_MEM_POWER_GATING_ULP1_EN BIT(16) + +#define AT91_SFR_WPMR_WPEN BIT(0) +#define AT91_SFR_WPMR_WPKEY_MASK GENMASK(31, 8) + #endif diff --git a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h index 45a76a6..40ec87e 100644 --- a/arch/arm/mach-at91/include/mach/atmel_mpddrc.h +++ b/arch/arm/mach-at91/include/mach/atmel_mpddrc.h @@ -18,6 +18,9 @@ struct atmel_mpddrc_config { u32 tpr1; u32 tpr2; u32 md; + u32 lpddr23_lpr; + u32 cal_mr4; + u32 tim_cal; }; /* @@ -61,6 +64,10 @@ int ddr2_init(const unsigned int base, const unsigned int ram_address, const struct atmel_mpddrc_config *mpddr_value); +int lpddr2_init(const unsigned int base, + const unsigned int ram_address, + const struct atmel_mpddrc_config *mpddr_value); + int ddr3_init(const unsigned int base, const unsigned int ram_address, const struct atmel_mpddrc_config *mpddr_value); @@ -74,6 +81,11 @@ int ddr3_init(const unsigned int base, #define ATMEL_MPDDRC_MR_MODE_EXT_LMR_CMD 0x5 #define ATMEL_MPDDRC_MR_MODE_DEEP_CMD 0x6 #define ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD 0x7 +#define ATMEL_MPDDRC_MR_MRS(v) (((v) & 0xFF) << 0x8) + +/* Bit field in refresh timer register */ +#define ATMEL_MPDDRC_RTR_ADJ_REF (0x1 << 16) +#define ATMEL_MPDDRC_RTR_MR4VALUE(v) (((v) & 0x7) << 20) /* Bit field in configuration register */ #define ATMEL_MPDDRC_CR_NC_MASK 0x3 @@ -157,6 +169,7 @@ int ddr3_init(const unsigned int base, #define ATMEL_MPDDRC_MD_DDR3_SDRAM 0x4 #define ATMEL_MPDDRC_MD_LPDDR3_SDRAM 0x5 #define ATMEL_MPDDRC_MD_DDR2_SDRAM 0x6 +#define ATMEL_MPDDRC_MD_LPDDR2_SDRAM 0x7 #define ATMEL_MPDDRC_MD_DBW_MASK (0x1 << 4) #define ATMEL_MPDDRC_MD_DBW_32_BITS (0x0 << 4) #define ATMEL_MPDDRC_MD_DBW_16_BITS (0x1 << 4) @@ -206,4 +219,14 @@ int ddr3_init(const unsigned int base, #define ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_TWO_CYCLE 0x2 #define ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_THREE_CYCLE 0x3 +/* Bit field in LPDDR2 - LPDDR3 Low Power Register */ +#define ATMEL_MPDDRC_LPDDR23_LPR_DS(x) (((x) & 0xf) << 24) + +/* Bit field in CAL_MR4 Calibration and MR4 Register */ +#define ATMEL_MPDDRC_CAL_MR4_COUNT_CAL(x) (((x) & 0xffff) << 0) +#define ATMEL_MPDDRC_CAL_MR4_MR4R(x) (((x) & 0xffff) << 16) + +/* Bit field in TIM_CAL Timing Calibration Register */ +#define ATMEL_MPDDRC_CALR_ZQCS(x) (((x) & 0xff) << 0) + #endif diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 3a7752b..88acca8 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -22,6 +22,8 @@ # include <asm/arch/at91sam9g45.h> #elif defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5) # include <asm/arch/at91sam9x5.h> +#elif defined(CONFIG_SAM9X60) +# include <asm/arch/sam9x60.h> #elif defined(CONFIG_SAMA5D2) # include <asm/arch/sama5d2.h> #elif defined(CONFIG_SAMA5D3) diff --git a/arch/arm/mach-at91/include/mach/sam9x60.h b/arch/arm/mach-at91/include/mach/sam9x60.h new file mode 100644 index 0000000..0f00a9a --- /dev/null +++ b/arch/arm/mach-at91/include/mach/sam9x60.h @@ -0,0 +1,169 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Chip-specific header file for the SAM9X60 SoC. + * + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + */ + +#ifndef __SAM9X60_H__ +#define __SAM9X60_H__ + +/* + * Peripheral identifiers/interrupts. + */ +#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller */ +#define ATMEL_ID_SYS 1 /* System Controller Interrupt */ +#define ATMEL_ID_PIOA 2 /* Parallel I/O Controller A */ +#define ATMEL_ID_PIOB 3 /* Parallel I/O Controller B */ +#define ATMEL_ID_PIOC 4 /* Parallel I/O Controller C */ +#define ATMEL_ID_FLEXCOM0 5 /* FLEXCOM 0 */ +#define ATMEL_ID_FLEXCOM1 6 /* FLEXCOM 1 */ +#define ATMEL_ID_FLEXCOM2 7 /* FLEXCOM 2 */ +#define ATMEL_ID_FLEXCOM3 8 /* FLEXCOM 3 */ +#define ATMEL_ID_FLEXCOM6 9 /* FLEXCOM 6 */ +#define ATMEL_ID_FLEXCOM7 10 /* FLEXCOM 7 */ +#define ATMEL_ID_FLEXCOM8 11 /* FLEXCOM 8 */ +#define ATMEL_ID_SDMMC0 12 /* SDMMC 0 */ +#define ATMEL_ID_FLEXCOM4 13 /* FLEXCOM 4 */ +#define ATMEL_ID_FLEXCOM5 14 /* FLEXCOM 5 */ +#define ATMEL_ID_FLEXCOM9 15 /* FLEXCOM 9 */ +#define ATMEL_ID_FLEXCOM10 16 /* FLEXCOM 10 */ +#define ATMEL_ID_TC01 17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */ +#define ATMEL_ID_PWM 18 /* Pulse Width Modulation Controller */ +#define ATMEL_ID_ADC 19 /* ADC Controller */ +#define ATMEL_ID_XDMAC0 20 /* XDMA Controller 0 */ +#define ATMEL_ID_MATRIX 21 /* BUS Matrix */ +#define ATMEL_ID_UHPHS 22 /* USB Host High Speed */ +#define ATMEL_ID_UDPHS 23 /* USB Device High Speed */ +#define ATMEL_ID_EMAC0 24 /* Ethernet MAC 0 */ +#define ATMEL_ID_LCDC 25 /* LCD Controller */ +#define ATMEL_ID_SDMMC1 26 /* SDMMC 1 */ +#define ATMEL_ID_EMAC1 27 /* Ethernet MAC `1 */ +#define ATMEL_ID_SSC 28 /* Synchronous Serial Controller */ +#define ATMEL_ID_IRQ 31 /* Advanced Interrupt Controller */ +#define ATMEL_ID_TRNG 38 /* True Random Number Generator */ +#define ATMEL_ID_PIOD 44 /* Parallel I/O Controller D */ +#define ATMEL_ID_DBGU 47 /* Debug unit */ + +/* + * User Peripheral physical base addresses. + */ +#define ATMEL_BASE_FLEXCOM4 0xf0000000 +#define ATMEL_BASE_FLEXCOM5 0xf0004000 +#define ATMEL_BASE_XDMA0 0xf0008000 +#define ATMEL_BASE_SSC 0xf0010000 +#define ATMEL_BASE_QSPI 0xf0014000 +#define ATMEL_BASE_CAN0 0xf8000000 +#define ATMEL_BASE_CAN1 0xf8004000 +#define ATMEL_BASE_TC0 0xf8008000 +#define ATMEL_BASE_TC1 0xf8008040 +#define ATMEL_BASE_TC2 0xf8008080 +#define ATMEL_BASE_TC3 0xf800c000 +#define ATMEL_BASE_TC4 0xf800c040 +#define ATMEL_BASE_TC5 0xf800c080 +#define ATMEL_BASE_FLEXCOM6 0xf8010000 +#define ATMEL_BASE_FLEXCOM7 0xf8014000 +#define ATMEL_BASE_FLEXCOM8 0xf8018000 +#define ATMEL_BASE_FLEXCOM0 0xf801c000 +#define ATMEL_BASE_FLEXCOM1 0xf8020000 +#define ATMEL_BASE_FLEXCOM2 0xf8024000 +#define ATMEL_BASE_FLEXCOM3 0xf8028000 +#define ATMEL_BASE_EMAC0 0xf802c000 +#define ATMEL_BASE_EMAC1 0xf8030000 +#define ATMEL_BASE_PWM 0xf8034000 +#define ATMEL_BASE_LCDC 0xf8038000 +#define ATMEL_BASE_UDPHS 0xf803c000 +#define ATMEL_BASE_FLEXCOM9 0xf8040000 +#define ATMEL_BASE_FLEXCOM10 0xf8044000 +#define ATMEL_BASE_ISI 0xf8048000 +#define ATMEL_BASE_ADC 0xf804c000 +#define ATMEL_BASE_SFR 0xf8050000 +#define ATMEL_BASE_SYS 0xffffc000 + +/* + * System Peripherals + */ +#define ATMEL_BASE_MATRIX 0xffffde00 +#define ATMEL_BASE_PMECC 0xffffe000 +#define ATMEL_BASE_PMERRLOC 0xffffe600 +#define ATMEL_BASE_MPDDRC 0xffffe800 +#define ATMEL_BASE_SMC 0xffffea00 +#define ATMEL_BASE_SDRAMC 0xffffec00 +#define ATMEL_BASE_AIC 0xfffff100 +#define ATMEL_BASE_DBGU 0xfffff200 +#define ATMEL_BASE_PIOA 0xfffff400 +#define ATMEL_BASE_PIOB 0xfffff600 +#define ATMEL_BASE_PIOC 0xfffff800 +#define ATMEL_BASE_PIOD 0xfffffa00 +#define ATMEL_BASE_PMC 0xfffffc00 +#define ATMEL_BASE_RSTC 0xfffffe00 +#define ATMEL_BASE_SHDWC 0xfffffe10 +#define ATMEL_BASE_PIT 0xfffffe40 +#define ATMEL_BASE_GPBR 0xfffffe60 +#define ATMEL_BASE_RTC 0xfffffea8 +#define ATMEL_BASE_WDT 0xffffff80 + +/* + * Internal Memory. + */ +#define ATMEL_BASE_ROM 0x00100000 /* Internal ROM base address */ +#define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */ +#define ATMEL_BASE_UDPHS_FIFO 0x00500000 /* USB Device HS controller */ +#define ATMEL_BASE_OHCI 0x00600000 /* USB Host controller (OHCI) */ +#define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */ + +/* + * External memory + */ +#define ATMEL_BASE_CS0 0x10000000 +#define ATMEL_BASE_CS1 0x20000000 +#define ATMEL_BASE_CS2 0x30000000 +#define ATMEL_BASE_CS3 0x40000000 +#define ATMEL_BASE_CS4 0x50000000 +#define ATMEL_BASE_CS5 0x60000000 +#define ATMEL_BASE_SDMMC0 0x80000000 +#define ATMEL_BASE_SDMMC1 0x90000000 + +/* 9x60 series chip id definitions */ +#define ARCH_ID_SAM9X60 0x819b35a0 +#define ARCH_ID_VERSION_MASK 0x1f +#define ARCH_EXID_SAM9X60 0x00000000 + +#define cpu_is_sam9x60() (get_chip_id() == ARCH_ID_SAM9X60) + +/* + * Cpu Name + */ +#define ATMEL_CPU_NAME get_cpu_name() + +/* Timer */ +#define CONFIG_SYS_TIMER_COUNTER 0xfffffe4c + +/* + * Other misc defines + */ +#define ATMEL_PIO_PORTS 4 +#define CPU_HAS_PCR +#define CPU_NO_PLLB +#define PLL_ID_PLLA 0 +#define PLL_ID_UPLL 1 + +/* + * PMECC table in ROM + */ +#define ATMEL_PMECC_INDEX_OFFSET_512 0x8000 +#define ATMEL_PMECC_INDEX_OFFSET_1024 0x10000 + +/* + * SAM9X60 specific prototypes + */ +#ifndef __ASSEMBLY__ +unsigned int get_chip_id(void); +unsigned int get_extension_chip_id(void); +unsigned int has_emac1(void); +unsigned int has_emac0(void); +unsigned int has_lcdc(void); +char *get_cpu_name(void); +#endif + +#endif diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h index c7d9bb5..d1b2e01 100644 --- a/arch/arm/mach-at91/include/mach/sama5d2.h +++ b/arch/arm/mach-at91/include/mach/sama5d2.h @@ -220,7 +220,11 @@ #define ARCH_EXID_SAMA5D225C_D1M 0x00000053 #define ARCH_EXID_SAMA5D27C_D5M 0x00000032 #define ARCH_EXID_SAMA5D27C_D1G 0x00000033 +#define ARCH_EXID_SAMA5D27C_LD1G 0x00000061 +#define ARCH_EXID_SAMA5D27C_LD2G 0x00000062 #define ARCH_EXID_SAMA5D28C_D1G 0x00000013 +#define ARCH_EXID_SAMA5D28C_LD1G 0x00000071 +#define ARCH_EXID_SAMA5D28C_LD2G 0x00000072 /* Checked if defined in ethernet driver macb */ #define cpu_is_sama5d2 _cpu_is_sama5d2 diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c index 81ccd6a..3df0ea7 100644 --- a/arch/arm/mach-at91/mpddrc.c +++ b/arch/arm/mach-at91/mpddrc.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/atmel_mpddrc.h> +#include <asm/arch/at91_common.h> #define SAMA5D3_MPDDRC_VERSION 0x140 @@ -18,6 +19,7 @@ static inline void atmel_mpddr_op(const struct atmel_mpddr *mpddr, u32 ram_address) { writel(mode, &mpddr->mr); + dmb(); writel(0, ram_address); } @@ -227,3 +229,163 @@ int ddr3_init(const unsigned int base, return 0; } + +int lpddr2_init(const unsigned int base, + const unsigned int ram_address, + const struct atmel_mpddrc_config *mpddr_value) +{ + struct atmel_mpddr *mpddr = (struct atmel_mpddr *)base; + u32 reg; + + writel(mpddr_value->lpddr23_lpr, &mpddr->lpddr23_lpr); + + writel(mpddr_value->tim_cal, &mpddr->tim_cal); + + /* 1. Program the memory device type */ + writel(mpddr_value->md, &mpddr->md); + + /* + * 2. Program features of the LPDDR2-SDRAM device and timing parameters + */ + writel(mpddr_value->cr, &mpddr->cr); + + writel(mpddr_value->tpr0, &mpddr->tpr0); + writel(mpddr_value->tpr1, &mpddr->tpr1); + writel(mpddr_value->tpr2, &mpddr->tpr2); + + /* 3. A NOP command is issued to the LPDDR2-SDRAM */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address); + + /* + * 3bis. Add memory barrier then Perform a write access to + * any low-power DDR2-SDRAM address to acknowledge the command. + */ + + dmb(); + writel(0, ram_address); + + /* 4. A pause of at least 100 ns must be observed before a single toggle */ + udelay(1); + + /* 5. A NOP command is issued to the LPDDR2-SDRAM */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address); + + /* 6. A pause of at least 200 us must be observed before a Reset Command */ + udelay(200); + + /* 7. A Reset command is issued to the low-power DDR2-SDRAM. */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(63), ram_address); + + /* + * 8. A pause of at least tINIT5 must be observed before issuing + * any commands + */ + udelay(1); + + /* 9. A Calibration command is issued to the low-power DDR2-SDRAM. */ + reg = readl(&mpddr->cr); + reg &= ~ATMEL_MPDDRC_CR_ZQ_RESET; + reg |= ATMEL_MPDDRC_CR_ZQ_RESET; + writel(reg, &mpddr->cr); + + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(10), ram_address); + + /* + * 9bis: The ZQ Calibration command is now issued. + * Program the type of calibration in the MPDDRC_CR: set the + * ZQ field to the SHORT value. + */ + reg = readl(&mpddr->cr); + reg &= ~ATMEL_MPDDRC_CR_ZQ_RESET; + reg |= ATMEL_MPDDRC_CR_ZQ_SHORT; + writel(reg, &mpddr->cr); + + /* + * 10: A Mode Register Write command with 1 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(1), ram_address); + + /* + * 11: A Mode Register Write command with 2 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(2), ram_address); + + /* + * 12: A Mode Register Write command with 3 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(3), ram_address); + + /* + * 13: A Mode Register Write command with 16 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(16), ram_address); + + /* + * 14: In the DDR Configuration Register, open the input buffers. + */ +#ifdef CONFIG_ATMEL_SFR + configure_ddrcfg_input_buffers(true); +#endif + + /* 15. A NOP command is issued to the LPDDR2-SDRAM */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NOP_CMD, ram_address); + + /* + * 16: A Mode Register Write command with 5 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(5), ram_address); + + /* + * 17: A Mode Register Write command with 6 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(6), ram_address); + + /* + * 18: A Mode Register Write command with 8 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(8), ram_address); + + /* + * 19: A Mode Register Write command with 0 to the MRS field + * is issued to the low-power DDR2-SDRAM. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_LPDDR2_CMD | + ATMEL_MPDDRC_MR_MRS(0), ram_address); + + /* + * 20: A Normal Mode command is provided. + */ + atmel_mpddr_op(mpddr, ATMEL_MPDDRC_MR_MODE_NORMAL_CMD, ram_address); + + /* 21: In the DDR Configuration Register, close the input buffers. */ +#ifdef CONFIG_ATMEL_SFR + configure_ddrcfg_input_buffers(false); +#endif + + /* + * 22: Write the refresh rate into the COUNT field in the MPDDRC + * Refresh Timer Register. + */ + writel(mpddr_value->rtr, &mpddr->rtr); + + /* 23. Configre CAL MR4 register */ + writel(mpddr_value->cal_mr4, &mpddr->cal_mr4); + + return 0; +} diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index aeb5493..b0b9d2c 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -34,7 +34,7 @@ config USE_IMXIMG_PLUGIN i.MX6/7 supports DCD and Plugin. Enable this configuration to use Plugin, otherwise DCD will be used. -config SECURE_BOOT +config IMX_HAB bool "Support i.MX HAB features" depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX5 select FSL_CAAM if HAS_CAAM @@ -43,6 +43,13 @@ config SECURE_BOOT This option enables the support for secure boot (HAB). See doc/README.mxc_hab for more details. +config CSF_SIZE + hex "Maximum size for Command Sequence File (CSF) binary" + default 0x2060 + help + Define the maximum size for Command Sequence File (CSF) binary + this information is used to define the image boot data. + config CMD_BMODE bool "Support the 'bmode' command" default y diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 08ee52e..fbd99a3 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -44,12 +44,12 @@ ifneq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_IMX_BOOTAUX) += imx_bootaux.o endif obj-$(CONFIG_SATA) += sata.o -obj-$(CONFIG_SECURE_BOOT) += hab.o +obj-$(CONFIG_IMX_HAB) += hab.o obj-$(CONFIG_SYSCOUNTER_TIMER) += syscounter.o endif ifeq ($(SOC),$(filter $(SOC),mx7ulp)) obj-y += cache.o -obj-$(CONFIG_SECURE_BOOT) += hab.o +obj-$(CONFIG_IMX_HAB) += hab.o endif ifeq ($(SOC),$(filter $(SOC),vf610)) obj-y += ddrmc-vf610.o @@ -90,6 +90,11 @@ IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%) $(Q)mkdir -p $(dir $@) $(call if_changed_dep,cpp_cfg) +IMX_CONTAINER_CFG = $(CONFIG_IMX_CONTAINER_CFG:"%"=%) +container.cfg: $(IMX_CONTAINER_CFG) FORCE + $(Q)mkdir -p $(dir $@) + $(call if_changed_dep,cpp_cfg) + ifeq ($(CONFIG_ARCH_IMX8), y) CNTR_DEPFILES := $(srctree)/tools/imx_cntr_image.sh IMAGE_TYPE := imx8image @@ -158,8 +163,20 @@ SPL: MKIMAGEFLAGS_flash.bin = -n spl/u-boot-spl.cfgout -T $(IMAGE_TYPE) -e 0x100000 flash.bin: MKIMAGEOUTPUT = flash.log -flash.bin: spl/u-boot-spl.bin u-boot.itb FORCE -ifeq ($(SPL_DEPFILE_EXISTS),0) +MKIMAGEFLAGS_u-boot.cnt = -n container.cfg -T $(IMAGE_TYPE) -e 0x100000 +u-boot.cnt: MKIMAGEOUTPUT = u-boot.cnt.log + +ifeq ($(CONFIG_SPL_LOAD_IMX_CONTAINER), y) +u-boot.cnt: u-boot.bin container.cfg FORCE + $(call if_changed,mkimage) +flash.bin: spl/u-boot-spl.bin FORCE + $(call if_changed,mkimage) + @flashbin_size=`wc -c flash.bin | awk '{print $$1}'`; \ + pad_cnt=$$(((flashbin_size + 0x400 - 1) / 0x400)); \ + echo "append u-boot.cnt at $$pad_cnt KB"; \ + dd if=u-boot.cnt of=flash.bin bs=1K seek=$$pad_cnt; +else +flash.bin: spl/u-boot-spl.bin FORCE $(call if_changed,mkimage) endif endif diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 065b814..7811c61 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -359,9 +359,11 @@ usage: return CMD_RET_USAGE; } +#ifdef CONFIG_SYS_LONGHELP static char nandbcb_help_text[] = "update addr off|partition len - update 'len' bytes starting at\n" " 'off|part' to memory address 'addr', skipping bad blocks"; +#endif U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb, "i.MX6 Nand BCB", diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index 6e9a175..efd8fc6 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -145,6 +145,18 @@ unsigned imx_ddr_size(void) const char *get_imx_type(u32 imxtype) { switch (imxtype) { + case MXC_CPU_IMX8MM: + return "8MMQ"; /* Quad-core version of the imx8mm */ + case MXC_CPU_IMX8MML: + return "8MMQL"; /* Quad-core Lite version of the imx8mm */ + case MXC_CPU_IMX8MMD: + return "8MMD"; /* Dual-core version of the imx8mm */ + case MXC_CPU_IMX8MMDL: + return "8MMDL"; /* Dual-core Lite version of the imx8mm */ + case MXC_CPU_IMX8MMS: + return "8MMS"; /* Single-core version of the imx8mm */ + case MXC_CPU_IMX8MMSL: + return "8MMSL"; /* Single-core Lite version of the imx8mm */ case MXC_CPU_IMX8MQ: return "8MQ"; /* Quad-core version of the imx8m */ case MXC_CPU_MX7S: @@ -173,6 +185,8 @@ const char *get_imx_type(u32 imxtype) return "6UL"; /* Ultra-Lite version of the mx6 */ case MXC_CPU_MX6ULL: return "6ULL"; /* ULL version of the mx6 */ + case MXC_CPU_MX6ULZ: + return "6ULZ"; /* ULZ version of the mx6 */ case MXC_CPU_MX51: return "51"; case MXC_CPU_MX53: diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index bbe323d..d17760e 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -23,6 +23,19 @@ config IMX8QXP config SYS_SOC default "imx8" +config SPL_LOAD_IMX_CONTAINER + bool "Enable SPL loading U-Boot as a i.MX Container image" + depends on SPL + help + This is to let SPL could load i.MX8 Container image + +config IMX_CONTAINER_CFG + string "i.MX Container config file" + depends on SPL + help + This is to specific the cfg file for generating container + image which will be loaded by SPL. + choice prompt "i.MX8 board select" optional diff --git a/arch/arm/mach-imx/imx8/Makefile b/arch/arm/mach-imx/imx8/Makefile index 92b5c56..39e384d 100644 --- a/arch/arm/mach-imx/imx8/Makefile +++ b/arch/arm/mach-imx/imx8/Makefile @@ -4,4 +4,9 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += cpu.o iomux.o misc.o +obj-y += cpu.o iomux.o misc.o lowlevel_init.o +obj-$(CONFIG_OF_SYSTEM_SETUP) += fdt.o + +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_LOAD_IMX_CONTAINER) += image.o parse-container.o +endif diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index f2fa262..d393a01 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -60,18 +60,18 @@ int arch_cpu_init_dm(void) int node, ret; node = fdt_node_offset_by_compatible(gd->fdt_blob, -1, "fsl,imx8-mu"); - ret = device_bind_driver_to_node(gd->dm_root, "imx8_scu", "imx8_scu", - offset_to_ofnode(node), &devp); + ret = uclass_get_device_by_of_offset(UCLASS_MISC, node, &devp); if (ret) { - printf("could not find scu %d\n", ret); + printf("could not get scu %d\n", ret); return ret; } - ret = device_probe(devp); - if (ret) { - printf("scu probe failed %d\n", ret); - return ret; + if (is_imx8qm()) { + ret = sc_pm_set_resource_power_mode(-1, SC_R_SMMU, + SC_PM_PW_MODE_ON); + if (ret) + return ret; } return 0; @@ -475,10 +475,17 @@ u64 get_page_table_size(void) } #endif +#if defined(CONFIG_IMX8QM) +#define FUSE_MAC0_WORD0 452 +#define FUSE_MAC0_WORD1 453 +#define FUSE_MAC1_WORD0 454 +#define FUSE_MAC1_WORD1 455 +#elif defined(CONFIG_IMX8QXP) #define FUSE_MAC0_WORD0 708 #define FUSE_MAC0_WORD1 709 #define FUSE_MAC1_WORD0 710 #define FUSE_MAC1_WORD1 711 +#endif void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { @@ -528,171 +535,3 @@ u32 get_cpu_rev(void) return (id << 12) | rev; } -#if CONFIG_IS_ENABLED(CPU) -struct cpu_imx_platdata { - const char *name; - const char *rev; - const char *type; - u32 cpurev; - u32 freq_mhz; -}; - -const char *get_imx8_type(u32 imxtype) -{ - switch (imxtype) { - case MXC_CPU_IMX8QXP: - case MXC_CPU_IMX8QXP_A0: - return "QXP"; - case MXC_CPU_IMX8QM: - return "QM"; - default: - return "??"; - } -} - -const char *get_imx8_rev(u32 rev) -{ - switch (rev) { - case CHIP_REV_A: - return "A"; - case CHIP_REV_B: - return "B"; - default: - return "?"; - } -} - -const char *get_core_name(void) -{ - if (is_cortex_a35()) - return "A35"; - else if (is_cortex_a53()) - return "A53"; - else if (is_cortex_a72()) - return "A72"; - else - return "?"; -} - -#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL) -static int cpu_imx_get_temp(void) -{ - struct udevice *thermal_dev; - int cpu_tmp, ret; - - ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0", - &thermal_dev); - - if (!ret) { - ret = thermal_get_temp(thermal_dev, &cpu_tmp); - if (ret) - return 0xdeadbeef; - } else { - return 0xdeadbeef; - } - - return cpu_tmp; -} -#else -static int cpu_imx_get_temp(void) -{ - return 0; -} -#endif - -int cpu_imx_get_desc(struct udevice *dev, char *buf, int size) -{ - struct cpu_imx_platdata *plat = dev_get_platdata(dev); - int ret; - - if (size < 100) - return -ENOSPC; - - ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz", - plat->type, plat->rev, plat->name, plat->freq_mhz); - - if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) { - buf = buf + ret; - size = size - ret; - ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp()); - } - - snprintf(buf + ret, size - ret, "\n"); - - return 0; -} - -static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info) -{ - struct cpu_imx_platdata *plat = dev_get_platdata(dev); - - info->cpu_freq = plat->freq_mhz * 1000; - info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU); - return 0; -} - -static int cpu_imx_get_count(struct udevice *dev) -{ - return 4; -} - -static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size) -{ - snprintf(buf, size, "NXP"); - return 0; -} - -static const struct cpu_ops cpu_imx8_ops = { - .get_desc = cpu_imx_get_desc, - .get_info = cpu_imx_get_info, - .get_count = cpu_imx_get_count, - .get_vendor = cpu_imx_get_vendor, -}; - -static const struct udevice_id cpu_imx8_ids[] = { - { .compatible = "arm,cortex-a35" }, - { .compatible = "arm,cortex-a53" }, - { } -}; - -static ulong imx8_get_cpu_rate(void) -{ - ulong rate; - int ret; - int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ? - SC_R_A53 : SC_R_A72; - - ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU, - (sc_pm_clock_rate_t *)&rate); - if (ret) { - printf("Could not read CPU frequency: %d\n", ret); - return 0; - } - - return rate; -} - -static int imx8_cpu_probe(struct udevice *dev) -{ - struct cpu_imx_platdata *plat = dev_get_platdata(dev); - u32 cpurev; - - cpurev = get_cpu_rev(); - plat->cpurev = cpurev; - plat->name = get_core_name(); - plat->rev = get_imx8_rev(cpurev & 0xFFF); - plat->type = get_imx8_type((cpurev & 0xFF000) >> 12); - plat->freq_mhz = imx8_get_cpu_rate() / 1000000; - return 0; -} - -U_BOOT_DRIVER(cpu_imx8_drv) = { - .name = "imx8x_cpu", - .id = UCLASS_CPU, - .of_match = cpu_imx8_ids, - .ops = &cpu_imx8_ops, - .probe = imx8_cpu_probe, - .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata), - .flags = DM_FLAG_PRE_RELOC, -}; -#endif diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c new file mode 100644 index 0000000..65c8ac1 --- /dev/null +++ b/arch/arm/mach-imx/imx8/fdt.c @@ -0,0 +1,292 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include <common.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/sys_proto.h> +#include <dm/ofnode.h> +#include <fdt_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +static bool check_owned_resource(sc_rsrc_t rsrc_id) +{ + bool owned; + + owned = sc_rm_is_resource_owned(-1, rsrc_id); + + return owned; +} + +static int disable_fdt_node(void *blob, int nodeoffset) +{ + int rc, ret; + const char *status = "disabled"; + + do { + rc = fdt_setprop(blob, nodeoffset, "status", status, + strlen(status) + 1); + if (rc) { + if (rc == -FDT_ERR_NOSPACE) { + ret = fdt_increase_size(blob, 512); + if (ret) + return ret; + } + } + } while (rc == -FDT_ERR_NOSPACE); + + return rc; +} + +static void update_fdt_with_owned_resources(void *blob) +{ + /* + * Traverses the fdt nodes, check its power domain and use + * the resource id in the power domain for checking whether + * it is owned by current partition + */ + struct fdtdec_phandle_args args; + int offset = 0, depth = 0; + u32 rsrc_id; + int rc, i; + + for (offset = fdt_next_node(blob, offset, &depth); offset > 0; + offset = fdt_next_node(blob, offset, &depth)) { + debug("Node name: %s, depth %d\n", + fdt_get_name(blob, offset, NULL), depth); + + if (!fdt_get_property(blob, offset, "power-domains", NULL)) { + debug(" - ignoring node %s\n", + fdt_get_name(blob, offset, NULL)); + continue; + } + + if (!fdtdec_get_is_enabled(blob, offset)) { + debug(" - ignoring node %s\n", + fdt_get_name(blob, offset, NULL)); + continue; + } + + i = 0; + while (true) { + rc = fdtdec_parse_phandle_with_args(blob, offset, + "power-domains", + "#power-domain-cells", + 0, i++, &args); + if (rc == -ENOENT) { + break; + } else if (rc) { + printf("Parse power-domains of %s wrong: %d\n", + fdt_get_name(blob, offset, NULL), rc); + continue; + } + + rsrc_id = args.args[0]; + + if (!check_owned_resource(rsrc_id)) { + rc = disable_fdt_node(blob, offset); + if (!rc) { + printf("Disable %s rsrc %u not owned\n", + fdt_get_name(blob, offset, NULL), + rsrc_id); + } else { + printf("Unable to disable %s, err=%s\n", + fdt_get_name(blob, offset, NULL), + fdt_strerror(rc)); + } + } + } + } +} + +static int config_smmu_resource_sid(int rsrc, int sid) +{ + int err; + + if (!check_owned_resource(rsrc)) { + printf("%s rsrc[%d] not owned\n", __func__, rsrc); + return -1; + } + err = sc_rm_set_master_sid(-1, rsrc, sid); + debug("set_master_sid rsrc=%d sid=0x%x err=%d\n", rsrc, sid, err); + if (err != SC_ERR_NONE) { + pr_err("fail set_master_sid rsrc=%d sid=0x%x err=%d\n", rsrc, sid, err); + return -EINVAL; + } + + return 0; +} + +static int config_smmu_fdt_device_sid(void *blob, int device_offset, int sid) +{ + const char *name = fdt_get_name(blob, device_offset, NULL); + struct fdtdec_phandle_args args; + int rsrc, ret; + int proplen; + const fdt32_t *prop; + int i; + + prop = fdt_getprop(blob, device_offset, "fsl,sc_rsrc_id", &proplen); + if (prop) { + int i; + + debug("configure node %s sid 0x%x for %d resources\n", + name, sid, (int)(proplen / sizeof(fdt32_t))); + for (i = 0; i < proplen / sizeof(fdt32_t); ++i) { + ret = config_smmu_resource_sid(fdt32_to_cpu(prop[i]), + sid); + if (ret) + return ret; + } + + return 0; + } + + i = 0; + while (true) { + ret = fdtdec_parse_phandle_with_args(blob, device_offset, + "power-domains", + "#power-domain-cells", + 0, i++, &args); + if (ret == -ENOENT) { + break; + } else if (ret) { + printf("Parse power-domains of node %s wrong: %d\n", + fdt_get_name(blob, device_offset, NULL), ret); + continue; + } + + debug("configure node %s sid 0x%x rsrc=%d\n", + name, sid, rsrc); + rsrc = args.args[0]; + + ret = config_smmu_resource_sid(rsrc, sid); + if (ret) + break; + } + + return ret; +} + +static int config_smmu_fdt(void *blob) +{ + int offset, proplen, i, ret; + const fdt32_t *prop; + const char *name; + + /* Legacy smmu bindings, still used by xen. */ + offset = fdt_node_offset_by_compatible(blob, 0, "arm,mmu-500"); + prop = fdt_getprop(blob, offset, "mmu-masters", &proplen); + if (offset > 0 && prop) { + debug("found legacy mmu-masters property\n"); + + for (i = 0; i < proplen / 8; ++i) { + u32 phandle = fdt32_to_cpu(prop[2 * i]); + int sid = fdt32_to_cpu(prop[2 * i + 1]); + int device_offset; + + device_offset = fdt_node_offset_by_phandle(blob, + phandle); + if (device_offset < 0) { + pr_err("Not find device from mmu_masters: %d", + device_offset); + continue; + } + ret = config_smmu_fdt_device_sid(blob, device_offset, + sid); + if (ret) + return ret; + } + + /* Ignore new bindings if old bindings found, just like linux. */ + return 0; + } + + /* Generic smmu bindings */ + offset = 0; + while ((offset = fdt_next_node(blob, offset, NULL)) > 0) { + name = fdt_get_name(blob, offset, NULL); + prop = fdt_getprop(blob, offset, "iommus", &proplen); + if (!prop) + continue; + debug("node %s iommus proplen %d\n", name, proplen); + + if (proplen == 12) { + int sid = fdt32_to_cpu(prop[1]); + + config_smmu_fdt_device_sid(blob, offset, sid); + } else if (proplen != 4) { + debug("node %s ignore unexpected iommus proplen=%d\n", + name, proplen); + } + } + + return 0; +} + +static int ft_add_optee_node(void *fdt, bd_t *bd) +{ + const char *path, *subpath; + int offs; + + /* + * No TEE space allocated indicating no TEE running, so no + * need to add optee node in dts + */ + if (!boot_pointer[1]) + return 0; + + offs = fdt_increase_size(fdt, 512); + if (offs) { + printf("No Space for dtb\n"); + return 1; + } + + path = "/firmware"; + offs = fdt_path_offset(fdt, path); + if (offs < 0) { + path = "/"; + offs = fdt_path_offset(fdt, path); + + if (offs < 0) { + printf("Could not find root node.\n"); + return offs; + } + + subpath = "firmware"; + offs = fdt_add_subnode(fdt, offs, subpath); + if (offs < 0) { + printf("Could not create %s node.\n", subpath); + return offs; + } + } + + subpath = "optee"; + offs = fdt_add_subnode(fdt, offs, subpath); + if (offs < 0) { + printf("Could not create %s node.\n", subpath); + return offs; + } + + fdt_setprop_string(fdt, offs, "compatible", "linaro,optee-tz"); + fdt_setprop_string(fdt, offs, "method", "smc"); + + return 0; +} + +int ft_system_setup(void *blob, bd_t *bd) +{ + int ret; + + update_fdt_with_owned_resources(blob); + + if (is_imx8qm()) { + ret = config_smmu_fdt(blob); + if (ret) + return ret; + } + + return ft_add_optee_node(blob, bd); +} diff --git a/arch/arm/mach-imx/imx8/image.c b/arch/arm/mach-imx/imx8/image.c new file mode 100644 index 0000000..58a29e8 --- /dev/null +++ b/arch/arm/mach-imx/imx8/image.c @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include <common.h> +#include <errno.h> +#include <asm/io.h> +#include <mmc.h> +#include <spi_flash.h> +#include <nand.h> +#include <asm/arch/image.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/boot_mode.h> + +#define MMC_DEV 0 +#define QSPI_DEV 1 +#define NAND_DEV 2 +#define QSPI_NOR_DEV 3 + +static int __get_container_size(ulong addr) +{ + struct container_hdr *phdr; + struct boot_img_t *img_entry; + struct signature_block_hdr *sign_hdr; + u8 i = 0; + u32 max_offset = 0, img_end; + + phdr = (struct container_hdr *)addr; + if (phdr->tag != 0x87 && phdr->version != 0x0) { + debug("Wrong container header\n"); + return -EFAULT; + } + + max_offset = sizeof(struct container_hdr); + + img_entry = (struct boot_img_t *)(addr + sizeof(struct container_hdr)); + for (i = 0; i < phdr->num_images; i++) { + img_end = img_entry->offset + img_entry->size; + if (img_end > max_offset) + max_offset = img_end; + + debug("img[%u], end = 0x%x\n", i, img_end); + + img_entry++; + } + + if (phdr->sig_blk_offset != 0) { + sign_hdr = (struct signature_block_hdr *)(addr + phdr->sig_blk_offset); + u16 len = sign_hdr->length_lsb + (sign_hdr->length_msb << 8); + + if (phdr->sig_blk_offset + len > max_offset) + max_offset = phdr->sig_blk_offset + len; + + debug("sigblk, end = 0x%x\n", phdr->sig_blk_offset + len); + } + + return max_offset; +} + +static int get_container_size(void *dev, int dev_type, unsigned long offset) +{ + u8 *buf = malloc(CONTAINER_HDR_ALIGNMENT); + int ret = 0; + + if (!buf) { + printf("Malloc buffer failed\n"); + return -ENOMEM; + } + +#ifdef CONFIG_SPL_MMC_SUPPORT + if (dev_type == MMC_DEV) { + unsigned long count = 0; + struct mmc *mmc = (struct mmc *)dev; + + count = blk_dread(mmc_get_blk_desc(mmc), + offset / mmc->read_bl_len, + CONTAINER_HDR_ALIGNMENT / mmc->read_bl_len, + buf); + if (count == 0) { + printf("Read container image from MMC/SD failed\n"); + return -EIO; + } + } +#endif + +#ifdef CONFIG_SPL_SPI_LOAD + if (dev_type == QSPI_DEV) { + struct spi_flash *flash = (struct spi_flash *)dev; + + ret = spi_flash_read(flash, offset, + CONTAINER_HDR_ALIGNMENT, buf); + if (ret != 0) { + printf("Read container image from QSPI failed\n"); + return -EIO; + } + } +#endif + +#ifdef CONFIG_SPL_NAND_SUPPORT + if (dev_type == NAND_DEV) { + ret = nand_spl_load_image(offset, CONTAINER_HDR_ALIGNMENT, + buf); + if (ret != 0) { + printf("Read container image from NAND failed\n"); + return -EIO; + } + } +#endif + +#ifdef CONFIG_SPL_NOR_SUPPORT + if (dev_type == QSPI_NOR_DEV) + memcpy(buf, (const void *)offset, CONTAINER_HDR_ALIGNMENT); +#endif + + ret = __get_container_size((ulong)buf); + + free(buf); + + return ret; +} + +static unsigned long get_boot_device_offset(void *dev, int dev_type) +{ + unsigned long offset = 0; + + if (dev_type == MMC_DEV) { + struct mmc *mmc = (struct mmc *)dev; + + if (IS_SD(mmc) || mmc->part_config == MMCPART_NOAVAILABLE) { + offset = CONTAINER_HDR_MMCSD_OFFSET; + } else { + u8 part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + + if (part == 1 || part == 2) { + if (is_imx8qxp() && is_soc_rev(CHIP_REV_B)) + offset = CONTAINER_HDR_MMCSD_OFFSET; + else + offset = CONTAINER_HDR_EMMC_OFFSET; + } else { + offset = CONTAINER_HDR_MMCSD_OFFSET; + } + } + } else if (dev_type == QSPI_DEV) { + offset = CONTAINER_HDR_QSPI_OFFSET; + } else if (dev_type == NAND_DEV) { + offset = CONTAINER_HDR_NAND_OFFSET; + } else if (dev_type == QSPI_NOR_DEV) { + offset = CONTAINER_HDR_QSPI_OFFSET + 0x08000000; + } + + return offset; +} + +static int get_imageset_end(void *dev, int dev_type) +{ + unsigned long offset1 = 0, offset2 = 0; + int value_container[2]; + + offset1 = get_boot_device_offset(dev, dev_type); + offset2 = CONTAINER_HDR_ALIGNMENT + offset1; + + value_container[0] = get_container_size(dev, dev_type, offset1); + if (value_container[0] < 0) { + printf("Parse seco container failed %d\n", value_container[0]); + return value_container[0]; + } + + debug("seco container size 0x%x\n", value_container[0]); + + value_container[1] = get_container_size(dev, dev_type, offset2); + if (value_container[1] < 0) { + debug("Parse scu container failed %d, only seco container\n", + value_container[1]); + /* return seco container total size */ + return value_container[0] + offset1; + } + + debug("scu container size 0x%x\n", value_container[1]); + + return value_container[1] + offset2; +} + +#ifdef CONFIG_SPL_SPI_LOAD +unsigned long spl_spi_get_uboot_offs(struct spi_flash *flash) +{ + int end; + + end = get_imageset_end(flash, QSPI_DEV); + end = ROUND(end, SZ_1K); + + printf("Load image from QSPI 0x%x\n", end); + + return end; +} +#endif + +#ifdef CONFIG_SPL_MMC_SUPPORT +unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc) +{ + int end; + + end = get_imageset_end(mmc, MMC_DEV); + end = ROUND(end, SZ_1K); + + printf("Load image from MMC/SD 0x%x\n", end); + + return end / mmc->read_bl_len; +} +#endif + +#ifdef CONFIG_SPL_NAND_SUPPORT +uint32_t spl_nand_get_uboot_raw_page(void) +{ + int end; + + end = get_imageset_end((void *)NULL, NAND_DEV); + end = ROUND(end, SZ_16K); + + printf("Load image from NAND 0x%x\n", end); + + return end; +} +#endif + +#ifdef CONFIG_SPL_NOR_SUPPORT +unsigned long spl_nor_get_uboot_base(void) +{ + int end; + + /* Calculate the image set end, + * if it is less than CONFIG_SYS_UBOOT_BASE(0x8281000), + * we use CONFIG_SYS_UBOOT_BASE + * Otherwise, use the calculated address + */ + end = get_imageset_end((void *)NULL, QSPI_NOR_DEV); + if (end <= CONFIG_SYS_UBOOT_BASE) + end = CONFIG_SYS_UBOOT_BASE; + else + end = ROUND(end, SZ_1K); + + printf("Load image from NOR 0x%x\n", end); + + return end; +} +#endif diff --git a/arch/arm/mach-imx/imx8/lowlevel_init.S b/arch/arm/mach-imx/imx8/lowlevel_init.S new file mode 100644 index 0000000..a66243c --- /dev/null +++ b/arch/arm/mach-imx/imx8/lowlevel_init.S @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#include <config.h> + +.align 8 +.global boot_pointer +boot_pointer: + .space 32 + +/* + * Routine: save_boot_params (called after reset from start.S) + */ + +.global save_boot_params +save_boot_params: + /* The firmware provided ATAG/FDT address can be found in r2/x0 */ + adr x0, boot_pointer + stp x1, x2, [x0], #16 + stp x3, x4, [x0], #16 + + /* + * We use absolute address not PC relative address for return. + * When running SPL on iMX8, the A core starts at address 0, + * an alias to OCRAM 0x100000, our linker address for SPL is + * from 0x100000. So using absolute address can jump to the OCRAM + * address from the alias. The alias only map first 96KB of OCRAM, + * so this require the SPL size can't beyond 96KB. + * But when using SPL DM, the size increase significantly and + * always beyonds 96KB. That's why we have to jump to OCRAM. + * Normal u-boot also runs into this codes, but there is no impact. + */ + ldr x1, =save_boot_params_ret + br x1 diff --git a/arch/arm/mach-imx/imx8/parse-container.c b/arch/arm/mach-imx/imx8/parse-container.c new file mode 100644 index 0000000..32f78bd --- /dev/null +++ b/arch/arm/mach-imx/imx8/parse-container.c @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018-2019 NXP + */ + +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/arch/image.h> + +static struct boot_img_t *read_auth_image(struct spl_image_info *spl_image, + struct spl_load_info *info, + struct container_hdr *container, + int image_index, + u32 container_sector) +{ + struct boot_img_t *images; + ulong sector; + u32 sectors; + + if (image_index > container->num_images) { + debug("Invalid image number\n"); + return NULL; + } + + images = (struct boot_img_t *)((u8 *)container + + sizeof(struct container_hdr)); + + if (images[image_index].offset % info->bl_len) { + printf("%s: image%d offset not aligned to %u\n", + __func__, image_index, info->bl_len); + return NULL; + } + + sectors = roundup(images[image_index].size, info->bl_len) / + info->bl_len; + sector = images[image_index].offset / info->bl_len + + container_sector; + + debug("%s: container: %p sector: %lu sectors: %u\n", __func__, + container, sector, sectors); + if (info->read(info, sector, sectors, + (void *)images[image_index].entry) != sectors) { + printf("%s wrong\n", __func__); + return NULL; + } + + return &images[image_index]; +} + +static int read_auth_container(struct spl_image_info *spl_image, + struct spl_load_info *info, ulong sector) +{ + struct container_hdr *container = NULL; + u16 length; + u32 sectors; + int i, size; + + size = roundup(CONTAINER_HDR_ALIGNMENT, info->bl_len); + sectors = size / info->bl_len; + + /* + * It will not override the ATF code, so safe to use it here, + * no need malloc + */ + container = (struct container_hdr *)spl_get_load_buffer(-size, size); + + debug("%s: container: %p sector: %lu sectors: %u\n", __func__, + container, sector, sectors); + if (info->read(info, sector, sectors, container) != sectors) + return -EIO; + + if (container->tag != 0x87 && container->version != 0x0) { + printf("Wrong container header"); + return -ENOENT; + } + + if (!container->num_images) { + printf("Wrong container, no image found"); + return -ENOENT; + } + + length = container->length_lsb + (container->length_msb << 8); + debug("Container length %u\n", length); + + if (length > CONTAINER_HDR_ALIGNMENT) { + size = roundup(length, info->bl_len); + sectors = size / info->bl_len; + + container = (struct container_hdr *)spl_get_load_buffer(-size, size); + + debug("%s: container: %p sector: %lu sectors: %u\n", + __func__, container, sector, sectors); + if (info->read(info, sector, sectors, container) != + sectors) + return -EIO; + } + + for (i = 0; i < container->num_images; i++) { + struct boot_img_t *image = read_auth_image(spl_image, info, + container, i, + sector); + + if (!image) + return -EINVAL; + + if (i == 0) { + spl_image->load_addr = image->dst; + spl_image->entry_point = image->entry; + } + } + + return 0; +} + +int spl_load_imx_container(struct spl_image_info *spl_image, + struct spl_load_info *info, ulong sector) +{ + return read_auth_container(spl_image, info, sector); +} diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 317dee9..f520075 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -4,6 +4,14 @@ config IMX8M bool select ROM_UNIFIED_SECTIONS +config IMX8MQ + bool + select IMX8M + +config IMX8MM + bool + select IMX8M + config SYS_SOC default "imx8m" @@ -13,11 +21,18 @@ choice config TARGET_IMX8MQ_EVK bool "imx8mq_evk" - select IMX8M + select IMX8MQ + select IMX8M_LPDDR4 + +config TARGET_IMX8MM_EVK + bool "imx8mm LPDDR4 EVK board" + select IMX8MM + select SUPPORT_SPL select IMX8M_LPDDR4 endchoice source "board/freescale/imx8mq_evk/Kconfig" +source "board/freescale/imx8mm_evk/Kconfig" endif diff --git a/arch/arm/mach-imx/imx8m/Makefile b/arch/arm/mach-imx/imx8m/Makefile index feff494..92184f3 100644 --- a/arch/arm/mach-imx/imx8m/Makefile +++ b/arch/arm/mach-imx/imx8m/Makefile @@ -3,4 +3,6 @@ # Copyright 2017 NXP obj-y += lowlevel_init.o -obj-y += clock.o clock_slice.o soc.o +obj-y += clock_slice.o soc.o +obj-$(CONFIG_IMX8MQ) += clock_imx8mq.o +obj-$(CONFIG_IMX8MM) += clock_imx8mm.o diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c new file mode 100644 index 0000000..ee44ba7 --- /dev/null +++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c @@ -0,0 +1,306 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018-2019 NXP + * + * Peng Fan <peng.fan@nxp.com> + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> +#include <asm/io.h> +#include <clk.h> +#include <clk-uclass.h> +#include <dt-bindings/clock/imx8mm-clock.h> +#include <div64.h> +#include <errno.h> + +DECLARE_GLOBAL_DATA_PTR; + +static struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR; + +void enable_ocotp_clk(unsigned char enable) +{ + struct clk *clkp; + int ret; + + ret = clk_get_by_id(IMX8MM_CLK_OCOTP_ROOT, &clkp); + if (ret) { + printf("%s: err: %d\n", __func__, ret); + return; + } + + enable ? clk_enable(clkp) : clk_disable(clkp); +} + +int enable_i2c_clk(unsigned char enable, unsigned i2c_num) +{ + struct clk *clkp; + int ret; + + ret = clk_get_by_id(IMX8MM_CLK_I2C1_ROOT + i2c_num, &clkp); + if (ret) { + printf("%s: err: %d\n", __func__, ret); + return ret; + } + + return enable ? clk_enable(clkp) : clk_disable(clkp); +} + +#ifdef CONFIG_SPL_BUILD +static struct imx_int_pll_rate_table imx8mm_fracpll_tbl[] = { + PLL_1443X_RATE(800000000U, 300, 9, 0, 0), + PLL_1443X_RATE(750000000U, 250, 8, 0, 0), + PLL_1443X_RATE(650000000U, 325, 3, 2, 0), + PLL_1443X_RATE(600000000U, 300, 3, 2, 0), + PLL_1443X_RATE(594000000U, 99, 1, 2, 0), + PLL_1443X_RATE(400000000U, 300, 9, 1, 0), + PLL_1443X_RATE(266666667U, 400, 9, 2, 0), + PLL_1443X_RATE(167000000U, 334, 3, 4, 0), + PLL_1443X_RATE(100000000U, 300, 9, 3, 0), +}; + +int fracpll_configure(enum pll_clocks pll, u32 freq) +{ + int i; + u32 tmp, div_val; + void *pll_base; + struct imx_int_pll_rate_table *rate; + + for (i = 0; i < ARRAY_SIZE(imx8mm_fracpll_tbl); i++) { + if (freq == imx8mm_fracpll_tbl[i].rate) + break; + } + + if (i == ARRAY_SIZE(imx8mm_fracpll_tbl)) { + printf("No matched freq table %u\n", freq); + return -EINVAL; + } + + rate = &imx8mm_fracpll_tbl[i]; + + switch (pll) { + case ANATOP_DRAM_PLL: + setbits_le32(GPC_BASE_ADDR + 0xEC, 1 << 7); + setbits_le32(GPC_BASE_ADDR + 0xF8, 1 << 5); + writel(SRC_DDR1_ENABLE_MASK, SRC_BASE_ADDR + 0x1004); + + pll_base = &ana_pll->dram_pll_gnrl_ctl; + break; + case ANATOP_VIDEO_PLL: + pll_base = &ana_pll->video_pll1_gnrl_ctl; + break; + default: + return 0; + } + /* Bypass clock and set lock to pll output lock */ + tmp = readl(pll_base); + tmp |= BYPASS_MASK; + writel(tmp, pll_base); + + /* Enable RST */ + tmp &= ~RST_MASK; + writel(tmp, pll_base); + + div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) | + (rate->sdiv << SDIV_SHIFT); + writel(div_val, pll_base + 4); + writel(rate->kdiv << KDIV_SHIFT, pll_base + 8); + + __udelay(100); + + /* Disable RST */ + tmp |= RST_MASK; + writel(tmp, pll_base); + + /* Wait Lock*/ + while (!(readl(pll_base) & LOCK_STATUS)) + ; + + /* Bypass */ + tmp &= ~BYPASS_MASK; + writel(tmp, pll_base); + + return 0; +} + +void dram_pll_init(ulong pll_val) +{ + fracpll_configure(ANATOP_DRAM_PLL, pll_val); +} + +static struct dram_bypass_clk_setting imx8mm_dram_bypass_tbl[] = { + DRAM_BYPASS_ROOT_CONFIG(MHZ(100), 2, CLK_ROOT_PRE_DIV1, 2, + CLK_ROOT_PRE_DIV2), + DRAM_BYPASS_ROOT_CONFIG(MHZ(250), 3, CLK_ROOT_PRE_DIV2, 2, + CLK_ROOT_PRE_DIV2), + DRAM_BYPASS_ROOT_CONFIG(MHZ(400), 1, CLK_ROOT_PRE_DIV2, 3, + CLK_ROOT_PRE_DIV2), +}; + +void dram_enable_bypass(ulong clk_val) +{ + int i; + struct dram_bypass_clk_setting *config; + + for (i = 0; i < ARRAY_SIZE(imx8mm_dram_bypass_tbl); i++) { + if (clk_val == imx8mm_dram_bypass_tbl[i].clk) + break; + } + + if (i == ARRAY_SIZE(imx8mm_dram_bypass_tbl)) { + printf("No matched freq table %lu\n", clk_val); + return; + } + + config = &imx8mm_dram_bypass_tbl[i]; + + clock_set_target_val(DRAM_ALT_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(config->alt_root_sel) | + CLK_ROOT_PRE_DIV(config->alt_pre_div)); + clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(config->apb_root_sel) | + CLK_ROOT_PRE_DIV(config->apb_pre_div)); + clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(1)); +} + +void dram_disable_bypass(void) +{ + clock_set_target_val(DRAM_SEL_CFG, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(0)); + clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(4) | + CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV5)); +} +#endif + +void init_uart_clk(u32 index) +{ + /* + * set uart clock root + * 24M OSC + */ + switch (index) { + case 0: + clock_enable(CCGR_UART1, 0); + clock_set_target_val(UART1_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(0)); + clock_enable(CCGR_UART1, 1); + return; + case 1: + clock_enable(CCGR_UART2, 0); + clock_set_target_val(UART2_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(0)); + clock_enable(CCGR_UART2, 1); + return; + case 2: + clock_enable(CCGR_UART3, 0); + clock_set_target_val(UART3_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(0)); + clock_enable(CCGR_UART3, 1); + return; + case 3: + clock_enable(CCGR_UART4, 0); + clock_set_target_val(UART4_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(0)); + clock_enable(CCGR_UART4, 1); + return; + default: + printf("Invalid uart index\n"); + return; + } +} + +void init_wdog_clk(void) +{ + clock_enable(CCGR_WDOG1, 0); + clock_enable(CCGR_WDOG2, 0); + clock_enable(CCGR_WDOG3, 0); + clock_set_target_val(WDOG_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(0)); + clock_enable(CCGR_WDOG1, 1); + clock_enable(CCGR_WDOG2, 1); + clock_enable(CCGR_WDOG3, 1); +} + +int clock_init(void) +{ + u32 val_cfg0; + + /* + * The gate is not exported to clk tree, so configure them here. + * According to ANAMIX SPEC + * sys pll1 fixed at 800MHz + * sys pll2 fixed at 1GHz + * Here we only enable the outputs. + */ + val_cfg0 = readl(&ana_pll->sys_pll1_gnrl_ctl); + val_cfg0 |= INTPLL_CLKE_MASK | INTPLL_DIV2_CLKE_MASK | + INTPLL_DIV3_CLKE_MASK | INTPLL_DIV4_CLKE_MASK | + INTPLL_DIV5_CLKE_MASK | INTPLL_DIV6_CLKE_MASK | + INTPLL_DIV8_CLKE_MASK | INTPLL_DIV10_CLKE_MASK | + INTPLL_DIV20_CLKE_MASK; + writel(val_cfg0, &ana_pll->sys_pll1_gnrl_ctl); + + val_cfg0 = readl(&ana_pll->sys_pll2_gnrl_ctl); + val_cfg0 |= INTPLL_CLKE_MASK | INTPLL_DIV2_CLKE_MASK | + INTPLL_DIV3_CLKE_MASK | INTPLL_DIV4_CLKE_MASK | + INTPLL_DIV5_CLKE_MASK | INTPLL_DIV6_CLKE_MASK | + INTPLL_DIV8_CLKE_MASK | INTPLL_DIV10_CLKE_MASK | + INTPLL_DIV20_CLKE_MASK; + writel(val_cfg0, &ana_pll->sys_pll2_gnrl_ctl); + + /* config GIC to sys_pll2_100m */ + clock_enable(CCGR_GIC, 0); + clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(3)); + clock_enable(CCGR_GIC, 1); + + clock_set_target_val(NAND_USDHC_BUS_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(1)); + + clock_enable(CCGR_DDR1, 0); + clock_set_target_val(DRAM_ALT_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(1)); + clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | + CLK_ROOT_SOURCE_SEL(1)); + clock_enable(CCGR_DDR1, 1); + + init_wdog_clk(); + + clock_enable(CCGR_TEMP_SENSOR, 1); + + clock_enable(CCGR_SEC_DEBUG, 1); + + return 0; +}; + +u32 imx_get_uartclk(void) +{ + return 24000000U; +} + +u32 mxc_get_clock(enum mxc_clock clk) +{ + struct clk *clkp; + int ret; + + switch (clk) { + case MXC_IPG_CLK: + ret = clk_get_by_id(IMX8MM_CLK_IPG_ROOT, &clkp); + if (ret) + return 0; + return clk_get_rate(clkp); + case MXC_ARM_CLK: + ret = clk_get_by_id(IMX8MM_CLK_A53_DIV, &clkp); + if (ret) + return 0; + return clk_get_rate(clkp); + default: + printf("%s: %d not supported\n", __func__, clk); + } + + return 0; +} diff --git a/arch/arm/mach-imx/imx8m/clock.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c index 289b941..feecdb5 100644 --- a/arch/arm/mach-imx/imx8m/clock.c +++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c @@ -322,13 +322,10 @@ int enable_i2c_clk(unsigned char enable, unsigned int i2c_num) return 0; } -unsigned int mxc_get_clock(enum clk_root_index clk) +unsigned int mxc_get_clock(enum mxc_clock clk) { u32 val; - if (clk >= CLK_ROOT_MAX) - return 0; - if (clk == MXC_ARM_CLK) return get_root_clk(ARM_A53_CLK_ROOT); diff --git a/arch/arm/mach-imx/imx8m/clock_slice.c b/arch/arm/mach-imx/imx8m/clock_slice.c index 1a67c62..780f643 100644 --- a/arch/arm/mach-imx/imx8m/clock_slice.c +++ b/arch/arm/mach-imx/imx8m/clock_slice.c @@ -13,6 +13,7 @@ static struct ccm_reg *ccm_reg = (struct ccm_reg *)CCM_BASE_ADDR; +#ifdef CONFIG_IMX8MQ static struct clk_root_map root_array[] = { {ARM_A53_CLK_ROOT, CORE_CLOCK_SLICE, 0, {OSC_25M_CLK, ARM_PLL_CLK, SYSTEM_PLL2_500M_CLK, @@ -474,6 +475,68 @@ static struct clk_root_map root_array[] = { {DRAM_PLL1_CLK} }, }; +#elif defined(CONFIG_IMX8MM) +static struct clk_root_map root_array[] = { + {NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2, + {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK, + SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_133M_CLK, + SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL1_CLK} + }, + {NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10, + {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL3_CLK, + SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL2_500M_CLK, + AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK} + }, + {NOC_APB_CLK_ROOT, BUS_CLOCK_SLICE, 11, + {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL3_CLK, + SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL1_800M_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK} + }, + {DRAM_ALT_CLK_ROOT, IP_CLOCK_SLICE, 0, + {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK, + SYSTEM_PLL2_500M_CLK, SYSTEM_PLL2_1000M_CLK, + SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, SYSTEM_PLL1_266M_CLK} + }, + {DRAM_APB_CLK_ROOT, IP_CLOCK_SLICE, 1, + {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK, + SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK, + SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK} + }, + {UART1_CLK_ROOT, IP_CLOCK_SLICE, 30, + {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK, + EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK} + }, + {UART2_CLK_ROOT, IP_CLOCK_SLICE, 31, + {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK, + EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK} + }, + {UART3_CLK_ROOT, IP_CLOCK_SLICE, 32, + {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK, + EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK} + }, + {UART4_CLK_ROOT, IP_CLOCK_SLICE, 33, + {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK, + SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK, + EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK} + }, + {GIC_CLK_ROOT, IP_CLOCK_SLICE, 36, + {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK, + SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_800M_CLK, + EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK} + }, + {WDOG_CLK_ROOT, IP_CLOCK_SLICE, 50, + {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_160M_CLK, + VPU_PLL_CLK, SYSTEM_PLL2_125M_CLK, + SYSTEM_PLL3_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_166M_CLK} + }, + {DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0, + {DRAM_PLL1_CLK} + }, +}; +#endif static int select(enum clk_root_index clock_id) { diff --git a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg new file mode 100644 index 0000000..1a2e43e --- /dev/null +++ b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#define __ASSEMBLY__ + +FIT +BOOT_FROM sd +LOADER spl/u-boot-spl-ddr.bin 0x7E1000 +SECOND_LOADER u-boot.itb 0x40200000 0x60000 + +DDR_FW lpddr4_pmu_train_1d_imem.bin +DDR_FW lpddr4_pmu_train_1d_dmem.bin +DDR_FW lpddr4_pmu_train_2d_imem.bin +DDR_FW lpddr4_pmu_train_2d_dmem.bin diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 7ec39b3..aeca82c 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -14,6 +14,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/syscounter.h> #include <asm/armv8/mmu.h> +#include <dm/uclass.h> #include <errno.h> #include <fdt_support.h> #include <fsl_wdog.h> @@ -21,7 +22,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_IMX_HAB) struct imx_sec_config_fuse_t const imx_sec_config_fuse = { .bank = 1, .word = 3, @@ -55,6 +56,14 @@ void enable_tzc380(void) /* Enable TZASC and lock setting */ setbits_le32(&gpr->gpr[10], GPR_TZASC_EN); setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK); + if (IS_ENABLED(CONFIG_IMX8MM)) + setbits_le32(&gpr->gpr[10], BIT(1)); + /* + * set Region 0 attribute to allow secure and non-secure + * read/write permission. Found some masters like usb dwc3 + * controllers can't work with secure memory. + */ + writel(0xf0000000, TZASC_BASE_ADDR + 0x108); } void set_wdog_reset(struct wdog_regs *wdog) @@ -112,16 +121,18 @@ static struct mm_region imx8m_mem_map[] = { /* DRAM1 */ .virt = 0x40000000UL, .phys = 0x40000000UL, - .size = 0xC0000000UL, + .size = PHYS_SDRAM_SIZE, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE +#ifdef PHYS_SDRAM_2_SIZE }, { /* DRAM2 */ .virt = 0x100000000UL, .phys = 0x100000000UL, - .size = 0x040000000UL, + .size = PHYS_SDRAM_2_SIZE, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE +#endif }, { /* List terminator */ 0, @@ -130,25 +141,76 @@ static struct mm_region imx8m_mem_map[] = { struct mm_region *mem_map = imx8m_mem_map; +void enable_caches(void) +{ + /* + * If OPTEE runs, remove OPTEE memory from MMU table to + * avoid speculative prefetch. OPTEE runs at the top of + * the first memory bank + */ + if (rom_pointer[1]) + imx8m_mem_map[5].size -= rom_pointer[1]; + + icache_enable(); + dcache_enable(); +} + +static u32 get_cpu_variant_type(u32 type) +{ + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + struct fuse_bank *bank = &ocotp->bank[1]; + struct fuse_bank1_regs *fuse = + (struct fuse_bank1_regs *)bank->fuse_regs; + + u32 value = readl(&fuse->tester4); + + if (type == MXC_CPU_IMX8MM) { + switch (value & 0x3) { + case 2: + if (value & 0x1c0000) + return MXC_CPU_IMX8MMDL; + else + return MXC_CPU_IMX8MMD; + case 3: + if (value & 0x1c0000) + return MXC_CPU_IMX8MMSL; + else + return MXC_CPU_IMX8MMS; + default: + if (value & 0x1c0000) + return MXC_CPU_IMX8MML; + break; + } + } + + return type; +} + u32 get_cpu_rev(void) { struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR; u32 reg = readl(&ana_pll->digprog); u32 type = (reg >> 16) & 0xff; + u32 major_low = (reg >> 8) & 0xff; u32 rom_version; reg &= 0xff; - if (reg == CHIP_REV_1_0) { - /* - * For B0 chip, the DIGPROG is not updated, still TO1.0. - * we have to check ROM version further - */ - rom_version = readl((void __iomem *)ROM_VERSION_A0); - if (rom_version != CHIP_REV_1_0) { - rom_version = readl((void __iomem *)ROM_VERSION_B0); - if (rom_version >= CHIP_REV_2_0) - reg = CHIP_REV_2_0; + /* i.MX8MM */ + if (major_low == 0x41) { + type = get_cpu_variant_type(MXC_CPU_IMX8MM); + } else { + if (reg == CHIP_REV_1_0) { + /* + * For B0 chip, the DIGPROG is not updated, still TO1.0. + * we have to check ROM version further + */ + rom_version = readl((void __iomem *)ROM_VERSION_A0); + if (rom_version != CHIP_REV_1_0) { + rom_version = readl((void __iomem *)ROM_VERSION_B0); + if (rom_version >= CHIP_REV_2_0) + reg = CHIP_REV_2_0; + } } } @@ -167,10 +229,32 @@ static void imx_set_wdog_powerdown(bool enable) writew(enable, &wdog3->wmcr); } +int arch_cpu_init_dm(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_name(UCLASS_CLK, + "clock-controller@30380000", + &dev); + if (ret < 0) { + printf("Failed to find clock node. Check device tree\n"); + return ret; + } + + return 0; +} + int arch_cpu_init(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; /* + * ROM might disable clock for SCTR, + * enable the clock before timer_init. + */ + if (IS_ENABLED(CONFIG_SPL_BUILD)) + clock_enable(CCGR_SCTR, 1); + /* * Init timer at very early state, because sscg pll setting * will use it */ @@ -234,16 +318,21 @@ int ft_system_setup(void *blob, bd_t *bd) } #endif +#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SYSRESET) void reset_cpu(ulong addr) { - struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; + struct watchdog_regs *wdog = (struct watchdog_regs *)addr; - /* Clear WDA to trigger WDOG_B immediately */ - writew((WCR_WDE | WCR_SRS), &wdog->wcr); + if (!addr) + wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; - while (1) { - /* - * spin for .5 seconds before reset - */ - } + /* Clear WDA to trigger WDOG_B immediately */ + writew((WCR_WDE | WCR_SRS), &wdog->wcr); + + while (1) { + /* + * spin for .5 seconds before reset + */ + } } +#endif diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh b/arch/arm/mach-imx/mkimage_fit_atf.sh index 38c9858..ad81d5e 100755 --- a/arch/arm/mach-imx/mkimage_fit_atf.sh +++ b/arch/arm/mach-imx/mkimage_fit_atf.sh @@ -55,6 +55,7 @@ cat << __HEADER_EOF images { uboot@1 { description = "U-Boot (64-bit)"; + os = "u-boot"; data = /incbin/("$BL33"); type = "standalone"; arch = "arm64"; @@ -63,6 +64,7 @@ cat << __HEADER_EOF }; atf@1 { description = "ARM Trusted Firmware"; + os = "arm-trusted-firmware"; data = /incbin/("$BL31"); type = "firmware"; arch = "arm64"; @@ -114,8 +116,8 @@ if [ -f $BL32 ]; then cat << __CONF_SECTION_EOF config@$cnt { description = "$(basename $dtname .dtb)"; - firmware = "uboot@1"; - loadables = "atf@1", "tee@1"; + firmware = "atf@1"; + loadables = "uboot@1", "tee@1"; fdt = "fdt@$cnt"; }; __CONF_SECTION_EOF @@ -123,8 +125,8 @@ else cat << __CONF_SECTION1_EOF config@$cnt { description = "$(basename $dtname .dtb)"; - firmware = "uboot@1"; - loadables = "atf@1"; + firmware = "atf@1"; + loadables = "uboot@1"; fdt = "fdt@$cnt"; }; __CONF_SECTION1_EOF diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index fe5991e..7e5a667 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -87,6 +87,15 @@ config MX6ULL select SYSCOUNTER_TIMER select SYS_L2CACHE_OFF +config MX6_OCRAM_256KB + bool "Support 256KB OCRAM" + depends on MX6D || MX6Q + help + Allows using the full 256KB size of the OCRAM on the MX6Q/MX6D series + of chips, such as for SPL. The OCRAM of the Lite series of chips is + only 128KB, so using this option will prevent the resulting code from + working on those chips. + config MX6_DDRCAL bool "Include dynamic DDR calibration routines" depends on SPL @@ -108,6 +117,7 @@ config TARGET_ADVANTECH_DMS_BA16 config TARGET_APALIS_IMX6 bool "Toradex Apalis iMX6 board" select BOARD_LATE_INIT + select MX6Q select DM select DM_SERIAL select DM_THERMAL @@ -187,6 +197,11 @@ config TARGET_DHCOMIMX6 config TARGET_DISPLAY5 bool "LWN DISPLAY5 board" select DM + select DM_ETH + select DM_I2C + select DM_MMC + select DM_SPI + select DM_GPIO select DM_SERIAL select SUPPORT_SPL imply CMD_DM @@ -412,6 +427,16 @@ config TARGET_OT1200 select SUPPORT_SPL imply CMD_SATA +config TARGET_PICO_IMX6 + bool "PICO-IMX6" + select BOARD_EARLY_INIT_F + select BOARD_LATE_INIT + select DM + select DM_THERMAL + select MX6QDL + select SUPPORT_SPL + imply CMD_DM + config TARGET_PICO_IMX6UL bool "PICO-IMX6UL-EMMC" select MX6UL @@ -599,6 +624,7 @@ source "board/logicpd/imx6/Kconfig" source "board/seco/Kconfig" source "board/sks-kinkel/sksimx6/Kconfig" source "board/solidrun/mx6cuboxi/Kconfig" +source "board/technexion/pico-imx6/Kconfig" source "board/technexion/pico-imx6ul/Kconfig" source "board/tbs/tbs2910/Kconfig" source "board/tqc/tqma6/Kconfig" diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c index 366a4e3..7763c79 100644 --- a/arch/arm/mach-imx/mx6/clock.c +++ b/arch/arm/mach-imx/mx6/clock.c @@ -1152,7 +1152,7 @@ int enable_pcie_clock(void) } #endif -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB void hab_caam_clock_enable(unsigned char enable) { u32 reg; @@ -1275,6 +1275,22 @@ unsigned int mxc_get_clock(enum mxc_clock clk) return 0; } +#ifndef CONFIG_MX6SX +void enable_ipu_clock(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + reg = readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK; + writel(reg, &mxc_ccm->CCGR3); + + if (is_mx6dqp()) { + setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK); + setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK); + } +} +#endif + #ifndef CONFIG_SPL_BUILD /* * Dump some core clockes. @@ -1311,22 +1327,6 @@ int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } -#ifndef CONFIG_MX6SX -void enable_ipu_clock(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - int reg; - reg = readl(&mxc_ccm->CCGR3); - reg |= MXC_CCM_CCGR3_IPU1_IPU_MASK; - writel(reg, &mxc_ccm->CCGR3); - - if (is_mx6dqp()) { - setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK); - setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK); - } -} -#endif - #if defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) || defined(CONFIG_MX6DL) || \ defined(CONFIG_MX6S) static void disable_ldb_di_clock_sources(void) diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 075d246..6dccee4 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -50,7 +50,7 @@ U_BOOT_DEVICE(imx6_thermal) = { }; #endif -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_IMX_HAB) struct imx_sec_config_fuse_t const imx_sec_config_fuse = { .bank = 0, .word = 6, @@ -85,6 +85,10 @@ u32 get_cpu_rev(void) type = MXC_CPU_MX6D; } + if (type == MXC_CPU_MX6ULL) { + if (readl(SRC_BASE_ADDR + 0x1c) & (1 << 6)) + type = MXC_CPU_MX6ULZ; + } } major = ((reg >> 8) & 0xff); if ((major >= 1) && diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c index 4f9724c..0e08cab 100644 --- a/arch/arm/mach-imx/mx7/clock.c +++ b/arch/arm/mach-imx/mx7/clock.c @@ -1074,7 +1074,7 @@ void clock_init(void) } } -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB void hab_caam_clock_enable(unsigned char enable) { if (enable) diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 3b8e1ba..35160f4 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -122,7 +122,7 @@ static void isolate_resource(void) } #endif -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_IMX_HAB) struct imx_sec_config_fuse_t const imx_sec_config_fuse = { .bank = 1, .word = 3, diff --git a/arch/arm/mach-imx/mx7ulp/Kconfig b/arch/arm/mach-imx/mx7ulp/Kconfig index d4b0299..ed5f0ae 100644 --- a/arch/arm/mach-imx/mx7ulp/Kconfig +++ b/arch/arm/mach-imx/mx7ulp/Kconfig @@ -3,12 +3,16 @@ if ARCH_MX7ULP config SYS_SOC default "mx7ulp" +config MX7ULP + bool + choice prompt "MX7ULP board select" optional config TARGET_MX7ULP_EVK - bool "Support mx7ulp EVK board" + bool "Support mx7ulp EVK board" + select MX7ULP select SYS_ARCH_TIMER endchoice diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c index dc317fe..d3365dd 100644 --- a/arch/arm/mach-imx/mx7ulp/clock.c +++ b/arch/arm/mach-imx/mx7ulp/clock.c @@ -72,7 +72,7 @@ u32 get_lpuart_clk(void) return pcc_clock_get_rate(lpuart_pcc_clks[index - 4]); } -#ifdef CONFIG_SYS_LPI2C_IMX +#ifdef CONFIG_SYS_I2C_IMX_LPI2C int enable_i2c_clk(unsigned char enable, unsigned i2c_num) { /* Set parent to FIRC DIV2 clock */ @@ -300,9 +300,11 @@ void clock_init(void) scg_a7_soscdiv_init(); - /* APLL PFD1 = 270Mhz, PFD2=480Mhz, PFD3=800Mhz */ + scg_a7_init_core_clk(); + + /* APLL PFD1 = 270Mhz, PFD2=345.6Mhz, PFD3=800Mhz */ scg_enable_pll_pfd(SCG_APLL_PFD1_CLK, 35); - scg_enable_pll_pfd(SCG_APLL_PFD2_CLK, 20); + scg_enable_pll_pfd(SCG_APLL_PFD2_CLK, 28); scg_enable_pll_pfd(SCG_APLL_PFD3_CLK, 12); init_clk_lpuart(); @@ -312,7 +314,7 @@ void clock_init(void) enable_usboh3_clk(1); } -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB void hab_caam_clock_enable(unsigned char enable) { if (enable) diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index b4f2ea8..819c90a 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -352,7 +352,7 @@ static u32 scg_ddr_get_rate(void) static u32 scg_nic_get_rate(enum scg_clk clk) { - u32 reg, val, rate; + u32 reg, val, rate, nic0_rate; u32 shift, mask; reg = readl(&scg1_regs->niccsr); @@ -370,6 +370,7 @@ static u32 scg_nic_get_rate(enum scg_clk clk) val = (reg & SCG_NICCSR_NIC0DIV_MASK) >> SCG_NICCSR_NIC0DIV_SHIFT; rate = rate / (val + 1); + nic0_rate = rate; clk_debug("scg_nic_get_rate NIC0 rate %u\n", rate); @@ -411,6 +412,13 @@ static u32 scg_nic_get_rate(enum scg_clk clk) return 0; } + /* + * On RevB, the nic_bus and nic_ext dividers are parallel + * not chained with nic div + */ + if (soc_rev() >= CHIP_REV_2_0) + rate = nic0_rate; + val = (reg & mask) >> shift; rate = rate / (val + 1); @@ -440,7 +448,7 @@ static u32 scg_sys_get_rate(enum scg_clk clk) case SCG_SCS_SLOW_IRC: case SCG_SCS_FAST_IRC: case SCG_SCS_RTC_OSC: - rate = scg_src_get_rate(scg_scs_array[val]); + rate = scg_src_get_rate(scg_scs_array[val - 1]); break; case 5: rate = scg_apll_get_rate(); @@ -503,7 +511,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_A7_APLL: reg = readl(&scg1_regs->apllcsr); @@ -532,7 +543,10 @@ u32 decode_pll(enum pll_clocks pll) infreq = infreq / pre_div; - return infreq * mult + infreq * num / denom; + if (denom) + return infreq * mult + infreq * num / denom; + else + return infreq * mult; case PLL_USB: reg = readl(&scg1_regs->upllcsr); @@ -1085,3 +1099,44 @@ void scg_a7_info(void) debug("SCG RCCR Value: 0x%x\n", readl(&scg1_regs->rccr)); debug("SCG Clock Status: 0x%x\n", readl(&scg1_regs->csr)); } + +void scg_a7_init_core_clk(void) +{ + u32 val = 0; + + /* + * The normal target frequency for ULP B0 is 500Mhz, + * but ROM set it to 413Mhz, need to change SPLL PFD0 FRAC + */ + if (soc_rev() >= CHIP_REV_2_0) { + /* Switch RCCR SCG to SOSC, firstly check the SOSC is valid */ + if ((readl(&scg1_regs->sosccsr) & SCG_SOSC_CSR_SOSCVLD_MASK)) { + val = readl(&scg1_regs->rccr); + val &= (~SCG_CCR_SCS_MASK); + val |= ((SCG_SCS_SYS_OSC) << SCG_CCR_SCS_SHIFT); + writel(val, &scg1_regs->rccr); + + /* Switch the PLLS to SPLL clk */ + val = readl(&scg1_regs->spllcfg); + val &= ~SCG_PLL_CFG_PLLSEL_MASK; + writel(val, &scg1_regs->spllcfg); + + /* + * Re-configure PFD0 to 19, + * A7 SPLL(528MHz) * 18 / 19 = 500MHz + */ + scg_enable_pll_pfd(SCG_SPLL_PFD0_CLK, 19); + + /* Switch the PLLS to SPLL PFD0 */ + val = readl(&scg1_regs->spllcfg); + val |= SCG_PLL_CFG_PLLSEL_MASK; + writel(val, &scg1_regs->spllcfg); + + /* Set RCCR SCG to SPLL clk out */ + val = readl(&scg1_regs->rccr); + val &= (~SCG_CCR_SCS_MASK); + val |= ((SCG_SCS_SYS_PLL) << SCG_CCR_SCS_SHIFT); + writel(val, &scg1_regs->rccr); + } + } +} diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c index c72f0ed..127fcfe 100644 --- a/arch/arm/mach-imx/mx7ulp/soc.c +++ b/arch/arm/mach-imx/mx7ulp/soc.c @@ -6,21 +6,25 @@ #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> #include <asm/arch/sys_proto.h> +#include <asm/mach-imx/boot_mode.h> #include <asm/mach-imx/hab.h> static char *get_reset_cause(char *); -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_IMX_HAB) struct imx_sec_config_fuse_t const imx_sec_config_fuse = { .bank = 29, .word = 6, }; #endif +#define ROM_VERSION_ADDR 0x80 u32 get_cpu_rev(void) { - /* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */ - return (MXC_CPU_MX7ULP << 12) | (1 << 4); + /* Check the ROM version for cpu revision */ + u32 rom_version = readl((void __iomem *)ROM_VERSION_ADDR); + + return (MXC_CPU_MX7ULP << 12) | (rom_version & 0xFF); } #ifdef CONFIG_REVISION_TAG @@ -105,6 +109,10 @@ void s_init(void) /* clock configuration. */ clock_init(); + if (soc_rev() < CHIP_REV_2_0) { + /* enable dumb pmic */ + writel((readl(SNVS_LP_LPCR) | SNVS_LPCR_DPEN), SNVS_LP_LPCR); + } return; } @@ -244,3 +252,29 @@ int mmc_get_env_dev(void) return board_mmc_get_env_dev(devno); } #endif + +enum boot_device get_boot_device(void) +{ + struct bootrom_sw_info **p = + (struct bootrom_sw_info **)ROM_SW_INFO_ADDR; + + enum boot_device boot_dev = SD1_BOOT; + u8 boot_type = (*p)->boot_dev_type; + u8 boot_instance = (*p)->boot_dev_instance; + + switch (boot_type) { + case BOOT_TYPE_SD: + boot_dev = boot_instance + SD1_BOOT; + break; + case BOOT_TYPE_MMC: + boot_dev = boot_instance + MMC1_BOOT; + break; + case BOOT_TYPE_USB: + boot_dev = USB_BOOT; + break; + default: + break; + } + + return boot_dev; +} diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c index 1f230ac..f025c4b 100644 --- a/arch/arm/mach-imx/spl.c +++ b/arch/arm/mach-imx/spl.c @@ -18,13 +18,17 @@ DECLARE_GLOBAL_DATA_PTR; +__weak int spl_board_boot_device(enum boot_device boot_dev_spl) +{ + return 0; +} + #if defined(CONFIG_MX6) /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */ u32 spl_boot_device(void) { unsigned int bmode = readl(&src_base->sbmr2); u32 reg = imx6_src_get_boot_mode(); - u32 mmc_index = ((reg >> 11) & 0x03); /* * Check for BMODE if serial downloader is enabled @@ -85,15 +89,19 @@ u32 spl_boot_device(void) /* SD/eSD: 8.5.3, Table 8-15 */ case IMX6_BMODE_SD: case IMX6_BMODE_ESD: + return BOOT_DEVICE_MMC1; + /* MMC/eMMC: 8.5.3 */ case IMX6_BMODE_MMC: case IMX6_BMODE_EMMC: - if (mmc_index == 1) - return BOOT_DEVICE_MMC2; - else - return BOOT_DEVICE_MMC1; + return BOOT_DEVICE_MMC1; /* NAND Flash: 8.5.2, Table 8-10 */ case IMX6_BMODE_NAND_MIN ... IMX6_BMODE_NAND_MAX: return BOOT_DEVICE_NAND; +#if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) + /* QSPI boot */ + case IMX6_BMODE_QSPI: + return BOOT_DEVICE_SPI; +#endif } return BOOT_DEVICE_NONE; } @@ -127,6 +135,9 @@ u32 spl_boot_device(void) enum boot_device boot_device_spl = get_boot_device(); + if (IS_ENABLED(CONFIG_IMX8MM)) + return spl_board_boot_device(boot_device_spl); + switch (boot_device_spl) { #if defined(CONFIG_MX7) case SD1_BOOT: @@ -178,7 +189,18 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */ u32 spl_boot_mode(const u32 boot_device) { +/* + * When CONFIG_SPL_FORCE_MMC_BOOT is defined the 'boot_device' is used + * unconditionally to decide about device to use for booting. + * This is crucial for falcon boot mode, when board boots up (i.e. ROM + * loads SPL) from slow SPI-NOR memory and afterwards the SPL's 'falcon' boot + * mode is used to load Linux OS from eMMC partition. + */ +#ifdef CONFIG_SPL_FORCE_MMC_BOOT + switch (boot_device) { +#else switch (spl_boot_device()) { +#endif /* for MMC return either RAW or FAT mode */ case BOOT_DEVICE_MMC1: case BOOT_DEVICE_MMC2: @@ -198,7 +220,7 @@ u32 spl_boot_mode(const u32 boot_device) } #endif -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_IMX_HAB) /* * +------------+ 0x0 (DDR_UIMAGE_START) - @@ -261,6 +283,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) } } +#if !defined(CONFIG_SPL_FIT_SIGNATURE) ulong board_spl_fit_size_align(ulong size) { /* @@ -285,6 +308,7 @@ void board_spl_fit_post_load(ulong load_addr, size_t length) hang(); } } +#endif #endif diff --git a/arch/arm/mach-imx/spl_qspi.cfg b/arch/arm/mach-imx/spl_qspi.cfg new file mode 100644 index 0000000..88956e6 --- /dev/null +++ b/arch/arm/mach-imx/spl_qspi.cfg @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + */ + +#define __ASSEMBLY__ +#include <config.h> + +IMAGE_VERSION 2 +BOOT_FROM qspi + +/* + * Secure boot support + */ +#ifdef CONFIG_SECURE_BOOT +CSF CONFIG_CSF_SIZE +#endif diff --git a/arch/arm/mach-imx/spl_sd.cfg b/arch/arm/mach-imx/spl_sd.cfg index e791deb..dbaee81 100644 --- a/arch/arm/mach-imx/spl_sd.cfg +++ b/arch/arm/mach-imx/spl_sd.cfg @@ -12,6 +12,6 @@ BOOT_FROM sd /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index ed8056e..4c87cbc 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -11,7 +11,7 @@ config OMAP34XX select ARM_ERRATA_454179 select ARM_ERRATA_621766 select ARM_ERRATA_725233 - select USE_TINY_PRINTF if SPL + select SPL_USE_TINY_PRINTF if SPL imply NAND_OMAP_GPMC imply SPL_FS_EXT4 imply SPL_FS_FAT @@ -31,7 +31,7 @@ config OMAP34XX config OMAP44XX bool "OMAP44XX SoC" - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply NAND_OMAP_ELM imply NAND_OMAP_GPMC imply SPL_DISPLAY_PRINT @@ -124,7 +124,7 @@ config AM33XX imply SPL_NAND_SUPPORT imply SYS_I2C_OMAP24XX imply SYS_THUMB_BUILD - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF help Support for AM335x SOC from Texas Instruments. The AM335x high performance SOC features a Cortex-A8 diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig index 52ab891..8343000 100644 --- a/arch/arm/mach-rmobile/Kconfig +++ b/arch/arm/mach-rmobile/Kconfig @@ -32,7 +32,7 @@ config RCAR_GEN3 imply SPL_SYS_MALLOC_SIMPLE imply SPL_TINY_MEMSET imply SPL_YMODEM_SUPPORT - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF config RZA1 prompt "Renesas ARM SoCs RZ/A1 (32bit)" diff --git a/arch/arm/mach-rmobile/Kconfig.32 b/arch/arm/mach-rmobile/Kconfig.32 index 1441c80..d5e437f 100644 --- a/arch/arm/mach-rmobile/Kconfig.32 +++ b/arch/arm/mach-rmobile/Kconfig.32 @@ -65,7 +65,7 @@ config TARGET_GOSE select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_KOELSCH @@ -74,7 +74,7 @@ config TARGET_KOELSCH select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_LAGER @@ -83,7 +83,7 @@ config TARGET_LAGER select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_KZM9G @@ -95,7 +95,7 @@ config TARGET_ALT select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_SILK @@ -104,7 +104,7 @@ config TARGET_SILK select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_PORTER @@ -113,7 +113,7 @@ config TARGET_PORTER select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM config TARGET_STOUT @@ -122,7 +122,7 @@ config TARGET_STOUT select DM_SERIAL select SPL_TINY_MEMSET select SUPPORT_SPL - select USE_TINY_PRINTF + select SPL_USE_TINY_PRINTF imply CMD_DM endchoice diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 33137cc..92102b3 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -14,9 +14,12 @@ DECLARE_GLOBAL_DATA_PTR; -void board_return_to_bootrom(void) +int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) { back_to_bootrom(BROM_BOOT_NEXTSTAGE); + + return 0; } __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index 55f6e92..c3734cb 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -77,9 +77,12 @@ void board_init_f(ulong dummy) } } -void board_return_to_bootrom(void) +int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) { back_to_bootrom(BROM_BOOT_NEXTSTAGE); + + return 0; } u32 spl_boot_device(void) diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index 1d91464..45de153 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -4,7 +4,7 @@ config NR_DRAM_BANKS default 1 config SPL_SIZE_LIMIT - default 65536 if TARGET_SOCFPGA_GEN5 + default 0x10000 if TARGET_SOCFPGA_GEN5 config SPL_SIZE_LIMIT_PROVIDE_STACK default 0x200 if TARGET_SOCFPGA_GEN5 @@ -45,7 +45,7 @@ config TARGET_SOCFPGA_ARRIA10 select SPL_SYSCON if SPL select ETH_DESIGNWARE_SOCFPGA imply FPGA_SOCFPGA - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF config TARGET_SOCFPGA_CYCLONE5 bool @@ -59,7 +59,7 @@ config TARGET_SOCFPGA_GEN5 imply SPL_SIZE_LIMIT_SUBTRACT_MALLOC imply SPL_STACK_R imply SPL_SYS_MALLOC_SIMPLE - imply USE_TINY_PRINTF + imply SPL_USE_TINY_PRINTF config TARGET_SOCFPGA_STRATIX10 bool diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index f13bd25..07f54f0 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -6,7 +6,6 @@ #include <common.h> #include <dm.h> -#include <efi_loader.h> #include <env.h> #include <errno.h> #include <ns16550.h> @@ -224,19 +223,6 @@ int board_early_init_f(void) int board_late_init(void) { -#if CONFIG_IS_ENABLED(EFI_LOADER) - if (gd->bd->bi_dram[1].start) { - /* - * Only bank 0 is below board_get_usable_ram_top(), so all of - * bank 1 is not mapped by the U-Boot MMU configuration, and so - * we must prevent EFI from using it. - */ - efi_add_memory_map(gd->bd->bi_dram[1].start, - gd->bd->bi_dram[1].size >> EFI_PAGE_SHIFT, - EFI_BOOT_SERVICES_DATA, false); - } -#endif - #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) if (tegra_cpu_is_non_secure()) { printf("CPU is in NS mode\n"); diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c index c4d3b17..b45f72f 100644 --- a/arch/arm/mach-uniphier/pinctrl-glue.c +++ b/arch/arm/mach-uniphier/pinctrl-glue.c @@ -13,14 +13,14 @@ int uniphier_pin_init(const char *pinconfig_name) { - struct udevice *pctldev, *config, *next; + struct udevice *pctldev, *config; int ret; ret = uclass_first_device(UCLASS_PINCTRL, &pctldev); if (ret) return ret; - device_foreach_child_safe(config, next, pctldev) { + device_foreach_child(config, pctldev) { if (strcmp(config->name, pinconfig_name)) continue; diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c index fdfb209..2046cb5 100644 --- a/arch/sandbox/cpu/cpu.c +++ b/arch/sandbox/cpu/cpu.c @@ -225,6 +225,58 @@ phys_addr_t map_to_sysmem(const void *ptr) return mentry->tag; } +unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size) +{ + struct sandbox_state *state = state_get_current(); + + if (!state->allow_memio) + return 0; + + switch (size) { + case SB_SIZE_8: + return *(u8 *)addr; + case SB_SIZE_16: + return *(u16 *)addr; + case SB_SIZE_32: + return *(u32 *)addr; + case SB_SIZE_64: + return *(u64 *)addr; + } + + return 0; +} + +void sandbox_write(const void *addr, unsigned int val, + enum sandboxio_size_t size) +{ + struct sandbox_state *state = state_get_current(); + + if (!state->allow_memio) + return; + + switch (size) { + case SB_SIZE_8: + *(u8 *)addr = val; + break; + case SB_SIZE_16: + *(u16 *)addr = val; + break; + case SB_SIZE_32: + *(u32 *)addr = val; + break; + case SB_SIZE_64: + *(u64 *)addr = val; + break; + } +} + +void sandbox_set_enable_memio(bool enable) +{ + struct sandbox_state *state = state_get_current(); + + state->allow_memio = enable; +} + void sandbox_set_enable_pci_map(int enable) { enable_pci_map = enable; diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index 4f415c7..44c68a3 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -78,3 +78,10 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) } hang(); } + +int handoff_arch_save(struct spl_handoff *ho) +{ + ho->arch.magic = TEST_HANDOFF_MAGIC; + + return 0; +} diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 82828f0..cfc542c 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -147,6 +147,31 @@ static int sandbox_cmdline_cb_default_fdt(struct sandbox_state *state, SANDBOX_CMDLINE_OPT_SHORT(default_fdt, 'D', 0, "Use the default u-boot.dtb control FDT in U-Boot directory"); +static int sandbox_cmdline_cb_test_fdt(struct sandbox_state *state, + const char *arg) +{ + const char *fmt = "/arch/sandbox/dts/test.dtb"; + char *p; + char *fname; + int len; + + len = strlen(state->argv[0]) + strlen(fmt) + 1; + fname = os_malloc(len); + if (!fname) + return -ENOMEM; + strcpy(fname, state->argv[0]); + p = strrchr(fname, '/'); + if (!p) + p = fname + strlen(fname); + len -= p - fname; + snprintf(p, len, fmt, p); + state->fdt_fname = fname; + + return 0; +} +SANDBOX_CMDLINE_OPT_SHORT(test_fdt, 'T', 0, + "Use the test.dtb control FDT in U-Boot directory"); + static int sandbox_cmdline_cb_interactive(struct sandbox_state *state, const char *arg) { diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index c6d5650..f09bc70 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -103,9 +103,14 @@ pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul>; + }; + }; + + emul { + compatible = "sandbox,pci-emul-parent"; + swap_case_emul: emul@1f,0 { + compatible = "sandbox,swap-case"; }; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 27b0baa..25cac05 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -447,29 +447,39 @@ device_type = "pci"; #address-cells = <3>; #size-cells = <2>; - ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000 + ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000 0x01000000 0 0x20000000 0x20000000 0 0x2000>; pci@0,0 { compatible = "pci-generic"; reg = <0x0000 0 0 0 0>; - emul@0,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul0_0>; }; pci@1,0 { compatible = "pci-generic"; - reg = <0x0800 0 0 0 0>; - emul@0,0 { - compatible = "sandbox,swap-case"; - use-ea; - }; + /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */ + reg = <0x02000814 0 0 0 0 + 0x01000810 0 0 0 0>; + sandbox,emul = <&swap_case_emul0_1>; }; pci@1f,0 { compatible = "pci-generic"; - reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; + /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */ + reg = <0x0100f810 0 0 0 0>; + sandbox,emul = <&swap_case_emul0_1f>; + }; + }; + + pci-emul0 { + compatible = "sandbox,pci-emul-parent"; + swap_case_emul0_0: emul0@0,0 { + compatible = "sandbox,swap-case"; + }; + swap_case_emul0_1: emul0@1,0 { + compatible = "sandbox,swap-case"; + use-ea; + }; + swap_case_emul0_1f: emul0@1f,0 { + compatible = "sandbox,swap-case"; }; }; @@ -499,9 +509,14 @@ pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { - compatible = "sandbox,swap-case"; - }; + sandbox,emul = <&swap_case_emul2_1f>; + }; + }; + + pci-emul2 { + compatible = "sandbox,pci-emul-parent"; + swap_case_emul2_1f: emul2@1f,0 { + compatible = "sandbox,swap-case"; }; }; @@ -713,11 +728,13 @@ compatible = "sandbox,spmi"; #address-cells = <0x1>; #size-cells = <0x1>; + ranges; pm8916@0 { compatible = "qcom,spmi-pmic"; reg = <0x0 0x1>; #address-cells = <0x1>; #size-cells = <0x1>; + ranges; spmi_gpios: gpios@c000 { compatible = "qcom,pm8916-gpio"; diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h index 2a350a8..4a35c41 100644 --- a/arch/sandbox/include/asm/io.h +++ b/arch/sandbox/include/asm/io.h @@ -6,6 +6,13 @@ #ifndef __SANDBOX_ASM_IO_H #define __SANDBOX_ASM_IO_H +enum sandboxio_size_t { + SB_SIZE_8, + SB_SIZE_16, + SB_SIZE_32, + SB_SIZE_64, +}; + void *phys_to_virt(phys_addr_t paddr); #define phys_to_virt phys_to_virt @@ -38,18 +45,21 @@ static inline void unmap_sysmem(const void *vaddr) /* Map from a pointer to our RAM buffer */ phys_addr_t map_to_sysmem(const void *ptr); -/* Define nops for sandbox I/O access */ -#define readb(addr) ((void)addr, 0) -#define readw(addr) ((void)addr, 0) -#define readl(addr) ((void)addr, 0) +unsigned int sandbox_read(const void *addr, enum sandboxio_size_t size); +void sandbox_write(const void *addr, unsigned int val, + enum sandboxio_size_t size); + +#define readb(addr) sandbox_read((const void *)addr, SB_SIZE_8) +#define readw(addr) sandbox_read((const void *)addr, SB_SIZE_16) +#define readl(addr) sandbox_read((const void *)addr, SB_SIZE_32) #ifdef CONFIG_SANDBOX64 -#define readq(addr) ((void)addr, 0) +#define readq(addr) sandbox_read((const void *)addr, SB_SIZE_64) #endif -#define writeb(v, addr) ((void)addr) -#define writew(v, addr) ((void)addr) -#define writel(v, addr) ((void)addr) +#define writeb(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_8) +#define writew(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_16) +#define writel(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_32) #ifdef CONFIG_SANDBOX64 -#define writeq(v, addr) ((void)addr) +#define writeq(v, addr) sandbox_write((const void *)addr, v, SB_SIZE_64) #endif /* @@ -110,13 +120,21 @@ phys_addr_t map_to_sysmem(const void *ptr); #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) /* I/O access functions */ -int inl(unsigned int addr); -int inw(unsigned int addr); -int inb(unsigned int addr); +int _inl(unsigned int addr); +int _inw(unsigned int addr); +int _inb(unsigned int addr); + +void _outl(unsigned int value, unsigned int addr); +void _outw(unsigned int value, unsigned int addr); +void _outb(unsigned int value, unsigned int addr); -void outl(unsigned int value, unsigned int addr); -void outw(unsigned int value, unsigned int addr); -void outb(unsigned int value, unsigned int addr); +#define inb(port) _inb((uintptr_t)(port)) +#define inw(port) _inw((uintptr_t)(port)) +#define inl(port) _inl((uintptr_t)(port)) + +#define outb(val, port) _outb(val, (uintptr_t)(port)) +#define outw(val, port) _outw(val, (uintptr_t)(port)) +#define outl(val, port) _outl(val, (uintptr_t)(port)) #define out_arch(type,endian,a,v) write##type(cpu_to_##endian(v),a) #define in_arch(type,endian,a) endian##_to_cpu(read##type(a)) @@ -188,6 +206,28 @@ static inline void memcpy_toio(volatile void *dst, const void *src, int count) #define insw(port, buf, ns) _insw((u16 *)port, buf, ns) #define outsw(port, buf, ns) _outsw((u16 *)port, buf, ns) +/* IO space accessors */ +#define clrio(type, addr, clear) \ + out##type(in##type(addr) & ~(clear), (addr)) + +#define setio(type, addr, set) \ + out##type(in##type(addr) | (set), (addr)) + +#define clrsetio(type, addr, clear, set) \ + out##type((in##type(addr) & ~(clear)) | (set), (addr)) + +#define clrio_32(addr, clear) clrio(l, addr, clear) +#define clrio_16(addr, clear) clrio(w, addr, clear) +#define clrio_8(addr, clear) clrio(b, addr, clear) + +#define setio_32(addr, set) setio(l, addr, set) +#define setio_16(addr, set) setio(w, addr, set) +#define setio_8(addr, set) setio(b, addr, set) + +#define clrsetio_32(addr, clear, set) clrsetio(l, addr, clear, set) +#define clrsetio_16(addr, clear, set) clrsetio(w, addr, clear, set) +#define clrsetio_8(addr, clear, set) clrsetio(b, addr, clear, set) + #include <iotrace.h> #include <asm/types.h> diff --git a/arch/sandbox/include/asm/state.h b/arch/sandbox/include/asm/state.h index 2d773d3..ad3e94b 100644 --- a/arch/sandbox/include/asm/state.h +++ b/arch/sandbox/include/asm/state.h @@ -102,6 +102,7 @@ struct sandbox_state { ulong next_tag; /* Next address tag to allocate */ struct list_head mapmem_head; /* struct sandbox_mapmem_entry */ bool hwspinlock; /* Hardware Spinlock status */ + bool allow_memio; /* Allow readl() etc. to work */ /* * This struct is getting large. diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index cbf2096..cd2b9e3 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -12,7 +12,7 @@ #define SANDBOX_I2C_TEST_ADDR 0x59 #define SANDBOX_PCI_VENDOR_ID 0x1234 -#define SANDBOX_PCI_DEVICE_ID 0x5678 +#define SANDBOX_PCI_SWAP_CASE_EMUL_ID 0x5678 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL @@ -198,4 +198,19 @@ int sandbox_get_pch_spi_protect(struct udevice *dev); */ int sandbox_get_pci_ep_irq_count(struct udevice *dev); +/** + * sandbox_pci_read_bar() - Read the BAR value for a read_config operation + * + * This is used in PCI emulators to read a base address reset. This has special + * rules because when the register is set to 0xffffffff it can be used to + * discover the type and size of the BAR. + * + * @barval: Current value of the BAR + * @type: Type of BAR (PCI_BASE_ADDRESS_SPACE_IO or + * PCI_BASE_ADDRESS_MEM_TYPE_32) + * @size: Size of BAR in bytes + * @return BAR value to return from emulator + */ +uint sandbox_pci_read_bar(u32 barval, int type, uint size); + #endif diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c index 01822c6..f22e47c 100644 --- a/arch/sandbox/lib/pci_io.c +++ b/arch/sandbox/lib/pci_io.c @@ -91,7 +91,7 @@ static int pci_io_write(unsigned int addr, ulong value, pci_size_t size) return -ENOSYS; } -int inl(unsigned int addr) +int _inl(unsigned int addr) { unsigned long value; int ret; @@ -101,7 +101,7 @@ int inl(unsigned int addr) return ret ? 0 : value; } -int inw(unsigned int addr) +int _inw(unsigned int addr) { unsigned long value; int ret; @@ -111,7 +111,7 @@ int inw(unsigned int addr) return ret ? 0 : value; } -int inb(unsigned int addr) +int _inb(unsigned int addr) { unsigned long value; int ret; @@ -121,17 +121,17 @@ int inb(unsigned int addr) return ret ? 0 : value; } -void outl(unsigned int value, unsigned int addr) +void _outl(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_32); } -void outw(unsigned int value, unsigned int addr) +void _outw(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_16); } -void outb(unsigned int value, unsigned int addr) +void _outb(unsigned int value, unsigned int addr) { pci_io_write(addr, value, PCI_SIZE_8); } diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 218e817..47bf28c 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -364,6 +364,37 @@ config HAVE_FSP Note: Without this binary U-Boot will not be able to set up its SDRAM so will not boot. +config USE_CAR + bool "Use Cache-As-RAM (CAR) to get temporary RAM at start-up" + default y if !HAVE_FSP + help + Select this option if your board uses CAR init code, typically in a + car.S file, to get some initial memory for code execution. This is + common with Intel CPUs which don't use FSP. + +choice + prompt "FSP version" + depends on HAVE_FSP + default FSP_VERSION1 + help + Selects the FSP version to use. Intel has published several versions + of the FSP External Architecture Specification and this allows + selection of the version number used by a particular SoC. + +config FSP_VERSION1 + bool "FSP version 1.x" + help + This covers versions 1.0 and 1.1a. See here for details: + https://github.com/IntelFsp/fsp/wiki + +config FSP_VERSION2 + bool "FSP version 2.x" + help + This covers versions 2.0 and 2.1. See here for details: + https://github.com/IntelFsp/fsp/wiki + +endchoice + config FSP_FILE string "Firmware Support Package binary filename" depends on HAVE_FSP @@ -429,7 +460,7 @@ config ENABLE_MRC_CACHE For platforms that use Intel FSP for the memory initialization, please check FSP output HOB via U-Boot command 'fsp hob' to see - if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp/fsp_hob.h). + if there is FSP_NON_VOLATILE_STORAGE_HOB_GUID (asm/fsp1/fsp_hob.h). If such GUID does not exist, MRC cache is not available on such platform (eg: Intel Queensbay), which means selecting this option here does not make any difference. diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 3f1f62d..6296b55 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -26,7 +26,10 @@ endif extra-$(CONFIG_$(SPL_TPL_)X86_16BIT_INIT) += resetvec.o start16.o -obj-y += cpu.o cpu_x86.o +obj-y += cpu.o +ifndef CONFIG_TPL_BUILD +obj-y += cpu_x86.o +endif ifndef CONFIG_$(SPL_)X86_64 AFLAGS_REMOVE_call32.o := -mregparm=3 \ diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c index 445e4ba..f44228e 100644 --- a/arch/x86/cpu/baytrail/acpi.c +++ b/arch/x86/cpu/baytrail/acpi.c @@ -4,10 +4,10 @@ */ #include <common.h> +#include <acpi_s3.h> #include <cpu.h> #include <dm.h> #include <dm/uclass-internal.h> -#include <asm/acpi_s3.h> #include <asm/acpi_table.h> #include <asm/io.h> #include <asm/tables.h> @@ -167,7 +167,7 @@ void acpi_create_gnvs(struct acpi_global_nvs *gnvs) * and PMC_BASE_ADDRESS are accessed, so we need make sure the base addresses * of these two blocks are programmed by either U-Boot or FSP. * - * It has been verified that 1st phase API (see arch/x86/lib/fsp/fsp_car.S) + * It has been verified that 1st phase API (see arch/x86/lib/fsp1/fsp_car.S) * on Intel BayTrail SoC already initializes these two base addresses so * we are safe to access these registers here. */ diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 2eb9172..9394eab 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -68,9 +68,9 @@ static void set_max_freq(void) msr_t msr; /* Enable speed step */ - msr = msr_read(MSR_IA32_MISC_ENABLES); - msr.lo |= (1 << 16); - msr_write(MSR_IA32_MISC_ENABLES, msr); + msr = msr_read(MSR_IA32_MISC_ENABLE); + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; + msr_write(MSR_IA32_MISC_ENABLE, msr); /* * Set guaranteed ratio [21:16] from IACORE_RATIOS to bits [15:8] of diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c index cefd262..1d1948c 100644 --- a/arch/x86/cpu/baytrail/fsp_configs.c +++ b/arch/x86/cpu/baytrail/fsp_configs.c @@ -7,7 +7,7 @@ #include <common.h> #include <fdtdec.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; @@ -27,7 +27,7 @@ __weak void update_fsp_azalia_configs(struct azalia_config **azalia) * If the device tree does not specify an integer setting, use the default * provided in Intel's Baytrail_FSP_Gold4.tgz release FSP/BayleyBayFsp.bsf file. */ -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { struct upd_region *fsp_upd = &config->fsp_upd; diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c index 7fe6fa7..60101d7 100644 --- a/arch/x86/cpu/braswell/fsp_configs.c +++ b/arch/x86/cpu/braswell/fsp_configs.c @@ -5,7 +5,7 @@ #include <common.h> #include <fdtdec.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; @@ -40,7 +40,7 @@ __weak void update_fsp_gpio_configs(struct gpio_family **family, * If the device tree does not specify an integer setting, use the default * provided in Intel's Braswell release FSP/BraswellFsp.bsf file. */ -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { struct upd_region *fsp_upd = &config->fsp_upd; diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index bb7c361..55a7439 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -41,12 +41,9 @@ int arch_cpu_init_dm(void) void set_max_freq(void) { - msr_t msr, perf_ctl, platform_info; + msr_t msr, perf_ctl; - /* Check for configurable TDP option */ - platform_info = msr_read(MSR_PLATFORM_INFO); - - if ((platform_info.hi >> 1) & 3) { + if (cpu_config_tdp_levels()) { /* Set to nominal TDP ratio */ msr = msr_read(MSR_CONFIG_TDP_NOMINAL); perf_ctl.lo = (msr.lo & 0xff) << 8; @@ -57,17 +54,22 @@ void set_max_freq(void) } perf_ctl.hi = 0; - msr_write(IA32_PERF_CTL, perf_ctl); + msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("CPU: frequency set to %d MHz\n", - ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } int arch_cpu_init(void) { post_code(POST_CPU_INIT); +#ifdef CONFIG_TPL + /* Do a mini-init if TPL has already done the full init */ + return x86_cpu_reinit_f(); +#else return x86_cpu_init_f(); +#endif } int checkcpu(void) @@ -98,11 +100,8 @@ int print_cpuinfo(void) void board_debug_uart_init(void) { - struct udevice *bus = NULL; - /* com1 / com2 decode range */ - pci_x86_write_config(bus, PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16); + pci_x86_write_config(PCH_DEV_LPC, LPC_IO_DEC, 1 << 4, PCI_SIZE_16); - pci_x86_write_config(bus, PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, - PCI_SIZE_16); + pci_x86_write_config(PCH_DEV_LPC, LPC_EN, COMA_LPC_EN, PCI_SIZE_16); } diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c index c1db184..895edeb 100644 --- a/arch/x86/cpu/broadwell/cpu_full.c +++ b/arch/x86/cpu/broadwell/cpu_full.c @@ -81,6 +81,13 @@ static const u8 power_limit_time_msr_to_sec[] = { [0x11] = 128, }; +#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) +int arch_cpu_init(void) +{ + return 0; +} +#endif + /* * The core 100MHz BLCK is disabled in deeper c-states. One needs to calibrate * the 100MHz BCLCK against the 24MHz BLCK to restore the clocks properly @@ -322,15 +329,6 @@ static int bsp_init_before_ap_bringup(struct udevice *dev) return 0; } -static int cpu_config_tdp_levels(void) -{ - msr_t platform_info; - - /* Bits 34:33 indicate how many levels supported */ - platform_info = msr_read(MSR_PLATFORM_INFO); - return (platform_info.hi >> 1) & 3; -} - static void set_max_ratio(void) { msr_t msr, perf_ctl; @@ -339,7 +337,7 @@ static void set_max_ratio(void) /* Check for configurable TDP option */ if (turbo_get_state() == TURBO_ENABLED) { - msr = msr_read(MSR_NHM_TURBO_RATIO_LIMIT); + msr = msr_read(MSR_TURBO_RATIO_LIMIT); perf_ctl.lo = (msr.lo & 0xff) << 8; } else if (cpu_config_tdp_levels()) { /* Set to nominal TDP ratio */ @@ -350,10 +348,10 @@ static void set_max_ratio(void) msr = msr_read(MSR_PLATFORM_INFO); perf_ctl.lo = msr.lo & 0xff00; } - msr_write(IA32_PERF_CTL, perf_ctl); + msr_write(MSR_IA32_PERF_CTL, perf_ctl); debug("cpu: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); + ((perf_ctl.lo >> 8) & 0xff) * INTEL_BCLK_MHZ); } int broadwell_init(struct udevice *dev) @@ -472,9 +470,9 @@ static void configure_misc(void) msr_t msr; msr = msr_read(MSR_IA32_MISC_ENABLE); - msr.lo |= (1 << 0); /* Fast String enable */ - msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */ - msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ + msr.lo |= MISC_ENABLE_FAST_STRING; + msr.lo |= MISC_ENABLE_TM1; + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; msr_write(MSR_IA32_MISC_ENABLE, msr); /* Disable thermal interrupts */ @@ -488,24 +486,6 @@ static void configure_misc(void) msr_write(MSR_IA32_PACKAGE_THERM_INTERRUPT, msr); } -static void configure_thermal_target(struct udevice *dev) -{ - int tcc_offset; - msr_t msr; - - tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "intel,tcc-offset", 0); - - /* Set TCC activaiton offset if supported */ - msr = msr_read(MSR_PLATFORM_INFO); - if ((msr.lo & (1 << 30)) && tcc_offset) { - msr = msr_read(MSR_TEMPERATURE_TARGET); - msr.lo &= ~(0xf << 24); /* Bits 27:24 */ - msr.lo |= (tcc_offset & 0xf) << 24; - msr_write(MSR_TEMPERATURE_TARGET, msr); - } -} - static void configure_dca_cap(void) { struct cpuid_result cpuid_regs; @@ -555,7 +535,7 @@ static void cpu_core_init(struct udevice *dev) configure_misc(); /* Thermal throttle activation offset */ - configure_thermal_target(dev); + cpu_configure_thermal_target(dev); /* Enable Direct Cache Access */ configure_dca_cap(); @@ -645,14 +625,7 @@ void cpu_set_power_limits(int power_limit_1_time) static int broadwell_get_info(struct udevice *dev, struct cpu_info *info) { - msr_t msr; - - msr = msr_read(IA32_PERF_CTL); - info->cpu_freq = ((msr.lo >> 8) & 0xff) * BROADWELL_BCLK * 1000000; - info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | - 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; - - return 0; + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); } static int broadwell_get_count(struct udevice *dev) diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 290ee08..9ee4b02 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -19,13 +19,13 @@ */ #include <common.h> +#include <acpi_s3.h> #include <command.h> #include <dm.h> #include <errno.h> #include <malloc.h> #include <syscon.h> #include <asm/acpi.h> -#include <asm/acpi_s3.h> #include <asm/acpi_table.h> #include <asm/control_regs.h> #include <asm/coreboot_tables.h> diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c index d0ac178..4d093a5 100644 --- a/arch/x86/cpu/intel_common/cpu.c +++ b/arch/x86/cpu/intel_common/cpu.c @@ -1,11 +1,17 @@ // SPDX-License-Identifier: GPL-2.0 /* + * Copyright (C) 2014 Google Inc. * Copyright (c) 2016 Google, Inc + * Copyright (C) 2015-2018 Intel Corporation. + * Copyright (C) 2018 Siemens AG + * Some code taken from coreboot cpulib.c */ #include <common.h> +#include <cpu.h> #include <dm.h> #include <errno.h> +#include <asm/cpu.h> #include <asm/cpu_common.h> #include <asm/intel_regs.h> #include <asm/lapic.h> @@ -110,3 +116,113 @@ int cpu_set_flex_ratio_to_tdp_nominal(void) /* Not reached */ return -EINVAL; } + +int cpu_intel_get_info(struct cpu_info *info, int bclk) +{ + msr_t msr; + + msr = msr_read(MSR_IA32_PERF_CTL); + info->cpu_freq = ((msr.lo >> 8) & 0xff) * bclk * 1000000; + info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | + 1 << CPU_FEAT_UCODE | 1 << CPU_FEAT_DEVICE_ID; + + return 0; +} + +int cpu_configure_thermal_target(struct udevice *dev) +{ + u32 tcc_offset; + msr_t msr; + int ret; + + ret = dev_read_u32(dev, "tcc-offset", &tcc_offset); + if (!ret) + return -ENOENT; + + /* Set TCC activaiton offset if supported */ + msr = msr_read(MSR_PLATFORM_INFO); + if (msr.lo & (1 << 30)) { + msr = msr_read(MSR_TEMPERATURE_TARGET); + msr.lo &= ~(0xf << 24); /* Bits 27:24 */ + msr.lo |= (tcc_offset & 0xf) << 24; + msr_write(MSR_TEMPERATURE_TARGET, msr); + } + + return 0; +} + +void cpu_set_perf_control(uint clk_ratio) +{ + msr_t perf_ctl; + + perf_ctl.lo = (clk_ratio & 0xff) << 8; + perf_ctl.hi = 0; + msr_write(MSR_IA32_PERF_CTL, perf_ctl); + debug("CPU: frequency set to %d MHz\n", clk_ratio * INTEL_BCLK_MHZ); +} + +bool cpu_config_tdp_levels(void) +{ + msr_t platform_info; + + /* Bits 34:33 indicate how many levels supported */ + platform_info = msr_read(MSR_PLATFORM_INFO); + + return ((platform_info.hi >> 1) & 3) != 0; +} + +void cpu_set_p_state_to_turbo_ratio(void) +{ + msr_t msr; + + msr = msr_read(MSR_TURBO_RATIO_LIMIT); + cpu_set_perf_control(msr.lo); +} + +enum burst_mode_t cpu_get_burst_mode_state(void) +{ + enum burst_mode_t state; + int burst_en, burst_cap; + msr_t msr; + uint eax; + + eax = cpuid_eax(0x6); + burst_cap = eax & 0x2; + msr = msr_read(MSR_IA32_MISC_ENABLE); + burst_en = !(msr.hi & BURST_MODE_DISABLE); + + if (!burst_cap && burst_en) + state = BURST_MODE_UNAVAILABLE; + else if (burst_cap && !burst_en) + state = BURST_MODE_DISABLED; + else if (burst_cap && burst_en) + state = BURST_MODE_ENABLED; + else + state = BURST_MODE_UNKNOWN; + + return state; +} + +void cpu_set_burst_mode(bool burst_mode) +{ + msr_t msr; + + msr = msr_read(MSR_IA32_MISC_ENABLE); + if (burst_mode) + msr.hi &= ~BURST_MODE_DISABLE; + else + msr.hi |= BURST_MODE_DISABLE; + msr_write(MSR_IA32_MISC_ENABLE, msr); +} + +void cpu_set_eist(bool eist_status) +{ + msr_t msr; + + msr = msr_read(MSR_IA32_MISC_ENABLE); + if (eist_status) + msr.lo |= MISC_ENABLE_ENHANCED_SPEEDSTEP; + else + msr.lo &= ~MISC_ENABLE_ENHANCED_SPEEDSTEP; + msr_write(MSR_IA32_MISC_ENABLE, msr); +} diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c index a6233c7..b7bb524 100644 --- a/arch/x86/cpu/intel_common/cpu_from_spl.c +++ b/arch/x86/cpu/intel_common/cpu_from_spl.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <errno.h> +#include <handoff.h> #include <asm/cpu_common.h> #include <asm/intel_regs.h> #include <asm/lapic.h> @@ -21,6 +22,11 @@ int arch_cpu_init(void) { int ret; +#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB) + struct spl_handoff *ho = gd->spl_handoff; + + gd->arch.hob_list = ho->arch.hob_list; +#endif ret = x86_cpu_reinit_f(); return ret; diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index c8b16e3..6db9da8 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -199,6 +199,5 @@ int print_cpuinfo(void) void board_debug_uart_init(void) { /* This enables the debug UART */ - pci_x86_write_config(NULL, PCH_LPC_DEV, LPC_EN, COMA_LPC_EN, - PCI_SIZE_16); + pci_x86_write_config(PCH_LPC_DEV, LPC_EN, COMA_LPC_EN, PCI_SIZE_16); } diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c index 2fd06b3..0e6453c 100644 --- a/arch/x86/cpu/ivybridge/fsp_configs.c +++ b/arch/x86/cpu/ivybridge/fsp_configs.c @@ -5,11 +5,11 @@ #include <common.h> #include <fdtdec.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { struct platform_config *plat_config = &config->plat_config; diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c index 6edc3e2..56ab6bf 100644 --- a/arch/x86/cpu/ivybridge/model_206ax.c +++ b/arch/x86/cpu/ivybridge/model_206ax.c @@ -12,6 +12,7 @@ #include <fdtdec.h> #include <malloc.h> #include <asm/cpu.h> +#include <asm/cpu_common.h> #include <asm/cpu_x86.h> #include <asm/msr.h> #include <asm/msr-index.h> @@ -139,19 +140,16 @@ static const u8 power_limit_time_msr_to_sec[] = { [0x11] = 128, }; -int cpu_config_tdp_levels(void) +bool cpu_ivybridge_config_tdp_levels(void) { struct cpuid_result result; - msr_t platform_info; /* Minimum CPU revision */ result = cpuid(1); if (result.eax < IVB_CONFIG_TDP_MIN_CPUID) - return 0; + return false; - /* Bits 34:33 indicate how many levels supported */ - platform_info = msr_read(MSR_PLATFORM_INFO); - return (platform_info.hi >> 1) & 3; + return cpu_config_tdp_levels(); } /* @@ -212,7 +210,7 @@ void set_power_limits(u8 power_limit_1_time) msr_write(MSR_PKG_POWER_LIMIT, limit); /* Use nominal TDP values for CPUs with configurable TDP */ - if (cpu_config_tdp_levels()) { + if (cpu_ivybridge_config_tdp_levels()) { msr = msr_read(MSR_CONFIG_TDP_NOMINAL); limit.hi = 0; limit.lo = msr.lo & 0xff; @@ -282,26 +280,6 @@ static void configure_c_states(void) msr_write(MSR_PP1_CURRENT_CONFIG, msr); } -static int configure_thermal_target(struct udevice *dev) -{ - int tcc_offset; - msr_t msr; - - tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), - "tcc-offset", 0); - - /* Set TCC activaiton offset if supported */ - msr = msr_read(MSR_PLATFORM_INFO); - if ((msr.lo & (1 << 30)) && tcc_offset) { - msr = msr_read(MSR_TEMPERATURE_TARGET); - msr.lo &= ~(0xf << 24); /* Bits 27:24 */ - msr.lo |= (tcc_offset & 0xf) << 24; - msr_write(MSR_TEMPERATURE_TARGET, msr); - } - - return 0; -} - static void configure_misc(void) { msr_t msr; @@ -348,24 +326,20 @@ static void configure_dca_cap(void) static void set_max_ratio(void) { - msr_t msr, perf_ctl; - - perf_ctl.hi = 0; + msr_t msr; + uint ratio; /* Check for configurable TDP option */ - if (cpu_config_tdp_levels()) { + if (cpu_ivybridge_config_tdp_levels()) { /* Set to nominal TDP ratio */ msr = msr_read(MSR_CONFIG_TDP_NOMINAL); - perf_ctl.lo = (msr.lo & 0xff) << 8; + ratio = msr.lo & 0xff; } else { /* Platform Info bits 15:8 give max ratio */ msr = msr_read(MSR_PLATFORM_INFO); - perf_ctl.lo = msr.lo & 0xff00; + ratio = (msr.lo & 0xff00) >> 8; } - msr_write(MSR_IA32_PERF_CTL, perf_ctl); - - debug("model_x06ax: frequency set to %d\n", - ((perf_ctl.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK); + cpu_set_perf_control(ratio); } static void set_energy_perf_bias(u8 policy) @@ -413,10 +387,11 @@ static int model_206ax_init(struct udevice *dev) configure_misc(); /* Thermal throttle activation offset */ - ret = configure_thermal_target(dev); + ret = cpu_configure_thermal_target(dev); if (ret) { debug("Cannot set thermal target\n"); - return ret; + if (ret != -ENOENT) + return ret; } /* Enable Direct Cache Access */ @@ -436,12 +411,7 @@ static int model_206ax_init(struct udevice *dev) static int model_206ax_get_info(struct udevice *dev, struct cpu_info *info) { - msr_t msr; - - msr = msr_read(MSR_IA32_PERF_CTL); - info->cpu_freq = ((msr.lo >> 8) & 0xff) * SANDYBRIDGE_BCLK * 1000000; - info->features = 1 << CPU_FEAT_L1_CACHE | 1 << CPU_FEAT_MMU | - 1 << CPU_FEAT_UCODE; + return cpu_intel_get_info(info, INTEL_BCLK_MHZ); return 0; } diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c index a809b82..0f427af 100644 --- a/arch/x86/cpu/ivybridge/northbridge.c +++ b/arch/x86/cpu/ivybridge/northbridge.c @@ -141,7 +141,7 @@ static void northbridge_init(struct udevice *dev, int rev) * CPUs with configurable TDP also need power limits set * in MCHBAR. Use same values from MSR_PKG_POWER_LIMIT. */ - if (cpu_config_tdp_levels()) { + if (cpu_ivybridge_config_tdp_levels()) { msr_t msr = msr_read(MSR_PKG_POWER_LIMIT); writel(msr.lo, MCHBAR_REG(0x59A0)); diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c index 0939736..a00db42 100644 --- a/arch/x86/cpu/mtrr.c +++ b/arch/x86/cpu/mtrr.c @@ -50,11 +50,20 @@ void mtrr_close(struct mtrr_state *state, bool do_caches) enable_caches(); } +static void set_var_mtrr(uint reg, uint type, uint64_t start, uint64_t size) +{ + u64 mask; + + wrmsrl(MTRR_PHYS_BASE_MSR(reg), start | type); + mask = ~(size - 1); + mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; + wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask | MTRR_PHYS_MASK_VALID); +} + int mtrr_commit(bool do_caches) { struct mtrr_request *req = gd->arch.mtrr_req; struct mtrr_state state; - uint64_t mask; int i; debug("%s: enabled=%d, count=%d\n", __func__, gd->arch.has_mtrr, @@ -65,12 +74,8 @@ int mtrr_commit(bool do_caches) debug("open\n"); mtrr_open(&state, do_caches); debug("open done\n"); - for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) { - mask = ~(req->size - 1); - mask &= (1ULL << CONFIG_CPU_ADDR_BITS) - 1; - wrmsrl(MTRR_PHYS_BASE_MSR(i), req->start | req->type); - wrmsrl(MTRR_PHYS_MASK_MSR(i), mask | MTRR_PHYS_MASK_VALID); - } + for (i = 0; i < gd->arch.mtrr_req_count; i++, req++) + set_var_mtrr(i, req->type, req->start, req->size); /* Clear the ones that are unused */ debug("clear\n"); @@ -107,3 +112,41 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size) return 0; } + +static int get_var_mtrr_count(void) +{ + return msr_read(MSR_MTRR_CAP_MSR).lo & MSR_MTRR_CAP_VCNT; +} + +static int get_free_var_mtrr(void) +{ + struct msr_t maskm; + int vcnt; + int i; + + vcnt = get_var_mtrr_count(); + + /* Identify the first var mtrr which is not valid */ + for (i = 0; i < vcnt; i++) { + maskm = msr_read(MTRR_PHYS_MASK_MSR(i)); + if ((maskm.lo & MTRR_PHYS_MASK_VALID) == 0) + return i; + } + + /* No free var mtrr */ + return -ENOSPC; +} + +int mtrr_set_next_var(uint type, uint64_t start, uint64_t size) +{ + int mtrr; + + mtrr = get_free_var_mtrr(); + if (mtrr < 0) + return mtrr; + + set_var_mtrr(mtrr, type, start, size); + debug("MTRR %x: start=%x, size=%x\n", mtrr, (uint)start, (uint)size); + + return 0; +} diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c index c621825..e1aae15 100644 --- a/arch/x86/cpu/pci.c +++ b/arch/x86/cpu/pci.c @@ -16,8 +16,8 @@ #include <asm/io.h> #include <asm/pci.h> -int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong *valuep, enum pci_size_t size) +int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, + enum pci_size_t size) { outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); switch (size) { @@ -35,8 +35,8 @@ int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, return 0; } -int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong value, enum pci_size_t size) +int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, + enum pci_size_t size) { outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR); switch (size) { @@ -54,6 +54,21 @@ int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, return 0; } +int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set, + enum pci_size_t size) +{ + ulong value; + int ret; + + ret = pci_x86_read_config(bdf, offset, &value, size); + if (ret) + return ret; + value &= ~clr; + value |= set; + + return pci_x86_write_config(bdf, offset, value, size); +} + void pci_assign_irqs(int bus, int device, u8 irq[4]) { pci_dev_t bdf; diff --git a/arch/x86/cpu/queensbay/fsp_configs.c b/arch/x86/cpu/queensbay/fsp_configs.c index c4d1177..381edd0 100644 --- a/arch/x86/cpu/queensbay/fsp_configs.c +++ b/arch/x86/cpu/queensbay/fsp_configs.c @@ -5,9 +5,9 @@ */ #include <common.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> -void update_fsp_configs(struct fsp_config_data *config, +void fsp_update_configs(struct fsp_config_data *config, struct fspinit_rtbuf *rt_buf) { /* Initialize runtime buffer for fsp_init() */ diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c index 76556fc..66737e6 100644 --- a/arch/x86/cpu/queensbay/tnc.c +++ b/arch/x86/cpu/queensbay/tnc.c @@ -12,7 +12,7 @@ #include <asm/post.h> #include <asm/arch/device.h> #include <asm/arch/tnc.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> #include <asm/processor.h> static int __maybe_unused disable_igd(void) diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S index 3c9bdf2..0152463 100644 --- a/arch/x86/cpu/start.S +++ b/arch/x86/cpu/start.S @@ -2,6 +2,18 @@ /* * U-Boot - x86 Startup Code * + * This is always the first code to run from the U-Boot source. To spell it out: + * + * 1. When TPL (Tertiary Program Loader) is enabled, the boot flow is + * TPL->SPL->U-Boot and this file is used for TPL. Then start_from_tpl.S is used + * for SPL and start_from_spl.S is used for U-Boot proper. + * + * 2. When SPL (Secondary Program Loader) is enabled, but not TPL, the boot + * flow is SPL->U-Boot and this file is used for SPL. Then start_from_spl.S is + * used for U-Boot proper. + * + * 3. When neither TPL nor SPL is used, this file is used for U-Boot proper. + * * (C) Copyright 2008-2011 * Graeme Russ, <graeme.russ@gmail.com> * @@ -90,7 +102,7 @@ early_board_init_ret: jmp car_init .globl car_init_ret car_init_ret: -#ifndef CONFIG_USE_HOB +#ifdef CONFIG_USE_CAR /* * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, * or fully initialised SDRAM - we really don't care which) @@ -130,7 +142,7 @@ car_init_ret: /* Get address of global_data */ mov %fs:0, %edx -#ifdef CONFIG_USE_HOB +#if defined(CONFIG_USE_HOB) && !defined(CONFIG_USE_CAR) /* Store the HOB list if we have one */ test %esi, %esi jz skip_hob diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S index 4d4e5d0..a73b4d7 100644 --- a/arch/x86/cpu/start_from_spl.S +++ b/arch/x86/cpu/start_from_spl.S @@ -1,7 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * 32-bit x86 Startup Code when running from SPL - * + * 32-bit x86 Startup Code when running from SPL. This is the startup code in + * U-Boot proper, when SPL is used. + * Copyright 2018 Google, Inc * Written by Simon Glass <sjg@chromium.org> */ diff --git a/arch/x86/cpu/start_from_tpl.S b/arch/x86/cpu/start_from_tpl.S index 44b5363..9a4974a 100644 --- a/arch/x86/cpu/start_from_tpl.S +++ b/arch/x86/cpu/start_from_tpl.S @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * 32-bit x86 Startup Code when running from TPL + * 32-bit x86 Startup Code when running from TPL. This is the startup code in + * SPL, when TPL is used. * * Copyright 2018 Google, Inc * Written by Simon Glass <sjg@chromium.org> diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c index a41d511..be468d2 100644 --- a/arch/x86/cpu/turbo.c +++ b/arch/x86/cpu/turbo.c @@ -60,8 +60,8 @@ int turbo_get_state(void) cpuid_regs = cpuid(CPUID_LEAF_PM); turbo_cap = !!(cpuid_regs.eax & PM_CAP_TURBO_MODE); - msr = msr_read(MSR_IA32_MISC_ENABLES); - turbo_en = !(msr.hi & H_MISC_DISABLE_TURBO); + msr = msr_read(MSR_IA32_MISC_ENABLE); + turbo_en = !(msr.hi & MISC_DISABLE_TURBO); if (!turbo_cap && turbo_en) { /* Unavailable */ @@ -86,9 +86,9 @@ void turbo_enable(void) /* Only possible if turbo is available but hidden */ if (turbo_get_state() == TURBO_DISABLED) { /* Clear Turbo Disable bit in Misc Enables */ - msr = msr_read(MSR_IA32_MISC_ENABLES); - msr.hi &= ~H_MISC_DISABLE_TURBO; - msr_write(MSR_IA32_MISC_ENABLES, msr); + msr = msr_read(MSR_IA32_MISC_ENABLE); + msr.hi &= ~MISC_DISABLE_TURBO; + msr_write(MSR_IA32_MISC_ENABLE, msr); /* Update cached turbo state */ set_global_turbo_state(TURBO_ENABLED); diff --git a/arch/x86/cpu/u-boot-spl.lds b/arch/x86/cpu/u-boot-spl.lds index f20c0b8..c1e9bfb 100644 --- a/arch/x86/cpu/u-boot-spl.lds +++ b/arch/x86/cpu/u-boot-spl.lds @@ -35,6 +35,12 @@ SECTIONS . = ALIGN(4); __data_end = .; __init_end = .; + . = ALIGN(4); + .binman_sym_table : { + __binman_sym_start = .; + KEEP(*(SORT(.binman_sym*))); + __binman_sym_end = .; + } _image_binary_end = .; diff --git a/arch/x86/cpu/wakeup.S b/arch/x86/cpu/wakeup.S index 663b02f..244ca12 100644 --- a/arch/x86/cpu/wakeup.S +++ b/arch/x86/cpu/wakeup.S @@ -5,7 +5,7 @@ * From coreboot src/arch/x86/wakeup.S */ -#include <asm/acpi_s3.h> +#include <acpi_s3.h> #include <asm/processor.h> #include <asm/processor-flags.h> diff --git a/arch/x86/include/asm/arch-broadwell/cpu.h b/arch/x86/include/asm/arch-broadwell/cpu.h index ca22a79..3bc3bd6 100644 --- a/arch/x86/include/asm/arch-broadwell/cpu.h +++ b/arch/x86/include/asm/arch-broadwell/cpu.h @@ -21,9 +21,6 @@ #define CPUID_BROADWELL_D0 0x306d3 #define CPUID_BROADWELL_E0 0x306d4 -/* Broadwell bus clock is fixed at 100MHz */ -#define BROADWELL_BCLK 100 - #define BROADWELL_FAMILY_ULT 0x306d0 #define CORE_THREAD_COUNT_MSR 0x35 diff --git a/arch/x86/include/asm/arch-broadwell/pch.h b/arch/x86/include/asm/arch-broadwell/pch.h index 23153a0..ecdf6d1 100644 --- a/arch/x86/include/asm/arch-broadwell/pch.h +++ b/arch/x86/include/asm/arch-broadwell/pch.h @@ -6,9 +6,6 @@ #ifndef __ASM_ARCH_PCH_H #define __ASM_ARCH_PCH_H -/* CPU bus clock is fixed at 100MHz */ -#define CPU_BCLK 100 - #define PMBASE 0x40 #define ACPI_CNTL 0x44 #define ACPI_EN (1 << 7) diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h b/arch/x86/include/asm/arch-ivybridge/model_206ax.h index 850d96b..4839ebc 100644 --- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h +++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h @@ -8,9 +8,6 @@ #ifndef _ASM_ARCH_MODEL_206AX_H #define _ASM_ARCH_MODEL_206AX_H -/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ -#define SANDYBRIDGE_BCLK 100 - #define CPUID_VMX (1 << 5) #define CPUID_SMX (1 << 6) #define MSR_FEATURE_CONFIG 0x13c @@ -61,6 +58,6 @@ /* Configure power limits for turbo mode */ void set_power_limits(u8 power_limit_1_time); -int cpu_config_tdp_levels(void); +bool cpu_ivybridge_config_tdp_levels(void); #endif diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h index 4c91a5d..cdd99a9 100644 --- a/arch/x86/include/asm/cpu_common.h +++ b/arch/x86/include/asm/cpu_common.h @@ -1,12 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* + * Common code for Intel CPUs + * * Copyright (c) 2016 Google, Inc */ #ifndef __ASM_CPU_COMMON_H #define __ASM_CPU_COMMON_H -#define IA32_PERF_CTL 0x199 +/* Standard Intel bus clock is fixed at 100MHz */ +enum { + INTEL_BCLK_MHZ = 100 +}; + +struct cpu_info; /** * cpu_common_init() - Set up common CPU init @@ -31,4 +38,94 @@ int cpu_common_init(void); */ int cpu_set_flex_ratio_to_tdp_nominal(void); +/** + * cpu_intel_get_info() - Obtain CPU info for Intel CPUs + * + * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same + * features. This function fills in these values, given the value of the base + * clock in MHz (typically this should be set to 100). + * + * @info: cpu_info struct to fill in + * @bclk_mz: the base clock in MHz + * + * @return 0 always + */ +int cpu_intel_get_info(struct cpu_info *info, int bclk_mz); + +/** + * cpu_configure_thermal_target() - Set the thermal target for a CPU + * + * This looks up the tcc-offset property and uses it to set the + * MSR_TEMPERATURE_TARGET value. + * + * @dev: CPU device + * @return 0 if OK, -ENOENT if no target is given in device tree + */ +int cpu_configure_thermal_target(struct udevice *dev); + +/** + * cpu_set_perf_control() - Set the nominal CPU clock speed + * + * This sets the clock speed as a multiplier of BCLK + * + * @clk_ratio: Ratio to use + */ +void cpu_set_perf_control(uint clk_ratio); + +/** + * cpu_config_tdp_levels() - Check for configurable TDP option + * + * @return true if the CPU has configurable TDP (Thermal-design power) + */ +bool cpu_config_tdp_levels(void); + +/** enum burst_mode_t - Burst-mode states */ +enum burst_mode_t { + BURST_MODE_UNKNOWN, + BURST_MODE_UNAVAILABLE, + BURST_MODE_DISABLED, + BURST_MODE_ENABLED +}; + +/* + * cpu_get_burst_mode_state() - Get the Burst/Turbo Mode State + * + * This reads MSR IA32_MISC_ENABLE 0x1A0 + * Bit 38 - TURBO_MODE_DISABLE Bit to get state ENABLED / DISABLED. + * Also checks cpuid 0x6 to see whether burst mode is supported. + * + * @return current burst mode status + */ +enum burst_mode_t cpu_get_burst_mode_state(void); + +/** + * cpu_set_burst_mode() - Set CPU burst mode + * + * @burst_mode: true to enable burst mode, false to disable + */ +void cpu_set_burst_mode(bool burst_mode); + +/** + * cpu_set_eist() - Enable Enhanced Intel Speed Step Technology + * + * @eist_status: true to enable EIST, false to disable + */ +void cpu_set_eist(bool eist_status); + +/** + * cpu_set_p_state_to_turbo_ratio() - Set turbo ratio + * + * TURBO_RATIO_LIMIT MSR (0x1AD) Bits 31:0 indicates the + * factory configured values for of 1-core, 2-core, 3-core + * and 4-core turbo ratio limits for all processors. + * + * 7:0 - MAX_TURBO_1_CORE + * 15:8 - MAX_TURBO_2_CORES + * 23:16 - MAX_TURBO_3_CORES + * 31:24 - MAX_TURBO_4_CORES + * + * Set PERF_CTL MSR (0x199) P_Req with that value. + */ +void cpu_set_p_state_to_turbo_ratio(void); + #endif diff --git a/arch/x86/include/asm/fsp/fsp_hob.h b/arch/x86/include/asm/fsp/fsp_hob.h index 3bb79c4..d248520 100644 --- a/arch/x86/include/asm/fsp/fsp_hob.h +++ b/arch/x86/include/asm/fsp/fsp_hob.h @@ -69,6 +69,10 @@ struct __packed hob_graphics_info { EFI_GUID(0x721acf02, 0x4d77, 0x4c2a, \ 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0) +#define FSP_VARIABLE_NV_DATA_HOB_GUID \ + EFI_GUID(0xa034147d, 0x690c, 0x4154, \ + 0x8d, 0xe6, 0xc0, 0x44, 0x64, 0x1d, 0xe9, 0x42) + #define FSP_BOOTLOADER_TEMP_MEM_HOB_GUID \ EFI_GUID(0xbbcff46c, 0xc8d3, 0x4113, \ 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e) diff --git a/arch/x86/include/asm/fsp/fsp_infoheader.h b/arch/x86/include/asm/fsp/fsp_infoheader.h index 86f7801..e72c052 100644 --- a/arch/x86/include/asm/fsp/fsp_infoheader.h +++ b/arch/x86/include/asm/fsp/fsp_infoheader.h @@ -33,6 +33,19 @@ struct __packed fsp_header { #define FSP_HEADER_REVISION_1 1 #define FSP_HEADER_REVISION_2 2 -#define FSP_ATTR_GRAPHICS_SUPPORT (1 << 0) +enum fsp_type { + FSP_ATTR_COMP_TYPE_FSP_T = 1, + FSP_ATTR_COMP_TYPE_FSP_M = 2, + FSP_ATTR_COMP_TYPE_FSP_S = 3, +}; + +enum { + FSP_ATTR_GRAPHICS_SUPPORT = 1 << 0, + FSP_ATTR_COMP_TYPE_SHIFT = 28, + FSP_ATTR_COMP_TYPE_MASK = 0xfU << FSP_ATTR_COMP_TYPE_SHIFT, + +}; + +#define EFI_FSPH_SIGNATURE SIGNATURE_32('F', 'S', 'P', 'H') #endif diff --git a/arch/x86/include/asm/fsp/fsp_support.h b/arch/x86/include/asm/fsp/fsp_support.h index 7b92392..4ac27d2 100644 --- a/arch/x86/include/asm/fsp/fsp_support.h +++ b/arch/x86/include/asm/fsp/fsp_support.h @@ -7,182 +7,157 @@ #ifndef __FSP_SUPPORT_H__ #define __FSP_SUPPORT_H__ -#include "fsp_types.h" -#include "fsp_hob.h" -#include "fsp_fv.h" -#include "fsp_ffs.h" -#include "fsp_api.h" -#include "fsp_infoheader.h" -#include "fsp_bootmode.h" -#include "fsp_azalia.h" -#include <asm/arch/fsp/fsp_vpd.h> -#include <asm/arch/fsp/fsp_configs.h> +#include <asm/fsp/fsp_bootmode.h> +#include <asm/fsp/fsp_fv.h> +#include <asm/fsp/fsp_hob.h> +#include <asm/fsp/fsp_infoheader.h> +#include <asm/fsp/fsp_types.h> +#include <asm/fsp_arch.h> +#include <asm/fsp/fsp_azalia.h> #define FSP_LOWMEM_BASE 0x100000UL #define FSP_HIGHMEM_BASE 0x100000000ULL #define UPD_TERMINATOR 0x55AA - -/** - * FSP Continuation assembly helper routine - * - * This routine jumps to the C version of FSP continuation function - */ -void asm_continuation(void); - -/** - * FSP initialization complete - * - * This is the function that indicates FSP initialization is complete and jumps - * back to the bootloader with HOB list pointer as the parameter. - * - * @hob_list: HOB list pointer - */ -void fsp_init_done(void *hob_list); - -/** - * FSP Continuation function - * - * @status: Always 0 - * @hob_list: HOB list pointer - * - * @retval: Never returns - */ -void fsp_continue(u32 status, void *hob_list); - -/** - * Find FSP header offset in FSP image - * - * @retval: the offset of FSP header. If signature is invalid, returns 0. - */ -struct fsp_header *find_fsp_header(void); - /** - * FSP initialization wrapper function. + * fsp_find_header() - Find FSP header offset in FSP image * - * @stack_top: bootloader stack top address - * @boot_mode: boot mode defined in fsp_bootmode.h - * @nvs_buf: Non-volatile memory buffer pointer + * @return the offset of FSP header. If signature is invalid, returns 0. */ -void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); +struct fsp_header *fsp_find_header(void); /** - * FSP notification wrapper function + * fsp_notify() - FSP notification wrapper function * * @fsp_hdr: Pointer to FSP information header * @phase: FSP initialization phase defined in enum fsp_phase * - * @retval: compatible status code with EFI_STATUS defined in PI spec + * @return compatible status code with EFI_STATUS defined in PI spec */ u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); /** - * This function retrieves the top of usable low memory. + * fsp_get_usable_lowmem_top() - retrieves the top of usable low memory * * @hob_list: A HOB list pointer. * - * @retval: Usable low memory top. + * @return Usable low memory top. */ u32 fsp_get_usable_lowmem_top(const void *hob_list); /** - * This function retrieves the top of usable high memory. + * fsp_get_usable_highmem_top() - retrieves the top of usable high memory * * @hob_list: A HOB list pointer. * - * @retval: Usable high memory top. + * @return Usable high memory top. */ u64 fsp_get_usable_highmem_top(const void *hob_list); /** - * This function retrieves a special reserved memory region. + * fsp_get_reserved_mem_from_guid() - retrieves a special reserved memory region * * @hob_list: A HOB list pointer. * @len: A pointer to the GUID HOB data buffer length. * If the GUID HOB is located, the length will be updated. * @guid: A pointer to the owner guild. * - * @retval: Reserved region start address. + * @return Reserved region start address. * 0 if this region does not exist. */ u64 fsp_get_reserved_mem_from_guid(const void *hob_list, u64 *len, const efi_guid_t *guid); /** - * This function retrieves the FSP reserved normal memory. + * fsp_get_fsp_reserved_mem() - retrieves the FSP reserved normal memory * * @hob_list: A HOB list pointer. * @len: A pointer to the FSP reserved memory length buffer. * If the GUID HOB is located, the length will be updated. - * @retval: FSP reserved memory base + * @return FSP reserved memory base * 0 if this region does not exist. */ u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len); /** - * This function retrieves the TSEG reserved normal memory. + * fsp_get_tseg_reserved_mem() - retrieves the TSEG reserved normal memory * * @hob_list: A HOB list pointer. * @len: A pointer to the TSEG reserved memory length buffer. * If the GUID HOB is located, the length will be updated. * - * @retval NULL: Failed to find the TSEG reserved memory. - * @retval others: TSEG reserved memory base. + * @return NULL: Failed to find the TSEG reserved memory. + * @return others: TSEG reserved memory base. */ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len); /** - * This function retrieves FSP Non-volatile Storage HOB buffer and size. + * fsp_get_nvs_data() - retrieves FSP Non-volatile Storage HOB buffer and size * * @hob_list: A HOB list pointer. * @len: A pointer to the NVS data buffer length. * If the HOB is located, the length will be updated. * - * @retval NULL: Failed to find the NVS HOB. - * @retval others: FSP NVS data buffer pointer. + * @return NULL: Failed to find the NVS HOB. + * @return others: FSP NVS data buffer pointer. */ void *fsp_get_nvs_data(const void *hob_list, u32 *len); /** - * This function retrieves Bootloader temporary stack buffer and size. + * fsp_get_var_nvs_data() - get FSP variable Non-volatile Storage HOB buffer * * @hob_list: A HOB list pointer. - * @len: A pointer to the bootloader temporary stack length. + * @len: A pointer to the NVS data buffer length. * If the HOB is located, the length will be updated. * - * @retval NULL: Failed to find the bootloader temporary stack HOB. - * @retval others: Bootloader temporary stackbuffer pointer. + * @return NULL: Failed to find the NVS HOB. + * @return others: FSP NVS data buffer pointer. */ -void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); +void *fsp_get_var_nvs_data(const void *hob_list, u32 *len); /** - * This function retrieves graphics information. + * fsp_get_graphics_info() - retrieves graphics information. * * @hob_list: A HOB list pointer. * @len: A pointer to the graphics info HOB length. * If the HOB is located, the length will be updated. * - * @retval NULL: Failed to find the graphics info HOB. - * @retval others: A pointer to struct hob_graphics_info. + * @return NULL: Failed to find the graphics info HOB. + * @return others: A pointer to struct hob_graphics_info. */ void *fsp_get_graphics_info(const void *hob_list, u32 *len); /** - * This function overrides the default configurations of FSP. + * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init + * + * @return 0 if OK, -EPERM if the FSP gave an error. + */ +int fsp_init_phase_pci(void); + +/** + * fsp_scan_for_ram_size() - Scan the HOB list to find the RAM size * - * @config: A pointer to the FSP configuration data structure - * @rt_buf: A pointer to the FSP runtime buffer data structure + * This sets gd->ram_size based on what it finds. * - * @return: None + * @return 0 if OK, -ve on error */ -void update_fsp_configs(struct fsp_config_data *config, - struct fspinit_rtbuf *rt_buf); +int fsp_scan_for_ram_size(void); /** - * fsp_init_phase_pci() - Tell the FSP that we have completed PCI init + * fsp_prepare_mrc_cache() - Find the DRAM training data from the MRC cache * - * @return 0 if OK, -EPERM if the FSP gave an error. + * @return pointer to data, or NULL if no cache or no data found in the cache */ -int fsp_init_phase_pci(void); +void *fsp_prepare_mrc_cache(void); + +/** + * fsp_notify() - FSP notification wrapper function + * + * @fsp_hdr: Pointer to FSP information header + * @phase: FSP initialization phase defined in enum fsp_phase + * + * @return compatible status code with EFI_STATUS defined in PI spec + */ +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase); #endif diff --git a/arch/x86/include/asm/fsp/fsp_api.h b/arch/x86/include/asm/fsp1/fsp_api.h index f2d7079..f2d7079 100644 --- a/arch/x86/include/asm/fsp/fsp_api.h +++ b/arch/x86/include/asm/fsp1/fsp_api.h diff --git a/arch/x86/include/asm/fsp/fsp_ffs.h b/arch/x86/include/asm/fsp1/fsp_ffs.h index b7558e5..b7558e5 100644 --- a/arch/x86/include/asm/fsp/fsp_ffs.h +++ b/arch/x86/include/asm/fsp1/fsp_ffs.h diff --git a/arch/x86/include/asm/fsp1/fsp_support.h b/arch/x86/include/asm/fsp1/fsp_support.h new file mode 100644 index 0000000..a44a550 --- /dev/null +++ b/arch/x86/include/asm/fsp1/fsp_support.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: Intel */ +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + */ + +#ifndef __FSP1_SUPPORT_H__ +#define __FSP1_SUPPORT_H__ + +#include <asm/fsp/fsp_support.h> +#include "fsp_ffs.h" + +/** + * fsp_asm_continuation() - FSP Continuation assembly helper routine + * + * This routine jumps to the C version of FSP continuation function + */ +void fsp_asm_continuation(void); + +/** + * fsp_init_done() - FSP initialization complete + * + * This is the function that indicates FSP initialization is complete and jumps + * back to the bootloader with HOB list pointer as the parameter. + * + * @hob_list: HOB list pointer + */ +void fsp_init_done(void *hob_list); + +/** + * fsp_continue() - FSP Continuation function + * + * @status: Always 0 + * @hob_list: HOB list pointer + * + * @return Never returns + */ +void fsp_continue(u32 status, void *hob_list); + +/** + * fsp_init() - FSP initialization wrapper function + * + * @stack_top: bootloader stack top address + * @boot_mode: boot mode defined in fsp_bootmode.h + * @nvs_buf: Non-volatile memory buffer pointer + */ +void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf); + +/** + * fsp_get_bootloader_tmp_mem() - retrieves temporary stack buffer and size + * + * @hob_list: A HOB list pointer. + * @len: A pointer to the bootloader temporary stack length. + * If the HOB is located, the length will be updated. + * + * @return NULL: Failed to find the bootloader temporary stack HOB. + * @return others: Bootloader temporary stackbuffer pointer. + */ +void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len); + +/** + * fsp_update_configs() - overrides the default configurations of FSP + * + * @config: A pointer to the FSP configuration data structure + * @rt_buf: A pointer to the FSP runtime buffer data structure + * + * @return None + */ +void fsp_update_configs(struct fsp_config_data *config, + struct fspinit_rtbuf *rt_buf); + +#endif diff --git a/arch/x86/include/asm/fsp_arch.h b/arch/x86/include/asm/fsp_arch.h new file mode 100644 index 0000000..3b2077b --- /dev/null +++ b/arch/x86/include/asm/fsp_arch.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 Google LLC + * Written by Simon Glass <sjg@chromium.org> + * + * Architecture-specific definitions (FSP config and VPD/UPD) + */ + +#ifndef __FSP_ARCH_H__ +#define __FSP_ARCH_H__ + +/* + * Note: use #ifndef __ASSEMBLY__ around any struct definitions or other C code + * since this file can be included from assembly. + */ + +#include <asm/fsp1/fsp_api.h> +#include <asm/fsp1/fsp_ffs.h> +#include <asm/arch/fsp/fsp_vpd.h> +#include <asm/arch/fsp/fsp_configs.h> + +#endif diff --git a/arch/x86/include/asm/handoff.h b/arch/x86/include/asm/handoff.h index 4d18d59..aec49b9 100644 --- a/arch/x86/include/asm/handoff.h +++ b/arch/x86/include/asm/handoff.h @@ -9,7 +9,15 @@ #ifndef __x86_asm_handoff_h #define __x86_asm_handoff_h +/** + * struct arch_spl_handoff - architecture-specific handoff info + * + * @usable_ram_top: Value returned by board_get_usable_ram_top() in SPL + * @hob_list: Start of FSP hand-off blocks (HOBs) + */ struct arch_spl_handoff { + ulong usable_ram_top; + void *hob_list; }; #endif diff --git a/arch/x86/include/asm/hob.h b/arch/x86/include/asm/hob.h index b423982..56e11db 100644 --- a/arch/x86/include/asm/hob.h +++ b/arch/x86/include/asm/hob.h @@ -135,7 +135,7 @@ struct hob_guid { * * @hdr: A pointer to a HOB. * - * @return: A pointer to the next HOB in the HOB list. + * @return A pointer to the next HOB in the HOB list. */ static inline const struct hob_header *get_next_hob(const struct hob_header *hdr) @@ -152,8 +152,8 @@ static inline const struct hob_header *get_next_hob(const struct hob_header * * @hdr: A pointer to a HOB. * - * @retval true: The HOB specified by hdr is the last HOB in the HOB list. - * @retval false: The HOB specified by hdr is not the last HOB in the HOB list. + * @return true: The HOB specified by hdr is the last HOB in the HOB list. + * @return false: The HOB specified by hdr is not the last HOB in the HOB list. */ static inline bool end_of_hob(const struct hob_header *hdr) { @@ -169,7 +169,7 @@ static inline bool end_of_hob(const struct hob_header *hdr) * * @hdr: A pointer to a HOB. * - * @return: A pointer to the data buffer in a HOB. + * @return A pointer to the data buffer in a HOB. */ static inline void *get_guid_hob_data(const struct hob_header *hdr) { @@ -185,7 +185,7 @@ static inline void *get_guid_hob_data(const struct hob_header *hdr) * * @hdr: A pointer to a HOB. * - * @return: The size of the data buffer. + * @return The size of the data buffer. */ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) { @@ -198,7 +198,7 @@ static inline u16 get_guid_hob_data_size(const struct hob_header *hdr) * @type: HOB type to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching type; Otherwise NULL. + * @return A HOB object with matching type; Otherwise NULL. */ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list); @@ -208,7 +208,7 @@ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list); * @guid: GUID to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching GUID; Otherwise NULL. + * @return A HOB object with matching GUID; Otherwise NULL. */ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list); @@ -221,8 +221,8 @@ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, * If the GUID HOB is located, the length will be updated. * @guid A pointer to HOB GUID. * - * @retval NULL: Failed to find the GUID HOB. - * @retval others: GUID HOB data buffer pointer. + * @return NULL: Failed to find the GUID HOB. + * @return others: GUID HOB data buffer pointer. */ void *hob_get_guid_hob_data(const void *hob_list, u32 *len, const efi_guid_t *guid); diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 9c1dbe6..5bc8b6c 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -43,6 +43,12 @@ #define MSR_PIC_MSG_CONTROL 0x2e #define PLATFORM_INFO_SET_TDP (1 << 29) +#define MSR_MTRR_CAP_MSR 0x0fe +#define MSR_MTRR_CAP_SMRR (1 << 11) +#define MSR_MTRR_CAP_WC (1 << 10) +#define MSR_MTRR_CAP_FIX (1 << 8) +#define MSR_MTRR_CAP_VCNT 0xff + #define MSR_IA32_PERFCTR0 0x000000c1 #define MSR_IA32_PERFCTR1 0x000000c2 #define MSR_FSB_FREQ 0x000000cd @@ -67,6 +73,11 @@ #define ENABLE_ULFM_AUTOCM_MASK (1 << 2) #define ENABLE_INDP_AUTOCM_MASK (1 << 3) +#define MSR_EMULATE_PM_TIMER 0x121 +#define EMULATE_DELAY_OFFSET_VALUE 20 +#define EMULATE_PM_TMR_EN (1 << 16) +#define EMULATE_DELAY_VALUE 0x13 + #define MSR_IA32_SYSENTER_CS 0x00000174 #define MSR_IA32_SYSENTER_ESP 0x00000175 #define MSR_IA32_SYSENTER_EIP 0x00000176 @@ -78,21 +89,67 @@ #define MSR_FLEX_RATIO 0x194 #define FLEX_RATIO_LOCK (1 << 20) #define FLEX_RATIO_EN (1 << 16) +/* This is burst mode BIT 38 in IA32_MISC_ENABLE MSR at offset 1A0h */ +#define BURST_MODE_DISABLE (1 << 6) + +#define MSR_IA32_MISC_ENABLE 0x000001a0 + +/* MISC_ENABLE bits: architectural */ +#define MISC_ENABLE_FAST_STRING BIT_ULL(0) +#define MISC_ENABLE_TCC BIT_ULL(1) +#define MISC_DISABLE_TURBO BIT_ULL(6) +#define MISC_ENABLE_EMON BIT_ULL(7) +#define MISC_ENABLE_BTS_UNAVAIL BIT_ULL(11) +#define MISC_ENABLE_PEBS_UNAVAIL BIT_ULL(12) +#define MISC_ENABLE_ENHANCED_SPEEDSTEP BIT_ULL(16) +#define MISC_ENABLE_MWAIT BIT_ULL(18) +#define MISC_ENABLE_LIMIT_CPUID BIT_ULL(22) +#define MISC_ENABLE_XTPR_DISABLE BIT_ULL(23) +#define MISC_ENABLE_XD_DISABLE BIT_ULL(34) + +/* MISC_ENABLE bits: model-specific, meaning may vary from core to core */ +#define MISC_ENABLE_X87_COMPAT BIT_ULL(2) +#define MISC_ENABLE_TM1 BIT_ULL(3) +#define MISC_ENABLE_SPLIT_LOCK_DISABLE BIT_ULL(4) +#define MISC_ENABLE_L3CACHE_DISABLE BIT_ULL(6) +#define MISC_ENABLE_SUPPRESS_LOCK BIT_ULL(8) +#define MISC_ENABLE_PREFETCH_DISABLE BIT_ULL(9) +#define MISC_ENABLE_FERR BIT_ULL(10) +#define MISC_ENABLE_FERR_MULTIPLEX BIT_ULL(10) +#define MISC_ENABLE_TM2 BIT_ULL(13) +#define MISC_ENABLE_ADJ_PREF_DISABLE BIT_ULL(19) +#define MISC_ENABLE_SPEEDSTEP_LOCK BIT_ULL(20) +#define MISC_ENABLE_L1D_CONTEXT BIT_ULL(24) +#define MISC_ENABLE_DCU_PREF_DISABLE BIT_ULL(37) +#define MISC_ENABLE_TURBO_DISABLE BIT_ULL(38) +#define MISC_ENABLE_IP_PREF_DISABLE BIT_ULL(39) -#define MSR_IA32_MISC_ENABLES 0x000001a0 #define MSR_TEMPERATURE_TARGET 0x1a2 +#define MSR_PREFETCH_CTL 0x1a4 +#define PREFETCH_L1_DISABLE (1 << 0) +#define PREFETCH_L2_DISABLE (1 << 2) #define MSR_OFFCORE_RSP_0 0x000001a6 #define MSR_OFFCORE_RSP_1 0x000001a7 #define MSR_MISC_PWR_MGMT 0x1aa #define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0) -#define MSR_NHM_TURBO_RATIO_LIMIT 0x000001ad -#define MSR_IVT_TURBO_RATIO_LIMIT 0x000001ae +#define MSR_TURBO_RATIO_LIMIT 0x000001ad #define MSR_IA32_ENERGY_PERFORMANCE_BIAS 0x1b0 #define ENERGY_POLICY_PERFORMANCE 0 #define ENERGY_POLICY_NORMAL 6 #define ENERGY_POLICY_POWERSAVE 15 +#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 + +#define PACKAGE_THERM_STATUS_PROCHOT BIT(0) +#define PACKAGE_THERM_STATUS_POWER_LIMIT BIT(10) + +#define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2 + +#define PACKAGE_THERM_INT_HIGH_ENABLE BIT(0) +#define PACKAGE_THERM_INT_LOW_ENABLE BIT(1) +#define PACKAGE_THERM_INT_PLN_ENABLE BIT(24) + #define MSR_LBR_SELECT 0x000001c8 #define MSR_LBR_TOS 0x000001c9 #define MSR_IA32_PLATFORM_DCA_CAP 0x1f8 @@ -404,68 +461,6 @@ #define MSR_THERM2_CTL_TM_SELECT (1ULL << 16) -#define MSR_IA32_MISC_ENABLE 0x000001a0 -#define H_MISC_DISABLE_TURBO (1 << 6) - -#define MSR_IA32_TEMPERATURE_TARGET 0x000001a2 - -#define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0 -#define ENERGY_PERF_BIAS_PERFORMANCE 0 -#define ENERGY_PERF_BIAS_NORMAL 6 -#define ENERGY_PERF_BIAS_POWERSAVE 15 - -#define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1 - -#define PACKAGE_THERM_STATUS_PROCHOT (1 << 0) -#define PACKAGE_THERM_STATUS_POWER_LIMIT (1 << 10) - -#define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2 - -#define PACKAGE_THERM_INT_HIGH_ENABLE (1 << 0) -#define PACKAGE_THERM_INT_LOW_ENABLE (1 << 1) -#define PACKAGE_THERM_INT_PLN_ENABLE (1 << 24) - -/* Thermal Thresholds Support */ -#define THERM_INT_THRESHOLD0_ENABLE (1 << 15) -#define THERM_SHIFT_THRESHOLD0 8 -#define THERM_MASK_THRESHOLD0 (0x7f << THERM_SHIFT_THRESHOLD0) -#define THERM_INT_THRESHOLD1_ENABLE (1 << 23) -#define THERM_SHIFT_THRESHOLD1 16 -#define THERM_MASK_THRESHOLD1 (0x7f << THERM_SHIFT_THRESHOLD1) -#define THERM_STATUS_THRESHOLD0 (1 << 6) -#define THERM_LOG_THRESHOLD0 (1 << 7) -#define THERM_STATUS_THRESHOLD1 (1 << 8) -#define THERM_LOG_THRESHOLD1 (1 << 9) - -/* MISC_ENABLE bits: architectural */ -#define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0) -#define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1) -#define MSR_IA32_MISC_ENABLE_EMON (1ULL << 7) -#define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1ULL << 11) -#define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1ULL << 12) -#define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP (1ULL << 16) -#define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18) -#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << 22) -#define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << 23) -#define MSR_IA32_MISC_ENABLE_XD_DISABLE (1ULL << 34) - -/* MISC_ENABLE bits: model-specific, meaning may vary from core to core */ -#define MSR_IA32_MISC_ENABLE_X87_COMPAT (1ULL << 2) -#define MSR_IA32_MISC_ENABLE_TM1 (1ULL << 3) -#define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE (1ULL << 4) -#define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << 6) -#define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK (1ULL << 8) -#define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE (1ULL << 9) -#define MSR_IA32_MISC_ENABLE_FERR (1ULL << 10) -#define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX (1ULL << 10) -#define MSR_IA32_MISC_ENABLE_TM2 (1ULL << 13) -#define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE (1ULL << 19) -#define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK (1ULL << 20) -#define MSR_IA32_MISC_ENABLE_L1D_CONTEXT (1ULL << 24) -#define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE (1ULL << 37) -#define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38) -#define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39) - #define MSR_IA32_TSC_DEADLINE 0x000006E0 /* P4/Xeon+ specific */ @@ -600,6 +595,12 @@ #define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490 #define MSR_IA32_VMX_VMFUNC 0x00000491 +#define MSR_IA32_PQR_ASSOC 0xc8f +/* MSR bits 33:32 encode slot number 0-3 */ +#define MSR_IA32_PQR_ASSOC_MASK (1 << 0 | 1 << 1) + +#define MSR_L2_QOS_MASK(reg) (0xd10 + (reg)) + /* VMX_BASIC bits and bitmasks */ #define VMX_BASIC_VMCS_SIZE_SHIFT 32 #define VMX_BASIC_64 0x0001000000000000LLU diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h index 2d897f8..6726172 100644 --- a/arch/x86/include/asm/mtrr.h +++ b/arch/x86/include/asm/mtrr.h @@ -25,6 +25,7 @@ #define MTRR_CAP_FIX (1 << 8) #define MTRR_CAP_VCNT_MASK 0xff +#define MTRR_DEF_TYPE_MASK 0xff #define MTRR_DEF_TYPE_EN (1 << 11) #define MTRR_DEF_TYPE_FIX_EN (1 << 10) @@ -116,6 +117,18 @@ int mtrr_add_request(int type, uint64_t start, uint64_t size); */ int mtrr_commit(bool do_caches); +/** + * mtrr_set_next_var() - set up a variable MTRR + * + * This finds the first free variable MTRR and sets to the given area + * + * @type: Requested type (MTRR_TYPE_) + * @start: Start address + * @size: Size + * @return 0 on success, -ENOSPC if there are no more MTRRs + */ +int mtrr_set_next_var(uint type, uint64_t base, uint64_t size); + #endif #if ((CONFIG_XIP_ROM_SIZE & (CONFIG_XIP_ROM_SIZE - 1)) != 0) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 118ac93..2a72073 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -17,11 +17,48 @@ #ifndef __ASSEMBLY__ -int pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong *valuep, enum pci_size_t size); +/** + * pci_x86_read_config() - Read a configuration value from a device + * + * This function can be called before PCI is set up in driver model. + * + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to read + * @valuep: Place to put the returned value + * @size: Access size + * @return 0 if OK, -ve on error + */ +int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep, + enum pci_size_t size); -int pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, uint offset, - ulong value, enum pci_size_t size); +/** + * pci_bus_write_config() - Write a configuration value to a device + * + * This function can be called before PCI is set up in driver model. + * + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to write + * @value: Value to write + * @size: Access size + * @return 0 if OK, -ve on error + */ +int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value, + enum pci_size_t size); + +/** + * pci_bus_clrset_config32() - Update a configuration value for a device + * + * The register at @offset is updated to (oldvalue & ~clr) | set. This function + * can be called before PCI is set up in driver model. + * + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to update + * @clr: Bits to clear + * @set: Bits to set + * @return 0 if OK, -ve on error + */ +int pci_x86_clrset_config(pci_dev_t bdf, uint offset, ulong clr, ulong set, + enum pci_size_t size); /** * Assign IRQ number to a PCI device diff --git a/arch/x86/include/asm/spl.h b/arch/x86/include/asm/spl.h index 27432b2..1bef487 100644 --- a/arch/x86/include/asm/spl.h +++ b/arch/x86/include/asm/spl.h @@ -10,8 +10,7 @@ #define CONFIG_SPL_BOARD_LOAD_IMAGE enum { - BOOT_DEVICE_SPI = 10, - BOOT_DEVICE_BOARD, + BOOT_DEVICE_SPI_MMAP = 10, BOOT_DEVICE_CROS_VBOOT, }; diff --git a/arch/x86/include/asm/u-boot-x86.h b/arch/x86/include/asm/u-boot-x86.h index c252192..2466ad2 100644 --- a/arch/x86/include/asm/u-boot-x86.h +++ b/arch/x86/include/asm/u-boot-x86.h @@ -74,7 +74,7 @@ u32 isa_map_rom(u32 bus_addr, int size); /* arch/x86/lib/... */ int video_bios_init(void); -/* arch/x86/lib/fsp/... */ +/* arch/x86/lib/fsp1,2/... */ /** * fsp_save_s3_stack() - save stack address to CMOS for next S3 boot diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 906be5e..ca0ca10 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile @@ -44,6 +44,8 @@ obj-$(CONFIG_CMD_ZBOOT) += zimage.o endif obj-$(CONFIG_USE_HOB) += hob.o obj-$(CONFIG_HAVE_FSP) += fsp/ +obj-$(CONFIG_FSP_VERSION1) += fsp1/ +obj-$(CONFIG_FSP_VERSION2) += fsp2/ ifdef CONFIG_SPL_BUILD ifdef CONFIG_TPL_BUILD diff --git a/arch/x86/lib/acpi_s3.c b/arch/x86/lib/acpi_s3.c index 0391718..197636c 100644 --- a/arch/x86/lib/acpi_s3.c +++ b/arch/x86/lib/acpi_s3.c @@ -4,8 +4,8 @@ */ #include <common.h> +#include <acpi_s3.h> #include <asm/acpi.h> -#include <asm/acpi_s3.h> #include <asm/acpi_table.h> #include <asm/post.h> #include <linux/linkage.h> diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c index 2d08a2d..8685aa3 100644 --- a/arch/x86/lib/coreboot_table.c +++ b/arch/x86/lib/coreboot_table.c @@ -4,8 +4,8 @@ */ #include <common.h> +#include <acpi_s3.h> #include <vbe.h> -#include <asm/acpi_s3.h> #include <asm/coreboot_tables.h> #include <asm/e820.h> diff --git a/arch/x86/lib/fsp/Makefile b/arch/x86/lib/fsp/Makefile index 870de71..9e34856 100644 --- a/arch/x86/lib/fsp/Makefile +++ b/arch/x86/lib/fsp/Makefile @@ -1,9 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -# Copyright (C) 2015 Google, Inc +# Copyright 2019 Google LLC -obj-y += fsp_car.o obj-y += fsp_common.o obj-y += fsp_dram.o -obj-$(CONFIG_VIDEO_FSP) += fsp_graphics.o obj-y += fsp_support.o diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c index ed0827c..40ba866 100644 --- a/arch/x86/lib/fsp/fsp_common.c +++ b/arch/x86/lib/fsp/fsp_common.c @@ -4,10 +4,10 @@ */ #include <common.h> +#include <acpi_s3.h> #include <dm.h> #include <errno.h> #include <rtc.h> -#include <asm/acpi_s3.h> #include <asm/cmos_layout.h> #include <asm/early_cmos.h> #include <asm/io.h> @@ -55,11 +55,9 @@ void board_final_cleanup(void) debug("fail, error code %x\n", status); else debug("OK\n"); - - return; } -static __maybe_unused void *fsp_prepare_mrc_cache(void) +void *fsp_prepare_mrc_cache(void) { struct mrc_data_container *cache; struct mrc_region entry; @@ -104,62 +102,3 @@ int fsp_save_s3_stack(void) return 0; } #endif - -int arch_fsp_init(void) -{ - void *nvs; - int stack = CONFIG_FSP_TEMP_RAM_ADDR; - int boot_mode = BOOT_FULL_CONFIG; -#ifdef CONFIG_HAVE_ACPI_RESUME - int prev_sleep_state = chipset_prev_sleep_state(); - gd->arch.prev_sleep_state = prev_sleep_state; -#endif - - if (!gd->arch.hob_list) { -#ifdef CONFIG_ENABLE_MRC_CACHE - nvs = fsp_prepare_mrc_cache(); -#else - nvs = NULL; -#endif - -#ifdef CONFIG_HAVE_ACPI_RESUME - if (prev_sleep_state == ACPI_S3) { - if (nvs == NULL) { - /* If waking from S3 and no cache then */ - debug("No MRC cache found in S3 resume path\n"); - post_code(POST_RESUME_FAILURE); - /* Clear Sleep Type */ - chipset_clear_sleep_state(); - /* Reboot */ - debug("Rebooting..\n"); - outb(SYS_RST | RST_CPU, IO_PORT_RESET); - /* Should not reach here.. */ - panic("Reboot System"); - } - - /* - * DM is not available yet at this point, hence call - * CMOS access library which does not depend on DM. - */ - stack = cmos_read32(CMOS_FSP_STACK_ADDR); - boot_mode = BOOT_ON_S3_RESUME; - } -#endif - /* - * The first time we enter here, call fsp_init(). - * Note the execution does not return to this function, - * instead it jumps to fsp_continue(). - */ - fsp_init(stack, boot_mode, nvs); - } else { - /* - * The second time we enter here, adjust the size of malloc() - * pool before relocation. Given gd->malloc_base was adjusted - * after the call to board_init_f_init_reserve() in arch/x86/ - * cpu/start.S, we should fix up gd->malloc_limit here. - */ - gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN; - } - - return 0; -} diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c index 3a23b70..2d10230 100644 --- a/arch/x86/lib/fsp/fsp_dram.c +++ b/arch/x86/lib/fsp/fsp_dram.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <handoff.h> #include <asm/fsp/fsp_support.h> #include <asm/e820.h> #include <asm/mrccache.h> @@ -11,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR; -int dram_init(void) +int fsp_scan_for_ram_size(void) { phys_size_t ram_size = 0; const struct hob_header *hdr; @@ -22,9 +23,8 @@ int dram_init(void) if (hdr->type == HOB_TYPE_RES_DESC) { res_desc = (struct hob_res_desc *)hdr; if (res_desc->type == RES_SYS_MEM || - res_desc->type == RES_MEM_RESERVED) { + res_desc->type == RES_MEM_RESERVED) ram_size += res_desc->len; - } } hdr = get_next_hob(hdr); } @@ -32,13 +32,8 @@ int dram_init(void) gd->ram_size = ram_size; post_code(POST_DRAM); -#ifdef CONFIG_ENABLE_MRC_CACHE - gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, - &gd->arch.mrc_output_len); -#endif - return 0; -} +}; int dram_init_banksize(void) { @@ -48,19 +43,6 @@ int dram_init_banksize(void) return 0; } -/* - * This function looks for the highest region of memory lower than 4GB which - * has enough space for U-Boot where U-Boot is aligned on a page boundary. - * It overrides the default implementation found elsewhere which simply - * picks the end of ram, wherever that may be. The location of the stack, - * the relocation address, and how far U-Boot is moved by relocation are - * set in the global data structure. - */ -ulong board_get_usable_ram_top(ulong total_size) -{ - return fsp_get_usable_lowmem_top(gd->arch.hob_list); -} - unsigned int install_e820_map(unsigned int max_entries, struct e820_entry *entries) { @@ -98,7 +80,7 @@ unsigned int install_e820_map(unsigned int max_entries, * reserved in order for ACPI S3 resume to work. */ entries[num_entries].addr = gd->start_addr_sp - CONFIG_STACK_SIZE; - entries[num_entries].size = gd->ram_top - gd->start_addr_sp + \ + entries[num_entries].size = gd->ram_top - gd->start_addr_sp + CONFIG_STACK_SIZE; entries[num_entries].type = E820_RESERVED; num_entries++; @@ -106,3 +88,13 @@ unsigned int install_e820_map(unsigned int max_entries, return num_entries; } + +#if CONFIG_IS_ENABLED(HANDOFF) && IS_ENABLED(CONFIG_USE_HOB) +int handoff_arch_save(struct spl_handoff *ho) +{ + ho->arch.usable_ram_top = fsp_get_usable_lowmem_top(gd->arch.hob_list); + ho->arch.hob_list = gd->arch.hob_list; + + return 0; +} +#endif diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c index 0eaa9b2..983888f 100644 --- a/arch/x86/lib/fsp/fsp_support.c +++ b/arch/x86/lib/fsp/fsp_support.c @@ -5,199 +5,9 @@ */ #include <common.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> #include <asm/post.h> -struct fsp_header *__attribute__((optimize("O0"))) find_fsp_header(void) -{ - /* - * This function may be called before the a stack is established, - * so special care must be taken. First, it cannot declare any local - * variable using stack. Only register variable can be used here. - * Secondly, some compiler version will add prolog or epilog code - * for the C function. If so the function call may not work before - * stack is ready. - * - * GCC 4.8.1 has been verified to be working for the following codes. - */ - volatile register u8 *fsp asm("eax"); - - /* Initalize the FSP base */ - fsp = (u8 *)CONFIG_FSP_ADDR; - - /* Check the FV signature, _FVH */ - if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) { - /* Go to the end of the FV header and align the address */ - fsp += ((struct fv_header *)fsp)->ext_hdr_off; - fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size; - fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8); - } else { - fsp = 0; - } - - /* Check the FFS GUID */ - if (fsp && - ((struct ffs_file_header *)fsp)->name.b[0] == FSP_GUID_BYTE0 && - ((struct ffs_file_header *)fsp)->name.b[1] == FSP_GUID_BYTE1 && - ((struct ffs_file_header *)fsp)->name.b[2] == FSP_GUID_BYTE2 && - ((struct ffs_file_header *)fsp)->name.b[3] == FSP_GUID_BYTE3 && - ((struct ffs_file_header *)fsp)->name.b[4] == FSP_GUID_BYTE4 && - ((struct ffs_file_header *)fsp)->name.b[5] == FSP_GUID_BYTE5 && - ((struct ffs_file_header *)fsp)->name.b[6] == FSP_GUID_BYTE6 && - ((struct ffs_file_header *)fsp)->name.b[7] == FSP_GUID_BYTE7 && - ((struct ffs_file_header *)fsp)->name.b[8] == FSP_GUID_BYTE8 && - ((struct ffs_file_header *)fsp)->name.b[9] == FSP_GUID_BYTE9 && - ((struct ffs_file_header *)fsp)->name.b[10] == FSP_GUID_BYTE10 && - ((struct ffs_file_header *)fsp)->name.b[11] == FSP_GUID_BYTE11 && - ((struct ffs_file_header *)fsp)->name.b[12] == FSP_GUID_BYTE12 && - ((struct ffs_file_header *)fsp)->name.b[13] == FSP_GUID_BYTE13 && - ((struct ffs_file_header *)fsp)->name.b[14] == FSP_GUID_BYTE14 && - ((struct ffs_file_header *)fsp)->name.b[15] == FSP_GUID_BYTE15) { - /* Add the FFS header size to find the raw section header */ - fsp += sizeof(struct ffs_file_header); - } else { - fsp = 0; - } - - if (fsp && - ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) { - /* Add the raw section header size to find the FSP header */ - fsp += sizeof(struct raw_section); - } else { - fsp = 0; - } - - return (struct fsp_header *)fsp; -} - -void fsp_continue(u32 status, void *hob_list) -{ - post_code(POST_MRC); - - assert(status == 0); - - /* The boot loader main function entry */ - fsp_init_done(hob_list); -} - -void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) -{ - struct fsp_config_data config_data; - fsp_init_f init; - struct fsp_init_params params; - struct fspinit_rtbuf rt_buf; - struct fsp_header *fsp_hdr; - struct fsp_init_params *params_ptr; -#ifdef CONFIG_FSP_USE_UPD - struct vpd_region *fsp_vpd; - struct upd_region *fsp_upd; -#endif - - fsp_hdr = find_fsp_header(); - if (fsp_hdr == NULL) { - /* No valid FSP info header was found */ - panic("Invalid FSP header"); - } - - config_data.common.fsp_hdr = fsp_hdr; - config_data.common.stack_top = stack_top; - config_data.common.boot_mode = boot_mode; - -#ifdef CONFIG_FSP_USE_UPD - /* Get VPD region start */ - fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base + - fsp_hdr->cfg_region_off); - - /* Verify the VPD data region is valid */ - assert(fsp_vpd->sign == VPD_IMAGE_ID); - - fsp_upd = &config_data.fsp_upd; - - /* Copy default data from Flash */ - memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset), - sizeof(struct upd_region)); - - /* Verify the UPD data region is valid */ - assert(fsp_upd->terminator == UPD_TERMINATOR); -#endif - - memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); - - /* Override any configuration if required */ - update_fsp_configs(&config_data, &rt_buf); - - memset(¶ms, 0, sizeof(struct fsp_init_params)); - params.nvs_buf = nvs_buf; - params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; - params.continuation = (fsp_continuation_f)asm_continuation; - - init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); - params_ptr = ¶ms; - - post_code(POST_PRE_MRC); - - /* Load GDT for FSP */ - setup_fsp_gdt(); - - /* - * Use ASM code to ensure the register value in EAX & EDX - * will be passed into fsp_continue - */ - asm volatile ( - "pushl %0;" - "call *%%eax;" - ".global asm_continuation;" - "asm_continuation:;" - "movl 4(%%esp), %%eax;" /* status */ - "movl 8(%%esp), %%edx;" /* hob_list */ - "jmp fsp_continue;" - : : "m"(params_ptr), "a"(init) - ); - - /* - * Should never get here. - * Control will continue from fsp_continue. - * This line below is to prevent the compiler from optimizing - * structure intialization. - * - * DO NOT REMOVE! - */ - init(¶ms); -} - -u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) -{ - fsp_notify_f notify; - struct fsp_notify_params params; - struct fsp_notify_params *params_ptr; - u32 status; - - if (!fsp_hdr) - fsp_hdr = (struct fsp_header *)find_fsp_header(); - - if (fsp_hdr == NULL) { - /* No valid FSP info header */ - panic("Invalid FSP header"); - } - - notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify); - params.phase = phase; - params_ptr = ¶ms; - - /* - * Use ASM code to ensure correct parameter is on the stack for - * FspNotify as U-Boot is using different ABI from FSP - */ - asm volatile ( - "pushl %1;" /* push notify phase */ - "call *%%eax;" /* call FspNotify */ - "addl $4, %%esp;" /* clean up the stack */ - : "=a"(status) : "m"(params_ptr), "a"(notify), "m"(*params_ptr) - ); - - return status; -} - u32 fsp_get_usable_lowmem_top(const void *hob_list) { const struct hob_header *hdr; @@ -324,7 +134,7 @@ u32 fsp_get_fsp_reserved_mem(const void *hob_list, u32 *len) base = (u32)fsp_get_reserved_mem_from_guid(hob_list, &length, &guid); - if ((len != 0) && (base != 0)) + if (len && base) *len = (u32)length; return base; @@ -338,7 +148,7 @@ u32 fsp_get_tseg_reserved_mem(const void *hob_list, u32 *len) base = (u32)fsp_get_reserved_mem_from_guid(hob_list, &length, &guid); - if ((len != 0) && (base != 0)) + if (len && base) *len = (u32)length; return base; @@ -351,6 +161,13 @@ void *fsp_get_nvs_data(const void *hob_list, u32 *len) return hob_get_guid_hob_data(hob_list, len, &guid); } +void *fsp_get_var_nvs_data(const void *hob_list, u32 *len) +{ + const efi_guid_t guid = FSP_VARIABLE_NV_DATA_HOB_GUID; + + return hob_get_guid_hob_data(hob_list, len, &guid); +} + void *fsp_get_bootloader_tmp_mem(const void *hob_list, u32 *len) { const efi_guid_t guid = FSP_BOOTLOADER_TEMP_MEM_HOB_GUID; diff --git a/arch/x86/lib/fsp1/Makefile b/arch/x86/lib/fsp1/Makefile new file mode 100644 index 0000000..870de71 --- /dev/null +++ b/arch/x86/lib/fsp1/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2015 Google, Inc + +obj-y += fsp_car.o +obj-y += fsp_common.o +obj-y += fsp_dram.o +obj-$(CONFIG_VIDEO_FSP) += fsp_graphics.o +obj-y += fsp_support.o diff --git a/arch/x86/lib/fsp/fsp_car.S b/arch/x86/lib/fsp1/fsp_car.S index 8c54cea..a64a653 100644 --- a/arch/x86/lib/fsp/fsp_car.S +++ b/arch/x86/lib/fsp1/fsp_car.S @@ -20,10 +20,10 @@ car_init: car_init_start: post_code(POST_CAR_START) - lea find_fsp_header_romstack, %esp - jmp find_fsp_header + lea fsp_find_header_romstack, %esp + jmp fsp_find_header -find_fsp_header_ret: +fsp_find_header_ret: /* EAX points to FSP_INFO_HEADER */ mov %eax, %ebp @@ -91,8 +91,8 @@ die: * contain the function return address as well as the parameters. */ .balign 4 -find_fsp_header_romstack: - .long find_fsp_header_ret +fsp_find_header_romstack: + .long fsp_find_header_ret .balign 4 temp_ram_init_romstack: diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c new file mode 100644 index 0000000..e8066d8 --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_common.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + */ + +#include <common.h> +#include <acpi_s3.h> +#include <dm.h> +#include <errno.h> +#include <rtc.h> +#include <asm/cmos_layout.h> +#include <asm/early_cmos.h> +#include <asm/io.h> +#include <asm/mrccache.h> +#include <asm/post.h> +#include <asm/processor.h> +#include <asm/fsp1/fsp_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +int arch_fsp_init(void) +{ + void *nvs; + int stack = CONFIG_FSP_TEMP_RAM_ADDR; + int boot_mode = BOOT_FULL_CONFIG; +#ifdef CONFIG_HAVE_ACPI_RESUME + int prev_sleep_state = chipset_prev_sleep_state(); + gd->arch.prev_sleep_state = prev_sleep_state; +#endif + + if (!gd->arch.hob_list) { + if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) + nvs = fsp_prepare_mrc_cache(); + else + nvs = NULL; + +#ifdef CONFIG_HAVE_ACPI_RESUME + if (prev_sleep_state == ACPI_S3) { + if (nvs == NULL) { + /* If waking from S3 and no cache then */ + debug("No MRC cache found in S3 resume path\n"); + post_code(POST_RESUME_FAILURE); + /* Clear Sleep Type */ + chipset_clear_sleep_state(); + /* Reboot */ + debug("Rebooting..\n"); + outb(SYS_RST | RST_CPU, IO_PORT_RESET); + /* Should not reach here.. */ + panic("Reboot System"); + } + + /* + * DM is not available yet at this point, hence call + * CMOS access library which does not depend on DM. + */ + stack = cmos_read32(CMOS_FSP_STACK_ADDR); + boot_mode = BOOT_ON_S3_RESUME; + } +#endif + /* + * The first time we enter here, call fsp_init(). + * Note the execution does not return to this function, + * instead it jumps to fsp_continue(). + */ + fsp_init(stack, boot_mode, nvs); + } else { + /* + * The second time we enter here, adjust the size of malloc() + * pool before relocation. Given gd->malloc_base was adjusted + * after the call to board_init_f_init_reserve() in arch/x86/ + * cpu/start.S, we should fix up gd->malloc_limit here. + */ + gd->malloc_limit += CONFIG_FSP_SYS_MALLOC_F_LEN; + } + + return 0; +} diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c new file mode 100644 index 0000000..6a3349b --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_dram.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + */ + +#include <common.h> +#include <asm/fsp/fsp_support.h> + +int dram_init(void) +{ + int ret; + + /* The FSP has already set up DRAM, so grab the info we need */ + ret = fsp_scan_for_ram_size(); + if (ret) + return ret; + + if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) + gd->arch.mrc_output = fsp_get_nvs_data(gd->arch.hob_list, + &gd->arch.mrc_output_len); + + return 0; +} + +/* + * This function looks for the highest region of memory lower than 4GB which + * has enough space for U-Boot where U-Boot is aligned on a page boundary. + * It overrides the default implementation found elsewhere which simply + * picks the end of ram, wherever that may be. The location of the stack, + * the relocation address, and how far U-Boot is moved by relocation are + * set in the global data structure. + */ +ulong board_get_usable_ram_top(ulong total_size) +{ + return fsp_get_usable_lowmem_top(gd->arch.hob_list); +} diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp1/fsp_graphics.c index 91d2d08..52e7133 100644 --- a/arch/x86/lib/fsp/fsp_graphics.c +++ b/arch/x86/lib/fsp1/fsp_graphics.c @@ -7,7 +7,7 @@ #include <dm.h> #include <vbe.h> #include <video.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c new file mode 100644 index 0000000..c7a2c73 --- /dev/null +++ b/arch/x86/lib/fsp1/fsp_support.c @@ -0,0 +1,199 @@ +// SPDX-License-Identifier: Intel +/* + * Copyright (C) 2013, Intel Corporation + * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> + */ + +#include <common.h> +#include <asm/fsp1/fsp_support.h> +#include <asm/post.h> + +struct fsp_header *__attribute__((optimize("O0"))) fsp_find_header(void) +{ + /* + * This function may be called before the a stack is established, + * so special care must be taken. First, it cannot declare any local + * variable using stack. Only register variable can be used here. + * Secondly, some compiler version will add prolog or epilog code + * for the C function. If so the function call may not work before + * stack is ready. + * + * GCC 4.8.1 has been verified to be working for the following codes. + */ + volatile register u8 *fsp asm("eax"); + + /* Initalize the FSP base */ + fsp = (u8 *)CONFIG_FSP_ADDR; + + /* Check the FV signature, _FVH */ + if (((struct fv_header *)fsp)->sign == EFI_FVH_SIGNATURE) { + /* Go to the end of the FV header and align the address */ + fsp += ((struct fv_header *)fsp)->ext_hdr_off; + fsp += ((struct fv_ext_header *)fsp)->ext_hdr_size; + fsp = (u8 *)(((u32)fsp + 7) & 0xFFFFFFF8); + } else { + fsp = 0; + } + + /* Check the FFS GUID */ + if (fsp && + ((struct ffs_file_header *)fsp)->name.b[0] == FSP_GUID_BYTE0 && + ((struct ffs_file_header *)fsp)->name.b[1] == FSP_GUID_BYTE1 && + ((struct ffs_file_header *)fsp)->name.b[2] == FSP_GUID_BYTE2 && + ((struct ffs_file_header *)fsp)->name.b[3] == FSP_GUID_BYTE3 && + ((struct ffs_file_header *)fsp)->name.b[4] == FSP_GUID_BYTE4 && + ((struct ffs_file_header *)fsp)->name.b[5] == FSP_GUID_BYTE5 && + ((struct ffs_file_header *)fsp)->name.b[6] == FSP_GUID_BYTE6 && + ((struct ffs_file_header *)fsp)->name.b[7] == FSP_GUID_BYTE7 && + ((struct ffs_file_header *)fsp)->name.b[8] == FSP_GUID_BYTE8 && + ((struct ffs_file_header *)fsp)->name.b[9] == FSP_GUID_BYTE9 && + ((struct ffs_file_header *)fsp)->name.b[10] == FSP_GUID_BYTE10 && + ((struct ffs_file_header *)fsp)->name.b[11] == FSP_GUID_BYTE11 && + ((struct ffs_file_header *)fsp)->name.b[12] == FSP_GUID_BYTE12 && + ((struct ffs_file_header *)fsp)->name.b[13] == FSP_GUID_BYTE13 && + ((struct ffs_file_header *)fsp)->name.b[14] == FSP_GUID_BYTE14 && + ((struct ffs_file_header *)fsp)->name.b[15] == FSP_GUID_BYTE15) { + /* Add the FFS header size to find the raw section header */ + fsp += sizeof(struct ffs_file_header); + } else { + fsp = 0; + } + + if (fsp && + ((struct raw_section *)fsp)->type == EFI_SECTION_RAW) { + /* Add the raw section header size to find the FSP header */ + fsp += sizeof(struct raw_section); + } else { + fsp = 0; + } + + return (struct fsp_header *)fsp; +} + +void fsp_continue(u32 status, void *hob_list) +{ + post_code(POST_MRC); + + assert(status == 0); + + /* The boot loader main function entry */ + fsp_init_done(hob_list); +} + +void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf) +{ + struct fsp_config_data config_data; + fsp_init_f init; + struct fsp_init_params params; + struct fspinit_rtbuf rt_buf; + struct fsp_header *fsp_hdr; + struct fsp_init_params *params_ptr; +#ifdef CONFIG_FSP_USE_UPD + struct vpd_region *fsp_vpd; + struct upd_region *fsp_upd; +#endif + + fsp_hdr = fsp_find_header(); + if (fsp_hdr == NULL) { + /* No valid FSP info header was found */ + panic("Invalid FSP header"); + } + + config_data.common.fsp_hdr = fsp_hdr; + config_data.common.stack_top = stack_top; + config_data.common.boot_mode = boot_mode; + +#ifdef CONFIG_FSP_USE_UPD + /* Get VPD region start */ + fsp_vpd = (struct vpd_region *)(fsp_hdr->img_base + + fsp_hdr->cfg_region_off); + + /* Verify the VPD data region is valid */ + assert(fsp_vpd->sign == VPD_IMAGE_ID); + + fsp_upd = &config_data.fsp_upd; + + /* Copy default data from Flash */ + memcpy(fsp_upd, (void *)(fsp_hdr->img_base + fsp_vpd->upd_offset), + sizeof(struct upd_region)); + + /* Verify the UPD data region is valid */ + assert(fsp_upd->terminator == UPD_TERMINATOR); +#endif + + memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf)); + + /* Override any configuration if required */ + fsp_update_configs(&config_data, &rt_buf); + + memset(¶ms, 0, sizeof(struct fsp_init_params)); + params.nvs_buf = nvs_buf; + params.rt_buf = (struct fspinit_rtbuf *)&rt_buf; + params.continuation = (fsp_continuation_f)fsp_asm_continuation; + + init = (fsp_init_f)(fsp_hdr->img_base + fsp_hdr->fsp_init); + params_ptr = ¶ms; + + post_code(POST_PRE_MRC); + + /* Load GDT for FSP */ + setup_fsp_gdt(); + + /* + * Use ASM code to ensure the register value in EAX & EDX + * will be passed into fsp_continue + */ + asm volatile ( + "pushl %0;" + "call *%%eax;" + ".global fsp_asm_continuation;" + "fsp_asm_continuation:;" + "movl 4(%%esp), %%eax;" /* status */ + "movl 8(%%esp), %%edx;" /* hob_list */ + "jmp fsp_continue;" + : : "m"(params_ptr), "a"(init) + ); + + /* + * Should never get here. + * Control will continue from fsp_continue. + * This line below is to prevent the compiler from optimizing + * structure intialization. + * + * DO NOT REMOVE! + */ + init(¶ms); +} + +u32 fsp_notify(struct fsp_header *fsp_hdr, u32 phase) +{ + fsp_notify_f notify; + struct fsp_notify_params params; + struct fsp_notify_params *params_ptr; + u32 status; + + if (!fsp_hdr) + fsp_hdr = (struct fsp_header *)fsp_find_header(); + + if (fsp_hdr == NULL) { + /* No valid FSP info header */ + panic("Invalid FSP header"); + } + + notify = (fsp_notify_f)(fsp_hdr->img_base + fsp_hdr->fsp_notify); + params.phase = phase; + params_ptr = ¶ms; + + /* + * Use ASM code to ensure correct parameter is on the stack for + * FspNotify as U-Boot is using different ABI from FSP + */ + asm volatile ( + "pushl %1;" /* push notify phase */ + "call *%%eax;" /* call FspNotify */ + "addl $4, %%esp;" /* clean up the stack */ + : "=a"(status) : "m"(params_ptr), "a"(notify), "m"(*params_ptr) + ); + + return status; +} diff --git a/arch/x86/lib/hob.c b/arch/x86/lib/hob.c index dcee29b..f2c4724 100644 --- a/arch/x86/lib/hob.c +++ b/arch/x86/lib/hob.c @@ -13,7 +13,7 @@ * @type: HOB type to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching type; Otherwise NULL. + * @return A HOB object with matching type; Otherwise NULL. */ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list) { @@ -38,7 +38,7 @@ const struct hob_header *hob_get_next_hob(uint type, const void *hob_list) * @guid: GUID to search * @hob_list: A pointer to the HOB list * - * @retval: A HOB object with matching GUID; Otherwise NULL. + * @return A HOB object with matching GUID; Otherwise NULL. */ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, const void *hob_list) @@ -65,8 +65,8 @@ const struct hob_header *hob_get_next_guid_hob(const efi_guid_t *guid, * If the GUID HOB is located, the length will be updated. * @guid A pointer to HOB GUID. * - * @retval NULL: Failed to find the GUID HOB. - * @retval others: GUID HOB data buffer pointer. + * @return NULL: Failed to find the GUID HOB. + * @return others: GUID HOB data buffer pointer. */ void *hob_get_guid_hob_data(const void *hob_list, u32 *len, const efi_guid_t *guid) diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c index 4774a9b..3e3a11a 100644 --- a/arch/x86/lib/init_helpers.c +++ b/arch/x86/lib/init_helpers.c @@ -12,15 +12,23 @@ DECLARE_GLOBAL_DATA_PTR; int init_cache_f_r(void) { -#if CONFIG_IS_ENABLED(X86_32BIT_INIT) && !defined(CONFIG_HAVE_FSP) && \ - !defined(CONFIG_SYS_SLIMBOOTLOADER) + bool do_mtrr = CONFIG_IS_ENABLED(X86_32BIT_INIT) || + IS_ENABLED(CONFIG_FSP_VERSION2); int ret; - ret = mtrr_commit(false); - /* If MTRR MSR is not implemented by the processor, just ignore it */ - if (ret && ret != -ENOSYS) - return ret; -#endif + do_mtrr &= !IS_ENABLED(CONFIG_FSP_VERSION1) && + !IS_ENABLED(CONFIG_SYS_SLIMBOOTLOADER); + + if (do_mtrr) { + ret = mtrr_commit(false); + /* + * If MTRR MSR is not implemented by the processor, just ignore + * it + */ + if (ret && ret != -ENOSYS) + return ret; + } + /* Initialise the CPU cache(s) */ return init_cache(); } diff --git a/arch/x86/lib/lpc-uclass.c b/arch/x86/lib/lpc-uclass.c index 505d7a9..1302a6e 100644 --- a/arch/x86/lib/lpc-uclass.c +++ b/arch/x86/lib/lpc-uclass.c @@ -10,5 +10,7 @@ UCLASS_DRIVER(lpc) = { .id = UCLASS_LPC, .name = "lpc", +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .post_bind = dm_scan_fdt_dev, +#endif }; diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index 5d5d1a9..2baac91 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -11,6 +11,7 @@ #include <asm/mrccache.h> #include <asm/mtrr.h> #include <asm/processor.h> +#include <asm/spl.h> #include <asm-generic/sections.h> DECLARE_GLOBAL_DATA_PTR; @@ -39,12 +40,7 @@ static int x86_spl_init(void) debug("%s: spl_init() failed\n", __func__); return ret; } -#ifdef CONFIG_TPL - /* Do a mini-init if TPL has already done the full init */ - ret = x86_cpu_reinit_f(); -#else ret = arch_cpu_init(); -#endif if (ret) { debug("%s: arch_cpu_init() failed\n", __func__); return ret; @@ -142,7 +138,7 @@ void board_init_f_r(void) u32 spl_boot_device(void) { - return BOOT_DEVICE_BOARD; + return BOOT_DEVICE_SPI_MMAP; } int spl_start_uboot(void) @@ -168,7 +164,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, return 0; } -SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); +SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image); int spl_spi_load_image(void) { @@ -183,8 +179,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) printf("Jumping to 64-bit U-Boot: Note many features are missing\n"); ret = cpu_jump_to_64bit_uboot(spl_image->entry_point); debug("ret=%d\n", ret); - while (1) - ; + hang(); } #endif diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 492a2d6..cfefa78 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -71,7 +71,7 @@ void board_init_f_r(void) u32 spl_boot_device(void) { return IS_ENABLED(CONFIG_CHROMEOS) ? BOOT_DEVICE_CROS_VBOOT : - BOOT_DEVICE_BOARD; + BOOT_DEVICE_SPI_MMAP; } int spl_start_uboot(void) @@ -97,7 +97,7 @@ static int spl_board_load_image(struct spl_image_info *spl_image, return 0; } -SPL_LOAD_IMAGE_METHOD("SPI", 0, BOOT_DEVICE_BOARD, spl_board_load_image); +SPL_LOAD_IMAGE_METHOD("SPI", 5, BOOT_DEVICE_SPI_MMAP, spl_board_load_image); int spl_spi_load_image(void) { @@ -108,8 +108,7 @@ void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) { printf("Jumping to U-Boot SPL at %lx\n", (ulong)spl_image->entry_point); jump_to_spl(spl_image->entry_point); - while (1) - ; + hang(); } void spl_board_init(void) diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c index ac12f30..8f4c587 100644 --- a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c +++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c @@ -5,7 +5,7 @@ */ #include <common.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> /* ALC262 Verb Table - 10EC0262 */ static const u32 verb_table_data13[] = { diff --git a/board/atmel/common/video_display.c b/board/atmel/common/video_display.c index c7d3f8a..cc051d2 100644 --- a/board/atmel/common/video_display.c +++ b/board/atmel/common/video_display.c @@ -23,7 +23,7 @@ int at91_video_show_board_info(void) int i; u32 len = 0; char buf[255]; - char *corp = "2017 Microchip Technology Inc.\n"; + char *corp = "Microchip Technology Inc.\n"; char temp[32]; struct udevice *dev, *con; const char *s; diff --git a/board/atmel/sam9x60ek/Kconfig b/board/atmel/sam9x60ek/Kconfig new file mode 100644 index 0000000..32fae21 --- /dev/null +++ b/board/atmel/sam9x60ek/Kconfig @@ -0,0 +1,12 @@ +if TARGET_SAM9X60EK + +config SYS_BOARD + default "sam9x60ek" + +config SYS_VENDOR + default "atmel" + +config SYS_CONFIG_NAME + default "sam9x60ek" + +endif diff --git a/board/atmel/sam9x60ek/MAINTAINERS b/board/atmel/sam9x60ek/MAINTAINERS new file mode 100644 index 0000000..d209249 --- /dev/null +++ b/board/atmel/sam9x60ek/MAINTAINERS @@ -0,0 +1,9 @@ +SAM9X60EK BOARD +M: Sandeep Sheriker M <sandeep.sheriker@microchip.com> +M: Eugen Hristev <eugen.hristev@microchip.com> +S: Maintained +F: board/atmel/sam9x60ek/ +F: include/configs/sam9x60ek.h +F: configs/sam9x60ek_mmc_defconfig +F: configs/sam9x60ek_nandflash_defconfig +F: configs/sam9x60ek_qspiflash_defconfig diff --git a/board/atmel/sam9x60ek/Makefile b/board/atmel/sam9x60ek/Makefile new file mode 100644 index 0000000..12a406a --- /dev/null +++ b/board/atmel/sam9x60ek/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries +# +# Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com> + +obj-y += sam9x60ek.o diff --git a/board/atmel/sam9x60ek/sam9x60ek.c b/board/atmel/sam9x60ek/sam9x60ek.c new file mode 100644 index 0000000..182b3ae --- /dev/null +++ b/board/atmel/sam9x60ek/sam9x60ek.c @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + * + * Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com> + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/at91_sfr.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <debug_uart.h> +#include <asm/mach-types.h> + +extern void at91_pda_detect(void); + +DECLARE_GLOBAL_DATA_PTR; + +void at91_prepare_cpu_var(void); + +#ifdef CONFIG_CMD_NAND +static void sam9x60ek_nand_hw_init(void) +{ + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; + struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; + unsigned int csa; + + at91_pio3_set_a_periph(AT91_PIO_PORTD, 0, 1); /* NAND OE */ + at91_pio3_set_a_periph(AT91_PIO_PORTD, 1, 1); /* NAND WE */ + at91_pio3_set_a_periph(AT91_PIO_PORTD, 2, 0); /* NAND ALE */ + at91_pio3_set_a_periph(AT91_PIO_PORTD, 3, 0); /* NAND CLE */ + /* Enable NandFlash */ + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); + /* Configure RDY/BSY */ + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 6, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 7, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 8, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 9, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 10, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 11, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 12, 1); + at91_pio3_set_a_periph(AT91_PIO_PORTD, 13, 1); + + at91_periph_clk_enable(ATMEL_ID_PIOD); + + /* Enable CS3 */ + csa = readl(&sfr->ebicsa); + csa |= AT91_SFR_CCFG_EBI_CSA(3, 1) | AT91_SFR_CCFG_NFD0_ON_D16; + + /* Configure IO drive */ + csa &= ~AT91_SFR_CCFG_EBI_DRIVE_SAM9X60; + + writel(csa, &sfr->ebicsa); + + /* Configure SMC CS3 for NAND/SmartMedia */ + writel(AT91_SMC_SETUP_NWE(4), &smc->cs[3].setup); + + writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(20) | + AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(20), + &smc->cs[3].pulse); + + writel(AT91_SMC_CYCLE_NWE(20) | AT91_SMC_CYCLE_NRD(20), + &smc->cs[3].cycle); + + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | +#ifdef CONFIG_SYS_NAND_DBW_16 + AT91_SMC_MODE_DBW_16 | +#else /* CONFIG_SYS_NAND_DBW_8 */ + AT91_SMC_MODE_DBW_8 | +#endif + AT91_SMC_MODE_TDF | AT91_SMC_MODE_TDF_CYCLE(15), + &smc->cs[3].mode); +} +#endif + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + at91_prepare_cpu_var(); + + at91_pda_detect(); + + return 0; +} +#endif + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +void board_debug_uart_init(void) +{ + at91_seriald_hw_init(); +} +#endif + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + return 0; +} +#endif + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + +#ifdef CONFIG_CMD_NAND + sam9x60ek_nand_hw_init(); +#endif + return 0; +} + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} diff --git a/board/atmel/sama5d27_wlsom1_ek/Kconfig b/board/atmel/sama5d27_wlsom1_ek/Kconfig new file mode 100644 index 0000000..4b192b0 --- /dev/null +++ b/board/atmel/sama5d27_wlsom1_ek/Kconfig @@ -0,0 +1,15 @@ +if TARGET_SAMA5D27_WLSOM1_EK + +config SYS_BOARD + default "sama5d27_wlsom1_ek" + +config SYS_VENDOR + default "atmel" + +config SYS_SOC + default "at91" + +config SYS_CONFIG_NAME + default "sama5d27_wlsom1_ek" + +endif diff --git a/board/atmel/sama5d27_wlsom1_ek/MAINTAINERS b/board/atmel/sama5d27_wlsom1_ek/MAINTAINERS new file mode 100644 index 0000000..ff68cf0 --- /dev/null +++ b/board/atmel/sama5d27_wlsom1_ek/MAINTAINERS @@ -0,0 +1,8 @@ +SAMA5D27 WLSOM1 EK BOARD +M: Nicolas Ferre <nicolas.ferre@microchip.com> +M: Eugen Hristev <eugen.hristev@microchip.com> +S: Maintained +F: board/atmel/sama5d27_wlsom1_ek/ +F: include/configs/sama5d27_wlsom1_ek.h +F: configs/sama5d27_wlsom1_ek_mmc_defconfig +F: configs/sama5d27_wlsom1_ek_qspiflash_defconfig diff --git a/board/atmel/sama5d27_wlsom1_ek/Makefile b/board/atmel/sama5d27_wlsom1_ek/Makefile new file mode 100644 index 0000000..cf827ae --- /dev/null +++ b/board/atmel/sama5d27_wlsom1_ek/Makefile @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries +# +# Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + +obj-y += sama5d27_wlsom1_ek.o diff --git a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c new file mode 100644 index 0000000..fda06c8 --- /dev/null +++ b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c @@ -0,0 +1,252 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + */ + +#include <common.h> +#include <debug_uart.h> +#include <asm/io.h> +#include <asm/arch/at91_common.h> +#include <asm/arch/atmel_pio4.h> +#include <asm/arch/atmel_mpddrc.h> +#include <asm/arch/atmel_sdhci.h> +#include <asm/arch/clk.h> +#include <asm/arch/gpio.h> +#include <asm/arch/sama5d2.h> + +extern void at91_pda_detect(void); + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ +#ifdef CONFIG_DM_VIDEO + at91_video_show_board_info(); +#endif + at91_pda_detect(); + return 0; +} +#endif + +#ifdef CONFIG_DEBUG_UART_BOARD_INIT +static void board_uart0_hw_init(void) +{ + atmel_pio4_set_c_periph(AT91_PIO_PORTB, 26, ATMEL_PIO_PUEN_MASK); /* URXD0 */ + atmel_pio4_set_c_periph(AT91_PIO_PORTB, 27, 0); /* UTXD0 */ + + at91_periph_clk_enable(ATMEL_ID_UART0); +} + +void board_debug_uart_init(void) +{ + board_uart0_hw_init(); +} +#endif + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + + return 0; +} +#endif + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + + return 0; +} + +#ifdef CONFIG_MISC_INIT_R +int misc_init_r(void) +{ + return 0; +} +#endif + +int dram_init(void) +{ + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, + CONFIG_SYS_SDRAM_SIZE); + return 0; +} + +/* SPL */ +#ifdef CONFIG_SPL_BUILD + +static void board_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 6, 0); /* RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 7, 1); /* GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 8, 0); /* BLUE */ +} + +#ifdef CONFIG_SD_BOOT +void spl_mmc_init(void) +{ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 1, 0); /* CMD */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 2, 0); /* DAT0 */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 3, 0); /* DAT1 */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 4, 0); /* DAT2 */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 5, 0); /* DAT3 */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 0, 0); /* CK */ + atmel_pio4_set_a_periph(AT91_PIO_PORTA, 13, 0); /* CD */ + + at91_periph_clk_enable(ATMEL_ID_SDMMC0); +} +#endif + +#ifdef CONFIG_QSPI_BOOT +void spl_qspi_init(void) +{ + atmel_pio4_set_d_periph(AT91_PIO_PORTB, 5, 0); /* SCK */ + atmel_pio4_set_d_periph(AT91_PIO_PORTB, 6, 0); /* CS */ + atmel_pio4_set_d_periph(AT91_PIO_PORTB, 7, 0); /* IO0 */ + atmel_pio4_set_d_periph(AT91_PIO_PORTB, 8, 0); /* IO1 */ + atmel_pio4_set_d_periph(AT91_PIO_PORTB, 9, 0); /* IO2 */ + atmel_pio4_set_d_periph(AT91_PIO_PORTB, 10, 0); /* IO3 */ + + at91_periph_clk_enable(ATMEL_ID_QSPI1); +} +#endif + +void spl_board_init(void) +{ + board_leds_init(); +#ifdef CONFIG_SD_BOOT + spl_mmc_init(); +#endif +#ifdef CONFIG_QSPI_BOOT + spl_qspi_init(); +#endif +} + +void spl_display_print(void) +{ +} + +static void ddrc_conf(struct atmel_mpddrc_config *ddrc) +{ + ddrc->md = (ATMEL_MPDDRC_MD_DBW_32_BITS | ATMEL_MPDDRC_MD_LPDDR2_SDRAM); + + ddrc->cr = (ATMEL_MPDDRC_CR_NC_COL_9 | + ATMEL_MPDDRC_CR_NR_ROW_14 | + ATMEL_MPDDRC_CR_CAS_DDR_CAS3 | + ATMEL_MPDDRC_CR_ZQ_SHORT | + ATMEL_MPDDRC_CR_NB_8BANKS | + ATMEL_MPDDRC_CR_DECOD_INTERLEAVED | + ATMEL_MPDDRC_CR_UNAL_SUPPORTED); + + ddrc->lpddr23_lpr = ATMEL_MPDDRC_LPDDR23_LPR_DS(0x3); + + /* + * The AD220032D average time between REFRESH commands (Trefi): 3.9us + * 3.9us * 164MHz = 639.6 = 0x27F. + */ + ddrc->rtr = 0x27f; + /* Enable Adjust Refresh Rate */ + ddrc->rtr |= ATMEL_MPDDRC_RTR_ADJ_REF; + + ddrc->tpr0 = ((7 << ATMEL_MPDDRC_TPR0_TRAS_OFFSET) | + (3 << ATMEL_MPDDRC_TPR0_TRCD_OFFSET) | + (4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) | + (11 << ATMEL_MPDDRC_TPR0_TRC_OFFSET) | + (4 << ATMEL_MPDDRC_TPR0_TRP_OFFSET) | + (2 << ATMEL_MPDDRC_TPR0_TRRD_OFFSET) | + (2 << ATMEL_MPDDRC_TPR0_TWTR_OFFSET) | + (5 << ATMEL_MPDDRC_TPR0_TMRD_OFFSET)); + + ddrc->tpr1 = ((21 << ATMEL_MPDDRC_TPR1_TRFC_OFFSET) | + (0 << ATMEL_MPDDRC_TPR1_TXSNR_OFFSET) | + (23 << ATMEL_MPDDRC_TPR1_TXSRD_OFFSET) | + (2 << ATMEL_MPDDRC_TPR1_TXP_OFFSET)); + + ddrc->tpr2 = ((0 << ATMEL_MPDDRC_TPR2_TXARD_OFFSET) | + (0 << ATMEL_MPDDRC_TPR2_TXARDS_OFFSET) | + (4 << ATMEL_MPDDRC_TPR2_TRPA_OFFSET) | + (2 << ATMEL_MPDDRC_TPR2_TRTP_OFFSET) | + (10 << ATMEL_MPDDRC_TPR2_TFAW_OFFSET)); + + ddrc->tim_cal = ATMEL_MPDDRC_CALR_ZQCS(15); + + /* + * According to the sama5d2 datasheet and the following values: + * T Sens = 0.75%/C, V Sens = 0.2%/mV, T driftrate = 1C/sec and V driftrate = 15 mV/s + * Warning: note that the values T driftrate and V driftrate are dependent on + * the application environment. + * ZQCS period is 1.5 / ((0.75 x 1) + (0.2 x 15)) = 0.4s + * If Trefi is 3.9us, we have: 400000 / 3.9 = 102564: we can maximize + * this timer to 0xFFFE. + */ + ddrc->cal_mr4 = ATMEL_MPDDRC_CAL_MR4_COUNT_CAL(0xFFFE); + + /* + * MR4 Read interval is dependent on the application environment. + * Here, we want to maximize this value as temperature is supposed + * to vary slowly in the application chosen. + * If Trefi is 3.9us, we have: + * (0xFFFE) 65534 x 3.9 = 0.25s between MR4 reads. + */ + ddrc->cal_mr4 |= ATMEL_MPDDRC_CAL_MR4_MR4R(0xFFFE); +} + +void mem_init(void) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + struct atmel_mpddr *mpddrc = (struct atmel_mpddr *)ATMEL_BASE_MPDDRC; + struct atmel_mpddrc_config ddrc_config; + u32 reg; + + at91_periph_clk_enable(ATMEL_ID_MPDDRC); + writel(AT91_PMC_DDR, &pmc->scer); + + ddrc_conf(&ddrc_config); + + reg = readl(&mpddrc->io_calibr); + reg &= ~ATMEL_MPDDRC_IO_CALIBR_RDIV; + reg |= ATMEL_MPDDRC_IO_CALIBR_LPDDR2_RZQ_48; + reg &= ~ATMEL_MPDDRC_IO_CALIBR_TZQIO; + reg |= ATMEL_MPDDRC_IO_CALIBR_TZQIO_(100); + writel(reg, &mpddrc->io_calibr); + + writel(ATMEL_MPDDRC_RD_DATA_PATH_SHIFT_ONE_CYCLE, + &mpddrc->rd_data_path); + + lpddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddrc_config); +} + +void at91_pmc_init(void) +{ + u32 tmp; + + /* + * while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz + * so we need to slow down and configure MCKR accordingly. + * This is why we have a special flavor of the switching function. + */ + tmp = AT91_PMC_MCKR_PLLADIV_2 | + AT91_PMC_MCKR_MDIV_3 | + AT91_PMC_MCKR_CSS_MAIN; + at91_mck_init_down(tmp); + + tmp = AT91_PMC_PLLAR_29 | + AT91_PMC_PLLXR_PLLCOUNT(0x3f) | + AT91_PMC_PLLXR_MUL(40) | + AT91_PMC_PLLXR_DIV(1); + at91_plla_init(tmp); + + tmp = AT91_PMC_MCKR_H32MXDIV | + AT91_PMC_MCKR_PLLADIV_2 | + AT91_PMC_MCKR_MDIV_3 | + AT91_PMC_MCKR_CSS_PLLA; + at91_mck_init(tmp); +} +#endif diff --git a/board/boundary/nitrogen6x/MAINTAINERS b/board/boundary/nitrogen6x/MAINTAINERS index 1602d65..17018d6 100644 --- a/board/boundary/nitrogen6x/MAINTAINERS +++ b/board/boundary/nitrogen6x/MAINTAINERS @@ -1,6 +1,11 @@ NITROGEN6X BOARD M: Troy Kisky <troy.kisky@boundarydevices.com> S: Maintained +F: arch/arm/dts/imx6dl-nitrogen6x.dts +F: arch/arm/dts/imx6q-nitrogen6x.dts +F: arch/arm/dts/imx6q-sabrelite.dts +F: arch/arm/dts/imx6qdl-nitrogen6x.dtsi +F: arch/arm/dts/imx6qdl-sabrelite.dtsi F: board/boundary/nitrogen6x/ F: include/configs/nitrogen6x.h F: configs/mx6qsabrelite_defconfig diff --git a/board/boundary/nitrogen6x/nitrogen6dl.cfg b/board/boundary/nitrogen6x/nitrogen6dl.cfg index b1e3c0f..56b3bcb 100644 --- a/board/boundary/nitrogen6x/nitrogen6dl.cfg +++ b/board/boundary/nitrogen6x/nitrogen6dl.cfg @@ -19,7 +19,7 @@ BOOT_FROM spi #define __ASSEMBLY__ #include <config.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif #include "asm/arch/mx6-ddr.h" diff --git a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg index 3e7d605..13f7a89 100644 --- a/board/boundary/nitrogen6x/nitrogen6dl2g.cfg +++ b/board/boundary/nitrogen6x/nitrogen6dl2g.cfg @@ -19,7 +19,7 @@ BOOT_FROM spi #define __ASSEMBLY__ #include <config.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif #include "asm/arch/mx6-ddr.h" diff --git a/board/boundary/nitrogen6x/nitrogen6q.cfg b/board/boundary/nitrogen6x/nitrogen6q.cfg index 26bb645..1304b52 100644 --- a/board/boundary/nitrogen6x/nitrogen6q.cfg +++ b/board/boundary/nitrogen6x/nitrogen6q.cfg @@ -19,7 +19,7 @@ BOOT_FROM spi #define __ASSEMBLY__ #include <config.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif #include "asm/arch/mx6-ddr.h" diff --git a/board/boundary/nitrogen6x/nitrogen6q2g.cfg b/board/boundary/nitrogen6x/nitrogen6q2g.cfg index 5ff3eed..e5e923d 100644 --- a/board/boundary/nitrogen6x/nitrogen6q2g.cfg +++ b/board/boundary/nitrogen6x/nitrogen6q2g.cfg @@ -19,7 +19,7 @@ BOOT_FROM spi #define __ASSEMBLY__ #include <config.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif #include "asm/arch/mx6-ddr.h" diff --git a/board/boundary/nitrogen6x/nitrogen6s.cfg b/board/boundary/nitrogen6x/nitrogen6s.cfg index 5482656..e5f814b 100644 --- a/board/boundary/nitrogen6x/nitrogen6s.cfg +++ b/board/boundary/nitrogen6x/nitrogen6s.cfg @@ -19,7 +19,7 @@ BOOT_FROM spi #define __ASSEMBLY__ #include <config.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif #include "asm/arch/mx6-ddr.h" diff --git a/board/boundary/nitrogen6x/nitrogen6s1g.cfg b/board/boundary/nitrogen6x/nitrogen6s1g.cfg index dd30ca9..f3d754e 100644 --- a/board/boundary/nitrogen6x/nitrogen6s1g.cfg +++ b/board/boundary/nitrogen6x/nitrogen6s1g.cfg @@ -19,7 +19,7 @@ BOOT_FROM spi #define __ASSEMBLY__ #include <config.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif #include "asm/arch/mx6-ddr.h" diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 26af3f7..33653b5 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -382,6 +382,15 @@ int board_eth_init(bd_t *bis) struct phy_device *phydev = NULL; int ret; + gpio_request(WL12XX_WL_IRQ_GP, "wifi_irq"); + gpio_request(IMX_GPIO_NR(6, 30), "rgmii_rxc"); + gpio_request(IMX_GPIO_NR(6, 25), "rgmii_rd0"); + gpio_request(IMX_GPIO_NR(6, 27), "rgmii_rd1"); + gpio_request(IMX_GPIO_NR(6, 28), "rgmii_rd2"); + gpio_request(IMX_GPIO_NR(6, 29), "rgmii_rd3"); + gpio_request(IMX_GPIO_NR(6, 24), "rgmii_rx_ctl"); + gpio_request(IMX_GPIO_NR(3, 23), "rgmii_reset_sabrelite"); + gpio_request(IMX_GPIO_NR(1, 27), "rgmii_reset_nitrogen6x"); setup_iomux_enet(); #ifdef CONFIG_FEC_MXC @@ -912,7 +921,16 @@ int board_init(void) int checkboard(void) { - if (gpio_get_value(WL12XX_WL_IRQ_GP)) + int ret = gpio_get_value(WL12XX_WL_IRQ_GP); + + if (ret < 0) { + /* The gpios have not been probed yet. Read it myself */ + struct gpio_regs *regs = (struct gpio_regs *)GPIO6_BASE_ADDR; + int gpio = WL12XX_WL_IRQ_GP & 0x1f; + + ret = (readl(®s->gpio_psr) >> gpio) & 0x01; + } + if (ret) puts("Board: Nitrogen6X\n"); else puts("Board: SABRE Lite\n"); @@ -1014,6 +1032,16 @@ static const struct boot_mode board_boot_modes[] = { int misc_init_r(void) { + gpio_request(RGB_BACKLIGHT_GP, "lvds backlight"); + gpio_request(LVDS_BACKLIGHT_GP, "lvds backlight"); + gpio_request(GP_USB_OTG_PWR, "usbotg power"); + gpio_request(IMX_GPIO_NR(7, 12), "usbh1 hub reset"); + gpio_request(IMX_GPIO_NR(2, 2), "back"); + gpio_request(IMX_GPIO_NR(2, 4), "home"); + gpio_request(IMX_GPIO_NR(2, 1), "menu"); + gpio_request(IMX_GPIO_NR(2, 3), "search"); + gpio_request(IMX_GPIO_NR(7, 13), "volup"); + gpio_request(IMX_GPIO_NR(4, 5), "voldown"); #ifdef CONFIG_PREBOOT preboot_keys(); #endif diff --git a/board/freescale/imx8mm_evk/Kconfig b/board/freescale/imx8mm_evk/Kconfig new file mode 100644 index 0000000..299691a --- /dev/null +++ b/board/freescale/imx8mm_evk/Kconfig @@ -0,0 +1,12 @@ +if TARGET_IMX8MM_EVK + +config SYS_BOARD + default "imx8mm_evk" + +config SYS_VENDOR + default "freescale" + +config SYS_CONFIG_NAME + default "imx8mm_evk" + +endif diff --git a/board/freescale/imx8mm_evk/MAINTAINERS b/board/freescale/imx8mm_evk/MAINTAINERS new file mode 100644 index 0000000..b031bb0 --- /dev/null +++ b/board/freescale/imx8mm_evk/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8MM EVK BOARD +M: Peng Fan <peng.fan@nxp.com> +S: Maintained +F: board/freescale/imx8mm_evk/ +F: include/configs/imx8mm_evk.h +F: configs/imx8mm_evk_defconfig diff --git a/board/freescale/imx8mm_evk/Makefile b/board/freescale/imx8mm_evk/Makefile new file mode 100644 index 0000000..1db7b62 --- /dev/null +++ b/board/freescale/imx8mm_evk/Makefile @@ -0,0 +1,12 @@ +# +# Copyright 2018 NXP +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8mm_evk.o + +ifdef CONFIG_SPL_BUILD +obj-y += spl.o +obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing.o +endif diff --git a/board/freescale/imx8mm_evk/README b/board/freescale/imx8mm_evk/README new file mode 100644 index 0000000..a885bc5 --- /dev/null +++ b/board/freescale/imx8mm_evk/README @@ -0,0 +1,37 @@ +U-Boot for the NXP i.MX8MM EVK board + +Quick Start +=========== +- Build the ARM Trusted firmware binary +- Get ddr fimware +- Build U-Boot +- Boot + +Get and Build the ARM Trusted firmware +====================================== +Note: srctree is U-Boot source directory +Get ATF from: https://source.codeaurora.org/external/imx/imx-atf +branch: imx_4.19.35_1.0.0 +$ make PLAT=imx8mm bl31 +$ cp build/imx8mm/release/bl31.bin $(srctree) + +Get the ddr and hdmi firmware +============================= +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.0.bin +$ chmod +x firmware-imx-8.0.bin +$ ./firmware-imx-8.0 +$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(srctree) + +Build U-Boot +============ +$ export CROSS_COMPILE=aarch64-poky-linux- +$ make imx8mm_evk_defconfig +$ export ATF_LOAD_ADDR=0x920000 +$ make flash.bin + +Burn the flash.bin to MicroSD card offset 33KB +$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 + +Boot +==== +Set Boot switch to SD boot diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c new file mode 100644 index 0000000..3706e1e --- /dev/null +++ b/board/freescale/imx8mm_evk/imx8mm_evk.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018 NXP + */ + +#include <common.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + gd->ram_size = PHYS_SDRAM_SIZE; + + return 0; +} + +int board_init(void) +{ + return 0; +} + +int board_late_init(void) +{ +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + env_set("board_name", "EVK"); + env_set("board_rev", "iMX8MM"); +#endif + return 0; +} diff --git a/board/freescale/imx8mm_evk/lpddr4_timing.c b/board/freescale/imx8mm_evk/lpddr4_timing.c new file mode 100644 index 0000000..8e48b9d --- /dev/null +++ b/board/freescale/imx8mm_evk/lpddr4_timing.c @@ -0,0 +1,1980 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include <linux/kernel.h> +#include <common.h> +#include <asm/arch/ddr.h> +#include <asm/arch/lpddr4_define.h> + +struct dram_cfg_param lpddr4_ddrc_cfg[] = { + /* Start to config, default 3200mbps */ + { DDRC_DBG1(0), 0x00000001 }, + { DDRC_PWRCTL(0), 0x00000001 }, + { DDRC_MSTR(0), 0xa1080020 }, + { DDRC_RFSHTMG(0), 0x005b00d2 }, + { DDRC_INIT0(0), 0xC003061B }, + { DDRC_INIT1(0), 0x009D0000 }, + { DDRC_INIT3(0), 0x00D4002D }, + { DDRC_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 }, + { DDRC_INIT6(0), 0x0066004a }, + { DDRC_INIT7(0), 0x0006004a }, + + { DDRC_DRAMTMG0(0), 0x1A201B22 }, + { DDRC_DRAMTMG1(0), 0x00060633 }, + { DDRC_DRAMTMG3(0), 0x00C0C000 }, + { DDRC_DRAMTMG4(0), 0x0F04080F }, + { DDRC_DRAMTMG5(0), 0x02040C0C }, + { DDRC_DRAMTMG6(0), 0x01010007 }, + { DDRC_DRAMTMG7(0), 0x00000401 }, + { DDRC_DRAMTMG12(0), 0x00020600 }, + { DDRC_DRAMTMG13(0), 0x0C100002 }, + { DDRC_DRAMTMG14(0), 0x000000E6 }, + { DDRC_DRAMTMG17(0), 0x00A00050 }, + + { DDRC_ZQCTL0(0), 0x03200018 }, + { DDRC_ZQCTL1(0), 0x028061A8 }, + { DDRC_ZQCTL2(0), 0x00000000 }, + + { DDRC_DFITMG0(0), 0x0497820A }, + { DDRC_DFITMG2(0), 0x0000170A }, + { DDRC_DRAMTMG2(0), 0x070E171a }, + { DDRC_DBICTL(0), 0x00000001 }, + + { DDRC_DFITMG1(0), 0x00080303 }, + { DDRC_DFIUPD0(0), 0xE0400018 }, + { DDRC_DFIUPD1(0), 0x00DF00E4 }, + { DDRC_DFIUPD2(0), 0x80000000 }, + { DDRC_DFIMISC(0), 0x00000011 }, + + { DDRC_DFIPHYMSTR(0), 0x00000000 }, + { DDRC_RANKCTL(0), 0x00000c99 }, + + /* address mapping */ + { DDRC_ADDRMAP0(0), 0x0000001f }, + { DDRC_ADDRMAP1(0), 0x00080808 }, + { DDRC_ADDRMAP2(0), 0x00000000 }, + { DDRC_ADDRMAP3(0), 0x00000000 }, + { DDRC_ADDRMAP4(0), 0x00001f1f }, + { DDRC_ADDRMAP5(0), 0x07070707 }, + { DDRC_ADDRMAP6(0), 0x07070707 }, + { DDRC_ADDRMAP7(0), 0x00000f0f }, + + /* performance setting */ + { DDRC_SCHED(0), 0x29001701 }, + { DDRC_SCHED1(0), 0x0000002c }, + { DDRC_PERFHPR1(0), 0x04000030 }, + { DDRC_PERFLPR1(0), 0x900093e7 }, + { DDRC_PERFWR1(0), 0x20005574 }, + { DDRC_PCCFG(0), 0x00000111 }, + { DDRC_PCFGW_0(0), 0x000072ff }, + { DDRC_PCFGQOS0_0(0), 0x02100e07 }, + { DDRC_PCFGQOS1_0(0), 0x00620096 }, + { DDRC_PCFGWQOS0_0(0), 0x01100e07 }, + { DDRC_PCFGWQOS1_0(0), 0x00c8012c }, + + /* frequency P1&P2 */ + /* Frequency 1: 400mbps */ + { DDRC_FREQ1_DRAMTMG0(0), 0x0d0b010c }, + { DDRC_FREQ1_DRAMTMG1(0), 0x00030410 }, + { DDRC_FREQ1_DRAMTMG2(0), 0x0203090c }, + { DDRC_FREQ1_DRAMTMG3(0), 0x00505006 }, + { DDRC_FREQ1_DRAMTMG4(0), 0x05040305 }, + { DDRC_FREQ1_DRAMTMG5(0), 0x0d0e0504 }, + { DDRC_FREQ1_DRAMTMG6(0), 0x0a060004 }, + { DDRC_FREQ1_DRAMTMG7(0), 0x0000090e }, + { DDRC_FREQ1_DRAMTMG14(0), 0x00000032 }, + { DDRC_FREQ1_DRAMTMG15(0), 0x00000000 }, + { DDRC_FREQ1_DRAMTMG17(0), 0x0036001b }, + { DDRC_FREQ1_DERATEINT(0), 0x7e9fbeb1 }, + { DDRC_FREQ1_DFITMG0(0), 0x03818200 }, + { DDRC_FREQ1_DFITMG2(0), 0x00000000 }, + { DDRC_FREQ1_RFSHTMG(0), 0x000C001c }, + { DDRC_FREQ1_INIT3(0), 0x00840000 }, + { DDRC_FREQ1_INIT4(0), 0x00310000 }, + { DDRC_FREQ1_INIT6(0), 0x0066004a }, + { DDRC_FREQ1_INIT7(0), 0x0006004a }, + + /* Frequency 2: 100mbps */ + { DDRC_FREQ2_DRAMTMG0(0), 0x0d0b010c }, + { DDRC_FREQ2_DRAMTMG1(0), 0x00030410 }, + { DDRC_FREQ2_DRAMTMG2(0), 0x0203090c }, + { DDRC_FREQ2_DRAMTMG3(0), 0x00505006 }, + { DDRC_FREQ2_DRAMTMG4(0), 0x05040305 }, + { DDRC_FREQ2_DRAMTMG5(0), 0x0d0e0504 }, + { DDRC_FREQ2_DRAMTMG6(0), 0x0a060004 }, + { DDRC_FREQ2_DRAMTMG7(0), 0x0000090e }, + { DDRC_FREQ2_DRAMTMG14(0), 0x00000032 }, + { DDRC_FREQ2_DRAMTMG17(0), 0x0036001b }, + { DDRC_FREQ2_DERATEINT(0), 0x7e9fbeb1 }, + { DDRC_FREQ2_DFITMG0(0), 0x03818200 }, + { DDRC_FREQ2_DFITMG2(0), 0x00000000 }, + { DDRC_FREQ2_RFSHTMG(0), 0x0003800c }, + { DDRC_FREQ2_RFSHTMG(0), 0x00030007 }, + { DDRC_FREQ2_INIT3(0), 0x00840000 }, + { DDRC_FREQ2_INIT4(0), 0x00310008 }, + { DDRC_FREQ2_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 }, + { DDRC_FREQ2_INIT6(0), 0x0066004a }, + { DDRC_FREQ2_INIT7(0), 0x0006004a }, + + /* boot start point */ + { DDRC_MSTR2(0), 0x2 }, //DDRC_MSTR2 +}; + +/* PHY Initialize Configuration */ +struct dram_cfg_param lpddr4_ddrphy_cfg[] = { + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + + { 0x200c5, 0x19 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + + { 0x20024, 0xab }, + { 0x2003a, 0x0 }, + + { 0x120024, 0xab }, + { 0x2003a, 0x0 }, + + { 0x220024, 0xab }, + { 0x2003a, 0x0 }, + + { 0x20056, 0x3 }, + { 0x120056, 0xa }, + { 0x220056, 0xa }, + + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + + { 0x10049, 0xfbe }, + { 0x10149, 0xfbe }, + { 0x11049, 0xfbe }, + { 0x11149, 0xfbe }, + { 0x12049, 0xfbe }, + { 0x12149, 0xfbe }, + { 0x13049, 0xfbe }, + { 0x13149, 0xfbe }, + + { 0x110049, 0xfbe }, + { 0x110149, 0xfbe }, + { 0x111049, 0xfbe }, + { 0x111149, 0xfbe }, + { 0x112049, 0xfbe }, + { 0x112149, 0xfbe }, + { 0x113049, 0xfbe }, + { 0x113149, 0xfbe }, + + { 0x210049, 0xfbe }, + { 0x210149, 0xfbe }, + { 0x211049, 0xfbe }, + { 0x211149, 0xfbe }, + { 0x212049, 0xfbe }, + { 0x212149, 0xfbe }, + { 0x213049, 0xfbe }, + { 0x213149, 0xfbe }, + + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x2ee }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + + { 0x200b2, 0x1d4 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + + { 0x1200b2, 0xdc }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + + { 0x2200b2, 0xdc }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + + { 0x20025, 0x0 }, + { 0x2002d, LPDDR4_PHY_DMIPinPresent }, + { 0x12002d, LPDDR4_PHY_DMIPinPresent }, + { 0x22002d, LPDDR4_PHY_DMIPinPresent }, + { 0x200c7, 0x21 }, + { 0x200ca, 0x24 }, + { 0x1200c7, 0x21 }, + { 0x1200ca, 0x24 }, + { 0x2200c7, 0x21 }, + { 0x2200ca, 0x24 }, +}; + +/* ddr phy trained csr */ +struct dram_cfg_param lpddr4_ddrphy_trained_csr[] = { + { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, + { 0x200cb, 0x0 }, + { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, + { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, + { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, + { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, + { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, + { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, + { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, + { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, + { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, + { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, + { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, + { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, + { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, + { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, + { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, + { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, + { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, + { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, + { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, + { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, + { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, + { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, + { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, + { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, + { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, + { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, + { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, + { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, + { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, + { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, + { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, + { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, + { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, + { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, + { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, + { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, + { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, + { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, + { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, + { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, + { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, + { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, + { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, + { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, + { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, + { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, + { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, + { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, + { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, + { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, + { 0x10168, 0x0 }, + { 0x10268, 0x0 }, + { 0x10368, 0x0 }, + { 0x10468, 0x0 }, + { 0x10568, 0x0 }, + { 0x10668, 0x0 }, + { 0x10768, 0x0 }, + { 0x10868, 0x0 }, + { 0x11068, 0x0 }, + { 0x11168, 0x0 }, + { 0x11268, 0x0 }, + { 0x11368, 0x0 }, + { 0x11468, 0x0 }, + { 0x11568, 0x0 }, + { 0x11668, 0x0 }, + { 0x11768, 0x0 }, + { 0x11868, 0x0 }, + { 0x12068, 0x0 }, + { 0x12168, 0x0 }, + { 0x12268, 0x0 }, + { 0x12368, 0x0 }, + { 0x12468, 0x0 }, + { 0x12568, 0x0 }, + { 0x12668, 0x0 }, + { 0x12768, 0x0 }, + { 0x12868, 0x0 }, + { 0x13068, 0x0 }, + { 0x13168, 0x0 }, + { 0x13268, 0x0 }, + { 0x13368, 0x0 }, + { 0x13468, 0x0 }, + { 0x13568, 0x0 }, + { 0x13668, 0x0 }, + { 0x13768, 0x0 }, + { 0x13868, 0x0 }, + { 0x10069, 0x0 }, + { 0x10169, 0x0 }, + { 0x10269, 0x0 }, + { 0x10369, 0x0 }, + { 0x10469, 0x0 }, + { 0x10569, 0x0 }, + { 0x10669, 0x0 }, + { 0x10769, 0x0 }, + { 0x10869, 0x0 }, + { 0x11069, 0x0 }, + { 0x11169, 0x0 }, + { 0x11269, 0x0 }, + { 0x11369, 0x0 }, + { 0x11469, 0x0 }, + { 0x11569, 0x0 }, + { 0x11669, 0x0 }, + { 0x11769, 0x0 }, + { 0x11869, 0x0 }, + { 0x12069, 0x0 }, + { 0x12169, 0x0 }, + { 0x12269, 0x0 }, + { 0x12369, 0x0 }, + { 0x12469, 0x0 }, + { 0x12569, 0x0 }, + { 0x12669, 0x0 }, + { 0x12769, 0x0 }, + { 0x12869, 0x0 }, + { 0x13069, 0x0 }, + { 0x13169, 0x0 }, + { 0x13269, 0x0 }, + { 0x13369, 0x0 }, + { 0x13469, 0x0 }, + { 0x13569, 0x0 }, + { 0x13669, 0x0 }, + { 0x13769, 0x0 }, + { 0x13869, 0x0 }, + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, + { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, + { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, + { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, + { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, + { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, + { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, + { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, + { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, + { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, + { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, + { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, + { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, + { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, + { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, + { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, + { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, + { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, + { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, + { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, + { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, + { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, + { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, + { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, + { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, + { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, + { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, + { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, + { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, + { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, + { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, + { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, + { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, + { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, + { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, + { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, + { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, + { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, + { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, + { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, + { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, + { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, + { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, + { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, + { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, + { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, + { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, + { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, + { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, + { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, + { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, + { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, + { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, + { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, + { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, + { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, + { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, + { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, + { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, + { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, + { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, + { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, + { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, + { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, + { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, + { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, + { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, + { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, + { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, + { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, + { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, + { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, + { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, + { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, + { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, + { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, + { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, + { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, + { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, + { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, + { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, + { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, + { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, + { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, + { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, + { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, + { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, + { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, + { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, + { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, + { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, + { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, + { 0x20072, 0x0 }, + { 0x20073, 0x0 }, + { 0x20074, 0x0 }, + { 0x100aa, 0x0 }, + { 0x110aa, 0x0 }, + { 0x120aa, 0x0 }, + { 0x130aa, 0x0 }, + { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, + { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, + { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, + { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, + { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, + { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, + { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, + { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, + { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, + { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, + { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, + { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x0 }, + { 0x100a6, 0x0 }, + { 0x100a7, 0x0 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x0 }, + { 0x110a4, 0x0 }, + { 0x110a5, 0x0 }, + { 0x110a6, 0x0 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x0 }, + { 0x120a2, 0x0 }, + { 0x120a3, 0x0 }, + { 0x120a4, 0x0 }, + { 0x120a5, 0x0 }, + { 0x120a6, 0x0 }, + { 0x120a7, 0x0 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, + { 0x130a4, 0x0 }, + { 0x130a5, 0x0 }, + { 0x130a6, 0x0 }, + { 0x130a7, 0x0 }, + { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, + { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, + { 0x400fd, 0x0 }, + { 0x400c0, 0x0 }, + { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, + { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, + { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, + { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, + { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, + { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, + { 0x10062, 0x0 }, + { 0x10162, 0x0 }, + { 0x10262, 0x0 }, + { 0x10362, 0x0 }, + { 0x10462, 0x0 }, + { 0x10562, 0x0 }, + { 0x10662, 0x0 }, + { 0x10762, 0x0 }, + { 0x10862, 0x0 }, + { 0x11062, 0x0 }, + { 0x11162, 0x0 }, + { 0x11262, 0x0 }, + { 0x11362, 0x0 }, + { 0x11462, 0x0 }, + { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, + { 0x12062, 0x0 }, + { 0x12162, 0x0 }, + { 0x12262, 0x0 }, + { 0x12362, 0x0 }, + { 0x12462, 0x0 }, + { 0x12562, 0x0 }, + { 0x12662, 0x0 }, + { 0x12762, 0x0 }, + { 0x12862, 0x0 }, + { 0x13062, 0x0 }, + { 0x13162, 0x0 }, + { 0x13262, 0x0 }, + { 0x13362, 0x0 }, + { 0x13462, 0x0 }, + { 0x13562, 0x0 }, + { 0x13662, 0x0 }, + { 0x13762, 0x0 }, + { 0x13862, 0x0 }, + { 0x20077, 0x0 }, + { 0x10001, 0x0 }, + { 0x11001, 0x0 }, + { 0x12001, 0x0 }, + { 0x13001, 0x0 }, + { 0x10040, 0x0 }, + { 0x10140, 0x0 }, + { 0x10240, 0x0 }, + { 0x10340, 0x0 }, + { 0x10440, 0x0 }, + { 0x10540, 0x0 }, + { 0x10640, 0x0 }, + { 0x10740, 0x0 }, + { 0x10840, 0x0 }, + { 0x10030, 0x0 }, + { 0x10130, 0x0 }, + { 0x10230, 0x0 }, + { 0x10330, 0x0 }, + { 0x10430, 0x0 }, + { 0x10530, 0x0 }, + { 0x10630, 0x0 }, + { 0x10730, 0x0 }, + { 0x10830, 0x0 }, + { 0x11040, 0x0 }, + { 0x11140, 0x0 }, + { 0x11240, 0x0 }, + { 0x11340, 0x0 }, + { 0x11440, 0x0 }, + { 0x11540, 0x0 }, + { 0x11640, 0x0 }, + { 0x11740, 0x0 }, + { 0x11840, 0x0 }, + { 0x11030, 0x0 }, + { 0x11130, 0x0 }, + { 0x11230, 0x0 }, + { 0x11330, 0x0 }, + { 0x11430, 0x0 }, + { 0x11530, 0x0 }, + { 0x11630, 0x0 }, + { 0x11730, 0x0 }, + { 0x11830, 0x0 }, + { 0x12040, 0x0 }, + { 0x12140, 0x0 }, + { 0x12240, 0x0 }, + { 0x12340, 0x0 }, + { 0x12440, 0x0 }, + { 0x12540, 0x0 }, + { 0x12640, 0x0 }, + { 0x12740, 0x0 }, + { 0x12840, 0x0 }, + { 0x12030, 0x0 }, + { 0x12130, 0x0 }, + { 0x12230, 0x0 }, + { 0x12330, 0x0 }, + { 0x12430, 0x0 }, + { 0x12530, 0x0 }, + { 0x12630, 0x0 }, + { 0x12730, 0x0 }, + { 0x12830, 0x0 }, + { 0x13040, 0x0 }, + { 0x13140, 0x0 }, + { 0x13240, 0x0 }, + { 0x13340, 0x0 }, + { 0x13440, 0x0 }, + { 0x13540, 0x0 }, + { 0x13640, 0x0 }, + { 0x13740, 0x0 }, + { 0x13840, 0x0 }, + { 0x13030, 0x0 }, + { 0x13130, 0x0 }, + { 0x13230, 0x0 }, + { 0x13330, 0x0 }, + { 0x13430, 0x0 }, + { 0x13530, 0x0 }, + { 0x13630, 0x0 }, + { 0x13730, 0x0 }, + { 0x13830, 0x0 }, +}; + +/* P0 message block paremeter for training firmware */ +struct dram_cfg_param lpddr4_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x0 }, + { 0x54010, 0x0 }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x2dd4 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0xd400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0xd400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block paremeter for training firmware */ +struct dram_cfg_param lpddr4_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },/* PHY Ron/Rtt */ + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x0 }, + { 0x54010, 0x0 }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x84 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x84 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0x8400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0x8400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block paremeter for training firmware */ +struct dram_cfg_param lpddr4_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x0 }, + { 0x54010, 0x0 }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x84 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x84 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0x8400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0x8400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block paremeter for training firmware */ +struct dram_cfg_param lpddr4_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x2dd4 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0xd400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0xd400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +struct dram_cfg_param lpddr4_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xf }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x630 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x630 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x630 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x630 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x630 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x630 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x630 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x630 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x630 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x630 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x630 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x630 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x630 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xa }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x2 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x10 }, + { 0x900a5, 0x10 }, + { 0x900a6, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x623 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x623 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a7, 0x0 }, + { 0x900a8, 0x790 }, + { 0x900a9, 0x11a }, + { 0x900aa, 0x8 }, + { 0x900ab, 0x7aa }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x10 }, + { 0x900ae, 0x7b2 }, + { 0x900af, 0x2a }, + { 0x900b0, 0x0 }, + { 0x900b1, 0x7c8 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x0 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xc }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x0 }, + { 0x90159, 0x400 }, + { 0x9015a, 0x10e }, + { 0x9015b, 0x8 }, + { 0x9015c, 0xe8 }, + { 0x9015d, 0x109 }, + { 0x9015e, 0x0 }, + { 0x9015f, 0x8140 }, + { 0x90160, 0x10c }, + { 0x90161, 0x10 }, + { 0x90162, 0x8138 }, + { 0x90163, 0x10c }, + { 0x90164, 0x8 }, + { 0x90165, 0x7c8 }, + { 0x90166, 0x101 }, + { 0x90167, 0x8 }, + { 0x90168, 0x0 }, + { 0x90169, 0x8 }, + { 0x9016a, 0x8 }, + { 0x9016b, 0x448 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0xf }, + { 0x9016e, 0x7c0 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x0 }, + { 0x90171, 0xe8 }, + { 0x90172, 0x109 }, + { 0x90173, 0x47 }, + { 0x90174, 0x630 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x618 }, + { 0x90178, 0x109 }, + { 0x90179, 0x8 }, + { 0x9017a, 0xe0 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x7c8 }, + { 0x9017e, 0x109 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x8140 }, + { 0x90181, 0x10c }, + { 0x90182, 0x0 }, + { 0x90183, 0x1 }, + { 0x90184, 0x8 }, + { 0x90185, 0x8 }, + { 0x90186, 0x4 }, + { 0x90187, 0x8 }, + { 0x90188, 0x8 }, + { 0x90189, 0x7c8 }, + { 0x9018a, 0x101 }, + { 0x90006, 0x0 }, + { 0x90007, 0x0 }, + { 0x90008, 0x8 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x0 }, + { 0x9000b, 0x0 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x2a }, + { 0x90026, 0x6a }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x2000b, 0x5d }, + { 0x2000c, 0xbb }, + { 0x2000d, 0x753 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0xc }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x3 }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x60 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x2003a, 0x2 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 }, +}; + +struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { + { + /* P0 3000mts 1D */ + .drate = 3000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = lpddr4_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg), + }, + { + /* P0 3000mts 2D */ + .drate = 3000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = lpddr4_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), + }, + { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = lpddr4_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg), + }, + { + /* P1 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = lpddr4_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg), + }, +}; + +/* lpddr4 timing config params on EVK board */ +struct dram_timing_info dram_timing = { + .ddrc_cfg = lpddr4_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg), + .ddrphy_cfg = lpddr4_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(lpddr4_ddrphy_cfg), + .fsp_msg = lpddr4_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(lpddr4_dram_fsp_msg), + .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr), + .ddrphy_pie = lpddr4_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), +}; diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c new file mode 100644 index 0000000..043b5f4 --- /dev/null +++ b/board/freescale/imx8mm_evk/spl.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include <common.h> +#include <spl.h> +#include <asm/io.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/arch/clock.h> +#include <asm/arch/imx8mm_pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/mach-imx/boot_mode.h> +#include <asm/arch/ddr.h> + +#include <dm/uclass.h> +#include <dm/device.h> +#include <dm/uclass-internal.h> +#include <dm/device-internal.h> + +DECLARE_GLOBAL_DATA_PTR; + +int spl_board_boot_device(enum boot_device boot_dev_spl) +{ + switch (boot_dev_spl) { + case SD2_BOOT: + case MMC2_BOOT: + return BOOT_DEVICE_MMC1; + case SD3_BOOT: + case MMC3_BOOT: + return BOOT_DEVICE_MMC2; + default: + return BOOT_DEVICE_NONE; + } +} + +void spl_dram_init(void) +{ + ddr_init(&dram_timing); +} + +void spl_board_init(void) +{ + struct udevice *dev; + int ret; + + puts("Normal Boot\n"); + + ret = uclass_get_device_by_name(UCLASS_CLK, + "clock-controller@30380000", + &dev); + if (ret < 0) + printf("Failed to find clock node. Check device tree\n"); +} + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* Just empty function now - can't decide what to choose */ + debug("%s: %s\n", __func__, name); + + return 0; +} +#endif + +#define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1) +#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) + +static iomux_v3_cfg_t const uart_pads[] = { + IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const wdog_pads[] = { + IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), +}; + +int board_early_init_f(void) +{ + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + + imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); + + set_wdog_reset(wdog); + + imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); + + return 0; +} + +void board_init_f(ulong dummy) +{ + int ret; + + arch_cpu_init(); + + init_uart_clk(1); + + board_early_init_f(); + + timer_init(); + + preloader_console_init(); + + /* Clear the BSS. */ + memset(__bss_start, 0, __bss_end - __bss_start); + + ret = spl_init(); + if (ret) { + debug("spl_init() failed: %d\n", ret); + hang(); + } + + enable_tzc380(); + + /* DDR initialization */ + spl_dram_init(); + + board_init_r(NULL, 0); +} + +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + puts ("resetting ...\n"); + + reset_cpu(WDOG1_BASE_ADDR); + + return 0; +} diff --git a/board/freescale/imx8mq_evk/lpddr4_timing.c b/board/freescale/imx8mq_evk/lpddr4_timing.c index f7ea799..46bc7f8 100644 --- a/board/freescale/imx8mq_evk/lpddr4_timing.c +++ b/board/freescale/imx8mq_evk/lpddr4_timing.c @@ -72,8 +72,10 @@ struct dram_cfg_param lpddr4_ddrc_cfg[] = { { DDRC_SCHED(0), 0x29511505 }, { DDRC_SCHED1(0), 0x0000002c }, { DDRC_PERFHPR1(0), 0x5900575b }, - { DDRC_PERFLPR1(0), 0x00000009 }, - { DDRC_PERFWR1(0), 0x02005574 }, + /* 150T starve and 0x90 max tran len */ + { DDRC_PERFLPR1(0), 0x90000096 }, + /* 300T starve and 0x10 max tran len */ + { DDRC_PERFWR1(0), 0x1000012c }, { DDRC_DBG0(0), 0x00000016 }, { DDRC_DBG1(0), 0x00000000 }, { DDRC_DBGCMD(0), 0x00000000 }, @@ -83,10 +85,12 @@ struct dram_cfg_param lpddr4_ddrc_cfg[] = { { DDRC_PCFGR_0(0), 0x000010f3 }, { DDRC_PCFGW_0(0), 0x000072ff }, { DDRC_PCTRL_0(0), 0x00000001 }, - { DDRC_PCFGQOS0_0(0), 0x01110d00 }, - { DDRC_PCFGQOS1_0(0), 0x00620790 }, - { DDRC_PCFGWQOS0_0(0), 0x00100001 }, - { DDRC_PCFGWQOS1_0(0), 0x0000041f }, + /* disable Read Qos*/ + { DDRC_PCFGQOS0_0(0), 0x00000e00 }, + { DDRC_PCFGQOS1_0(0), 0x0062ffff }, + /* disable Write Qos*/ + { DDRC_PCFGWQOS0_0(0), 0x00000e00 }, + { DDRC_PCFGWQOS1_0(0), 0x0000ffff }, /* Frequency 1: 400mbps */ { DDRC_FREQ1_DRAMTMG0(0), 0x0d0b010c }, diff --git a/board/freescale/imx8qm_mek/README b/board/freescale/imx8qm_mek/README index c352380..a187ad8 100644 --- a/board/freescale/imx8qm_mek/README +++ b/board/freescale/imx8qm_mek/README @@ -39,11 +39,8 @@ $ cp imx-sc-firmware-0.7/mx8qm-mek-scfw-tcm.bin . Build U-Boot ============ -$ export ATF_LOAD_ADDR=0x80000000 -$ export BL33_LOAD_ADDR=0x80020000 $ make imx8qm_mek_defconfig $ make flash.bin -$ dd if=u-boot.itb of=flash.bin bs=512 seek=1984 Flash the binary into the SD card ================================= diff --git a/board/freescale/imx8qm_mek/uboot-container.cfg b/board/freescale/imx8qm_mek/uboot-container.cfg new file mode 100644 index 0000000..6cc47cd --- /dev/null +++ b/board/freescale/imx8qm_mek/uboot-container.cfg @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#define __ASSEMBLY__ + +/* This file is to create a container image could be loaded by SPL */ +BOOT_FROM SD 0x400 +SOC_TYPE IMX8QM +CONTAINER +IMAGE A35 bl31.bin 0x80000000 +IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE diff --git a/board/freescale/imx8qxp_mek/README b/board/freescale/imx8qxp_mek/README index f32290e..e676e88 100644 --- a/board/freescale/imx8qxp_mek/README +++ b/board/freescale/imx8qxp_mek/README @@ -39,11 +39,8 @@ $ cp imx-sc-firmware-0.7/mx8qx-mek-scfw-tcm.bin . Build U-Boot ============ -$ export ATF_LOAD_ADDR=0x80000000 -$ export BL33_LOAD_ADDR=0x80020000 $ make imx8qxp_mek_defconfig $ make flash.bin -$ dd if=u-boot.itb of=flash.bin bs=512 seek=528 Flash the binary into the SD card ================================= diff --git a/board/freescale/imx8qxp_mek/uboot-container.cfg b/board/freescale/imx8qxp_mek/uboot-container.cfg new file mode 100644 index 0000000..8165811 --- /dev/null +++ b/board/freescale/imx8qxp_mek/uboot-container.cfg @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#define __ASSEMBLY__ + +/* This file is to create a container image could be loaded by SPL */ +BOOT_FROM SD 0x400 +SOC_TYPE IMX8QX +CONTAINER +IMAGE A35 bl31.bin 0x80000000 +IMAGE A35 u-boot.bin CONFIG_SYS_TEXT_BASE diff --git a/board/freescale/mx28evk/README b/board/freescale/mx28evk/README index b8bee89..d32f0ef 100644 --- a/board/freescale/mx28evk/README +++ b/board/freescale/mx28evk/README @@ -58,5 +58,5 @@ It is possible to solder a SOIC memory on U49 or use a DIP8 on J89. To get SPI communication to work R320, R321,R322 and C178 need to be populated. Look in the schematics for the proper component values. -Follow the instructions from doc/README.mxs to generate a bootable SD card or -to generate a binary to be flashed into SPI NOR. +Follow the instructions from doc/imx/common/mxs.txt to generate a bootable +SD card or to generate a binary to be flashed into SPI NOR. diff --git a/board/freescale/mx6slevk/imximage.cfg b/board/freescale/mx6slevk/imximage.cfg index b33bb93..fd71bef 100644 --- a/board/freescale/mx6slevk/imximage.cfg +++ b/board/freescale/mx6slevk/imximage.cfg @@ -24,7 +24,7 @@ BOOT_FROM sd /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index 4c48679..33ae91c 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -15,7 +15,6 @@ #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> #include <asm/mach-imx/mxc_i2c.h> -#include <asm/mach-imx/spi.h> #include <asm/io.h> #include <linux/sizes.h> #include <common.h> @@ -41,9 +40,6 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_HYS) -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - #define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW |\ PAD_CTL_DSE_80ohm | PAD_CTL_HYS | \ @@ -120,25 +116,6 @@ static iomux_v3_cfg_t const fec_pads[] = { MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#ifdef CONFIG_MXC_SPI -static iomux_v3_cfg_t ecspi1_pads[] = { - MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -int board_spi_cs_gpio(unsigned bus, unsigned cs) -{ - return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 11)) : -1; -} - -static void setup_spi(void) -{ - imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); -} -#endif - static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); @@ -232,11 +209,6 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_MXC_SPI - gpio_request(IMX_GPIO_NR(4, 11), "spi_cs"); - setup_spi(); -#endif - #ifdef CONFIG_FEC_MXC setup_fec(); #endif diff --git a/board/freescale/mx6sllevk/imximage.cfg b/board/freescale/mx6sllevk/imximage.cfg index 2dcff00..74b3a90 100644 --- a/board/freescale/mx6sllevk/imximage.cfg +++ b/board/freescale/mx6sllevk/imximage.cfg @@ -27,7 +27,7 @@ BOOT_FROM sd PLUGIN board/freescale/mx6sllevk/plugin.bin 0x00907000 #else -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/freescale/mx6sxsabresd/imximage.cfg b/board/freescale/mx6sxsabresd/imximage.cfg index 0354bb3..28ffb2f 100644 --- a/board/freescale/mx6sxsabresd/imximage.cfg +++ b/board/freescale/mx6sxsabresd/imximage.cfg @@ -20,7 +20,7 @@ BOOT_FROM sd /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/freescale/mx6ul_14x14_evk/README b/board/freescale/mx6ul_14x14_evk/README index 1edccf6..e101abe 100644 --- a/board/freescale/mx6ul_14x14_evk/README +++ b/board/freescale/mx6ul_14x14_evk/README @@ -9,6 +9,9 @@ $ make This will generate the SPL image called SPL and the u-boot.img. +1. Booting via SDCard +--------------------- + - Flash the SPL image into the micro SD card: sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync @@ -30,3 +33,50 @@ switch label numbers reference). - Insert the micro SD card in the board, power it up and U-Boot messages should come up. + +2. Booting via Serial Download Protocol (SDP) +--------------------------------------------- + +The mx6ulevk board can boot from USB OTG port using the SDP, target will +enter in SDP mode in case an SD Card is not connect or boot switches are +set as below: + +Sw602: 0 1 +SW601: x x x x + +The following tools can be used to boot via SDP, for both tools you must +connect an USB cable in USB OTG port. + +- Method 1: Universal Update Utility (uuu) + +The UUU binary can be downloaded in release tab from link below: +https://github.com/NXPmicro/mfgtools + +The following script should be created to boot SPL + u-boot-dtb.img binaries: + + $ cat uuu_script + uuu_version 1.1.4 + + SDP: boot -f SPL + SDPU: write -f u-boot-dtb.img -addr 0x877fffc0 + SDPU: jump -addr 0x877fffc0 + SDPU: done + +Please note that the address above is calculated based on SYS_TEXT_BASE address: + +0x877fffc0 = 0x87800000 (SYS_TEXT_BASE) - 0x40 (U-Boot proper Header size) + +Power on the target and run the following command from U-Boot root directory: + + $ sudo ./uuu uuu_script + +- Method 2: imx usb loader tool (imx_usb): + +The imx_usb_loader tool can be downloaded in link below: +https://github.com/boundarydevices/imx_usb_loader + +Build the source code and run the following commands from U-Boot root +directory: + + $ sudo ./imx_usb SPL + $ sudo ./imx_usb u-boot-dtb.img diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c index ccbe404..c98e98b 100644 --- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c +++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c @@ -111,7 +111,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#ifndef CONFIG_SPL_BUILD static iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -127,7 +126,6 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { /* RST_B */ MX6_PAD_GPIO1_IO09__GPIO1_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#endif /* * mx6ul_14x14_evk board default supports sd card. If want to use @@ -238,19 +236,6 @@ int board_mmc_getcd(struct mmc *mmc) int board_mmc_init(bd_t *bis) { -#ifdef CONFIG_SPL_BUILD -#if defined(CONFIG_MX6UL_14X14_EVK_EMMC_REWORK) - imx_iomux_v3_setup_multiple_pads(usdhc2_emmc_pads, - ARRAY_SIZE(usdhc2_emmc_pads)); -#else - imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); -#endif - gpio_direction_output(USDHC2_PWR_GPIO, 0); - udelay(500); - gpio_direction_output(USDHC2_PWR_GPIO, 1); - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); - return fsl_esdhc_initialize(bis, &usdhc_cfg[1]); -#else int i, ret; /* @@ -297,7 +282,6 @@ int board_mmc_init(bd_t *bis) return ret; } } -#endif return 0; } #endif @@ -437,40 +421,8 @@ int board_phy_config(struct phy_device *phydev) } #endif -#ifdef CONFIG_VIDEO_MXS +#ifdef CONFIG_DM_VIDEO static iomux_v3_cfg_t const lcd_pads[] = { - MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA18__LCDIF_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA19__LCDIF_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA20__LCDIF_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA21__LCDIF_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA22__LCDIF_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX6_PAD_LCD_DATA23__LCDIF_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL), - - /* LCD_RST */ - MX6_PAD_SNVS_TAMPER9__GPIO5_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* Use GPIO for Brightness adjustment, duty cycle = period. */ MX6_PAD_GPIO1_IO08__GPIO1_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL), }; @@ -493,6 +445,8 @@ static int setup_lcd(void) return 0; } +#else +static inline int setup_lcd(void) { return 0; } #endif int board_early_init_f(void) @@ -521,10 +475,6 @@ int board_init(void) board_qspi_init(); #endif -#ifdef CONFIG_VIDEO_MXS - setup_lcd(); -#endif - return 0; } @@ -553,6 +503,8 @@ int board_late_init(void) env_set("board_rev", "14X14"); #endif + setup_lcd(); + return 0; } diff --git a/board/freescale/mx6ullevk/MAINTAINERS b/board/freescale/mx6ullevk/MAINTAINERS index 73031cd..3d1b256 100644 --- a/board/freescale/mx6ullevk/MAINTAINERS +++ b/board/freescale/mx6ullevk/MAINTAINERS @@ -5,3 +5,4 @@ F: board/freescale/mx6ullevk/ F: include/configs/mx6ullevk.h F: configs/mx6ull_14x14_evk_defconfig F: configs/mx6ull_14x14_evk_plugin_defconfig +F: configs/mx6ulz_14x14_evk_defconfig diff --git a/board/freescale/mx6ullevk/imximage.cfg b/board/freescale/mx6ullevk/imximage.cfg index 39306d4..40818d0 100644 --- a/board/freescale/mx6ullevk/imximage.cfg +++ b/board/freescale/mx6ullevk/imximage.cfg @@ -33,7 +33,7 @@ BOOT_FROM sd PLUGIN board/freescale/mx6ullevk/plugin.bin 0x00907000 #else -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/freescale/mx6ullevk/mx6ullevk.c b/board/freescale/mx6ullevk/mx6ullevk.c index e119347..20ae011 100644 --- a/board/freescale/mx6ullevk/mx6ullevk.c +++ b/board/freescale/mx6ullevk/mx6ullevk.c @@ -84,7 +84,10 @@ int board_late_init(void) #endif #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - env_set("board_name", "EVK"); + if (is_cpu_type(MXC_CPU_MX6ULZ)) + env_set("board_name", "ULZ-EVK"); + else + env_set("board_name", "EVK"); env_set("board_rev", "14X14"); #endif @@ -93,7 +96,10 @@ int board_late_init(void) int checkboard(void) { - puts("Board: MX6ULL 14x14 EVK\n"); + if (is_cpu_type(MXC_CPU_MX6ULZ)) + puts("Board: MX6ULZ 14x14 EVK\n"); + else + puts("Board: MX6ULL 14x14 EVK\n"); return 0; } diff --git a/board/freescale/mx7dsabresd/imximage.cfg b/board/freescale/mx7dsabresd/imximage.cfg index b72e0cf..a0f39c4 100644 --- a/board/freescale/mx7dsabresd/imximage.cfg +++ b/board/freescale/mx7dsabresd/imximage.cfg @@ -24,7 +24,7 @@ BOOT_FROM sd /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/freescale/mx7ulp_evk/imximage.cfg b/board/freescale/mx7ulp_evk/imximage.cfg index 43ebc23..ec36730 100644 --- a/board/freescale/mx7ulp_evk/imximage.cfg +++ b/board/freescale/mx7ulp_evk/imximage.cfg @@ -27,7 +27,7 @@ BOOT_FROM sd PLUGIN board/freescale/mx7ulp_evk/plugin.bin 0x2F020000 #else -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif /* diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c index 3a12fe1..7527263 100644 --- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c +++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c @@ -4,10 +4,12 @@ */ #include <common.h> +#include <fdt_support.h> #include <asm/io.h> #include <asm/arch/sys_proto.h> #include <asm/arch/mx7ulp-pins.h> #include <asm/arch/iomux.h> +#include <asm/mach-imx/boot_mode.h> DECLARE_GLOBAL_DATA_PTR; @@ -45,3 +47,48 @@ int board_init(void) return 0; } + +#if IS_ENABLED(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, bd_t *bd) +{ + const char *path; + int rc, nodeoff; + + if (get_boot_device() == USB_BOOT) { + path = fdt_get_alias(blob, "mmc0"); + if (!path) { + puts("Not found mmc0\n"); + return 0; + } + + nodeoff = fdt_path_offset(blob, path); + if (nodeoff < 0) + return 0; + + printf("Found usdhc0 node\n"); + if (fdt_get_property(blob, nodeoff, "vqmmc-supply", + NULL) != NULL) { + rc = fdt_delprop(blob, nodeoff, "vqmmc-supply"); + if (!rc) { + puts("Removed vqmmc-supply property\n"); +add: + rc = fdt_setprop(blob, nodeoff, + "no-1-8-v", NULL, 0); + if (rc == -FDT_ERR_NOSPACE) { + rc = fdt_increase_size(blob, 32); + if (!rc) + goto add; + } else if (rc) { + printf("Failed to add no-1-8-v property, %d\n", rc); + } else { + puts("Added no-1-8-v property\n"); + } + } else { + printf("Failed to remove vqmmc-supply property, %d\n", rc); + } + } + } + + return 0; +} +#endif diff --git a/board/intel/cherryhill/cherryhill.c b/board/intel/cherryhill/cherryhill.c index 695af6b..c037d5b 100644 --- a/board/intel/cherryhill/cherryhill.c +++ b/board/intel/cherryhill/cherryhill.c @@ -5,7 +5,7 @@ #include <common.h> #include <asm/arch/gpio.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> static const struct gpio_family gpio_family[] = { GPIO_FAMILY_CONF("SOUTHEAST_2_hshvfamily_2x3_rcomp_7_0", NA, 0, diff --git a/board/laird/wb50n/wb50n.c b/board/laird/wb50n/wb50n.c index a2f8eaf..13563ab 100644 --- a/board/laird/wb50n/wb50n.c +++ b/board/laird/wb50n/wb50n.c @@ -4,7 +4,7 @@ #include <common.h> #include <asm/io.h> -#include <asm/arch/sama5_sfr.h> +#include <asm/arch/at91_sfr.h> #include <asm/arch/sama5d3_smc.h> #include <asm/arch/at91_common.h> #include <asm/arch/at91_pmc.h> @@ -173,13 +173,11 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct atmel_sfr *sfr = (struct atmel_sfr *)ATMEL_BASE_SFR; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - writel(ATMEL_SFR_DDRCFG_FDQIEN | ATMEL_SFR_DDRCFG_FDQSIEN, - &sfr->ddrcfg); + configure_ddrcfg_input_buffers(true); /* enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); diff --git a/board/liebherr/display5/Makefile b/board/liebherr/display5/Makefile index f934672..ee503ad 100644 --- a/board/liebherr/display5/Makefile +++ b/board/liebherr/display5/Makefile @@ -5,7 +5,7 @@ # SPDX-License-Identifier: GPL-2.0+ # ifdef CONFIG_SPL_BUILD -obj-y = common.o spl.o +obj-y = spl.o else -obj-y := common.o display5.o +obj-y := display5.o endif diff --git a/board/liebherr/display5/common.c b/board/liebherr/display5/common.c deleted file mode 100644 index 8390d9a..0000000 --- a/board/liebherr/display5/common.c +++ /dev/null @@ -1,120 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2017 DENX Software Engineering - * Lukasz Majewski, DENX Software Engineering, lukma@denx.de - */ - -#include <asm/mach-imx/iomux-v3.h> -#include <asm/arch/mx6-pins.h> -#include "common.h" - -iomux_v3_cfg_t const uart_pads[] = { - /* UART4 */ - MX6_PAD_CSI0_DAT12__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT13__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT16__UART4_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT17__UART4_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -iomux_v3_cfg_t const uart_console_pads[] = { - /* UART5 */ - MX6_PAD_CSI0_DAT14__UART5_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT15__UART5_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT18__UART5_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), - MX6_PAD_CSI0_DAT19__UART5_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), -}; - -void displ5_set_iomux_uart_spl(void) -{ - SETUP_IOMUX_PADS(uart_console_pads); -} - -void displ5_set_iomux_uart(void) -{ - SETUP_IOMUX_PADS(uart_pads); -} - -iomux_v3_cfg_t const misc_pads_spl[] = { - /* Emergency recovery pin */ - MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -void displ5_set_iomux_misc_spl(void) -{ - SETUP_IOMUX_PADS(misc_pads_spl); -} - -#ifdef CONFIG_MXC_SPI -iomux_v3_cfg_t const ecspi_pads[] = { - /* SPI3 */ - MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_DISP0_DAT3__ECSPI3_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_DISP0_DAT4__ECSPI3_SS1 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_DISP0_DAT5__ECSPI3_SS2 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_DISP0_DAT6__ECSPI3_SS3 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_DISP0_DAT7__ECSPI3_RDY | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -iomux_v3_cfg_t const ecspi2_pads[] = { - /* SPI2, NOR Flash nWP, CS0 */ - MX6_PAD_CSI0_DAT10__ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), - MX6_PAD_CSI0_DAT11__GPIO5_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), - MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -int board_spi_cs_gpio(unsigned int bus, unsigned int cs) -{ - if (bus != 1 || cs != 0) - return -EINVAL; - - return IMX_GPIO_NR(5, 29); -} - -void displ5_set_iomux_ecspi_spl(void) -{ - SETUP_IOMUX_PADS(ecspi2_pads); -} - -void displ5_set_iomux_ecspi(void) -{ - SETUP_IOMUX_PADS(ecspi_pads); -} - -#else -void displ5_set_iomux_ecspi_spl(void) {} -void displ5_set_iomux_ecspi(void) {} -#endif - -#ifdef CONFIG_FSL_ESDHC_IMX -iomux_v3_cfg_t const usdhc4_pads[] = { - MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NANDF_ALE__SD4_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - -void displ5_set_iomux_usdhc_spl(void) -{ - SETUP_IOMUX_PADS(usdhc4_pads); -} - -void displ5_set_iomux_usdhc(void) -{ - SETUP_IOMUX_PADS(usdhc4_pads); -} - -#else -void displ5_set_iomux_usdhc_spl(void) {} -void displ5_set_iomux_usdhc(void) {} -#endif diff --git a/board/liebherr/display5/common.h b/board/liebherr/display5/common.h index 78c64b0..44c7470 100644 --- a/board/liebherr/display5/common.h +++ b/board/liebherr/display5/common.h @@ -31,12 +31,4 @@ #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) -void displ5_set_iomux_uart_spl(void); -void displ5_set_iomux_uart(void); -void displ5_set_iomux_ecspi_spl(void); -void displ5_set_iomux_ecspi(void); -void displ5_set_iomux_usdhc_spl(void); -void displ5_set_iomux_usdhc(void); -void displ5_set_iomux_misc_spl(void); - #endif /* __DISPL5_COMMON_H_ */ diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c index 037c4e6..85ca777 100644 --- a/board/liebherr/display5/display5.c +++ b/board/liebherr/display5/display5.c @@ -18,11 +18,7 @@ #include <asm/gpio.h> #include <malloc.h> #include <asm/mach-imx/iomux-v3.h> -#include <asm/mach-imx/mxc_i2c.h> #include <asm/mach-imx/boot_mode.h> -#include <asm/mach-imx/spi.h> -#include <mmc.h> -#include <fsl_esdhc_imx.h> #include <miiphy.h> #include <netdev.h> #include <i2c.h> @@ -31,11 +27,6 @@ #include <dm/platform_data/serial_mxc.h> #include <dm/platdata.h> -#ifndef CONFIG_MXC_SPI -#error "CONFIG_SPI must be set for this board" -#error "Please check your config file" -#endif - #include "common.h" DECLARE_GLOBAL_DATA_PTR; @@ -45,61 +36,49 @@ static bool sw_ids_valid; static u32 cpu_id; static u32 unit_id; -#define EM_PAD IMX_GPIO_NR(3, 29) -#define SW0 IMX_GPIO_NR(2, 4) -#define SW1 IMX_GPIO_NR(2, 5) -#define SW2 IMX_GPIO_NR(2, 6) -#define SW3 IMX_GPIO_NR(2, 7) -#define HW0 IMX_GPIO_NR(6, 7) -#define HW1 IMX_GPIO_NR(6, 9) -#define HW2 IMX_GPIO_NR(6, 10) -#define HW3 IMX_GPIO_NR(6, 11) -#define HW4 IMX_GPIO_NR(4, 7) -#define HW5 IMX_GPIO_NR(4, 11) -#define HW6 IMX_GPIO_NR(4, 13) -#define HW7 IMX_GPIO_NR(4, 15) - -int gpio_table_sw_ids[] = { - SW0, SW1, SW2, SW3 +const char *gpio_table_sw_names[] = { + "GPIO2_4", "GPIO2_5", "GPIO2_6", "GPIO2_7" }; const char *gpio_table_sw_ids_names[] = { "sw0", "sw1", "sw2", "sw3" }; -int gpio_table_hw_ids[] = { - HW0, HW1, HW2, HW3, HW4, HW5, HW6, HW7 +const char *gpio_table_hw_names[] = { + "GPIO6_7", "GPIO6_9", "GPIO6_10", "GPIO6_11", + "GPIO4_7", "GPIO4_11", "GPIO4_13", "GPIO4_15" }; const char *gpio_table_hw_ids_names[] = { "hw0", "hw1", "hw2", "hw3", "hw4", "hw5", "hw6", "hw7" }; -static int get_board_id(int *ids, const char **c, int size, - bool *valid, u32 *id) +static int get_board_id(const char **pin_names, const char **ids_names, + int size, bool *valid, u32 *id) { + struct gpio_desc desc; int i, ret, val; *valid = false; for (i = 0; i < size; i++) { - ret = gpio_request(ids[i], c[i]); + memset(&desc, 0, sizeof(desc)); + + ret = dm_gpio_lookup_name(pin_names[i], &desc); if (ret) { - printf("Can't request SWx gpios\n"); + printf("Can't lookup request SWx gpios\n"); return ret; } - } - for (i = 0; i < size; i++) { - ret = gpio_direction_input(ids[i]); + ret = dm_gpio_request(&desc, ids_names[i]); if (ret) { - printf("Can't set SWx gpios direction\n"); + printf("Can't lookup request SWx gpios\n"); return ret; } - } - for (i = 0; i < size; i++) { - val = gpio_get_value(ids[i]); + dm_gpio_set_dir_flags(&desc, GPIOD_IS_IN); + + val = dm_gpio_get_value(&desc); if (val < 0) { printf("Can't get SW%d ID\n", i); *id = 0; @@ -119,49 +98,6 @@ int dram_init(void) return 0; } -#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) -/* I2C1: TFA9879 */ -struct i2c_pads_info i2c_pad_info0 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, - .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, - .gp = IMX_GPIO_NR(3, 21) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, - .gp = IMX_GPIO_NR(3, 28) - } -}; - -/* I2C2: TIVO TM4C123 */ -struct i2c_pads_info i2c_pad_info1 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC, - .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC, - .gp = IMX_GPIO_NR(2, 30) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC, - .gp = IMX_GPIO_NR(3, 16) - } -}; - -/* I2C3: PMIC PF0100, EEPROM AT24C256C */ -struct i2c_pads_info i2c_pad_info2 = { - .scl = { - .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC, - .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC, - .gp = IMX_GPIO_NR(3, 17) - }, - .sda = { - .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC, - .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC, - .gp = IMX_GPIO_NR(3, 18) - } -}; - iomux_v3_cfg_t const misc_pads[] = { /* Prod ID GPIO pins */ MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), @@ -186,182 +122,55 @@ iomux_v3_cfg_t const misc_pads[] = { MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -#ifdef CONFIG_FSL_ESDHC_IMX -struct fsl_esdhc_cfg usdhc_cfg[1] = { - { USDHC4_BASE_ADDR, 0, 8, }, -}; - -int board_mmc_getcd(struct mmc *mmc) +/* + * Do not overwrite the console + * Always use serial for U-Boot console + */ +int overwrite_console(void) { return 1; } -int board_mmc_init(bd_t *bis) -{ - displ5_set_iomux_usdhc(); - - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); - - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -} -#endif /* CONFIG_FSL_ESDHC_IMX */ - -static void displ5_setup_ecspi(void) -{ - int ret; - - displ5_set_iomux_ecspi(); - - ret = gpio_request(IMX_GPIO_NR(5, 29), "spi2_cs0"); - if (!ret) - gpio_direction_output(IMX_GPIO_NR(5, 29), 1); - - ret = gpio_request(IMX_GPIO_NR(7, 0), "spi2_#wp"); - if (!ret) - gpio_direction_output(IMX_GPIO_NR(7, 0), 1); -} - -#ifdef CONFIG_FEC_MXC -iomux_v3_cfg_t const enet_pads[] = { - MX6_PAD_ENET_TXD1__ENET_1588_EVENT0_IN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), - - /* for old evalboard with R159 present and R160 not populated */ - MX6_PAD_GPIO_16__ENET_REF_CLK | MUX_PAD_CTRL(NO_PAD_CTRL), - - MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - - MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), - /*INT#_GBE*/ - MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_iomux_enet(void) -{ - SETUP_IOMUX_PADS(enet_pads); - gpio_direction_input(IMX_GPIO_NR(1, 28)); /*INT#_GBE*/ -} - -static int setup_mac_from_fuse(void) +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +int ft_board_setup(void *blob, bd_t *bd) { - unsigned char enetaddr[6]; - int ret; - - ret = eth_env_get_enetaddr("ethaddr", enetaddr); - if (ret) /* ethaddr is already set */ - return 0; - - imx_get_mac_from_fuse(0, enetaddr); - - if (is_valid_ethaddr(enetaddr)) { - eth_env_set_enetaddr("ethaddr", enetaddr); - return 0; - } - + fdt_fixup_ethernet(blob); return 0; } +#endif -int board_eth_init(bd_t *bd) +int board_phy_config(struct phy_device *phydev) { - struct phy_device *phydev; - struct mii_dev *bus; - int ret; - - setup_iomux_enet(); - - iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO); - - ret = enable_fec_anatop_clock(0, ENET_125MHZ); - if (ret) - return ret; - - setup_mac_from_fuse(); - - bus = fec_get_miibus(IMX_FEC_BASE, -1); - if (!bus) - return -ENODEV; - - /* - * We use here the "rgmii-id" mode of operation and allow M88E1512 - * PHY to use its internally callibrated RX/TX delays - */ - phydev = phy_find_by_mask(bus, 0xffffffff /* (0xf << 4) */, - PHY_INTERFACE_MODE_RGMII_ID); - if (!phydev) { - ret = -ENODEV; - goto err_phy; - } - /* display5 due to PCB routing can only work with 100 Mbps */ phydev->advertising &= ~(ADVERTISED_1000baseX_Half | ADVERTISED_1000baseX_Full | SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full); - ret = fec_probe(bd, -1, IMX_FEC_BASE, bus, phydev); - if (ret) - goto err_sw; - - return 0; - -err_sw: - free(phydev); -err_phy: - mdio_unregister(bus); - free(bus); - return ret; -} -#endif /* CONFIG_FEC_MXC */ - -/* - * Do not overwrite the console - * Always use serial for U-Boot console - */ -int overwrite_console(void) -{ - return 1; -} + if (phydev->drv->config) + return phydev->drv->config(phydev); -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, bd_t *bd) -{ - fdt_fixup_ethernet(blob); return 0; } -#endif int board_init(void) { + struct gpio_desc phy_int_gbe, spi2_wp; + int ret; + debug("board init\n"); /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - /* Setup iomux for non console UARTS */ - displ5_set_iomux_uart(); - - displ5_setup_ecspi(); - + /* Setup misc (application specific) stuff */ SETUP_IOMUX_PADS(misc_pads); - get_board_id(gpio_table_sw_ids, &gpio_table_sw_ids_names[0], - ARRAY_SIZE(gpio_table_sw_ids), &sw_ids_valid, &unit_id); + get_board_id(gpio_table_sw_names, &gpio_table_sw_ids_names[0], + ARRAY_SIZE(gpio_table_sw_names), &sw_ids_valid, &unit_id); debug("SWx unit_id 0x%x\n", unit_id); - get_board_id(gpio_table_hw_ids, &gpio_table_hw_ids_names[0], - ARRAY_SIZE(gpio_table_hw_ids), &hw_ids_valid, &cpu_id); + get_board_id(gpio_table_hw_names, &gpio_table_hw_ids_names[0], + ARRAY_SIZE(gpio_table_hw_names), &hw_ids_valid, &cpu_id); debug("HWx cpu_id 0x%x\n", cpu_id); if (hw_ids_valid && sw_ids_valid) @@ -369,9 +178,29 @@ int board_init(void) udelay(25); - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + /* Setup low level FEC (ETH) */ + ret = dm_gpio_lookup_name("GPIO1_28", &phy_int_gbe); + if (ret) { + printf("Cannot get GPIO1_28\n"); + } else { + ret = dm_gpio_request(&phy_int_gbe, "INT_GBE"); + if (!ret) + dm_gpio_set_dir_flags(&phy_int_gbe, GPIOD_IS_IN); + } + + iomuxc_set_rgmii_io_voltage(DDR_SEL_1P5V_IO); + enable_fec_anatop_clock(0, ENET_125MHZ); + + /* Setup #WP for SPI-NOR memory */ + ret = dm_gpio_lookup_name("GPIO7_0", &spi2_wp); + if (ret) { + printf("Cannot get GPIO7_0\n"); + } else { + ret = dm_gpio_request(&spi2_wp, "spi2_#wp"); + if (!ret) + dm_gpio_set_dir_flags(&spi2_wp, GPIOD_IS_OUT | + GPIOD_IS_OUT_ACTIVE); + } return 0; } @@ -395,21 +224,24 @@ static inline void setup_boot_modes(void) {} int misc_init_r(void) { + struct gpio_desc em_pad; int ret; setup_boot_modes(); - ret = gpio_request(EM_PAD, "Emergency_PAD"); + ret = dm_gpio_lookup_name("GPIO3_29", &em_pad); if (ret) { - printf("Can't request emergency PAD gpio\n"); + printf("Can't find emergency PAD gpio\n"); return ret; } - ret = gpio_direction_input(EM_PAD); + ret = dm_gpio_request(&em_pad, "Emergency_PAD"); if (ret) { - printf("Can't set emergency PAD direction\n"); + printf("Can't request emergency PAD gpio\n"); return ret; } + dm_gpio_set_dir_flags(&em_pad, GPIOD_IS_IN); + return 0; } diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c index 354b63e..311edaf 100644 --- a/board/liebherr/display5/spl.c +++ b/board/liebherr/display5/spl.c @@ -104,6 +104,80 @@ static const struct mx6_ddr3_cfg mt41k128m16jt_125 = { .trasmin = 3500, }; +iomux_v3_cfg_t const uart_console_pads[] = { + /* UART5 */ + MX6_PAD_CSI0_DAT14__UART5_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT15__UART5_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT18__UART5_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_CSI0_DAT19__UART5_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +void displ5_set_iomux_uart_spl(void) +{ + SETUP_IOMUX_PADS(uart_console_pads); +} + +iomux_v3_cfg_t const misc_pads_spl[] = { + /* Emergency recovery pin */ + MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +void displ5_set_iomux_misc_spl(void) +{ + SETUP_IOMUX_PADS(misc_pads_spl); +} + +#ifdef CONFIG_MXC_SPI +iomux_v3_cfg_t const ecspi2_pads[] = { + /* SPI2, NOR Flash nWP, CS0 */ + MX6_PAD_CSI0_DAT10__ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT11__GPIO5_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_spi_cs_gpio(unsigned int bus, unsigned int cs) +{ + if (bus != 1 || cs != 0) + return -EINVAL; + + return IMX_GPIO_NR(5, 29); +} + +void displ5_set_iomux_ecspi_spl(void) +{ + SETUP_IOMUX_PADS(ecspi2_pads); +} + +#else +void displ5_set_iomux_ecspi_spl(void) {} +#endif + +#ifdef CONFIG_FSL_ESDHC_IMX +iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_ALE__SD4_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +void displ5_set_iomux_usdhc_spl(void) +{ + SETUP_IOMUX_PADS(usdhc4_pads); +} + +#else +void displ5_set_iomux_usdhc_spl(void) {} +#endif + static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 7a59b89..4bacd86 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -207,6 +207,35 @@ struct fsl_esdhc_cfg usdhc_cfg[] = { {USDHC2_BASE_ADDR} /* Baseboard */ }; +void board_boot_order(u32 *spl_boot_list) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + unsigned int reg = readl(&psrc->sbmr1) >> 11; + /* + * Upon reading BOOT_CFG register the following map is done: + * Bit 11 and 12 of BOOT_CFG register can determine the current + * mmc port + * 0x1 SD1-SOM + * 0x2 SD2-Baseboard + */ + + reg &= 0x3; /* Only care about bottom 2 bits */ + switch (reg) { + case 0: + spl_boot_list[0] = BOOT_DEVICE_MMC1; + break; + case 1: + spl_boot_list[0] = BOOT_DEVICE_MMC2; + break; + } + + /* If we cannot find a valid MMC/SD card, try NAND */ + spl_boot_list[1] = BOOT_DEVICE_NAND; + + /* As a last resort, use serial downloader */ + spl_boot_list[2] = BOOT_DEVICE_BOARD; +} + int board_mmc_init(bd_t *bis) { struct src *psrc = (struct src *)SRC_BASE_ADDR; @@ -348,13 +377,10 @@ void board_init_f(ulong dummy) /* setup GP timer */ timer_init(); + /* Enable device tree and early DM support*/ + spl_early_init(); + /* UART clocks enabled and gd valid - init serial console */ preloader_console_init(); - - /* Clear the BSS. */ - memset(__bss_start, 0, __bss_end - __bss_start); - - /* load/boot image from boot device */ - board_init_r(NULL, 0); } #endif diff --git a/board/phytec/pcl063/pcl063.c b/board/phytec/pcl063/pcl063.c index f8cbd1c..96dd9e3 100644 --- a/board/phytec/pcl063/pcl063.c +++ b/board/phytec/pcl063/pcl063.c @@ -178,7 +178,9 @@ int board_phy_config(struct phy_device *phydev) int board_early_init_f(void) { setup_iomux_uart(); +#ifdef CONFIG_FEC_MXC setup_iomux_fec(); +#endif return 0; } diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c index 6d4c827..b5e080c 100644 --- a/board/phytec/pcl063/spl.c +++ b/board/phytec/pcl063/spl.c @@ -183,28 +183,6 @@ int board_mmc_init(bd_t *bis) return 0; } -void board_boot_order(u32 *spl_boot_list) -{ - u32 bmode = imx6_src_get_boot_mode(); - u8 boot_dev = BOOT_DEVICE_MMC1; - - switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { - case IMX6_BMODE_SD: - case IMX6_BMODE_ESD: - boot_dev = BOOT_DEVICE_MMC1; - break; - case IMX6_BMODE_MMC: - case IMX6_BMODE_EMMC: - boot_dev = BOOT_DEVICE_MMC2; - break; - default: - /* Default - BOOT_DEVICE_MMC1 */ - printf("Wrong board boot order\n"); - break; - } - - spl_boot_list[0] = boot_dev; -} #endif /* CONFIG_FSL_ESDHC_IMX */ void board_init_f(ulong dummy) diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c index e1ebe8e..b52432e 100644 --- a/board/phytec/pcm052/pcm052.c +++ b/board/phytec/pcm052/pcm052.c @@ -403,7 +403,20 @@ int board_phy_config(struct phy_device *phydev) int checkboard(void) { #ifdef CONFIG_TARGET_BK4R1 - puts("Board: BK4r1 (L333)\n"); + u32 *gpio3_pdir = (u32 *)(GPIO3_BASE_ADDR + 0x10); + + /* + * USB_RESET_N (PTC30 - GPIO103 - PORT3[7]): + * L333 -> pull up added -> read 1 + * L320 -> no pull up -> read 0 + * + * Default iomuxc_ptc30 value after reset: 0x300061 -> RCON28 + * - input enabled, pull (up/down) disabled + */ + if (*gpio3_pdir & BIT(7)) + puts("Board: BK4r1 (L333)\n"); + else + puts("Board: BK4r1 (L320)\n"); #else puts("Board: PCM-052\n"); #endif diff --git a/board/technexion/pico-imx6/Kconfig b/board/technexion/pico-imx6/Kconfig new file mode 100644 index 0000000..4af18e5 --- /dev/null +++ b/board/technexion/pico-imx6/Kconfig @@ -0,0 +1,15 @@ +if TARGET_PICO_IMX6 + +config SYS_BOARD + default "pico-imx6" + +config SYS_VENDOR + default "technexion" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "pico-imx6" + +endif diff --git a/board/technexion/pico-imx6/MAINTAINERS b/board/technexion/pico-imx6/MAINTAINERS new file mode 100644 index 0000000..dd6fb96 --- /dev/null +++ b/board/technexion/pico-imx6/MAINTAINERS @@ -0,0 +1,9 @@ +TECHNEXION PICO-IMX6 BOARD +M: Fabio Estevam <festevam@gmail.com> +S: Maintained +F: arch/arm/dts/imx6qdl-pico.dtsi +F: arch/arm/dts/imx6q-pico.dts +F: arch/arm/dts/imx6dl-pico.dts +F: board/technexion/pico-imx6/ +F: include/configs/pico-imx6.h +F: configs/pico-imx6_defconfig diff --git a/board/technexion/pico-imx6/Makefile b/board/technexion/pico-imx6/Makefile new file mode 100644 index 0000000..ddb1604 --- /dev/null +++ b/board/technexion/pico-imx6/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2013 Freescale Semiconductor, Inc. + +obj-y := pico-imx6.o spl.o diff --git a/board/technexion/pico-imx6/README b/board/technexion/pico-imx6/README new file mode 100644 index 0000000..f1e84bf --- /dev/null +++ b/board/technexion/pico-imx6/README @@ -0,0 +1,73 @@ +How to Update U-Boot on pico-imx6q/dl boards +-------------------------------------------- + +Required software on the host PC: + +- UUU: https://github.com/NXPmicro/mfgtools + +Build U-Boot for pico: + +$ make mrproper +$ make pico-imx6_defconfig +$ make + +This generates the SPL and u-boot-dtb.img binaries. + +1. Loading U-Boot via USB Serial Download Protocol + +Note: This method is convenient for development purposes. +If the eMMC has already a U-Boot flashed then the user can +go to step 2 below in order to update U-Boot. + +Put pico board in USB download mode (Refer to the following link for details: +https://www.technexion.com/support/knowledgebase/boot-configuration-settings-for-pico-baseboards/). + +Connect a USB to serial adapter between the host PC and pico. + +Connect a USB cable between the OTG pico port and the host PC. + +Open a terminal program such as minicom. + +Copy SPL and u-boot-dtb.img to the uuu folder. + +Load the U-Boot via USB: + +$ sudo ./uuu -v uuu_script + +where uuu_script contains the following: + +SDP: boot -f SPL +SDPU: write -f u-boot-dtb.img -addr 0x10000000 +SDPU: jump -addr 0x10000000 + +Then U-Boot starts and its messages appear in the console program. + +Use the default environment variables: + +=> env default -f -a +=> saveenv + +2. Flashing U-Boot into the eMMC + +The default U-Boot environment expects the use of eMMC user +partition. To ensure we are using the proper eMMC partition for boot, +please run: + +=> mmc partconf 0 0 0 0 + +Next, run the DFU agent so we can flash the new images using dfu-util +tool: + +=> dfu 0 mmc 0 + +Flash SPL and u-boot-dtb.img into the eMMC running the following commands on a PC: + +$ sudo dfu-util -D SPL -a spl + +$ sudo dfu-util -D u-boot-dtb.img -a u-boot + +Remove power from the pico board. + +Put pico board into normal boot mode. + +Power up the board and the new updated U-Boot should boot from eMMC. diff --git a/board/technexion/pico-imx6/pico-imx6.c b/board/technexion/pico-imx6/pico-imx6.c new file mode 100644 index 0000000..f8eeb40 --- /dev/null +++ b/board/technexion/pico-imx6/pico-imx6.c @@ -0,0 +1,362 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014 O.S. Systems Software LTDA. + * + * Author: Fabio Estevam <festevam@gmail.com> + */ + +#include <asm/arch/clock.h> +#include <asm/arch/crm_regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/mx6-pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/gpio.h> +#include <asm/arch/mxc_hdmi.h> +#include <asm/mach-imx/video.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/io.h> +#include <linux/sizes.h> +#include <common.h> +#include <miiphy.h> +#include <netdev.h> +#include <phy.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define ETH_PHY_RESET IMX_GPIO_NR(1, 26) +#define LVDS0_EN IMX_GPIO_NR(2, 8) +#define LVDS0_BL_EN IMX_GPIO_NR(2, 9) + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + IOMUX_PADS(PAD_CSI0_DAT10__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +static void setup_iomux_uart(void) +{ + SETUP_IOMUX_PADS(uart1_pads); +} + +static iomux_v3_cfg_t const lvds_pads[] = { + /* lvds */ + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static iomux_v3_cfg_t const enet_pads[] = { + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), + /* AR8035 PHY Reset */ + IOMUX_PADS(PAD_ENET_RXD1__GPIO1_IO26 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void setup_iomux_enet(void) +{ + SETUP_IOMUX_PADS(enet_pads); + + /* Reset AR8031 PHY */ + gpio_request(ETH_PHY_RESET, "enet_phy_reset"); + gpio_direction_output(ETH_PHY_RESET, 0); + udelay(500); + gpio_set_value(ETH_PHY_RESET, 1); +} + +#if defined(CONFIG_VIDEO_IPUV3) +static iomux_v3_cfg_t const ft5x06_wvga_pads[] = { + IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), /* HSync */ + IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), /* VSync */ + IOMUX_PADS(PAD_DI0_PIN4__IPU1_DI0_PIN04 | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm)), /* Contrast */ + IOMUX_PADS(PAD_DI0_PIN15__IPU1_DI0_PIN15), /* DISP0_DRDY */ + IOMUX_PADS(PAD_DISP0_DAT0__IPU1_DISP0_DATA00), + IOMUX_PADS(PAD_DISP0_DAT1__IPU1_DISP0_DATA01), + IOMUX_PADS(PAD_DISP0_DAT2__IPU1_DISP0_DATA02), + IOMUX_PADS(PAD_DISP0_DAT3__IPU1_DISP0_DATA03), + IOMUX_PADS(PAD_DISP0_DAT4__IPU1_DISP0_DATA04), + IOMUX_PADS(PAD_DISP0_DAT5__IPU1_DISP0_DATA05), + IOMUX_PADS(PAD_DISP0_DAT6__IPU1_DISP0_DATA06), + IOMUX_PADS(PAD_DISP0_DAT7__IPU1_DISP0_DATA07), + IOMUX_PADS(PAD_DISP0_DAT8__IPU1_DISP0_DATA08), + IOMUX_PADS(PAD_DISP0_DAT9__IPU1_DISP0_DATA09), + IOMUX_PADS(PAD_DISP0_DAT10__IPU1_DISP0_DATA10), + IOMUX_PADS(PAD_DISP0_DAT11__IPU1_DISP0_DATA11), + IOMUX_PADS(PAD_DISP0_DAT12__IPU1_DISP0_DATA12), + IOMUX_PADS(PAD_DISP0_DAT13__IPU1_DISP0_DATA13), + IOMUX_PADS(PAD_DISP0_DAT14__IPU1_DISP0_DATA14), + IOMUX_PADS(PAD_DISP0_DAT15__IPU1_DISP0_DATA15), + IOMUX_PADS(PAD_DISP0_DAT16__IPU1_DISP0_DATA16), + IOMUX_PADS(PAD_DISP0_DAT17__IPU1_DISP0_DATA17), + IOMUX_PADS(PAD_DISP0_DAT18__IPU1_DISP0_DATA18), + IOMUX_PADS(PAD_DISP0_DAT19__IPU1_DISP0_DATA19), + IOMUX_PADS(PAD_DISP0_DAT20__IPU1_DISP0_DATA20), + IOMUX_PADS(PAD_DISP0_DAT21__IPU1_DISP0_DATA21), + IOMUX_PADS(PAD_DISP0_DAT22__IPU1_DISP0_DATA22), + IOMUX_PADS(PAD_DISP0_DAT23__IPU1_DISP0_DATA23), + IOMUX_PADS(PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* DISP0_BKLEN */ + IOMUX_PADS(PAD_SD4_DAT3__GPIO2_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL)), /* DISP0_VDDEN */ +}; + +static void do_enable_hdmi(struct display_info_t const *dev) +{ + imx_enable_hdmi_phy(); +} + +static void enable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *) + IOMUXC_BASE_ADDR; + + /* set CH0 data width to 24bit (IOMUXC_GPR2:5 0=18bit, 1=24bit) */ + u32 reg = readl(&iomux->gpr[2]); + reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; + writel(reg, &iomux->gpr[2]); + + /* Enable Backlight - use GPIO for Brightness adjustment */ + SETUP_IOMUX_PAD(PAD_SD4_DAT1__GPIO2_IO09); + gpio_request(IMX_GPIO_NR(2, 9), "backlight_enable"); + gpio_direction_output(IMX_GPIO_NR(2, 9), 1); + + gpio_request(IMX_GPIO_NR(2, 8), "brightness"); + SETUP_IOMUX_PAD(PAD_SD4_DAT0__GPIO2_IO08); + gpio_direction_output(IMX_GPIO_NR(2, 8), 1); +} + +static void enable_ft5x06_wvga(struct display_info_t const *dev) +{ + SETUP_IOMUX_PADS(ft5x06_wvga_pads); + + gpio_request(IMX_GPIO_NR(2, 10), "parallel_enable"); + gpio_request(IMX_GPIO_NR(2, 11), "parallel_brightness"); + gpio_direction_output(IMX_GPIO_NR(2, 10), 1); + gpio_direction_output(IMX_GPIO_NR(2, 11), 1); +} + +struct display_info_t const displays[] = {{ + .bus = 1, + .addr = 0x38, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = NULL, + .enable = enable_ft5x06_wvga, + .mode = { + .name = "FT5x06-WVGA", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 30303, + .left_margin = 45, + .right_margin = 210, + .upper_margin = 22, + .lower_margin = 22, + .hsync_len = 1, + .vsync_len = 1, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = NULL, + .enable = enable_lvds, + .mode = { + .name = "hj070na", + .refresh = 60, + .xres = 1024, + .yres = 600, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} } }; +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + /* Setup HSYNC, VSYNC, DISP_CLK for debugging purposes */ + SETUP_IOMUX_PADS(lvds_pads); + gpio_request(LVDS0_EN, "lvds0_enable"); + gpio_request(LVDS0_BL_EN, "lvds0_bl_enable"); + gpio_direction_output(LVDS0_EN, 1); + gpio_direction_output(LVDS0_BL_EN, 1); + + enable_ipu_clock(); + imx_setup_hdmi(); + + reg = __raw_readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK | MXC_CCM_CCGR3_LDB_DI1_MASK; + writel(reg, &mxc_ccm->CCGR3); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK + | MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) + | (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + + reg = readl(&mxc_ccm->chsccdr); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + << MXC_CCM_CHSCCDR_IPU1_DI1_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + | IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW + | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT + | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT + | IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0 + | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + reg = readl(&iomux->gpr[3]); + + reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK + | IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) + | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 + << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); + + writel(reg, &iomux->gpr[3]); +} +#endif /* CONFIG_VIDEO_IPUV3 */ + +int board_early_init_f(void) +{ + setup_iomux_uart(); + +#if defined(CONFIG_VIDEO_IPUV3) + setup_display(); +#endif + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + setup_iomux_enet(); + + return cpu_eth_init(bis); +} + +int board_phy_config(struct phy_device *phydev) +{ + unsigned short val; + + /* To enable AR8035 ouput a 125MHz clk from CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= 0xffe7; + val |= 0x18; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + val |= 0x0100; + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); + + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int overwrite_console(void) +{ + return 1; +} + +int board_late_init(void) +{ + if (is_mx6dq()) + env_set("board_rev", "MX6Q"); + else + env_set("board_rev", "MX6DL"); + + return 0; +} + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + return 0; +} + +int checkboard(void) +{ + puts("Board: PICO-IMX6\n"); + + return 0; +} diff --git a/board/technexion/pico-imx6/spl.c b/board/technexion/pico-imx6/spl.c new file mode 100644 index 0000000..06ad0a8 --- /dev/null +++ b/board/technexion/pico-imx6/spl.c @@ -0,0 +1,314 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2015 Technexion Ltd. + * + * Author: Richard Hu <richard.hu@technexion.com> + * Fabio Estevam <festevam@gmail.com> + */ + +#include <asm/arch/clock.h> +#include <asm/arch/imx-regs.h> +#include <asm/arch/iomux.h> +#include <asm/arch/mx6-pins.h> +#include <linux/errno.h> +#include <asm/gpio.h> +#include <asm/mach-imx/iomux-v3.h> +#include <asm/mach-imx/video.h> +#include <mmc.h> +#include <fsl_esdhc_imx.h> +#include <asm/arch/crm_regs.h> +#include <asm/io.h> +#include <asm/arch/sys_proto.h> +#include <spl.h> + +#if defined(CONFIG_SPL_BUILD) +#include <asm/arch/mx6-ddr.h> + +#define IMX6DQ_DRIVE_STRENGTH 0x30 +#define IMX6SDL_DRIVE_STRENGTH 0x28 + +#ifdef CONFIG_SPL_OS_BOOT +int spl_start_uboot(void) +{ + /* Break into full U-Boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + + return 0; +} +#endif + +/* configure MX6Q/DUAL mmdc DDR io registers */ +static struct mx6dq_iomux_ddr_regs mx6dq_ddr_ioregs = { + .dram_sdclk_0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdclk_1 = IMX6DQ_DRIVE_STRENGTH, + .dram_cas = IMX6DQ_DRIVE_STRENGTH, + .dram_ras = IMX6DQ_DRIVE_STRENGTH, + .dram_reset = IMX6DQ_DRIVE_STRENGTH, + .dram_sdcke0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdcke1 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdodt1 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs0 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs1 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs2 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs3 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs4 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs5 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs6 = IMX6DQ_DRIVE_STRENGTH, + .dram_sdqs7 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm0 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm1 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm2 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm3 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm4 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm5 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm6 = IMX6DQ_DRIVE_STRENGTH, + .dram_dqm7 = IMX6DQ_DRIVE_STRENGTH, +}; + +/* configure MX6Q/DUAL mmdc GRP io registers */ +static struct mx6dq_iomux_grp_regs mx6dq_grp_ioregs = { + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = IMX6DQ_DRIVE_STRENGTH, + .grp_ctlds = IMX6DQ_DRIVE_STRENGTH, + .grp_ddrmode = 0x00020000, + .grp_b0ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b1ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b2ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b3ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b4ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b5ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b6ds = IMX6DQ_DRIVE_STRENGTH, + .grp_b7ds = IMX6DQ_DRIVE_STRENGTH, +}; + +/* configure MX6SOLO/DUALLITE mmdc DDR io registers */ +struct mx6sdl_iomux_ddr_regs mx6sdl_ddr_ioregs = { + .dram_sdclk_0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdclk_1 = IMX6SDL_DRIVE_STRENGTH, + .dram_cas = IMX6SDL_DRIVE_STRENGTH, + .dram_ras = IMX6SDL_DRIVE_STRENGTH, + .dram_reset = IMX6SDL_DRIVE_STRENGTH, + .dram_sdcke0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdcke1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdba2 = 0x00000000, + .dram_sdodt0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdodt1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs0 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs1 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs2 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs3 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs4 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs5 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs6 = IMX6SDL_DRIVE_STRENGTH, + .dram_sdqs7 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm0 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm1 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm2 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm3 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm4 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm5 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm6 = IMX6SDL_DRIVE_STRENGTH, + .dram_dqm7 = IMX6SDL_DRIVE_STRENGTH, +}; + +/* configure MX6SOLO/DUALLITE mmdc GRP io registers */ +struct mx6sdl_iomux_grp_regs mx6sdl_grp_ioregs = { + .grp_ddr_type = 0x000c0000, + .grp_ddrmode_ctl = 0x00020000, + .grp_ddrpke = 0x00000000, + .grp_addds = IMX6SDL_DRIVE_STRENGTH, + .grp_ctlds = IMX6SDL_DRIVE_STRENGTH, + .grp_ddrmode = 0x00020000, + .grp_b0ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b1ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b2ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b3ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b4ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b5ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b6ds = IMX6SDL_DRIVE_STRENGTH, + .grp_b7ds = IMX6SDL_DRIVE_STRENGTH, +}; + +/* H5T04G63AFR-PB for i.mx6Solo/DL operating DDR at 400MHz */ +static struct mx6_ddr3_cfg h5t04g63afr = { + .mem_speed = 800, + .density = 4, + .width = 16, + .banks = 8, + .rowaddr = 15, + .coladdr = 10, + .pagesz = 2, + .trcd = 1500, + .trcmin = 5250, + .trasmin = 3750, +}; + +/* H5TQ2G63FFR-H9 for i.mx6Solo/DL operating DDR at 400MHz */ +static struct mx6_ddr3_cfg h5tq2g63ffr = { + .mem_speed = 800, + .density = 2, + .width = 16, + .banks = 8, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1500, + .trcmin = 5250, + .trasmin = 3750, +}; + +static struct mx6_mmdc_calibration mx6q_1g_mmdc_calib = { + .p0_mpwldectrl0 = 0x00000000, + .p0_mpwldectrl1 = 0x00000000, + .p1_mpwldectrl0 = 0x00000000, + .p1_mpwldectrl1 = 0x00000000, + .p0_mpdgctrl0 = 0x032C0340, + .p0_mpdgctrl1 = 0x03300324, + .p1_mpdgctrl0 = 0x032C0338, + .p1_mpdgctrl1 = 0x03300274, + .p0_mprddlctl = 0x423A383E, + .p1_mprddlctl = 0x3638323E, + .p0_mpwrdlctl = 0x363C4640, + .p1_mpwrdlctl = 0x4034423C, +}; + +/* DDR 32bit */ +static struct mx6_ddr_sysinfo mem_s = { + .dsize = 1, + .cs1_mirror = 0, + /* config for full 4GB range so that get_mem_size() works */ + .cs_density = 32, + .ncs = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 0, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = { + .p0_mpwldectrl0 = 0x001f001f, + .p0_mpwldectrl1 = 0x001f001f, + .p1_mpwldectrl0 = 0x001f001f, + .p1_mpwldectrl1 = 0x001f001f, + .p0_mpdgctrl0 = 0x420e020e, + .p0_mpdgctrl1 = 0x02000200, + .p1_mpdgctrl0 = 0x42020202, + .p1_mpdgctrl1 = 0x01720172, + .p0_mprddlctl = 0x494c4f4c, + .p1_mprddlctl = 0x4a4c4c49, + .p0_mpwrdlctl = 0x3f3f3133, + .p1_mpwrdlctl = 0x39373f2e, +}; + +static struct mx6_mmdc_calibration mx6s_512m_mmdc_calib = { + .p0_mpwldectrl0 = 0x0040003c, + .p0_mpwldectrl1 = 0x0032003e, + .p0_mpdgctrl0 = 0x42350231, + .p0_mpdgctrl1 = 0x021a0218, + .p0_mprddlctl = 0x4b4b4e49, + .p0_mpwrdlctl = 0x3f3f3035, +}; + +static void ccgr_init(void) +{ + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + writel(0x00C03F3F, &ccm->CCGR0); + writel(0x0030FC03, &ccm->CCGR1); + writel(0x0FFFC000, &ccm->CCGR2); + writel(0x3FF03000, &ccm->CCGR3); + writel(0x00FFF300, &ccm->CCGR4); + writel(0x0F0000C3, &ccm->CCGR5); + writel(0x000003FF, &ccm->CCGR6); +} + +static void spl_dram_init(void) +{ + if (is_mx6solo()) { + mx6sdl_dram_iocfg(32, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); + mx6_dram_cfg(&mem_s, &mx6s_512m_mmdc_calib, &h5tq2g63ffr); + } else if (is_mx6dl()) { + mx6sdl_dram_iocfg(32, &mx6sdl_ddr_ioregs, &mx6sdl_grp_ioregs); + mx6_dram_cfg(&mem_s, &mx6dl_1g_mmdc_calib, &h5t04g63afr); + } else if (is_mx6dq()) { + mx6dq_dram_iocfg(32, &mx6dq_ddr_ioregs, &mx6dq_grp_ioregs); + mx6_dram_cfg(&mem_s, &mx6q_1g_mmdc_calib, &h5t04g63afr); + } + + udelay(100); +} + +void board_init_f(ulong dummy) +{ + ccgr_init(); + + /* setup AIPS and disable watchdog */ + arch_cpu_init(); + + gpr_init(); + + /* iomux */ + board_early_init_f(); + + /* setup GP timer */ + timer_init(); + + /* UART clocks enabled and gd valid - init serial console */ + preloader_console_init(); + + /* DDR initialization */ + spl_dram_init(); +} + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static struct fsl_esdhc_cfg usdhc_cfg[1] = { + {USDHC3_BASE_ADDR}, +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + /* SOM MicroSD Card Detect */ + IOMUX_PADS(PAD_EIM_DA9__GPIO3_IO09 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + SETUP_IOMUX_PADS(usdhc3_pads); + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); +} +#endif + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (is_mx6dq() && !strcmp(name, "imx6q-pico")) + return 0; + else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-pico")) + return 0; + + return -EINVAL; +} +#endif diff --git a/board/technexion/pico-imx6ul/README b/board/technexion/pico-imx6ul/README index bb8ee3f..40d4344 100644 --- a/board/technexion/pico-imx6ul/README +++ b/board/technexion/pico-imx6ul/README @@ -75,7 +75,7 @@ $ make imx_v6_v7_defconfig (Using the default imx_v6_v7_defconfig configuration just for an example. In order to boot faster the user should customize the defconfig by only enabling the minimal required drivers). -$ make -j4 uImage LOADADDR=0x80800000 +$ make -j4 uImage LOADADDR=0x80008000 $ cp arch/arm/boot/uImage /tftpboot $ cp arch/arm/boot/dts/imx6ul-pico-hobbit.dtb /tftpboot @@ -93,7 +93,7 @@ Get the kernel: => tftp ${loadaddr} uImage Write the kernel at 2MB offset: -=> mmc write ${loadaddr} 0x1000 0x4000 +=> mmc write ${loadaddr} 0x1000 0x5000 Setup the bootargs: => setenv bootargs 'console=ttymxc5,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait rw' @@ -104,8 +104,8 @@ Prepare args: Image Name: Linux-4.19.0-rc2-next-20180905-0 Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 8365608 Bytes = 8 MiB - Load Address: 80800000 - Entry Point: 80800000 + Load Address: 80008000 + Entry Point: 80008000 Verifying Checksum ... OK ## Flattened Device Tree blob at 83000000 Booting using the fdt blob at 0x83000000 diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c index 95b482a..e27a03c 100644 --- a/board/technexion/pico-imx6ul/pico-imx6ul.c +++ b/board/technexion/pico-imx6ul/pico-imx6ul.c @@ -42,6 +42,9 @@ DECLARE_GLOBAL_DATA_PTR; #define ENET_CLK_PAD_CTRL (PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) +#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ + PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm) + #define RMII_PHY_RESET IMX_GPIO_NR(1, 28) static iomux_v3_cfg_t const fec_pads[] = { @@ -105,6 +108,54 @@ static int setup_fec(void) return 0; } +#ifdef CONFIG_VIDEO_MXS +static iomux_v3_cfg_t const lcd_pads[] = { + MX6_PAD_LCD_CLK__LCDIF_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_ENABLE__LCDIF_ENABLE | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_HSYNC__LCDIF_HSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_VSYNC__LCDIF_VSYNC | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA00__LCDIF_DATA00 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA01__LCDIF_DATA01 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA02__LCDIF_DATA02 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA03__LCDIF_DATA03 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA04__LCDIF_DATA04 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA05__LCDIF_DATA05 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA06__LCDIF_DATA06 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA07__LCDIF_DATA07 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA08__LCDIF_DATA08 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA09__LCDIF_DATA09 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA10__LCDIF_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA11__LCDIF_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA12__LCDIF_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA13__LCDIF_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA14__LCDIF_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA15__LCDIF_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA16__LCDIF_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA17__LCDIF_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA18__LCDIF_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA19__LCDIF_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA20__LCDIF_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA21__LCDIF_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA22__LCDIF_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL), + MX6_PAD_LCD_DATA23__LCDIF_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL), + /* LCD_BLT_CTRL: GPIO for Brightness adjustment */ + MX6_PAD_NAND_ALE__GPIO4_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* LCD_VDD_EN: LCD enabled */ + MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +void setup_lcd(void) +{ + imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); + gpio_request(IMX_GPIO_NR(4, 10), "lcd_brightness"); + gpio_request(IMX_GPIO_NR(1, 11), "lcd_enable"); + /* Set Brightness to high */ + gpio_direction_output(IMX_GPIO_NR(4, 10) , 1); + /* Set LCD enable to high */ + gpio_direction_output(IMX_GPIO_NR(1, 11) , 1); +} +#endif + int board_phy_config(struct phy_device *phydev) { phy_write(phydev, MDIO_DEVAD_NONE, 0x1f, 0x8190); @@ -214,7 +265,9 @@ int board_init(void) setup_fec(); setup_usb(); - +#ifdef CONFIG_VIDEO_MXS + setup_lcd(); +#endif return 0; } diff --git a/board/technexion/pico-imx6ul/spl.c b/board/technexion/pico-imx6ul/spl.c index 284aa40..7f520be 100644 --- a/board/technexion/pico-imx6ul/spl.c +++ b/board/technexion/pico-imx6ul/spl.c @@ -19,6 +19,10 @@ #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { + /* Break into full U-Boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + return 0; } #endif diff --git a/board/technexion/pico-imx7d/MAINTAINERS b/board/technexion/pico-imx7d/MAINTAINERS index 6e7316b..325e173 100644 --- a/board/technexion/pico-imx7d/MAINTAINERS +++ b/board/technexion/pico-imx7d/MAINTAINERS @@ -8,3 +8,5 @@ F: configs/pico-imx7d_defconfig F: configs/pico-imx7d_bl33_defconfig F: configs/pico-hobbit-imx7d_defconfig F: configs/pico-pi-imx7d_defconfig +F: configs/pico-nymph-imx7d_defconfig +F: configs/pico-dwarf-imx7d_defconfig diff --git a/board/technexion/pico-imx7d/README b/board/technexion/pico-imx7d/README index 6aa0d25..4d57cdb 100644 --- a/board/technexion/pico-imx7d/README +++ b/board/technexion/pico-imx7d/README @@ -66,3 +66,94 @@ Remove power from the pico board. Put pico board into normal boot mode. Power up the board and the new updated U-Boot should boot from eMMC. + +Booting in Falcon mode +====================== + +Generate a uImage kernel: + +$ make imx_v6_v7_defconfig (Using the default imx_v6_v7_defconfig configuration +just for an example. In order to boot faster the user should customize the +defconfig by only enabling the minimal required drivers). + +$ make -j4 uImage LOADADDR=0x80008000 + +$ cp arch/arm/boot/uImage /tftpboot +$ cp arch/arm/boot/dts/imx7d-pico-pi.dtb /tftpboot + +In the U-Boot prompt: + +Setup the server and board IP addresses: +=> setenv serverip 192.168.0.10 +=> setenv ipaddr 192.168.0.11 + +Get the dtb file: +=> tftp ${fdt_addr} imx7d-pico-pi.dtb + +Get the kernel: +=> tftp ${loadaddr} uImage + +Write the kernel at 2MB offset: +=> mmc write ${loadaddr} 0x1000 0x5000 + +Setup the bootargs: +=> setenv bootargs 'console=ttymxc4,115200 root=/dev/mmcblk2p1 rootfstype=ext4 rootwait rw' + +Prepare args: +=> spl export fdt ${loadaddr} - ${fdt_addr} +## Booting kernel from Legacy Image at 80800000 ... + Image Name: Linux-5.2.14 + Image Type: ARM Linux Kernel Image (uncompressed) + Data Size: 9077544 Bytes = 8.7 MiB + Load Address: 80008000 + Entry Point: 80008000 + Verifying Checksum ... OK +## Flattened Device Tree blob at 83000000 + Booting using the fdt blob at 0x83000000 + Loading Kernel Image + Using Device Tree in place at 83000000, end 8300b615 +subcommand not supported +subcommand not supported + Using Device Tree in place at 83000000, end 8300e615 +Argument image is now in RAM: 0x83000000 +=> + +Write 1MB of args data (0x800 sectors) to 1MB offset (0x800 sectors): + +=> mmc write ${fdt_addr} 0x800 0x800 + +In order to boot with Falcon mode, activate the CONFIG_SPL_OS_BOOT +option in the defconfig + +--- a/configs/pico-imx7d_defconfig ++++ b/configs/pico-imx7d_defconfig +@@ -67,3 +67,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 + CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 + CONFIG_CI_UDC=y + CONFIG_VIDEO=y ++CONFIG_SPL_OS_BOOT=y + +Then rebuild U-Boot: + +$ make pico-imx7d_defconfig +$ make -j4 + +Launch UMS: +=> ums 0 mmc 0 + +Flash the new binaries: + +$ sudo dd if=SPL of=/dev/sdX bs=1k seek=1; sync +$ sudo dd if=u-boot-dtb.img of=/dev/sdX bs=1k seek=69; sync + +And then SPL binary will load and jump directly to the kernel: + +U-Boot SPL 2019.10-rc3-00284-g001c8ea94a-dirty (Sep 10 2019 - 12:46:01 -0300) +Trying to boot from MMC1 +[ 0.000000] Booting Linux on physical CPU 0x0 +[ 0.000000] Linux version 5.2.14 (fabio@fabio-OptiPlex-7010) (gcc version 7.4.0 (Ubuntu/Linaro 7.4.0-1ubuntu1~18.04.1)) #30 SMP Wed Sep 10 12:36:27 -03 2019 +[ 0.000000] CPU: ARMv7 Processor [410fc075] revision 5 (ARMv7), cr=10c5387d +[ 0.000000] CPU: div instructions available: patching division code +[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache +[ 0.000000] OF: fdt: Machine model: TechNexion PICO-IMX7D Board and PI baseboard +... diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c index 216475c..bfa3c3c 100644 --- a/board/technexion/pico-imx7d/pico-imx7d.c +++ b/board/technexion/pico-imx7d/pico-imx7d.c @@ -33,13 +33,6 @@ DECLARE_GLOBAL_DATA_PTR; #define I2C_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \ PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM) - -#define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ - PAD_CTL_DSE_3P3V_49OHM) - -#define LCD_SYNC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_PU100KOHM | \ - PAD_CTL_DSE_3P3V_196OHM) - #ifdef CONFIG_SYS_I2C_MXC #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) @@ -223,43 +216,9 @@ int board_early_init_f(void) return 0; } -#ifdef CONFIG_VIDEO_MXS -static iomux_v3_cfg_t const lcd_pads[] = { - MX7D_PAD_LCD_CLK__LCD_CLK | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_ENABLE__LCD_ENABLE | MUX_PAD_CTRL(LCD_SYNC_PAD_CTRL), - MX7D_PAD_LCD_HSYNC__LCD_HSYNC | MUX_PAD_CTRL(LCD_SYNC_PAD_CTRL), - MX7D_PAD_LCD_VSYNC__LCD_VSYNC | MUX_PAD_CTRL(LCD_SYNC_PAD_CTRL), - MX7D_PAD_LCD_DATA00__LCD_DATA0 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA01__LCD_DATA1 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA02__LCD_DATA2 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA03__LCD_DATA3 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA04__LCD_DATA4 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA05__LCD_DATA5 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA06__LCD_DATA6 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA07__LCD_DATA7 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA08__LCD_DATA8 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA09__LCD_DATA9 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA10__LCD_DATA10 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA11__LCD_DATA11 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA12__LCD_DATA12 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA13__LCD_DATA13 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA14__LCD_DATA14 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA15__LCD_DATA15 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA16__LCD_DATA16 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA17__LCD_DATA17 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA18__LCD_DATA18 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA19__LCD_DATA19 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA20__LCD_DATA20 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA21__LCD_DATA21 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA22__LCD_DATA22 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_LCD_DATA23__LCD_DATA23 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_GPIO1_IO06__GPIO1_IO6 | MUX_PAD_CTRL(LCD_PAD_CTRL), - MX7D_PAD_GPIO1_IO11__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - +#ifdef CONFIG_DM_VIDEO void setup_lcd(void) { - imx_iomux_v3_setup_multiple_pads(lcd_pads, ARRAY_SIZE(lcd_pads)); gpio_request(IMX_GPIO_NR(1, 11), "lcd_brightness"); gpio_request(IMX_GPIO_NR(1, 6), "lcd_enable"); /* Set Brightness to high */ @@ -274,8 +233,10 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; -#ifdef CONFIG_VIDEO_MXS +#ifdef CONFIG_DM_VIDEO + setup_lcd(); + #endif #ifdef CONFIG_FEC_MXC setup_fec(); diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c index c55a35d..8955622 100644 --- a/board/technexion/pico-imx7d/spl.c +++ b/board/technexion/pico-imx7d/spl.c @@ -21,6 +21,10 @@ #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { + /* Break into full U-Boot on 'c' */ + if (serial_tstc() && serial_getc() == 'c') + return 1; + return 0; } #endif diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 6421a22..51505b6 100644 --- a/board/toradex/apalis_imx6/apalis_imx6.c +++ b/board/toradex/apalis_imx6/apalis_imx6.c @@ -88,7 +88,7 @@ iomux_v3_cfg_t const uart1_pads_dte[] = { MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_FSL_ESDHC_IMX) && defined(CONFIG_SPL_BUILD) /* Apalis MMC1 */ iomux_v3_cfg_t const usdhc1_pads[] = { MX6_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -285,7 +285,7 @@ int board_ehci_hcd_init(int port) } #endif -#if defined(CONFIG_FSL_ESDHC) && defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_FSL_ESDHC_IMX) && defined(CONFIG_SPL_BUILD) /* use the following sequence: eMMC, MMC1, SD1 */ struct fsl_esdhc_cfg usdhc_cfg[CONFIG_SYS_FSL_USDHC_NUM] = { {USDHC3_BASE_ADDR}, @@ -1116,6 +1116,16 @@ void board_init_f(ulong dummy) board_init_r(NULL, 0); } +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + if (!strcmp(name, "imx6-apalis")) + return 0; + + return -1; +} +#endif + void reset_cpu(ulong addr) { } diff --git a/board/toradex/colibri-imx6ull/imximage.cfg b/board/toradex/colibri-imx6ull/imximage.cfg index 2ce55a6..a11e288 100644 --- a/board/toradex/colibri-imx6ull/imximage.cfg +++ b/board/toradex/colibri-imx6ull/imximage.cfg @@ -25,7 +25,7 @@ BOOT_FROM nand /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/toradex/colibri_imx7/imximage.cfg b/board/toradex/colibri_imx7/imximage.cfg index 25cfd5c..1b4f272 100644 --- a/board/toradex/colibri_imx7/imximage.cfg +++ b/board/toradex/colibri_imx7/imximage.cfg @@ -25,7 +25,7 @@ BOOT_FROM sd /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c index 69cdf3e..11acbad 100644 --- a/board/wandboard/wandboard.c +++ b/board/wandboard/wandboard.c @@ -71,21 +71,6 @@ static iomux_v3_cfg_t const uart1_pads[] = { }; static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), /* AR8031 PHY Reset */ IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), }; @@ -358,13 +343,6 @@ static void setup_display(void) } #endif /* CONFIG_VIDEO_IPUV3 */ -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - - return cpu_eth_init(bis); -} - int board_early_init_f(void) { setup_iomux_uart(); @@ -464,6 +442,7 @@ int board_late_init(void) else env_set("board_name", "B1"); #endif + setup_iomux_enet(); return 0; } diff --git a/board/warp/imximage.cfg b/board/warp/imximage.cfg index 4fb5a84..dea331c 100644 --- a/board/warp/imximage.cfg +++ b/board/warp/imximage.cfg @@ -24,7 +24,7 @@ BOOT_FROM sd /* * Secure boot support */ -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG__IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/warp7/imximage.cfg b/board/warp7/imximage.cfg index a6edfda..a4c2f67 100644 --- a/board/warp7/imximage.cfg +++ b/board/warp7/imximage.cfg @@ -12,7 +12,7 @@ #include <config.h> IMAGE_VERSION 2 -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB CSF CONFIG_CSF_SIZE #endif diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c index 39ae982..c423e04 100644 --- a/board/warp7/warp7.c +++ b/board/warp7/warp7.c @@ -146,7 +146,7 @@ int board_late_init(void) */ clrsetbits_le16(&wdog->wcr, 0, 0x10); -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB /* Determine HAB state */ env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled()); #else diff --git a/cmd/Kconfig b/cmd/Kconfig index 80849ba..07060c6 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -533,7 +533,6 @@ config CMD_ENV_FLAGS config CMD_NVEDIT_EFI bool "env [set|print] -e - set/print UEFI variables" depends on EFI_LOADER - default y imply HEXDUMP help UEFI variables are encoded as some form of U-Boot variables. @@ -11,6 +11,13 @@ #include <command.h> #include <asm/io.h> +/* Display values from last command */ +static ulong last_addr, last_size; +static ulong last_length = 0x40; +static ulong base_address; + +#define DISP_LINE_LEN 16 + /* * IO Display * @@ -19,26 +26,66 @@ */ int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - ulong addr; - int size; - - if (argc != 2) + ulong addr, length, bytes; + u8 buf[DISP_LINE_LEN]; + int size, todo; + + /* + * We use the last specified parameters, unless new ones are + * entered. + */ + addr = last_addr; + size = last_size; + length = last_length; + + if (argc < 2) return CMD_RET_USAGE; - size = cmd_get_data_size(argv[0], 4); - if (size < 0) - return 1; - - addr = simple_strtoul(argv[1], NULL, 16); - - printf("%04x: ", (u16) addr); - - if (size == 4) - printf("%08x\n", inl(addr)); - else if (size == 2) - printf("%04x\n", inw(addr)); - else - printf("%02x\n", inb(addr)); + if ((flag & CMD_FLAG_REPEAT) == 0) { + /* + * New command specified. Check for a size specification. + * Defaults to long if no or incorrect specification. + */ + size = cmd_get_data_size(argv[0], 4); + if (size < 0) + return 1; + + /* Address is specified since argc > 1 */ + addr = simple_strtoul(argv[1], NULL, 16); + addr += base_address; + + /* + * If another parameter, it is the length to display. + * Length is the number of objects, not number of bytes. + */ + if (argc > 2) + length = simple_strtoul(argv[2], NULL, 16); + } + + bytes = size * length; + + /* Print the lines */ + for (; bytes > 0; addr += todo) { + u8 *ptr = buf; + int i; + + todo = min(bytes, (ulong)DISP_LINE_LEN); + for (i = 0; i < todo; i += size, ptr += size) { + if (size == 4) + *(u32 *)ptr = inl(addr + i); + else if (size == 2) + *(u16 *)ptr = inw(addr + i); + else + *ptr = inb(addr + i); + } + print_buffer(addr, buf, size, todo / size, + DISP_LINE_LEN / size); + bytes -= todo; + } + + last_addr = addr; + last_length = length; + last_size = size; return 0; } @@ -69,7 +116,7 @@ int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) } /**************************************************/ -U_BOOT_CMD(iod, 2, 0, do_io_iod, +U_BOOT_CMD(iod, 3, 1, do_io_iod, "IO space display", "[.b, .w, .l] address"); U_BOOT_CMD(iow, 3, 0, do_io_iow, diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c index ed6d09a..ede4cd5 100644 --- a/cmd/nvedit_efi.c +++ b/cmd/nvedit_efi.c @@ -330,7 +330,7 @@ out: } /** - * do_env_print_efi() - set UEFI variable + * do_env_set_efi() - set UEFI variable * * @cmdtp: Command table * @flag: Command flag diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c index efa1838..b3b6630 100644 --- a/cmd/x86/fsp.c +++ b/cmd/x86/fsp.c @@ -5,13 +5,13 @@ #include <common.h> #include <command.h> -#include <asm/fsp/fsp_support.h> +#include <asm/fsp1/fsp_support.h> DECLARE_GLOBAL_DATA_PTR; static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - struct fsp_header *hdr = find_fsp_header(); + struct fsp_header *hdr = fsp_find_header(); u32 img_addr = hdr->img_base; char *sign = (char *)&hdr->sign; int i; diff --git a/common/image.c b/common/image.c index fc0ebe3..f17fa40 100644 --- a/common/image.c +++ b/common/image.c @@ -61,6 +61,7 @@ static const image_header_t *image_get_ramdisk(ulong rd_addr, uint8_t arch, #endif /* !USE_HOSTCC*/ #include <u-boot/crc.h> +#include <imximage.h> #ifndef CONFIG_SYS_BARGSIZE #define CONFIG_SYS_BARGSIZE 512 @@ -378,9 +379,9 @@ void image_print_contents(const void *ptr) } } else if (image_check_type(hdr, IH_TYPE_FIRMWARE_IVT)) { printf("HAB Blocks: 0x%08x 0x0000 0x%08x\n", - image_get_load(hdr) - image_get_header_size(), - image_get_size(hdr) + image_get_header_size() - - 0x1FE0); + image_get_load(hdr) - image_get_header_size(), + (int)(image_get_size(hdr) + image_get_header_size() + + sizeof(flash_header_v2_t) - 0x2060)); } } diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 59a7b20..92de9cd 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -26,9 +26,10 @@ config SPL_FRAMEWORK and the Linux Kernel. If unsure, say Y. config SPL_SIZE_LIMIT - int "Maximum size of SPL image" + hex "Maximum size of SPL image" depends on SPL - default 69632 if ARCH_MX6 + default 69632 if ARCH_MX6 && !MX6_OCRAM_256KB + default 200704 if ARCH_MX6 && MX6_OCRAM_256KB default 0 help Specifies the maximum length of the U-Boot SPL image. @@ -115,7 +116,7 @@ if SPL config SPL_HANDOFF bool "Pass hand-off information from SPL to U-Boot proper" - depends on HANDOFF + depends on HANDOFF && SPL_BLOBLIST default y help This option enables SPL to write handoff information. This can be @@ -608,6 +609,15 @@ config SPL_MMC_SUPPORT this option to build the drivers in drivers/mmc as part of an SPL build. +config SPL_FORCE_MMC_BOOT + bool "Force SPL booting from MMC" + depends on SPL_MMC_SUPPORT + default n + help + Force SPL to use MMC device for Linux kernel booting even when the + SoC ROM recognized boot medium is not eMMC/SD. This is crucial for + factory or 'falcon mode' booting. + config SPL_MMC_TINY bool "Tiny MMC framework in SPL" depends on SPL_MMC_SUPPORT @@ -964,7 +974,7 @@ config SPL_SERIAL_SUPPORT for displaying messages while SPL is running. It also brings in printf() and panic() functions. This should normally be enabled unless there are space reasons not to. Even then, consider - enabling USE_TINY_PRINTF which is a small printf() version. + enabling SPL_USE_TINY_PRINTF which is a small printf() version. config SPL_SPI_FLASH_SUPPORT bool "Support SPI flash drivers" @@ -1186,7 +1196,7 @@ if TPL config TPL_HANDOFF bool "Pass hand-off information from TPL to SPL and U-Boot proper" - depends on HANDOFF + depends on HANDOFF && TPL_BLOBLIST default y help This option enables TPL to write handoff information. This can be diff --git a/common/spl/spl.c b/common/spl/spl.c index 082fa2b..5fdd6d0 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -356,17 +356,23 @@ static int setup_spl_handoff(void) return 0; } +__weak int handoff_arch_save(struct spl_handoff *ho) +{ + return 0; +} + static int write_spl_handoff(void) { struct spl_handoff *ho; + int ret; ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(struct spl_handoff)); if (!ho) return -ENOENT; handoff_save_dram(ho); -#ifdef CONFIG_SANDBOX - ho->arch.magic = TEST_HANDOFF_MAGIC; -#endif + ret = handoff_arch_save(ho); + if (ret) + return ret; debug(SPL_TPL_PROMPT "Wrote SPL handoff\n"); return 0; @@ -404,23 +410,6 @@ static int spl_common_init(bool setup_malloc) return ret; } #endif - if (CONFIG_IS_ENABLED(BLOBLIST)) { - ret = bloblist_init(); - if (ret) { - debug("%s: Failed to set up bloblist: ret=%d\n", - __func__, ret); - return ret; - } - } - if (CONFIG_IS_ENABLED(HANDOFF)) { - int ret; - - ret = setup_spl_handoff(); - if (ret) { - puts(SPL_TPL_PROMPT "Cannot set up SPL handoff\n"); - hang(); - } - } if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { ret = fdtdec_setup(); if (ret) { @@ -598,6 +587,24 @@ void board_init_r(gd_t *dummy1, ulong dummy2) */ timer_init(); #endif + if (CONFIG_IS_ENABLED(BLOBLIST)) { + ret = bloblist_init(); + if (ret) { + debug("%s: Failed to set up bloblist: ret=%d\n", + __func__, ret); + puts(SPL_TPL_PROMPT "Cannot set up bloblist\n"); + hang(); + } + } + if (CONFIG_IS_ENABLED(HANDOFF)) { + int ret; + + ret = setup_spl_handoff(); + if (ret) { + puts(SPL_TPL_PROMPT "Cannot set up SPL handoff\n"); + hang(); + } + } #if CONFIG_IS_ENABLED(BOARD_INIT) spl_board_init(); diff --git a/common/spl/spl_bootrom.c b/common/spl/spl_bootrom.c index 076f5d8..0eefd39 100644 --- a/common/spl/spl_bootrom.c +++ b/common/spl/spl_bootrom.c @@ -6,8 +6,10 @@ #include <common.h> #include <spl.h> -__weak void board_return_to_bootrom(void) +__weak int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) { + return 0; } static int spl_return_to_bootrom(struct spl_image_info *spl_image, @@ -19,8 +21,7 @@ static int spl_return_to_bootrom(struct spl_image_info *spl_image, * the ROM), it will implement board_return_to_bootrom() and * should not return from it. */ - board_return_to_bootrom(); - return false; + return board_return_to_bootrom(spl_image, bootdev); } SPL_LOAD_IMAGE_METHOD("BOOTROM", 0, BOOT_DEVICE_BOOTROM, spl_return_to_bootrom); diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c index b3e3ccd..cbc00a4 100644 --- a/common/spl/spl_fit.c +++ b/common/spl/spl_fit.c @@ -553,7 +553,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, spl_image->flags |= SPL_FIT_FOUND; -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_IMX_HAB board_spl_fit_post_load((ulong)fit, size); #endif diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index b361988..ebc5660 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -79,6 +79,16 @@ int mmc_load_image_raw_sector(struct spl_image_info *spl_image, load.bl_len = mmc->read_bl_len; load.read = h_spl_load_read; ret = spl_load_simple_fit(spl_image, &load, sector, header); + } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { + struct spl_load_info load; + + load.dev = mmc; + load.priv = NULL; + load.filename = NULL; + load.bl_len = mmc->read_bl_len; + load.read = h_spl_load_read; + + ret = spl_load_imx_container(spl_image, &load, sector); } else { ret = mmc_load_legacy(spl_image, mmc, sector, header); } @@ -303,6 +313,15 @@ int spl_boot_partition(const u32 boot_device) } #endif +unsigned long __weak spl_mmc_get_uboot_raw_sector(struct mmc *mmc) +{ +#ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR + return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR; +#else + return 0; +#endif +} + int spl_mmc_load(struct spl_image_info *spl_image, struct spl_boot_device *bootdev, const char *filename, @@ -330,6 +349,8 @@ int spl_mmc_load(struct spl_image_info *spl_image, } } + raw_sect = spl_mmc_get_uboot_raw_sector(mmc); + boot_mode = spl_boot_mode(bootdev->boot_device); err = -EINVAL; switch (boot_mode) { diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c index e2bcefb..5f8a111 100644 --- a/common/spl/spl_nand.c +++ b/common/spl/spl_nand.c @@ -11,6 +11,11 @@ #include <linux/libfdt_env.h> #include <fdt.h> +uint32_t __weak spl_nand_get_uboot_raw_page(void) +{ + return CONFIG_SYS_NAND_U_BOOT_OFFS; +} + #if defined(CONFIG_SPL_NAND_RAW_ONLY) static int spl_nand_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) @@ -21,7 +26,7 @@ static int spl_nand_load_image(struct spl_image_info *spl_image, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, CONFIG_SYS_NAND_U_BOOT_DST); - nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS, + nand_spl_load_image(spl_nand_get_uboot_raw_page(), CONFIG_SYS_NAND_U_BOOT_SIZE, (void *)CONFIG_SYS_NAND_U_BOOT_DST); spl_set_header_raw_uboot(spl_image); @@ -63,6 +68,15 @@ static int spl_nand_load_element(struct spl_image_info *spl_image, load.bl_len = 1; load.read = spl_nand_fit_read; return spl_load_simple_fit(spl_image, &load, offset, header); + } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { + struct spl_load_info load; + + load.dev = NULL; + load.priv = NULL; + load.filename = NULL; + load.bl_len = 1; + load.read = spl_nand_fit_read; + return spl_load_imx_container(spl_image, &load, offset); } else { err = spl_parse_image_header(spl_image, header); if (err) @@ -139,7 +153,7 @@ static int spl_nand_load_image(struct spl_image_info *spl_image, #endif #endif /* Load u-boot */ - err = spl_nand_load_element(spl_image, CONFIG_SYS_NAND_U_BOOT_OFFS, + err = spl_nand_load_element(spl_image, spl_nand_get_uboot_raw_page(), header); #ifdef CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND #if CONFIG_SYS_NAND_U_BOOT_OFFS != CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c index 969e319..7df708d 100644 --- a/common/spl/spl_nor.c +++ b/common/spl/spl_nor.c @@ -6,7 +6,6 @@ #include <common.h> #include <spl.h> -#ifdef CONFIG_SPL_LOAD_FIT static ulong spl_nor_load_read(struct spl_load_info *load, ulong sector, ulong count, void *buf) { @@ -16,7 +15,11 @@ static ulong spl_nor_load_read(struct spl_load_info *load, ulong sector, return count; } -#endif + +unsigned long __weak spl_nor_get_uboot_base(void) +{ + return CONFIG_SYS_UBOOT_BASE; +} static int spl_nor_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) @@ -80,25 +83,32 @@ static int spl_nor_load_image(struct spl_image_info *spl_image, * defined location in SDRAM */ #ifdef CONFIG_SPL_LOAD_FIT - header = (const struct image_header *)CONFIG_SYS_UBOOT_BASE; + header = (const struct image_header *)spl_nor_get_uboot_base(); if (image_get_magic(header) == FDT_MAGIC) { debug("Found FIT format U-Boot\n"); load.bl_len = 1; load.read = spl_nor_load_read; ret = spl_load_simple_fit(spl_image, &load, - CONFIG_SYS_UBOOT_BASE, + spl_nor_get_uboot_base(), (void *)header); return ret; } #endif + if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { + load.bl_len = 1; + load.read = spl_nor_load_read; + return spl_load_imx_container(spl_image, &load, + spl_nor_get_uboot_base()); + } + ret = spl_parse_image_header(spl_image, - (const struct image_header *)CONFIG_SYS_UBOOT_BASE); + (const struct image_header *)spl_nor_get_uboot_base()); if (ret) return ret; memcpy((void *)(unsigned long)spl_image->load_addr, - (void *)(CONFIG_SYS_UBOOT_BASE + sizeof(struct image_header)), + (void *)(spl_nor_get_uboot_base() + sizeof(struct image_header)), spl_image->size); return 0; diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c index 9b74473..288dbb5 100644 --- a/common/spl/spl_spi.c +++ b/common/spl/spl_spi.c @@ -62,6 +62,12 @@ static ulong spl_spi_fit_read(struct spl_load_info *load, ulong sector, else return 0; } + +unsigned int __weak spl_spi_get_uboot_offs(struct spi_flash *flash) +{ + return CONFIG_SYS_SPI_U_BOOT_OFFS; +} + /* * The main entry for SPI booting. It's necessary that SDRAM is already * configured and available since this code loads the main U-Boot image @@ -71,7 +77,7 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, struct spl_boot_device *bootdev) { int err = 0; - unsigned payload_offs = CONFIG_SYS_SPI_U_BOOT_OFFS; + unsigned int payload_offs; struct spi_flash *flash; struct image_header *header; @@ -90,6 +96,8 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, return -ENODEV; } + payload_offs = spl_spi_get_uboot_offs(flash); + header = spl_get_load_buffer(-sizeof(*header), sizeof(*header)); #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) @@ -133,6 +141,17 @@ static int spl_spi_load_image(struct spl_image_info *spl_image, err = spl_load_simple_fit(spl_image, &load, payload_offs, header); + } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { + struct spl_load_info load; + + load.dev = flash; + load.priv = NULL; + load.filename = NULL; + load.bl_len = 1; + load.read = spl_spi_fit_read; + + err = spl_load_imx_container(spl_image, &load, + payload_offs); } else { err = spl_parse_image_header(spl_image, header); if (err) diff --git a/common/xyzModem.c b/common/xyzModem.c index e85da74..6bf2375 100644 --- a/common/xyzModem.c +++ b/common/xyzModem.c @@ -173,7 +173,7 @@ parse_num (char *s, unsigned long *val, char **es, char *delim) } -#if defined(DEBUG) && !defined(CONFIG_USE_TINY_PRINTF) +#if defined(DEBUG) && !CONFIG_IS_ENABLED(USE_TINY_PRINTF) /* * Note: this debug setup works by storing the strings in a fixed buffer */ diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index e69f81b..1a1d58d 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -51,5 +51,5 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_TPS65910=y CONFIG_CONS_INDEX=4 -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set # CONFIG_EFI_LOADER is not set diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index a9149dd..a6457d5 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_MX7=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_SECURE_BOOT=y +CONFIG_IMX_HAB=y CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_NR_DRAM_BANKS=1 CONFIG_IMX_RDC=y diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index c5de2e7..b4ca115 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_THUMB_BUILD=y CONFIG_ARCH_MX7=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_SECURE_BOOT=y +CONFIG_IMX_HAB=y CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_TARGET_COLIBRI_IMX7_EMMC=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index f459af0..db4753c 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -85,4 +85,5 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index e48b646..3227249 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -46,13 +46,17 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SF=y CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y @@ -66,20 +70,46 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_I2C_EEPROM_BUS=2 +CONFIG_SYS_EEPROM_SIZE=32768 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD_DEVICE=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_MARVELL=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_I2C_EDID=y CONFIG_IMX_WATCHDOG=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index 5b79057..a41a632 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -4,14 +4,19 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_MX6_DDRCAL=y CONFIG_TARGET_DISPLAY5=y +CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q" CONFIG_BOOTDELAY=3 @@ -47,11 +52,14 @@ CONFIG_CMD_PART=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_USB_SDP=y +CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -62,30 +70,58 @@ CONFIG_MTDIDS_DEFAULT="nor0=02008000.spi.1" CONFIG_MTDPARTS_DEFAULT="mtdparts=02008000.spi.1:128k(SPL),1m(u-boot),64k(env1),64k(env2),4m(swu-kernel),16m(swu-initramfs),1m(factory),-(reserved)" # CONFIG_SPL_EFI_PARTITION is not set CONFIG_PARTITION_TYPE_GUID=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-display5" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0x2 +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_I2C_EEPROM_BUS=2 +CONFIG_SYS_EEPROM_SIZE=32768 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_MTD_DEVICE=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y +CONFIG_PHY_MARVELL=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Liebherr" -CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 -CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=15000 +CONFIG_I2C_EDID=y CONFIG_IMX_WATCHDOG=y -CONFIG_OF_LIBFDT=y +CONFIG_PANIC_HANG=y diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 7b0e908..043ee32 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -4,7 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x01000000 CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SPL_SIZE_LIMIT=307200 +CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig index 7351659..75fdbf7 100644 --- a/configs/ge_bx50v3_defconfig +++ b/configs/ge_bx50v3_defconfig @@ -61,5 +61,6 @@ CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_IPUV3=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=6000 CONFIG_IMX_WATCHDOG=y # CONFIG_EFI_LOADER is not set diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index b568dfd..6b92f94 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -1,9 +1,10 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 -CONFIG_SECURE_BOOT=y +CONFIG_IMX_HAB=y CONFIG_TARGET_MX6DL_MAMOJ=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_CSF_SIZE=0x2060 # CONFIG_CMD_BMODE is not set CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index ec14b8e..6125ee2 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -83,6 +83,7 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_USB=y CONFIG_DM_USB=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig new file mode 100644 index 0000000..a934363 --- /dev/null +++ b/configs/imx8mm_evk_defconfig @@ -0,0 +1,74 @@ +CONFIG_ARM=y +CONFIG_SPL_SYS_ICACHE_OFF=y +CONFIG_SPL_SYS_DCACHE_OFF=y +CONFIG_ARCH_IMX8M=y +CONFIG_SYS_TEXT_BASE=0x40200000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x10000 +CONFIG_TARGET_IMX8MM_EVK=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_FIT=y +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg" +CONFIG_DEFAULT_FDT_FILE="fsl-imx8mm-evk.dtb" +CONFIG_BOARD_LATE_INIT=y +CONFIG_SPL_TEXT_BASE=0x7E1000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="u-boot=> " +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_CLK=y +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx8mm-evk" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_SPL_DM=y +CONFIG_SPL_CLK_COMPOSITE_CCF=y +CONFIG_CLK_COMPOSITE_CCF=y +CONFIG_SPL_CLK_IMX8MM=y +CONFIG_CLK_IMX8MM=y +CONFIG_DM_GPIO=y +CONFIG_MXC_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_SYS_I2C_MXC_I2C3=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_PHYLIB=y +CONFIG_DM_ETH=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_IMX8M=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_MXC_UART=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_DM_THERMAL=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 59ba4bc..f352f47 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -7,6 +7,7 @@ CONFIG_TARGET_IMX8MQ_EVK=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL=y CONFIG_SPL_TEXT_BASE=0x7E1000 +CONFIG_CSF_SIZE=0x2000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y @@ -36,7 +37,10 @@ CONFIG_FSL_USDHC=y CONFIG_DM_ETH=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y CONFIG_DM_THERMAL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 42591c7..57cf659 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -6,23 +6,26 @@ CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SPL_LOAD_IMX_CONTAINER=y +CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" CONFIG_TARGET_IMX8QM_MEK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y -CONFIG_FIT=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qm_mek/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_LOG=y CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_CMD_IMPORTENV is not set diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index f4cc86e..ded6036 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -7,15 +7,15 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_SPL_LOAD_IMX_CONTAINER=y +CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" CONFIG_TARGET_IMX8QXP_MEK=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 CONFIG_SPL=y -CONFIG_FIT=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +CONFIG_OF_SYSTEM_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/imx8qxp_mek/imximage.cfg" CONFIG_BOOTDELAY=3 CONFIG_LOG=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index 75dd9d7..fdfb899 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -41,5 +41,6 @@ CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_IMX_THERMAL=y CONFIG_USB=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index 7aa8c54..c45fc68 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -67,7 +67,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 22ccf52..a9e5804 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -67,5 +67,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 486a2e0..bdfa13a 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -65,7 +65,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_RSA=y CONFIG_SPL_RSA=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index b3c2970..01adbf0 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -65,5 +65,5 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_EFI_LOADER_BOUNCE_BUFFER=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index 5004795..7e5bcf9 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -89,4 +89,5 @@ CONFIG_DM_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_VIDEO_IPUV3=y CONFIG_IMX_WATCHDOG=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_FAT_WRITE=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index cad798a..7f293c8 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -50,4 +50,5 @@ CONFIG_USB_EHCI_MX5=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set +CONFIG_WATCHDOG_TIMEOUT_MSECS=8000 CONFIG_IMX_WATCHDOG=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 379407a..e4a7441 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -4,7 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set @@ -30,12 +32,17 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabrelite" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -45,9 +52,11 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y CONFIG_USB_GADGET=y @@ -60,4 +69,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 73cb32e..93f0ee9 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -23,9 +23,6 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOUNCE_BUFFER=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_FIT_IMAGE_TINY=y -CONFIG_SPL_FS_EXT4=y -CONFIG_SPL_I2C_SUPPORT=y -CONFIG_SPL_OS_BOOT=y CONFIG_SPL_USB_HOST_SUPPORT=y CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y @@ -87,6 +84,7 @@ CONFIG_PCI=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_MXC_SPI=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index e614ef2..6a7fa13 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -35,6 +35,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 @@ -50,6 +51,7 @@ CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y CONFIG_USB=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 6ade0ef..b4812ff 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -35,6 +35,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 @@ -50,6 +51,7 @@ CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y CONFIG_USB=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 22bd5c3..46a5d2c 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -44,6 +44,7 @@ CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=20000000 @@ -59,6 +60,7 @@ CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y CONFIG_USB=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index dacc294..9177794 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -67,4 +67,5 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index b9fb2ec..0b3b2b1 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -70,4 +70,5 @@ CONFIG_FSL_QSPI=y CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig new file mode 100644 index 0000000..f647d72 --- /dev/null +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -0,0 +1,44 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_TARGET_MX6ULL_14X14_EVK=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg" +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_BOUNCE_BUFFER=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-14x14-evk" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_DM_GPIO=y +CONFIG_DM_74X164=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_FSL_ESDHC_IMX=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=40000000 +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_REGULATOR=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_FSL_QSPI=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index df85443..ffd217d 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -3,11 +3,13 @@ CONFIG_ARCH_MX7ULP=y CONFIG_SYS_TEXT_BASE=0x67800000 CONFIG_TARGET_MX7ULP_EVK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOUNCE_BUFFER=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -20,6 +22,7 @@ CONFIG_DM_GPIO=y CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set CONFIG_DM_I2C=y +CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_DM_MMC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index b2451ad..12106aa 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg" CONFIG_BOUNCE_BUFFER=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -20,6 +21,7 @@ CONFIG_IMX_RGPIO2P=y # CONFIG_MXC_GPIO is not set CONFIG_DM_I2C=y CONFIG_DM_MMC=y +CONFIG_SYS_I2C_IMX_LPI2C=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_FSL_USDHC=y CONFIG_PINCTRL=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 11bee9b..32bd4ee 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -34,10 +36,16 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -47,8 +55,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y @@ -62,4 +72,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 141289f..34166e5 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -34,10 +36,16 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -47,8 +55,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y @@ -62,4 +72,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 8414183..2c4def6 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -35,11 +37,17 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -49,8 +57,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y @@ -64,4 +74,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index e0af34c..a4ca672 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -35,11 +37,17 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y CONFIG_DWC_AHSATA=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -49,8 +57,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y @@ -64,4 +74,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 53eb96a..ff8d2af 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -34,10 +36,16 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -47,8 +55,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y @@ -62,4 +72,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index e60c237..f5623cb 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_TARGET_NITROGEN6X=y CONFIG_NR_DRAM_BANKS=1 CONFIG_CMD_HDMIDETECT=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -34,10 +36,16 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_DM=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 CONFIG_FSL_USDHC=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 @@ -47,8 +55,10 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MII=y CONFIG_SPI=y +CONFIG_DM_SPI=y CONFIG_MXC_SPI=y CONFIG_USB=y +CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP=y @@ -62,4 +72,3 @@ CONFIG_USB_ETH_CDC=y CONFIG_VIDEO_IPUV3=y CONFIG_VIDEO=y # CONFIG_VIDEO_SW_CURSOR is not set -CONFIG_OF_LIBFDT=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index be16f48..4fdcf67 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_MTD=y CONFIG_CMD_USB=y CONFIG_CMD_USB_SDP=y CONFIG_CMD_CACHE=y +CONFIG_CMD_NANDBCB=y CONFIG_MTDIDS_DEFAULT="nand0=gpmi-nand" CONFIG_MTDPARTS_DEFAULT="gpmi-nand:4m(uboot),1m(env),-(root)" CONFIG_CMD_UBI=y diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig index 4b9bb36..b516248 100644 --- a/configs/phycore_pcl063_ull_defconfig +++ b/configs/phycore_pcl063_ull_defconfig @@ -8,6 +8,7 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 CONFIG_SPL=y +CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig new file mode 100644 index 0000000..f1f6506 --- /dev/null +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -0,0 +1,65 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_PICO_IMX6UL=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTDELAY=3 +CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx6ul-pico-dwarf.dtb" +CONFIG_BOUNCE_BUFFER=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6ul-pico-pi" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_DFU_MMC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_GPIO=y +CONFIG_DM_I2C=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_PHY_MICREL=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_VIDEO=y diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig new file mode 100644 index 0000000..5ddf8d9 --- /dev/null +++ b/configs/pico-dwarf-imx7d_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_PICO_IMX7D=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SPL_TEXT_BASE=0x00911000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" +CONFIG_BOUNCE_BUFFER=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_SPL=y +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MII is not set +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" +CONFIG_DFU_MMC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index dda8ef4..9cf206a 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -65,3 +65,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_VIDEO=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 62a9423..8628ba4 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -38,10 +38,11 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MII is not set +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-hobbit" +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" CONFIG_DFU_MMC=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x82000000 @@ -66,4 +67,5 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig new file mode 100644 index 0000000..02787f8 --- /dev/null +++ b/configs/pico-imx6_defconfig @@ -0,0 +1,73 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SYS_TEXT_BASE=0x17800000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_PICO_IMX6=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y +CONFIG_SPL_FIT_PRINT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTCOMMAND="run default_boot" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y +CONFIG_DEFAULT_FDT_FILE="ask" +CONFIG_BOUNCE_BUFFER=y +CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_FIT_IMAGE_TINY=y +CONFIG_SPL_FS_EXT4=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_SPL=y +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 +CONFIG_CMD_DFU=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6dl-pico" +CONFIG_OF_LIST="imx6dl-pico imx6q-pico" +CONFIG_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT=y +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_DFU_MMC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x12000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_FSL_USDHC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_VIDEO=y +CONFIG_VIDEO_IPUV3=y diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index a0ac01d..81c5110 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -67,3 +67,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_VIDEO=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index a2cddfc..d775244 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_USB_GADGET=y CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BMP=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_SPL=y CONFIG_CMD_SPL_WRITE_SIZE=0x20000 @@ -62,5 +63,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_ETHER=y CONFIG_USB_ETH_CDC=y CONFIG_USBNET_HOST_ADDR="de:ad:be:af:00:00" -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index 3785477..40b14d1 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MII is not set +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y @@ -66,4 +67,5 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig new file mode 100644 index 0000000..5ddf8d9 --- /dev/null +++ b/configs/pico-nymph-imx7d_defconfig @@ -0,0 +1,71 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX7=y +CONFIG_SYS_TEXT_BASE=0x87800000 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_PICO_IMX7D=y +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_SPL=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_IMX_RDC=y +CONFIG_IMX_BOOTAUX=y +CONFIG_SPL_TEXT_BASE=0x00911000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg" +CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" +CONFIG_DEFAULT_FDT_FILE="imx7d-pico-dwarf.dtb" +CONFIG_BOUNCE_BUFFER=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_USB_HOST_SUPPORT=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y +# CONFIG_CMD_BOOTD is not set +CONFIG_CMD_BOOTMENU=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +CONFIG_CMD_SPL=y +CONFIG_CMD_SPL_WRITE_SIZE=0x20000 +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_MII is not set +CONFIG_CMD_BMP=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi" +CONFIG_DFU_MMC=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 +CONFIG_FASTBOOT_BUF_SIZE=0x10000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_FSL_USDHC=y +CONFIG_PHYLIB=y +CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX7=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 7463b3f..4836050 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -65,3 +65,4 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y +CONFIG_VIDEO=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index cf20fd2..f9069d9 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_USB_SDP=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MII is not set +CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y @@ -66,4 +67,5 @@ CONFIG_USB_GADGET_MANUFACTURER="FSL" CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y -CONFIG_VIDEO=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig new file mode 100644 index 0000000..0d3746a --- /dev/null +++ b/configs/sam9x60ek_mmc_defconfig @@ -0,0 +1,56 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x23f00000 +CONFIG_TARGET_SAM9X60EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ENV_SIZE=0x4000 +CONFIG_NR_DRAM_BANKS=8 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_SD_BOOT=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="mem=256M console=ttyS0,115200 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_MMC=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_TIMER=y +CONFIG_ATMEL_PIT_TIMER=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig new file mode 100644 index 0000000..cdba103 --- /dev/null +++ b/configs/sam9x60ek_nandflash_defconfig @@ -0,0 +1,57 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x23f00000 +CONFIG_TARGET_SAM9X60EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=8 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_NAND_BOOT=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NAND_TRIMFFS=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_FAT=y +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" +CONFIG_ENV_IS_IN_NAND=y +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_TIMER=y +CONFIG_ATMEL_PIT_TIMER=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig new file mode 100644 index 0000000..e1b292e --- /dev/null +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -0,0 +1,79 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x23f00000 +CONFIG_TARGET_SAM9X60EK=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_NR_DRAM_BANKS=8 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xfffff200 +CONFIG_DEBUG_UART_CLOCK=200000000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_DEBUG_UART=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=12 root=ubi0:rootfs rw" +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y +CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_SF=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_FAT=y +CONFIG_CMD_UBI=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_ENV_SPI_BUS=y +CONFIG_ENV_SPI_BUS=0 +CONFIG_USE_ENV_SPI_CS=y +CONFIG_ENV_SPI_CS=0 +CONFIG_USE_ENV_SPI_MAX_HZ=y +CONFIG_ENV_SPI_MAX_HZ=50000000 +CONFIG_USE_ENV_SPI_MODE=y +CONFIG_ENV_SPI_MODE=0x0 +CONFIG_DM=y +CONFIG_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_DM_GPIO=y +CONFIG_AT91_GPIO=y +CONFIG_DM_MMC=y +CONFIG_GENERIC_ATMEL_MCI=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AT91=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_QSPI=y +CONFIG_TIMER=y +CONFIG_ATMEL_PIT_TIMER=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig new file mode 100644 index 0000000..50a8a8e --- /dev/null +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -0,0 +1,102 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x26f00000 +CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_MMC_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_ENV_SIZE=0x4000 +CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf801c000 +CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_SPL_FS_FAT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_DEBUG_UART=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" +CONFIG_SD_BOOT=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DISPLAY_PRINT=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +CONFIG_SPL_AT91_MCK_BYPASS=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" +CONFIG_ENV_IS_IN_FAT=y +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_DM_GPIO=y +CONFIG_ATMEL_PIO4=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_AT91=y +CONFIG_I2C_EEPROM=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_ATMEL_PIT_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig new file mode 100644 index 0000000..82568e2 --- /dev/null +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -0,0 +1,117 @@ +CONFIG_ARM=y +CONFIG_ARCH_AT91=y +CONFIG_SYS_TEXT_BASE=0x26f00000 +CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL=y +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_DEBUG_UART_BASE=0xf801c000 +CONFIG_DEBUG_UART_CLOCK=82000000 +CONFIG_ENV_SECT_SIZE=0x1000 +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_DEBUG_UART=y +CONFIG_SPL_TEXT_BASE=0x200000 +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_FIT=y +CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" +CONFIG_QSPI_BOOT=y +CONFIG_SPI_BOOT=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SPL_DISPLAY_PRINT=y +# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set +CONFIG_SPL_SPI_LOAD=y +CONFIG_SPL_AT91_MCK_BYPASS=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" +CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names" +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_ENV_SPI_BUS=y +CONFIG_ENV_SPI_BUS=2 +CONFIG_USE_ENV_SPI_CS=y +CONFIG_ENV_SPI_CS=0 +CONFIG_USE_ENV_SPI_MAX_HZ=y +CONFIG_ENV_SPI_MAX_HZ=50000000 +CONFIG_USE_ENV_SPI_MODE=y +CONFIG_ENV_SPI_MODE=0x0 +CONFIG_DM=y +CONFIG_SPL_DM=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_CLK_AT91=y +CONFIG_AT91_UTMI=y +CONFIG_AT91_H32MX=y +CONFIG_AT91_GENERIC_CLK=y +CONFIG_DM_GPIO=y +CONFIG_ATMEL_PIO4=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_AT91=y +CONFIG_I2C_EEPROM=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ATMEL=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SF_DEFAULT_BUS=2 +CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y +CONFIG_MACB=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_SERIAL=y +CONFIG_DEBUG_UART_ATMEL=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_ATMEL_USART=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_ATMEL_QSPI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y +CONFIG_ATMEL_PIT_TIMER=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_ATMEL_USBA=y +CONFIG_DM_VIDEO=y +CONFIG_ATMEL_HLCD=y +CONFIG_W1=y +CONFIG_W1_GPIO=y +CONFIG_W1_EEPROM=y +CONFIG_W1_EEPROM_DS24XXX=y +CONFIG_OF_LIBFDT_OVERLAY=y +# CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 0b3391a..409b8a3 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -191,7 +191,7 @@ CONFIG_OSD=y CONFIG_SANDBOX_OSD=y CONFIG_FS_CBFS=y CONFIG_FS_CRAMFS=y -# CONFIG_USE_TINY_PRINTF is not set +# CONFIG_SPL_USE_TINY_PRINTF is not set CONFIG_CMD_DHRYSTONE=y CONFIG_TPM=y CONFIG_LZ4=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 734e894..cc48536 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -46,3 +46,4 @@ CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y CONFIG_LZMA=y +# CONFIG_EFI_UNICODE_CAPITALIZATION is not set diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig index 5fbc94a..d8739fd 100644 --- a/configs/sksimx6_defconfig +++ b/configs/sksimx6_defconfig @@ -8,7 +8,6 @@ CONFIG_MX6_DDRCAL=y CONFIG_TARGET_SKSIMX6=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index f9fecff..3cbb83c 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -18,3 +18,4 @@ CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_PCI_PNP is not set CONFIG_CONSOLE_SCROLL_LINES=5 +# CONFIG_USE_CAR is not set diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index 9328608..eff3b06 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL_GPIO_SUPPORT=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SPL_SIZE_LIMIT=307200 +CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig index 03e8930..1dab5af 100644 --- a/configs/tqma6s_wru4_mmc_defconfig +++ b/configs/tqma6s_wru4_mmc_defconfig @@ -66,5 +66,6 @@ CONFIG_USB=y CONFIG_USB_STORAGE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_SMSC95XX=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=60000 CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index cb1b17c..ca6ea9d 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -51,3 +51,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_LZO=y +CONFIG_SPL_TEXT_BASE=0x00908000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index a8b6b41..d7eb8fd 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -57,6 +57,9 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_MMC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y +CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y +CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 80accfb..9d161f3 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_SECURE_BOOT=y +CONFIG_IMX_HAB=y CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_FIT=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index a022454..62e331d 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_TEXT_BASE=0x87800000 -CONFIG_SECURE_BOOT=y +CONFIG_IMX_HAB=y CONFIG_TARGET_WARP7=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 7a6ea6f..7da64e6 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -39,5 +39,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0525 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_WATCHDOG_TIMEOUT_MSECS=30000 CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT=y diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst index 5c0caeb..54933b5 100644 --- a/doc/arch/sandbox.rst +++ b/doc/arch/sandbox.rst @@ -103,6 +103,8 @@ A device tree binary file can be provided with -d. If you edit the source (it is stored at arch/sandbox/dts/sandbox.dts) you must rebuild U-Boot to recreate the binary file. +To use the default device tree, use -D. To use the test device tree, use -T. + To execute commands directly, use the -c option. You can specify a single command, or multiple commands separated by a semicolon, as is normal in U-Boot. Be careful with quoting as the shell will normally process and @@ -499,6 +501,13 @@ run natively on your board if desired (and enabled). To run all tests use "make check". +To run a single test in an existing sandbox build, you can use -T to use the +test device tree, and -c to select the test: + + /tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev" + +This runs dm_test_pci_busdev() which is in test/dm/pci.c + Memory Map ---------- diff --git a/doc/driver-model/debugging.rst b/doc/driver-model/debugging.rst new file mode 100644 index 0000000..4f4a8d4 --- /dev/null +++ b/doc/driver-model/debugging.rst @@ -0,0 +1,62 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Simon Glass <sjg@chromium.org> + +Debugging driver model +====================== + +This document aims to provide help when you cannot work out why driver model is +not doing what you expect. + + +Useful techniques in general +---------------------------- + +Here are some useful debugging features generally. + + - If you are writing a new feature, consider doing it in sandbox instead of + on your board. Sandbox has no limits, allows easy debugging (e.g. gdb) and + you can write emulators for most common devices. + - Put '#define DEBUG' at the top of a file, to activate all the debug() and + log_debug() statements in that file. + - Where logging is used, change the logging level, e.g. in SPL with + CONFIG_SPL_LOG_MAX_LEVEL=7 (which is LOGL_DEBUG) and + CONFIG_LOG_DEFAULT_LEVEL=7 + - Where logging of return values is implemented with log_msg_ret(), set + CONFIG_LOG_ERROR_RETURN=y to see exactly where the error is happening + - Make sure you have a debug UART enabled - see CONFIG_DEBUG_UART. With this + you can get serial output (printf(), etc.) before the serial driver is + running. + - Use a JTAG emulator to set breakpoints and single-step through code + +Not that most of these increase code/data size somewhat when enabled. + + +Failure to locate a device +-------------------------- + +Let's say you have uclass_first_device_err() and it is not finding anything. + +If it is returning an error, then that gives you a clue. Look up linux/errno.h +to see errors. Common ones are: + + - -ENOMEM which indicates that memory is short. If it happens in SPL or + before relocation in U-Boot, check CONFIG_SPL_SYS_MALLOC_F_LEN and + CONFIG_SYS_MALLOC_F_LEN as they may need to be larger. Add '#define DEBUG' + at the very top of malloc_simple.c to get an idea of where your memory is + going. + - -EINVAL which typically indicates that something was missing or wrong in + the device tree node. Check that everything is correct and look at the + ofdata_to_platdata() method in the driver. + +If there is no error, you should check if the device is actually bound. Call +dm_dump_all() just before you locate the device to make sure it exists. + +If it does not exist, check your device tree compatible strings match up with +what the driver expects (in the struct udevice_id array). + +If you are using of-platdata (e.g. CONFIG_SPL_OF_PLATDATA), check that the +driver name is the same as the first compatible string in the device tree (with +invalid-variable characters converted to underscore). + +If you are really stuck, #define DEBUG at the top of lists.c should show you +what is going on. diff --git a/doc/driver-model/index.rst b/doc/driver-model/index.rst index ea32c36..6d55774 100644 --- a/doc/driver-model/index.rst +++ b/doc/driver-model/index.rst @@ -6,6 +6,7 @@ Driver Model .. toctree:: :maxdepth: 2 + debugging design fdt-fixup fs_firmware_loader diff --git a/doc/driver-model/pci-info.rst b/doc/driver-model/pci-info.rst index d93ab8b..3c1b1ad 100644 --- a/doc/driver-model/pci-info.rst +++ b/doc/driver-model/pci-info.rst @@ -103,7 +103,7 @@ in each of these nodes. If PCI devices are not listed in the device tree, U_BOOT_PCI_DEVICE can be used to specify the driver to use for the device. The device tree takes precedence -over U_BOOT_PCI_DEVICE. Plese note with U_BOOT_PCI_DEVICE, only drivers with +over U_BOOT_PCI_DEVICE. Please note with U_BOOT_PCI_DEVICE, only drivers with DM_FLAG_PRE_RELOC will be bound before relocation. If neither device tree nor U_BOOT_PCI_DEVICE is provided, the built-in driver (either pci_bridge_drv or pci_generic_drv) will be used. @@ -113,14 +113,17 @@ Sandbox ------- With sandbox we need a device emulator for each device on the bus since there -is no real PCI bus. This works by looking in the device tree node for a -driver. For example:: - +is no real PCI bus. This works by looking in the device tree node for an +emulator driver. For example:: pci@1f,0 { compatible = "pci-generic"; reg = <0xf800 0 0 0 0>; - emul@1f,0 { + sandbox,emul = <&emul_1f>; + }; + pci-emul { + compatible = "sandbox,pci-emul-parent"; + emul_1f: emul@1f,0 { compatible = "sandbox,swap-case"; }; }; @@ -130,14 +133,16 @@ Note that the first cell in the 'reg' value is the bus/device/function. See PCI_BDF() for the encoding (it is also specified in the IEEE Std 1275-1994 PCI bus binding document, v2.1) +The pci-emul node should go outside the pci bus node, since otherwise it will +be scanned as a PCI device, causing confusion. + When this bus is scanned we will end up with something like this:: `- * pci-controller @ 05c660c8, 0 `- pci@1f,0 @ 05c661c8, 63488 - `- emul@1f,0 @ 05c662c8 + `- emul@1f,0 @ 05c662c8 -When accesses go to the pci@1f,0 device they are forwarded to its child, the -emulator. +When accesses go to the pci@1f,0 device they are forwarded to its emulator. The sandbox PCI drivers also support dynamic driver binding, allowing device driver to declare the driver binding information via U_BOOT_PCI_DEVICE(), @@ -164,7 +169,3 @@ When this bus is scanned we will end up with something like this:: pci [ + ] pci_sandbo |-- pci-controller1 pci_emul [ ] sandbox_sw | |-- sandbox_swap_case_emul pci_emul [ ] sandbox_sw | `-- sandbox_swap_case_emul - -Note the difference from the statically declared device nodes is that the -device is directly attached to the host controller, instead of via a container -device like pci@1f,0. diff --git a/doc/imx/common/mxs.txt b/doc/imx/common/mxs.txt index e23ab9c..372062c 100644 --- a/doc/imx/common/mxs.txt +++ b/doc/imx/common/mxs.txt @@ -57,7 +57,7 @@ writing of this document, that is "10.12.01". To obtain the file from command line, use: $ VER="10.12.01" - $ wget ftp://ftp.denx.de/pub/tools/elftosb-${VER}.tar.gz + $ wget http://repository.timesys.com/buildsources/e/elftosb/elftosb-10.12.01/elftosb-${VER}.tar.gz Extract the file: diff --git a/doc/imx/habv4/guides/encrypted_boot.txt b/doc/imx/habv4/guides/encrypted_boot.txt index c59d204..e2b4357 100644 --- a/doc/imx/habv4/guides/encrypted_boot.txt +++ b/doc/imx/habv4/guides/encrypted_boot.txt @@ -16,7 +16,7 @@ The DEK blob is generated by an authenticated U-Boot image with the dek_blob cmd enabled. The image used for DEK blob generation needs to have the following configurations enabled in Kconfig: -CONFIG_SECURE_BOOT=y +CONFIG_IMX_HAB=y CONFIG_CMD_DEKBLOB=y Note: The encrypted boot feature is only supported by HABv4 or diff --git a/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt b/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt index 98e18be..20fff93 100644 --- a/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt +++ b/doc/imx/habv4/guides/mx6_mx7_secure_boot.txt @@ -17,7 +17,7 @@ introduction_habv4.txt document. The U-Boot provides support to secure boot configuration and also provide access to the HAB APIs exposed by the ROM vector table, the support is -enabled by selecting the CONFIG_SECURE_BOOT option. +enabled by selecting the CONFIG_IMX_HAB option. When built with this configuration, the U-Boot provides extra functions for HAB, such as the HAB status logs retrievement through the hab_status command @@ -57,12 +57,12 @@ The diagram below illustrate a signed u-boot-dtb.imx image layout: ------------------------------------- The first step is to generate an U-Boot image supporting the HAB features -mentioned above, this can be achieved by adding CONFIG_SECURE_BOOT to the +mentioned above, this can be achieved by adding CONFIG_IMX_HAB to the build configuration: - Defconfig: - CONFIG_SECURE_BOOT=y + CONFIG_IMX_HAB=y - Kconfig: diff --git a/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt b/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt index 0d7931a..fde0f27 100644 --- a/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt +++ b/doc/imx/habv4/guides/mx6_mx7_spl_secure_boot.txt @@ -27,7 +27,7 @@ root of trust. The U-Boot provides support to secure boot configuration and also provide access to the HAB APIs exposed by the ROM vector table, the support is -enabled by selecting the CONFIG_SECURE_BOOT option. +enabled by selecting the CONFIG_IMX_HAB option. When built with this configuration the U-Boot correctly pads the final SPL image by aligning to the next 0xC00 address, so the CSF signature data @@ -82,12 +82,12 @@ The diagram below illustrate a signed u-boot-ivt.img image layout: ------------------------------------- The first step is to generate an U-Boot image supporting the HAB features -mentioned above, this can be achieved by adding CONFIG_SECURE_BOOT to the +mentioned above, this can be achieved by adding CONFIG_IMX_HAB to the build configuration: - Defconfig: - CONFIG_SECURE_BOOT=y + CONFIG_IMX_HAB=y - Kconfig: diff --git a/doc/imx/mkimage/imx8image.txt b/doc/imx/mkimage/imx8image.txt new file mode 100644 index 0000000..76664a8 --- /dev/null +++ b/doc/imx/mkimage/imx8image.txt @@ -0,0 +1,45 @@ +Introduction: +============= + +This documentation entry describes the i.MX8 container format and how +to use. + +A Boot image consists of: + - Primary Boot Container Set + - Optional Secondary Boot Container Set + +The imx8image only support the Primary Boot Container Set. + +The Primary Boot Container Set contains two containers. The 1st container +only contain the SECO firmware image, the 2nd container can contain +multiple images and typically have: + - SCF FW image + - M4 FW image + - AP FW image + +For more details, refer i.MX8 Reference Mannual Chapter 5 +"System Boot and section", "5.9 (Boot image) of the processor's manual" + +Configuration file: +================== +BOOT_FROM [sd|emmc_fastboot|fspi|nand_4k|nand_8k|nand_16k] [sector_size] + - indicates the boot media +SOC_TYPE [IMX8QM|IMX8QX] + - indicates the soc +APPEND [ahab container image] + - indicates the ahah image that will be put in the 1st container + When creating container image will be loaded by SPL, this entry + should not this included +CONTAINER + - indicates to create the 2nd container +IMAGE [SCU|M40|M41|A35|A53|A72] [image file] [load address] + - indicates images will be put in the 2nd container + +Example: +======= +BOOT_FROM SD 0x400 +SOC_TYPE IMX8QM +APPEND mx8qm-ahab-container.img +CONTAINER +IMAGE SCU mx8qm-mek-scfw-tcm.bin +IMAGE A35 spl/u-boot-spl.bin 0x00100000 diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index baaf431..e8f58b3 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -142,9 +142,9 @@ struct blk_desc *blk_get_devnum_by_typename(const char *if_typename, int devnum) */ struct blk_desc *blk_get_by_device(struct udevice *dev) { - struct udevice *child_dev, *next; + struct udevice *child_dev; - device_foreach_child_safe(child_dev, next, dev) { + device_foreach_child(child_dev, dev) { if (device_get_uclass_id(child_dev) != UCLASS_BLK) continue; diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index e850609..18af0bf 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c @@ -10,7 +10,7 @@ #include <syscon.h> #include <linux/io.h> #include <mach/at91_pmc.h> -#include <mach/sama5_sfr.h> +#include <mach/at91_sfr.h> #include "pmc.h" /* diff --git a/drivers/core/device.c b/drivers/core/device.c index 05dadf9..84f0f0f 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -404,7 +404,8 @@ int device_probe(struct udevice *dev) goto fail; } - if (drv->ofdata_to_platdata && dev_has_of_node(dev)) { + if (drv->ofdata_to_platdata && + (CONFIG_IS_ENABLED(OF_PLATDATA) || dev_has_of_node(dev))) { ret = drv->ofdata_to_platdata(dev); if (ret) goto fail; diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c index 6850003..575798f 100644 --- a/drivers/core/fdtaddr.c +++ b/drivers/core/fdtaddr.c @@ -190,3 +190,33 @@ void *devfdt_map_physmem(struct udevice *dev, unsigned long size) return map_physmem(addr, size, MAP_NOCACHE); } + +fdt_addr_t devfdt_get_addr_pci(struct udevice *dev) +{ + ulong addr; + + addr = devfdt_get_addr(dev); + if (CONFIG_IS_ENABLED(PCI) && IS_ENABLED(CONFIG_DM_PCI) && + addr == FDT_ADDR_T_NONE) { + struct fdt_pci_addr pci_addr; + u32 bar; + int ret; + + ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_MEM32, + "reg", &pci_addr); + if (ret) { + /* try if there is any i/o-mapped register */ + ret = ofnode_read_pci_addr(dev_ofnode(dev), + FDT_PCI_SPACE_IO, "reg", + &pci_addr); + if (ret) + return FDT_ADDR_T_NONE; + } + ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); + if (ret) + return FDT_ADDR_T_NONE; + addr = bar; + } + + return addr; +} diff --git a/drivers/core/lists.c b/drivers/core/lists.c index a1f8284..4681b3e 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -6,6 +6,8 @@ * Marek Vasut <marex@denx.de> */ +#define LOG_CATEGORY LOGC_DM + #include <common.h> #include <errno.h> #include <dm/device.h> @@ -139,13 +141,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, if (devp) *devp = NULL; name = ofnode_get_name(node); - pr_debug("bind node %s\n", name); + log_debug("bind node %s\n", name); compat_list = ofnode_get_property(node, "compatible", &compat_length); if (!compat_list) { if (compat_length == -FDT_ERR_NOTFOUND) { - pr_debug("Device '%s' has no compatible string\n", - name); + log_debug("Device '%s' has no compatible string\n", + name); return 0; } @@ -160,8 +162,8 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, */ for (i = 0; i < compat_length; i += strlen(compat) + 1) { compat = compat_list + i; - pr_debug(" - attempt to match compatible string '%s'\n", - compat); + log_debug(" - attempt to match compatible string '%s'\n", + compat); for (entry = driver; entry != driver + n_ents; entry++) { ret = driver_check_compatible(entry->of_match, &id, @@ -178,11 +180,13 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, return 0; } - pr_debug(" - found match at '%s'\n", entry->name); + log_debug(" - found match at '%s': '%s' matches '%s'\n", + entry->name, entry->of_match->compatible, + id->compatible); ret = device_bind_with_driver_data(parent, entry, name, id->data, node, &dev); if (ret == -ENODEV) { - pr_debug("Driver '%s' refuses to bind\n", entry->name); + log_debug("Driver '%s' refuses to bind\n", entry->name); continue; } if (ret) { @@ -198,7 +202,7 @@ int lists_bind_fdt(struct udevice *parent, ofnode node, struct udevice **devp, } if (!found && !result && ret != -ENODEV) - pr_debug("No match for node '%s'\n", name); + log_debug("No match for node '%s'\n", name); return result; } diff --git a/drivers/core/read.c b/drivers/core/read.c index fb3dcd9..9602e52 100644 --- a/drivers/core/read.c +++ b/drivers/core/read.c @@ -307,3 +307,14 @@ int dev_read_alias_highest_id(const char *stem) return fdtdec_get_alias_highest_id(gd->fdt_blob, stem); } + +fdt_addr_t dev_read_addr_pci(struct udevice *dev) +{ + ulong addr; + + addr = dev_read_addr(dev); + if (addr == FDT_ADDR_T_NONE && !of_live_active()) + addr = devfdt_get_addr_pci(dev); + + return addr; +} diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c index b332965..f217876 100644 --- a/drivers/core/uclass.c +++ b/drivers/core/uclass.c @@ -225,7 +225,7 @@ int uclass_find_first_device(enum uclass_id id, struct udevice **devp) if (ret) return ret; if (list_empty(&uc->dev_head)) - return -ENODEV; + return 0; *devp = list_first_entry(&uc->dev_head, struct udevice, uclass_node); @@ -714,8 +714,11 @@ int uclass_pre_probe_device(struct udevice *dev) if (!dev->parent) return 0; uc_drv = dev->parent->uclass->uc_drv; - if (uc_drv->child_pre_probe) - return uc_drv->child_pre_probe(dev); + if (uc_drv->child_pre_probe) { + ret = uc_drv->child_pre_probe(dev); + if (ret) + return ret; + } return 0; } @@ -735,8 +738,11 @@ int uclass_post_probe_device(struct udevice *dev) } uc_drv = dev->uclass->uc_drv; - if (uc_drv->post_probe) - return uc_drv->post_probe(dev); + if (uc_drv->post_probe) { + ret = uc_drv->post_probe(dev); + if (ret) + return ret; + } return 0; } diff --git a/drivers/cpu/Makefile b/drivers/cpu/Makefile index be0300c..0b5dbc7 100644 --- a/drivers/cpu/Makefile +++ b/drivers/cpu/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_CPU) += cpu-uclass.o obj-$(CONFIG_ARCH_BMIPS) += bmips_cpu.o +obj-$(CONFIG_ARCH_IMX8) += imx8_cpu.o obj-$(CONFIG_CPU_MPC83XX) += mpc83xx_cpu.o obj-$(CONFIG_CPU_RISCV) += riscv_cpu.o obj-$(CONFIG_SANDBOX) += cpu_sandbox.o diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c new file mode 100644 index 0000000..9565368 --- /dev/null +++ b/drivers/cpu/imx8_cpu.c @@ -0,0 +1,182 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include <common.h> +#include <cpu.h> +#include <dm.h> +#include <thermal.h> +#include <asm/arch/sci/sci.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch-imx/cpu.h> +#include <asm/armv8/cpu.h> + +DECLARE_GLOBAL_DATA_PTR; + +struct cpu_imx_platdata { + const char *name; + const char *rev; + const char *type; + u32 cpurev; + u32 freq_mhz; +}; + +const char *get_imx8_type(u32 imxtype) +{ + switch (imxtype) { + case MXC_CPU_IMX8QXP: + case MXC_CPU_IMX8QXP_A0: + return "QXP"; + case MXC_CPU_IMX8QM: + return "QM"; + default: + return "??"; + } +} + +const char *get_imx8_rev(u32 rev) +{ + switch (rev) { + case CHIP_REV_A: + return "A"; + case CHIP_REV_B: + return "B"; + default: + return "?"; + } +} + +const char *get_core_name(void) +{ + if (is_cortex_a35()) + return "A35"; + else if (is_cortex_a53()) + return "A53"; + else if (is_cortex_a72()) + return "A72"; + else + return "?"; +} + +#if IS_ENABLED(CONFIG_IMX_SCU_THERMAL) +static int cpu_imx_get_temp(void) +{ + struct udevice *thermal_dev; + int cpu_tmp, ret; + + ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0", + &thermal_dev); + + if (!ret) { + ret = thermal_get_temp(thermal_dev, &cpu_tmp); + if (ret) + return 0xdeadbeef; + } else { + return 0xdeadbeef; + } + + return cpu_tmp; +} +#else +static int cpu_imx_get_temp(void) +{ + return 0; +} +#endif + +int cpu_imx_get_desc(struct udevice *dev, char *buf, int size) +{ + struct cpu_imx_platdata *plat = dev_get_platdata(dev); + int ret; + + if (size < 100) + return -ENOSPC; + + ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz", + plat->type, plat->rev, plat->name, plat->freq_mhz); + + if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) { + buf = buf + ret; + size = size - ret; + ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp()); + } + + snprintf(buf + ret, size - ret, "\n"); + + return 0; +} + +static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info) +{ + struct cpu_imx_platdata *plat = dev_get_platdata(dev); + + info->cpu_freq = plat->freq_mhz * 1000; + info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU); + return 0; +} + +static int cpu_imx_get_count(struct udevice *dev) +{ + return 4; +} + +static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size) +{ + snprintf(buf, size, "NXP"); + return 0; +} + +static const struct cpu_ops cpu_imx8_ops = { + .get_desc = cpu_imx_get_desc, + .get_info = cpu_imx_get_info, + .get_count = cpu_imx_get_count, + .get_vendor = cpu_imx_get_vendor, +}; + +static const struct udevice_id cpu_imx8_ids[] = { + { .compatible = "arm,cortex-a35" }, + { .compatible = "arm,cortex-a53" }, + { } +}; + +static ulong imx8_get_cpu_rate(void) +{ + ulong rate; + int ret; + int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ? + SC_R_A53 : SC_R_A72; + + ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU, + (sc_pm_clock_rate_t *)&rate); + if (ret) { + printf("Could not read CPU frequency: %d\n", ret); + return 0; + } + + return rate; +} + +static int imx8_cpu_probe(struct udevice *dev) +{ + struct cpu_imx_platdata *plat = dev_get_platdata(dev); + u32 cpurev; + + cpurev = get_cpu_rev(); + plat->cpurev = cpurev; + plat->name = get_core_name(); + plat->rev = get_imx8_rev(cpurev & 0xFFF); + plat->type = get_imx8_type((cpurev & 0xFF000) >> 12); + plat->freq_mhz = imx8_get_cpu_rate() / 1000000; + return 0; +} + +U_BOOT_DRIVER(cpu_imx8_drv) = { + .name = "imx8x_cpu", + .id = UCLASS_CPU, + .of_match = cpu_imx8_ids, + .ops = &cpu_imx8_ops, + .probe = imx8_cpu_probe, + .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata), + .flags = DM_FLAG_PRE_RELOC, +}; diff --git a/drivers/ddr/imx/imx8m/Kconfig b/drivers/ddr/imx/imx8m/Kconfig index a83b0f4..5bf61eb 100644 --- a/drivers/ddr/imx/imx8m/Kconfig +++ b/drivers/ddr/imx/imx8m/Kconfig @@ -16,6 +16,12 @@ config IMX8M_DDR4 help Select the i.MX8M DDR4 driver support on i.MX8M SOC. +config IMX8M_DDR3L + bool "imx8m ddr3l" + select IMX8M_DRAM + help + Select the i.MX8M DDR3L driver support on i.MX8M SOC. + config SAVED_DRAM_TIMING_BASE hex "Define the base address for saved dram timing" help diff --git a/drivers/ddr/imx/imx8m/Makefile b/drivers/ddr/imx/imx8m/Makefile index 64f9ab2..bd9bcb8 100644 --- a/drivers/ddr/imx/imx8m/Makefile +++ b/drivers/ddr/imx/imx8m/Makefile @@ -5,7 +5,5 @@ # ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_IMX8M_DRAM) += helper.o ddrphy_utils.o ddrphy_train.o ddrphy_csr.o -obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_init.o -obj-$(CONFIG_IMX8M_DDR4) += ddr4_init.o +obj-$(CONFIG_IMX8M_DRAM) += helper.o ddrphy_utils.o ddrphy_train.o ddrphy_csr.o ddr_init.o endif diff --git a/drivers/ddr/imx/imx8m/ddr4_init.c b/drivers/ddr/imx/imx8m/ddr4_init.c deleted file mode 100644 index 031cdc5..0000000 --- a/drivers/ddr/imx/imx8m/ddr4_init.c +++ /dev/null @@ -1,113 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2018 NXP - */ - -#include <common.h> -#include <errno.h> -#include <asm/io.h> -#include <asm/arch/ddr.h> -#include <asm/arch/clock.h> -#include <asm/arch/imx8m_ddr.h> -#include <asm/arch/sys_proto.h> - -void ddr4_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) -{ - int i = 0; - - for (i = 0; i < num; i++) { - reg32_write(ddrc_cfg->reg, ddrc_cfg->val); - ddrc_cfg++; - } -} - -void ddr_init(struct dram_timing_info *dram_timing) -{ - volatile unsigned int tmp_t; - /* - * assert [0]ddr1_preset_n, [1]ddr1_core_reset_n, - * [2]ddr1_phy_reset, [3]ddr1_phy_pwrokin_n, - * [4]src_system_rst_b! - */ - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00003F); - /* deassert [4]src_system_rst_b! */ - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); - - /* - * change the clock source of dram_apb_clk_root - * to source 4 --800MHz/4 - */ - clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | - CLK_ROOT_SOURCE_SEL(4) | - CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); - - dram_pll_init(DRAM_PLL_OUT_600M); - - reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */ - reg32setbit(0x303A00F8, 5); /* PU_PGC_SW_PUP_REQ */ - - /* release [0]ddr1_preset_n, [3]ddr1_phy_pwrokin_n */ - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); - - reg32_write(DDRC_DBG1(0), 0x00000001); - reg32_write(DDRC_PWRCTL(0), 0x00000001); - - while (0 != (0x7 & reg32_read(DDRC_STAT(0)))) - ; - - /* config the uMCTL2's registers */ - ddr4_cfg_umctl2(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); - - reg32_write(DDRC_RFSHCTL3(0), 0x00000001); - /* RESET: <ctn> DEASSERTED */ - /* RESET: <a Port 0 DEASSERTED(0) */ - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000004); - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000000); - - reg32_write(DDRC_DBG1(0), 0x00000000); - reg32_write(DDRC_PWRCTL(0), 0x00000aa); - reg32_write(DDRC_SWCTL(0), 0x00000000); - - reg32_write(DDRC_DFIMISC(0), 0x00000000); - - /* config the DDR PHY's registers */ - ddr_cfg_phy(dram_timing); - - do { - tmp_t = reg32_read(IP2APB_DDRPHY_IPS_BASE_ADDR(0) + - 4 * 0x00020097); - } while (tmp_t != 0); - - reg32_write(DDRC_DFIMISC(0), 0x00000020); - - /* wait DFISTAT.dfi_init_complete to 1 */ - while (0 == (0x1 & reg32_read(DDRC_DFISTAT(0)))) - ; - - /* clear DFIMISC.dfi_init_complete_en */ - reg32_write(DDRC_DFIMISC(0), 0x00000000); - /* set DFIMISC.dfi_init_complete_en again */ - reg32_write(DDRC_DFIMISC(0), 0x00000001); - reg32_write(DDRC_PWRCTL(0), 0x0000088); - - /* - * set SWCTL.sw_done to enable quasi-dynamic register - * programming outside reset. - */ - reg32_write(DDRC_SWCTL(0), 0x00000001); - /* wait SWSTAT.sw_done_ack to 1 */ - while (0 == (0x1 & reg32_read(DDRC_SWSTAT(0)))) - ; - - /* wait STAT to normal state */ - while (0x1 != (0x7 & reg32_read(DDRC_STAT(0)))) - ; - - reg32_write(DDRC_PWRCTL(0), 0x0000088); - reg32_write(DDRC_PCTRL_0(0), 0x00000001); - /* dis_auto-refresh is set to 0 */ - reg32_write(DDRC_RFSHCTL3(0), 0x00000000); - - /* save the dram timing config into memory */ - dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE); -} diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c new file mode 100644 index 0000000..d6e915c --- /dev/null +++ b/drivers/ddr/imx/imx8m/ddr_init.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2018-2019 NXP + */ + +#include <common.h> +#include <errno.h> +#include <asm/io.h> +#include <asm/arch/ddr.h> +#include <asm/arch/clock.h> +#include <asm/arch/sys_proto.h> + +void ddr_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) +{ + int i = 0; + + for (i = 0; i < num; i++) { + reg32_write(ddrc_cfg->reg, ddrc_cfg->val); + ddrc_cfg++; + } +} + +void ddr_init(struct dram_timing_info *dram_timing) +{ + unsigned int tmp, initial_drate, target_freq; + + printf("DDRINFO: start DRAM init\n"); + + /* Step1: Follow the power up procedure */ + if (is_imx8mq()) { + reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F00000F); + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); + reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F000000); + } else { + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00001F); + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); + } + + debug("DDRINFO: cfg clk\n"); + /* change the clock source of dram_apb_clk_root: source 4 800MHz /4 = 200MHz */ + clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(4) | + CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); + + /* disable iso */ + reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */ + reg32setbit(0x303A00F8, 5); /* PU_PGC_SW_PUP_REQ */ + + initial_drate = dram_timing->fsp_msg[0].drate; + /* default to the frequency point 0 clock */ + ddrphy_init_set_dfi_clk(initial_drate); + + /* D-aasert the presetn */ + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); + + /* Step2: Program the dwc_ddr_umctl2 registers */ + debug("DDRINFO: ddrc config start\n"); + ddr_cfg_umctl2(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); + debug("DDRINFO: ddrc config done\n"); + + /* Step3: De-assert reset signal(core_ddrc_rstn & aresetn_n) */ + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000004); + reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000000); + + /* + * Step4: Disable auto-refreshes, self-refresh, powerdown, and + * assertion of dfi_dram_clk_disable by setting RFSHCTL3.dis_auto_refresh = 1, + * PWRCTL.powerdown_en = 0, and PWRCTL.selfref_en = 0, PWRCTL.en_dfi_dram_clk_disable = 0 + */ + reg32_write(DDRC_DBG1(0), 0x00000000); + reg32_write(DDRC_RFSHCTL3(0), 0x0000001); + reg32_write(DDRC_PWRCTL(0), 0xa0); + + /* if ddr type is LPDDR4, do it */ + tmp = reg32_read(DDRC_MSTR(0)); + if (tmp & (0x1 << 5)) + reg32_write(DDRC_DDR_SS_GPR0, 0x01); /* LPDDR4 mode */ + + /* determine the initial boot frequency */ + target_freq = reg32_read(DDRC_MSTR2(0)) & 0x3; + target_freq = (tmp & (0x1 << 29)) ? target_freq : 0x0; + + /* Step5: Set SWCT.sw_done to 0 */ + reg32_write(DDRC_SWCTL(0), 0x00000000); + + /* Set the default boot frequency point */ + clrsetbits_le32(DDRC_DFIMISC(0), (0x1f << 8), target_freq << 8); + /* Step6: Set DFIMISC.dfi_init_complete_en to 0 */ + clrbits_le32(DDRC_DFIMISC(0), 0x1); + + /* Step7: Set SWCTL.sw_done to 1; need to polling SWSTAT.sw_done_ack */ + reg32_write(DDRC_SWCTL(0), 0x00000001); + do { + tmp = reg32_read(DDRC_SWSTAT(0)); + } while ((tmp & 0x1) == 0x0); + + /* + * Step8 ~ Step13: Start PHY initialization and training by + * accessing relevant PUB registers + */ + debug("DDRINFO:ddrphy config start\n"); + ddr_cfg_phy(dram_timing); + debug("DDRINFO: ddrphy config done\n"); + + /* + * step14 CalBusy.0 =1, indicates the calibrator is actively + * calibrating. Wait Calibrating done. + */ + do { + tmp = reg32_read(DDRPHY_CalBusy(0)); + } while ((tmp & 0x1)); + + printf("DDRINFO:ddrphy calibration done\n"); + + /* Step15: Set SWCTL.sw_done to 0 */ + reg32_write(DDRC_SWCTL(0), 0x00000000); + + /* Step16: Set DFIMISC.dfi_init_start to 1 */ + setbits_le32(DDRC_DFIMISC(0), (0x1 << 5)); + + /* Step17: Set SWCTL.sw_done to 1; need to polling SWSTAT.sw_done_ack */ + reg32_write(DDRC_SWCTL(0), 0x00000001); + do { + tmp = reg32_read(DDRC_SWSTAT(0)); + } while ((tmp & 0x1) == 0x0); + + /* Step18: Polling DFISTAT.dfi_init_complete = 1 */ + do { + tmp = reg32_read(DDRC_DFISTAT(0)); + } while ((tmp & 0x1) == 0x0); + + /* Step19: Set SWCTL.sw_done to 0 */ + reg32_write(DDRC_SWCTL(0), 0x00000000); + + /* Step20: Set DFIMISC.dfi_init_start to 0 */ + clrbits_le32(DDRC_DFIMISC(0), (0x1 << 5)); + + /* Step21: optional */ + + /* Step22: Set DFIMISC.dfi_init_complete_en to 1 */ + setbits_le32(DDRC_DFIMISC(0), 0x1); + + /* Step23: Set PWRCTL.selfref_sw to 0 */ + clrbits_le32(DDRC_PWRCTL(0), (0x1 << 5)); + + /* Step24: Set SWCTL.sw_done to 1; need polling SWSTAT.sw_done_ack */ + reg32_write(DDRC_SWCTL(0), 0x00000001); + do { + tmp = reg32_read(DDRC_SWSTAT(0)); + } while ((tmp & 0x1) == 0x0); + + /* Step25: Wait for dwc_ddr_umctl2 to move to normal operating mode by monitoring + * STAT.operating_mode signal */ + do { + tmp = reg32_read(DDRC_STAT(0)); + } while ((tmp & 0x3) != 0x1); + + /* Step26: Set back register in Step4 to the original values if desired */ + reg32_write(DDRC_RFSHCTL3(0), 0x0000000); + /* enable selfref_en by default */ + setbits_le32(DDRC_PWRCTL(0), 0x1 << 3); + + /* enable port 0 */ + reg32_write(DDRC_PCTRL_0(0), 0x00000001); + printf("DDRINFO: ddrmix config done\n"); + + /* save the dram timing config into memory */ + dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE); +} diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c index 4732539..e605033 100644 --- a/drivers/ddr/imx/imx8m/ddrphy_utils.c +++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c @@ -122,6 +122,10 @@ void ddrphy_init_set_dfi_clk(unsigned int drate) dram_pll_init(MHZ(400)); dram_disable_bypass(); break; + case 1066: + dram_pll_init(MHZ(266)); + dram_disable_bypass(); + break; case 667: dram_pll_init(MHZ(167)); dram_disable_bypass(); diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c index 61cd4f6..b3e6383 100644 --- a/drivers/ddr/imx/imx8m/helper.c +++ b/drivers/ddr/imx/imx8m/helper.c @@ -31,7 +31,17 @@ void ddr_load_train_firmware(enum fw_type type) unsigned long pr_to32, pr_from32; unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0; unsigned long imem_start = (unsigned long)&_end + fw_offset; - unsigned long dmem_start = imem_start + IMEM_LEN; + unsigned long dmem_start; + +#ifdef CONFIG_SPL_OF_CONTROL + if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { + imem_start = roundup((unsigned long)&_end + + fdt_totalsize(gd->fdt_blob), 4) + + fw_offset; + } +#endif + + dmem_start = imem_start + IMEM_LEN; pr_from32 = imem_start; pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR; @@ -57,7 +67,7 @@ void ddr_load_train_firmware(enum fw_type type) i += 4; } - debug("check ddr4_pmu_train_imem code\n"); + debug("check ddr_pmu_train_imem code\n"); pr_from32 = imem_start; pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR; for (i = 0x0; i < IMEM_LEN; ) { @@ -74,9 +84,9 @@ void ddr_load_train_firmware(enum fw_type type) i += 4; } if (error) - printf("check ddr4_pmu_train_imem code fail=%d\n", error); + printf("check ddr_pmu_train_imem code fail=%d\n", error); else - debug("check ddr4_pmu_train_imem code pass\n"); + debug("check ddr_pmu_train_imem code pass\n"); debug("check ddr4_pmu_train_dmem code\n"); pr_from32 = dmem_start; @@ -95,9 +105,9 @@ void ddr_load_train_firmware(enum fw_type type) } if (error) - printf("check ddr4_pmu_train_dmem code fail=%d", error); + printf("check ddr_pmu_train_dmem code fail=%d", error); else - debug("check ddr4_pmu_train_dmem code pass\n"); + debug("check ddr_pmu_train_dmem code pass\n"); } void ddrphy_trained_csr_save(struct dram_cfg_param *ddrphy_csr, diff --git a/drivers/ddr/imx/imx8m/lpddr4_init.c b/drivers/ddr/imx/imx8m/lpddr4_init.c deleted file mode 100644 index a4bc1de..0000000 --- a/drivers/ddr/imx/imx8m/lpddr4_init.c +++ /dev/null @@ -1,188 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* -* Copyright 2018 NXP -* -*/ - -#include <common.h> -#include <errno.h> -#include <asm/io.h> -#include <asm/arch/ddr.h> -#include <asm/arch/clock.h> -#include <asm/arch/ddr.h> -#include <asm/arch/lpddr4_define.h> -#include <asm/arch/sys_proto.h> - -void lpddr4_cfg_umctl2(struct dram_cfg_param *ddrc_cfg, int num) -{ - int i = 0; - - for (i = 0; i < num; i++) { - reg32_write(ddrc_cfg->reg, ddrc_cfg->val); - ddrc_cfg++; - } -} - -void ddr_init(struct dram_timing_info *dram_timing) -{ - unsigned int tmp; - - debug("DDRINFO: start lpddr4 ddr init\n"); - /* step 1: reset */ - if (is_imx8mq()) { - reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F00000F); - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); - reg32_write(SRC_DDRC_RCR_ADDR + 0x04, 0x8F000000); - } else { - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00001F); - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F00000F); - } - - mdelay(100); - - debug("DDRINFO: reset done\n"); - /* - * change the clock source of dram_apb_clk_root: - * source 4 800MHz /4 = 200MHz - */ - clock_set_target_val(DRAM_APB_CLK_ROOT, CLK_ROOT_ON | - CLK_ROOT_SOURCE_SEL(4) | - CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); - - /* disable iso */ - reg32_write(0x303A00EC, 0x0000ffff); /* PGC_CPU_MAPPING */ - reg32setbit(0x303A00F8, 5); /* PU_PGC_SW_PUP_REQ */ - - debug("DDRINFO: cfg clk\n"); - dram_pll_init(MHZ(750)); - - /* - * release [0]ddr1_preset_n, [1]ddr1_core_reset_n, - * [2]ddr1_phy_reset, [3]ddr1_phy_pwrokin_n - */ - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000006); - - /*step2 Configure uMCTL2's registers */ - debug("DDRINFO: ddrc config start\n"); - lpddr4_cfg_umctl2(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num); - debug("DDRINFO: ddrc config done\n"); - - /* - * step3 de-assert all reset - * RESET: <core_ddrc_rstn> DEASSERTED - * RESET: <aresetn> for Port 0 DEASSERT(0)ED - */ - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000004); - reg32_write(SRC_DDRC_RCR_ADDR, 0x8F000000); - - reg32_write(DDRC_DBG1(0), 0x00000000); - /* step4 */ - /* [0]dis_auto_refresh=1 */ - reg32_write(DDRC_RFSHCTL3(0), 0x00000011); - - /* [8]--1: lpddr4_sr allowed; [5]--1: software entry to SR */ - reg32_write(DDRC_PWRCTL(0), 0x000000a8); - - do { - tmp = reg32_read(DDRC_STAT(0)); - } while ((tmp & 0x33f) != 0x223); - - reg32_write(DDRC_DDR_SS_GPR0, 0x01); /* LPDDR4 mode */ - - /* step5 */ - reg32_write(DDRC_SWCTL(0), 0x00000000); - - /* step6 */ - tmp = reg32_read(DDRC_MSTR2(0)); - if (tmp == 0x2) - reg32_write(DDRC_DFIMISC(0), 0x00000210); - else if (tmp == 0x1) - reg32_write(DDRC_DFIMISC(0), 0x00000110); - else - reg32_write(DDRC_DFIMISC(0), 0x00000010); - - /* step7 [0]--1: disable quasi-dynamic programming */ - reg32_write(DDRC_SWCTL(0), 0x00000001); - - /* step8 Configure LPDDR4 PHY's registers */ - debug("DDRINFO:ddrphy config start\n"); - ddr_cfg_phy(dram_timing); - debug("DDRINFO: ddrphy config done\n"); - - /* - * step14 CalBusy.0 =1, indicates the calibrator is actively - * calibrating. Wait Calibrating done. - */ - do { - tmp = reg32_read(DDRPHY_CalBusy(0)); - } while ((tmp & 0x1)); - - debug("DDRINFO:ddrphy calibration done\n"); - - /* step15 [0]--0: to enable quasi-dynamic programming */ - reg32_write(DDRC_SWCTL(0), 0x00000000); - - /* step16 */ - tmp = reg32_read(DDRC_MSTR2(0)); - if (tmp == 0x2) - reg32_write(DDRC_DFIMISC(0), 0x00000230); - else if (tmp == 0x1) - reg32_write(DDRC_DFIMISC(0), 0x00000130); - else - reg32_write(DDRC_DFIMISC(0), 0x00000030); - - /* step17 [0]--1: disable quasi-dynamic programming */ - reg32_write(DDRC_SWCTL(0), 0x00000001); - /* step18 wait DFISTAT.dfi_init_complete to 1 */ - do { - tmp = reg32_read(DDRC_DFISTAT(0)); - } while ((tmp & 0x1) == 0x0); - - /* step19 */ - reg32_write(DDRC_SWCTL(0), 0x00000000); - - /* step20~22 */ - tmp = reg32_read(DDRC_MSTR2(0)); - if (tmp == 0x2) { - reg32_write(DDRC_DFIMISC(0), 0x00000210); - /* set DFIMISC.dfi_init_complete_en again */ - reg32_write(DDRC_DFIMISC(0), 0x00000211); - } else if (tmp == 0x1) { - reg32_write(DDRC_DFIMISC(0), 0x00000110); - /* set DFIMISC.dfi_init_complete_en again */ - reg32_write(DDRC_DFIMISC(0), 0x00000111); - } else { - /* clear DFIMISC.dfi_init_complete_en */ - reg32_write(DDRC_DFIMISC(0), 0x00000010); - /* set DFIMISC.dfi_init_complete_en again */ - reg32_write(DDRC_DFIMISC(0), 0x00000011); - } - - /* step23 [5]selfref_sw=0; */ - reg32_write(DDRC_PWRCTL(0), 0x00000008); - /* step24 sw_done=1 */ - reg32_write(DDRC_SWCTL(0), 0x00000001); - - /* step25 wait SWSTAT.sw_done_ack to 1 */ - do { - tmp = reg32_read(DDRC_SWSTAT(0)); - } while ((tmp & 0x1) == 0x0); - -#ifdef DFI_BUG_WR - reg32_write(DDRC_DFIPHYMSTR(0), 0x00000001); -#endif - /* wait STAT.operating_mode([1:0] for ddr3) to normal state */ - do { - tmp = reg32_read(DDRC_STAT(0)); - } while ((tmp & 0x3) != 0x1); - - /* step26 */ - reg32_write(DDRC_RFSHCTL3(0), 0x00000010); - - /* enable port 0 */ - reg32_write(DDRC_PCTRL_0(0), 0x00000001); - debug("DDRINFO: ddrmix config done\n"); - - /* save the dram timing config into memory */ - dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE); -} diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 01cfa2f..90fbed4 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -294,7 +294,7 @@ int dm_gpio_request(struct gpio_desc *desc, const char *label) static int dm_gpio_requestf(struct gpio_desc *desc, const char *fmt, ...) { -#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_USE_TINY_PRINTF) +#if !defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(USE_TINY_PRINTF) va_list args; char buf[40]; @@ -343,7 +343,7 @@ int gpio_request(unsigned gpio, const char *label) */ int gpio_requestf(unsigned gpio, const char *fmt, ...) { -#if !defined(CONFIG_SPL_BUILD) || !defined(CONFIG_USE_TINY_PRINTF) +#if !defined(CONFIG_SPL_BUILD) || !CONFIG_IS_ENABLED(USE_TINY_PRINTF) va_list args; char buf[40]; diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c index b2451fd..5795155 100644 --- a/drivers/gpio/mxs_gpio.c +++ b/drivers/gpio/mxs_gpio.c @@ -131,9 +131,16 @@ int name_to_gpio(const char *name) #else /* CONFIG_DM_GPIO */ #include <dm.h> #include <asm/gpio.h> +#include <dt-structs.h> #include <asm/arch/gpio.h> #define MXS_MAX_GPIO_PER_BANK 32 +#ifdef CONFIG_MX28 +#define dtd_fsl_imx_gpio dtd_fsl_imx28_gpio +#else /* CONFIG_MX23 */ +#define dtd_fsl_imx_gpio dtd_fsl_imx23_gpio +#endif + DECLARE_GLOBAL_DATA_PTR; /* * According to i.MX28 Reference Manual: @@ -146,6 +153,14 @@ DECLARE_GLOBAL_DATA_PTR; * Bank 4: 0-20 -> 21 PINS */ +struct mxs_gpio_platdata { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx_gpio dtplat; +#endif + unsigned int bank; + int gpio_ranges; +}; + struct mxs_gpio_priv { unsigned int bank; }; @@ -223,22 +238,19 @@ static const struct dm_gpio_ops gpio_mxs_ops = { static int mxs_gpio_probe(struct udevice *dev) { + struct mxs_gpio_platdata *plat = dev_get_platdata(dev); struct mxs_gpio_priv *priv = dev_get_priv(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); - struct fdtdec_phandle_args args; - int node = dev_of_offset(dev); char name[16], *str; - fdt_addr_t addr; - int ret; - - addr = devfdt_get_addr(dev); - if (addr == FDT_ADDR_T_NONE) { - printf("%s: No 'reg' property defined!\n", __func__); - return -EINVAL; - } - - priv->bank = (unsigned int)addr; +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx_gpio *dtplat = &plat->dtplat; + priv->bank = (unsigned int)dtplat->reg[0]; + uc_priv->gpio_count = dtplat->gpio_ranges[3]; +#else + priv->bank = (unsigned int)plat->bank; + uc_priv->gpio_count = plat->gpio_ranges; +#endif snprintf(name, sizeof(name), "GPIO%d_", priv->bank); str = strdup(name); if (!str) @@ -246,16 +258,33 @@ static int mxs_gpio_probe(struct udevice *dev) uc_priv->bank_name = str; + debug("%s: %s: %d pins base: 0x%x\n", __func__, uc_priv->bank_name, + uc_priv->gpio_count, priv->bank); + + return 0; +} + +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +static int mxs_ofdata_to_platdata(struct udevice *dev) +{ + struct mxs_gpio_platdata *plat = dev->platdata; + struct fdtdec_phandle_args args; + int node = dev_of_offset(dev); + int ret; + + plat->bank = devfdt_get_addr(dev); + if (plat->bank == FDT_ADDR_T_NONE) { + printf("%s: No 'reg' property defined!\n", __func__); + return -EINVAL; + } + ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges", NULL, 3, 0, &args); if (ret) printf("%s: 'gpio-ranges' not defined - using default!\n", __func__); - uc_priv->gpio_count = ret == 0 ? args.args[2] : MXS_MAX_GPIO_PER_BANK; - - debug("%s: %s: %d pins\n", __func__, uc_priv->bank_name, - uc_priv->gpio_count); + plat->gpio_ranges = ret == 0 ? args.args[2] : MXS_MAX_GPIO_PER_BANK; return 0; } @@ -265,13 +294,22 @@ static const struct udevice_id mxs_gpio_ids[] = { { .compatible = "fsl,imx28-gpio" }, { } }; +#endif U_BOOT_DRIVER(gpio_mxs) = { - .name = "gpio_mxs", +#ifdef CONFIG_MX28 + .name = "fsl_imx28_gpio", +#else /* CONFIG_MX23 */ + .name = "fsl_imx23_gpio", +#endif .id = UCLASS_GPIO, .ops = &gpio_mxs_ops, .probe = mxs_gpio_probe, .priv_auto_alloc_size = sizeof(struct mxs_gpio_priv), + .platdata_auto_alloc_size = sizeof(struct mxs_gpio_platdata), +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = mxs_gpio_ids, + .ofdata_to_platdata = mxs_ofdata_to_platdata, +#endif }; #endif /* CONFIG_DM_GPIO */ diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c index bbe214d..74a773c 100644 --- a/drivers/gpio/pm8916_gpio.c +++ b/drivers/gpio/pm8916_gpio.c @@ -172,16 +172,16 @@ static int pm8916_gpio_probe(struct udevice *dev) priv->pid = dev_read_addr(dev); if (priv->pid == FDT_ADDR_T_NONE) - return -EINVAL; + return log_msg_ret("bad address", -EINVAL); /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x10) - return -ENODEV; + return log_msg_ret("bad type", -ENXIO); reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); if (reg != 0x5 && reg != 0x1) - return -ENODEV; + return log_msg_ret("bad subtype", -ENXIO); return 0; } @@ -257,16 +257,16 @@ static int pm8941_pwrkey_probe(struct udevice *dev) priv->pid = devfdt_get_addr(dev); if (priv->pid == FDT_ADDR_T_NONE) - return -EINVAL; + return log_msg_ret("bad address", -EINVAL); /* Do a sanity check */ reg = pmic_reg_read(dev->parent, priv->pid + REG_TYPE); if (reg != 0x1) - return -ENODEV; + return log_msg_ret("bad type", -ENXIO); reg = pmic_reg_read(dev->parent, priv->pid + REG_SUBTYPE); if (reg != 0x1) - return -ENODEV; + return log_msg_ret("bad subtype", -ENXIO); return 0; } diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 8037b6e..ba50893 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -202,7 +202,7 @@ config JZ4780_EFUSE config MXC_OCOTP bool "Enable MXC OCOTP Driver" - depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_VF610 + depends on ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610 default y help If you say Y here, you will get support for the One Time diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 509c588..0001d10 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o +obj-$(CONFIG_SANDBOX) += swap_case.o endif ifdef CONFIG_DM_I2C @@ -52,7 +53,6 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o obj-$(CONFIG_QFW) += qfw.o obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o -obj-$(CONFIG_SANDBOX) += swap_case.o obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c index 031bc00..b2fdeef 100644 --- a/drivers/misc/imx8/scu_api.c +++ b/drivers/misc/imx8/scu_api.c @@ -13,6 +13,8 @@ DECLARE_GLOBAL_DATA_PTR; +#define B2U8(X) (((X) != SC_FALSE) ? (u8)(0x01U) : (u8)(0x00U)) + /* CLK and PM */ int sc_pm_set_clock_rate(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, sc_pm_clock_rate_t *rate) @@ -93,6 +95,30 @@ int sc_pm_clock_enable(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk, return ret; } +int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_clk_t clk, sc_pm_clk_parent_t parent) +{ + struct udevice *dev = gd->arch.scu_dev; + int size = sizeof(struct sc_rpc_msg_s); + struct sc_rpc_msg_s msg; + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_PM; + RPC_FUNC(&msg) = (u8)PM_FUNC_SET_CLOCK_PARENT; + RPC_U16(&msg, 0U) = (u16)resource; + RPC_U8(&msg, 2U) = (u8)clk; + RPC_U8(&msg, 3U) = (u8)parent; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: resource:%d clk:%d: parent clk: %d, res:%d\n", + __func__, resource, clk, parent, RPC_R8(&msg)); + + return ret; +} + int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_power_mode_t mode) { @@ -119,6 +145,33 @@ int sc_pm_set_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, return ret; } +sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt) +{ + struct udevice *dev = gd->arch.scu_dev; + int size = sizeof(struct sc_rpc_msg_s); + struct sc_rpc_msg_s msg; + int ret; + u8 result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_PM); + RPC_FUNC(&msg) = (u8)(PM_FUNC_IS_PARTITION_STARTED); + RPC_U8(&msg, 0U) = (u8)(pt); + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + + result = RPC_R8(&msg); + if (result != 0 && result != 1) { + printf("%s: partition:%d res:%d\n", + __func__, pt, RPC_R8(&msg)); + if (ret) + printf("%s: partition:%d res:%d\n", __func__, pt, + RPC_R8(&msg)); + } + return !!result; +} + /* PAD */ int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val) { @@ -146,6 +199,33 @@ int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val) } /* MISC */ +int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource, + sc_ctrl_t ctrl, u32 val) +{ + struct udevice *dev = gd->arch.scu_dev; + int size = sizeof(struct sc_rpc_msg_s); + struct sc_rpc_msg_s msg; + int ret; + + if (!dev) + hang(); + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_MISC; + RPC_FUNC(&msg) = (u8)MISC_FUNC_SET_CONTROL; + RPC_U32(&msg, 0U) = (u32)ctrl; + RPC_U32(&msg, 4U) = (u32)val; + RPC_U16(&msg, 8U) = (u16)resource; + RPC_SIZE(&msg) = 4U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: ctrl:%d resource:%d: res:%d\n", + __func__, ctrl, resource, RPC_R8(&msg)); + + return ret; +} + int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, u32 *val) { @@ -175,6 +255,28 @@ int sc_misc_get_control(sc_ipc_t ipc, sc_rsrc_t resource, sc_ctrl_t ctrl, return ret; } +int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_SET_MASTER_SID; + RPC_U16(&msg, 0U) = (u16)resource; + RPC_U16(&msg, 2U) = (u16)sid; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: resource:%d sid:%d: res:%d\n", + __func__, resource, sid, RPC_R8(&msg)); + + return ret; +} + void sc_misc_get_boot_dev(sc_ipc_t ipc, sc_rsrc_t *boot_dev) { struct udevice *dev = gd->arch.scu_dev; @@ -332,6 +434,64 @@ sc_bool_t sc_rm_is_memreg_owned(sc_ipc_t ipc, sc_rm_mr_t mr) return (sc_bool_t)result; } +int sc_rm_find_memreg(sc_ipc_t ipc, sc_rm_mr_t *mr, sc_faddr_t addr_start, + sc_faddr_t addr_end) +{ + struct udevice *dev = gd->arch.scu_dev; + int size = sizeof(struct sc_rpc_msg_s); + struct sc_rpc_msg_s msg; + int ret; + + if (!dev) + hang(); + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = (u8)(RM_FUNC_FIND_MEMREG); + RPC_U32(&msg, 0U) = (u32)(addr_start >> 32ULL); + RPC_U32(&msg, 4U) = (u32)(addr_start); + RPC_U32(&msg, 8U) = (u32)(addr_end >> 32ULL); + RPC_U32(&msg, 12U) = (u32)(addr_end); + RPC_SIZE(&msg) = 5U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: start:0x%llx, end:0x%llx res:%d\n", __func__, addr_start, addr_end, RPC_R8(&msg)); + + if (mr) + *mr = RPC_U8(&msg, 0U); + + return ret; +} + +int sc_rm_set_memreg_permissions(sc_ipc_t ipc, sc_rm_mr_t mr, + sc_rm_pt_t pt, sc_rm_perm_t perm) +{ + struct udevice *dev = gd->arch.scu_dev; + int size = sizeof(struct sc_rpc_msg_s); + struct sc_rpc_msg_s msg; + int ret; + + if (!dev) + hang(); + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_RM); + RPC_FUNC(&msg) = (u8)(RM_FUNC_SET_MEMREG_PERMISSIONS); + RPC_U8(&msg, 0U) = (u8)(mr); + RPC_U8(&msg, 1U) = (u8)(pt); + RPC_U8(&msg, 2U) = (u8)(perm); + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: mr:%u, pt:%u, perm:%u, res:%d\n", __func__, + mr, pt, perm, RPC_R8(&msg)); + } + + return ret; +} + int sc_rm_get_memreg_info(sc_ipc_t ipc, sc_rm_mr_t mr, sc_faddr_t *addr_start, sc_faddr_t *addr_end) { @@ -393,3 +553,396 @@ sc_bool_t sc_rm_is_resource_owned(sc_ipc_t ipc, sc_rsrc_t resource) return !!result; } + +int sc_rm_partition_alloc(sc_ipc_t ipc, sc_rm_pt_t *pt, sc_bool_t secure, + sc_bool_t isolated, sc_bool_t restricted, + sc_bool_t grant, sc_bool_t coherent) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_PARTITION_ALLOC; + RPC_U8(&msg, 0U) = B2U8(secure); + RPC_U8(&msg, 1U) = B2U8(isolated); + RPC_U8(&msg, 2U) = B2U8(restricted); + RPC_U8(&msg, 3U) = B2U8(grant); + RPC_U8(&msg, 4U) = B2U8(coherent); + RPC_SIZE(&msg) = 3U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: secure:%u isolated:%u restricted:%u grant:%u coherent:%u res:%d\n", + __func__, secure, isolated, restricted, grant, coherent, + RPC_R8(&msg)); + } + + if (pt) + *pt = RPC_U8(&msg, 0U); + + return ret; +} + +int sc_rm_partition_free(sc_ipc_t ipc, sc_rm_pt_t pt) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_PARTITION_FREE; + RPC_U8(&msg, 0U) = (u8)pt; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: pt:%u res:%d\n", + __func__, pt, RPC_R8(&msg)); + } + + return ret; +} + +int sc_rm_get_partition(sc_ipc_t ipc, sc_rm_pt_t *pt) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_GET_PARTITION; + RPC_SIZE(&msg) = 1U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: res:%d\n", __func__, RPC_R8(&msg)); + + if (pt) + *pt = RPC_U8(&msg, 0U); + + return ret; +} + +int sc_rm_set_parent(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rm_pt_t pt_parent) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_SET_PARENT; + RPC_U8(&msg, 0U) = (u8)pt; + RPC_U8(&msg, 1U) = (u8)pt_parent; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: pt:%u, pt_parent:%u, res:%d\n", + __func__, pt, pt_parent, RPC_R8(&msg)); + } + + return ret; +} + +int sc_rm_assign_resource(sc_ipc_t ipc, sc_rm_pt_t pt, sc_rsrc_t resource) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_ASSIGN_RESOURCE; + RPC_U16(&msg, 0U) = (u16)resource; + RPC_U8(&msg, 2U) = (u8)pt; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: pt:%u, resource:%u, res:%d\n", + __func__, pt, resource, RPC_R8(&msg)); + } + + return ret; +} + +int sc_rm_assign_pad(sc_ipc_t ipc, sc_rm_pt_t pt, sc_pad_t pad) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_ASSIGN_PAD; + RPC_U16(&msg, 0U) = (u16)pad; + RPC_U8(&msg, 2U) = (u8)pt; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: pt:%u, pad:%u, res:%d\n", + __func__, pt, pad, RPC_R8(&msg)); + } + + return ret; +} + +sc_bool_t sc_rm_is_pad_owned(sc_ipc_t ipc, sc_pad_t pad) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + u8 result; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_IS_PAD_OWNED; + RPC_U8(&msg, 0U) = (u8)pad; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + result = RPC_R8(&msg); + if (result != 0 && result != 1) { + printf("%s: pad:%d res:%d\n", __func__, pad, RPC_R8(&msg)); + if (ret) { + printf("%s: pad:%d res:%d\n", __func__, + pad, RPC_R8(&msg)); + } + } + + return !!result; +} + +int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource, + sc_rm_pt_t *pt) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_RM; + RPC_FUNC(&msg) = (u8)RM_FUNC_GET_RESOURCE_OWNER; + RPC_U16(&msg, 0U) = (u16)resource; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (pt) + *pt = RPC_U8(&msg, 0U); + + return ret; +} + +int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable, + sc_faddr_t address) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_PM; + RPC_FUNC(&msg) = (u8)PM_FUNC_CPU_START; + RPC_U32(&msg, 0U) = (u32)(address >> 32ULL); + RPC_U32(&msg, 4U) = (u32)address; + RPC_U16(&msg, 8U) = (u16)resource; + RPC_U8(&msg, 10U) = B2U8(enable); + RPC_SIZE(&msg) = 4U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: resource:%d address:0x%llx: res:%d\n", + __func__, resource, address, RPC_R8(&msg)); + } + + return ret; +} + +int sc_pm_get_resource_power_mode(sc_ipc_t ipc, sc_rsrc_t resource, + sc_pm_power_mode_t *mode) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_PM; + RPC_FUNC(&msg) = (u8)PM_FUNC_GET_RESOURCE_POWER_MODE; + RPC_U16(&msg, 0U) = (u16)resource; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: resource:%d: res:%d\n", + __func__, resource, RPC_R8(&msg)); + } + + if (mode) + *mode = RPC_U8(&msg, 0U); + + return ret; +} + +int sc_seco_authenticate(sc_ipc_t ipc, sc_seco_auth_cmd_t cmd, + sc_faddr_t addr) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_SECO; + RPC_FUNC(&msg) = (u8)SECO_FUNC_AUTHENTICATE; + RPC_U32(&msg, 0U) = (u32)(addr >> 32ULL); + RPC_U32(&msg, 4U) = (u32)addr; + RPC_U8(&msg, 8U) = (u8)cmd; + RPC_SIZE(&msg) = 4U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: res:%d\n", __func__, RPC_R8(&msg)); + + return ret; +} + +int sc_seco_forward_lifecycle(sc_ipc_t ipc, u32 change) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_SECO; + RPC_FUNC(&msg) = (u8)SECO_FUNC_FORWARD_LIFECYCLE; + RPC_U32(&msg, 0U) = (u32)change; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: change:%u, res:%d\n", __func__, + change, RPC_R8(&msg)); + } + + return ret; +} + +int sc_seco_chip_info(sc_ipc_t ipc, u16 *lc, u16 *monotonic, u32 *uid_l, + u32 *uid_h) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_SECO; + RPC_FUNC(&msg) = (u8)SECO_FUNC_CHIP_INFO; + RPC_SIZE(&msg) = 1U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: res:%d\n", __func__, RPC_R8(&msg)); + + if (uid_l) + *uid_l = RPC_U32(&msg, 0U); + + if (uid_h) + *uid_h = RPC_U32(&msg, 4U); + + if (lc) + *lc = RPC_U16(&msg, 8U); + + if (monotonic) + *monotonic = RPC_U16(&msg, 10U); + + return ret; +} + +void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO); + RPC_FUNC(&msg) = (u8)(SECO_FUNC_BUILD_INFO); + RPC_SIZE(&msg) = 1U; + + misc_call(dev, SC_FALSE, &msg, size, &msg, size); + + if (version) + *version = RPC_U32(&msg, 0U); + + if (commit) + *commit = RPC_U32(&msg, 4U); +} + +int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_SECO; + RPC_FUNC(&msg) = (u8)SECO_FUNC_GET_EVENT; + RPC_U8(&msg, 0U) = (u8)idx; + RPC_SIZE(&msg) = 2U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) + printf("%s: idx: %u, res:%d\n", __func__, idx, RPC_R8(&msg)); + + if (event) + *event = RPC_U32(&msg, 0U); + + return ret; +} + +int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr, + sc_faddr_t export_addr, u16 max_size) +{ + struct udevice *dev = gd->arch.scu_dev; + struct sc_rpc_msg_s msg; + int size = sizeof(struct sc_rpc_msg_s); + int ret; + + RPC_VER(&msg) = SC_RPC_VERSION; + RPC_SVC(&msg) = (u8)SC_RPC_SVC_SECO; + RPC_FUNC(&msg) = (u8)SECO_FUNC_GEN_KEY_BLOB; + RPC_U32(&msg, 0U) = (u32)(load_addr >> 32ULL); + RPC_U32(&msg, 4U) = (u32)load_addr; + RPC_U32(&msg, 8U) = (u32)(export_addr >> 32ULL); + RPC_U32(&msg, 12U) = (u32)export_addr; + RPC_U32(&msg, 16U) = (u32)id; + RPC_U16(&msg, 20U) = (u16)max_size; + RPC_SIZE(&msg) = 7U; + + ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size); + if (ret) { + printf("%s: id: %u, load_addr 0x%llx, export_addr 0x%llx, res:%d\n", + __func__, id, load_addr, export_addr, RPC_R8(&msg)); + } + + return ret; +} diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c index 6afc6d9..11189d1 100644 --- a/drivers/misc/swap_case.c +++ b/drivers/misc/swap_case.c @@ -24,9 +24,6 @@ struct swap_case_platdata { u32 bar[6]; }; -#define offset_to_barnum(offset) \ - (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32)) - enum { MEM_TEXT_SIZE = 0x100, }; @@ -54,13 +51,6 @@ struct swap_case_priv { char mem_text[MEM_TEXT_SIZE]; }; -static int sandbox_swap_case_get_devfn(struct udevice *dev) -{ - struct pci_child_platdata *plat = dev_get_parent_platdata(dev); - - return plat->devfn; -} - static int sandbox_swap_case_use_ea(struct udevice *dev) { return !!ofnode_get_property(dev->node, "use-ea", NULL); @@ -129,7 +119,7 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, *valuep = SANDBOX_PCI_VENDOR_ID; break; case PCI_DEVICE_ID: - *valuep = SANDBOX_PCI_DEVICE_ID; + *valuep = SANDBOX_PCI_SWAP_CASE_EMUL_ID; break; case PCI_CLASS_DEVICE: if (size == PCI_SIZE_8) { @@ -149,25 +139,13 @@ static int sandbox_swap_case_read_config(struct udevice *emul, uint offset, case PCI_BASE_ADDRESS_4: case PCI_BASE_ADDRESS_5: { int barnum; - u32 *bar, result; + u32 *bar; - barnum = offset_to_barnum(offset); + barnum = pci_offset_to_barnum(offset); bar = &plat->bar[barnum]; - result = *bar; - if (*bar == 0xffffffff) { - if (barinfo[barnum].type) { - result = (~(barinfo[barnum].size - 1) & - PCI_BASE_ADDRESS_IO_MASK) | - PCI_BASE_ADDRESS_SPACE_IO; - } else { - result = (~(barinfo[barnum].size - 1) & - PCI_BASE_ADDRESS_MEM_MASK) | - PCI_BASE_ADDRESS_MEM_TYPE_32; - } - } - debug("r bar %d=%x\n", barnum, result); - *valuep = result; + *valuep = sandbox_pci_read_bar(*bar, barinfo[barnum].type, + barinfo[barnum].size); break; } case PCI_CAPABILITY_LIST: @@ -231,7 +209,7 @@ static int sandbox_swap_case_write_config(struct udevice *emul, uint offset, int barnum; u32 *bar; - barnum = offset_to_barnum(offset); + barnum = pci_offset_to_barnum(offset); bar = &plat->bar[barnum]; debug("w bar %d=%lx\n", barnum, value); @@ -286,8 +264,8 @@ static void sandbox_swap_case_do_op(enum swap_case_op op, char *str, int len) } } -int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr, - ulong *valuep, enum pci_size_t size) +static int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr, + ulong *valuep, enum pci_size_t size) { struct swap_case_priv *priv = dev_get_priv(dev); unsigned int offset; @@ -304,8 +282,8 @@ int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr, return 0; } -int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr, - ulong value, enum pci_size_t size) +static int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr, + ulong value, enum pci_size_t size) { struct swap_case_priv *priv = dev_get_priv(dev); unsigned int offset; @@ -392,8 +370,7 @@ static int sandbox_swap_case_unmap_physmem(struct udevice *dev, return 0; } -struct dm_pci_emul_ops sandbox_swap_case_emul_ops = { - .get_devfn = sandbox_swap_case_get_devfn, +static struct dm_pci_emul_ops sandbox_swap_case_emul_ops = { .read_config = sandbox_swap_case_read_config, .write_config = sandbox_swap_case_write_config, .read_io = sandbox_swap_case_read_io, @@ -417,7 +394,8 @@ U_BOOT_DRIVER(sandbox_swap_case_emul) = { }; static struct pci_device_id sandbox_swap_case_supported[] = { - { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_DEVICE_ID), SWAP_CASE_DRV_DATA }, + { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_SWAP_CASE_EMUL_ID), + SWAP_CASE_DRV_DATA }, {}, }; diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index d930ed8..2b797c9 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -112,6 +112,7 @@ static int atmel_sdhci_bind(struct udevice *dev) static const struct udevice_id atmel_sdhci_ids[] = { { .compatible = "atmel,sama5d2-sdhci" }, + { .compatible = "microchip,sam9x60-sdhci" }, { } }; diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index c8f71cd..6bece7f 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -2577,7 +2577,7 @@ static int mmc_startup(struct mmc *mmc) bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); #if !defined(CONFIG_SPL_BUILD) || \ (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \ - !defined(CONFIG_USE_TINY_PRINTF)) + !CONFIG_IS_ENABLED(USE_TINY_PRINTF)) sprintf(bdesc->vendor, "Man %06x Snr %04x%04x", mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), (mmc->cid[3] >> 16) & 0xffff); diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c index 92db4ae..9414eff 100644 --- a/drivers/mmc/mxsmmc.c +++ b/drivers/mmc/mxsmmc.c @@ -2,6 +2,9 @@ /* * Freescale i.MX28 SSP MMC driver * + * Copyright (C) 2019 DENX Software Engineering + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> * on behalf of DENX Software Engineering GmbH * @@ -16,6 +19,7 @@ * (C) Copyright 2003 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net */ + #include <common.h> #include <malloc.h> #include <mmc.h> @@ -27,18 +31,55 @@ #include <asm/mach-imx/dma.h> #include <bouncebuf.h> +#define MXSMMC_MAX_TIMEOUT 10000 +#define MXSMMC_SMALL_TRANSFER 512 + +#if !CONFIG_IS_ENABLED(DM_MMC) struct mxsmmc_priv { int id; - struct mxs_ssp_regs *regs; - uint32_t buswidth; int (*mmc_is_wp)(int); int (*mmc_cd)(int); - struct mxs_dma_desc *desc; struct mmc_config cfg; /* mmc configuration */ + struct mxs_dma_desc *desc; + uint32_t buswidth; + struct mxs_ssp_regs *regs; }; +#else /* CONFIG_IS_ENABLED(DM_MMC) */ +#include <dm/device.h> +#include <dm/read.h> +#include <dt-structs.h> + +#ifdef CONFIG_MX28 +#define dtd_fsl_imx_mmc dtd_fsl_imx28_mmc +#else /* CONFIG_MX23 */ +#define dtd_fsl_imx_mmc dtd_fsl_imx23_mmc +#endif -#define MXSMMC_MAX_TIMEOUT 10000 -#define MXSMMC_SMALL_TRANSFER 512 +struct mxsmmc_platdata { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx_mmc dtplat; +#endif + struct mmc_config cfg; + struct mmc mmc; + fdt_addr_t base; + int non_removable; + int buswidth; + int dma_id; + int clk_id; +}; + +struct mxsmmc_priv { + int clkid; + struct mxs_dma_desc *desc; + u32 buswidth; + struct mxs_ssp_regs *regs; + unsigned int dma_channel; +}; +#endif + +#if !CONFIG_IS_ENABLED(DM_MMC) +static int mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, + struct mmc_data *data); static int mxsmmc_cd(struct mxsmmc_priv *priv) { @@ -50,6 +91,132 @@ static int mxsmmc_cd(struct mxsmmc_priv *priv) return !(readl(&ssp_regs->hw_ssp_status) & SSP_STATUS_CARD_DETECT); } +static int mxsmmc_set_ios(struct mmc *mmc) +{ + struct mxsmmc_priv *priv = mmc->priv; + struct mxs_ssp_regs *ssp_regs = priv->regs; + + /* Set the clock speed */ + if (mmc->clock) + mxs_set_ssp_busclock(priv->id, mmc->clock / 1000); + + switch (mmc->bus_width) { + case 1: + priv->buswidth = SSP_CTRL0_BUS_WIDTH_ONE_BIT; + break; + case 4: + priv->buswidth = SSP_CTRL0_BUS_WIDTH_FOUR_BIT; + break; + case 8: + priv->buswidth = SSP_CTRL0_BUS_WIDTH_EIGHT_BIT; + break; + } + + /* Set the bus width */ + clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, + SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); + + debug("MMC%d: Set %d bits bus width\n", + mmc->block_dev.devnum, mmc->bus_width); + + return 0; +} + +static int mxsmmc_init(struct mmc *mmc) +{ + struct mxsmmc_priv *priv = mmc->priv; + struct mxs_ssp_regs *ssp_regs = priv->regs; + + /* Reset SSP */ + mxs_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); + + /* Reconfigure the SSP block for MMC operation */ + writel(SSP_CTRL1_SSP_MODE_SD_MMC | + SSP_CTRL1_WORD_LENGTH_EIGHT_BITS | + SSP_CTRL1_DMA_ENABLE | + SSP_CTRL1_POLARITY | + SSP_CTRL1_RECV_TIMEOUT_IRQ_EN | + SSP_CTRL1_DATA_CRC_IRQ_EN | + SSP_CTRL1_DATA_TIMEOUT_IRQ_EN | + SSP_CTRL1_RESP_TIMEOUT_IRQ_EN | + SSP_CTRL1_RESP_ERR_IRQ_EN, + &ssp_regs->hw_ssp_ctrl1_set); + + /* Set initial bit clock 400 KHz */ + mxs_set_ssp_busclock(priv->id, 400); + + /* Send initial 74 clock cycles (185 us @ 400 KHz)*/ + writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_set); + udelay(200); + writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_clr); + + return 0; +} + +static const struct mmc_ops mxsmmc_ops = { + .send_cmd = mxsmmc_send_cmd, + .set_ios = mxsmmc_set_ios, + .init = mxsmmc_init, +}; + +int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) +{ + struct mmc *mmc = NULL; + struct mxsmmc_priv *priv = NULL; + int ret; + const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id); + + if (!mxs_ssp_bus_id_valid(id)) + return -ENODEV; + + priv = malloc(sizeof(struct mxsmmc_priv)); + if (!priv) + return -ENOMEM; + + priv->desc = mxs_dma_desc_alloc(); + if (!priv->desc) { + free(priv); + return -ENOMEM; + } + + ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id); + if (ret) + return ret; + + priv->mmc_is_wp = wp; + priv->mmc_cd = cd; + priv->id = id; + priv->regs = mxs_ssp_regs_by_bus(id); + + priv->cfg.name = "MXS MMC"; + priv->cfg.ops = &mxsmmc_ops; + + priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; + + priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | + MMC_MODE_HS_52MHz | MMC_MODE_HS; + + /* + * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz + * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)), + * CLOCK_DIVIDE has to be an even value from 2 to 254, and + * CLOCK_RATE could be any integer from 0 to 255. + */ + priv->cfg.f_min = 400000; + priv->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) + * 1000 / 2; + priv->cfg.b_max = 0x20; + + mmc = mmc_create(&priv->cfg, priv); + if (!mmc) { + mxs_dma_desc_free(priv->desc); + free(priv); + return -ENOMEM; + } + return 0; +} +#endif /* CONFIG_IS_ENABLED(DM_MMC) */ + static int mxsmmc_send_cmd_pio(struct mxsmmc_priv *priv, struct mmc_data *data) { struct mxs_ssp_regs *ssp_regs = priv->regs; @@ -115,7 +282,11 @@ static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) priv->desc->cmd.data |= MXS_DMA_DESC_IRQ | MXS_DMA_DESC_DEC_SEM | (data_count << MXS_DMA_DESC_BYTES_OFFSET); +#if !CONFIG_IS_ENABLED(DM_MMC) dmach = MXS_DMA_CHANNEL_AHB_APBH_SSP0 + priv->id; +#else + dmach = priv->dma_channel; +#endif mxs_dma_desc_append(dmach, priv->desc); if (mxs_dma_go(dmach)) { bounce_buffer_stop(&bbstate); @@ -127,6 +298,7 @@ static int mxsmmc_send_cmd_dma(struct mxsmmc_priv *priv, struct mmc_data *data) return 0; } +#if !CONFIG_IS_ENABLED(DM_MMC) /* * Sends a command out on the bus. Takes the mmc pointer, * a command pointer, and an optional data pointer. @@ -136,12 +308,25 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { struct mxsmmc_priv *priv = mmc->priv; struct mxs_ssp_regs *ssp_regs = priv->regs; +#else +static int +mxsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data) +{ + struct mxsmmc_platdata *plat = dev_get_platdata(dev); + struct mxsmmc_priv *priv = dev_get_priv(dev); + struct mxs_ssp_regs *ssp_regs = priv->regs; + struct mmc *mmc = &plat->mmc; +#endif uint32_t reg; int timeout; uint32_t ctrl0; int ret; - - debug("MMC%d: CMD%d\n", mmc->block_dev.devnum, cmd->cmdidx); +#if !CONFIG_IS_ENABLED(DM_MMC) + int devnum = mmc->block_dev.devnum; +#else + int devnum = mmc_get_blk_desc(mmc)->devnum; +#endif + debug("MMC%d: CMD%d\n", devnum, cmd->cmdidx); /* Check bus busy */ timeout = MXSMMC_MAX_TIMEOUT; @@ -156,16 +341,16 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) } if (!timeout) { - printf("MMC%d: Bus busy timeout!\n", mmc->block_dev.devnum); + printf("MMC%d: Bus busy timeout!\n", devnum); return -ETIMEDOUT; } - +#if !CONFIG_IS_ENABLED(DM_MMC) /* See if card is present */ if (!mxsmmc_cd(priv)) { - printf("MMC%d: No card detected!\n", mmc->block_dev.devnum); + printf("MMC%d: No card detected!\n", devnum); return -ENOMEDIUM; } - +#endif /* Start building CTRL0 contents */ ctrl0 = priv->buswidth; @@ -198,13 +383,13 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) /* READ or WRITE */ if (data->flags & MMC_DATA_READ) { ctrl0 |= SSP_CTRL0_READ; +#if !CONFIG_IS_ENABLED(DM_MMC) } else if (priv->mmc_is_wp && - priv->mmc_is_wp(mmc->block_dev.devnum)) { - printf("MMC%d: Can not write a locked card!\n", - mmc->block_dev.devnum); + priv->mmc_is_wp(devnum)) { + printf("MMC%d: Can not write a locked card!\n", devnum); return -EOPNOTSUPP; +#endif } - ctrl0 |= SSP_CTRL0_DATA_XFER; reg = data->blocksize * data->blocks; @@ -241,22 +426,21 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) } if (!timeout) { - printf("MMC%d: Command %d busy\n", - mmc->block_dev.devnum, cmd->cmdidx); + printf("MMC%d: Command %d busy\n", devnum, cmd->cmdidx); return -ETIMEDOUT; } /* Check command timeout */ if (reg & SSP_STATUS_RESP_TIMEOUT) { - printf("MMC%d: Command %d timeout (status 0x%08x)\n", - mmc->block_dev.devnum, cmd->cmdidx, reg); + debug("MMC%d: Command %d timeout (status 0x%08x)\n", + devnum, cmd->cmdidx, reg); return -ETIMEDOUT; } /* Check command errors */ if (reg & (SSP_STATUS_RESP_CRC_ERR | SSP_STATUS_RESP_ERR)) { printf("MMC%d: Command %d error (status 0x%08x)!\n", - mmc->block_dev.devnum, cmd->cmdidx, reg); + devnum, cmd->cmdidx, reg); return -ECOMM; } @@ -277,15 +461,13 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) ret = mxsmmc_send_cmd_pio(priv, data); if (ret) { printf("MMC%d: Data timeout with command %d " - "(status 0x%08x)!\n", - mmc->block_dev.devnum, cmd->cmdidx, reg); + "(status 0x%08x)!\n", devnum, cmd->cmdidx, reg); return ret; } } else { ret = mxsmmc_send_cmd_dma(priv, data); if (ret) { - printf("MMC%d: DMA transfer failed\n", - mmc->block_dev.devnum); + printf("MMC%d: DMA transfer failed\n", devnum); return ret; } } @@ -296,21 +478,40 @@ mxsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) (SSP_STATUS_TIMEOUT | SSP_STATUS_DATA_CRC_ERR | SSP_STATUS_FIFO_OVRFLW | SSP_STATUS_FIFO_UNDRFLW)) { printf("MMC%d: Data error with command %d (status 0x%08x)!\n", - mmc->block_dev.devnum, cmd->cmdidx, reg); + devnum, cmd->cmdidx, reg); return -ECOMM; } return 0; } -static int mxsmmc_set_ios(struct mmc *mmc) +#if CONFIG_IS_ENABLED(DM_MMC) +/* Base numbers of i.MX2[38] clk for ssp0 IP block */ +#define MXS_SSP_IMX23_CLKID_SSP0 33 +#define MXS_SSP_IMX28_CLKID_SSP0 46 + +static int mxsmmc_get_cd(struct udevice *dev) { - struct mxsmmc_priv *priv = mmc->priv; + struct mxsmmc_platdata *plat = dev_get_platdata(dev); + struct mxsmmc_priv *priv = dev_get_priv(dev); + struct mxs_ssp_regs *ssp_regs = priv->regs; + + if (plat->non_removable) + return 1; + + return !(readl(&ssp_regs->hw_ssp_status) & SSP_STATUS_CARD_DETECT); +} + +static int mxsmmc_set_ios(struct udevice *dev) +{ + struct mxsmmc_platdata *plat = dev_get_platdata(dev); + struct mxsmmc_priv *priv = dev_get_priv(dev); struct mxs_ssp_regs *ssp_regs = priv->regs; + struct mmc *mmc = &plat->mmc; /* Set the clock speed */ if (mmc->clock) - mxs_set_ssp_busclock(priv->id, mmc->clock / 1000); + mxs_set_ssp_busclock(priv->clkid, mmc->clock / 1000); switch (mmc->bus_width) { case 1: @@ -328,15 +529,15 @@ static int mxsmmc_set_ios(struct mmc *mmc) clrsetbits_le32(&ssp_regs->hw_ssp_ctrl0, SSP_CTRL0_BUS_WIDTH_MASK, priv->buswidth); - debug("MMC%d: Set %d bits bus width\n", - mmc->block_dev.devnum, mmc->bus_width); + debug("MMC%d: Set %d bits bus width\n", mmc_get_blk_desc(mmc)->devnum, + mmc->bus_width); return 0; } -static int mxsmmc_init(struct mmc *mmc) +static int mxsmmc_init(struct udevice *dev) { - struct mxsmmc_priv *priv = mmc->priv; + struct mxsmmc_priv *priv = dev_get_priv(dev); struct mxs_ssp_regs *ssp_regs = priv->regs; /* Reset SSP */ @@ -355,7 +556,7 @@ static int mxsmmc_init(struct mmc *mmc) &ssp_regs->hw_ssp_ctrl1_set); /* Set initial bit clock 400 KHz */ - mxs_set_ssp_busclock(priv->id, 400); + mxs_set_ssp_busclock(priv->clkid, 400); /* Send initial 74 clock cycles (185 us @ 400 KHz)*/ writel(SSP_CMD0_CONT_CLKING_EN, &ssp_regs->hw_ssp_cmd0_set); @@ -365,48 +566,59 @@ static int mxsmmc_init(struct mmc *mmc) return 0; } -static const struct mmc_ops mxsmmc_ops = { - .send_cmd = mxsmmc_send_cmd, - .set_ios = mxsmmc_set_ios, - .init = mxsmmc_init, -}; - -int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) +static int mxsmmc_probe(struct udevice *dev) { - struct mmc *mmc = NULL; - struct mxsmmc_priv *priv = NULL; - int ret; - const unsigned int mxsmmc_clk_id = mxs_ssp_clock_by_bus(id); - - if (!mxs_ssp_bus_id_valid(id)) - return -ENODEV; + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct mxsmmc_platdata *plat = dev_get_platdata(dev); + struct mxsmmc_priv *priv = dev_get_priv(dev); + struct blk_desc *bdesc; + struct mmc *mmc; + int ret, clkid; + + debug("%s: probe\n", __func__); + +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx_mmc *dtplat = &plat->dtplat; + struct phandle_1_arg *p1a = &dtplat->clocks[0]; + + priv->buswidth = dtplat->bus_width; + priv->regs = (struct mxs_ssp_regs *)dtplat->reg[0]; + priv->dma_channel = dtplat->dmas[1]; + clkid = p1a->arg[0]; + plat->non_removable = dtplat->non_removable; + + debug("OF_PLATDATA: regs: 0x%p bw: %d clkid: %d non_removable: %d\n", + priv->regs, priv->buswidth, clkid, plat->non_removable); +#else + priv->regs = (struct mxs_ssp_regs *)plat->base; + priv->dma_channel = plat->dma_id; + clkid = plat->clk_id; +#endif - priv = malloc(sizeof(struct mxsmmc_priv)); - if (!priv) - return -ENOMEM; +#ifdef CONFIG_MX28 + priv->clkid = clkid - MXS_SSP_IMX28_CLKID_SSP0; +#else /* CONFIG_MX23 */ + priv->clkid = clkid - MXS_SSP_IMX23_CLKID_SSP0; +#endif + mmc = &plat->mmc; + mmc->cfg = &plat->cfg; + mmc->dev = dev; priv->desc = mxs_dma_desc_alloc(); if (!priv->desc) { - free(priv); + printf("%s: Cannot allocate DMA descriptor\n", __func__); return -ENOMEM; } - ret = mxs_dma_init_channel(MXS_DMA_CHANNEL_AHB_APBH_SSP0 + id); + ret = mxs_dma_init_channel(priv->dma_channel); if (ret) return ret; - priv->mmc_is_wp = wp; - priv->mmc_cd = cd; - priv->id = id; - priv->regs = mxs_ssp_regs_by_bus(id); - - priv->cfg.name = "MXS MMC"; - priv->cfg.ops = &mxsmmc_ops; + plat->cfg.name = "MXS MMC"; + plat->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - priv->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34; - - priv->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | - MMC_MODE_HS_52MHz | MMC_MODE_HS; + plat->cfg.host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT | + MMC_MODE_HS_52MHz | MMC_MODE_HS; /* * SSPCLK = 480 * 18 / 29 / 1 = 297.731 MHz @@ -414,15 +626,106 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)) * CLOCK_DIVIDE has to be an even value from 2 to 254, and * CLOCK_RATE could be any integer from 0 to 255. */ - priv->cfg.f_min = 400000; - priv->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2; - priv->cfg.b_max = 0x20; + plat->cfg.f_min = 400000; + plat->cfg.f_max = mxc_get_clock(MXC_SSP0_CLK + priv->clkid) * 1000 / 2; + plat->cfg.b_max = 0x20; - mmc = mmc_create(&priv->cfg, priv); - if (mmc == NULL) { - mxs_dma_desc_free(priv->desc); - free(priv); - return -ENOMEM; + bdesc = mmc_get_blk_desc(mmc); + if (!bdesc) { + printf("%s: No block device descriptor!\n", __func__); + return -ENODEV; + } + + if (plat->non_removable) + bdesc->removable = 0; + + ret = mxsmmc_init(dev); + if (ret) + printf("%s: MMC%d init error %d\n", __func__, + bdesc->devnum, ret); + + /* Set the initial clock speed */ + mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE); + + upriv->mmc = mmc; + + return 0; +}; + +#if CONFIG_IS_ENABLED(BLK) +static int mxsmmc_bind(struct udevice *dev) +{ + struct mxsmmc_platdata *plat = dev_get_platdata(dev); + + return mmc_bind(dev, &plat->mmc, &plat->cfg); +} +#endif + +static const struct dm_mmc_ops mxsmmc_ops = { + .get_cd = mxsmmc_get_cd, + .send_cmd = mxsmmc_send_cmd, + .set_ios = mxsmmc_set_ios, +}; + +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) +static int mxsmmc_ofdata_to_platdata(struct udevice *bus) +{ + struct mxsmmc_platdata *plat = bus->platdata; + u32 prop[2]; + int ret; + + plat->base = dev_read_addr(bus); + plat->buswidth = + dev_read_u32_default(bus, "bus-width", 1); + plat->non_removable = dev_read_bool(bus, "non-removable"); + + ret = dev_read_u32_array(bus, "dmas", prop, ARRAY_SIZE(prop)); + if (ret) { + printf("%s: Reading 'dmas' property failed!\n", __func__); + return ret; + } + plat->dma_id = prop[1]; + + ret = dev_read_u32_array(bus, "clocks", prop, ARRAY_SIZE(prop)); + if (ret) { + printf("%s: Reading 'clocks' property failed!\n", __func__); + return ret; } + plat->clk_id = prop[1]; + + debug("%s: base=0x%x, bus_width=%d %s dma_id=%d clk_id=%d\n", + __func__, (uint)plat->base, plat->buswidth, + plat->non_removable ? "non-removable" : NULL, + plat->dma_id, plat->clk_id); + return 0; } + +static const struct udevice_id mxsmmc_ids[] = { + { .compatible = "fsl,imx23-mmc", }, + { .compatible = "fsl,imx28-mmc", }, + { /* sentinel */ } +}; +#endif + +U_BOOT_DRIVER(mxsmmc) = { +#ifdef CONFIG_MX28 + .name = "fsl_imx28_mmc", +#else /* CONFIG_MX23 */ + .name = "fsl_imx23_mmc", +#endif + .id = UCLASS_MMC, +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) + .of_match = mxsmmc_ids, + .ofdata_to_platdata = mxsmmc_ofdata_to_platdata, +#endif + .ops = &mxsmmc_ops, +#if CONFIG_IS_ENABLED(BLK) + .bind = mxsmmc_bind, +#endif + .probe = mxsmmc_probe, + .priv_auto_alloc_size = sizeof(struct mxsmmc_priv), + .platdata_auto_alloc_size = sizeof(struct mxsmmc_platdata), +}; + +#endif /* CONFIG_DM_MMC */ diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c index 2fa7d8c..899952d 100644 --- a/drivers/mmc/sandbox_mmc.c +++ b/drivers/mmc/sandbox_mmc.c @@ -27,6 +27,7 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, { switch (cmd->cmdidx) { case MMC_CMD_ALL_SEND_CID: + memset(cmd->response, '\0', sizeof(cmd->response)); break; case SD_CMD_SEND_RELATIVE_ADDR: cmd->response[0] = 0 << 16; /* mmc->rca */ @@ -43,11 +44,14 @@ static int sandbox_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, case MMC_CMD_SEND_CSD: cmd->response[0] = 0; cmd->response[1] = 10 << 16; /* 1 << block_len */ + cmd->response[2] = 0; + cmd->response[3] = 0; break; case SD_CMD_SWITCH_FUNC: { if (!data) break; u32 *resp = (u32 *)data->dest; + resp[3] = 0; resp[7] = cpu_to_be32(SD_HIGHSPEED_BUSY); if ((cmd->cmdarg & 0xF) == UHS_SDR12_BUS_SPEED) resp[4] = (cmd->cmdarg & 0xF) << 24; diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c index 719a2fd..c610752 100644 --- a/drivers/mtd/spi/sf-uclass.c +++ b/drivers/mtd/spi/sf-uclass.c @@ -66,7 +66,7 @@ int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, char *str; int ret; -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_TINY_PRINTF) +#if defined(CONFIG_SPL_BUILD) && CONFIG_IS_ENABLED(USE_TINY_PRINTF) str = "spi_flash"; #else char name[30]; diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 377188e..1a532b0 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -1321,6 +1321,7 @@ static const struct macb_config sifive_config = { static const struct udevice_id macb_eth_ids[] = { { .compatible = "cdns,macb" }, { .compatible = "cdns,at91sam9260-macb" }, + { .compatible = "cdns,sam9x60-macb" }, { .compatible = "atmel,sama5d2-gem" }, { .compatible = "atmel,sama5d3-gem" }, { .compatible = "atmel,sama5d4-gem", .data = (ulong)&sama5d4_config }, diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c index 47f101e..ee6b581 100644 --- a/drivers/nvme/nvme.c +++ b/drivers/nvme/nvme.c @@ -621,6 +621,18 @@ static int nvme_get_info_from_identify(struct nvme_dev *dev) return 0; } +int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64) +{ + struct nvme_ns *ns = dev_get_priv(udev); + + if (ns_id) + *ns_id = ns->ns_id; + if (eui64) + memcpy(eui64, ns->eui64, sizeof(ns->eui64)); + + return 0; +} + int nvme_scan_namespace(void) { struct uclass *uc; @@ -657,6 +669,7 @@ static int nvme_blk_probe(struct udevice *udev) if (nvme_identify(ndev, ns->ns_id, 0, (dma_addr_t)(long)id)) return -EIO; + memcpy(&ns->eui64, &id->eui64, sizeof(id->eui64)); flbas = id->flbas & NVME_NS_FLBAS_LBA_MASK; ns->flbas = flbas; ns->lba_shift = id->lbaf[flbas].ds; diff --git a/drivers/nvme/nvme.h b/drivers/nvme/nvme.h index 922f7ab..0e8cb22 100644 --- a/drivers/nvme/nvme.h +++ b/drivers/nvme/nvme.h @@ -637,6 +637,7 @@ struct nvme_ns { struct list_head list; struct nvme_dev *dev; unsigned ns_id; + u8 eui64[8]; int devnum; int lba_shift; u8 flbas; diff --git a/drivers/pch/pch-uclass.c b/drivers/pch/pch-uclass.c index caf8b72..ad4906a 100644 --- a/drivers/pch/pch-uclass.c +++ b/drivers/pch/pch-uclass.c @@ -64,5 +64,7 @@ int pch_ioctl(struct udevice *dev, ulong req, void *data, int size) UCLASS_DRIVER(pch) = { .id = UCLASS_PCH, .name = "pch", +#if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .post_bind = dm_scan_fdt_dev, +#endif }; diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c index 3822758..0dcf937 100644 --- a/drivers/pci/pci-emul-uclass.c +++ b/drivers/pci/pci-emul-uclass.c @@ -30,17 +30,38 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, } *containerp = dev; - if (device_get_uclass_id(dev) == UCLASS_PCI_GENERIC) { - ret = device_find_first_child(dev, emulp); - if (ret) - return ret; - } else { + /* + * See commit 4345998ae9df, + * "pci: sandbox: Support dynamically binding device driver" + */ + ret = uclass_get_device_by_phandle(UCLASS_PCI_EMUL, dev, "sandbox,emul", + emulp); + if (ret && device_get_uclass_id(dev) != UCLASS_PCI_GENERIC) *emulp = dev; - } return *emulp ? 0 : -ENODEV; } +uint sandbox_pci_read_bar(u32 barval, int type, uint size) +{ + u32 result; + + result = barval; + if (result == 0xffffffff) { + if (type == PCI_BASE_ADDRESS_SPACE_IO) { + result = (~(size - 1) & + PCI_BASE_ADDRESS_IO_MASK) | + PCI_BASE_ADDRESS_SPACE_IO; + } else { + result = (~(size - 1) & + PCI_BASE_ADDRESS_MEM_MASK) | + PCI_BASE_ADDRESS_MEM_TYPE_32; + } + } + + return result; +} + static int sandbox_pci_emul_post_probe(struct udevice *dev) { struct sandbox_pci_emul_priv *priv = dev->uclass->priv; @@ -68,3 +89,25 @@ UCLASS_DRIVER(pci_emul) = { .pre_remove = sandbox_pci_emul_pre_remove, .priv_auto_alloc_size = sizeof(struct sandbox_pci_emul_priv), }; + +/* + * This uclass is a child of the pci bus. Its platdata is not defined here so + * is defined by its parent, UCLASS_PCI, which uses struct pci_child_platdata. + * See per_child_platdata_auto_alloc_size in UCLASS_DRIVER(pci). + */ +UCLASS_DRIVER(pci_emul_parent) = { + .id = UCLASS_PCI_EMUL_PARENT, + .name = "pci_emul_parent", + .post_bind = dm_scan_fdt_dev, +}; + +static const struct udevice_id pci_emul_parent_ids[] = { + { .compatible = "sandbox,pci-emul-parent" }, + { } +}; + +U_BOOT_DRIVER(pci_emul_parent_drv) = { + .name = "pci_emul_parent_drv", + .id = UCLASS_PCI_EMUL_PARENT, + .of_match = pci_emul_parent_ids, +}; diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index ab3e131..896cb6b 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -790,7 +790,7 @@ int pci_bind_bus_devices(struct udevice *bus) if (!PCI_FUNC(bdf)) found_multi = header_type & 0x80; - debug("%s: bus %d/%s: found device %x, function %d\n", __func__, + debug("%s: bus %d/%s: found device %x, function %d", __func__, bus->seq, bus->name, PCI_DEV(bdf), PCI_FUNC(bdf)); pci_bus_read_config(bus, bdf, PCI_DEVICE_ID, &device, PCI_SIZE_16); @@ -800,6 +800,7 @@ int pci_bind_bus_devices(struct udevice *bus) /* Find this device in the device tree */ ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(bdf), &dev); + debug(": find ret=%d\n", ret); /* If nothing in the device tree, bind a device */ if (ret == -ENODEV) { @@ -982,7 +983,7 @@ static int pci_uclass_post_probe(struct udevice *bus) if (ret) return ret; -#ifdef CONFIG_PCI_PNP +#if CONFIG_IS_ENABLED(PCI_PNP) ret = pci_auto_config_devices(bus); if (ret < 0) return ret; diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c index 1a3bf70..28667bd 100644 --- a/drivers/pci/pci_auto.c +++ b/drivers/pci/pci_auto.c @@ -39,6 +39,8 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num, for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num * 4); bar += 4) { + int ret = 0; + /* Tickle the BAR and get the response */ if (!enum_only) dm_pci_write_config32(dev, bar, 0xffffffff); @@ -97,9 +99,13 @@ void dm_pciauto_setup_device(struct udevice *dev, int bars_num, (unsigned long long)bar_size); } - if (!enum_only && pciauto_region_allocate(bar_res, bar_size, - &bar_value, - found_mem64) == 0) { + if (!enum_only) { + ret = pciauto_region_allocate(bar_res, bar_size, + &bar_value, found_mem64); + if (ret) + printf("PCI: Failed autoconfig bar %x\n", bar); + } + if (!enum_only && !ret) { /* Write it out and update our limit */ dm_pci_write_config32(dev, bar, (u32)bar_value); diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c index 84908e6..8690316 100644 --- a/drivers/pci/pci_auto_common.c +++ b/drivers/pci/pci_auto_common.c @@ -45,7 +45,9 @@ int pciauto_region_allocate(struct pci_region *res, pci_size_t size, addr = ((res->bus_lower - 1) | (size - 1)) + 1; if (addr - res->bus_start + size > res->size) { - debug("No room in resource"); + debug("No room in resource, avail start=%llx / size=%llx, " + "need=%llx\n", (unsigned long long)res->bus_lower, + (unsigned long long)res->size, (unsigned long long)size); goto error; } diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index 2cede12..1d4064e 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -35,7 +35,7 @@ #include <linux/screen_info.h> #ifdef CONFIG_X86 -#include <asm/acpi_s3.h> +#include <acpi_s3.h> DECLARE_GLOBAL_DATA_PTR; #endif diff --git a/drivers/pci/pci_x86.c b/drivers/pci/pci_x86.c index 520ea46..e76a9c6e 100644 --- a/drivers/pci/pci_x86.c +++ b/drivers/pci/pci_x86.c @@ -8,9 +8,21 @@ #include <pci.h> #include <asm/pci.h> +static int _pci_x86_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, + ulong *valuep, enum pci_size_t size) +{ + return pci_x86_read_config(bdf, offset, valuep, size); +} + +static int _pci_x86_write_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong value, enum pci_size_t size) +{ + return pci_x86_write_config(bdf, offset, value, size); +} + static const struct dm_pci_ops pci_x86_ops = { - .read_config = pci_x86_read_config, - .write_config = pci_x86_write_config, + .read_config = _pci_x86_read_config, + .write_config = _pci_x86_write_config, }; static const struct udevice_id pci_x86_ids[] = { diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c index 0c9d15c..69c4144 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx.c +++ b/drivers/pinctrl/nxp/pinctrl-imx.c @@ -214,9 +214,7 @@ int imx_pinctrl_probe(struct udevice *dev, if (info->flags & IMX8_USE_SCU) return 0; - addr = fdtdec_get_addr_size(gd->fdt_blob, dev_of_offset(dev), "reg", - &size); - + addr = devfdt_get_addr_size_index(dev, 0, &size); if (addr == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/drivers/pinctrl/nxp/pinctrl-imx5.c b/drivers/pinctrl/nxp/pinctrl-imx5.c index 4e831b6..5d17380 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx5.c +++ b/drivers/pinctrl/nxp/pinctrl-imx5.c @@ -40,7 +40,5 @@ U_BOOT_DRIVER(imx5_pinctrl) = { .remove = imx_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv), .ops = &imx_pinctrl_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) .flags = DM_FLAG_PRE_RELOC, -#endif }; diff --git a/drivers/pinctrl/nxp/pinctrl-imx6.c b/drivers/pinctrl/nxp/pinctrl-imx6.c index 0c1e7a9..aafa305 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx6.c +++ b/drivers/pinctrl/nxp/pinctrl-imx6.c @@ -49,7 +49,5 @@ U_BOOT_DRIVER(imx6_pinctrl) = { .remove = imx_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv), .ops = &imx_pinctrl_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) .flags = DM_FLAG_PRE_RELOC, -#endif }; diff --git a/drivers/pinctrl/nxp/pinctrl-imx7.c b/drivers/pinctrl/nxp/pinctrl-imx7.c index 8776fd9..769d428 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx7.c +++ b/drivers/pinctrl/nxp/pinctrl-imx7.c @@ -37,7 +37,5 @@ U_BOOT_DRIVER(imx7_pinctrl) = { .remove = imx_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv), .ops = &imx_pinctrl_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) .flags = DM_FLAG_PRE_RELOC, -#endif }; diff --git a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c index d778f82..598bbfa 100644 --- a/drivers/pinctrl/nxp/pinctrl-imx7ulp.c +++ b/drivers/pinctrl/nxp/pinctrl-imx7ulp.c @@ -41,7 +41,5 @@ U_BOOT_DRIVER(imx7ulp_pinctrl) = { .remove = imx_pinctrl_remove, .priv_auto_alloc_size = sizeof(struct imx_pinctrl_priv), .ops = &imx_pinctrl_ops, -#if !CONFIG_IS_ENABLED(OF_CONTROL) .flags = DM_FLAG_PRE_RELOC, -#endif }; diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig index 06bba62..7e2d6a9 100644 --- a/drivers/power/domain/Kconfig +++ b/drivers/power/domain/Kconfig @@ -23,6 +23,13 @@ config IMX8_POWER_DOMAIN Enable support for manipulating NXP i.MX8 on-SoC power domains via IPC requests to the SCU. +config IMX8M_POWER_DOMAIN + bool "Enable i.MX8M power domain driver" + depends on POWER_DOMAIN && ARCH_IMX8M + help + Enable support for manipulating NXP i.MX8M on-SoC power domains via + requests to the ATF. + config MTK_POWER_DOMAIN bool "Enable the MediaTek power domain driver" depends on POWER_DOMAIN && ARCH_MEDIATEK diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile index 695aafe..4d87d7c 100644 --- a/drivers/power/domain/Makefile +++ b/drivers/power/domain/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain.o +obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o obj-$(CONFIG_MTK_POWER_DOMAIN) += mtk-power-domain.o obj-$(CONFIG_MESON_GX_VPU_POWER_DOMAIN) += meson-gx-pwrc-vpu.o obj-$(CONFIG_SANDBOX_POWER_DOMAIN) += sandbox-power-domain.o diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c new file mode 100644 index 0000000..164fb3d --- /dev/null +++ b/drivers/power/domain/imx8m-power-domain.c @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2017 NXP + */ + +#include <common.h> +#include <dm.h> +#include <power-domain-uclass.h> +#include <asm/io.h> +#include <asm/arch/power-domain.h> +#include <asm/mach-imx/sys_proto.h> +#include <dm/device-internal.h> +#include <dm/device.h> +#include <imx_sip.h> + +DECLARE_GLOBAL_DATA_PTR; + +static int imx8m_power_domain_request(struct power_domain *power_domain) +{ + return 0; +} + +static int imx8m_power_domain_free(struct power_domain *power_domain) +{ + return 0; +} + +static int imx8m_power_domain_on(struct power_domain *power_domain) +{ + struct udevice *dev = power_domain->dev; + struct imx8m_power_domain_platdata *pdata; + pdata = dev_get_platdata(dev); + + if (pdata->resource_id < 0) + return -EINVAL; + + if (pdata->has_pd) + power_domain_on(&pdata->pd); + + call_imx_sip(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, pdata->resource_id, 1); + + return 0; +} + +static int imx8m_power_domain_off(struct power_domain *power_domain) +{ + struct udevice *dev = power_domain->dev; + struct imx8m_power_domain_platdata *pdata; + pdata = dev_get_platdata(dev); + + if (pdata->resource_id < 0) + return -EINVAL; + + call_imx_sip(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, pdata->resource_id, 0); + + if (pdata->has_pd) + power_domain_off(&pdata->pd); + + return 0; +} + +static int imx8m_power_domain_of_xlate(struct power_domain *power_domain, + struct ofnode_phandle_args *args) +{ + return 0; +} + +static int imx8m_power_domain_bind(struct udevice *dev) +{ + int offset; + const char *name; + int ret = 0; + + offset = dev_of_offset(dev); + for (offset = fdt_first_subnode(gd->fdt_blob, offset); offset > 0; + offset = fdt_next_subnode(gd->fdt_blob, offset)) { + /* Bind the subnode to this driver */ + name = fdt_get_name(gd->fdt_blob, offset, NULL); + + ret = device_bind_with_driver_data(dev, dev->driver, name, + dev->driver_data, + offset_to_ofnode(offset), + NULL); + + if (ret == -ENODEV) + printf("Driver '%s' refuses to bind\n", + dev->driver->name); + + if (ret) + printf("Error binding driver '%s': %d\n", + dev->driver->name, ret); + } + + return 0; +} + +static int imx8m_power_domain_probe(struct udevice *dev) +{ + return 0; +} + +static int imx8m_power_domain_ofdata_to_platdata(struct udevice *dev) +{ + struct imx8m_power_domain_platdata *pdata = dev_get_platdata(dev); + + pdata->resource_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "reg", -1); + + if (!power_domain_get(dev, &pdata->pd)) + pdata->has_pd = 1; + + return 0; +} + +static const struct udevice_id imx8m_power_domain_ids[] = { + { .compatible = "fsl,imx8mq-gpc" }, + { } +}; + +struct power_domain_ops imx8m_power_domain_ops = { + .request = imx8m_power_domain_request, + .free = imx8m_power_domain_free, + .on = imx8m_power_domain_on, + .off = imx8m_power_domain_off, + .of_xlate = imx8m_power_domain_of_xlate, +}; + +U_BOOT_DRIVER(imx8m_power_domain) = { + .name = "imx8m_power_domain", + .id = UCLASS_POWER_DOMAIN, + .of_match = imx8m_power_domain_ids, + .bind = imx8m_power_domain_bind, + .probe = imx8m_power_domain_probe, + .ofdata_to_platdata = imx8m_power_domain_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct imx8m_power_domain_platdata), + .ops = &imx8m_power_domain_ops, +}; diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 6ec6f39..976f3a7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -127,4 +127,11 @@ config RESET_HISILICON help Support for reset controller on HiSilicon SoCs. +config RESET_IMX7 + bool "i.MX7/8 Reset Driver" + depends on DM_RESET && (ARCH_MX7 || ARCH_IMX8M) + default y + help + Support for reset controller on i.MX7/8 SoCs. + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 7fec75b..f5875fc 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -20,3 +20,4 @@ obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o +obj-$(CONFIG_RESET_IMX7) += reset-imx7.o diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c new file mode 100644 index 0000000..f2ca5cf --- /dev/null +++ b/drivers/reset/reset-imx7.c @@ -0,0 +1,312 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2017, Impinj, Inc. + */ + +#include <asm/io.h> +#include <common.h> +#include <dm.h> +#include <dt-bindings/reset/imx7-reset.h> +#include <dt-bindings/reset/imx8mq-reset.h> +#include <reset-uclass.h> + +struct imx7_reset_priv { + void __iomem *base; + struct reset_ops ops; +}; + +struct imx7_src_signal { + unsigned int offset, bit; +}; + +enum imx7_src_registers { + SRC_A7RCR0 = 0x0004, + SRC_M4RCR = 0x000c, + SRC_ERCR = 0x0014, + SRC_HSICPHY_RCR = 0x001c, + SRC_USBOPHY1_RCR = 0x0020, + SRC_USBOPHY2_RCR = 0x0024, + SRC_MIPIPHY_RCR = 0x0028, + SRC_PCIEPHY_RCR = 0x002c, + SRC_DDRC_RCR = 0x1000, +}; + +static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = { + [IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) }, + [IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) }, + [IMX7_RESET_A7_CORE_RESET0] = { SRC_A7RCR0, BIT(4) }, + [IMX7_RESET_A7_CORE_RESET1] = { SRC_A7RCR0, BIT(5) }, + [IMX7_RESET_A7_DBG_RESET0] = { SRC_A7RCR0, BIT(8) }, + [IMX7_RESET_A7_DBG_RESET1] = { SRC_A7RCR0, BIT(9) }, + [IMX7_RESET_A7_ETM_RESET0] = { SRC_A7RCR0, BIT(12) }, + [IMX7_RESET_A7_ETM_RESET1] = { SRC_A7RCR0, BIT(13) }, + [IMX7_RESET_A7_SOC_DBG_RESET] = { SRC_A7RCR0, BIT(20) }, + [IMX7_RESET_A7_L2RESET] = { SRC_A7RCR0, BIT(21) }, + [IMX7_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) }, + [IMX7_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) }, + [IMX7_RESET_EIM_RST] = { SRC_ERCR, BIT(0) }, + [IMX7_RESET_HSICPHY_PORT_RST] = { SRC_HSICPHY_RCR, BIT(1) }, + [IMX7_RESET_USBPHY1_POR] = { SRC_USBOPHY1_RCR, BIT(0) }, + [IMX7_RESET_USBPHY1_PORT_RST] = { SRC_USBOPHY1_RCR, BIT(1) }, + [IMX7_RESET_USBPHY2_POR] = { SRC_USBOPHY2_RCR, BIT(0) }, + [IMX7_RESET_USBPHY2_PORT_RST] = { SRC_USBOPHY2_RCR, BIT(1) }, + [IMX7_RESET_MIPI_PHY_MRST] = { SRC_MIPIPHY_RCR, BIT(1) }, + [IMX7_RESET_MIPI_PHY_SRST] = { SRC_MIPIPHY_RCR, BIT(2) }, + [IMX7_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) | BIT(1) }, + [IMX7_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, + [IMX7_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) }, + [IMX7_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) }, + [IMX7_RESET_DDRC_PRST] = { SRC_DDRC_RCR, BIT(0) }, + [IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) }, +}; + +static int imx7_reset_deassert_imx7(struct reset_ctl *rst) +{ + struct imx7_reset_priv *priv = dev_get_priv(rst->dev); + const struct imx7_src_signal *sig = imx7_src_signals; + u32 val; + + if (rst->id >= IMX7_RESET_NUM) + return -EINVAL; + + if (rst->id == IMX7_RESET_PCIEPHY) { + /* + * wait for more than 10us to release phy g_rst and + * btnrst + */ + udelay(10); + } + + val = readl(priv->base + sig[rst->id].offset); + switch (rst->id) { + case IMX7_RESET_PCIE_CTRL_APPS_EN: + val |= sig[rst->id].bit; + break; + default: + val &= ~sig[rst->id].bit; + break; + } + writel(val, priv->base + sig[rst->id].offset); + + return 0; +} + +static int imx7_reset_assert_imx7(struct reset_ctl *rst) +{ + struct imx7_reset_priv *priv = dev_get_priv(rst->dev); + const struct imx7_src_signal *sig = imx7_src_signals; + u32 val; + + if (rst->id >= IMX7_RESET_NUM) + return -EINVAL; + + val = readl(priv->base + sig[rst->id].offset); + switch (rst->id) { + case IMX7_RESET_PCIE_CTRL_APPS_EN: + val &= ~sig[rst->id].bit; + break; + default: + val |= sig[rst->id].bit; + break; + } + writel(val, priv->base + sig[rst->id].offset); + + return 0; +} + +enum imx8mq_src_registers { + SRC_A53RCR0 = 0x0004, + SRC_HDMI_RCR = 0x0030, + SRC_DISP_RCR = 0x0034, + SRC_GPU_RCR = 0x0040, + SRC_VPU_RCR = 0x0044, + SRC_PCIE2_RCR = 0x0048, + SRC_MIPIPHY1_RCR = 0x004c, + SRC_MIPIPHY2_RCR = 0x0050, + SRC_DDRC2_RCR = 0x1004, +}; + +static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = { + [IMX8MQ_RESET_A53_CORE_POR_RESET0] = { SRC_A53RCR0, BIT(0) }, + [IMX8MQ_RESET_A53_CORE_POR_RESET1] = { SRC_A53RCR0, BIT(1) }, + [IMX8MQ_RESET_A53_CORE_POR_RESET2] = { SRC_A53RCR0, BIT(2) }, + [IMX8MQ_RESET_A53_CORE_POR_RESET3] = { SRC_A53RCR0, BIT(3) }, + [IMX8MQ_RESET_A53_CORE_RESET0] = { SRC_A53RCR0, BIT(4) }, + [IMX8MQ_RESET_A53_CORE_RESET1] = { SRC_A53RCR0, BIT(5) }, + [IMX8MQ_RESET_A53_CORE_RESET2] = { SRC_A53RCR0, BIT(6) }, + [IMX8MQ_RESET_A53_CORE_RESET3] = { SRC_A53RCR0, BIT(7) }, + [IMX8MQ_RESET_A53_DBG_RESET0] = { SRC_A53RCR0, BIT(8) }, + [IMX8MQ_RESET_A53_DBG_RESET1] = { SRC_A53RCR0, BIT(9) }, + [IMX8MQ_RESET_A53_DBG_RESET2] = { SRC_A53RCR0, BIT(10) }, + [IMX8MQ_RESET_A53_DBG_RESET3] = { SRC_A53RCR0, BIT(11) }, + [IMX8MQ_RESET_A53_ETM_RESET0] = { SRC_A53RCR0, BIT(12) }, + [IMX8MQ_RESET_A53_ETM_RESET1] = { SRC_A53RCR0, BIT(13) }, + [IMX8MQ_RESET_A53_ETM_RESET2] = { SRC_A53RCR0, BIT(14) }, + [IMX8MQ_RESET_A53_ETM_RESET3] = { SRC_A53RCR0, BIT(15) }, + [IMX8MQ_RESET_A53_SOC_DBG_RESET] = { SRC_A53RCR0, BIT(20) }, + [IMX8MQ_RESET_A53_L2RESET] = { SRC_A53RCR0, BIT(21) }, + [IMX8MQ_RESET_SW_NON_SCLR_M4C_RST] = { SRC_M4RCR, BIT(0) }, + [IMX8MQ_RESET_OTG1_PHY_RESET] = { SRC_USBOPHY1_RCR, BIT(0) }, + [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) }, + [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) }, + [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) }, + [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) }, + [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) }, + [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) }, + [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, + BIT(2) | BIT(1) }, + [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, + [IMX8MQ_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) }, + [IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF] = { SRC_PCIEPHY_RCR, BIT(11) }, + [IMX8MQ_RESET_HDMI_PHY_APB_RESET] = { SRC_HDMI_RCR, BIT(0) }, + [IMX8MQ_RESET_DISP_RESET] = { SRC_DISP_RCR, BIT(0) }, + [IMX8MQ_RESET_GPU_RESET] = { SRC_GPU_RCR, BIT(0) }, + [IMX8MQ_RESET_VPU_RESET] = { SRC_VPU_RCR, BIT(0) }, + [IMX8MQ_RESET_PCIEPHY2] = { SRC_PCIE2_RCR, + BIT(2) | BIT(1) }, + [IMX8MQ_RESET_PCIEPHY2_PERST] = { SRC_PCIE2_RCR, BIT(3) }, + [IMX8MQ_RESET_PCIE2_CTRL_APPS_EN] = { SRC_PCIE2_RCR, BIT(6) }, + [IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF] = { SRC_PCIE2_RCR, BIT(11) }, + [IMX8MQ_RESET_MIPI_CSI1_CORE_RESET] = { SRC_MIPIPHY1_RCR, BIT(0) }, + [IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET] = { SRC_MIPIPHY1_RCR, BIT(1) }, + [IMX8MQ_RESET_MIPI_CSI1_ESC_RESET] = { SRC_MIPIPHY1_RCR, BIT(2) }, + [IMX8MQ_RESET_MIPI_CSI2_CORE_RESET] = { SRC_MIPIPHY2_RCR, BIT(0) }, + [IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET] = { SRC_MIPIPHY2_RCR, BIT(1) }, + [IMX8MQ_RESET_MIPI_CSI2_ESC_RESET] = { SRC_MIPIPHY2_RCR, BIT(2) }, + [IMX8MQ_RESET_DDRC1_PRST] = { SRC_DDRC_RCR, BIT(0) }, + [IMX8MQ_RESET_DDRC1_CORE_RESET] = { SRC_DDRC_RCR, BIT(1) }, + [IMX8MQ_RESET_DDRC1_PHY_RESET] = { SRC_DDRC_RCR, BIT(2) }, + [IMX8MQ_RESET_DDRC2_PHY_RESET] = { SRC_DDRC2_RCR, BIT(0) }, + [IMX8MQ_RESET_DDRC2_CORE_RESET] = { SRC_DDRC2_RCR, BIT(1) }, + [IMX8MQ_RESET_DDRC2_PRST] = { SRC_DDRC2_RCR, BIT(2) }, +}; + +static int imx7_reset_deassert_imx8mq(struct reset_ctl *rst) +{ + struct imx7_reset_priv *priv = dev_get_priv(rst->dev); + const struct imx7_src_signal *sig = imx8mq_src_signals; + u32 val; + + if (rst->id >= IMX8MQ_RESET_NUM) + return -EINVAL; + + if (rst->id == IMX8MQ_RESET_PCIEPHY || + rst->id == IMX8MQ_RESET_PCIEPHY2) { + /* + * wait for more than 10us to release phy g_rst and + * btnrst + */ + udelay(10); + } + + val = readl(priv->base + sig[rst->id].offset); + switch (rst->id) { + case IMX8MQ_RESET_PCIE_CTRL_APPS_EN: + case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */ + val |= sig[rst->id].bit; + break; + default: + val &= ~sig[rst->id].bit; + break; + } + writel(val, priv->base + sig[rst->id].offset); + + return 0; +} + +static int imx7_reset_assert_imx8mq(struct reset_ctl *rst) +{ + struct imx7_reset_priv *priv = dev_get_priv(rst->dev); + const struct imx7_src_signal *sig = imx8mq_src_signals; + u32 val; + + if (rst->id >= IMX8MQ_RESET_NUM) + return -EINVAL; + + val = readl(priv->base + sig[rst->id].offset); + switch (rst->id) { + case IMX8MQ_RESET_PCIE_CTRL_APPS_EN: + case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */ + case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */ + val &= ~sig[rst->id].bit; + break; + default: + val |= sig[rst->id].bit; + break; + } + writel(val, priv->base + sig[rst->id].offset); + + return 0; +} + +static int imx7_reset_assert(struct reset_ctl *rst) +{ + struct imx7_reset_priv *priv = dev_get_priv(rst->dev); + return priv->ops.rst_assert(rst); +} + +static int imx7_reset_deassert(struct reset_ctl *rst) +{ + struct imx7_reset_priv *priv = dev_get_priv(rst->dev); + return priv->ops.rst_deassert(rst); +} + +static int imx7_reset_free(struct reset_ctl *rst) +{ + return 0; +} + +static int imx7_reset_request(struct reset_ctl *rst) +{ + return 0; +} + +static const struct reset_ops imx7_reset_reset_ops = { + .request = imx7_reset_request, + .free = imx7_reset_free, + .rst_assert = imx7_reset_assert, + .rst_deassert = imx7_reset_deassert, +}; + +static const struct udevice_id imx7_reset_ids[] = { + { .compatible = "fsl,imx7d-src" }, + { .compatible = "fsl,imx8mq-src" }, + { } +}; + +static int imx7_reset_probe(struct udevice *dev) +{ + struct imx7_reset_priv *priv = dev_get_priv(dev); + + priv->base = dev_remap_addr(dev); + if (!priv->base) + return -ENOMEM; + + if (device_is_compatible(dev, "fsl,imx8mq-src")) { + priv->ops.rst_assert = imx7_reset_assert_imx8mq; + priv->ops.rst_deassert = imx7_reset_deassert_imx8mq; + } else if (device_is_compatible(dev, "fsl,imx7d-src")) { + priv->ops.rst_assert = imx7_reset_assert_imx7; + priv->ops.rst_deassert = imx7_reset_deassert_imx7; + } + + return 0; +} + +U_BOOT_DRIVER(imx7_reset) = { + .name = "imx7_reset", + .id = UCLASS_RESET, + .of_match = imx7_reset_ids, + .ops = &imx7_reset_reset_ops, + .probe = imx7_reset_probe, + .priv_auto_alloc_size = sizeof(struct imx7_reset_priv), +}; diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index ae2d819..d36a010 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -569,7 +569,7 @@ config MCFUART config MXC_UART bool "IMX serial port support" - depends on MX5 || MX6 + depends on MX5 || MX6 || MX7 || IMX8M help If you have a machine based on a Motorola IMX CPU you can enable its onboard serial port by enabling this option. diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 6cf2be8..754b6e9 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR; #define UART_MCRVAL (UART_MCR_DTR | \ UART_MCR_RTS) /* RTS/DTR */ -#ifndef CONFIG_DM_SERIAL +#if !CONFIG_IS_ENABLED(DM_SERIAL) #ifdef CONFIG_SYS_NS16550_PORT_MAPPED #define serial_out(x, y) outb(x, (ulong)y) #define serial_in(y) inb((ulong)y) @@ -86,7 +86,7 @@ static inline int serial_in_shift(void *addr, int shift) #endif } -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) #ifndef CONFIG_SYS_NS16550_CLK #define CONFIG_SYS_NS16550_CLK 0 @@ -301,7 +301,7 @@ DEBUG_UART_FUNCS #endif -#ifdef CONFIG_DM_SERIAL +#if CONFIG_IS_ENABLED(DM_SERIAL) static int ns16550_serial_putc(struct udevice *dev, const char ch) { struct NS16550 *const com_port = dev_get_priv(dev); @@ -440,36 +440,7 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) int err; /* try Processor Local Bus device first */ - addr = dev_read_addr(dev); -#if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI) - if (addr == FDT_ADDR_T_NONE) { - /* then try pci device */ - struct fdt_pci_addr pci_addr; - u32 bar; - int ret; - - /* we prefer to use a memory-mapped register */ - ret = fdtdec_get_pci_addr(gd->fdt_blob, dev_of_offset(dev), - FDT_PCI_SPACE_MEM32, "reg", - &pci_addr); - if (ret) { - /* try if there is any i/o-mapped register */ - ret = fdtdec_get_pci_addr(gd->fdt_blob, - dev_of_offset(dev), - FDT_PCI_SPACE_IO, - "reg", &pci_addr); - if (ret) - return ret; - } - - ret = fdtdec_get_pci_bar32(dev, &pci_addr, &bar); - if (ret) - return ret; - - addr = bar; - } -#endif - + addr = dev_read_addr_pci(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 33102fc..2f7bc24 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -220,6 +220,8 @@ static int sandbox_serial_ofdata_to_platdata(struct udevice *dev) const char *colour; int i; + if (CONFIG_IS_ENABLED(OF_PLATDATA)) + return 0; plat->colour = -1; colour = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "sandbox,text-colour", NULL); diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 41abe19..8e2a09d 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -19,14 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -#define RX_BUFFER_SIZE 0x80 -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \ - defined(CONFIG_MX6ULL) || defined(CONFIG_MX7D) -#define TX_BUFFER_SIZE 0x200 -#else -#define TX_BUFFER_SIZE 0x40 -#endif - #define OFFSET_BITS_MASK GENMASK(23, 0) #define FLASH_STATUS_WEL 0x02 @@ -85,6 +77,24 @@ DECLARE_GLOBAL_DATA_PTR; /* QSPI max chipselect signals number */ #define FSL_QSPI_MAX_CHIPSELECT_NUM 4 +/* Controller needs driver to swap endian */ +#define QUADSPI_QUIRK_SWAP_ENDIAN BIT(0) + +enum fsl_qspi_devtype { + FSL_QUADSPI_VYBRID, + FSL_QUADSPI_IMX6SX, + FSL_QUADSPI_IMX6UL_7D, + FSL_QUADSPI_IMX7ULP, +}; + +struct fsl_qspi_devtype_data { + enum fsl_qspi_devtype devtype; + u32 rxfifo; + u32 txfifo; + u32 ahb_buf_size; + u32 driver_data; +}; + /** * struct fsl_qspi_platdata - platform data for Freescale QSPI * @@ -133,8 +143,40 @@ struct fsl_qspi_priv { u32 flash_num; u32 num_chipselect; struct fsl_qspi_regs *regs; + struct fsl_qspi_devtype_data *devtype_data; +}; + +static const struct fsl_qspi_devtype_data vybrid_data = { + .devtype = FSL_QUADSPI_VYBRID, + .rxfifo = 128, + .txfifo = 64, + .ahb_buf_size = 1024, + .driver_data = QUADSPI_QUIRK_SWAP_ENDIAN, }; +static const struct fsl_qspi_devtype_data imx6sx_data = { + .devtype = FSL_QUADSPI_IMX6SX, + .rxfifo = 128, + .txfifo = 512, + .ahb_buf_size = 1024, + .driver_data = 0, +}; + +static const struct fsl_qspi_devtype_data imx6ul_7d_data = { + .devtype = FSL_QUADSPI_IMX6UL_7D, + .rxfifo = 128, + .txfifo = 512, + .ahb_buf_size = 1024, + .driver_data = 0, +}; + +static const struct fsl_qspi_devtype_data imx7ulp_data = { + .devtype = FSL_QUADSPI_IMX7ULP, + .rxfifo = 64, + .txfifo = 64, + .ahb_buf_size = 128, + .driver_data = 0, +}; static u32 qspi_read32(u32 flags, u32 *addr) { @@ -162,13 +204,12 @@ static inline int is_controller_busy(const struct fsl_qspi_priv *priv) /* QSPI support swapping the flash read/write data * in hardware for LS102xA, but not for VF610 */ -static inline u32 qspi_endian_xchg(u32 data) +static inline u32 qspi_endian_xchg(struct fsl_qspi_priv *priv, u32 data) { -#ifdef CONFIG_VF610 - return swab32(data); -#else - return data; -#endif + if (priv->devtype_data->driver_data & QUADSPI_QUIRK_SWAP_ENDIAN) + return swab32(data); + else + return data; } static void qspi_set_lut(struct fsl_qspi_priv *priv) @@ -210,7 +251,7 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv) #endif qspi_write32(priv->flags, ®s->lut[lut_base + 1], OPRND0(8) | PAD0(LUT_PAD1) | INSTR0(LUT_DUMMY) | - OPRND1(RX_BUFFER_SIZE) | PAD1(LUT_PAD1) | + OPRND1(priv->devtype_data->rxfifo) | PAD1(LUT_PAD1) | INSTR1(LUT_READ)); qspi_write32(priv->flags, ®s->lut[lut_base + 2], 0); qspi_write32(priv->flags, ®s->lut[lut_base + 3], 0); @@ -273,19 +314,9 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv) INSTR0(LUT_CMD) | OPRND1(ADDR32BIT) | PAD1(LUT_PAD1) | INSTR1(LUT_ADDR)); #endif -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || \ - defined(CONFIG_MX6ULL) || defined(CONFIG_MX7D) - /* - * To MX6SX, OPRND0(TX_BUFFER_SIZE) can not work correctly. - * So, Use IDATSZ in IPCR to determine the size and here set 0. - */ + /* Use IDATSZ in IPCR to determine the size and here set 0. */ qspi_write32(priv->flags, ®s->lut[lut_base + 1], OPRND0(0) | PAD0(LUT_PAD1) | INSTR0(LUT_WRITE)); -#else - qspi_write32(priv->flags, ®s->lut[lut_base + 1], - OPRND0(TX_BUFFER_SIZE) | - PAD0(LUT_PAD1) | INSTR0(LUT_WRITE)); -#endif qspi_write32(priv->flags, ®s->lut[lut_base + 2], 0); qspi_write32(priv->flags, ®s->lut[lut_base + 3], 0); @@ -399,7 +430,7 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len) qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); rx_addr = (void *)(uintptr_t)(priv->cur_amba_base + priv->sf_addr); /* Read out the data directly from the AHB buffer. */ @@ -427,8 +458,15 @@ static void qspi_enable_ddr_mode(struct fsl_qspi_priv *priv) reg |= QSPI_MCR_DDR_EN_MASK; /* Enable bit 29 for imx6sx */ reg |= BIT(29); - qspi_write32(priv->flags, ®s->mcr, reg); + + /* Enable the TDH to 1 for some platforms like imx6ul, imx7d, etc + * These two bits are reserved on other platforms + */ + reg = qspi_read32(priv->flags, ®s->flshcr); + reg &= ~(BIT(17)); + reg |= BIT(16); + qspi_write32(priv->flags, ®s->flshcr, reg); } /* @@ -453,7 +491,7 @@ static void qspi_init_ahb_read(struct fsl_qspi_priv *priv) qspi_write32(priv->flags, ®s->buf1cr, QSPI_BUFXCR_INVALID_MSTRID); qspi_write32(priv->flags, ®s->buf2cr, QSPI_BUFXCR_INVALID_MSTRID); qspi_write32(priv->flags, ®s->buf3cr, QSPI_BUF3CR_ALLMST_MASK | - (0x80 << QSPI_BUF3CR_ADATSZ_SHIFT)); + ((priv->devtype_data->ahb_buf_size >> 3) << QSPI_BUF3CR_ADATSZ_SHIFT)); /* We only use the buffer3 */ qspi_write32(priv->flags, ®s->buf0ind, 0); @@ -482,7 +520,7 @@ static void qspi_op_rdbank(struct fsl_qspi_priv *priv, u8 *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, ®s->mcr); qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, ®s->rbct, QSPI_RBCT_RXBRD_USEIPS); qspi_write32(priv->flags, ®s->sfar, priv->cur_amba_base); @@ -505,7 +543,7 @@ static void qspi_op_rdbank(struct fsl_qspi_priv *priv, u8 *rxbuf, u32 len) reg = qspi_read32(priv->flags, ®s->rbsr); if (reg & QSPI_RBSR_RDBFL_MASK) { data = qspi_read32(priv->flags, ®s->rbdr[0]); - data = qspi_endian_xchg(data); + data = qspi_endian_xchg(priv, data); memcpy(rxbuf, &data, len); qspi_write32(priv->flags, ®s->mcr, qspi_read32(priv->flags, ®s->mcr) | @@ -527,7 +565,7 @@ static void qspi_op_rdid(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, ®s->mcr); qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, ®s->rbct, QSPI_RBCT_RXBRD_USEIPS); qspi_write32(priv->flags, ®s->sfar, priv->cur_amba_base); @@ -538,13 +576,13 @@ static void qspi_op_rdid(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) ; i = 0; - while ((RX_BUFFER_SIZE >= len) && (len > 0)) { + while ((priv->devtype_data->rxfifo >= len) && (len > 0)) { WATCHDOG_RESET(); rbsr_reg = qspi_read32(priv->flags, ®s->rbsr); if (rbsr_reg & QSPI_RBSR_RDBFL_MASK) { data = qspi_read32(priv->flags, ®s->rbdr[i]); - data = qspi_endian_xchg(data); + data = qspi_endian_xchg(priv, data); size = (len < 4) ? len : 4; memcpy(rxbuf, &data, size); len -= size; @@ -573,7 +611,7 @@ static void qspi_op_read(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, ®s->mcr); qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, ®s->rbct, QSPI_RBCT_RXBRD_USEIPS); to_or_from = priv->sf_addr + priv->cur_amba_base; @@ -583,8 +621,8 @@ static void qspi_op_read(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) qspi_write32(priv->flags, ®s->sfar, to_or_from); - size = (len > RX_BUFFER_SIZE) ? - RX_BUFFER_SIZE : len; + size = (len > priv->devtype_data->rxfifo) ? + priv->devtype_data->rxfifo : len; qspi_write32(priv->flags, ®s->ipcr, (seqid << QSPI_IPCR_SEQID_SHIFT) | @@ -596,9 +634,9 @@ static void qspi_op_read(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len) len -= size; i = 0; - while ((RX_BUFFER_SIZE >= size) && (size > 0)) { + while ((priv->devtype_data->rxfifo >= size) && (size > 0)) { data = qspi_read32(priv->flags, ®s->rbdr[i]); - data = qspi_endian_xchg(data); + data = qspi_endian_xchg(priv, data); if (size < 4) memcpy(rxbuf, &data, size); else @@ -625,7 +663,7 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len) mcr_reg = qspi_read32(priv->flags, ®s->mcr); qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, ®s->rbct, QSPI_RBCT_RXBRD_USEIPS); status_reg = 0; @@ -645,7 +683,7 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len) reg = qspi_read32(priv->flags, ®s->rbsr); if (reg & QSPI_RBSR_RDBFL_MASK) { status_reg = qspi_read32(priv->flags, ®s->rbdr[0]); - status_reg = qspi_endian_xchg(status_reg); + status_reg = qspi_endian_xchg(priv, status_reg); } qspi_write32(priv->flags, ®s->mcr, qspi_read32(priv->flags, ®s->mcr) | @@ -667,8 +705,8 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len) qspi_write32(priv->flags, ®s->sfar, to_or_from); - tx_size = (len > TX_BUFFER_SIZE) ? - TX_BUFFER_SIZE : len; + tx_size = (len > priv->devtype_data->txfifo) ? + priv->devtype_data->txfifo : len; size = tx_size / 16; /* @@ -679,7 +717,7 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len) size++; for (i = 0; i < size * 4; i++) { memcpy(&data, txbuf, 4); - data = qspi_endian_xchg(data); + data = qspi_endian_xchg(priv, data); qspi_write32(priv->flags, ®s->tbdr, data); txbuf += 4; } @@ -700,7 +738,7 @@ static void qspi_op_rdsr(struct fsl_qspi_priv *priv, void *rxbuf, u32 len) mcr_reg = qspi_read32(priv->flags, ®s->mcr); qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, ®s->rbct, QSPI_RBCT_RXBRD_USEIPS); qspi_write32(priv->flags, ®s->sfar, priv->cur_amba_base); @@ -716,7 +754,7 @@ static void qspi_op_rdsr(struct fsl_qspi_priv *priv, void *rxbuf, u32 len) reg = qspi_read32(priv->flags, ®s->rbsr); if (reg & QSPI_RBSR_RDBFL_MASK) { data = qspi_read32(priv->flags, ®s->rbdr[0]); - data = qspi_endian_xchg(data); + data = qspi_endian_xchg(priv, data); memcpy(rxbuf, &data, len); qspi_write32(priv->flags, ®s->mcr, qspi_read32(priv->flags, ®s->mcr) | @@ -737,7 +775,7 @@ static void qspi_op_erase(struct fsl_qspi_priv *priv) mcr_reg = qspi_read32(priv->flags, ®s->mcr); qspi_write32(priv->flags, ®s->mcr, QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | - QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + mcr_reg); qspi_write32(priv->flags, ®s->rbct, QSPI_RBCT_RXBRD_USEIPS); to_or_from = priv->sf_addr + priv->cur_amba_base; @@ -859,15 +897,15 @@ void qspi_cfg_smpr(struct fsl_qspi_priv *priv, u32 clear_bits, u32 set_bits) static int fsl_qspi_child_pre_probe(struct udevice *dev) { struct spi_slave *slave = dev_get_parent_priv(dev); + struct fsl_qspi_priv *priv = dev_get_priv(dev_get_parent(dev)); - slave->max_write_size = TX_BUFFER_SIZE; + slave->max_write_size = priv->devtype_data->txfifo; return 0; } static int fsl_qspi_probe(struct udevice *bus) { - u32 mcr_val; u32 amba_size_per_chip; struct fsl_qspi_platdata *plat = dev_get_platdata(bus); struct fsl_qspi_priv *priv = dev_get_priv(bus); @@ -892,6 +930,19 @@ static int fsl_qspi_probe(struct udevice *bus) priv->flash_num = plat->flash_num; priv->num_chipselect = plat->num_chipselect; + priv->devtype_data = (struct fsl_qspi_devtype_data *)dev_get_driver_data(bus); + if (!priv->devtype_data) { + printf("ERROR : No devtype_data found\n"); + return -ENODEV; + } + + debug("devtype=%d, txfifo=%d, rxfifo=%d, ahb=%d, data=0x%x\n", + priv->devtype_data->devtype, + priv->devtype_data->txfifo, + priv->devtype_data->rxfifo, + priv->devtype_data->ahb_buf_size, + priv->devtype_data->driver_data); + /* make sure controller is not busy anywhere */ ret = is_controller_busy(priv); @@ -900,15 +951,9 @@ static int fsl_qspi_probe(struct udevice *bus) return ret; } - mcr_val = qspi_read32(priv->flags, &priv->regs->mcr); - - /* Set endianness to LE for i.mx */ - if (IS_ENABLED(CONFIG_MX6) || IS_ENABLED(CONFIG_MX7)) - mcr_val = QSPI_MCR_END_CFD_LE; - qspi_write32(priv->flags, &priv->regs->mcr, QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK | - (mcr_val & QSPI_MCR_END_CFD_MASK)); + QSPI_MCR_END_CFD_LE); qspi_cfg_smpr(priv, ~(QSPI_SMPR_FSDLY_MASK | QSPI_SMPR_DDRSMP_MASK | QSPI_SMPR_FSPHS_MASK | QSPI_SMPR_HSENA_MASK), 0); @@ -1104,10 +1149,11 @@ static const struct dm_spi_ops fsl_qspi_ops = { }; static const struct udevice_id fsl_qspi_ids[] = { - { .compatible = "fsl,vf610-qspi" }, - { .compatible = "fsl,imx6sx-qspi" }, - { .compatible = "fsl,imx6ul-qspi" }, - { .compatible = "fsl,imx7d-qspi" }, + { .compatible = "fsl,vf610-qspi", .data = (ulong)&vybrid_data }, + { .compatible = "fsl,imx6sx-qspi", .data = (ulong)&imx6sx_data }, + { .compatible = "fsl,imx6ul-qspi", .data = (ulong)&imx6ul_7d_data }, + { .compatible = "fsl,imx7d-qspi", .data = (ulong)&imx6ul_7d_data }, + { .compatible = "fsl,imx7ulp-qspi", .data = (ulong)&imx7ulp_data }, { } }; diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c index 3a9756f..58b1c67 100644 --- a/drivers/spi/mxs_spi.c +++ b/drivers/spi/mxs_spi.c @@ -57,7 +57,18 @@ static inline struct mxs_spi_slave *to_mxs_slave(struct spi_slave *slave) #else #include <dm.h> #include <errno.h> +#include <dt-structs.h> + +#ifdef CONFIG_MX28 +#define dtd_fsl_imx_spi dtd_fsl_imx28_spi +#else /* CONFIG_MX23 */ +#define dtd_fsl_imx_spi dtd_fsl_imx23_spi +#endif + struct mxs_spi_platdata { +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx_spi dtplat; +#endif s32 frequency; /* Default clock frequency, -1 for none */ fdt_addr_t base; /* SPI IP block base address */ int num_cs; /* Number of CSes supported */ @@ -430,11 +441,28 @@ static int mxs_spi_probe(struct udevice *bus) int ret; debug("%s: probe\n", __func__); + +#if CONFIG_IS_ENABLED(OF_PLATDATA) + struct dtd_fsl_imx_spi *dtplat = &plat->dtplat; + struct phandle_1_arg *p1a = &dtplat->clocks[0]; + + priv->regs = (struct mxs_ssp_regs *)dtplat->reg[0]; + priv->dma_channel = dtplat->dmas[1]; + priv->clk_id = p1a->arg[0]; + priv->max_freq = dtplat->spi_max_frequency; + plat->num_cs = dtplat->num_cs; + + debug("OF_PLATDATA: regs: 0x%x max freq: %d clkid: %d\n", + (unsigned int)priv->regs, priv->max_freq, priv->clk_id); +#else priv->regs = (struct mxs_ssp_regs *)plat->base; priv->max_freq = plat->frequency; priv->dma_channel = plat->dma_id; priv->clk_id = plat->clk_id; +#endif + + mxs_reset_block(&priv->regs->hw_ssp_ctrl0_reg); ret = mxs_dma_init_channel(priv->dma_channel); if (ret) { @@ -569,22 +597,26 @@ static int mxs_ofdata_to_platdata(struct udevice *bus) return 0; } -#endif static const struct udevice_id mxs_spi_ids[] = { { .compatible = "fsl,imx23-spi" }, { .compatible = "fsl,imx28-spi" }, { } }; +#endif U_BOOT_DRIVER(mxs_spi) = { - .name = "mxs_spi", +#ifdef CONFIG_MX28 + .name = "fsl_imx28_spi", +#else /* CONFIG_MX23 */ + .name = "fsl_imx23_spi", +#endif .id = UCLASS_SPI, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .of_match = mxs_spi_ids, .ofdata_to_platdata = mxs_ofdata_to_platdata, #endif - .priv_auto_alloc_size = sizeof(struct mxs_spi_platdata), + .platdata_auto_alloc_size = sizeof(struct mxs_spi_platdata), .ops = &mxs_spi_ops, .priv_auto_alloc_size = sizeof(struct mxs_spi_priv), .probe = mxs_spi_probe, diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index f565ae0..5e6293a 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -107,6 +107,18 @@ config SYSRESET_X86 help Reboot support for generic x86 processor reset. +config SYSRESET_SPL_X86 + bool "Enable support for x86 processor reboot driver in SPL" + depends on X86 + help + Reboot support for generic x86 processor reset in SPL. + +config SYSRESET_TPL_X86 + bool "Enable support for x86 processor reboot driver in TPL" + depends on X86 + help + Reboot support for generic x86 processor reset in TPL. + config SYSRESET_MCP83XX bool "Enable support MPC83xx SoC family reboot driver" help diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index cf01492..fff4a18 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -16,5 +16,5 @@ obj-$(CONFIG_SYSRESET_SOCFPGA_S10) += sysreset_socfpga_s10.o obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o -obj-$(CONFIG_SYSRESET_X86) += sysreset_x86.o +obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o diff --git a/drivers/sysreset/sysreset_x86.c b/drivers/sysreset/sysreset_x86.c index 072f794..8e2d1ea 100644 --- a/drivers/sysreset/sysreset_x86.c +++ b/drivers/sysreset/sysreset_x86.c @@ -6,11 +6,11 @@ */ #include <common.h> +#include <acpi_s3.h> #include <dm.h> #include <efi_loader.h> #include <pch.h> #include <sysreset.h> -#include <asm/acpi_s3.h> #include <asm/io.h> #include <asm/processor.h> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index a66a9bc..8c16d69 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -8,6 +8,15 @@ config WATCHDOG this option if you want to service enabled watchdog by U-Boot. Disable this option if you want U-Boot to start watchdog but never service it. +config WATCHDOG_TIMEOUT_MSECS + int "Watchdog timeout in msec" + default 128000 if ARCH_MX25 || ARCH_MX31 || ARCH_MX5 || ARCH_MX6 + default 128000 if ARCH_MX7 || ARCH_VF610 + default 30000 if ARCH_SOCFPGA + default 60000 + help + Watchdog timeout in msec + config HW_WATCHDOG bool diff --git a/arch/x86/include/asm/acpi_s3.h b/include/acpi_s3.h index baa848d..baa848d 100644 --- a/arch/x86/include/asm/acpi_s3.h +++ b/include/acpi_s3.h diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index c3bc394..5139b01 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -101,6 +101,7 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(USB, usb, 0) \ @@ -183,8 +184,7 @@ #endif #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \ - "setenv fdtfile ${fdt_file}; run distro_bootcmd ; " \ + "bootcmd=setenv fdtfile ${fdt_file}; run distro_bootcmd ; " \ "usb start ; " \ "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 67c52d7..d0a60c2 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -17,10 +17,6 @@ #define CONFIG_BOARD_LATE_INIT -/* Uncomment to enable secure boot support */ -/* #define CONFIG_SECURE_BOOT */ -#define CONFIG_CSF_SIZE 0x4000 - /* Network */ #define CONFIG_FEC_MXC #define CONFIG_FEC_XCV_TYPE RGMII diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 69a876f..ab98da6 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -79,6 +79,7 @@ CONFIG_MFG_ENV_SETTINGS \ M4_BOOT_ENV \ MEM_LAYOUT_ENV_SETTINGS \ + "boot_file=Image\0" \ "console=ttyLP3 earlycon\0" \ "fdt_addr=0x83000000\0" \ "fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index fa4dc49..69bf822 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -91,6 +91,7 @@ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ func(MMC, mmc, 1) \ func(USB, usb, 0) \ func(DHCP, dhcp, na) @@ -167,8 +168,7 @@ #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ BOOTENV \ - "bootcmd=run emmcboot ; echo ; echo emmcboot failed ; " \ - "setenv fdtfile ${fdt_file}; run distro_bootcmd ; " \ + "bootcmd=setenv fdtfile ${fdt_file}; run distro_bootcmd; " \ "usb start ; " \ "setenv stdout serial,vga ; setenv stdin serial,usbkbd\0" \ "boot_file=zImage\0" \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 4677e09..ade4df5 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -106,7 +106,8 @@ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x81000000\0" \ - "ramdisk_addr_r=0x82100000\0" + "ramdisk_addr_r=0x82100000\0" \ + "scriptaddr=0x82500000\0" #if defined(CONFIG_TARGET_COLIBRI_IMX7_NAND) #define SD_BOOTDEV 0 @@ -157,7 +158,7 @@ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ UBI_BOOTCMD #elif defined(CONFIG_TARGET_COLIBRI_IMX7_EMMC) -#define CONFIG_BOOTCOMMAND "run emmcboot ; echo ; echo emmcboot failed ; " \ +#define CONFIG_BOOTCOMMAND \ "setenv fdtfile ${soc}-colibri-emmc-${fdt_board}.dtb && run distro_bootcmd;" #define MODULE_EXTRA_ENV_SETTINGS \ "variant=-emmc\0" \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index c516e6e..a854d0b 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -88,7 +88,6 @@ #endif /* Watchdog */ -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/display5.h b/include/configs/display5.h index e503e4a..d806415 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -35,8 +35,11 @@ * 0x1540000 - 0x1640000 : SPI.factory (1MiB) */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SPI_FLASH_MTD +/* SPI Flash Configs */ +#if defined(CONFIG_SPL_BUILD) +#undef CONFIG_DM_SPI +#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_SPI_FLASH_MTD #endif /* Below values are "dummy" - only to avoid build break */ @@ -57,23 +60,7 @@ #define CONFIG_MXC_UART_BASE UART5_BASE /* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 -#define CONFIG_SYS_I2C_MXC_I2C2 -#define CONFIG_SYS_I2C_MXC_I2C3 #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_I2C_EDID -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 - -/* Ethernet */ -#ifdef CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 -#endif /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -354,7 +341,11 @@ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Watchdog */ -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 15000 +#if defined(CONFIG_SPL_BUILD) +#undef CONFIG_WDT +#undef CONFIG_WATCHDOG +#define CONFIG_HW_WATCHDOG +#endif /* ENV config */ #ifdef CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 31214a6..6de5119 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -28,8 +28,6 @@ #define CONFIG_REVISION_TAG #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 6000 - #define CONFIG_MXC_UART /* SATA Configs */ diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 212dee7..a223930 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -7,10 +7,32 @@ #define __IMX6_SPL_CONFIG_H #ifdef CONFIG_SPL + +#ifdef CONFIG_MX6_OCRAM_256KB /* - * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals: + * see Figure 8.4.1 in IMX6DQ Reference manuals: + * - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF + * - BOOT ROM stack is at 0x0093FFB8 + * - if icache/dcache is enabled (eFuse/strapping controlled) then the + * IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to + * fit between 0x00907000 and 0x00938000. + * - Additionally the BOOT ROM loads what they consider the firmware image + * which consists of a 4K header in front of us that contains the IVT, DCD + * and some padding thus 'our' max size is really 0x00908000 - 0x00938000 + * or 192KB + */ +#define CONFIG_SPL_MAX_SIZE 0x30000 +#define CONFIG_SPL_STACK 0x0093FFB8 +/* + * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the + * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a + * boot media (given that boot media specific offset is configured properly). + */ +#define CONFIG_SPL_PAD_TO 0x31000 +#else +/* + * see Figure 8-3 in IMX6SDL Reference manuals: * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF - * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well * - BOOT ROM stack is at 0x0091FFB8 * - if icache/dcache is enabled (eFuse/strapping controlled) then the * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to @@ -29,6 +51,8 @@ */ #define CONFIG_SPL_PAD_TO 0x11000 +#endif + /* MMC support */ #if defined(CONFIG_SPL_MMC_SUPPORT) #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h new file mode 100644 index 0000000..a9d99ec --- /dev/null +++ b/include/configs/imx8mm_evk.h @@ -0,0 +1,153 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 NXP + */ + +#ifndef __IMX8MM_EVK_H +#define __IMX8MM_EVK_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SECURE_BOOT +#define CONFIG_CSF_SIZE SZ_8K +#endif + +#define CONFIG_SPL_MAX_SIZE (148 * 1024) +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_STACK 0x920000 +#define CONFIG_SPL_BSS_START_ADDR 0x910000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x930000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=Image.itb\0" \ + "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200\0" \ + "fdt_addr=0x43000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "boot_fit=try\0" \ + "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "initrd_addr=0x43800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ + "bootm ${loadaddr}; " \ + "else " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ + "bootm ${loadaddr}; " \ + "else " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "fi;" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x40480000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_ENV_OVERWRITE +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (64 * SZ_64K) +#endif +#define CONFIG_ENV_SIZE SZ_4K +#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC2 */ +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_32M + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) + +#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR + +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* USDHC */ +#define CONFIG_FSL_USDHC + +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +#define CONFIG_SYS_I2C_SPEED 100000 + +#endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 1ceec5a..d4d8d20 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -9,10 +9,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CSF_SIZE 0x2000 /* 8K region */ -#endif - #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index 7a790ef..8690351 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -64,7 +64,7 @@ "fdt_addr=0x83000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "boot_fdt=try\0" \ - "fdt_file=fsl-imx8qxp-mek.dtb\0" \ + "fdt_file=imx8qm-mek.dtb\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index c357c7b..872805c 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -13,7 +13,7 @@ #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x250 +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index 2435ebb..c160ad5 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -60,7 +60,6 @@ #endif /* Watchdog */ -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 49f11ea..113e844 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -153,7 +153,6 @@ #define CONFIG_FSL_IIM /* Watchdog */ -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 /* * Boot Linux diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index b734b82..65a5993 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -163,8 +163,18 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -/* environment organization */ -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +/* Environment starts at 768k = 768 * 1024 = 786432 */ +#define CONFIG_ENV_OFFSET 786432 +/* + * Detect overlap between U-Boot image and environment area in build-time + * + * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.imx offset + * CONFIG_BOARD_SIZE_LIMIT = 768k - 1k = 767k = 785408 + * + * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so + * write the direct value here + */ +#define CONFIG_BOARD_SIZE_LIMIT 785408 #define CONFIG_ENV_SIZE (8 * 1024) #define CONFIG_SYS_MMC_ENV_DEV 0 diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index d5b54df..59988ef 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -22,8 +22,6 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 8000 - #define CONFIG_BOARD_LATE_INIT #define CONFIG_REVISION_TAG diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index f6c0e21..07b1e06 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -56,12 +56,8 @@ /* MMC */ -/* Secure boot (HAB) support */ -#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CSF_SIZE 0x4000 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #endif -#endif #endif diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index fb8f446..b96e631 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -10,12 +10,6 @@ #include "mx6_common.h" -#ifdef CONFIG_SECURE_BOOT -#ifndef CONFIG_CSF_SIZE -#define CONFIG_CSF_SIZE 0x4000 -#endif -#endif - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 42e5115..87f8869 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -60,6 +60,7 @@ "fdt_addr=0x83000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ + "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \ "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ @@ -196,7 +197,7 @@ #define CONFIG_IMX_THERMAL #ifndef CONFIG_SPL_BUILD -#ifdef CONFIG_VIDEO +#if defined(CONFIG_DM_VIDEO) #define CONFIG_VIDEO_MXS #define CONFIG_VIDEO_LOGO #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 1fc5c24..3bcd0d3 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -13,12 +13,6 @@ #include "mx6_common.h" #include <asm/mach-imx/gpio.h> -#ifdef CONFIG_SECURE_BOOT -#ifndef CONFIG_CSF_SIZE -#define CONFIG_CSF_SIZE 0x4000 -#endif -#endif - #define PHYS_SDRAM_SIZE SZ_512M /* Size of malloc() pool */ @@ -55,7 +49,7 @@ "console=ttymxc0\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ - "fdt_file=imx6ull-14x14-evk.dtb\0" \ + "fdt_file=undefined\0" \ "fdt_addr=0x83000000\0" \ "boot_fdt=try\0" \ "ip_dyn=yes\0" \ @@ -87,6 +81,16 @@ "else " \ "bootz; " \ "fi;\0" \ + "findfdt="\ + "if test $fdt_file = undefined; then " \ + "if test $board_name = ULZ-EVK && test $board_rev = 14X14; then " \ + "setenv fdt_file imx6ulz-14x14-evk.dtb; fi; " \ + "if test $board_name = EVK && test $board_rev = 14X14; then " \ + "setenv fdt_file imx6ull-14x14-evk.dtb; fi; " \ + "if test $fdt_file = undefined; then " \ + "echo WARNING: Could not determine dtb to use; " \ + "fi; " \ + "fi;\0" \ "netargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/nfs " \ "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ @@ -113,6 +117,7 @@ "fi;\0" \ #define CONFIG_BOOTCOMMAND \ + "run findfdt;" \ "mmc dev ${mmcdev};" \ "mmc dev ${mmcdev}; if mmc rescan; then " \ "if run loadbootscript; then " \ diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 70dda35..b6ded77 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -45,13 +45,9 @@ #define CONFIG_ARMV7_PSCI_1_0 -/* Secure boot (HAB) support */ -#ifdef CONFIG_SECURE_BOOT -#define CONFIG_CSF_SIZE 0x4000 #ifdef CONFIG_SPL_BUILD #define CONFIG_SPL_DRIVERS_MISC_SUPPORT #endif -#endif /* * If we have defined the OPTEE ram size and not OPTEE it means that we were diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 763a46b..3b02362 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,15 +11,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -/*Uncomment it to use secure boot*/ -/*#define CONFIG_SECURE_BOOT*/ - -#ifdef CONFIG_SECURE_BOOT -#ifndef CONFIG_CSF_SIZE -#define CONFIG_CSF_SIZE 0x4000 -#endif -#endif - #define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 6cadd72..e079f80 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -45,7 +45,7 @@ /* SPL */ #ifndef CONFIG_SPL_FRAMEWORK -#define CONFIG_SPL_NO_CPU_SUPPORT_CODE +#define CONFIG_SPL_NO_CPU_SUPPORT #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" #endif diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h new file mode 100644 index 0000000..5bbb9ea --- /dev/null +++ b/include/configs/pico-imx6.h @@ -0,0 +1,164 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * Configuration settings for the pico-imx6 board. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" + +#include "imx6_spl.h" + +#ifdef CONFIG_SPL_OS_BOOT +/* Falcon Mode */ +#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" +#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 + +/* Falcon Mode - MMC support: args@1MB kernel@2MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ +#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) +#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ +#endif + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART1_BASE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) + +/* MMC Configuration */ +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CONFIG_SUPPORT_EMMC_BOOT +#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE + +/* USB Configs */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +#define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M +#define DFU_DEFAULT_POLL_TIMEOUT 300 + +#define CONFIG_DFU_ENV_SETTINGS \ + "dfu_alt_info=" \ + "spl raw 0x2 0x400;" \ + "u-boot raw 0x8a 0x1000;" \ + "/boot/zImage ext4 0 1;" \ + "rootfs part 0 1\0" \ + +#define BOOTMENU_ENV \ + "bootmenu_0=Boot using PICO-Hobbit baseboard=" \ + "setenv baseboard hobbit; saveenv; run base_boot\0" \ + "bootmenu_1=Boot using PICO-Pi baseboard=" \ + "setenv baseboard pi; saveenv; run base_boot\0" \ + "bootmenu_2=Boot using PICO-Dwarf baseboard=" \ + "setenv baseboard dwarf; saveenv; run base_boot\0" \ + "bootmenu_3=Boot using PICO-Nymph baseboard=" \ + "setenv baseboard nymph; saveenv; run base_boot\0" \ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc0\0" \ + "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + BOOTMENU_ENV \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "fdt_addr_r=0x18000000\0" \ + "fdt_addr=0x18000000\0" \ + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ + CONFIG_DFU_ENV_SETTINGS \ + "finduuid=part uuid mmc 0:1 uuid\0" \ + "findfdt="\ + "if test $baseboard = hobbit && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-pico-hobbit.dtb; fi; " \ + "if test $baseboard = pi && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-pico-pi.dtb; fi; " \ + "if test $baseboard = dwarf && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-pico-dwarf.dtb; fi; " \ + "if test $baseboard = nymph && test $board_rev = MX6Q ; then " \ + "setenv fdtfile imx6q-pico-nymph.dtb; fi; " \ + "if test $baseboard = hobbit && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-pico-hobbit.dtb; fi; " \ + "if test $baseboard = pi && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-pico-pi.dtb; fi; " \ + "if test $baseboard = dwarf && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-pico-dwarf.dtb; fi; " \ + "if test $baseboard = nymph && test $board_rev = MX6DL ; then " \ + "setenv fdtfile imx6dl-pico-nymph.dtb; fi; " \ + "if test $fdtfile = ask; then " \ + "echo WARNING: Could not determine dtb to use; fi; \0" \ + "default_boot=" \ + "if test $baseboard = ask ; then " \ + "bootmenu -1; " \ + "else " \ + "run base_boot;" \ + "fi; \0" \ + "base_boot=run findfdt; run finduuid; run distro_bootcmd\0" \ + "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ + "ramdisk_addr_r=0x13000000\0" \ + "ramdiskaddr=0x13000000\0" \ + "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ + BOOTENV + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) + +#include <config_distro_bootcmd.h> + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Environment organization */ +#define CONFIG_ENV_SIZE (8 * 1024) + +/* Environment starts at 768k = 768 * 1024 = 786432 */ +#define CONFIG_ENV_OFFSET 786432 +/* + * Detect overlap between U-Boot image and environment area in build-time + * + * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.img offset + * CONFIG_BOARD_SIZE_LIMIT = 768k - 69k = 699k = 715776 + * + * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so + * write the direct value here + */ +#define CONFIG_BOARD_SIZE_LIMIT 715776 +#define CONFIG_SYS_MMC_ENV_DEV 0 + +/* Ethernet Configuration */ +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 1 +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +/* Framebuffer */ +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +#endif /* __CONFIG_H * */ diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index cd051bf..22dfac7 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -63,9 +63,11 @@ "rootfs part 0 1\0" \ #define BOOTMENU_ENV \ - "bootmenu_0=Boot using PICO-Hobbit baseboard=" \ + "bootmenu_0=Boot using PICO-Dwarf baseboard=" \ + "setenv fdtfile imx6ul-pico-dwarf.dtb\0" \ + "bootmenu_1=Boot using PICO-Hobbit baseboard=" \ "setenv fdtfile imx6ul-pico-hobbit.dtb\0" \ - "bootmenu_1=Boot using PICO-Pi baseboard=" \ + "bootmenu_2=Boot using PICO-Pi baseboard=" \ "setenv fdtfile imx6ul-pico-pi.dtb\0" \ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 @@ -73,10 +75,12 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ + "splashpos=m,m\0" \ "console=ttymxc5\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ + "videomode=video=ctfb:x:800,y:480,depth:24,mode:0,pclk:30000,le:46,ri:210,up:22,lo:23,hs:20,vs:10,sync:0,vmode:0\0" \ BOOTMENU_ENV \ "fdt_addr=0x83000000\0" \ "fdt_addr_r=0x83000000\0" \ @@ -132,9 +136,32 @@ /* environment organization */ #define CONFIG_ENV_SIZE SZ_8K -#define CONFIG_ENV_OFFSET (8 * SZ_64K) +/* Environment starts at 768k = 768 * 1024 = 786432 */ +#define CONFIG_ENV_OFFSET 786432 +/* + * Detect overlap between U-Boot image and environment area in build-time + * + * CONFIG_BOARD_SIZE_LIMIT = CONFIG_ENV_OFFSET - u-boot.img offset + * CONFIG_BOARD_SIZE_LIMIT = 768k - 69k = 699k = 715776 + * + * Currently CONFIG_BOARD_SIZE_LIMIT does not handle expressions, so + * write the direct value here + */ +#define CONFIG_BOARD_SIZE_LIMIT 715776 + #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 0 +#ifdef CONFIG_VIDEO +#define CONFIG_VIDEO_MXS +#define CONFIG_VIDEO_LOGO +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_VIDEO_BMP_LOGO +#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR +#endif + #endif /* __PICO_IMX6UL_CONFIG_H */ diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 9101540..5c4b90a 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -70,7 +70,11 @@ #define PICO_BOOT_ENV \ "bootmenu_0=Boot using PICO-Hobbit baseboard=" \ "setenv fdtfile imx7d-pico-hobbit.dtb\0" \ - "bootmenu_1=Boot using PICO-Pi baseboard=" \ + "bootmenu_1=Boot using PICO-Dwarf baseboard=" \ + "setenv fdtfile imx7d-pico-dwarf.dtb\0" \ + "bootmenu_2=Boot using PICO-Nymph baseboard=" \ + "setenv fdtfile imx7d-pico-nymph.dtb\0" \ + "bootmenu_3=Boot using PICO-Pi baseboard=" \ "setenv fdtfile imx7d-pico-pi.dtb\0" \ BOOTENV #endif @@ -81,6 +85,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "splashpos=m,m\0" \ + "splashimage=" __stringify(CONFIG_LOADADDR) "\0" \ "console=ttymxc4\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ @@ -163,7 +168,7 @@ #define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 -#ifdef CONFIG_VIDEO +#ifdef CONFIG_DM_VIDEO #define CONFIG_VIDEO_MXS #define CONFIG_VIDEO_LOGO #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h new file mode 100644 index 0000000..5f89ae4 --- /dev/null +++ b/include/configs/sam9x60ek.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuation settings for the SAM9X60EK board. + * + * Copyright (C) 2018 Microchip Technology Inc. and its subsidiaries + * + * Author: Sandeep Sheriker M <sandeep.sheriker@microchip.com> + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +/* ARM asynchronous clock */ +#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* 24 MHz crystal */ + +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_SKIP_LOWLEVEL_INIT + +#define CONFIG_USART_BASE ATMEL_BASE_DBGU +#define CONFIG_USART_ID 0 /* ignored in arm */ + +/* general purpose I/O */ +#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE + +/* + * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) + * NB: in this case, USB 1.1 devices won't be recognized. + */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 /* 256 megs */ + +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) + +/* NAND flash */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_ATMEL +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_MASK_ALE BIT(21) +#define CONFIG_SYS_NAND_MASK_CLE BIT(22) +#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 +#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 +#define CONFIG_SYS_NAND_ONFI_DETECTION + +#define CONFIG_MTD_DEVICE +#endif + +/* PMECC & PMERRLOC */ +#define CONFIG_ATMEL_NAND_HWECC +#define CONFIG_ATMEL_NAND_HW_PMECC +#define CONFIG_PMECC_CAP 8 +#define CONFIG_PMECC_SECTOR_SIZE 512 + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +#ifdef CONFIG_SD_BOOT +/* bootstrap + u-boot + env + linux in sd card */ +#define CONFIG_BOOTCOMMAND \ + "fatload mmc 0:1 0x21000000 at91-sam9x60ek.dtb;" \ + "fatload mmc 0:1 0x22000000 zImage;" \ + "bootz 0x22000000 - 0x21000000" + +#elif defined(CONFIG_NAND_BOOT) +/* bootstrap + u-boot + env + linux in nandflash */ +#define CONFIG_ENV_OFFSET_REDUND 0x100000 +#define CONFIG_BOOTCOMMAND "nand read " \ + "0x22000000 0x200000 0x600000; " \ + "nand read 0x21000000 0x180000 0x20000; " \ + "bootz 0x22000000 - 0x21000000" + +#elif defined(CONFIG_QSPI_BOOT) +/* bootstrap + u-boot + env + linux in SPI NOR flash */ +#define CONFIG_BOOTCOMMAND "sf probe 0; " \ + "sf read 0x21000000 0x180000 0x80000; " \ + "sf read 0x22000000 0x200000 0x600000; " \ + "bootz 0x22000000 - 0x21000000" +#endif + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) + +#endif diff --git a/include/configs/sama5d27_wlsom1_ek.h b/include/configs/sama5d27_wlsom1_ek.h new file mode 100644 index 0000000..6bcbc06 --- /dev/null +++ b/include/configs/sama5d27_wlsom1_ek.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA5D27 WLSOM1 EK Board. + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Nicolas Ferre <nicolas.ferre@microcihp.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "at91-sama5_common.h" + +#undef CONFIG_SYS_AT91_MAIN_CLOCK +#define CONFIG_SYS_AT91_MAIN_CLOCK 24000000 /* from 24 MHz crystal */ + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x10000000 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_INIT_SP_ADDR 0x218000 +#else +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#endif + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +/* SPL */ +#define CONFIG_SPL_TEXT_BASE 0x200000 +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_BSS_START_ADDR 0x20000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 + +#define CONFIG_SYS_MONITOR_LEN (512 << 10) + +#ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#endif + +#endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index b11fe02..94268ed 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -108,7 +108,6 @@ #define CONFIG_DESIGNWARE_WATCHDOG #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000 -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 #endif /* diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 7b55dd1..8e6ecf4 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -168,7 +168,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); unsigned int cm_get_l4_sys_free_clk_hz(void); #define CONFIG_DW_WDT_CLOCK_KHZ (cm_get_l4_sys_free_clk_hz() / 1000) #endif -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 3000 #endif /* diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index 34f000f..0af52e5 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -17,7 +17,6 @@ #define CONSOLE_DEV "ttymxc3" /* Watchdog */ -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 60000 /* Config on-board RTC */ #define CONFIG_RTC_DS1337 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 8faf5f0..a0a78ea 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -40,14 +40,6 @@ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 -/* Ethernet Configuration */ -#define CONFIG_FEC_MXC -#define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 1 -#define CONFIG_PHY_ATHEROS - /* Framebuffer */ #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN diff --git a/include/configs/warp.h b/include/configs/warp.h index 5345f53..41fd6c7 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -25,7 +25,6 @@ #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* Watchdog */ -#define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */ #define CONFIG_SYS_MEMTEST_START 0x80000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_256M) diff --git a/include/dm/device.h b/include/dm/device.h index 27a6d7b..d121042 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -680,6 +680,15 @@ static inline bool device_is_on_pci_bus(struct udevice *dev) list_for_each_entry_safe(pos, next, &parent->child_head, sibling_node) /** + * device_foreach_child() - iterate through child devices + * + * @pos: struct udevice * for the current device + * @parent: parent device to scan + */ +#define device_foreach_child(pos, parent) \ + list_for_each_entry(pos, &parent->child_head, sibling_node) + +/** * dm_scan_fdt_dev() - Bind child device in a the device tree * * This handles device which have sub-nodes in the device tree. It scans all diff --git a/include/dm/fdtaddr.h b/include/dm/fdtaddr.h index 57b326c..959d3bc 100644 --- a/include/dm/fdtaddr.h +++ b/include/dm/fdtaddr.h @@ -138,4 +138,12 @@ fdt_addr_t devfdt_get_addr_name(struct udevice *dev, const char *name); fdt_addr_t devfdt_get_addr_size_name(struct udevice *dev, const char *name, fdt_size_t *size); +/** + * devfdt_get_addr_pci() - Read an address and handle PCI address translation + * + * @dev: Device to read from + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t devfdt_get_addr_pci(struct udevice *dev); + #endif diff --git a/include/dm/read.h b/include/dm/read.h index 803daf7..d37fcb5 100644 --- a/include/dm/read.h +++ b/include/dm/read.h @@ -249,6 +249,26 @@ fdt_addr_t dev_read_addr(struct udevice *dev); void *dev_read_addr_ptr(struct udevice *dev); /** + * dev_read_addr_pci() - Read an address and handle PCI address translation + * + * At present U-Boot does not have address translation logic for PCI in the + * livetree implementation (of_addr.c). This special function supports this for + * the flat tree implementation. + * + * This function should be removed (and code should use dev_read() instead) + * once: + * + * 1. PCI address translation is added; and either + * 2. everything uses livetree where PCI translation is used (which is feasible + * in SPL and U-Boot proper) or PCI address translation is added to + * fdtdec_get_addr() and friends. + * + * @dev: Device to read from + * @return address or FDT_ADDR_T_NONE if not found + */ +fdt_addr_t dev_read_addr_pci(struct udevice *dev); + +/** * dev_remap_addr() - Get the reg property of a device as a * memory-mapped I/O pointer * @@ -691,6 +711,11 @@ static inline void *dev_read_addr_ptr(struct udevice *dev) return devfdt_get_addr_ptr(dev); } +static inline fdt_addr_t dev_read_addr_pci(struct udevice *dev) +{ + return devfdt_get_addr_pci(dev); +} + static inline void *dev_remap_addr(struct udevice *dev) { return devfdt_remap_addr(dev); diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index d4d9610..f431f3b 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -23,6 +23,7 @@ enum uclass_id { UCLASS_I2C_EMUL, /* sandbox I2C device emulator */ UCLASS_I2C_EMUL_PARENT, /* parent for I2C device emulators */ UCLASS_PCI_EMUL, /* sandbox PCI device emulator */ + UCLASS_PCI_EMUL_PARENT, /* parent for PCI device emulators */ UCLASS_USB_EMUL, /* sandbox USB bus device emulator */ UCLASS_AXI_EMUL, /* sandbox AXI bus device emulator */ diff --git a/include/dm/uclass-internal.h b/include/dm/uclass-internal.h index 6977995..6e3f15c 100644 --- a/include/dm/uclass-internal.h +++ b/include/dm/uclass-internal.h @@ -69,7 +69,7 @@ int uclass_find_device(enum uclass_id id, int index, struct udevice **devp); * The device is not prepared for use - this is an internal function. * The function uclass_get_device_tail() can be used to probe the device. * - * @return 0 if OK (found or not found), -1 on error + * @return 0 if OK (found or not found), -ve on error */ int uclass_find_first_device(enum uclass_id id, struct udevice **devp); @@ -81,7 +81,7 @@ int uclass_find_first_device(enum uclass_id id, struct udevice **devp); * The device is not prepared for use - this is an internal function. * The function uclass_get_device_tail() can be used to probe the device. * - * @return 0 if OK (found or not found), -1 on error + * @return 0 if OK (found or not found), -ve on error */ int uclass_find_next_device(struct udevice **devp); diff --git a/include/dt-bindings/clock/imx6ul-clock.h b/include/dt-bindings/clock/imx6ul-clock.h index 4623f17..7909433 100644 --- a/include/dt-bindings/clock/imx6ul-clock.h +++ b/include/dt-bindings/clock/imx6ul-clock.h @@ -1,10 +1,6 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ /* - * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * + * Copyright (C) 2015 Freescale Semiconductor, Inc. */ #ifndef __DT_BINDINGS_CLOCK_IMX6UL_H @@ -105,7 +101,7 @@ #define IMX6UL_CLK_LDB_DI1_DIV_SEL 92 #define IMX6UL_CLK_ARM 93 #define IMX6UL_CLK_PERIPH_CLK2 94 -#define IMX6UL_CLK_PERIPH2_CLK2 95 +#define IMX6UL_CLK_PERIPH2_CLK2 95 #define IMX6UL_CLK_AHB 96 #define IMX6UL_CLK_MMDC_PODF 97 #define IMX6UL_CLK_AXI_PODF 98 @@ -235,20 +231,32 @@ #define IMX6UL_CLK_CSI_PODF 222 #define IMX6UL_CLK_PLL3_120M 223 #define IMX6UL_CLK_KPP 224 -/* For i.MX6ULL */ -#define IMX6UL_CLK_ESAI_SEL 224 -#define IMX6UL_CLK_ESAI_PRED 225 -#define IMX6UL_CLK_ESAI_PODF 226 -#define IMX6UL_CLK_ESAI_EXTAL 227 -#define IMX6UL_CLK_ESAI_MEM 228 -#define IMX6UL_CLK_ESAI_IPG 229 -#define IMX6UL_CLK_DCP_CLK 230 -#define IMX6UL_CLK_EPDC_PRE_SEL 231 -#define IMX6UL_CLK_EPDC_SEL 232 -#define IMX6UL_CLK_EPDC_PODF 233 -#define IMX6UL_CLK_EPDC_ACLK 234 -#define IMX6UL_CLK_EPDC_PIX 235 +#define IMX6ULL_CLK_ESAI_PRED 225 +#define IMX6ULL_CLK_ESAI_PODF 226 +#define IMX6ULL_CLK_ESAI_EXTAL 227 +#define IMX6ULL_CLK_ESAI_MEM 228 +#define IMX6ULL_CLK_ESAI_IPG 229 +#define IMX6ULL_CLK_DCP_CLK 230 +#define IMX6ULL_CLK_EPDC_PRE_SEL 231 +#define IMX6ULL_CLK_EPDC_SEL 232 +#define IMX6ULL_CLK_EPDC_PODF 233 +#define IMX6ULL_CLK_EPDC_ACLK 234 +#define IMX6ULL_CLK_EPDC_PIX 235 +#define IMX6ULL_CLK_ESAI_SEL 236 +#define IMX6UL_CLK_CKO1_SEL 237 +#define IMX6UL_CLK_CKO1_PODF 238 +#define IMX6UL_CLK_CKO1 239 +#define IMX6UL_CLK_CKO2_SEL 240 +#define IMX6UL_CLK_CKO2_PODF 241 +#define IMX6UL_CLK_CKO2 242 +#define IMX6UL_CLK_CKO 243 +#define IMX6UL_CLK_GPIO1 244 +#define IMX6UL_CLK_GPIO2 245 +#define IMX6UL_CLK_GPIO3 246 +#define IMX6UL_CLK_GPIO4 247 +#define IMX6UL_CLK_GPIO5 248 +#define IMX6UL_CLK_MMDC_P1_IPG 249 -#define IMX6UL_CLK_END 236 +#define IMX6UL_CLK_END 250 #endif /* __DT_BINDINGS_CLOCK_IMX6UL_H */ diff --git a/include/dt-bindings/clock/imx8mm-clock.h b/include/dt-bindings/clock/imx8mm-clock.h new file mode 100644 index 0000000..07e6c68 --- /dev/null +++ b/include/dt-bindings/clock/imx8mm-clock.h @@ -0,0 +1,253 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright 2017-2018 NXP + */ + +#ifndef __DT_BINDINGS_CLOCK_IMX8MM_H +#define __DT_BINDINGS_CLOCK_IMX8MM_H + +#define IMX8MM_CLK_DUMMY 0 +#define IMX8MM_CLK_32K 1 +#define IMX8MM_CLK_24M 2 +#define IMX8MM_OSC_HDMI_CLK 3 +#define IMX8MM_CLK_EXT1 4 +#define IMX8MM_CLK_EXT2 5 +#define IMX8MM_CLK_EXT3 6 +#define IMX8MM_CLK_EXT4 7 +#define IMX8MM_AUDIO_PLL1_REF_SEL 8 +#define IMX8MM_AUDIO_PLL2_REF_SEL 9 +#define IMX8MM_VIDEO_PLL1_REF_SEL 10 +#define IMX8MM_DRAM_PLL_REF_SEL 11 +#define IMX8MM_GPU_PLL_REF_SEL 12 +#define IMX8MM_VPU_PLL_REF_SEL 13 +#define IMX8MM_ARM_PLL_REF_SEL 14 +#define IMX8MM_SYS_PLL1_REF_SEL 15 +#define IMX8MM_SYS_PLL2_REF_SEL 16 +#define IMX8MM_SYS_PLL3_REF_SEL 17 +#define IMX8MM_AUDIO_PLL1 18 +#define IMX8MM_AUDIO_PLL2 19 +#define IMX8MM_VIDEO_PLL1 20 +#define IMX8MM_DRAM_PLL 21 +#define IMX8MM_GPU_PLL 22 +#define IMX8MM_VPU_PLL 23 +#define IMX8MM_ARM_PLL 24 +#define IMX8MM_SYS_PLL1 25 +#define IMX8MM_SYS_PLL2 26 +#define IMX8MM_SYS_PLL3 27 +#define IMX8MM_AUDIO_PLL1_BYPASS 28 +#define IMX8MM_AUDIO_PLL2_BYPASS 29 +#define IMX8MM_VIDEO_PLL1_BYPASS 30 +#define IMX8MM_DRAM_PLL_BYPASS 31 +#define IMX8MM_GPU_PLL_BYPASS 32 +#define IMX8MM_VPU_PLL_BYPASS 33 +#define IMX8MM_ARM_PLL_BYPASS 34 +#define IMX8MM_SYS_PLL1_BYPASS 35 +#define IMX8MM_SYS_PLL2_BYPASS 36 +#define IMX8MM_SYS_PLL3_BYPASS 37 +#define IMX8MM_AUDIO_PLL1_OUT 38 +#define IMX8MM_AUDIO_PLL2_OUT 39 +#define IMX8MM_VIDEO_PLL1_OUT 40 +#define IMX8MM_DRAM_PLL_OUT 41 +#define IMX8MM_GPU_PLL_OUT 42 +#define IMX8MM_VPU_PLL_OUT 43 +#define IMX8MM_ARM_PLL_OUT 44 +#define IMX8MM_SYS_PLL1_OUT 45 +#define IMX8MM_SYS_PLL2_OUT 46 +#define IMX8MM_SYS_PLL3_OUT 47 +#define IMX8MM_SYS_PLL1_40M 48 +#define IMX8MM_SYS_PLL1_80M 49 +#define IMX8MM_SYS_PLL1_100M 50 +#define IMX8MM_SYS_PLL1_133M 51 +#define IMX8MM_SYS_PLL1_160M 52 +#define IMX8MM_SYS_PLL1_200M 53 +#define IMX8MM_SYS_PLL1_266M 54 +#define IMX8MM_SYS_PLL1_400M 55 +#define IMX8MM_SYS_PLL1_800M 56 +#define IMX8MM_SYS_PLL2_50M 57 +#define IMX8MM_SYS_PLL2_100M 58 +#define IMX8MM_SYS_PLL2_125M 59 +#define IMX8MM_SYS_PLL2_166M 60 +#define IMX8MM_SYS_PLL2_200M 61 +#define IMX8MM_SYS_PLL2_250M 62 +#define IMX8MM_SYS_PLL2_333M 63 +#define IMX8MM_SYS_PLL2_500M 64 +#define IMX8MM_SYS_PLL2_1000M 65 + +/* core */ +#define IMX8MM_CLK_A53_SRC 66 +#define IMX8MM_CLK_M4_SRC 67 +#define IMX8MM_CLK_VPU_SRC 68 +#define IMX8MM_CLK_GPU3D_SRC 69 +#define IMX8MM_CLK_GPU2D_SRC 70 +#define IMX8MM_CLK_A53_CG 71 +#define IMX8MM_CLK_M4_CG 72 +#define IMX8MM_CLK_VPU_CG 73 +#define IMX8MM_CLK_GPU3D_CG 74 +#define IMX8MM_CLK_GPU2D_CG 75 +#define IMX8MM_CLK_A53_DIV 76 +#define IMX8MM_CLK_M4_DIV 77 +#define IMX8MM_CLK_VPU_DIV 78 +#define IMX8MM_CLK_GPU3D_DIV 79 +#define IMX8MM_CLK_GPU2D_DIV 80 + +/* bus */ +#define IMX8MM_CLK_MAIN_AXI 81 +#define IMX8MM_CLK_ENET_AXI 82 +#define IMX8MM_CLK_NAND_USDHC_BUS 83 +#define IMX8MM_CLK_VPU_BUS 84 +#define IMX8MM_CLK_DISP_AXI 85 +#define IMX8MM_CLK_DISP_APB 86 +#define IMX8MM_CLK_DISP_RTRM 87 +#define IMX8MM_CLK_USB_BUS 88 +#define IMX8MM_CLK_GPU_AXI 89 +#define IMX8MM_CLK_GPU_AHB 90 +#define IMX8MM_CLK_NOC 91 +#define IMX8MM_CLK_NOC_APB 92 + +#define IMX8MM_CLK_AHB 93 +#define IMX8MM_CLK_AUDIO_AHB 94 +#define IMX8MM_CLK_IPG_ROOT 95 +#define IMX8MM_CLK_IPG_AUDIO_ROOT 96 + +#define IMX8MM_CLK_DRAM_ALT 97 +#define IMX8MM_CLK_DRAM_APB 98 +#define IMX8MM_CLK_VPU_G1 99 +#define IMX8MM_CLK_VPU_G2 100 +#define IMX8MM_CLK_DISP_DTRC 101 +#define IMX8MM_CLK_DISP_DC8000 102 +#define IMX8MM_CLK_PCIE1_CTRL 103 +#define IMX8MM_CLK_PCIE1_PHY 104 +#define IMX8MM_CLK_PCIE1_AUX 105 +#define IMX8MM_CLK_DC_PIXEL 106 +#define IMX8MM_CLK_LCDIF_PIXEL 107 +#define IMX8MM_CLK_SAI1 108 +#define IMX8MM_CLK_SAI2 109 +#define IMX8MM_CLK_SAI3 110 +#define IMX8MM_CLK_SAI4 111 +#define IMX8MM_CLK_SAI5 112 +#define IMX8MM_CLK_SAI6 113 +#define IMX8MM_CLK_SPDIF1 114 +#define IMX8MM_CLK_SPDIF2 115 +#define IMX8MM_CLK_ENET_REF 116 +#define IMX8MM_CLK_ENET_TIMER 117 +#define IMX8MM_CLK_ENET_PHY_REF 118 +#define IMX8MM_CLK_NAND 119 +#define IMX8MM_CLK_QSPI 120 +#define IMX8MM_CLK_USDHC1 121 +#define IMX8MM_CLK_USDHC2 122 +#define IMX8MM_CLK_I2C1 123 +#define IMX8MM_CLK_I2C2 124 +#define IMX8MM_CLK_I2C3 125 +#define IMX8MM_CLK_I2C4 126 +#define IMX8MM_CLK_UART1 127 +#define IMX8MM_CLK_UART2 128 +#define IMX8MM_CLK_UART3 129 +#define IMX8MM_CLK_UART4 130 +#define IMX8MM_CLK_USB_CORE_REF 131 +#define IMX8MM_CLK_USB_PHY_REF 132 +#define IMX8MM_CLK_ECSPI1 133 +#define IMX8MM_CLK_ECSPI2 134 +#define IMX8MM_CLK_PWM1 135 +#define IMX8MM_CLK_PWM2 136 +#define IMX8MM_CLK_PWM3 137 +#define IMX8MM_CLK_PWM4 138 +#define IMX8MM_CLK_GPT1 139 +#define IMX8MM_CLK_WDOG 140 +#define IMX8MM_CLK_WRCLK 141 +#define IMX8MM_CLK_DSI_CORE 142 +#define IMX8MM_CLK_DSI_PHY_REF 143 +#define IMX8MM_CLK_DSI_DBI 144 +#define IMX8MM_CLK_USDHC3 145 +#define IMX8MM_CLK_CSI1_CORE 146 +#define IMX8MM_CLK_CSI1_PHY_REF 147 +#define IMX8MM_CLK_CSI1_ESC 148 +#define IMX8MM_CLK_CSI2_CORE 149 +#define IMX8MM_CLK_CSI2_PHY_REF 150 +#define IMX8MM_CLK_CSI2_ESC 151 +#define IMX8MM_CLK_PCIE2_CTRL 152 +#define IMX8MM_CLK_PCIE2_PHY 153 +#define IMX8MM_CLK_PCIE2_AUX 154 +#define IMX8MM_CLK_ECSPI3 155 +#define IMX8MM_CLK_PDM 156 +#define IMX8MM_CLK_VPU_H1 157 +#define IMX8MM_CLK_CLKO1 158 + +#define IMX8MM_CLK_ECSPI1_ROOT 159 +#define IMX8MM_CLK_ECSPI2_ROOT 160 +#define IMX8MM_CLK_ECSPI3_ROOT 161 +#define IMX8MM_CLK_ENET1_ROOT 162 +#define IMX8MM_CLK_GPT1_ROOT 163 +#define IMX8MM_CLK_I2C1_ROOT 164 +#define IMX8MM_CLK_I2C2_ROOT 165 +#define IMX8MM_CLK_I2C3_ROOT 166 +#define IMX8MM_CLK_I2C4_ROOT 167 +#define IMX8MM_CLK_OCOTP_ROOT 168 +#define IMX8MM_CLK_PCIE1_ROOT 169 +#define IMX8MM_CLK_PWM1_ROOT 170 +#define IMX8MM_CLK_PWM2_ROOT 171 +#define IMX8MM_CLK_PWM3_ROOT 172 +#define IMX8MM_CLK_PWM4_ROOT 173 +#define IMX8MM_CLK_QSPI_ROOT 174 +#define IMX8MM_CLK_NAND_ROOT 175 +#define IMX8MM_CLK_SAI1_ROOT 176 +#define IMX8MM_CLK_SAI1_IPG 177 +#define IMX8MM_CLK_SAI2_ROOT 178 +#define IMX8MM_CLK_SAI2_IPG 179 +#define IMX8MM_CLK_SAI3_ROOT 180 +#define IMX8MM_CLK_SAI3_IPG 181 +#define IMX8MM_CLK_SAI4_ROOT 182 +#define IMX8MM_CLK_SAI4_IPG 183 +#define IMX8MM_CLK_SAI5_ROOT 184 +#define IMX8MM_CLK_SAI5_IPG 185 +#define IMX8MM_CLK_SAI6_ROOT 186 +#define IMX8MM_CLK_SAI6_IPG 187 +#define IMX8MM_CLK_UART1_ROOT 188 +#define IMX8MM_CLK_UART2_ROOT 189 +#define IMX8MM_CLK_UART3_ROOT 190 +#define IMX8MM_CLK_UART4_ROOT 191 +#define IMX8MM_CLK_USB1_CTRL_ROOT 192 +#define IMX8MM_CLK_GPU3D_ROOT 193 +#define IMX8MM_CLK_USDHC1_ROOT 194 +#define IMX8MM_CLK_USDHC2_ROOT 195 +#define IMX8MM_CLK_WDOG1_ROOT 196 +#define IMX8MM_CLK_WDOG2_ROOT 197 +#define IMX8MM_CLK_WDOG3_ROOT 198 +#define IMX8MM_CLK_VPU_G1_ROOT 199 +#define IMX8MM_CLK_GPU_BUS_ROOT 200 +#define IMX8MM_CLK_VPU_H1_ROOT 201 +#define IMX8MM_CLK_VPU_G2_ROOT 202 +#define IMX8MM_CLK_PDM_ROOT 203 +#define IMX8MM_CLK_DISP_ROOT 204 +#define IMX8MM_CLK_DISP_AXI_ROOT 205 +#define IMX8MM_CLK_DISP_APB_ROOT 206 +#define IMX8MM_CLK_DISP_RTRM_ROOT 207 +#define IMX8MM_CLK_USDHC3_ROOT 208 +#define IMX8MM_CLK_TMU_ROOT 209 +#define IMX8MM_CLK_VPU_DEC_ROOT 210 +#define IMX8MM_CLK_SDMA1_ROOT 211 +#define IMX8MM_CLK_SDMA2_ROOT 212 +#define IMX8MM_CLK_SDMA3_ROOT 213 +#define IMX8MM_CLK_GPT_3M 214 +#define IMX8MM_CLK_ARM 215 +#define IMX8MM_CLK_PDM_IPG 216 +#define IMX8MM_CLK_GPU2D_ROOT 217 +#define IMX8MM_CLK_MU_ROOT 218 +#define IMX8MM_CLK_CSI1_ROOT 219 + +#define IMX8MM_CLK_DRAM_CORE 220 +#define IMX8MM_CLK_DRAM_ALT_ROOT 221 + +#define IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK 222 + +#define IMX8MM_CLK_GPIO1_ROOT 223 +#define IMX8MM_CLK_GPIO2_ROOT 224 +#define IMX8MM_CLK_GPIO3_ROOT 225 +#define IMX8MM_CLK_GPIO4_ROOT 226 +#define IMX8MM_CLK_GPIO5_ROOT 227 + +#define IMX8MM_CLK_SNVS_ROOT 228 +#define IMX8MM_CLK_GIC 229 + +#define IMX8MM_CLK_END 230 + +#endif diff --git a/include/dt-bindings/power/imx8mq-power.h b/include/dt-bindings/power/imx8mq-power.h new file mode 100755 index 0000000..8a513bd --- /dev/null +++ b/include/dt-bindings/power/imx8mq-power.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ +/* + * Copyright (C) 2018 Pengutronix, Lucas Stach <kernel@pengutronix.de> + */ + +#ifndef __DT_BINDINGS_IMX8MQ_POWER_H__ +#define __DT_BINDINGS_IMX8MQ_POWER_H__ + +#define IMX8M_POWER_DOMAIN_MIPI 0 +#define IMX8M_POWER_DOMAIN_PCIE1 1 +#define IMX8M_POWER_DOMAIN_USB_OTG1 2 +#define IMX8M_POWER_DOMAIN_USB_OTG2 3 +#define IMX8M_POWER_DOMAIN_DDR1 4 +#define IMX8M_POWER_DOMAIN_GPU 5 +#define IMX8M_POWER_DOMAIN_VPU 6 +#define IMX8M_POWER_DOMAIN_DISP 7 +#define IMX8M_POWER_DOMAIN_MIPI_CSI1 8 +#define IMX8M_POWER_DOMAIN_MIPI_CSI2 9 +#define IMX8M_POWER_DOMAIN_PCIE2 10 + +#endif diff --git a/include/dt-bindings/reset/imx7-reset.h b/include/dt-bindings/reset/imx7-reset.h new file mode 100644 index 0000000..bb92452 --- /dev/null +++ b/include/dt-bindings/reset/imx7-reset.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2017 Impinj, Inc. + * + * Author: Andrey Smirnov <andrew.smirnov@gmail.com> + */ + +#ifndef DT_BINDING_RESET_IMX7_H +#define DT_BINDING_RESET_IMX7_H + +#define IMX7_RESET_A7_CORE_POR_RESET0 0 +#define IMX7_RESET_A7_CORE_POR_RESET1 1 +#define IMX7_RESET_A7_CORE_RESET0 2 +#define IMX7_RESET_A7_CORE_RESET1 3 +#define IMX7_RESET_A7_DBG_RESET0 4 +#define IMX7_RESET_A7_DBG_RESET1 5 +#define IMX7_RESET_A7_ETM_RESET0 6 +#define IMX7_RESET_A7_ETM_RESET1 7 +#define IMX7_RESET_A7_SOC_DBG_RESET 8 +#define IMX7_RESET_A7_L2RESET 9 +#define IMX7_RESET_SW_M4C_RST 10 +#define IMX7_RESET_SW_M4P_RST 11 +#define IMX7_RESET_EIM_RST 12 +#define IMX7_RESET_HSICPHY_PORT_RST 13 +#define IMX7_RESET_USBPHY1_POR 14 +#define IMX7_RESET_USBPHY1_PORT_RST 15 +#define IMX7_RESET_USBPHY2_POR 16 +#define IMX7_RESET_USBPHY2_PORT_RST 17 +#define IMX7_RESET_MIPI_PHY_MRST 18 +#define IMX7_RESET_MIPI_PHY_SRST 19 + +/* + * IMX7_RESET_PCIEPHY is a logical reset line combining PCIEPHY_BTN + * and PCIEPHY_G_RST + */ +#define IMX7_RESET_PCIEPHY 20 +#define IMX7_RESET_PCIEPHY_PERST 21 + +/* + * IMX7_RESET_PCIE_CTRL_APPS_EN is not strictly a reset line, but it + * can be used to inhibit PCIe LTTSM, so, in a way, it can be thoguht + * of as one + */ +#define IMX7_RESET_PCIE_CTRL_APPS_EN 22 +#define IMX7_RESET_DDRC_PRST 23 +#define IMX7_RESET_DDRC_CORE_RST 24 + +#define IMX7_RESET_PCIE_CTRL_APPS_TURNOFF 25 + +#define IMX7_RESET_NUM 26 + +#endif diff --git a/include/dt-bindings/reset/imx8mq-reset.h b/include/dt-bindings/reset/imx8mq-reset.h new file mode 100755 index 0000000..9a30108 --- /dev/null +++ b/include/dt-bindings/reset/imx8mq-reset.h @@ -0,0 +1,64 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 Zodiac Inflight Innovations + * + * Author: Andrey Smirnov <andrew.smirnov@gmail.com> + */ + +#ifndef DT_BINDING_RESET_IMX8MQ_H +#define DT_BINDING_RESET_IMX8MQ_H + +#define IMX8MQ_RESET_A53_CORE_POR_RESET0 0 +#define IMX8MQ_RESET_A53_CORE_POR_RESET1 1 +#define IMX8MQ_RESET_A53_CORE_POR_RESET2 2 +#define IMX8MQ_RESET_A53_CORE_POR_RESET3 3 +#define IMX8MQ_RESET_A53_CORE_RESET0 4 +#define IMX8MQ_RESET_A53_CORE_RESET1 5 +#define IMX8MQ_RESET_A53_CORE_RESET2 6 +#define IMX8MQ_RESET_A53_CORE_RESET3 7 +#define IMX8MQ_RESET_A53_DBG_RESET0 8 +#define IMX8MQ_RESET_A53_DBG_RESET1 9 +#define IMX8MQ_RESET_A53_DBG_RESET2 10 +#define IMX8MQ_RESET_A53_DBG_RESET3 11 +#define IMX8MQ_RESET_A53_ETM_RESET0 12 +#define IMX8MQ_RESET_A53_ETM_RESET1 13 +#define IMX8MQ_RESET_A53_ETM_RESET2 14 +#define IMX8MQ_RESET_A53_ETM_RESET3 15 +#define IMX8MQ_RESET_A53_SOC_DBG_RESET 16 +#define IMX8MQ_RESET_A53_L2RESET 17 +#define IMX8MQ_RESET_SW_NON_SCLR_M4C_RST 18 +#define IMX8MQ_RESET_OTG1_PHY_RESET 19 +#define IMX8MQ_RESET_OTG2_PHY_RESET 20 +#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21 +#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22 +#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23 +#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24 +#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25 +#define IMX8MQ_RESET_PCIEPHY 26 +#define IMX8MQ_RESET_PCIEPHY_PERST 27 +#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28 +#define IMX8MQ_RESET_PCIE_CTRL_APPS_TURNOFF 29 +#define IMX8MQ_RESET_HDMI_PHY_APB_RESET 30 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_DISP_RESET 31 +#define IMX8MQ_RESET_GPU_RESET 32 +#define IMX8MQ_RESET_VPU_RESET 33 +#define IMX8MQ_RESET_PCIEPHY2 34 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_PCIEPHY2_PERST 35 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_PCIE2_CTRL_APPS_EN 36 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_PCIE2_CTRL_APPS_TURNOFF 37 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_CORE_RESET 38 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET 39 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI1_ESC_RESET 40 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_CORE_RESET 41 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET 42 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_MIPI_CSI2_ESC_RESET 43 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_DDRC1_PRST 44 +#define IMX8MQ_RESET_DDRC1_CORE_RESET 45 +#define IMX8MQ_RESET_DDRC1_PHY_RESET 46 +#define IMX8MQ_RESET_DDRC2_PRST 47 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_DDRC2_CORE_RESET 48 /* i.MX8MM does NOT support */ +#define IMX8MQ_RESET_DDRC2_PHY_RESET 49 /* i.MX8MM does NOT support */ + +#define IMX8MQ_RESET_NUM 50 + +#endif diff --git a/include/ec_commands.h b/include/ec_commands.h index 392c1f1..444ba61 100644 --- a/include/ec_commands.h +++ b/include/ec_commands.h @@ -71,6 +71,10 @@ #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ +/* MEC uses 0x800/0x804 as register/index pair, thus an 8-byte resource */ +#define MEC_EMI_BASE 0x800 +#define MEC_EMI_SIZE 8 + #define EC_LPC_ADDR_MEMMAP 0x900 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ #define EC_MEMMAP_TEXT_MAX 8 /* Size of a string in the memory map */ diff --git a/include/efi_api.h b/include/efi_api.h index 37e56da..2239617 100644 --- a/include/efi_api.h +++ b/include/efi_api.h @@ -422,6 +422,7 @@ struct efi_device_path_acpi_path { # define DEVICE_PATH_SUB_TYPE_MSG_USB 0x05 # define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR 0x0b # define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS 0x0f +# define DEVICE_PATH_SUB_TYPE_MSG_NVME 0x17 # define DEVICE_PATH_SUB_TYPE_MSG_SD 0x1a # define DEVICE_PATH_SUB_TYPE_MSG_MMC 0x1d @@ -464,6 +465,12 @@ struct efi_device_path_sd_mmc_path { u8 slot_number; } __packed; +struct efi_device_path_nvme { + struct efi_device_path dp; + u32 ns_id; + u8 eui64[8]; +} __packed; + #define DEVICE_PATH_TYPE_MEDIA_DEVICE 0x04 # define DEVICE_PATH_SUB_TYPE_HARD_DRIVE_PATH 0x01 # define DEVICE_PATH_SUB_TYPE_CDROM_PATH 0x02 diff --git a/include/efi_loader.h b/include/efi_loader.h index 53b3699..381da80 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -12,6 +12,11 @@ #include <part_efi.h> #include <efi_api.h> +static inline int guidcmp(const void *g1, const void *g2) +{ + return memcmp(g1, g2, sizeof(efi_guid_t)); +} + /* No need for efi loader support in SPL */ #if CONFIG_IS_ENABLED(EFI_LOADER) @@ -563,11 +568,6 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr, (((_dp)->type == DEVICE_PATH_TYPE_##_type) && \ ((_dp)->sub_type == DEVICE_PATH_SUB_TYPE_##_subtype)) -static inline int guidcmp(const void *g1, const void *g2) -{ - return memcmp(g1, g2, sizeof(efi_guid_t)); -} - /* * Use these to indicate that your code / data should go into the EFI runtime * section and thus still be available when the OS is running diff --git a/include/fdtdec.h b/include/fdtdec.h index 635f530..f1e58f9 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -417,23 +417,6 @@ fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, const char *prop_name, fdt_size_t *sizep); /** - * Look at an address property in a node and return the pci address which - * corresponds to the given type in the form of fdt_pci_addr. - * The property must hold one fdt_pci_addr with a lengh. - * - * @param blob FDT blob - * @param node node to examine - * @param type pci address type (FDT_PCI_SPACE_xxx) - * @param prop_name name of property to find - * @param addr returns pci address in the form of fdt_pci_addr - * @return 0 if ok, -ENOENT if the property did not exist, -EINVAL if the - * format of the property was invalid, -ENXIO if the requested - * address type was not found - */ -int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, - const char *prop_name, struct fdt_pci_addr *addr); - -/** * Look at the compatible property of a device node that represents a PCI * device and extract pci vendor id and device id from it. * diff --git a/include/handoff.h b/include/handoff.h index aacb0f5..75d19b1 100644 --- a/include/handoff.h +++ b/include/handoff.h @@ -31,6 +31,19 @@ struct spl_handoff { void handoff_save_dram(struct spl_handoff *ho); void handoff_load_dram_size(struct spl_handoff *ho); void handoff_load_dram_banks(struct spl_handoff *ho); + +/** + * handoff_arch_save() - Save arch-specific info into the handoff area + * + * This is defined to an empty function by default, but arch-specific code can + * define it to write to spi_handoff->arch. It is called from + * write_spl_handoff(). + * + * @ho: Handoff area to fill in + * @return 0 if OK, -ve on error + */ +int handoff_arch_save(struct spl_handoff *ho); + #endif #endif diff --git a/include/imx_sip.h b/include/imx_sip.h index fbb6c5e..139ff61 100644 --- a/include/imx_sip.h +++ b/include/imx_sip.h @@ -6,6 +6,9 @@ #ifndef _IMX_SIP_H__ #define _IMX_SIP_H_ +#define IMX_SIP_GPC 0xC2000000 +#define IMX_SIP_GPC_PM_DOMAIN 0x03 + #define IMX_SIP_SRC 0xC2000005 #define IMX_SIP_SRC_M4_START 0x00 #define IMX_SIP_SRC_M4_STARTED 0x01 diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 709b49d..f9964a7 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -246,7 +246,13 @@ enum spi_nor_option_flags { */ struct flash_info; -/* TODO: Remove, once all users of spi_flash interface are moved to MTD */ +/* + * TODO: Remove, once all users of spi_flash interface are moved to MTD + * + * struct spi_flash { + * Defined below (keep this text to enable searching for spi_flash decl) + * } + */ #define spi_flash spi_nor /** diff --git a/include/log.h b/include/log.h index 6d15e95..d8f18a6 100644 --- a/include/log.h +++ b/include/log.h @@ -76,6 +76,18 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, int line, const char *func, const char *fmt, ...) __attribute__ ((format (__printf__, 6, 7))); +static inline int _log_nop(enum log_category_t cat, enum log_level_t level, + const char *file, int line, const char *func, + const char *fmt, ...) + __attribute__ ((format (__printf__, 6, 7))); + +static inline int _log_nop(enum log_category_t cat, enum log_level_t level, + const char *file, int line, const char *func, + const char *fmt, ...) +{ + return 0; +} + /* Define this at the top of a file to add a prefix to debug messages */ #ifndef pr_fmt #define pr_fmt(fmt) fmt @@ -101,13 +113,14 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, #define log_io(_fmt...) log(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #else #define _LOG_MAX_LEVEL LOGL_INFO -#define log_err(_fmt...) -#define log_warning(_fmt...) -#define log_notice(_fmt...) -#define log_info(_fmt...) -#define log_debug(_fmt...) -#define log_content(_fmt...) -#define log_io(_fmt...) +#define log_err(_fmt...) log_nop(LOG_CATEGORY, LOGL_ERR, ##_fmt) +#define log_warning(_fmt...) log_nop(LOG_CATEGORY, LOGL_WARNING, ##_fmt) +#define log_notice(_fmt...) log_nop(LOG_CATEGORY, LOGL_NOTICE, ##_fmt) +#define log_info(_fmt...) log_nop(LOG_CATEGORY, LOGL_INFO, ##_fmt) +#define log_debug(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG, ##_fmt) +#define log_content(_fmt...) log_nop(LOG_CATEGORY, \ + LOGL_DEBUG_CONTENT, ##_fmt) +#define log_io(_fmt...) log_nop(LOG_CATEGORY, LOGL_DEBUG_IO, ##_fmt) #endif #if CONFIG_IS_ENABLED(LOG) @@ -129,6 +142,12 @@ int _log(enum log_category_t cat, enum log_level_t level, const char *file, #define log(_cat, _level, _fmt, _args...) #endif +#define log_nop(_cat, _level, _fmt, _args...) ({ \ + int _l = _level; \ + _log_nop((enum log_category_t)(_cat), _l, __FILE__, __LINE__, \ + __func__, pr_fmt(_fmt), ##_args); \ +}) + #ifdef DEBUG #define _DEBUG 1 #else diff --git a/include/ns16550.h b/include/ns16550.h index 22b89e4..701efee 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -52,6 +52,7 @@ * @reg_width: IO accesses size of registers (in bytes) * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) * @clock: UART base clock speed in Hz + * @bdf: PCI slot/function (pci_dev_t) */ struct ns16550_platdata { unsigned long base; @@ -60,6 +61,9 @@ struct ns16550_platdata { int reg_offset; int clock; u32 fcr; +#if defined(CONFIG_PCI) && defined(CONFIG_SPL) + int bdf; +#endif }; struct udevice; diff --git a/include/nvme.h b/include/nvme.h index 2c3d14d..2cdf8ce 100644 --- a/include/nvme.h +++ b/include/nvme.h @@ -78,4 +78,16 @@ int nvme_scan_namespace(void); */ int nvme_print_info(struct udevice *udev); +/** + * nvme_get_namespace_id - return namespace identifier + * + * This returns the namespace identifier. + * + * @udev: NVMe controller device + * @ns_id: Place where to put the name space identifier + * @eui64: Place where to put the IEEE Extended Unique Identifier + * @return: 0 on success, -ve on error + */ +int nvme_get_namespace_id(struct udevice *udev, u32 *ns_id, u8 *eui64); + #endif /* __NVME_H__ */ diff --git a/include/pci.h b/include/pci.h index 298d0d4..8aa6636 100644 --- a/include/pci.h +++ b/include/pci.h @@ -215,6 +215,10 @@ #define PCI_BASE_ADDRESS_IO_MASK (~0x03ULL) /* bit 1 is reserved if address_space = 1 */ +/* Convert a regsister address (e.g. PCI_BASE_ADDRESS_1) to a bar # (e.g. 1) */ +#define pci_offset_to_barnum(offset) \ + (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32)) + /* Header type 0 (normal devices) */ #define PCI_CARDBUS_CIS 0x28 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c @@ -1491,13 +1495,6 @@ int dm_pci_find_class(uint find_class, int index, struct udevice **devp); */ struct dm_pci_emul_ops { /** - * get_devfn(): Check which device and function this emulators - * - * @dev: device to check - * @return the device and function this emulates, or -ve on error - */ - int (*get_devfn)(struct udevice *dev); - /** * read_config() - Read a PCI configuration value * * @dev: Emulated device to read from @@ -1598,7 +1595,7 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn, /** * pci_get_devfn() - Extract the devfn from fdt_pci_addr of the device * - * Get devfn from fdt_pci_addr of the specifified device + * Get devfn from fdt_pci_addr of the specified device * * @dev: PCI device * @return devfn in bits 15...8 if found, -ENODEV if not found diff --git a/include/spl.h b/include/spl.h index e4640f3..4359636 100644 --- a/include/spl.h +++ b/include/spl.h @@ -49,6 +49,72 @@ static inline bool u_boot_first_phase(void) return false; } +enum u_boot_phase { + PHASE_TPL, /* Running in TPL */ + PHASE_SPL, /* Running in SPL */ + PHASE_BOARD_F, /* Running in U-Boot before relocation */ + PHASE_BOARD_R, /* Running in U-Boot after relocation */ +}; + +/** + * spl_phase() - Find out the phase of U-Boot + * + * This can be used to avoid #ifdef logic and use if() instead. + * + * For example, to include code only in TPL, you might do: + * + * #ifdef CONFIG_TPL_BUILD + * ... + * #endif + * + * but with this you can use: + * + * if (spl_phase() == PHASE_TPL) { + * ... + * } + * + * To include code only in SPL, you might do: + * + * #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) + * ... + * #endif + * + * but with this you can use: + * + * if (spl_phase() == PHASE_SPL) { + * ... + * } + * + * To include code only in U-Boot proper, you might do: + * + * #ifndef CONFIG_SPL_BUILD + * ... + * #endif + * + * but with this you can use: + * + * if (spl_phase() == PHASE_BOARD_F) { + * ... + * } + * + * @return U-Boot phase + */ +static inline enum u_boot_phase spl_phase(void) +{ +#ifdef CONFIG_TPL_BUILD + return PHASE_TPL; +#elif CONFIG_SPL_BUILD + return PHASE_SPL; +#else + DECLARE_GLOBAL_DATA_PTR; + + if (!(gd->flags & GD_FLG_RELOC)) + return PHASE_BOARD_F; + else + return PHASE_BOARD_R; +#endif +} + /* A string name for SPL or TPL */ #ifdef CONFIG_SPL_BUILD # ifdef CONFIG_TPL_BUILD @@ -134,6 +200,18 @@ int spl_load_simple_fit(struct spl_image_info *spl_image, #define SPL_COPY_PAYLOAD_ONLY 1 #define SPL_FIT_FOUND 2 +/** + * spl_load_imx_container() - Loads a imx container image from a device. + * @spl_image: Image description to set up + * @info: Structure containing the information required to load data. + * @sector: Sector number where container image is located in the device + * + * Reads the container image @sector in the device. Loads u-boot image to + * specified load address. + */ +int spl_load_imx_container(struct spl_image_info *spl_image, + struct spl_load_info *info, ulong sector); + /* SPL common functions */ void preloader_console_init(void); u32 spl_boot_device(void); @@ -387,7 +465,8 @@ void spl_invoke_opensbi(struct spl_image_info *spl_image); * stage wants to return to the ROM code to continue booting, boards * can implement 'board_return_to_bootrom'. */ -void board_return_to_bootrom(void); +int board_return_to_bootrom(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev); /** * board_spl_fit_post_load - allow process images after loading finished diff --git a/lib/Kconfig b/lib/Kconfig index 3da45a5..135f0b3 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -40,12 +40,12 @@ config PRINTF config SPL_PRINTF bool select SPL_SPRINTF - select SPL_STRTO if !USE_TINY_PRINTF + select SPL_STRTO if !SPL_USE_TINY_PRINTF config TPL_PRINTF bool select TPL_SPRINTF - select TPL_STRTO if !USE_TINY_PRINTF + select TPL_STRTO if !TPL_USE_TINY_PRINTF config SPRINTF bool @@ -95,9 +95,9 @@ config SYS_HZ get_timer() must operate in milliseconds and this option must be set to 1000. -config USE_TINY_PRINTF +config SPL_USE_TINY_PRINTF bool "Enable tiny printf() version" - depends on SPL || TPL + depends on SPL default y help This option enables a tiny, stripped down printf version. @@ -107,6 +107,18 @@ config USE_TINY_PRINTF The supported format specifiers are %c, %s, %u/%d and %x. +config TPL_USE_TINY_PRINTF + bool "Enable tiny printf() version" + depends on TPL + default y if SPL_USE_TINY_PRINTF + help + This option enables a tiny, stripped down printf version. + This should only be used in space limited environments, + like SPL versions with hard memory limits. This version + reduces the code size by about 2.5KiB on armv7. + + The supported format specifiers are %c, %s, %u/%d and %x. + config PANIC_HANG bool "Do not reset the system on fatal error" help diff --git a/lib/Makefile b/lib/Makefile index 2fffd68..d248d86 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -106,7 +106,7 @@ obj-y += panic.o ifeq ($(CONFIG_$(SPL_TPL_)BUILD),y) # SPL U-Boot may use full-printf, tiny-printf or none at all -ifdef CONFIG_USE_TINY_PRINTF +ifdef CONFIG_$(SPL_TPL_)USE_TINY_PRINTF obj-$(CONFIG_$(SPL_TPL_)SPRINTF) += tiny-printf.o else obj-$(CONFIG_$(SPL_TPL_)SPRINTF) += vsprintf.o strmhz.o diff --git a/lib/display_options.c b/lib/display_options.c index cff20f3..ec16d75 100644 --- a/lib/display_options.c +++ b/lib/display_options.c @@ -205,8 +205,10 @@ int print_buffer(ulong addr, const void *data, uint width, uint count, addr += thislinelen * width; count -= thislinelen; +#ifndef CONFIG_SPL_BUILD if (ctrlc()) return -1; +#endif } return 0; diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c index 86297bb..897fc1b 100644 --- a/lib/efi_loader/efi_device_path.c +++ b/lib/efi_loader/efi_device_path.c @@ -10,6 +10,7 @@ #include <dm.h> #include <usb.h> #include <mmc.h> +#include <nvme.h> #include <efi_loader.h> #include <part.h> #include <sandboxblockdev.h> @@ -451,6 +452,11 @@ static unsigned dp_size(struct udevice *dev) return dp_size(dev->parent) + sizeof(struct efi_device_path_sd_mmc_path); #endif +#if defined(CONFIG_NVME) + case UCLASS_NVME: + return dp_size(dev->parent) + + sizeof(struct efi_device_path_nvme); +#endif #ifdef CONFIG_SANDBOX case UCLASS_ROOT: /* @@ -584,6 +590,20 @@ static void *dp_fill(void *buf, struct udevice *dev) return &sddp[1]; } #endif +#if defined(CONFIG_NVME) + case UCLASS_NVME: { + struct efi_device_path_nvme *dp = + dp_fill(buf, dev->parent); + u32 ns_id; + + dp->dp.type = DEVICE_PATH_TYPE_MESSAGING_DEVICE; + dp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_NVME; + dp->dp.length = sizeof(*dp); + nvme_get_namespace_id(dev, &ns_id, dp->eui64); + memcpy(&dp->ns_id, &ns_id, sizeof(ns_id)); + return &dp[1]; + } +#endif default: debug("%s(%u) %s: unhandled parent class: %s (%u)\n", __FILE__, __LINE__, __func__, diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c index 0f3796b..af1adbb 100644 --- a/lib/efi_loader/efi_device_path_to_text.c +++ b/lib/efi_loader/efi_device_path_to_text.c @@ -148,6 +148,21 @@ static char *dp_msging(char *s, struct efi_device_path *dp) break; } + case DEVICE_PATH_SUB_TYPE_MSG_NVME: { + struct efi_device_path_nvme *ndp = + (struct efi_device_path_nvme *)dp; + u32 ns_id; + int i; + + memcpy(&ns_id, &ndp->ns_id, sizeof(ns_id)); + s += sprintf(s, "NVMe(0x%x,", ns_id); + for (i = 0; i < sizeof(ndp->eui64); ++i) + s += sprintf(s, "%s%02x", i ? "-" : "", + ndp->eui64[i]); + s += sprintf(s, ")"); + + break; + } case DEVICE_PATH_SUB_TYPE_MSG_SD: case DEVICE_PATH_SUB_TYPE_MSG_MMC: { const char *typename = diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index 4c554c5..d0daf7b 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -478,10 +478,12 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name, old_size = 0; } } else { - if ((data_size == 0 && - !(attributes & EFI_VARIABLE_APPEND_WRITE)) || - !attributes) { - /* delete, but nothing to do */ + if (data_size == 0 || !attributes || + (attributes & EFI_VARIABLE_APPEND_WRITE)) { + /* + * Trying to delete or to update a non-existent + * variable. + */ ret = EFI_NOT_FOUND; goto out; } diff --git a/lib/efi_selftest/efi_selftest_variables.c b/lib/efi_selftest/efi_selftest_variables.c index a6b41d1..5d98c02 100644 --- a/lib/efi_selftest/efi_selftest_variables.c +++ b/lib/efi_selftest/efi_selftest_variables.c @@ -21,9 +21,6 @@ static const efi_guid_t guid_vendor0 = static const efi_guid_t guid_vendor1 = EFI_GUID(0xff629290, 0x1fc1, 0xd73f, 0x8f, 0xb1, 0x32, 0xf9, 0x0c, 0xa0, 0x42, 0xea); -static const efi_guid_t guid_global = - EFI_GUID(0x8be4df61, 0x93ca, 0x11d2, - 0xaa, 0x0d, 0x00, 0xe0, 0x98, 0x03, 0x2b, 0x8c); /* * Setup unit test. @@ -120,35 +117,29 @@ static int execute(void) 7, v + 8); if (ret != EFI_SUCCESS) { efi_st_error("SetVariable(APPEND_WRITE) failed\n"); - } else { - len = EFI_ST_MAX_DATA_SIZE; - ret = runtime->get_variable(L"efi_st_var1", &guid_vendor1, - &attr, &len, data); - if (ret != EFI_SUCCESS) { - efi_st_error("GetVariable failed\n"); - return EFI_ST_FAILURE; - } - if (len != 15) - efi_st_todo("GetVariable returned wrong length %u\n", - (unsigned int)len); - if (memcmp(data, v, len)) - efi_st_todo("GetVariable returned wrong value\n"); + return EFI_ST_FAILURE; } + len = EFI_ST_MAX_DATA_SIZE; + ret = runtime->get_variable(L"efi_st_var1", &guid_vendor1, + &attr, &len, data); + if (ret != EFI_SUCCESS) { + efi_st_error("GetVariable failed\n"); + return EFI_ST_FAILURE; + } + if (len != 15) + efi_st_todo("GetVariable returned wrong length %u\n", + (unsigned int)len); + if (memcmp(data, v, len)) + efi_st_todo("GetVariable returned wrong value\n"); /* Append variable 2 */ ret = runtime->set_variable(L"efi_none", &guid_vendor1, EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_APPEND_WRITE, 15, v); - if (ret != EFI_NOT_FOUND) + if (ret != EFI_NOT_FOUND) { efi_st_error("SetVariable(APPEND_WRITE) with size 0 to non-existent variable returns wrong code\n"); - /* Append variable 3 */ - ret = runtime->set_variable(L"PlatformLangCodes", &guid_global, - EFI_VARIABLE_BOOTSERVICE_ACCESS | - EFI_VARIABLE_RUNTIME_ACCESS | - EFI_VARIABLE_APPEND_WRITE, - 15, v); - if (ret != EFI_WRITE_PROTECTED) - efi_st_todo("SetVariable(APPEND_WRITE) to read-only variable returns wrong code\n"); + return EFI_ST_FAILURE; + } /* Enumerate variables */ boottime->set_mem(&guid, 16, 0); *varname = 0; diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 74430c8..17736ce 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -186,60 +186,6 @@ fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name) } #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI) -int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, - const char *prop_name, struct fdt_pci_addr *addr) -{ - const u32 *cell; - int len; - int ret = -ENOENT; - - debug("%s: %s: ", __func__, prop_name); - - /* - * If we follow the pci bus bindings strictly, we should check - * the value of the node's parent node's #address-cells and - * #size-cells. They need to be 3 and 2 accordingly. However, - * for simplicity we skip the check here. - */ - cell = fdt_getprop(blob, node, prop_name, &len); - if (!cell) - goto fail; - - if ((len % FDT_PCI_REG_SIZE) == 0) { - int num = len / FDT_PCI_REG_SIZE; - int i; - - for (i = 0; i < num; i++) { - debug("pci address #%d: %08lx %08lx %08lx\n", i, - (ulong)fdt32_to_cpu(cell[0]), - (ulong)fdt32_to_cpu(cell[1]), - (ulong)fdt32_to_cpu(cell[2])); - if ((fdt32_to_cpu(*cell) & type) == type) { - addr->phys_hi = fdt32_to_cpu(cell[0]); - addr->phys_mid = fdt32_to_cpu(cell[1]); - addr->phys_lo = fdt32_to_cpu(cell[2]); - break; - } - - cell += (FDT_PCI_ADDR_CELLS + - FDT_PCI_SIZE_CELLS); - } - - if (i == num) { - ret = -ENXIO; - goto fail; - } - - return 0; - } - - ret = -EINVAL; - -fail: - debug("(not found)\n"); - return ret; -} - int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device) { const char *list, *end; diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 94751ac..5402bc2 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -266,7 +266,6 @@ CONFIG_CPU_VR41XX CONFIG_CQSPI_REF_CLK CONFIG_CS8900_BUS16 CONFIG_CS8900_BUS32 -CONFIG_CSF_SIZE CONFIG_CTL_JTAG CONFIG_CTL_TBE CONFIG_CUSTOMER_BOARD_SUPPORT @@ -1721,7 +1720,6 @@ CONFIG_SPL_NAND_MINIMAL CONFIG_SPL_NAND_RAW_ONLY CONFIG_SPL_NAND_SOFTECC CONFIG_SPL_NAND_WORKSPACE -CONFIG_SPL_NO_CPU_SUPPORT_CODE CONFIG_SPL_PAD_TO CONFIG_SPL_PANIC_ON_RAW_IMAGE CONFIG_SPL_PBL_PAD @@ -4340,7 +4338,6 @@ CONFIG_WATCHDOG_NOWAYOUT CONFIG_WATCHDOG_PRESC CONFIG_WATCHDOG_RC CONFIG_WATCHDOG_TIMEOUT -CONFIG_WATCHDOG_TIMEOUT_MSECS CONFIG_WD_PERIOD CONFIG_X600 CONFIG_X86EMU_DEBUG diff --git a/test/dm/core.c b/test/dm/core.c index edd55b0..f74c430 100644 --- a/test/dm/core.c +++ b/test/dm/core.c @@ -749,8 +749,7 @@ static int dm_test_uclass_devices_find(struct unit_test_state *uts) ut_assert(dev); } - ret = uclass_find_first_device(UCLASS_TEST_DUMMY, &dev); - ut_assert(ret == -ENODEV); + ut_assertok(uclass_find_first_device(UCLASS_TEST_DUMMY, &dev)); ut_assert(!dev); return 0; diff --git a/test/dm/pci.c b/test/dm/pci.c index c325f66..fb93e4c 100644 --- a/test/dm/pci.c +++ b/test/dm/pci.c @@ -38,7 +38,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap)); device = 0; ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); - ut_asserteq(SANDBOX_PCI_DEVICE_ID, device); + ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device); /* Test bus#1 and its devices */ ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus)); @@ -50,7 +50,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap)); device = 0; ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); - ut_asserteq(SANDBOX_PCI_DEVICE_ID, device); + ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device); return 0; } @@ -170,7 +170,7 @@ static int dm_test_pci_mixed(struct unit_test_state *uts) ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x1f, 0), &swap)); device = 0; ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device)); - ut_asserteq(SANDBOX_PCI_DEVICE_ID, device); + ut_asserteq(SANDBOX_PCI_SWAP_CASE_EMUL_ID, device); /* First test I/O */ io_addr = dm_pci_read_bar32(swap, 0); @@ -294,3 +294,48 @@ static int dm_test_pci_ea(struct unit_test_state *uts) return 0; } DM_TEST(dm_test_pci_ea, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT); + +/* Test the dev_read_addr_pci() function */ +static int dm_test_pci_addr_flat(struct unit_test_state *uts) +{ + struct udevice *swap1f, *swap1; + ulong io_addr, mem_addr; + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f)); + io_addr = dm_pci_read_bar32(swap1f, 0); + ut_asserteq(io_addr, dev_read_addr_pci(swap1f)); + + /* + * This device has both I/O and MEM spaces but the MEM space appears + * first + */ + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1)); + mem_addr = dm_pci_read_bar32(swap1, 1); + ut_asserteq(mem_addr, dev_read_addr_pci(swap1)); + + return 0; +} +DM_TEST(dm_test_pci_addr_flat, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | + DM_TESTF_FLAT_TREE); + +/* + * Test the dev_read_addr_pci() function with livetree. That function is + * not currently fully implemented, in that it fails to return the BAR address. + * Once that is implemented this test can be removed and dm_test_pci_addr_flat() + * can be used for both flattree and livetree by removing the DM_TESTF_FLAT_TREE + * flag above. + */ +static int dm_test_pci_addr_live(struct unit_test_state *uts) +{ + struct udevice *swap1f, *swap1; + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap1f)); + ut_asserteq(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1f)); + + ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1, 0), &swap1)); + ut_asserteq(FDT_ADDR_T_NONE, dev_read_addr_pci(swap1)); + + return 0; +} +DM_TEST(dm_test_pci_addr_live, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT | + DM_TESTF_LIVE_TREE); diff --git a/test/dm/test-main.c b/test/dm/test-main.c index 5d79ce6..7264816 100644 --- a/test/dm/test-main.c +++ b/test/dm/test-main.c @@ -64,7 +64,7 @@ static int dm_test_destroy(struct unit_test_state *uts) /* * If the uclass doesn't exist we don't want to create it. So - * check that here before we call uclass_find_device()/ + * check that here before we call uclass_find_device(). */ uc = uclass_find(id); if (!uc) @@ -130,7 +130,7 @@ static int dm_test_main(const char *test_name) const int n_ents = ll_entry_count(struct unit_test, dm_test); struct unit_test_state *uts = &global_dm_test_state; struct unit_test *test; - int run_count; + int found; uts->priv = &_global_priv_dm_test_state; uts->fail_count = 0; @@ -148,7 +148,7 @@ static int dm_test_main(const char *test_name) if (!test_name) printf("Running %d driver model tests\n", n_ents); - run_count = 0; + found = 0; #ifdef CONFIG_OF_LIVE uts->of_root = gd->of_root; #endif @@ -180,16 +180,20 @@ static int dm_test_main(const char *test_name) ut_assertok(dm_do_test(uts, test, false)); runs++; } - run_count += runs; + found++; } - if (test_name && !run_count) + if (test_name && !found) printf("Test '%s' not found\n", test_name); else printf("Failures: %d\n", uts->fail_count); + /* Put everything back to normal so that sandbox works as expected */ +#ifdef CONFIG_OF_LIVE + gd->of_root = uts->of_root; +#endif gd->dm_root = NULL; - ut_assertok(dm_init(false)); + ut_assertok(dm_init(IS_ENABLED(CONFIG_OF_LIVE))); dm_scan_platdata(false); dm_scan_fdt(gd->fdt_blob, false); diff --git a/tools/binman/README b/tools/binman/README index b4f6392..8e0f0a8 100644 --- a/tools/binman/README +++ b/tools/binman/README @@ -934,6 +934,12 @@ BINMAN_DEBUG=1 to your build: make sandbox_defconfig make BINMAN_DEBUG=1 +To enable verbose logging from binman, base BINMAN_VERBOSE to your build, which +adds a -v<level> option to the call to binman: + + make sandbox_defconfig + make BINMAN_VERBOSE=5 + History / Credits ----------------- diff --git a/tools/binman/control.py b/tools/binman/control.py index 9e75878..cb51bc2 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -468,29 +468,23 @@ def Binman(args): command.Run(pager, fname) return 0 - if args.cmd == 'ls': + if args.cmd in ['ls', 'extract', 'replace']: try: + tout.Init(args.verbosity) tools.PrepareOutputDir(None) - ListEntries(args.image, args.paths) - finally: - tools.FinaliseOutputDir() - return 0 - - if args.cmd == 'extract': - try: - tools.PrepareOutputDir(None) - ExtractEntries(args.image, args.filename, args.outdir, args.paths, - not args.uncompressed) - finally: - tools.FinaliseOutputDir() - return 0 - - if args.cmd == 'replace': - try: - tools.PrepareOutputDir(None) - ReplaceEntries(args.image, args.filename, args.indir, args.paths, - do_compress=not args.compressed, - allow_resize=not args.fix_size, write_map=args.map) + if args.cmd == 'ls': + ListEntries(args.image, args.paths) + + if args.cmd == 'extract': + ExtractEntries(args.image, args.filename, args.outdir, args.paths, + not args.uncompressed) + + if args.cmd == 'replace': + ReplaceEntries(args.image, args.filename, args.indir, args.paths, + do_compress=not args.compressed, + allow_resize=not args.fix_size, write_map=args.map) + except: + raise finally: tools.FinaliseOutputDir() return 0 diff --git a/tools/binman/entry.py b/tools/binman/entry.py index 6a2c6e0..fe8e1dd 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -714,9 +714,27 @@ features to produce new behaviours. """ # Use True here so that we get an uncompressed section to work from, # although compressed sections are currently not supported + tout.Debug("ReadChildData section '%s', entry '%s'" % + (self.section.GetPath(), self.GetPath())) data = self.section.ReadChildData(self, decomp) return data + def ReadChildData(self, child, decomp=True): + """Read the data for a particular child entry + + This reads data from the parent and extracts the piece that relates to + the given child. + + Args: + child: Child entry to read data for (must be valid) + decomp: True to decompress any compressed data before returning it; + False to return the raw, uncompressed data + + Returns: + Data for the child (bytes) + """ + pass + def LoadData(self, decomp=True): data = self.ReadData(decomp) self.contents_size = len(data) diff --git a/tools/binman/etype/image_header.py b/tools/binman/etype/image_header.py index 4b69eda..b9327dd 100644 --- a/tools/binman/etype/image_header.py +++ b/tools/binman/etype/image_header.py @@ -100,6 +100,7 @@ class Entry_image_header(Entry): offset = offset else: offset = image_size - IMAGE_HEADER_LEN + offset += self.section.GetStartOffset() return Entry.Pack(self, offset) def ProcessContents(self): diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 5d34fc5..8179daf 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -500,18 +500,12 @@ class Entry_section(Entry): return data def ReadChildData(self, child, decomp=True): - """Read the data for a particular child entry - - Args: - child: Child entry to read data for - decomp: True to return uncompressed data, False to leave the data - compressed if it is compressed - - Returns: - Data contents of entry - """ + tout.Debug("ReadChildData for child '%s'" % child.GetPath()) parent_data = self.ReadData(True) - data = parent_data[child.offset:child.offset + child.size] + offset = child.offset - self._skip_at_start + tout.Debug("Extract for child '%s': offset %#x, skip_at_start %#x, result %#x" % + (child.GetPath(), child.offset, self._skip_at_start, offset)) + data = parent_data[offset:offset + child.size] if decomp: indata = data data = tools.Decompress(indata, child.compress) diff --git a/tools/binman/image.py b/tools/binman/image.py index 7b39a1d..2beab7f 100644 --- a/tools/binman/image.py +++ b/tools/binman/image.py @@ -201,6 +201,8 @@ class Image(section.Entry_section): return entry def ReadData(self, decomp=True): + tout.Debug("Image '%s' ReadData(), size=%#x" % + (self.GetPath(), len(self._data))) return self._data def GetListEntries(self, entry_paths): diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py index 119d02c..f90b8ea 100644 --- a/tools/buildman/func_test.py +++ b/tools/buildman/func_test.py @@ -175,6 +175,7 @@ class TestFunctional(unittest.TestCase): """ def setUp(self): self._base_dir = tempfile.mkdtemp() + self._output_dir = tempfile.mkdtemp() self._git_dir = os.path.join(self._base_dir, 'src') self._buildman_pathname = sys.argv[0] self._buildman_dir = os.path.dirname(os.path.realpath(sys.argv[0])) @@ -207,6 +208,7 @@ class TestFunctional(unittest.TestCase): def tearDown(self): shutil.rmtree(self._base_dir) + shutil.rmtree(self._output_dir) def setupToolchains(self): self._toolchains = toolchain.Toolchains() @@ -421,7 +423,7 @@ class TestFunctional(unittest.TestCase): def testCurrentSource(self): """Very simple test to invoke buildman on the current source""" self.setupToolchains(); - self._RunControl() + self._RunControl('-o', self._output_dir) lines = terminal.GetPrintTestLines() self.assertIn('Building current source for %d boards' % len(boards), lines[0].text) @@ -434,7 +436,7 @@ class TestFunctional(unittest.TestCase): def testBadToolchain(self): """Test that missing toolchains are detected""" self.setupToolchains(); - ret_code = self._RunControl('-b', TEST_BRANCH) + ret_code = self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir) lines = terminal.GetPrintTestLines() # Buildman always builds the upstream commit as well @@ -458,13 +460,13 @@ class TestFunctional(unittest.TestCase): def testBranch(self): """Test building a branch with all toolchains present""" - self._RunControl('-b', TEST_BRANCH) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 0) def testCount(self): """Test building a specific number of commitst""" - self._RunControl('-b', TEST_BRANCH, '-c2') + self._RunControl('-b', TEST_BRANCH, '-c2', '-o', self._output_dir) self.assertEqual(self._builder.count, 2 * len(boards)) self.assertEqual(self._builder.fail, 0) # Each board has a mrproper, config, and then one make per commit @@ -472,34 +474,34 @@ class TestFunctional(unittest.TestCase): def testIncremental(self): """Test building a branch twice - the second time should do nothing""" - self._RunControl('-b', TEST_BRANCH) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir) # Each board has a mrproper, config, and then one make per commit self.assertEqual(self._make_calls, len(boards) * (self._commits + 2)) self._make_calls = 0 - self._RunControl('-b', TEST_BRANCH, clean_dir=False) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir, clean_dir=False) self.assertEqual(self._make_calls, 0) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 0) def testForceBuild(self): """The -f flag should force a rebuild""" - self._RunControl('-b', TEST_BRANCH) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir) self._make_calls = 0 - self._RunControl('-b', TEST_BRANCH, '-f', clean_dir=False) + self._RunControl('-b', TEST_BRANCH, '-f', '-o', self._output_dir, clean_dir=False) # Each board has a mrproper, config, and then one make per commit self.assertEqual(self._make_calls, len(boards) * (self._commits + 2)) def testForceReconfigure(self): """The -f flag should force a rebuild""" - self._RunControl('-b', TEST_BRANCH, '-C') + self._RunControl('-b', TEST_BRANCH, '-C', '-o', self._output_dir) # Each commit has a mrproper, config and make self.assertEqual(self._make_calls, len(boards) * self._commits * 3) def testErrors(self): """Test handling of build errors""" self._error['board2', 1] = 'fred\n' - self._RunControl('-b', TEST_BRANCH) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 1) @@ -507,13 +509,13 @@ class TestFunctional(unittest.TestCase): # not be rebuilt del self._error['board2', 1] self._make_calls = 0 - self._RunControl('-b', TEST_BRANCH, clean_dir=False) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir, clean_dir=False) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._make_calls, 0) self.assertEqual(self._builder.fail, 1) # Now use the -F flag to force rebuild of the bad commit - self._RunControl('-b', TEST_BRANCH, '-F', clean_dir=False) + self._RunControl('-b', TEST_BRANCH, '-o', self._output_dir, '-F', clean_dir=False) self.assertEqual(self._builder.count, self._total_builds) self.assertEqual(self._builder.fail, 0) self.assertEqual(self._make_calls, 3) diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py index d68af05..3908985 100644 --- a/tools/buildman/kconfiglib.py +++ b/tools/buildman/kconfiglib.py @@ -1,3409 +1,6219 @@ +# Copyright (c) 2011-2019, Ulf Magnusson # SPDX-License-Identifier: ISC -# -# Author: Ulf Magnusson -# https://github.com/ulfalizer/Kconfiglib - -# This is Kconfiglib, a Python library for scripting, debugging, and extracting -# information from Kconfig-based configuration systems. To view the -# documentation, run -# -# $ pydoc kconfiglib -# -# or, if you prefer HTML, -# -# $ pydoc -w kconfiglib -# -# The examples/ subdirectory contains examples, to be run with e.g. -# -# $ make scriptconfig SCRIPT=Kconfiglib/examples/print_tree.py -# -# Look in testsuite.py for the test suite. """ -Kconfiglib is a Python library for scripting and extracting information from -Kconfig-based configuration systems. Features include the following: +Overview +======== + +Kconfiglib is a Python 2/3 library for scripting and extracting information +from Kconfig (https://www.kernel.org/doc/Documentation/kbuild/kconfig-language.txt) +configuration systems. + +See the homepage at https://github.com/ulfalizer/Kconfiglib for a longer +overview. + +Since Kconfiglib 12.0.0, the library version is available in +kconfiglib.VERSION, which is a (<major>, <minor>, <patch>) tuple, e.g. +(12, 0, 0). + + +Using Kconfiglib on the Linux kernel with the Makefile targets +============================================================== + +For the Linux kernel, a handy interface is provided by the +scripts/kconfig/Makefile patch, which can be applied with either 'git am' or +the 'patch' utility: + + $ wget -qO- https://raw.githubusercontent.com/ulfalizer/Kconfiglib/master/makefile.patch | git am + $ wget -qO- https://raw.githubusercontent.com/ulfalizer/Kconfiglib/master/makefile.patch | patch -p1 + +Warning: Not passing -p1 to patch will cause the wrong file to be patched. + +Please tell me if the patch does not apply. It should be trivial to apply +manually, as it's just a block of text that needs to be inserted near the other +*conf: targets in scripts/kconfig/Makefile. + +Look further down for a motivation for the Makefile patch and for instructions +on how you can use Kconfiglib without it. + +If you do not wish to install Kconfiglib via pip, the Makefile patch is set up +so that you can also just clone Kconfiglib into the kernel root: + + $ git clone git://github.com/ulfalizer/Kconfiglib.git + $ git am Kconfiglib/makefile.patch (or 'patch -p1 < Kconfiglib/makefile.patch') + +Warning: The directory name Kconfiglib/ is significant in this case, because +it's added to PYTHONPATH by the new targets in makefile.patch. + +The targets added by the Makefile patch are described in the following +sections. + + +make kmenuconfig +---------------- + +This target runs the curses menuconfig interface with Python 3. As of +Kconfiglib 12.2.0, both Python 2 and Python 3 are supported (previously, only +Python 3 was supported, so this was a backport). + + +make guiconfig +-------------- + +This target runs the Tkinter menuconfig interface. Both Python 2 and Python 3 +are supported. To change the Python interpreter used, pass +PYTHONCMD=<executable> to 'make'. The default is 'python'. + + +make [ARCH=<arch>] iscriptconfig +-------------------------------- + +This target gives an interactive Python prompt where a Kconfig instance has +been preloaded and is available in 'kconf'. To change the Python interpreter +used, pass PYTHONCMD=<executable> to 'make'. The default is 'python'. + +To get a feel for the API, try evaluating and printing the symbols in +kconf.defined_syms, and explore the MenuNode menu tree starting at +kconf.top_node by following 'next' and 'list' pointers. + +The item contained in a menu node is found in MenuNode.item (note that this can +be one of the constants kconfiglib.MENU and kconfiglib.COMMENT), and all +symbols and choices have a 'nodes' attribute containing their menu nodes +(usually only one). Printing a menu node will print its item, in Kconfig +format. + +If you want to look up a symbol by name, use the kconf.syms dictionary. + + +make scriptconfig SCRIPT=<script> [SCRIPT_ARG=<arg>] +---------------------------------------------------- + +This target runs the Python script given by the SCRIPT parameter on the +configuration. sys.argv[1] holds the name of the top-level Kconfig file +(currently always "Kconfig" in practice), and sys.argv[2] holds the SCRIPT_ARG +argument, if given. + +See the examples/ subdirectory for example scripts. + + +make dumpvarsconfig +------------------- + +This target prints a list of all environment variables referenced from the +Kconfig files, together with their values. See the +Kconfiglib/examples/dumpvars.py script. + +Only environment variables that are referenced via the Kconfig preprocessor +$(FOO) syntax are included. The preprocessor was added in Linux 4.18. + + +Using Kconfiglib without the Makefile targets +============================================= + +The make targets are only needed to pick up environment variables exported from +the Kbuild makefiles and referenced inside Kconfig files, via e.g. +'source "arch/$(SRCARCH)/Kconfig" and commands run via '$(shell,...)'. + +These variables are referenced as of writing (Linux 4.18), together with sample +values: + + srctree (.) + ARCH (x86) + SRCARCH (x86) + KERNELVERSION (4.18.0) + CC (gcc) + HOSTCC (gcc) + HOSTCXX (g++) + CC_VERSION_TEXT (gcc (Ubuntu 7.3.0-16ubuntu3) 7.3.0) + +Older kernels only reference ARCH, SRCARCH, and KERNELVERSION. + +If your kernel is recent enough (4.18+), you can get a list of referenced +environment variables via 'make dumpvarsconfig' (see above). Note that this +command is added by the Makefile patch. + +To run Kconfiglib without the Makefile patch, set the environment variables +manually: + + $ srctree=. ARCH=x86 SRCARCH=x86 KERNELVERSION=`make kernelversion` ... python(3) + >>> import kconfiglib + >>> kconf = kconfiglib.Kconfig() # filename defaults to "Kconfig" + +Search the top-level Makefile for "Additional ARCH settings" to see other +possibilities for ARCH and SRCARCH. + + +Intro to symbol values +====================== + +Kconfiglib has the same assignment semantics as the C implementation. + +Any symbol can be assigned a value by the user (via Kconfig.load_config() or +Symbol.set_value()), but this user value is only respected if the symbol is +visible, which corresponds to it (currently) being visible in the menuconfig +interface. + +For symbols with prompts, the visibility of the symbol is determined by the +condition on the prompt. Symbols without prompts are never visible, so setting +a user value on them is pointless. A warning will be printed by default if +Symbol.set_value() is called on a promptless symbol. Assignments to promptless +symbols are normal within a .config file, so no similar warning will be printed +by load_config(). + +Dependencies from parents and 'if'/'depends on' are propagated to properties, +including prompts, so these two configurations are logically equivalent: + +(1) + + menu "menu" + depends on A + + if B + + config FOO + tristate "foo" if D + default y + depends on C + + endif + + endmenu + +(2) + + menu "menu" + depends on A + + config FOO + tristate "foo" if A && B && C && D + default y if A && B && C + + endmenu + +In this example, A && B && C && D (the prompt condition) needs to be non-n for +FOO to be visible (assignable). If its value is m, the symbol can only be +assigned the value m: The visibility sets an upper bound on the value that can +be assigned by the user, and any higher user value will be truncated down. + +'default' properties are independent of the visibility, though a 'default' will +often get the same condition as the prompt due to dependency propagation. +'default' properties are used if the symbol is not visible or has no user +value. + +Symbols with no user value (or that have a user value but are not visible) and +no (active) 'default' default to n for bool/tristate symbols, and to the empty +string for other symbol types. + +'select' works similarly to symbol visibility, but sets a lower bound on the +value of the symbol. The lower bound is determined by the value of the +select*ing* symbol. 'select' does not respect visibility, so non-visible +symbols can be forced to a particular (minimum) value by a select as well. + +For non-bool/tristate symbols, it only matters whether the visibility is n or +non-n: m visibility acts the same as y visibility. + +Conditions on 'default' and 'select' work in mostly intuitive ways. If the +condition is n, the 'default' or 'select' is disabled. If it is m, the +'default' or 'select' value (the value of the selecting symbol) is truncated +down to m. + +When writing a configuration with Kconfig.write_config(), only symbols that are +visible, have an (active) default, or are selected will get written out (note +that this includes all symbols that would accept user values). Kconfiglib +matches the .config format produced by the C implementations down to the +character. This eases testing. + +For a visible bool/tristate symbol FOO with value n, this line is written to +.config: + + # CONFIG_FOO is not set + +The point is to remember the user n selection (which might differ from the +default value the symbol would get), while at the same sticking to the rule +that undefined corresponds to n (.config uses Makefile format, making the line +above a comment). When the .config file is read back in, this line will be +treated the same as the following assignment: - - Symbol values and properties can be looked up and values assigned - programmatically. - - .config files can be read and written. - - Expressions can be evaluated in the context of a Kconfig configuration. - - Relations between symbols can be quickly determined, such as finding all - symbols that reference a particular symbol. - - Highly compatible with the scripts/kconfig/*conf utilities. The test suite - automatically compares outputs between Kconfiglib and the C implementation - for a large number of cases. + CONFIG_FOO=n -For the Linux kernel, scripts are run using +In Kconfiglib, the set of (currently) assignable values for a bool/tristate +symbol appear in Symbol.assignable. For other symbol types, just check if +sym.visibility is non-0 (non-n) to see whether the user value will have an +effect. - $ make scriptconfig [ARCH=<arch>] SCRIPT=<path to script> [SCRIPT_ARG=<arg>] -Using the 'scriptconfig' target ensures that required environment variables -(SRCARCH, ARCH, srctree, KERNELVERSION, etc.) are set up correctly. +Intro to the menu tree +====================== -Scripts receive the name of the Kconfig file to load in sys.argv[1]. As of -Linux 4.1.0-rc5, this is always "Kconfig" from the kernel top-level directory. -If an argument is provided with SCRIPT_ARG, it appears as sys.argv[2]. +The menu structure, as seen in e.g. menuconfig, is represented by a tree of +MenuNode objects. The top node of the configuration corresponds to an implicit +top-level menu, the title of which is shown at the top in the standard +menuconfig interface. (The title is also available in Kconfig.mainmenu_text in +Kconfiglib.) -To get an interactive Python prompt with Kconfiglib preloaded and a Config -object 'c' created, run +The top node is found in Kconfig.top_node. From there, you can visit child menu +nodes by following the 'list' pointer, and any following menu nodes by +following the 'next' pointer. Usually, a non-None 'list' pointer indicates a +menu or Choice, but menu nodes for symbols can sometimes have a non-None 'list' +pointer too due to submenus created implicitly from dependencies. - $ make iscriptconfig [ARCH=<arch>] +MenuNode.item is either a Symbol or a Choice object, or one of the constants +MENU and COMMENT. The prompt of the menu node can be found in MenuNode.prompt, +which also holds the title for menus and comments. For Symbol and Choice, +MenuNode.help holds the help text (if any, otherwise None). -Kconfiglib supports both Python 2 and Python 3. For (i)scriptconfig, the Python -interpreter to use can be passed in PYTHONCMD, which defaults to 'python'. PyPy -works well too, and might give a nice speedup for long-running jobs. +Most symbols will only have a single menu node. A symbol defined in multiple +locations will have one menu node for each location. The list of menu nodes for +a Symbol or Choice can be found in the Symbol/Choice.nodes attribute. -The examples/ directory contains short example scripts, which can be run with -e.g. +Note that prompts and help texts for symbols and choices are stored in their +menu node(s) rather than in the Symbol or Choice objects themselves. This makes +it possible to define a symbol in multiple locations with a different prompt or +help text in each location. To get the help text or prompt for a symbol with a +single menu node, do sym.nodes[0].help and sym.nodes[0].prompt, respectively. +The prompt is a (text, condition) tuple, where condition determines the +visibility (see 'Intro to expressions' below). - $ make scriptconfig SCRIPT=Kconfiglib/examples/print_tree.py +This organization mirrors the C implementation. MenuNode is called +'struct menu' there, but I thought "menu" was a confusing name. -or +It is possible to give a Choice a name and define it in multiple locations, +hence why Choice.nodes is also a list. - $ make scriptconfig SCRIPT=Kconfiglib/examples/help_grep.py SCRIPT_ARG=kernel +As a convenience, the properties added at a particular definition location are +available on the MenuNode itself, in e.g. MenuNode.defaults. This is helpful +when generating documentation, so that symbols/choices defined in multiple +locations can be shown with the correct properties at each location. -testsuite.py contains the test suite. See the top of the script for how to run -it. -Credits: Written by Ulf "Ulfalizer" Magnusson +Intro to expressions +==================== -Send bug reports, suggestions and other feedback to ulfalizer a.t Google's -email service. Don't wrestle with internal APIs. Tell me what you need and I -might add it in a safe way as a client API instead.""" +Expressions can be evaluated with the expr_value() function and printed with +the expr_str() function (these are used internally as well). Evaluating an +expression always yields a tristate value, where n, m, and y are represented as +0, 1, and 2, respectively. +The following table should help you figure out how expressions are represented. +A, B, C, ... are symbols (Symbol instances), NOT is the kconfiglib.NOT +constant, etc. + +Expression Representation +---------- -------------- +A A +"A" A (constant symbol) +!A (NOT, A) +A && B (AND, A, B) +A && B && C (AND, A, (AND, B, C)) +A || B (OR, A, B) +A || (B && C && D) (OR, A, (AND, B, (AND, C, D))) +A = B (EQUAL, A, B) +A != "foo" (UNEQUAL, A, foo (constant symbol)) +A && B = C && D (AND, A, (AND, (EQUAL, B, C), D)) +n Kconfig.n (constant symbol) +m Kconfig.m (constant symbol) +y Kconfig.y (constant symbol) +"y" Kconfig.y (constant symbol) + +Strings like "foo" in 'default "foo"' or 'depends on SYM = "foo"' are +represented as constant symbols, so the only values that appear in expressions +are symbols***. This mirrors the C implementation. + +***For choice symbols, the parent Choice will appear in expressions as well, +but it's usually invisible as the value interfaces of Symbol and Choice are +identical. This mirrors the C implementation and makes different choice modes +"just work". + +Manual evaluation examples: + + - The value of A && B is min(A.tri_value, B.tri_value) + + - The value of A || B is max(A.tri_value, B.tri_value) + + - The value of !A is 2 - A.tri_value + + - The value of A = B is 2 (y) if A.str_value == B.str_value, and 0 (n) + otherwise. Note that str_value is used here instead of tri_value. + + For constant (as well as undefined) symbols, str_value matches the name of + the symbol. This mirrors the C implementation and explains why + 'depends on SYM = "foo"' above works as expected. + +n/m/y are automatically converted to the corresponding constant symbols +"n"/"m"/"y" (Kconfig.n/m/y) during parsing. + +Kconfig.const_syms is a dictionary like Kconfig.syms but for constant symbols. + +If a condition is missing (e.g., <cond> when the 'if <cond>' is removed from +'default A if <cond>'), it is actually Kconfig.y. The standard __str__() +functions just avoid printing 'if y' conditions to give cleaner output. + + +Kconfig extensions +================== + +Kconfiglib includes a couple of Kconfig extensions: + +'source' with relative path +--------------------------- + +The 'rsource' statement sources Kconfig files with a path relative to directory +of the Kconfig file containing the 'rsource' statement, instead of relative to +the project root. + +Consider following directory tree: + + Project + +--Kconfig + | + +--src + +--Kconfig + | + +--SubSystem1 + +--Kconfig + | + +--ModuleA + +--Kconfig + +In this example, assume that src/SubSystem1/Kconfig wants to source +src/SubSystem1/ModuleA/Kconfig. + +With 'source', this statement would be used: + + source "src/SubSystem1/ModuleA/Kconfig" + +With 'rsource', this turns into + + rsource "ModuleA/Kconfig" + +If an absolute path is given to 'rsource', it acts the same as 'source'. + +'rsource' can be used to create "position-independent" Kconfig trees that can +be moved around freely. + + +Globbing 'source' +----------------- + +'source' and 'rsource' accept glob patterns, sourcing all matching Kconfig +files. They require at least one matching file, raising a KconfigError +otherwise. + +For example, the following statement might source sub1/foofoofoo and +sub2/foobarfoo: + + source "sub[12]/foo*foo" + +The glob patterns accepted are the same as for the standard glob.glob() +function. + +Two additional statements are provided for cases where it's acceptable for a +pattern to match no files: 'osource' and 'orsource' (the o is for "optional"). + +For example, the following statements will be no-ops if neither "foo" nor any +files matching "bar*" exist: + + osource "foo" + osource "bar*" + +'orsource' does a relative optional source. + +'source' and 'osource' are analogous to 'include' and '-include' in Make. + + +Generalized def_* keywords +-------------------------- + +def_int, def_hex, and def_string are available in addition to def_bool and +def_tristate, allowing int, hex, and string symbols to be given a type and a +default at the same time. + + +Extra optional warnings +----------------------- + +Some optional warnings can be controlled via environment variables: + + - KCONFIG_WARN_UNDEF: If set to 'y', warnings will be generated for all + references to undefined symbols within Kconfig files. The only gotcha is + that all hex literals must be prefixed with "0x" or "0X", to make it + possible to distinguish them from symbol references. + + Some projects (e.g. the Linux kernel) use multiple Kconfig trees with many + shared Kconfig files, leading to some safe undefined symbol references. + KCONFIG_WARN_UNDEF is useful in projects that only have a single Kconfig + tree though. + + KCONFIG_STRICT is an older alias for this environment variable, supported + for backwards compatibility. + + - KCONFIG_WARN_UNDEF_ASSIGN: If set to 'y', warnings will be generated for + all assignments to undefined symbols within .config files. By default, no + such warnings are generated. + + This warning can also be enabled/disabled via the Kconfig.warn_assign_undef + variable. + + +Preprocessor user functions defined in Python +--------------------------------------------- + +Preprocessor functions can be defined in Python, which makes it simple to +integrate information from existing Python tools into Kconfig (e.g. to have +Kconfig symbols depend on hardware information stored in some other format). + +Putting a Python module named kconfigfunctions(.py) anywhere in sys.path will +cause it to be imported by Kconfiglib (in Kconfig.__init__()). Note that +sys.path can be customized via PYTHONPATH, and includes the directory of the +module being run by default, as well as installation directories. + +If the KCONFIG_FUNCTIONS environment variable is set, it gives a different +module name to use instead of 'kconfigfunctions'. + +The imported module is expected to define a global dictionary named 'functions' +that maps function names to Python functions, as follows: + + def my_fn(kconf, name, arg_1, arg_2, ...): + # kconf: + # Kconfig instance + # + # name: + # Name of the user-defined function ("my-fn"). Think argv[0]. + # + # arg_1, arg_2, ...: + # Arguments passed to the function from Kconfig (strings) + # + # Returns a string to be substituted as the result of calling the + # function + ... + + def my_other_fn(kconf, name, arg_1, arg_2, ...): + ... + + functions = { + "my-fn": (my_fn, <min.args>, <max.args>/None), + "my-other-fn": (my_other_fn, <min.args>, <max.args>/None), + ... + } + + ... + +<min.args> and <max.args> are the minimum and maximum number of arguments +expected by the function (excluding the implicit 'name' argument). If +<max.args> is None, there is no upper limit to the number of arguments. Passing +an invalid number of arguments will generate a KconfigError exception. + +Functions can access the current parsing location as kconf.filename/linenr. +Accessing other fields of the Kconfig object is not safe. See the warning +below. + +Keep in mind that for a variable defined like 'foo = $(fn)', 'fn' will be +called only when 'foo' is expanded. If 'fn' uses the parsing location and the +intent is to use the location of the assignment, you want 'foo := $(fn)' +instead, which calls the function immediately. + +Once defined, user functions can be called from Kconfig in the same way as +other preprocessor functions: + + config FOO + ... + depends on $(my-fn,arg1,arg2) + +If my_fn() returns "n", this will result in + + config FOO + ... + depends on n + +Warning +******* + +User-defined preprocessor functions are called as they're encountered at parse +time, before all Kconfig files have been processed, and before the menu tree +has been finalized. There are no guarantees that accessing Kconfig symbols or +the menu tree via the 'kconf' parameter will work, and it could potentially +lead to a crash. + +Preferably, user-defined functions should be stateless. + + +Feedback +======== + +Send bug reports, suggestions, and questions to ulfalizer a.t Google's email +service, or open a ticket on the GitHub page. +""" +import errno +import importlib import os -import platform import re import sys +# Get rid of some attribute lookups. These are obvious in context. +from glob import iglob +from os.path import dirname, exists, expandvars, islink, join, realpath + + +VERSION = (12, 14, 0) + + # File layout: # # Public classes # Public functions -# Internal classes # Internal functions -# Internal global constants +# Global constants # Line length: 79 columns + # # Public classes # -class Config(object): - """Represents a Kconfig configuration, e.g. for i386 or ARM. This is the - set of symbols and other items appearing in the configuration together with - their values. Creating any number of Config objects -- including for - different architectures -- is safe; Kconfiglib has no global state.""" +class Kconfig(object): + """ + Represents a Kconfig configuration, e.g. for x86 or ARM. This is the set of + symbols, choices, and menu nodes appearing in the configuration. Creating + any number of Kconfig objects (including for different architectures) is + safe. Kconfiglib doesn't keep any global state. + + The following attributes are available. They should be treated as + read-only, and some are implemented through @property magic. + + syms: + A dictionary with all symbols in the configuration, indexed by name. Also + includes all symbols that are referenced in expressions but never + defined, except for constant (quoted) symbols. + + Undefined symbols can be recognized by Symbol.nodes being empty -- see + the 'Intro to the menu tree' section in the module docstring. + + const_syms: + A dictionary like 'syms' for constant (quoted) symbols + + named_choices: + A dictionary like 'syms' for named choices (choice FOO) + + defined_syms: + A list with all defined symbols, in the same order as they appear in the + Kconfig files. Symbols defined in multiple locations appear multiple + times. + + Note: You probably want to use 'unique_defined_syms' instead. This + attribute is mostly maintained for backwards compatibility. + + unique_defined_syms: + A list like 'defined_syms', but with duplicates removed. Just the first + instance is kept for symbols defined in multiple locations. Kconfig order + is preserved otherwise. + + Using this attribute instead of 'defined_syms' can save work, and + automatically gives reasonable behavior when writing configuration output + (symbols defined in multiple locations only generate output once, while + still preserving Kconfig order for readability). + + choices: + A list with all choices, in the same order as they appear in the Kconfig + files. + + Note: You probably want to use 'unique_choices' instead. This attribute + is mostly maintained for backwards compatibility. + + unique_choices: + Analogous to 'unique_defined_syms', for choices. Named choices can have + multiple definition locations. + + menus: + A list with all menus, in the same order as they appear in the Kconfig + files + + comments: + A list with all comments, in the same order as they appear in the Kconfig + files + + kconfig_filenames: + A list with the filenames of all Kconfig files included in the + configuration, relative to $srctree (or relative to the current directory + if $srctree isn't set), except absolute paths (e.g. + 'source "/foo/Kconfig"') are kept as-is. + + The files are listed in the order they are source'd, starting with the + top-level Kconfig file. If a file is source'd multiple times, it will + appear multiple times. Use set() to get unique filenames. + + Note that Kconfig.sync_deps() already indirectly catches any file + modifications that change configuration output. + + env_vars: + A set() with the names of all environment variables referenced in the + Kconfig files. + + Only environment variables referenced with the preprocessor $(FOO) syntax + will be registered. The older $FOO syntax is only supported for backwards + compatibility. + + Also note that $(FOO) won't be registered unless the environment variable + $FOO is actually set. If it isn't, $(FOO) is an expansion of an unset + preprocessor variable (which gives the empty string). + + Another gotcha is that environment variables referenced in the values of + recursively expanded preprocessor variables (those defined with =) will + only be registered if the variable is actually used (expanded) somewhere. + + The note from the 'kconfig_filenames' documentation applies here too. + + n/m/y: + The predefined constant symbols n/m/y. Also available in const_syms. + + modules: + The Symbol instance for the modules symbol. Currently hardcoded to + MODULES, which is backwards compatible. Kconfiglib will warn if + 'option modules' is set on some other symbol. Tell me if you need proper + 'option modules' support. + + 'modules' is never None. If the MODULES symbol is not explicitly defined, + its tri_value will be 0 (n), as expected. + + A simple way to enable modules is to do 'kconf.modules.set_value(2)' + (provided the MODULES symbol is defined and visible). Modules are + disabled by default in the kernel Kconfig files as of writing, though + nearly all defconfig files enable them (with 'CONFIG_MODULES=y'). + + defconfig_list: + The Symbol instance for the 'option defconfig_list' symbol, or None if no + defconfig_list symbol exists. The defconfig filename derived from this + symbol can be found in Kconfig.defconfig_filename. + + defconfig_filename: + The filename given by the defconfig_list symbol. This is taken from the + first 'default' with a satisfied condition where the specified file + exists (can be opened for reading). If a defconfig file foo/defconfig is + not found and $srctree was set when the Kconfig was created, + $srctree/foo/defconfig is looked up as well. + + 'defconfig_filename' is None if either no defconfig_list symbol exists, + or if the defconfig_list symbol has no 'default' with a satisfied + condition that specifies a file that exists. + + Gotcha: scripts/kconfig/Makefile might pass --defconfig=<defconfig> to + scripts/kconfig/conf when running e.g. 'make defconfig'. This option + overrides the defconfig_list symbol, meaning defconfig_filename might not + always match what 'make defconfig' would use. + + top_node: + The menu node (see the MenuNode class) of the implicit top-level menu. + Acts as the root of the menu tree. + + mainmenu_text: + The prompt (title) of the top menu (top_node). Defaults to "Main menu". + Can be changed with the 'mainmenu' statement (see kconfig-language.txt). + + variables: + A dictionary with all preprocessor variables, indexed by name. See the + Variable class. + + warn: + Set this variable to True/False to enable/disable warnings. See + Kconfig.__init__(). + + When 'warn' is False, the values of the other warning-related variables + are ignored. + + This variable as well as the other warn* variables can be read to check + the current warning settings. + + warn_to_stderr: + Set this variable to True/False to enable/disable warnings on stderr. See + Kconfig.__init__(). + + warn_assign_undef: + Set this variable to True to generate warnings for assignments to + undefined symbols in configuration files. + + This variable is False by default unless the KCONFIG_WARN_UNDEF_ASSIGN + environment variable was set to 'y' when the Kconfig instance was + created. + + warn_assign_override: + Set this variable to True to generate warnings for multiple assignments + to the same symbol in configuration files, where the assignments set + different values (e.g. CONFIG_FOO=m followed by CONFIG_FOO=y, where the + last value would get used). + + This variable is True by default. Disabling it might be useful when + merging configurations. + + warn_assign_redun: + Like warn_assign_override, but for multiple assignments setting a symbol + to the same value. + + This variable is True by default. Disabling it might be useful when + merging configurations. + + warnings: + A list of strings containing all warnings that have been generated, for + cases where more flexibility is needed. + + See the 'warn_to_stderr' parameter to Kconfig.__init__() and the + Kconfig.warn_to_stderr variable as well. Note that warnings still get + added to Kconfig.warnings when 'warn_to_stderr' is True. + + Just as for warnings printed to stderr, only warnings that are enabled + will get added to Kconfig.warnings. See the various Kconfig.warn* + variables. + + missing_syms: + A list with (name, value) tuples for all assignments to undefined symbols + within the most recently loaded .config file(s). 'name' is the symbol + name without the 'CONFIG_' prefix. 'value' is a string that gives the + right-hand side of the assignment verbatim. + + See Kconfig.load_config() as well. + + srctree: + The value of the $srctree environment variable when the configuration was + loaded, or the empty string if $srctree wasn't set. This gives nice + behavior with os.path.join(), which treats "" as the current directory, + without adding "./". + + Kconfig files are looked up relative to $srctree (unless absolute paths + are used), and .config files are looked up relative to $srctree if they + are not found in the current directory. This is used to support + out-of-tree builds. The C tools use this environment variable in the same + way. + + Changing $srctree after creating the Kconfig instance has no effect. Only + the value when the configuration is loaded matters. This avoids surprises + if multiple configurations are loaded with different values for $srctree. + + config_prefix: + The value of the $CONFIG_ environment variable when the configuration was + loaded. This is the prefix used (and expected) on symbol names in .config + files and C headers. Defaults to "CONFIG_". Used in the same way in the C + tools. + + Like for srctree, only the value of $CONFIG_ when the configuration is + loaded matters. + + filename/linenr: + The current parsing location, for use in Python preprocessor functions. + See the module docstring. + """ + __slots__ = ( + "_encoding", + "_functions", + "_set_match", + "_srctree_prefix", + "_unset_match", + "_warn_assign_no_prompt", + "choices", + "comments", + "config_prefix", + "const_syms", + "defconfig_list", + "defined_syms", + "env_vars", + "kconfig_filenames", + "m", + "menus", + "missing_syms", + "modules", + "n", + "named_choices", + "srctree", + "syms", + "top_node", + "unique_choices", + "unique_defined_syms", + "variables", + "warn", + "warn_assign_override", + "warn_assign_redun", + "warn_assign_undef", + "warn_to_stderr", + "warnings", + "y", + + # Parsing-related + "_parsing_kconfigs", + "_readline", + "filename", + "linenr", + "_include_path", + "_filestack", + "_line", + "_tokens", + "_tokens_i", + "_reuse_tokens", + ) # # Public interface # - def __init__(self, filename="Kconfig", base_dir=None, print_warnings=True, - print_undef_assign=False): - """Creates a new Config object, representing a Kconfig configuration. - Raises Kconfig_Syntax_Error on syntax errors. - - filename (default: "Kconfig"): The base Kconfig file of the - configuration. For the Linux kernel, you'll probably want "Kconfig" - from the top-level directory, as environment variables will make - sure the right Kconfig is included from there - (arch/<architecture>/Kconfig). If you are using Kconfiglib via 'make - scriptconfig', the filename of the base base Kconfig file will be in - sys.argv[1]. - - base_dir (default: None): The base directory relative to which 'source' - statements within Kconfig files will work. For the Linux kernel this - should be the top-level directory of the kernel tree. $-references - to existing environment variables will be expanded. - - If None (the default), the environment variable 'srctree' will be - used if set, and the current directory otherwise. 'srctree' is set - by the Linux makefiles to the top-level kernel directory. A default - of "." would not work with an alternative build directory. - - print_warnings (default: True): Set to True if warnings related to this - configuration should be printed to stderr. This can be changed later - with Config.set_print_warnings(). It is provided as a constructor - argument since warnings might be generated during parsing. - - print_undef_assign (default: False): Set to True if informational - messages related to assignments to undefined symbols should be - printed to stderr for this configuration. Can be changed later with - Config.set_print_undef_assign().""" - - # The set of all symbols, indexed by name (a string) - self.syms = {} - # Python 2/3 compatibility hack. This is the only one needed. - self.syms_iter = self.syms.values if sys.version_info[0] >= 3 else \ - self.syms.itervalues + def __init__(self, filename="Kconfig", warn=True, warn_to_stderr=True, + encoding="utf-8"): + """ + Creates a new Kconfig object by parsing Kconfig files. + Note that Kconfig files are not the same as .config files (which store + configuration symbol values). + + See the module docstring for some environment variables that influence + default warning settings (KCONFIG_WARN_UNDEF and + KCONFIG_WARN_UNDEF_ASSIGN). + + Raises KconfigError on syntax/semantic errors, and OSError or (possibly + a subclass of) IOError on IO errors ('errno', 'strerror', and + 'filename' are available). Note that IOError is an alias for OSError on + Python 3, so it's enough to catch OSError there. If you need Python 2/3 + compatibility, it's easiest to catch EnvironmentError, which is a + common base class of OSError/IOError on Python 2 and an alias for + OSError on Python 3. + + filename (default: "Kconfig"): + The Kconfig file to load. For the Linux kernel, you'll want "Kconfig" + from the top-level directory, as environment variables will make sure + the right Kconfig is included from there (arch/$SRCARCH/Kconfig as of + writing). + + If $srctree is set, 'filename' will be looked up relative to it. + $srctree is also used to look up source'd files within Kconfig files. + See the class documentation. + + If you are using Kconfiglib via 'make scriptconfig', the filename of + the base base Kconfig file will be in sys.argv[1]. It's currently + always "Kconfig" in practice. + + warn (default: True): + True if warnings related to this configuration should be generated. + This can be changed later by setting Kconfig.warn to True/False. It + is provided as a constructor argument since warnings might be + generated during parsing. + + See the other Kconfig.warn_* variables as well, which enable or + suppress certain warnings when warnings are enabled. + + All generated warnings are added to the Kconfig.warnings list. See + the class documentation. + + warn_to_stderr (default: True): + True if warnings should be printed to stderr in addition to being + added to Kconfig.warnings. + + This can be changed later by setting Kconfig.warn_to_stderr to + True/False. + + encoding (default: "utf-8"): + The encoding to use when reading and writing files, and when decoding + output from commands run via $(shell). If None, the encoding + specified in the current locale will be used. + + The "utf-8" default avoids exceptions on systems that are configured + to use the C locale, which implies an ASCII encoding. + + This parameter has no effect on Python 2, due to implementation + issues (regular strings turning into Unicode strings, which are + distinct in Python 2). Python 2 doesn't decode regular strings + anyway. + + Related PEP: https://www.python.org/dev/peps/pep-0538/ + """ + self._encoding = encoding - # The set of all defined symbols in the configuration in the order they - # appear in the Kconfig files. This excludes the special symbols n, m, - # and y as well as symbols that are referenced but never defined. - self.kconfig_syms = [] + self.srctree = os.getenv("srctree", "") + # A prefix we can reliably strip from glob() results to get a filename + # relative to $srctree. relpath() can cause issues for symlinks, + # because it assumes symlink/../foo is the same as foo/. + self._srctree_prefix = realpath(self.srctree) + os.sep - # The set of all named choices (yes, choices can have names), indexed - # by name (a string) - self.named_choices = {} + self.warn = warn + self.warn_to_stderr = warn_to_stderr + self.warn_assign_undef = os.getenv("KCONFIG_WARN_UNDEF_ASSIGN") == "y" + self.warn_assign_override = True + self.warn_assign_redun = True + self._warn_assign_no_prompt = True - # Lists containing all choices, menus and comments in the configuration + self.warnings = [] + + self.config_prefix = os.getenv("CONFIG_", "CONFIG_") + # Regular expressions for parsing .config files + self._set_match = _re_match(self.config_prefix + r"([^=]+)=(.*)") + self._unset_match = _re_match(r"# {}([^ ]+) is not set".format( + self.config_prefix)) + + self.syms = {} + self.const_syms = {} + self.defined_syms = [] + self.missing_syms = [] + self.named_choices = {} self.choices = [] self.menus = [] self.comments = [] - def register_special_symbol(type_, name, val): + for nmy in "n", "m", "y": sym = Symbol() - sym.is_special_ = True - sym.is_defined_ = True - sym.config = self - sym.name = name - sym.type = type_ - sym.cached_val = val - self.syms[name] = sym - return sym - - # The special symbols n, m and y, used as shorthand for "n", "m" and - # "y" - self.n = register_special_symbol(TRISTATE, "n", "n") - self.m = register_special_symbol(TRISTATE, "m", "m") - self.y = register_special_symbol(TRISTATE, "y", "y") - # DEFCONFIG_LIST uses this - register_special_symbol(STRING, "UNAME_RELEASE", platform.uname()[2]) - - # The symbol with "option defconfig_list" set, containing a list of - # default .config files - self.defconfig_sym = None - - # See Symbol.get_(src)arch() - self.arch = os.environ.get("ARCH") - self.srcarch = os.environ.get("SRCARCH") - - # If you set CONFIG_ in the environment, Kconfig will prefix all symbols - # with its value when saving the configuration, instead of using the default, "CONFIG_". - self.config_prefix = os.environ.get("CONFIG_") - if self.config_prefix is None: - self.config_prefix = "CONFIG_" - - # See Config.__init__(). We need this for get_defconfig_filename(). - self.srctree = os.environ.get("srctree") - if self.srctree is None: - self.srctree = "." + sym.kconfig = self + sym.name = nmy + sym.is_constant = True + sym.orig_type = TRISTATE + sym._cached_tri_val = STR_TO_TRI[nmy] + + self.const_syms[nmy] = sym + + self.n = self.const_syms["n"] + self.m = self.const_syms["m"] + self.y = self.const_syms["y"] + + # Make n/m/y well-formed symbols + for nmy in "n", "m", "y": + sym = self.const_syms[nmy] + sym.rev_dep = sym.weak_rev_dep = sym.direct_dep = self.n + + # Maps preprocessor variables names to Variable instances + self.variables = {} + + # Predefined preprocessor functions, with min/max number of arguments + self._functions = { + "info": (_info_fn, 1, 1), + "error-if": (_error_if_fn, 2, 2), + "filename": (_filename_fn, 0, 0), + "lineno": (_lineno_fn, 0, 0), + "shell": (_shell_fn, 1, 1), + "warning-if": (_warning_if_fn, 2, 2), + } + + # Add any user-defined preprocessor functions + try: + self._functions.update( + importlib.import_module( + os.getenv("KCONFIG_FUNCTIONS", "kconfigfunctions") + ).functions) + except ImportError: + pass + + # This determines whether previously unseen symbols are registered. + # They shouldn't be if we parse expressions after parsing, as part of + # Kconfig.eval_string(). + self._parsing_kconfigs = True + + self.modules = self._lookup_sym("MODULES") + self.defconfig_list = None + + self.top_node = MenuNode() + self.top_node.kconfig = self + self.top_node.item = MENU + self.top_node.is_menuconfig = True + self.top_node.visibility = self.y + self.top_node.prompt = ("Main menu", self.y) + self.top_node.parent = None + self.top_node.dep = self.y + self.top_node.filename = filename + self.top_node.linenr = 1 + self.top_node.include_path = () + + # Parse the Kconfig files + + # Not used internally. Provided as a convenience. + self.kconfig_filenames = [filename] + self.env_vars = set() + # Keeps track of the location in the parent Kconfig files. Kconfig + # files usually source other Kconfig files. See _enter_file(). + self._filestack = [] + self._include_path = () + + # The current parsing location self.filename = filename - self.base_dir = self.srctree if base_dir is None else \ - os.path.expandvars(base_dir) + self.linenr = 0 - # The 'mainmenu' text - self.mainmenu_text = None + # Used to avoid retokenizing lines when we discover that they're not + # part of the construct currently being parsed. This is kinda like an + # unget operation. + self._reuse_tokens = False - # The filename of the most recently loaded .config file - self.config_filename = None - # The textual header of the most recently loaded .config, uncommented - self.config_header = None + # Open the top-level Kconfig file. Store the readline() method directly + # as a small optimization. + self._readline = self._open(join(self.srctree, filename), "r").readline - self.print_warnings = print_warnings - self.print_undef_assign = print_undef_assign - self._warnings = [] + try: + # Parse the Kconfig files + self._parse_block(None, self.top_node, self.top_node) + self.top_node.list = self.top_node.next + self.top_node.next = None + except UnicodeDecodeError as e: + _decoding_error(e, self.filename) - # For parsing routines that stop when finding a line belonging to a - # different construct, these holds that line and the tokenized version - # of that line. The purpose is to avoid having to re-tokenize the line, - # which is inefficient and causes problems when recording references to - # symbols. - self.end_line = None - self.end_line_tokens = None + # Close the top-level Kconfig file. __self__ fetches the 'file' object + # for the method. + self._readline.__self__.close() - # See the comment in _parse_expr(). - self._cur_item = None - self._line = None - self._filename = None - self._linenr = None - self._transform_m = None + self._parsing_kconfigs = False - # Parse the Kconfig files - self.top_block = [] - self._parse_file(filename, None, None, None, self.top_block) + # Do various menu tree post-processing + self._finalize_node(self.top_node, self.y) + + self.unique_defined_syms = _ordered_unique(self.defined_syms) + self.unique_choices = _ordered_unique(self.choices) - # Build Symbol.dep for all symbols + # Do sanity checks. Some of these depend on everything being finalized. + self._check_sym_sanity() + self._check_choice_sanity() + + # KCONFIG_STRICT is an older alias for KCONFIG_WARN_UNDEF, supported + # for backwards compatibility + if os.getenv("KCONFIG_WARN_UNDEF") == "y" or \ + os.getenv("KCONFIG_STRICT") == "y": + + self._check_undef_syms() + + # Build Symbol._dependents for all symbols and choices self._build_dep() - def get_arch(self): - """Returns the value the environment variable ARCH had at the time the - Config instance was created, or None if ARCH was not set. For the - kernel, this corresponds to the architecture being built for, with - values such as "i386" or "mips".""" - return self.arch - - def get_srcarch(self): - """Returns the value the environment variable SRCARCH had at the time - the Config instance was created, or None if SRCARCH was not set. For - the kernel, this corresponds to the particular arch/ subdirectory - containing architecture-specific code.""" - return self.srcarch - - def get_srctree(self): - """Returns the value the environment variable srctree had at the time - the Config instance was created, or None if srctree was not defined. - This variable points to the source directory and is used when building - in a separate directory.""" - return self.srctree - - def get_base_dir(self): - """Returns the base directory relative to which 'source' statements - will work, passed as an argument to Config.__init__().""" - return self.base_dir - - def get_kconfig_filename(self): - """Returns the name of the (base) kconfig file this configuration was - loaded from.""" - return self.filename - - def get_config_filename(self): - """Returns the filename of the most recently loaded configuration file, - or None if no configuration has been loaded.""" - return self.config_filename - - def get_config_header(self): - """Returns the (uncommented) textual header of the .config file most - recently loaded with load_config(). Returns None if no .config file has - been loaded or if the most recently loaded .config file has no header. - The header consists of all lines up to but not including the first line - that either - - 1. Does not start with "#" - 2. Has the form "# CONFIG_FOO is not set." - """ - return self.config_header - - def get_mainmenu_text(self): - """Returns the text of the 'mainmenu' statement (with $-references to - symbols replaced by symbol values), or None if the configuration has no - 'mainmenu' statement.""" - return None if self.mainmenu_text is None else \ - self._expand_sym_refs(self.mainmenu_text) - - def get_defconfig_filename(self): - """Returns the name of the defconfig file, which is the first existing - file in the list given in a symbol having 'option defconfig_list' set. - $-references to symbols will be expanded ("$FOO bar" -> "foo bar" if - FOO has the value "foo"). Returns None in case of no defconfig file. - Setting 'option defconfig_list' on multiple symbols currently results - in undefined behavior. - - If the environment variable 'srctree' was set when the Config was - created, get_defconfig_filename() will first look relative to that - directory before looking in the current directory; see - Config.__init__(). - - WARNING: A wart here is that scripts/kconfig/Makefile sometimes uses - the --defconfig=<defconfig> option when calling the C implementation of - e.g. 'make defconfig'. This option overrides the 'option - defconfig_list' symbol, meaning the result from - get_defconfig_filename() might not match what 'make defconfig' would - use. That probably ought to be worked around somehow, so that this - function always gives the "expected" result.""" - if self.defconfig_sym is None: - return None - for filename, cond_expr in self.defconfig_sym.def_exprs: - if self._eval_expr(cond_expr) == "y": - filename = self._expand_sym_refs(filename) - # We first look in $srctree. os.path.join() won't work here as - # an absolute path in filename would override $srctree. - srctree_filename = os.path.normpath(self.srctree + "/" + - filename) - if os.path.exists(srctree_filename): - return srctree_filename - if os.path.exists(filename): - return filename - return None + # Check for dependency loops + check_dep_loop_sym = _check_dep_loop_sym # Micro-optimization + for sym in self.unique_defined_syms: + check_dep_loop_sym(sym, False) - def get_symbol(self, name): - """Returns the symbol with name 'name', or None if no such symbol - appears in the configuration. An alternative shorthand is conf[name], - where conf is a Config instance, though that will instead raise - KeyError if the symbol does not exist.""" - return self.syms.get(name) + # Add extra dependencies from choices to choice symbols that get + # awkward during dependency loop detection + self._add_choice_deps() - def __getitem__(self, name): - """Returns the symbol with name 'name'. Raises KeyError if the symbol - does not appear in the configuration.""" - return self.syms[name] + @property + def mainmenu_text(self): + """ + See the class documentation. + """ + return self.top_node.prompt[0] - def get_symbols(self, all_symbols=True): - """Returns a list of symbols from the configuration. An alternative for - iterating over all defined symbols (in the order of definition) is + @property + def defconfig_filename(self): + """ + See the class documentation. + """ + if self.defconfig_list: + for filename, cond in self.defconfig_list.defaults: + if expr_value(cond): + try: + with self._open_config(filename.str_value) as f: + return f.name + except EnvironmentError: + continue - for sym in config: - ... + return None - which relies on Config implementing __iter__() and is equivalent to + def load_config(self, filename=None, replace=True, verbose=None): + """ + Loads symbol values from a file in the .config format. Equivalent to + calling Symbol.set_value() to set each of the values. - for sym in config.get_symbols(False): - ... + "# CONFIG_FOO is not set" within a .config file sets the user value of + FOO to n. The C tools work the same way. - all_symbols (default: True): If True, all symbols -- including special - and undefined symbols -- will be included in the result, in an - undefined order. If False, only symbols actually defined and not - merely referred to in the configuration will be included in the - result, and will appear in the order that they are defined within - the Kconfig configuration files.""" - return list(self.syms.values()) if all_symbols else self.kconfig_syms + For each symbol, the Symbol.user_value attribute holds the value the + symbol was assigned in the .config file (if any). The user value might + differ from Symbol.str/tri_value if there are unsatisfied dependencies. - def __iter__(self): - """Convenience function for iterating over the set of all defined - symbols in the configuration, used like + Calling this function also updates the Kconfig.missing_syms attribute + with a list of all assignments to undefined symbols within the + configuration file. Kconfig.missing_syms is cleared if 'replace' is + True, and appended to otherwise. See the documentation for + Kconfig.missing_syms as well. - for sym in conf: - ... + See the Kconfig.__init__() docstring for raised exceptions + (OSError/IOError). KconfigError is never raised here. - The iteration happens in the order of definition within the Kconfig - configuration files. Symbols only referred to but not defined will not - be included, nor will the special symbols n, m, and y. If you want to - include such symbols as well, see config.get_symbols().""" - return iter(self.kconfig_syms) + filename (default: None): + Path to load configuration from (a string). Respects $srctree if set + (see the class documentation). - def get_choices(self): - """Returns a list containing all choice statements in the - configuration, in the order they appear in the Kconfig files.""" - return self.choices + If 'filename' is None (the default), the configuration file to load + (if any) is calculated automatically, giving the behavior you'd + usually want: - def get_menus(self): - """Returns a list containing all menus in the configuration, in the - order they appear in the Kconfig files.""" - return self.menus + 1. If the KCONFIG_CONFIG environment variable is set, it gives the + path to the configuration file to load. Otherwise, ".config" is + used. See standard_config_filename(). - def get_comments(self): - """Returns a list containing all comments in the configuration, in the - order they appear in the Kconfig files.""" - return self.comments + 2. If the path from (1.) doesn't exist, the configuration file + given by kconf.defconfig_filename is loaded instead, which is + derived from the 'option defconfig_list' symbol. - def get_top_level_items(self): - """Returns a list containing the items (symbols, menus, choices, and - comments) at the top level of the configuration -- that is, all items - that do not appear within a menu or choice. The items appear in the - same order as within the configuration.""" - return self.top_block + 3. If (1.) and (2.) fail to find a configuration file to load, no + configuration file is loaded, and symbols retain their current + values (e.g., their default values). This is not an error. - def load_config(self, filename, replace=True): - """Loads symbol values from a file in the familiar .config format. - Equivalent to calling Symbol.set_user_value() to set each of the - values. + See the return value as well. - "# CONFIG_FOO is not set" within a .config file is treated specially - and sets the user value of FOO to 'n'. The C implementation works the - same way. + replace (default: True): + If True, all existing user values will be cleared before loading the + .config. Pass False to merge configurations. - filename: The .config file to load. $-references to existing - environment variables will be expanded. For scripts to work even when - an alternative build directory is used with the Linux kernel, you - need to refer to the top-level kernel directory with "$srctree". + verbose (default: None): + Limited backwards compatibility to prevent crashes. A warning is + printed if anything but None is passed. - replace (default: True): True if the configuration should replace the - old configuration; False if it should add to it. + Prior to Kconfiglib 12.0.0, this option enabled printing of messages + to stdout when 'filename' was None. A message is (always) returned + now instead, which is more flexible. - Returns a list or warnings (hopefully empty) + Will probably be removed in some future version. + + Returns a string with a message saying which file got loaded (or + possibly that no file got loaded, when 'filename' is None). This is + meant to reduce boilerplate in tools, which can do e.g. + print(kconf.load_config()). The returned message distinguishes between + loading (replace == True) and merging (replace == False). """ + if verbose is not None: + _warn_verbose_deprecated("load_config") + + msg = None + if filename is None: + filename = standard_config_filename() + if not exists(filename) and \ + not exists(join(self.srctree, filename)): + defconfig = self.defconfig_filename + if defconfig is None: + return "Using default symbol values (no '{}')" \ + .format(filename) + + msg = " default configuration '{}' (no '{}')" \ + .format(defconfig, filename) + filename = defconfig + + if not msg: + msg = " configuration '{}'".format(filename) + + # Disable the warning about assigning to symbols without prompts. This + # is normal and expected within a .config file. + self._warn_assign_no_prompt = False + + # This stub only exists to make sure _warn_assign_no_prompt gets + # reenabled + try: + self._load_config(filename, replace) + except UnicodeDecodeError as e: + _decoding_error(e, filename) + finally: + self._warn_assign_no_prompt = True + + return ("Loaded" if replace else "Merged") + msg + + def _load_config(self, filename, replace): + with self._open_config(filename) as f: + if replace: + self.missing_syms = [] + + # If we're replacing the configuration, keep track of which + # symbols and choices got set so that we can unset the rest + # later. This avoids invalidating everything and is faster. + # Another benefit is that invalidation must be rock solid for + # it to work, making it a good test. + + for sym in self.unique_defined_syms: + sym._was_set = False + + for choice in self.unique_choices: + choice._was_set = False + + # Small optimizations + set_match = self._set_match + unset_match = self._unset_match + get_sym = self.syms.get + + for linenr, line in enumerate(f, 1): + # The C tools ignore trailing whitespace + line = line.rstrip() + + match = set_match(line) + if match: + name, val = match.groups() + sym = get_sym(name) + if not sym or not sym.nodes: + self._undef_assign(name, val, filename, linenr) + continue + + if sym.orig_type in _BOOL_TRISTATE: + # The C implementation only checks the first character + # to the right of '=', for whatever reason + if not (sym.orig_type is BOOL + and val.startswith(("y", "n")) or + sym.orig_type is TRISTATE + and val.startswith(("y", "m", "n"))): + self._warn("'{}' is not a valid value for the {} " + "symbol {}. Assignment ignored." + .format(val, TYPE_TO_STR[sym.orig_type], + _name_and_loc(sym)), + filename, linenr) + continue + + val = val[0] + + if sym.choice and val != "n": + # During .config loading, we infer the mode of the + # choice from the kind of values that are assigned + # to the choice symbols + + prev_mode = sym.choice.user_value + if prev_mode is not None and \ + TRI_TO_STR[prev_mode] != val: + + self._warn("both m and y assigned to symbols " + "within the same choice", + filename, linenr) + + # Set the choice's mode + sym.choice.set_value(val) + + elif sym.orig_type is STRING: + match = _conf_string_match(val) + if not match: + self._warn("malformed string literal in " + "assignment to {}. Assignment ignored." + .format(_name_and_loc(sym)), + filename, linenr) + continue + + val = unescape(match.group(1)) - self._warnings = [] - # Regular expressions for parsing .config files - _set_re_match = re.compile(r"{}(\w+)=(.*)".format(self.config_prefix)).match - _unset_re_match = re.compile(r"# {}(\w+) is not set".format(self.config_prefix)).match + else: + match = unset_match(line) + if not match: + # Print a warning for lines that match neither + # set_match() nor unset_match() and that are not blank + # lines or comments. 'line' has already been + # rstrip()'d, so blank lines show up as "" here. + if line and not line.lstrip().startswith("#"): + self._warn("ignoring malformed line '{}'" + .format(line), + filename, linenr) - # Put this first so that a missing file doesn't screw up our state - filename = os.path.expandvars(filename) - line_feeder = _FileFeed(filename) + continue - self.config_filename = filename + name = match.group(1) + sym = get_sym(name) + if not sym or not sym.nodes: + self._undef_assign(name, "n", filename, linenr) + continue - # - # Read header - # + if sym.orig_type not in _BOOL_TRISTATE: + continue - def is_header_line(line): - return line is not None and line.startswith("#") and \ - not _unset_re_match(line) + val = "n" - self.config_header = None + # Done parsing the assignment. Set the value. - line = line_feeder.peek_next() - if is_header_line(line): - self.config_header = "" - while is_header_line(line_feeder.peek_next()): - self.config_header += line_feeder.get_next()[1:] - # Remove trailing newline - if self.config_header.endswith("\n"): - self.config_header = self.config_header[:-1] + if sym._was_set: + self._assigned_twice(sym, val, filename, linenr) - # - # Read assignments. Hotspot for some workloads. - # + sym.set_value(val) - def warn_override(filename, linenr, name, old_user_val, new_user_val): - self._warn('overriding the value of {0}. ' - 'Old value: "{1}", new value: "{2}".' - .format(name, old_user_val, new_user_val), - filename, linenr) - - # Invalidate everything to keep things simple. It might be possible to - # improve performance for the case where multiple configurations are - # loaded by only invalidating a symbol (and its dependent symbols) if - # the new user value differs from the old. One complication would be - # that symbols not mentioned in the .config must lose their user value - # when replace = True, which is the usual case. if replace: - self.unset_user_values() + # If we're replacing the configuration, unset the symbols that + # didn't get set + + for sym in self.unique_defined_syms: + if not sym._was_set: + sym.unset_value() + + for choice in self.unique_choices: + if not choice._was_set: + choice.unset_value() + + def _undef_assign(self, name, val, filename, linenr): + # Called for assignments to undefined symbols during .config loading + + self.missing_syms.append((name, val)) + if self.warn_assign_undef: + self._warn( + "attempt to assign the value '{}' to the undefined symbol {}" + .format(val, name), filename, linenr) + + def _assigned_twice(self, sym, new_val, filename, linenr): + # Called when a symbol is assigned more than once in a .config file + + # Use strings for bool/tristate user values in the warning + if sym.orig_type in _BOOL_TRISTATE: + user_val = TRI_TO_STR[sym.user_value] else: - self._invalidate_all() + user_val = sym.user_value + + msg = '{} set more than once. Old value "{}", new value "{}".'.format( + _name_and_loc(sym), user_val, new_val) + + if user_val == new_val: + if self.warn_assign_redun: + self._warn(msg, filename, linenr) + elif self.warn_assign_override: + self._warn(msg, filename, linenr) + + def write_autoconf(self, filename, + header="/* Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) */\n"): + r""" + Writes out symbol values as a C header file, matching the format used + by include/generated/autoconf.h in the kernel. + + The ordering of the #defines matches the one generated by + write_config(). The order in the C implementation depends on the hash + table implementation as of writing, and so won't match. + + If 'filename' exists and its contents is identical to what would get + written out, it is left untouched. This avoids updating file metadata + like the modification time and possibly triggering redundant work in + build tools. + + filename: + Self-explanatory. + + header (default: "/* Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib) */\n"): + Text that will be inserted verbatim at the beginning of the file. You + would usually want it enclosed in '/* */' to make it a C comment, + and include a final terminating newline. + """ + self._write_if_changed(filename, self._autoconf_contents(header)) + + def _autoconf_contents(self, header): + # write_autoconf() helper. Returns the contents to write as a string, + # with 'header' at the beginning. + + # "".join()ed later + chunks = [header] + add = chunks.append + + for sym in self.unique_defined_syms: + # _write_to_conf is determined when the value is calculated. This + # is a hidden function call due to property magic. + # + # Note: In client code, you can check if sym.config_string is empty + # instead, to avoid accessing the internal _write_to_conf variable + # (though it's likely to keep working). + val = sym.str_value + if not sym._write_to_conf: + continue + if sym.orig_type in _BOOL_TRISTATE: + if val == "y": + add("#define {}{} 1\n" + .format(self.config_prefix, sym.name)) + elif val == "m": + add("#define {}{}_MODULE 1\n" + .format(self.config_prefix, sym.name)) + + elif sym.orig_type is STRING: + add('#define {}{} "{}"\n' + .format(self.config_prefix, sym.name, escape(val))) + + else: # sym.orig_type in _INT_HEX: + if sym.orig_type is HEX and \ + not val.startswith(("0x", "0X")): + val = "0x" + val + + add("#define {}{} {}\n" + .format(self.config_prefix, sym.name, val)) + + return "".join(chunks) + + def write_config(self, filename=None, + header="# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)\n", + save_old=True, verbose=None): + r""" + Writes out symbol values in the .config format. The format matches the + C implementation, including ordering. + + Symbols appear in the same order in generated .config files as they do + in the Kconfig files. For symbols defined in multiple locations, a + single assignment is written out corresponding to the first location + where the symbol is defined. + + See the 'Intro to symbol values' section in the module docstring to + understand which symbols get written out. + + If 'filename' exists and its contents is identical to what would get + written out, it is left untouched. This avoids updating file metadata + like the modification time and possibly triggering redundant work in + build tools. + + See the Kconfig.__init__() docstring for raised exceptions + (OSError/IOError). KconfigError is never raised here. + + filename (default: None): + Filename to save configuration to (a string). + + If None (the default), the filename in the environment variable + KCONFIG_CONFIG is used if set, and ".config" otherwise. See + standard_config_filename(). + + header (default: "# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)\n"): + Text that will be inserted verbatim at the beginning of the file. You + would usually want each line to start with '#' to make it a comment, + and include a final terminating newline. + + save_old (default: True): + If True and <filename> already exists, a copy of it will be saved to + <filename>.old in the same directory before the new configuration is + written. + + Errors are silently ignored if <filename>.old cannot be written (e.g. + due to being a directory, or <filename> being something like + /dev/null). + + verbose (default: None): + Limited backwards compatibility to prevent crashes. A warning is + printed if anything but None is passed. + + Prior to Kconfiglib 12.0.0, this option enabled printing of messages + to stdout when 'filename' was None. A message is (always) returned + now instead, which is more flexible. + + Will probably be removed in some future version. + + Returns a string with a message saying which file got saved. This is + meant to reduce boilerplate in tools, which can do e.g. + print(kconf.write_config()). + """ + if verbose is not None: + _warn_verbose_deprecated("write_config") + + if filename is None: + filename = standard_config_filename() + + contents = self._config_contents(header) + if self._contents_eq(filename, contents): + return "No change to '{}'".format(filename) + + if save_old: + _save_old(filename) + + with self._open(filename, "w") as f: + f.write(contents) + + return "Configuration saved to '{}'".format(filename) + + def _config_contents(self, header): + # write_config() helper. Returns the contents to write as a string, + # with 'header' at the beginning. + # + # More memory friendly would be to 'yield' the strings and + # "".join(_config_contents()), but it was a bit slower on my system. + + # node_iter() was used here before commit 3aea9f7 ("Add '# end of + # <menu>' after menus in .config"). Those comments get tricky to + # implement with it. + + for sym in self.unique_defined_syms: + sym._visited = False + + # Did we just print an '# end of ...' comment? + after_end_comment = False + + # "".join()ed later + chunks = [header] + add = chunks.append + + node = self.top_node while 1: - line = line_feeder.get_next() - if line is None: - return self._warnings + # Jump to the next node with an iterative tree walk + if node.list: + node = node.list + elif node.next: + node = node.next + else: + while node.parent: + node = node.parent + + # Add a comment when leaving visible menus + if node.item is MENU and expr_value(node.dep) and \ + expr_value(node.visibility) and \ + node is not self.top_node: + add("# end of {}\n".format(node.prompt[0])) + after_end_comment = True + + if node.next: + node = node.next + break + else: + # No more nodes + return "".join(chunks) + + # Generate configuration output for the node + + item = node.item + + if item.__class__ is Symbol: + if item._visited: + continue + item._visited = True + + conf_string = item.config_string + if not conf_string: + continue - line = line.rstrip() + if after_end_comment: + # Add a blank line before the first symbol printed after an + # '# end of ...' comment + after_end_comment = False + add("\n") + add(conf_string) + + elif expr_value(node.dep) and \ + ((item is MENU and expr_value(node.visibility)) or + item is COMMENT): + + add("\n#\n# {}\n#\n".format(node.prompt[0])) + after_end_comment = False + + def write_min_config(self, filename, + header="# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)\n"): + """ + Writes out a "minimal" configuration file, omitting symbols whose value + matches their default value. The format matches the one produced by + 'make savedefconfig'. + + The resulting configuration file is incomplete, but a complete + configuration can be derived from it by loading it. Minimal + configuration files can serve as a more manageable configuration format + compared to a "full" .config file, especially when configurations files + are merged or edited by hand. + + See the Kconfig.__init__() docstring for raised exceptions + (OSError/IOError). KconfigError is never raised here. + + filename: + Self-explanatory. + + header (default: "# Generated by Kconfiglib (https://github.com/ulfalizer/Kconfiglib)\n"): + Text that will be inserted verbatim at the beginning of the file. You + would usually want each line to start with '#' to make it a comment, + and include a final terminating newline. + + Returns a string with a message saying which file got saved. This is + meant to reduce boilerplate in tools, which can do e.g. + print(kconf.write_min_config()). + """ + contents = self._min_config_contents(header) + if self._contents_eq(filename, contents): + return "No change to '{}'".format(filename) + + with self._open(filename, "w") as f: + f.write(contents) + + return "Minimal configuration saved to '{}'".format(filename) + + def _min_config_contents(self, header): + # write_min_config() helper. Returns the contents to write as a string, + # with 'header' at the beginning. + + chunks = [header] + add = chunks.append + + for sym in self.unique_defined_syms: + # Skip symbols that cannot be changed. Only check + # non-choice symbols, as selects don't affect choice + # symbols. + if not sym.choice and \ + sym.visibility <= expr_value(sym.rev_dep): + continue + + # Skip symbols whose value matches their default + if sym.str_value == sym._str_default(): + continue + + # Skip symbols that would be selected by default in a + # choice, unless the choice is optional or the symbol type + # isn't bool (it might be possible to set the choice mode + # to n or the symbol to m in those cases). + if sym.choice and \ + not sym.choice.is_optional and \ + sym.choice._selection_from_defaults() is sym and \ + sym.orig_type is BOOL and \ + sym.tri_value == 2: + continue + + add(sym.config_string) + + return "".join(chunks) + + def sync_deps(self, path): + """ + Creates or updates a directory structure that can be used to avoid + doing a full rebuild whenever the configuration is changed, mirroring + include/config/ in the kernel. - set_match = _set_re_match(line) - if set_match: - name, val = set_match.groups() + This function is intended to be called during each build, before + compiling source files that depend on configuration symbols. - if val.startswith('"'): - if len(val) < 2 or val[-1] != '"': - _parse_error(line, "malformed string literal", - line_feeder.filename, line_feeder.linenr) - # Strip quotes and remove escapings. The unescaping - # procedure should be safe since " can only appear as \" - # inside the string. - val = val[1:-1].replace('\\"', '"').replace("\\\\", "\\") + See the Kconfig.__init__() docstring for raised exceptions + (OSError/IOError). KconfigError is never raised here. + path: + Path to directory + + sync_deps(path) does the following: + + 1. If the directory <path> does not exist, it is created. + + 2. If <path>/auto.conf exists, old symbol values are loaded from it, + which are then compared against the current symbol values. If a + symbol has changed value (would generate different output in + autoconf.h compared to before), the change is signaled by + touch'ing a file corresponding to the symbol. + + The first time sync_deps() is run on a directory, <path>/auto.conf + won't exist, and no old symbol values will be available. This + logically has the same effect as updating the entire + configuration. + + The path to a symbol's file is calculated from the symbol's name + by replacing all '_' with '/' and appending '.h'. For example, the + symbol FOO_BAR_BAZ gets the file <path>/foo/bar/baz.h, and FOO + gets the file <path>/foo.h. + + This scheme matches the C tools. The point is to avoid having a + single directory with a huge number of files, which the underlying + filesystem might not handle well. + + 3. A new auto.conf with the current symbol values is written, to keep + track of them for the next build. + + If auto.conf exists and its contents is identical to what would + get written out, it is left untouched. This avoids updating file + metadata like the modification time and possibly triggering + redundant work in build tools. + + + The last piece of the puzzle is knowing what symbols each source file + depends on. Knowing that, dependencies can be added from source files + to the files corresponding to the symbols they depends on. The source + file will then get recompiled (only) when the symbol value changes + (provided sync_deps() is run first during each build). + + The tool in the kernel that extracts symbol dependencies from source + files is scripts/basic/fixdep.c. Missing symbol files also correspond + to "not changed", which fixdep deals with by using the $(wildcard) Make + function when adding symbol prerequisites to source files. + + In case you need a different scheme for your project, the sync_deps() + implementation can be used as a template. + """ + if not exists(path): + os.mkdir(path, 0o755) + + # Load old values from auto.conf, if any + self._load_old_vals(path) + + for sym in self.unique_defined_syms: + # _write_to_conf is determined when the value is calculated. This + # is a hidden function call due to property magic. + # + # Note: In client code, you can check if sym.config_string is empty + # instead, to avoid accessing the internal _write_to_conf variable + # (though it's likely to keep working). + val = sym.str_value + + # n tristate values do not get written to auto.conf and autoconf.h, + # making a missing symbol logically equivalent to n + + if sym._write_to_conf: + if sym._old_val is None and \ + sym.orig_type in _BOOL_TRISTATE and \ + val == "n": + # No old value (the symbol was missing or n), new value n. + # No change. + continue + + if val == sym._old_val: + # New value matches old. No change. + continue + + elif sym._old_val is None: + # The symbol wouldn't appear in autoconf.h (because + # _write_to_conf is false), and it wouldn't have appeared in + # autoconf.h previously either (because it didn't appear in + # auto.conf). No change. + continue + + # 'sym' has a new value. Flag it. + _touch_dep_file(path, sym.name) + + # Remember the current values as the "new old" values. + # + # This call could go anywhere after the call to _load_old_vals(), but + # putting it last means _sync_deps() can be safely rerun if it fails + # before this point. + self._write_old_vals(path) + + def _load_old_vals(self, path): + # Loads old symbol values from auto.conf into a dedicated + # Symbol._old_val field. Mirrors load_config(). + # + # The extra field could be avoided with some trickery involving dumping + # symbol values and restoring them later, but this is simpler and + # faster. The C tools also use a dedicated field for this purpose. + + for sym in self.unique_defined_syms: + sym._old_val = None + + try: + auto_conf = self._open(join(path, "auto.conf"), "r") + except EnvironmentError as e: + if e.errno == errno.ENOENT: + # No old values + return + raise + + with auto_conf as f: + for line in f: + match = self._set_match(line) + if not match: + # We only expect CONFIG_FOO=... (and possibly a header + # comment) in auto.conf + continue + + name, val = match.groups() if name in self.syms: sym = self.syms[name] - if sym.user_val is not None: - warn_override(line_feeder.filename, line_feeder.linenr, - name, sym.user_val, val) - - if sym.is_choice_sym: - user_mode = sym.parent.user_mode - if user_mode is not None and user_mode != val: - self._warn("assignment to {0} changes mode of " - 'containing choice from "{1}" to "{2}".' - .format(name, val, user_mode), - line_feeder.filename, - line_feeder.linenr) - - sym._set_user_value_no_invalidate(val, True) + + if sym.orig_type is STRING: + match = _conf_string_match(val) + if not match: + continue + val = unescape(match.group(1)) + + self.syms[name]._old_val = val else: - if self.print_undef_assign: - _stderr_msg('note: attempt to assign the value "{0}" ' - "to the undefined symbol {1}." - .format(val, name), - line_feeder.filename, line_feeder.linenr) + # Flag that the symbol no longer exists, in + # case something still depends on it + _touch_dep_file(path, name) + + def _write_old_vals(self, path): + # Helper for writing auto.conf. Basically just a simplified + # write_config() that doesn't write any comments (including + # '# CONFIG_FOO is not set' comments). The format matches the C + # implementation, though the ordering is arbitrary there (depends on + # the hash table implementation). + # + # A separate helper function is neater than complicating write_config() + # by passing a flag to it, plus we only need to look at symbols here. + + self._write_if_changed( + os.path.join(path, "auto.conf"), + self._old_vals_contents()) + + def _old_vals_contents(self): + # _write_old_vals() helper. Returns the contents to write as a string. + + # Temporary list instead of generator makes this a bit faster + return "".join([ + sym.config_string for sym in self.unique_defined_syms + if not (sym.orig_type in _BOOL_TRISTATE and not sym.tri_value) + ]) + + def node_iter(self, unique_syms=False): + """ + Returns a generator for iterating through all MenuNode's in the Kconfig + tree. The iteration is done in Kconfig definition order (each node is + visited before its children, and the children of a node are visited + before the next node). + + The Kconfig.top_node menu node is skipped. It contains an implicit menu + that holds the top-level items. + + As an example, the following code will produce a list equal to + Kconfig.defined_syms: + + defined_syms = [node.item for node in kconf.node_iter() + if isinstance(node.item, Symbol)] + + unique_syms (default: False): + If True, only the first MenuNode will be included for symbols defined + in multiple locations. + + Using kconf.node_iter(True) in the example above would give a list + equal to unique_defined_syms. + """ + if unique_syms: + for sym in self.unique_defined_syms: + sym._visited = False + + node = self.top_node + while 1: + # Jump to the next node with an iterative tree walk + if node.list: + node = node.list + elif node.next: + node = node.next else: - unset_match = _unset_re_match(line) - if unset_match: - name = unset_match.group(1) - if name in self.syms: - sym = self.syms[name] - if sym.user_val is not None: - warn_override(line_feeder.filename, - line_feeder.linenr, - name, sym.user_val, "n") - - sym._set_user_value_no_invalidate("n", True) - - def write_config(self, filename, header=None): - """Writes out symbol values in the familiar .config format. - - Kconfiglib makes sure the format matches what the C implementation - would generate, down to whitespace. This eases testing. - - filename: The filename under which to save the configuration. - - header (default: None): A textual header that will appear at the - beginning of the file, with each line commented out automatically. - None means no header.""" - - for sym in self.syms_iter(): - sym.already_written = False - - with open(filename, "w") as f: - # Write header - if header is not None: - f.write(_comment(header) + "\n") - - # Build and write configuration - conf_strings = [] - _make_block_conf(self.top_block, conf_strings.append) - f.write("\n".join(conf_strings) + "\n") - - def eval(self, s): - """Returns the value of the expression 's' -- where 's' is represented - as a string -- in the context of the configuration. Raises - Kconfig_Syntax_Error if syntax errors are detected in 's'. - - For example, if FOO and BAR are tristate symbols at least one of which - has the value "y", then config.eval("y && (FOO || BAR)") => "y" - - This function always yields a tristate value. To get the value of - non-bool, non-tristate symbols, use Symbol.get_value(). - - The result of this function is consistent with how evaluation works for - conditional expressions in the configuration as well as in the C - implementation. "m" and m are rewritten as '"m" && MODULES' and 'm && - MODULES', respectively, and a result of "m" will get promoted to "y" if - we're running without modules. - - Syntax checking is somewhat lax, partly to be compatible with lax - parsing in the C implementation.""" - return self._eval_expr(self._parse_expr(self._tokenize(s, True), # Feed - None, # Current symbol/choice - s)) # line - - def unset_user_values(self): - """Resets the values of all symbols, as if Config.load_config() or - Symbol.set_user_value() had never been called.""" - for sym in self.syms_iter(): - sym._unset_user_value_no_recursive_invalidate() - - def set_print_warnings(self, print_warnings): - """Determines whether warnings related to this configuration (for - things like attempting to assign illegal values to symbols with - Symbol.set_user_value()) should be printed to stderr. - - print_warnings: True if warnings should be printed.""" - self.print_warnings = print_warnings - - def set_print_undef_assign(self, print_undef_assign): - """Determines whether informational messages related to assignments to - undefined symbols should be printed to stderr for this configuration. - - print_undef_assign: If True, such messages will be printed.""" - self.print_undef_assign = print_undef_assign + while node.parent: + node = node.parent + if node.next: + node = node.next + break + else: + # No more nodes + return - def __str__(self): - """Returns a string containing various information about the Config.""" - return _lines("Configuration", - "File : " + - self.filename, - "Base directory : " + - self.base_dir, - "Value of $ARCH at creation time : " + - ("(not set)" if self.arch is None else self.arch), - "Value of $SRCARCH at creation time : " + - ("(not set)" if self.srcarch is None else - self.srcarch), - "Source tree (derived from $srctree;", - "defaults to '.' if $srctree isn't set) : " + - self.srctree, - "Most recently loaded .config : " + - ("(no .config loaded)" - if self.config_filename is None else - self.config_filename), - "Print warnings : " + - BOOL_STR[self.print_warnings], - "Print assignments to undefined symbols : " + - BOOL_STR[self.print_undef_assign]) + if unique_syms and node.item.__class__ is Symbol: + if node.item._visited: + continue + node.item._visited = True + + yield node + + def eval_string(self, s): + """ + Returns the tristate value of the expression 's', represented as 0, 1, + and 2 for n, m, and y, respectively. Raises KconfigError on syntax + errors. Warns if undefined symbols are referenced. + + As an example, if FOO and BAR are tristate symbols at least one of + which has the value y, then eval_string("y && (FOO || BAR)") returns + 2 (y). + + To get the string value of non-bool/tristate symbols, use + Symbol.str_value. eval_string() always returns a tristate value, and + all non-bool/tristate symbols have the tristate value 0 (n). + + The expression parsing is consistent with how parsing works for + conditional ('if ...') expressions in the configuration, and matches + the C implementation. m is rewritten to 'm && MODULES', so + eval_string("m") will return 0 (n) unless modules are enabled. + """ + # The parser is optimized to be fast when parsing Kconfig files (where + # an expression can never appear at the beginning of a line). We have + # to monkey-patch things a bit here to reuse it. + + self.filename = None + + self._tokens = self._tokenize("if " + s) + # Strip "if " to avoid giving confusing error messages + self._line = s + self._tokens_i = 1 # Skip the 'if' token + + return expr_value(self._expect_expr_and_eol()) + + def unset_values(self): + """ + Removes any user values from all symbols, as if Kconfig.load_config() + or Symbol.set_value() had never been called. + """ + self._warn_assign_no_prompt = False + try: + # set_value() already rejects undefined symbols, and they don't + # need to be invalidated (because their value never changes), so we + # can just iterate over defined symbols + for sym in self.unique_defined_syms: + sym.unset_value() + + for choice in self.unique_choices: + choice.unset_value() + finally: + self._warn_assign_no_prompt = True + + def enable_warnings(self): + """ + Do 'Kconfig.warn = True' instead. Maintained for backwards + compatibility. + """ + self.warn = True + + def disable_warnings(self): + """ + Do 'Kconfig.warn = False' instead. Maintained for backwards + compatibility. + """ + self.warn = False + + def enable_stderr_warnings(self): + """ + Do 'Kconfig.warn_to_stderr = True' instead. Maintained for backwards + compatibility. + """ + self.warn_to_stderr = True + + def disable_stderr_warnings(self): + """ + Do 'Kconfig.warn_to_stderr = False' instead. Maintained for backwards + compatibility. + """ + self.warn_to_stderr = False + + def enable_undef_warnings(self): + """ + Do 'Kconfig.warn_assign_undef = True' instead. Maintained for backwards + compatibility. + """ + self.warn_assign_undef = True + + def disable_undef_warnings(self): + """ + Do 'Kconfig.warn_assign_undef = False' instead. Maintained for + backwards compatibility. + """ + self.warn_assign_undef = False + + def enable_override_warnings(self): + """ + Do 'Kconfig.warn_assign_override = True' instead. Maintained for + backwards compatibility. + """ + self.warn_assign_override = True + + def disable_override_warnings(self): + """ + Do 'Kconfig.warn_assign_override = False' instead. Maintained for + backwards compatibility. + """ + self.warn_assign_override = False + + def enable_redun_warnings(self): + """ + Do 'Kconfig.warn_assign_redun = True' instead. Maintained for backwards + compatibility. + """ + self.warn_assign_redun = True + + def disable_redun_warnings(self): + """ + Do 'Kconfig.warn_assign_redun = False' instead. Maintained for + backwards compatibility. + """ + self.warn_assign_redun = False + + def __repr__(self): + """ + Returns a string with information about the Kconfig object when it is + evaluated on e.g. the interactive Python prompt. + """ + def status(flag): + return "enabled" if flag else "disabled" + + return "<{}>".format(", ".join(( + "configuration with {} symbols".format(len(self.syms)), + 'main menu prompt "{}"'.format(self.mainmenu_text), + "srctree is current directory" if not self.srctree else + 'srctree "{}"'.format(self.srctree), + 'config symbol prefix "{}"'.format(self.config_prefix), + "warnings " + status(self.warn), + "printing of warnings to stderr " + status(self.warn_to_stderr), + "undef. symbol assignment warnings " + + status(self.warn_assign_undef), + "overriding symbol assignment warnings " + + status(self.warn_assign_override), + "redundant symbol assignment warnings " + + status(self.warn_assign_redun) + ))) # # Private methods # + # - # Kconfig parsing + # File reading # - def _parse_file(self, filename, parent, deps, visible_if_deps, block): - """Parses the Kconfig file 'filename'. Appends the Items in the file - (and any file it sources) to the list passed in the 'block' parameter. - See _parse_block() for the meaning of the parameters.""" - self._parse_block(_FileFeed(filename), None, parent, deps, - visible_if_deps, block) + def _open_config(self, filename): + # Opens a .config file. First tries to open 'filename', then + # '$srctree/filename' if $srctree was set when the configuration was + # loaded. + + try: + return self._open(filename, "r") + except EnvironmentError as e: + # This will try opening the same file twice if $srctree is unset, + # but it's not a big deal + try: + return self._open(join(self.srctree, filename), "r") + except EnvironmentError as e2: + # This is needed for Python 3, because e2 is deleted after + # the try block: + # + # https://docs.python.org/3/reference/compound_stmts.html#the-try-statement + e = e2 + + raise _KconfigIOError( + e, "Could not open '{}' ({}: {}). Check that the $srctree " + "environment variable ({}) is set correctly." + .format(filename, errno.errorcode[e.errno], e.strerror, + "set to '{}'".format(self.srctree) if self.srctree + else "unset or blank")) + + def _enter_file(self, filename): + # Jumps to the beginning of a sourced Kconfig file, saving the previous + # position and file object. + # + # filename: + # Absolute path to file + + # Path relative to $srctree, stored in e.g. self.filename (which makes + # it indirectly show up in MenuNode.filename). Equals 'filename' for + # absolute paths passed to 'source'. + if filename.startswith(self._srctree_prefix): + # Relative path (or a redundant absolute path to within $srctree, + # but it's probably fine to reduce those too) + rel_filename = filename[len(self._srctree_prefix):] + else: + # Absolute path + rel_filename = filename - def _parse_block(self, line_feeder, end_marker, parent, deps, - visible_if_deps, block): - """Parses a block, which is the contents of either a file or an if, - menu, or choice statement. Appends the Items to the list passed in the - 'block' parameter. + self.kconfig_filenames.append(rel_filename) - line_feeder: A _FileFeed instance feeding lines from a file. The - Kconfig language is line-based in practice. + # The parent Kconfig files are represented as a list of + # (<include path>, <Python 'file' object for Kconfig file>) tuples. + # + # <include path> is immutable and holds a *tuple* of + # (<filename>, <linenr>) tuples, giving the locations of the 'source' + # statements in the parent Kconfig files. The current include path is + # also available in Kconfig._include_path. + # + # The point of this redundant setup is to allow Kconfig._include_path + # to be assigned directly to MenuNode.include_path without having to + # copy it, sharing it wherever possible. + + # Save include path and 'file' object (via its 'readline' function) + # before entering the file + self._filestack.append((self._include_path, self._readline)) + + # _include_path is a tuple, so this rebinds the variable instead of + # doing in-place modification + self._include_path += ((self.filename, self.linenr),) + + # Check for recursive 'source' + for name, _ in self._include_path: + if name == rel_filename: + raise KconfigError( + "\n{}:{}: recursive 'source' of '{}' detected. Check that " + "environment variables are set correctly.\n" + "Include path:\n{}" + .format(self.filename, self.linenr, rel_filename, + "\n".join("{}:{}".format(name, linenr) + for name, linenr in self._include_path))) + + try: + self._readline = self._open(filename, "r").readline + except EnvironmentError as e: + # We already know that the file exists + raise _KconfigIOError( + e, "{}:{}: Could not open '{}' (in '{}') ({}: {})" + .format(self.filename, self.linenr, filename, + self._line.strip(), + errno.errorcode[e.errno], e.strerror)) + + self.filename = rel_filename + self.linenr = 0 - end_marker: The token that ends the block, e.g. T_ENDIF ("endif") for - ifs. None for files. + def _leave_file(self): + # Returns from a Kconfig file to the file that sourced it. See + # _enter_file(). + + # Restore location from parent Kconfig file + self.filename, self.linenr = self._include_path[-1] + # Restore include path and 'file' object + self._readline.__self__.close() # __self__ fetches the 'file' object + self._include_path, self._readline = self._filestack.pop() + + def _next_line(self): + # Fetches and tokenizes the next line from the current Kconfig file. + # Returns False at EOF and True otherwise. + + # We might already have tokens from parsing a line and discovering that + # it's part of a different construct + if self._reuse_tokens: + self._reuse_tokens = False + # self._tokens_i is known to be 1 here, because _parse_properties() + # leaves it like that when it can't recognize a line (or parses + # a help text) + return True - parent: The enclosing menu or choice, or None if we're at the top - level. + # readline() returns '' over and over at EOF, which we rely on for help + # texts at the end of files (see _line_after_help()) + line = self._readline() + if not line: + return False + self.linenr += 1 - deps: Dependencies from enclosing menus, choices and ifs. + # Handle line joining + while line.endswith("\\\n"): + line = line[:-2] + self._readline() + self.linenr += 1 + + self._tokens = self._tokenize(line) + # Initialize to 1 instead of 0 to factor out code from _parse_block() + # and _parse_properties(). They immediately fetch self._tokens[0]. + self._tokens_i = 1 + + return True + + def _line_after_help(self, line): + # Tokenizes a line after a help text. This case is special in that the + # line has already been fetched (to discover that it isn't part of the + # help text). + # + # An earlier version used a _saved_line variable instead that was + # checked in _next_line(). This special-casing gets rid of it and makes + # _reuse_tokens alone sufficient to handle unget. + + # Handle line joining + while line.endswith("\\\n"): + line = line[:-2] + self._readline() + self.linenr += 1 + + self._tokens = self._tokenize(line) + self._reuse_tokens = True - visible_if_deps (default: None): 'visible if' dependencies from - enclosing menus. + def _write_if_changed(self, filename, contents): + # Writes 'contents' into 'filename', but only if it differs from the + # current contents of the file. + # + # Another variant would be write a temporary file on the same + # filesystem, compare the files, and rename() the temporary file if it + # differs, but it breaks stuff like write_config("/dev/null"), which is + # used out there to force evaluation-related warnings to be generated. + # This simple version is pretty failsafe and portable. + + if not self._contents_eq(filename, contents): + with self._open(filename, "w") as f: + f.write(contents) + + def _contents_eq(self, filename, contents): + # Returns True if the contents of 'filename' is 'contents' (a string), + # and False otherwise (including if 'filename' can't be opened/read) + + try: + with self._open(filename, "r") as f: + # Robust re. things like encoding and line endings (mmap() + # trickery isn't) + return f.read(len(contents) + 1) == contents + except EnvironmentError: + # If the error here would prevent writing the file as well, we'll + # notice it later + return False + + # + # Tokenization + # + + def _lookup_sym(self, name): + # Fetches the symbol 'name' from the symbol table, creating and + # registering it if it does not exist. If '_parsing_kconfigs' is False, + # it means we're in eval_string(), and new symbols won't be registered. + + if name in self.syms: + return self.syms[name] + + sym = Symbol() + sym.kconfig = self + sym.name = name + sym.is_constant = False + sym.rev_dep = sym.weak_rev_dep = sym.direct_dep = self.n + + if self._parsing_kconfigs: + self.syms[name] = sym + else: + self._warn("no symbol {} in configuration".format(name)) + + return sym + + def _lookup_const_sym(self, name): + # Like _lookup_sym(), for constant (quoted) symbols + + if name in self.const_syms: + return self.const_syms[name] + + sym = Symbol() + sym.kconfig = self + sym.name = name + sym.is_constant = True + sym.rev_dep = sym.weak_rev_dep = sym.direct_dep = self.n + + if self._parsing_kconfigs: + self.const_syms[name] = sym + + return sym + + def _tokenize(self, s): + # Parses 's', returning a None-terminated list of tokens. Registers any + # new symbols encountered with _lookup(_const)_sym(). + # + # Tries to be reasonably speedy by processing chunks of text via + # regexes and string operations where possible. This is the biggest + # hotspot during parsing. + # + # It might be possible to rewrite this to 'yield' tokens instead, + # working across multiple lines. Lookback and compatibility with old + # janky versions of the C tools complicate things though. + + self._line = s # Used for error reporting + + # Initial token on the line + match = _command_match(s) + if not match: + if s.isspace() or s.lstrip().startswith("#"): + return (None,) + self._parse_error("unknown token at start of line") + + # Tricky implementation detail: While parsing a token, 'token' refers + # to the previous token. See _STRING_LEX for why this is needed. + token = _get_keyword(match.group(1)) + if not token: + # Backwards compatibility with old versions of the C tools, which + # (accidentally) accepted stuff like "--help--" and "-help---". + # This was fixed in the C tools by commit c2264564 ("kconfig: warn + # of unhandled characters in Kconfig commands"), committed in July + # 2015, but it seems people still run Kconfiglib on older kernels. + if s.strip(" \t\n-") == "help": + return (_T_HELP, None) + + # If the first token is not a keyword (and not a weird help token), + # we have a preprocessor variable assignment (or a bare macro on a + # line) + self._parse_assignment(s) + return (None,) + + tokens = [token] + # The current index in the string being tokenized + i = match.end() + + # Main tokenization loop (for tokens past the first one) + while i < len(s): + # Test for an identifier/keyword first. This is the most common + # case. + match = _id_keyword_match(s, i) + if match: + # We have an identifier or keyword + + # Check what it is. lookup_sym() will take care of allocating + # new symbols for us the first time we see them. Note that + # 'token' still refers to the previous token. + + name = match.group(1) + keyword = _get_keyword(name) + if keyword: + # It's a keyword + token = keyword + # Jump past it + i = match.end() + + elif token not in _STRING_LEX: + # It's a non-const symbol, except we translate n, m, and y + # into the corresponding constant symbols, like the C + # implementation + + if "$" in name: + # Macro expansion within symbol name + name, s, i = self._expand_name(s, i) + else: + i = match.end() + + token = self.const_syms[name] if name in STR_TO_TRI else \ + self._lookup_sym(name) + + else: + # It's a case of missing quotes. For example, the + # following is accepted: + # + # menu unquoted_title + # + # config A + # tristate unquoted_prompt + # + # endmenu + # + # Named choices ('choice FOO') also end up here. + + if token is not _T_CHOICE: + self._warn("style: quotes recommended around '{}' in '{}'" + .format(name, self._line.strip()), + self.filename, self.linenr) + + token = name + i = match.end() + + else: + # Neither a keyword nor a non-const symbol + + # We always strip whitespace after tokens, so it is safe to + # assume that s[i] is the start of a token here. + c = s[i] + + if c in "\"'": + if "$" not in s and "\\" not in s: + # Fast path for lines without $ and \. Find the + # matching quote. + end_i = s.find(c, i + 1) + 1 + if not end_i: + self._parse_error("unterminated string") + val = s[i + 1:end_i - 1] + i = end_i + else: + # Slow path + s, end_i = self._expand_str(s, i) + + # os.path.expandvars() and the $UNAME_RELEASE replace() + # is a backwards compatibility hack, which should be + # reasonably safe as expandvars() leaves references to + # undefined env. vars. as is. + # + # The preprocessor functionality changed how + # environment variables are referenced, to $(FOO). + val = expandvars(s[i + 1:end_i - 1] + .replace("$UNAME_RELEASE", + _UNAME_RELEASE)) + + i = end_i + + # This is the only place where we don't survive with a + # single token of lookback: 'option env="FOO"' does not + # refer to a constant symbol named "FOO". + token = \ + val if token in _STRING_LEX or tokens[0] is _T_OPTION \ + else self._lookup_const_sym(val) + + elif s.startswith("&&", i): + token = _T_AND + i += 2 + + elif s.startswith("||", i): + token = _T_OR + i += 2 + + elif c == "=": + token = _T_EQUAL + i += 1 + + elif s.startswith("!=", i): + token = _T_UNEQUAL + i += 2 + + elif c == "!": + token = _T_NOT + i += 1 + + elif c == "(": + token = _T_OPEN_PAREN + i += 1 + + elif c == ")": + token = _T_CLOSE_PAREN + i += 1 + + elif c == "#": + break + + + # Very rare + + elif s.startswith("<=", i): + token = _T_LESS_EQUAL + i += 2 + + elif c == "<": + token = _T_LESS + i += 1 + + elif s.startswith(">=", i): + token = _T_GREATER_EQUAL + i += 2 + + elif c == ">": + token = _T_GREATER + i += 1 + + + else: + self._parse_error("unknown tokens in line") + + + # Skip trailing whitespace + while i < len(s) and s[i].isspace(): + i += 1 + + + # Add the token + tokens.append(token) + + # None-terminating the token list makes token fetching simpler/faster + tokens.append(None) + + return tokens + + # Helpers for syntax checking and token fetching. See the + # 'Intro to expressions' section for what a constant symbol is. + # + # More of these could be added, but the single-use cases are inlined as an + # optimization. + + def _expect_sym(self): + token = self._tokens[self._tokens_i] + self._tokens_i += 1 + + if token.__class__ is not Symbol: + self._parse_error("expected symbol") + + return token + + def _expect_nonconst_sym(self): + # Used for 'select' and 'imply' only. We know the token indices. + + token = self._tokens[1] + self._tokens_i = 2 + + if token.__class__ is not Symbol or token.is_constant: + self._parse_error("expected nonconstant symbol") + + return token + + def _expect_str_and_eol(self): + token = self._tokens[self._tokens_i] + self._tokens_i += 1 + + if token.__class__ is not str: + self._parse_error("expected string") + + if self._tokens[self._tokens_i] is not None: + self._trailing_tokens_error() + + return token + + def _expect_expr_and_eol(self): + expr = self._parse_expr(True) + + if self._tokens[self._tokens_i] is not None: + self._trailing_tokens_error() + + return expr + + def _check_token(self, token): + # If the next token is 'token', removes it and returns True + + if self._tokens[self._tokens_i] is token: + self._tokens_i += 1 + return True + return False + + # + # Preprocessor logic + # - block: The list to add items to.""" + def _parse_assignment(self, s): + # Parses a preprocessor variable assignment, registering the variable + # if it doesn't already exist. Also takes care of bare macros on lines + # (which are allowed, and can be useful for their side effects). + # Expand any macros in the left-hand side of the assignment (the + # variable name) + s = s.lstrip() + i = 0 while 1: - # Do we already have a tokenized line that we determined wasn't - # part of whatever we were parsing earlier? See comment in - # Config.__init__(). - if self.end_line is not None: - line = self.end_line - tokens = self.end_line_tokens - tokens.unget_all() - - self.end_line = None - self.end_line_tokens = None + i = _assignment_lhs_fragment_match(s, i).end() + if s.startswith("$(", i): + s, i = self._expand_macro(s, i, ()) else: - line = line_feeder.get_next() - if line is None: - if end_marker is not None: - raise Kconfig_Syntax_Error("Unexpected end of file {0}" - .format(line_feeder.filename)) - return + break - tokens = self._tokenize(line, False, line_feeder.filename, - line_feeder.linenr) + if s.isspace(): + # We also accept a bare macro on a line (e.g. + # $(warning-if,$(foo),ops)), provided it expands to a blank string + return - t0 = tokens.get_next() - if t0 is None: - continue + # Assigned variable + name = s[:i] - # Cases are ordered roughly by frequency, which speeds things up a - # bit - - if t0 == T_CONFIG or t0 == T_MENUCONFIG: - # The tokenizer will automatically allocate a new Symbol object - # for any new names it encounters, so we don't need to worry - # about that here. - sym = tokens.get_next() - - # Symbols defined in multiple places get the parent of their - # first definition. However, for symbols whose parents are - # choice statements, the choice statement takes precedence. - if not sym.is_defined_ or isinstance(parent, Choice): - sym.parent = parent - sym.is_defined_ = True - - self._parse_properties(line_feeder, sym, deps, visible_if_deps) - - self.kconfig_syms.append(sym) - block.append(sym) - - elif t0 == T_SOURCE: - kconfig_file = tokens.get_next() - exp_kconfig_file = self._expand_sym_refs(kconfig_file) - f = os.path.join(self.base_dir, exp_kconfig_file) - if not os.path.exists(f): - raise IOError('{0}:{1}: sourced file "{2}" (expands to ' - '"{3}") not found. Perhaps base_dir ' - '(argument to Config.__init__(), currently ' - '"{4}") is set to the wrong value.' - .format(line_feeder.filename, - line_feeder.linenr, - kconfig_file, exp_kconfig_file, - self.base_dir)) - # Add items to the same block - self._parse_file(f, parent, deps, visible_if_deps, block) - - elif t0 == end_marker: - # We have reached the end of the block - return - elif t0 == T_IF: - # If statements are treated as syntactic sugar for adding - # dependencies to enclosed items and do not have an explicit - # object representation. - - dep_expr = self._parse_expr(tokens, None, line, - line_feeder.filename, - line_feeder.linenr) - # Add items to the same block - self._parse_block(line_feeder, T_ENDIF, parent, - _make_and(dep_expr, deps), - visible_if_deps, block) - - elif t0 == T_COMMENT: - comment = Comment() - comment.config = self - comment.parent = parent - comment.filename = line_feeder.filename - comment.linenr = line_feeder.linenr - comment.text = tokens.get_next() - - self._parse_properties(line_feeder, comment, deps, - visible_if_deps) - - self.comments.append(comment) - block.append(comment) - - elif t0 == T_MENU: - menu = Menu() - menu.config = self - menu.parent = parent - menu.filename = line_feeder.filename - menu.linenr = line_feeder.linenr - menu.title = tokens.get_next() - - self._parse_properties(line_feeder, menu, deps, - visible_if_deps) - - # This needs to go before _parse_block() so that we get the - # proper menu ordering in the case of nested functions - self.menus.append(menu) - # Parse contents and put Items in menu.block - self._parse_block(line_feeder, T_ENDMENU, menu, menu.dep_expr, - _make_and(visible_if_deps, - menu.visible_if_expr), - menu.block) - - block.append(menu) - - elif t0 == T_CHOICE: - name = tokens.get_next() - if name is None: + # Extract assignment operator (=, :=, or +=) and value + rhs_match = _assignment_rhs_match(s, i) + if not rhs_match: + self._parse_error("syntax error") + + op, val = rhs_match.groups() + + + if name in self.variables: + # Already seen variable + var = self.variables[name] + else: + # New variable + var = Variable() + var.kconfig = self + var.name = name + var._n_expansions = 0 + self.variables[name] = var + + # += acts like = on undefined variables (defines a recursive + # variable) + if op == "+=": + op = "=" + + if op == "=": + var.is_recursive = True + var.value = val + elif op == ":=": + var.is_recursive = False + var.value = self._expand_whole(val, ()) + else: # op == "+=" + # += does immediate expansion if the variable was last set + # with := + var.value += " " + (val if var.is_recursive else + self._expand_whole(val, ())) + + def _expand_whole(self, s, args): + # Expands preprocessor macros in all of 's'. Used whenever we don't + # have to worry about delimiters. See _expand_macro() re. the 'args' + # parameter. + # + # Returns the expanded string. + + i = 0 + while 1: + i = s.find("$(", i) + if i == -1: + break + s, i = self._expand_macro(s, i, args) + return s + + def _expand_name(self, s, i): + # Expands a symbol name starting at index 'i' in 's'. + # + # Returns the expanded name, the expanded 's' (including the part + # before the name), and the index of the first character in the next + # token after the name. + + s, end_i = self._expand_name_iter(s, i) + name = s[i:end_i] + # isspace() is False for empty strings + if not name.strip(): + # Avoid creating a Kconfig symbol with a blank name. It's almost + # guaranteed to be an error. + self._parse_error("macro expanded to blank string") + + # Skip trailing whitespace + while end_i < len(s) and s[end_i].isspace(): + end_i += 1 + + return name, s, end_i + + def _expand_name_iter(self, s, i): + # Expands a symbol name starting at index 'i' in 's'. + # + # Returns the expanded 's' (including the part before the name) and the + # index of the first character after the expanded name in 's'. + + while 1: + match = _name_special_search(s, i) + + if match.group() == "$(": + s, i = self._expand_macro(s, match.start(), ()) + else: + return (s, match.start()) + + def _expand_str(self, s, i): + # Expands a quoted string starting at index 'i' in 's'. Handles both + # backslash escapes and macro expansion. + # + # Returns the expanded 's' (including the part before the string) and + # the index of the first character after the expanded string in 's'. + + quote = s[i] + i += 1 # Skip over initial "/' + while 1: + match = _string_special_search(s, i) + if not match: + self._parse_error("unterminated string") + + + if match.group() == quote: + # Found the end of the string + return (s, match.end()) + + elif match.group() == "\\": + # Replace '\x' with 'x'. 'i' ends up pointing to the character + # after 'x', which allows macros to be canceled with '\$(foo)'. + i = match.end() + s = s[:match.start()] + s[i:] + + elif match.group() == "$(": + # A macro call within the string + s, i = self._expand_macro(s, match.start(), ()) + + else: + # A ' quote within " quotes or vice versa + i += 1 + + def _expand_macro(self, s, i, args): + # Expands a macro starting at index 'i' in 's'. If this macro resulted + # from the expansion of another macro, 'args' holds the arguments + # passed to that macro. + # + # Returns the expanded 's' (including the part before the macro) and + # the index of the first character after the expanded macro in 's'. + + start = i + i += 2 # Skip over "$(" + + # Start of current macro argument + arg_start = i + + # Arguments of this macro call + new_args = [] + + while 1: + match = _macro_special_search(s, i) + if not match: + self._parse_error("missing end parenthesis in macro expansion") + + + if match.group() == ")": + # Found the end of the macro + + new_args.append(s[arg_start:match.start()]) + + prefix = s[:start] + + # $(1) is replaced by the first argument to the function, etc., + # provided at least that many arguments were passed + + try: + # Does the macro look like an integer, with a corresponding + # argument? If so, expand it to the value of the argument. + prefix += args[int(new_args[0])] + except (ValueError, IndexError): + # Regular variables are just functions without arguments, + # and also go through the function value path + prefix += self._fn_val(new_args) + + return (prefix + s[match.end():], + len(prefix)) + + elif match.group() == ",": + # Found the end of a macro argument + new_args.append(s[arg_start:match.start()]) + arg_start = i = match.end() + + else: # match.group() == "$(" + # A nested macro call within the macro + s, i = self._expand_macro(s, match.start(), args) + + def _fn_val(self, args): + # Returns the result of calling the function args[0] with the arguments + # args[1..len(args)-1]. Plain variables are treated as functions + # without arguments. + + fn = args[0] + + if fn in self.variables: + var = self.variables[fn] + + if len(args) == 1: + # Plain variable + if var._n_expansions: + self._parse_error("Preprocessor variable {} recursively " + "references itself".format(var.name)) + elif var._n_expansions > 100: + # Allow functions to call themselves, but guess that functions + # that are overly recursive are stuck + self._parse_error("Preprocessor function {} seems stuck " + "in infinite recursion".format(var.name)) + + var._n_expansions += 1 + res = self._expand_whole(self.variables[fn].value, args) + var._n_expansions -= 1 + return res + + if fn in self._functions: + # Built-in or user-defined function + + py_fn, min_arg, max_arg = self._functions[fn] + + if len(args) - 1 < min_arg or \ + (max_arg is not None and len(args) - 1 > max_arg): + + if min_arg == max_arg: + expected_args = min_arg + elif max_arg is None: + expected_args = "{} or more".format(min_arg) + else: + expected_args = "{}-{}".format(min_arg, max_arg) + + raise KconfigError("{}:{}: bad number of arguments in call " + "to {}, expected {}, got {}" + .format(self.filename, self.linenr, fn, + expected_args, len(args) - 1)) + + return py_fn(self, *args) + + # Environment variables are tried last + if fn in os.environ: + self.env_vars.add(fn) + return os.environ[fn] + + return "" + + # + # Parsing + # + + def _make_and(self, e1, e2): + # Constructs an AND (&&) expression. Performs trivial simplification. + + if e1 is self.y: + return e2 + + if e2 is self.y: + return e1 + + if e1 is self.n or e2 is self.n: + return self.n + + return (AND, e1, e2) + + def _make_or(self, e1, e2): + # Constructs an OR (||) expression. Performs trivial simplification. + + if e1 is self.n: + return e2 + + if e2 is self.n: + return e1 + + if e1 is self.y or e2 is self.y: + return self.y + + return (OR, e1, e2) + + def _parse_block(self, end_token, parent, prev): + # Parses a block, which is the contents of either a file or an if, + # menu, or choice statement. + # + # end_token: + # The token that ends the block, e.g. _T_ENDIF ("endif") for ifs. + # None for files. + # + # parent: + # The parent menu node, corresponding to a menu, Choice, or 'if'. + # 'if's are flattened after parsing. + # + # prev: + # The previous menu node. New nodes will be added after this one (by + # modifying their 'next' pointer). + # + # 'prev' is reused to parse a list of child menu nodes (for a menu or + # Choice): After parsing the children, the 'next' pointer is assigned + # to the 'list' pointer to "tilt up" the children above the node. + # + # Returns the final menu node in the block (or 'prev' if the block is + # empty). This allows chaining. + + while self._next_line(): + t0 = self._tokens[0] + + if t0 is _T_CONFIG or t0 is _T_MENUCONFIG: + # The tokenizer allocates Symbol objects for us + sym = self._tokens[1] + + if sym.__class__ is not Symbol or sym.is_constant: + self._parse_error("missing or bad symbol name") + + if self._tokens[2] is not None: + self._trailing_tokens_error() + + self.defined_syms.append(sym) + + node = MenuNode() + node.kconfig = self + node.item = sym + node.is_menuconfig = (t0 is _T_MENUCONFIG) + node.prompt = node.help = node.list = None + node.parent = parent + node.filename = self.filename + node.linenr = self.linenr + node.include_path = self._include_path + + sym.nodes.append(node) + + self._parse_properties(node) + + if node.is_menuconfig and not node.prompt: + self._warn("the menuconfig symbol {} has no prompt" + .format(_name_and_loc(sym))) + + # Equivalent to + # + # prev.next = node + # prev = node + # + # due to tricky Python semantics. The order matters. + prev.next = prev = node + + elif t0 is None: + # Blank line + continue + + elif t0 in _SOURCE_TOKENS: + pattern = self._expect_str_and_eol() + + if t0 in _REL_SOURCE_TOKENS: + # Relative source + pattern = join(dirname(self.filename), pattern) + + # - glob() doesn't support globbing relative to a directory, so + # we need to prepend $srctree to 'pattern'. Use join() + # instead of '+' so that an absolute path in 'pattern' is + # preserved. + # + # - Sort the glob results to ensure a consistent ordering of + # Kconfig symbols, which indirectly ensures a consistent + # ordering in e.g. .config files + filenames = sorted(iglob(join(self._srctree_prefix, pattern))) + + if not filenames and t0 in _OBL_SOURCE_TOKENS: + raise KconfigError( + "{}:{}: '{}' not found (in '{}'). Check that " + "environment variables are set correctly (e.g. " + "$srctree, which is {}). Also note that unset " + "environment variables expand to the empty string." + .format(self.filename, self.linenr, pattern, + self._line.strip(), + "set to '{}'".format(self.srctree) + if self.srctree else "unset or blank")) + + for filename in filenames: + self._enter_file(filename) + prev = self._parse_block(None, parent, prev) + self._leave_file() + + elif t0 is end_token: + # Reached the end of the block. Terminate the final node and + # return it. + + if self._tokens[1] is not None: + self._trailing_tokens_error() + + prev.next = None + return prev + + elif t0 is _T_IF: + node = MenuNode() + node.item = node.prompt = None + node.parent = parent + node.dep = self._expect_expr_and_eol() + + self._parse_block(_T_ENDIF, node, node) + node.list = node.next + + prev.next = prev = node + + elif t0 is _T_MENU: + node = MenuNode() + node.kconfig = self + node.item = t0 # _T_MENU == MENU + node.is_menuconfig = True + node.prompt = (self._expect_str_and_eol(), self.y) + node.visibility = self.y + node.parent = parent + node.filename = self.filename + node.linenr = self.linenr + node.include_path = self._include_path + + self.menus.append(node) + + self._parse_properties(node) + self._parse_block(_T_ENDMENU, node, node) + node.list = node.next + + prev.next = prev = node + + elif t0 is _T_COMMENT: + node = MenuNode() + node.kconfig = self + node.item = t0 # _T_COMMENT == COMMENT + node.is_menuconfig = False + node.prompt = (self._expect_str_and_eol(), self.y) + node.list = None + node.parent = parent + node.filename = self.filename + node.linenr = self.linenr + node.include_path = self._include_path + + self.comments.append(node) + + self._parse_properties(node) + + prev.next = prev = node + + elif t0 is _T_CHOICE: + if self._tokens[1] is None: choice = Choice() - self.choices.append(choice) + choice.direct_dep = self.n else: # Named choice + name = self._expect_str_and_eol() choice = self.named_choices.get(name) - if choice is None: + if not choice: choice = Choice() choice.name = name + choice.direct_dep = self.n self.named_choices[name] = choice - self.choices.append(choice) - choice.config = self - choice.parent = parent + self.choices.append(choice) - choice.def_locations.append((line_feeder.filename, - line_feeder.linenr)) + node = MenuNode() + node.kconfig = choice.kconfig = self + node.item = choice + node.is_menuconfig = True + node.prompt = node.help = None + node.parent = parent + node.filename = self.filename + node.linenr = self.linenr + node.include_path = self._include_path - self._parse_properties(line_feeder, choice, deps, - visible_if_deps) + choice.nodes.append(node) - # Parse contents and put Items in choice.block - self._parse_block(line_feeder, T_ENDCHOICE, choice, deps, - visible_if_deps, choice.block) + self._parse_properties(node) + self._parse_block(_T_ENDCHOICE, node, node) + node.list = node.next - choice._determine_actual_symbols() + prev.next = prev = node - # If no type is specified for the choice, its type is that of - # the first choice item with a specified type - if choice.type == UNKNOWN: - for item in choice.actual_symbols: - if item.type != UNKNOWN: - choice.type = item.type - break + elif t0 is _T_MAINMENU: + self.top_node.prompt = (self._expect_str_and_eol(), self.y) - # Each choice item of UNKNOWN type gets the type of the choice - for item in choice.actual_symbols: - if item.type == UNKNOWN: - item.type = choice.type + else: + # A valid endchoice/endif/endmenu is caught by the 'end_token' + # check above + self._parse_error( + "no corresponding 'choice'" if t0 is _T_ENDCHOICE else + "no corresponding 'if'" if t0 is _T_ENDIF else + "no corresponding 'menu'" if t0 is _T_ENDMENU else + "unrecognized construct") + + # End of file reached. Terminate the final node and return it. + + if end_token: + raise KconfigError( + "expected '{}' at end of '{}'" + .format("endchoice" if end_token is _T_ENDCHOICE else + "endif" if end_token is _T_ENDIF else + "endmenu", + self.filename)) + + prev.next = None + return prev + + def _parse_cond(self): + # Parses an optional 'if <expr>' construct and returns the parsed + # <expr>, or self.y if the next token is not _T_IF + + expr = self._parse_expr(True) if self._check_token(_T_IF) else self.y + + if self._tokens[self._tokens_i] is not None: + self._trailing_tokens_error() + + return expr + + def _parse_properties(self, node): + # Parses and adds properties to the MenuNode 'node' (type, 'prompt', + # 'default's, etc.) Properties are later copied up to symbols and + # choices in a separate pass after parsing, in e.g. + # _add_props_to_sym(). + # + # An older version of this code added properties directly to symbols + # and choices instead of to their menu nodes (and handled dependency + # propagation simultaneously), but that loses information on where a + # property is added when a symbol or choice is defined in multiple + # locations. Some Kconfig configuration systems rely heavily on such + # symbols, and better docs can be generated by keeping track of where + # properties are added. + # + # node: + # The menu node we're parsing properties on - block.append(choice) + # Dependencies from 'depends on'. Will get propagated to the properties + # below. + node.dep = self.y - elif t0 == T_MAINMENU: - text = tokens.get_next() - if self.mainmenu_text is not None: - self._warn("overriding 'mainmenu' text. " - 'Old value: "{0}", new value: "{1}".' - .format(self.mainmenu_text, text), - line_feeder.filename, line_feeder.linenr) - self.mainmenu_text = text + while self._next_line(): + t0 = self._tokens[0] - else: - _parse_error(line, "unrecognized construct", - line_feeder.filename, line_feeder.linenr) - - def _parse_properties(self, line_feeder, stmt, deps, visible_if_deps): - """Parsing of properties for symbols, menus, choices, and comments. - Takes care of propagating dependencies from enclosing menus and ifs.""" - - def parse_val_and_cond(tokens, line, filename, linenr): - """Parses '<expr1> if <expr2>' constructs, where the 'if' part is - optional. Returns a tuple containing the parsed expressions, with - None as the second element if the 'if' part is missing.""" - return (self._parse_expr(tokens, stmt, line, filename, linenr, - False), - self._parse_expr(tokens, stmt, line, filename, linenr) - if tokens.check(T_IF) else None) - - # In case the symbol is defined in multiple locations, we need to - # remember what prompts, defaults, selects, and implies are new for - # this definition, as "depends on" should only apply to the local - # definition. - new_prompt = None - new_def_exprs = [] - new_selects = [] - new_implies = [] - - # Dependencies from 'depends on' statements - depends_on_expr = None + if t0 in _TYPE_TOKENS: + # Relies on '_T_BOOL is BOOL', etc., to save a conversion + self._set_type(node, t0) + if self._tokens[1] is not None: + self._parse_prompt(node) - while 1: - line = line_feeder.get_next() - if line is None: - break + elif t0 is _T_DEPENDS: + if not self._check_token(_T_ON): + self._parse_error("expected 'on' after 'depends'") - filename = line_feeder.filename - linenr = line_feeder.linenr + node.dep = self._make_and(node.dep, + self._expect_expr_and_eol()) - tokens = self._tokenize(line, False, filename, linenr) + elif t0 is _T_HELP: + self._parse_help(node) - t0 = tokens.get_next() - if t0 is None: + elif t0 is _T_SELECT: + if node.item.__class__ is not Symbol: + self._parse_error("only symbols can select") + + node.selects.append((self._expect_nonconst_sym(), + self._parse_cond())) + + elif t0 is None: + # Blank line continue - # Cases are ordered roughly by frequency, which speeds things up a - # bit + elif t0 is _T_DEFAULT: + node.defaults.append((self._parse_expr(False), + self._parse_cond())) - if t0 == T_DEPENDS: - if not tokens.check(T_ON): - _parse_error(line, 'expected "on" after "depends"', - filename, linenr) + elif t0 in _DEF_TOKEN_TO_TYPE: + self._set_type(node, _DEF_TOKEN_TO_TYPE[t0]) + node.defaults.append((self._parse_expr(False), + self._parse_cond())) - parsed_deps = self._parse_expr(tokens, stmt, line, filename, - linenr) + elif t0 is _T_PROMPT: + self._parse_prompt(node) - if isinstance(stmt, (Menu, Comment)): - stmt.orig_deps = _make_and(stmt.orig_deps, parsed_deps) - else: - depends_on_expr = _make_and(depends_on_expr, parsed_deps) - - elif t0 == T_HELP: - # Find first non-blank (not all-space) line and get its - # indentation - line = line_feeder.next_nonblank() - if line is None: - stmt.help = "" - break - indent = _indentation(line) - if indent == 0: - # If the first non-empty lines has zero indent, there is no - # help text - stmt.help = "" - line_feeder.unget() - break + elif t0 is _T_RANGE: + node.ranges.append((self._expect_sym(), self._expect_sym(), + self._parse_cond())) - # The help text goes on till the first non-empty line with less - # indent - help_lines = [_deindent(line, indent)] - while 1: - line = line_feeder.get_next() - if line is None or \ - (not line.isspace() and _indentation(line) < indent): - stmt.help = "".join(help_lines) - break - help_lines.append(_deindent(line, indent)) + elif t0 is _T_IMPLY: + if node.item.__class__ is not Symbol: + self._parse_error("only symbols can imply") - if line is None: - break + node.implies.append((self._expect_nonconst_sym(), + self._parse_cond())) - line_feeder.unget() - - elif t0 == T_SELECT: - target = tokens.get_next() - - stmt.referenced_syms.add(target) - stmt.selected_syms.add(target) - - new_selects.append( - (target, - self._parse_expr(tokens, stmt, line, filename, linenr) - if tokens.check(T_IF) else None)) - - elif t0 == T_IMPLY: - target = tokens.get_next() - - stmt.referenced_syms.add(target) - stmt.implied_syms.add(target) - - new_implies.append( - (target, - self._parse_expr(tokens, stmt, line, filename, linenr) - if tokens.check(T_IF) else None)) - - elif t0 in (T_BOOL, T_TRISTATE, T_INT, T_HEX, T_STRING): - stmt.type = TOKEN_TO_TYPE[t0] - if tokens.peek_next() is not None: - new_prompt = parse_val_and_cond(tokens, line, filename, - linenr) - - elif t0 == T_DEFAULT: - new_def_exprs.append(parse_val_and_cond(tokens, line, filename, - linenr)) - - elif t0 == T_DEF_BOOL: - stmt.type = BOOL - if tokens.peek_next() is not None: - new_def_exprs.append(parse_val_and_cond(tokens, line, - filename, linenr)) - - elif t0 == T_PROMPT: - # 'prompt' properties override each other within a single - # definition of a symbol, but additional prompts can be added - # by defining the symbol multiple times; hence 'new_prompt' - # instead of 'prompt'. - new_prompt = parse_val_and_cond(tokens, line, filename, linenr) - - elif t0 == T_RANGE: - low = tokens.get_next() - high = tokens.get_next() - stmt.referenced_syms.add(low) - stmt.referenced_syms.add(high) - - stmt.ranges.append( - (low, high, - self._parse_expr(tokens, stmt, line, filename, linenr) - if tokens.check(T_IF) else None)) - - elif t0 == T_DEF_TRISTATE: - stmt.type = TRISTATE - if tokens.peek_next() is not None: - new_def_exprs.append(parse_val_and_cond(tokens, line, - filename, linenr)) - - elif t0 == T_OPTION: - if tokens.check(T_ENV) and tokens.check(T_EQUAL): - env_var = tokens.get_next() - - stmt.is_special_ = True - stmt.is_from_env = True - - if env_var not in os.environ: - self._warn("The symbol {0} references the " - "non-existent environment variable {1} and " - "will get the empty string as its value. " - "If you're using Kconfiglib via " - "'make (i)scriptconfig', it should have " - "set up the environment correctly for you. " - "If you still got this message, that " - "might be an error, and you should email " - "ulfalizer a.t Google's email service.""" - .format(stmt.name, env_var), - filename, linenr) - - stmt.cached_val = "" - else: - stmt.cached_val = os.environ[env_var] + elif t0 is _T_VISIBLE: + if not self._check_token(_T_IF): + self._parse_error("expected 'if' after 'visible'") + + node.visibility = self._make_and(node.visibility, + self._expect_expr_and_eol()) + + elif t0 is _T_OPTION: + if self._check_token(_T_ENV): + if not self._check_token(_T_EQUAL): + self._parse_error("expected '=' after 'env'") - elif tokens.check(T_DEFCONFIG_LIST): - self.defconfig_sym = stmt + env_var = self._expect_str_and_eol() + node.item.env_var = env_var - elif tokens.check(T_MODULES): + if env_var in os.environ: + node.defaults.append( + (self._lookup_const_sym(os.environ[env_var]), + self.y)) + else: + self._warn("{1} has 'option env=\"{0}\"', " + "but the environment variable {0} is not " + "set".format(node.item.name, env_var), + self.filename, self.linenr) + + if env_var != node.item.name: + self._warn("Kconfiglib expands environment variables " + "in strings directly, meaning you do not " + "need 'option env=...' \"bounce\" symbols. " + "For compatibility with the C tools, " + "rename {} to {} (so that the symbol name " + "matches the environment variable name)." + .format(node.item.name, env_var), + self.filename, self.linenr) + + elif self._check_token(_T_DEFCONFIG_LIST): + if not self.defconfig_list: + self.defconfig_list = node.item + else: + self._warn("'option defconfig_list' set on multiple " + "symbols ({0} and {1}). Only {0} will be " + "used.".format(self.defconfig_list.name, + node.item.name), + self.filename, self.linenr) + + elif self._check_token(_T_MODULES): # To reduce warning spam, only warn if 'option modules' is # set on some symbol that isn't MODULES, which should be # safe. I haven't run into any projects that make use # modules besides the kernel yet, and there it's likely to # keep being called "MODULES". - if stmt.name != "MODULES": + if node.item is not self.modules: self._warn("the 'modules' option is not supported. " - "Let me know if this is a problem for you; " - "it shouldn't be that hard to implement. " - "(Note that modules are still supported -- " + "Let me know if this is a problem for you, " + "as it wouldn't be that hard to implement. " + "Note that modules are supported -- " "Kconfiglib just assumes the symbol name " "MODULES, like older versions of the C " "implementation did when 'option modules' " - "wasn't used.)", - filename, linenr) + "wasn't used.", + self.filename, self.linenr) - elif tokens.check(T_ALLNOCONFIG_Y): - if not isinstance(stmt, Symbol): - _parse_error(line, - "the 'allnoconfig_y' option is only " - "valid for symbols", - filename, linenr) - stmt.allnoconfig_y = True + elif self._check_token(_T_ALLNOCONFIG_Y): + if node.item.__class__ is not Symbol: + self._parse_error("the 'allnoconfig_y' option is only " + "valid for symbols") + + node.item.is_allnoconfig_y = True else: - _parse_error(line, "unrecognized option", filename, linenr) - - elif t0 == T_VISIBLE: - if not tokens.check(T_IF): - _parse_error(line, 'expected "if" after "visible"', - filename, linenr) - if not isinstance(stmt, Menu): - _parse_error(line, - "'visible if' is only valid for menus", - filename, linenr) - - parsed_deps = self._parse_expr(tokens, stmt, line, filename, - linenr) - stmt.visible_if_expr = _make_and(stmt.visible_if_expr, - parsed_deps) - - elif t0 == T_OPTIONAL: - if not isinstance(stmt, Choice): - _parse_error(line, - '"optional" is only valid for choices', - filename, - linenr) - stmt.optional = True + self._parse_error("unrecognized option") + + elif t0 is _T_OPTIONAL: + if node.item.__class__ is not Choice: + self._parse_error('"optional" is only valid for choices') + + node.item.is_optional = True else: - # See comment in Config.__init__() - self.end_line = line - self.end_line_tokens = tokens - break + # Reuse the tokens for the non-property line later + self._reuse_tokens = True + return - # Done parsing properties. Now propagate 'depends on' and enclosing - # menu/if dependencies to expressions. + def _set_type(self, node, new_type): + # UNKNOWN is falsy + if node.item.orig_type and node.item.orig_type is not new_type: + self._warn("{} defined with multiple types, {} will be used" + .format(_name_and_loc(node.item), + TYPE_TO_STR[new_type])) - # The set of symbols referenced directly by the statement plus all - # symbols referenced by enclosing menus and ifs - stmt.all_referenced_syms = stmt.referenced_syms | _get_expr_syms(deps) + node.item.orig_type = new_type - # Save original dependencies from enclosing menus and ifs - stmt.deps_from_containing = deps + def _parse_prompt(self, node): + # 'prompt' properties override each other within a single definition of + # a symbol, but additional prompts can be added by defining the symbol + # multiple times - if isinstance(stmt, (Menu, Comment)): - stmt.dep_expr = _make_and(stmt.orig_deps, deps) - else: - # Symbol or Choice - - # See comment for 'menu_dep' - stmt.menu_dep = _make_and(deps, depends_on_expr) - - # Propagate dependencies to prompts - - if new_prompt is not None: - prompt, cond_expr = new_prompt - # Propagate 'visible if' dependencies from menus and local - # 'depends on' dependencies - cond_expr = _make_and(_make_and(cond_expr, visible_if_deps), - depends_on_expr) - # Save original - stmt.orig_prompts.append((prompt, cond_expr)) - # Finalize with dependencies from enclosing menus and ifs - stmt.prompts.append((prompt, _make_and(cond_expr, deps))) - - # Propagate dependencies to defaults - - # Propagate 'depends on' dependencies - new_def_exprs = [(val_expr, _make_and(cond_expr, depends_on_expr)) - for val_expr, cond_expr in new_def_exprs] - # Save original - stmt.orig_def_exprs.extend(new_def_exprs) - # Finalize with dependencies from enclosing menus and ifs - stmt.def_exprs.extend([(val_expr, _make_and(cond_expr, deps)) - for val_expr, cond_expr in new_def_exprs]) - - # Propagate dependencies to selects and implies - - # Only symbols can select and imply - if isinstance(stmt, Symbol): - # Propagate 'depends on' dependencies - new_selects = [(target, _make_and(cond_expr, depends_on_expr)) - for target, cond_expr in new_selects] - new_implies = [(target, _make_and(cond_expr, depends_on_expr)) - for target, cond_expr in new_implies] - # Save original - stmt.orig_selects.extend(new_selects) - stmt.orig_implies.extend(new_implies) - # Finalize with dependencies from enclosing menus and ifs - for target, cond in new_selects: - target.rev_dep = \ - _make_or(target.rev_dep, - _make_and(stmt, _make_and(cond, deps))) - for target, cond in new_implies: - target.weak_rev_dep = \ - _make_or(target.weak_rev_dep, - _make_and(stmt, _make_and(cond, deps))) - - def _parse_expr(self, feed, cur_item, line, filename=None, linenr=None, - transform_m=True): - """Parses an expression from the tokens in 'feed' using a simple - top-down approach. The result has the form - '(<operator>, [<parsed operands>])', where <operator> is e.g. - kconfiglib.AND. If there is only one operand (i.e., no && or ||), then - the operand is returned directly. This also goes for subexpressions. - - feed: _Feed instance containing the tokens for the expression. - - cur_item: The item (Symbol, Choice, Menu, or Comment) currently being - parsed, or None if we're not parsing an item. Used for recording - references to symbols. - - line: The line containing the expression being parsed. - - filename (default: None): The file containing the expression. - - linenr (default: None): The line number containing the expression. - - transform_m (default: False): Determines if 'm' should be rewritten to - 'm && MODULES' -- see parse_val_and_cond(). - - Expression grammar, in decreasing order of precedence: - - <expr> -> <symbol> - <symbol> '=' <symbol> - <symbol> '!=' <symbol> - '(' <expr> ')' - '!' <expr> - <expr> '&&' <expr> - <expr> '||' <expr>""" - - # Use instance variables to avoid having to pass these as arguments - # through the top-down parser in _parse_expr_rec(), which is tedious - # and obfuscates the code. A profiler run shows no noticeable - # performance difference. - self._cur_item = cur_item - self._transform_m = transform_m - self._line = line - self._filename = filename - self._linenr = linenr - - return self._parse_expr_rec(feed) - - def _parse_expr_rec(self, feed): - or_term = self._parse_or_term(feed) - if not feed.check(T_OR): - # Common case -- no need for an OR node since it's just a single - # operand - return or_term - or_terms = [or_term, self._parse_or_term(feed)] - while feed.check(T_OR): - or_terms.append(self._parse_or_term(feed)) - return (OR, or_terms) - - def _parse_or_term(self, feed): - and_term = self._parse_factor(feed) - if not feed.check(T_AND): - # Common case -- no need for an AND node since it's just a single - # operand - return and_term - and_terms = [and_term, self._parse_factor(feed)] - while feed.check(T_AND): - and_terms.append(self._parse_factor(feed)) - return (AND, and_terms) - - def _parse_factor(self, feed): - token = feed.get_next() - - if isinstance(token, (Symbol, str)): - if self._cur_item is not None and isinstance(token, Symbol): - self._cur_item.referenced_syms.add(token) - - next_token = feed.peek_next() - # For conditional expressions ('depends on <expr>', - # '... if <expr>', # etc.), "m" and m are rewritten to - # "m" && MODULES. - if next_token != T_EQUAL and next_token != T_UNEQUAL: - if self._transform_m and (token is self.m or token == "m"): - return (AND, ["m", self._sym_lookup("MODULES")]) - return token + if node.prompt: + self._warn(_name_and_loc(node.item) + + " defined with multiple prompts in single location") - relation = EQUAL if (feed.get_next() == T_EQUAL) else UNEQUAL - token_2 = feed.get_next() - if self._cur_item is not None and isinstance(token_2, Symbol): - self._cur_item.referenced_syms.add(token_2) - return (relation, token, token_2) + prompt = self._tokens[1] + self._tokens_i = 2 - if token == T_NOT: - return (NOT, self._parse_factor(feed)) + if prompt.__class__ is not str: + self._parse_error("expected prompt string") - if token == T_OPEN_PAREN: - expr_parse = self._parse_expr_rec(feed) - if not feed.check(T_CLOSE_PAREN): - _parse_error(self._line, "missing end parenthesis", - self._filename, self._linenr) - return expr_parse + if prompt != prompt.strip(): + self._warn(_name_and_loc(node.item) + + " has leading or trailing whitespace in its prompt") - _parse_error(self._line, "malformed expression", self._filename, - self._linenr) + # This avoid issues for e.g. reStructuredText documentation, where + # '*prompt *' is invalid + prompt = prompt.strip() - def _tokenize(self, s, for_eval, filename=None, linenr=None): - """Returns a _Feed instance containing tokens derived from the string - 's'. Registers any new symbols encountered (via _sym_lookup()). + node.prompt = (prompt, self._parse_cond()) - (I experimented with a pure regular expression implementation, but it - came out slower, less readable, and wouldn't have been as flexible.) + def _parse_help(self, node): + if node.help is not None: + self._warn(_name_and_loc(node.item) + " defined with more than " + "one help text -- only the last one will be used") - for_eval: True when parsing an expression for a call to Config.eval(), - in which case we should not treat the first token specially nor - register new symbols.""" + # Micro-optimization. This code is pretty hot. + readline = self._readline - s = s.strip() - if s == "" or s[0] == "#": - return _Feed([]) + # Find first non-blank (not all-space) line and get its + # indentation - if for_eval: - previous = None # The previous token seen - tokens = [] - i = 0 # The current index in the string being tokenized + while 1: + line = readline() + self.linenr += 1 + if not line: + self._empty_help(node, line) + return + if not line.isspace(): + break - else: - # The initial word on a line is parsed specially. Let - # command_chars = [A-Za-z0-9_]. Then - # - leading non-command_chars characters are ignored, and - # - the first token consists the following one or more - # command_chars characters. - # This is why things like "----help--" are accepted. - initial_token_match = _initial_token_re_match(s) - if initial_token_match is None: - return _Feed([]) - keyword = _get_keyword(initial_token_match.group(1)) - if keyword == T_HELP: - # Avoid junk after "help", e.g. "---", being registered as a - # symbol - return _Feed([T_HELP]) - if keyword is None: - # We expect a keyword as the first token - _tokenization_error(s, filename, linenr) - - previous = keyword - tokens = [keyword] - # The current index in the string being tokenized - i = initial_token_match.end() - - # _tokenize() is a hotspot during parsing, and this speeds things up a - # bit - strlen = len(s) - append = tokens.append - - # Main tokenization loop. (Handles tokens past the first one.) - while i < strlen: - # Test for an identifier/keyword preceded by whitespace first; this - # is the most common case. - id_keyword_match = _id_keyword_re_match(s, i) - if id_keyword_match: - # We have an identifier or keyword. The above also stripped any - # whitespace for us. - name = id_keyword_match.group(1) - # Jump past it - i = id_keyword_match.end() + len_ = len # Micro-optimization - keyword = _get_keyword(name) - if keyword is not None: - # It's a keyword - append(keyword) - elif previous in STRING_LEX: - # What would ordinarily be considered an identifier is - # treated as a string after certain tokens - append(name) - else: - # It's a symbol name. _sym_lookup() will take care of - # allocating a new Symbol instance if it's the first time - # we see it. - sym = self._sym_lookup(name, for_eval) - - if previous == T_CONFIG or previous == T_MENUCONFIG: - # If the previous token is T_(MENU)CONFIG - # ("(menu)config"), we're tokenizing the first line of - # a symbol definition, and should remember this as a - # location where the symbol is defined - sym.def_locations.append((filename, linenr)) - else: - # Otherwise, it's a reference to the symbol - sym.ref_locations.append((filename, linenr)) + # Use a separate 'expline' variable here and below to avoid stomping on + # any tabs people might've put deliberately into the first line after + # the help text + expline = line.expandtabs() + indent = len_(expline) - len_(expline.lstrip()) + if not indent: + self._empty_help(node, line) + return - append(sym) + # The help text goes on till the first non-blank line with less indent + # than the first line - else: - # Not an identifier/keyword + # Add the first line + lines = [expline[indent:]] + add_line = lines.append # Micro-optimization - while i < strlen and s[i].isspace(): - i += 1 - if i == strlen: + while 1: + line = readline() + if line.isspace(): + # No need to preserve the exact whitespace in these + add_line("\n") + elif not line: + # End of file + break + else: + expline = line.expandtabs() + if len_(expline) - len_(expline.lstrip()) < indent: break - c = s[i] - i += 1 + add_line(expline[indent:]) + + self.linenr += len_(lines) + node.help = "".join(lines).rstrip() + if line: + self._line_after_help(line) + + def _empty_help(self, node, line): + self._warn(_name_and_loc(node.item) + + " has 'help' but empty help text") + node.help = "" + if line: + self._line_after_help(line) + + def _parse_expr(self, transform_m): + # Parses an expression from the tokens in Kconfig._tokens using a + # simple top-down approach. See the module docstring for the expression + # format. + # + # transform_m: + # True if m should be rewritten to m && MODULES. See the + # Kconfig.eval_string() documentation. - # String literal (constant symbol) - if c == '"' or c == "'": - if "\\" in s: - # Slow path: This could probably be sped up, but it's a - # very unusual case anyway. - quote = c - val = "" - while 1: - if i >= len(s): - _tokenization_error(s, filename, linenr) - c = s[i] - if c == quote: - break - if c == "\\": - if i + 1 >= len(s): - _tokenization_error(s, filename, linenr) - val += s[i + 1] - i += 2 - else: - val += c - i += 1 - i += 1 - append(val) - else: - # Fast path: If the string contains no backslashes - # (almost always) we can simply look for the matching - # quote. - end = s.find(c, i) - if end == -1: - _tokenization_error(s, filename, linenr) - append(s[i:end]) - i = end + 1 - - elif c == "&": - # Invalid characters are ignored - if i >= len(s) or s[i] != "&": continue - append(T_AND) - i += 1 + # Grammar: + # + # expr: and_expr ['||' expr] + # and_expr: factor ['&&' and_expr] + # factor: <symbol> ['='/'!='/'<'/... <symbol>] + # '!' factor + # '(' expr ')' + # + # It helps to think of the 'expr: and_expr' case as a single-operand OR + # (no ||), and of the 'and_expr: factor' case as a single-operand AND + # (no &&). Parsing code is always a bit tricky. + + # Mind dump: parse_factor() and two nested loops for OR and AND would + # work as well. The straightforward implementation there gives a + # (op, (op, (op, A, B), C), D) parse for A op B op C op D. Representing + # expressions as (op, [list of operands]) instead goes nicely with that + # version, but is wasteful for short expressions and complicates + # expression evaluation and other code that works on expressions (more + # complicated code likely offsets any performance gain from less + # recursion too). If we also try to optimize the list representation by + # merging lists when possible (e.g. when ANDing two AND expressions), + # we end up allocating a ton of lists instead of reusing expressions, + # which is bad. + + and_expr = self._parse_and_expr(transform_m) + + # Return 'and_expr' directly if we have a "single-operand" OR. + # Otherwise, parse the expression on the right and make an OR node. + # This turns A || B || C || D into (OR, A, (OR, B, (OR, C, D))). + return and_expr if not self._check_token(_T_OR) else \ + (OR, and_expr, self._parse_expr(transform_m)) + + def _parse_and_expr(self, transform_m): + factor = self._parse_factor(transform_m) + + # Return 'factor' directly if we have a "single-operand" AND. + # Otherwise, parse the right operand and make an AND node. This turns + # A && B && C && D into (AND, A, (AND, B, (AND, C, D))). + return factor if not self._check_token(_T_AND) else \ + (AND, factor, self._parse_and_expr(transform_m)) + + def _parse_factor(self, transform_m): + token = self._tokens[self._tokens_i] + self._tokens_i += 1 + + if token.__class__ is Symbol: + # Plain symbol or relation + + if self._tokens[self._tokens_i] not in _RELATIONS: + # Plain symbol + + # For conditional expressions ('depends on <expr>', + # '... if <expr>', etc.), m is rewritten to m && MODULES. + if transform_m and token is self.m: + return (AND, self.m, self.modules) - elif c == "|": - # Invalid characters are ignored - if i >= len(s) or s[i] != "|": continue - append(T_OR) - i += 1 + return token - elif c == "!": - if i < len(s) and s[i] == "=": - append(T_UNEQUAL) - i += 1 - else: - append(T_NOT) + # Relation + # + # _T_EQUAL, _T_UNEQUAL, etc., deliberately have the same values as + # EQUAL, UNEQUAL, etc., so we can just use the token directly + self._tokens_i += 1 + return (self._tokens[self._tokens_i - 1], token, + self._expect_sym()) + + if token is _T_NOT: + # token == _T_NOT == NOT + return (token, self._parse_factor(transform_m)) - elif c == "=": append(T_EQUAL) - elif c == "(": append(T_OPEN_PAREN) - elif c == ")": append(T_CLOSE_PAREN) - elif c == "#": break # Comment + if token is _T_OPEN_PAREN: + expr_parse = self._parse_expr(transform_m) + if self._check_token(_T_CLOSE_PAREN): + return expr_parse - else: continue # Invalid characters are ignored + self._parse_error("malformed expression") - previous = tokens[-1] + # + # Caching and invalidation + # - return _Feed(tokens) + def _build_dep(self): + # Populates the Symbol/Choice._dependents sets, which contain all other + # items (symbols and choices) that immediately depend on the item in + # the sense that changing the value of the item might affect the value + # of the dependent items. This is used for caching/invalidation. + # + # The calculated sets might be larger than necessary as we don't do any + # complex analysis of the expressions. + + make_depend_on = _make_depend_on # Micro-optimization + + # Only calculate _dependents for defined symbols. Constant and + # undefined symbols could theoretically be selected/implied, but it + # wouldn't change their value, so it's not a true dependency. + for sym in self.unique_defined_syms: + # Symbols depend on the following: + + # The prompt conditions + for node in sym.nodes: + if node.prompt: + make_depend_on(sym, node.prompt[1]) + + # The default values and their conditions + for value, cond in sym.defaults: + make_depend_on(sym, value) + make_depend_on(sym, cond) + + # The reverse and weak reverse dependencies + make_depend_on(sym, sym.rev_dep) + make_depend_on(sym, sym.weak_rev_dep) + + # The ranges along with their conditions + for low, high, cond in sym.ranges: + make_depend_on(sym, low) + make_depend_on(sym, high) + make_depend_on(sym, cond) + + # The direct dependencies. This is usually redundant, as the direct + # dependencies get propagated to properties, but it's needed to get + # invalidation solid for 'imply', which only checks the direct + # dependencies (even if there are no properties to propagate it + # to). + make_depend_on(sym, sym.direct_dep) + + # In addition to the above, choice symbols depend on the choice + # they're in, but that's handled automatically since the Choice is + # propagated to the conditions of the properties before + # _build_dep() runs. + + for choice in self.unique_choices: + # Choices depend on the following: + + # The prompt conditions + for node in choice.nodes: + if node.prompt: + make_depend_on(choice, node.prompt[1]) + + # The default symbol conditions + for _, cond in choice.defaults: + make_depend_on(choice, cond) + + def _add_choice_deps(self): + # Choices also depend on the choice symbols themselves, because the + # y-mode selection of the choice might change if a choice symbol's + # visibility changes. + # + # We add these dependencies separately after dependency loop detection. + # The invalidation algorithm can handle the resulting + # <choice symbol> <-> <choice> dependency loops, but they make loop + # detection awkward. - def _sym_lookup(self, name, for_eval=False): - """Fetches the symbol 'name' from the symbol table, creating and - registering it if it does not exist. If 'for_eval' is True, the symbol - won't be added to the symbol table if it does not exist -- this is for - Config.eval().""" - if name in self.syms: - return self.syms[name] + for choice in self.unique_choices: + for sym in choice.syms: + sym._dependents.add(choice) - new_sym = Symbol() - new_sym.config = self - new_sym.name = name - if for_eval: - self._warn("no symbol {0} in configuration".format(name)) - else: - self.syms[name] = new_sym - return new_sym + def _invalidate_all(self): + # Undefined symbols never change value and don't need to be + # invalidated, so we can just iterate over defined symbols. + # Invalidating constant symbols would break things horribly. + for sym in self.unique_defined_syms: + sym._invalidate() + + for choice in self.unique_choices: + choice._invalidate() # - # Expression evaluation + # Post-parsing menu tree processing, including dependency propagation and + # implicit submenu creation # - def _eval_expr(self, expr): - """Evaluates an expression to "n", "m", or "y".""" + def _finalize_node(self, node, visible_if): + # Finalizes a menu node and its children: + # + # - Copies properties from menu nodes up to their contained + # symbols/choices + # + # - Propagates dependencies from parent to child nodes + # + # - Creates implicit menus (see kconfig-language.txt) + # + # - Removes 'if' nodes + # + # - Sets 'choice' types and registers choice symbols + # + # menu_finalize() in the C implementation is similar. + # + # node: + # The menu node to finalize. This node and its children will have + # been finalized when the function returns, and any implicit menus + # will have been created. + # + # visible_if: + # Dependencies from 'visible if' on parent menus. These are added to + # the prompts of symbols and choices. + + if node.item.__class__ is Symbol: + # Copy defaults, ranges, selects, and implies to the Symbol + self._add_props_to_sym(node) + + # Find any items that should go in an implicit menu rooted at the + # symbol + cur = node + while cur.next and _auto_menu_dep(node, cur.next): + # This makes implicit submenu creation work recursively, with + # implicit menus inside implicit menus + self._finalize_node(cur.next, visible_if) + cur = cur.next + cur.parent = node + + if cur is not node: + # Found symbols that should go in an implicit submenu. Tilt + # them up above us. + node.list = node.next + node.next = cur.next + cur.next = None + + elif node.list: + # The menu node is a choice, menu, or if. Finalize each child node. + + if node.item is MENU: + visible_if = self._make_and(visible_if, node.visibility) + + # Propagate the menu node's dependencies to each child menu node. + # + # This needs to go before the recursive _finalize_node() call so + # that implicit submenu creation can look ahead at dependencies. + self._propagate_deps(node, visible_if) + + # Finalize the children + cur = node.list + while cur: + self._finalize_node(cur, visible_if) + cur = cur.next + + if node.list: + # node's children have been individually finalized. Do final steps + # to finalize this "level" in the menu tree. + _flatten(node.list) + _remove_ifs(node) + + # Empty choices (node.list None) are possible, so this needs to go + # outside + if node.item.__class__ is Choice: + # Add the node's non-node-specific properties to the choice, like + # _add_props_to_sym() does + choice = node.item + choice.direct_dep = self._make_or(choice.direct_dep, node.dep) + choice.defaults += node.defaults + + _finalize_choice(node) + + def _propagate_deps(self, node, visible_if): + # Propagates 'node's dependencies to its child menu nodes + + # If the parent node holds a Choice, we use the Choice itself as the + # parent dependency. This makes sense as the value (mode) of the choice + # limits the visibility of the contained choice symbols. The C + # implementation works the same way. + # + # Due to the similar interface, Choice works as a drop-in replacement + # for Symbol here. + basedep = node.item if node.item.__class__ is Choice else node.dep + + cur = node.list + while cur: + dep = cur.dep = self._make_and(cur.dep, basedep) + + if cur.item.__class__ in _SYMBOL_CHOICE: + # Propagate 'visible if' and dependencies to the prompt + if cur.prompt: + cur.prompt = (cur.prompt[0], + self._make_and( + cur.prompt[1], + self._make_and(visible_if, dep))) + + # Propagate dependencies to defaults + if cur.defaults: + cur.defaults = [(default, self._make_and(cond, dep)) + for default, cond in cur.defaults] + + # Propagate dependencies to ranges + if cur.ranges: + cur.ranges = [(low, high, self._make_and(cond, dep)) + for low, high, cond in cur.ranges] + + # Propagate dependencies to selects + if cur.selects: + cur.selects = [(target, self._make_and(cond, dep)) + for target, cond in cur.selects] + + # Propagate dependencies to implies + if cur.implies: + cur.implies = [(target, self._make_and(cond, dep)) + for target, cond in cur.implies] + + elif cur.prompt: # Not a symbol/choice + # Propagate dependencies to the prompt. 'visible if' is only + # propagated to symbols/choices. + cur.prompt = (cur.prompt[0], + self._make_and(cur.prompt[1], dep)) + + cur = cur.next + + def _add_props_to_sym(self, node): + # Copies properties from the menu node 'node' up to its contained + # symbol, and adds (weak) reverse dependencies to selected/implied + # symbols. + # + # This can't be rolled into _propagate_deps(), because that function + # traverses the menu tree roughly breadth-first, meaning properties on + # symbols defined in multiple locations could end up in the wrong + # order. + + sym = node.item + + # See the Symbol class docstring + sym.direct_dep = self._make_or(sym.direct_dep, node.dep) + + sym.defaults += node.defaults + sym.ranges += node.ranges + sym.selects += node.selects + sym.implies += node.implies + + # Modify the reverse dependencies of the selected symbol + for target, cond in node.selects: + target.rev_dep = self._make_or( + target.rev_dep, + self._make_and(sym, cond)) + + # Modify the weak reverse dependencies of the implied + # symbol + for target, cond in node.implies: + target.weak_rev_dep = self._make_or( + target.weak_rev_dep, + self._make_and(sym, cond)) - # Handles e.g. an "x if y" condition where the "if y" part is missing. - if expr is None: - return "y" + # + # Misc. + # - res = self._eval_expr_rec(expr) - if res == "m": - # Promote "m" to "y" if we're running without modules. + def _check_sym_sanity(self): + # Checks various symbol properties that are handiest to check after + # parsing. Only generates errors and warnings. + + def num_ok(sym, type_): + # Returns True if the (possibly constant) symbol 'sym' is valid as a value + # for a symbol of type type_ (INT or HEX) + + # 'not sym.nodes' implies a constant or undefined symbol, e.g. a plain + # "123" + if not sym.nodes: + return _is_base_n(sym.name, _TYPE_TO_BASE[type_]) + + return sym.orig_type is type_ + + for sym in self.unique_defined_syms: + if sym.orig_type in _BOOL_TRISTATE: + # A helper function could be factored out here, but keep it + # speedy/straightforward + + for target_sym, _ in sym.selects: + if target_sym.orig_type not in _BOOL_TRISTATE_UNKNOWN: + self._warn("{} selects the {} symbol {}, which is not " + "bool or tristate" + .format(_name_and_loc(sym), + TYPE_TO_STR[target_sym.orig_type], + _name_and_loc(target_sym))) + + for target_sym, _ in sym.implies: + if target_sym.orig_type not in _BOOL_TRISTATE_UNKNOWN: + self._warn("{} implies the {} symbol {}, which is not " + "bool or tristate" + .format(_name_and_loc(sym), + TYPE_TO_STR[target_sym.orig_type], + _name_and_loc(target_sym))) + + elif sym.orig_type: # STRING/INT/HEX + for default, _ in sym.defaults: + if default.__class__ is not Symbol: + raise KconfigError( + "the {} symbol {} has a malformed default {} -- expected " + "a single symbol" + .format(TYPE_TO_STR[sym.orig_type], _name_and_loc(sym), + expr_str(default))) + + if sym.orig_type is STRING: + if not default.is_constant and not default.nodes and \ + not default.name.isupper(): + # 'default foo' on a string symbol could be either a symbol + # reference or someone leaving out the quotes. Guess that + # the quotes were left out if 'foo' isn't all-uppercase + # (and no symbol named 'foo' exists). + self._warn("style: quotes recommended around " + "default value for string symbol " + + _name_and_loc(sym)) + + elif not num_ok(default, sym.orig_type): # INT/HEX + self._warn("the {0} symbol {1} has a non-{0} default {2}" + .format(TYPE_TO_STR[sym.orig_type], + _name_and_loc(sym), + _name_and_loc(default))) + + if sym.selects or sym.implies: + self._warn("the {} symbol {} has selects or implies" + .format(TYPE_TO_STR[sym.orig_type], + _name_and_loc(sym))) + + else: # UNKNOWN + self._warn("{} defined without a type" + .format(_name_and_loc(sym))) + + + if sym.ranges: + if sym.orig_type not in _INT_HEX: + self._warn( + "the {} symbol {} has ranges, but is not int or hex" + .format(TYPE_TO_STR[sym.orig_type], + _name_and_loc(sym))) + else: + for low, high, _ in sym.ranges: + if not num_ok(low, sym.orig_type) or \ + not num_ok(high, sym.orig_type): + + self._warn("the {0} symbol {1} has a non-{0} " + "range [{2}, {3}]" + .format(TYPE_TO_STR[sym.orig_type], + _name_and_loc(sym), + _name_and_loc(low), + _name_and_loc(high))) + + def _check_choice_sanity(self): + # Checks various choice properties that are handiest to check after + # parsing. Only generates errors and warnings. + + def warn_select_imply(sym, expr, expr_type): + msg = "the choice symbol {} is {} by the following symbols, but " \ + "select/imply has no effect on choice symbols" \ + .format(_name_and_loc(sym), expr_type) + + # si = select/imply + for si in split_expr(expr, OR): + msg += "\n - " + _name_and_loc(split_expr(si, AND)[0]) + + self._warn(msg) + + for choice in self.unique_choices: + if choice.orig_type not in _BOOL_TRISTATE: + self._warn("{} defined with type {}" + .format(_name_and_loc(choice), + TYPE_TO_STR[choice.orig_type])) + + for node in choice.nodes: + if node.prompt: + break + else: + self._warn(_name_and_loc(choice) + " defined without a prompt") + + for default, _ in choice.defaults: + if default.__class__ is not Symbol: + raise KconfigError( + "{} has a malformed default {}" + .format(_name_and_loc(choice), expr_str(default))) + + if default.choice is not choice: + self._warn("the default selection {} of {} is not " + "contained in the choice" + .format(_name_and_loc(default), + _name_and_loc(choice))) + + for sym in choice.syms: + if sym.defaults: + self._warn("default on the choice symbol {} will have " + "no effect, as defaults do not affect choice " + "symbols".format(_name_and_loc(sym))) + + if sym.rev_dep is not sym.kconfig.n: + warn_select_imply(sym, sym.rev_dep, "selected") + + if sym.weak_rev_dep is not sym.kconfig.n: + warn_select_imply(sym, sym.weak_rev_dep, "implied") + + for node in sym.nodes: + if node.parent.item is choice: + if not node.prompt: + self._warn("the choice symbol {} has no prompt" + .format(_name_and_loc(sym))) + + elif node.prompt: + self._warn("the choice symbol {} is defined with a " + "prompt outside the choice" + .format(_name_and_loc(sym))) + + def _parse_error(self, msg): + raise KconfigError("{}couldn't parse '{}': {}".format( + "" if self.filename is None else + "{}:{}: ".format(self.filename, self.linenr), + self._line.strip(), msg)) + + def _trailing_tokens_error(self): + self._parse_error("extra tokens at end of line") + + def _open(self, filename, mode): + # open() wrapper: + # + # - Enable universal newlines mode on Python 2 to ease + # interoperability between Linux and Windows. It's already the + # default on Python 3. + # + # The "U" flag would currently work for both Python 2 and 3, but it's + # deprecated on Python 3, so play it future-safe. + # + # io.open() defaults to universal newlines on Python 2 (and is an + # alias for open() on Python 3), but it returns 'unicode' strings and + # slows things down: + # + # Parsing x86 Kconfigs on Python 2 + # + # with open(..., "rU"): + # + # real 0m0.930s + # user 0m0.905s + # sys 0m0.025s + # + # with io.open(): + # + # real 0m1.069s + # user 0m1.040s + # sys 0m0.029s + # + # There's no appreciable performance difference between "r" and + # "rU" for parsing performance on Python 2. + # + # - For Python 3, force the encoding. Forcing the encoding on Python 2 + # turns strings into Unicode strings, which gets messy. Python 2 + # doesn't decode regular strings anyway. + return open(filename, "rU" if mode == "r" else mode) if _IS_PY2 else \ + open(filename, mode, encoding=self._encoding) + + def _check_undef_syms(self): + # Prints warnings for all references to undefined symbols within the + # Kconfig files + + def is_num(s): + # Returns True if the string 's' looks like a number. # - # Internally, "m" is often rewritten to "m" && MODULES by both the - # C implementation and Kconfiglib, which takes care of cases where - # "m" should be demoted to "n" instead. - modules_sym = self.syms.get("MODULES") - if modules_sym is None or modules_sym.get_value() != "y": - return "y" - return res + # Internally, all operands in Kconfig are symbols, only undefined symbols + # (which numbers usually are) get their name as their value. + # + # Only hex numbers that start with 0x/0X are classified as numbers. + # Otherwise, symbols whose names happen to contain only the letters A-F + # would trigger false positives. - def _eval_expr_rec(self, expr): - if isinstance(expr, Symbol): - # Non-bool/tristate symbols are always "n" in a tristate sense, - # regardless of their value - if expr.type != BOOL and expr.type != TRISTATE: - return "n" - return expr.get_value() - - if isinstance(expr, str): - return expr if (expr == "y" or expr == "m") else "n" - - # Ordered by frequency - - if expr[0] == AND: - res = "y" - for subexpr in expr[1]: - ev = self._eval_expr_rec(subexpr) - # Return immediately upon discovering an "n" term - if ev == "n": - return "n" - if ev == "m": - res = "m" - # 'res' is either "m" or "y" here; we already handled the - # short-circuiting "n" case in the loop. - return res + try: + int(s) + except ValueError: + if not s.startswith(("0x", "0X")): + return False - if expr[0] == NOT: - ev = self._eval_expr_rec(expr[1]) - if ev == "y": - return "n" - return "y" if (ev == "n") else "m" - - if expr[0] == OR: - res = "n" - for subexpr in expr[1]: - ev = self._eval_expr_rec(subexpr) - # Return immediately upon discovering a "y" term - if ev == "y": - return "y" - if ev == "m": - res = "m" - # 'res' is either "n" or "m" here; we already handled the - # short-circuiting "y" case in the loop. - return res + try: + int(s, 16) + except ValueError: + return False - if expr[0] == EQUAL: - return "y" if (_str_val(expr[1]) == _str_val(expr[2])) else "n" + return True - if expr[0] == UNEQUAL: - return "y" if (_str_val(expr[1]) != _str_val(expr[2])) else "n" + for sym in (self.syms.viewvalues if _IS_PY2 else self.syms.values)(): + # - sym.nodes empty means the symbol is undefined (has no + # definition locations) + # + # - Due to Kconfig internals, numbers show up as undefined Kconfig + # symbols, but shouldn't be flagged + # + # - The MODULES symbol always exists + if not sym.nodes and not is_num(sym.name) and \ + sym.name != "MODULES": - _internal_error("Internal error while evaluating expression: " - "unknown operation {0}.".format(expr[0])) + msg = "undefined symbol {}:".format(sym.name) + for node in self.node_iter(): + if sym in node.referenced: + msg += "\n\n- Referenced at {}:{}:\n\n{}" \ + .format(node.filename, node.linenr, node) + self._warn(msg) - def _eval_min(self, e1, e2): - """Returns the minimum value of the two expressions. Equates None with - 'y'.""" - e1_eval = self._eval_expr(e1) - e2_eval = self._eval_expr(e2) - return e1_eval if tri_less(e1_eval, e2_eval) else e2_eval + def _warn(self, msg, filename=None, linenr=None): + # For printing general warnings - def _eval_max(self, e1, e2): - """Returns the maximum value of the two expressions. Equates None with - 'y'.""" - e1_eval = self._eval_expr(e1) - e2_eval = self._eval_expr(e2) - return e1_eval if tri_greater(e1_eval, e2_eval) else e2_eval + if not self.warn: + return - # - # Dependency tracking (for caching and invalidation) - # + msg = "warning: " + msg + if filename is not None: + msg = "{}:{}: {}".format(filename, linenr, msg) - def _build_dep(self): - """Populates the Symbol.dep sets, linking the symbol to the symbols - that immediately depend on it in the sense that changing the value of - the symbol might affect the values of those other symbols. This is used - for caching/invalidation purposes. The calculated sets might be larger - than necessary as we don't do any complicated analysis of the - expressions.""" - - # Adds 'sym' as a directly dependent symbol to all symbols that appear - # in the expression 'e' - def add_expr_deps(e, sym): - for s in _get_expr_syms(e): - s.dep.add(sym) - - # The directly dependent symbols of a symbol are: - # - Any symbols whose prompts, default values, rev_dep (select - # condition), weak_rev_dep (imply condition) or ranges depend on the - # symbol - # - Any symbols that belong to the same choice statement as the symbol - # (these won't be included in 'dep' as that makes the dependency - # graph unwieldy, but Symbol._get_dependent() will include them) - # - Any symbols in a choice statement that depends on the symbol - for sym in self.syms_iter(): - for _, e in sym.prompts: - add_expr_deps(e, sym) - - for v, e in sym.def_exprs: - add_expr_deps(v, sym) - add_expr_deps(e, sym) - - add_expr_deps(sym.rev_dep, sym) - add_expr_deps(sym.weak_rev_dep, sym) - - for l, u, e in sym.ranges: - add_expr_deps(l, sym) - add_expr_deps(u, sym) - add_expr_deps(e, sym) - - if sym.is_choice_sym: - choice = sym.parent - for _, e in choice.prompts: - add_expr_deps(e, sym) - for _, e in choice.def_exprs: - add_expr_deps(e, sym) - - def _eq_to_sym(self, eq): - """_expr_depends_on() helper. For (in)equalities of the form sym = y/m - or sym != n, returns sym. For other (in)equalities, returns None.""" - relation, left, right = eq - - def transform_y_m_n(item): - if item is self.y: return "y" - if item is self.m: return "m" - if item is self.n: return "n" - return item - - left = transform_y_m_n(left) - right = transform_y_m_n(right) - - # Make sure the symbol (if any) appears to the left - if not isinstance(left, Symbol): - left, right = right, left - if not isinstance(left, Symbol): - return None - if (relation == EQUAL and (right == "y" or right == "m")) or \ - (relation == UNEQUAL and right == "n"): - return left - return None + self.warnings.append(msg) + if self.warn_to_stderr: + sys.stderr.write(msg + "\n") - def _expr_depends_on(self, expr, sym): - """Reimplementation of expr_depends_symbol() from mconf.c. Used to - determine if a submenu should be implicitly created, which influences - what items inside choice statements are considered choice items.""" - if expr is None: - return False - def rec(expr): - if isinstance(expr, str): - return False - if isinstance(expr, Symbol): - return expr is sym - - if expr[0] in (EQUAL, UNEQUAL): - return self._eq_to_sym(expr) is sym - if expr[0] == AND: - for and_expr in expr[1]: - if rec(and_expr): - return True - return False +class Symbol(object): + """ + Represents a configuration symbol: - return rec(expr) + (menu)config FOO + ... - def _invalidate_all(self): - for sym in self.syms_iter(): - sym._invalidate() + The following attributes are available. They should be viewed as read-only, + and some are implemented through @property magic (but are still efficient + to access due to internal caching). - # - # Printing and misc. - # + Note: Prompts, help texts, and locations are stored in the Symbol's + MenuNode(s) rather than in the Symbol itself. Check the MenuNode class and + the Symbol.nodes attribute. This organization matches the C tools. - def _expand_sym_refs(self, s): - """Expands $-references to symbols in 's' to symbol values, or to the - empty string for undefined symbols.""" + name: + The name of the symbol, e.g. "FOO" for 'config FOO'. - while 1: - sym_ref_match = _sym_ref_re_search(s) - if sym_ref_match is None: - return s + type: + The type of the symbol. One of BOOL, TRISTATE, STRING, INT, HEX, UNKNOWN. + UNKNOWN is for undefined symbols, (non-special) constant symbols, and + symbols defined without a type. - sym_name = sym_ref_match.group(0)[1:] - sym = self.syms.get(sym_name) - expansion = "" if sym is None else sym.get_value() + When running without modules (MODULES having the value n), TRISTATE + symbols magically change type to BOOL. This also happens for symbols + within choices in "y" mode. This matches the C tools, and makes sense for + menuconfig-like functionality. - s = s[:sym_ref_match.start()] + \ - expansion + \ - s[sym_ref_match.end():] + orig_type: + The type as given in the Kconfig file, without any magic applied. Used + when printing the symbol. - def _expr_val_str(self, expr, no_value_str="(none)", - get_val_instead_of_eval=False): - """Printing helper. Returns a string with 'expr' and its value. + str_value: + The value of the symbol as a string. Gives the value for string/int/hex + symbols. For bool/tristate symbols, gives "n", "m", or "y". - no_value_str: String to return when 'expr' is missing (None). + This is the symbol value that's used in relational expressions + (A = B, A != B, etc.) - get_val_instead_of_eval: Assume 'expr' is a symbol or string (constant - symbol) and get its value directly instead of evaluating it to a - tristate value.""" + Gotcha: For int/hex symbols, the exact format of the value must often be + preserved (e.g., when writing a .config file), hence why you can't get it + directly as an int. Do int(int_sym.str_value) or + int(hex_sym.str_value, 16) to get the integer value. - if expr is None: - return no_value_str + tri_value: + The tristate value of the symbol as an integer. One of 0, 1, 2, + representing n, m, y. Always 0 (n) for non-bool/tristate symbols. - if get_val_instead_of_eval: - if isinstance(expr, str): - return _expr_to_str(expr) - val = expr.get_value() - else: - val = self._eval_expr(expr) + This is the symbol value that's used outside of relation expressions + (A, !A, A && B, A || B). - return "{0} (value: {1})".format(_expr_to_str(expr), _expr_to_str(val)) + assignable: + A tuple containing the tristate user values that can currently be + assigned to the symbol (that would be respected), ordered from lowest (0, + representing n) to highest (2, representing y). This corresponds to the + selections available in the menuconfig interface. The set of assignable + values is calculated from the symbol's visibility and selects/implies. - def _get_sym_or_choice_str(self, sc): - """Symbols and choices have many properties in common, so we factor out - common __str__() stuff here. "sc" is short for "symbol or choice".""" + Returns the empty set for non-bool/tristate symbols and for symbols with + visibility n. The other possible values are (0, 2), (0, 1, 2), (1, 2), + (1,), and (2,). A (1,) or (2,) result means the symbol is visible but + "locked" to m or y through a select, perhaps in combination with the + visibility. menuconfig represents this as -M- and -*-, respectively. - # As we deal a lot with string representations here, use some - # convenient shorthand: - s = _expr_to_str + For string/hex/int symbols, check if Symbol.visibility is non-0 (non-n) + instead to determine if the value can be changed. - # - # Common symbol/choice properties - # + Some handy 'assignable' idioms: - user_val_str = "(no user value)" if sc.user_val is None else \ - s(sc.user_val) + # Is 'sym' an assignable (visible) bool/tristate symbol? + if sym.assignable: + # What's the highest value it can be assigned? [-1] in Python + # gives the last element. + sym_high = sym.assignable[-1] - # Build prompts string - if not sc.prompts: - prompts_str = " (no prompts)" - else: - prompts_str_rows = [] - for prompt, cond_expr in sc.orig_prompts: - prompts_str_rows.append( - ' "{0}"'.format(prompt) if cond_expr is None else - ' "{0}" if {1}'.format(prompt, - self._expr_val_str(cond_expr))) - prompts_str = "\n".join(prompts_str_rows) - - # Build locations string - locations_str = "(no locations)" if not sc.def_locations else \ - " ".join(["{0}:{1}".format(filename, linenr) for - filename, linenr in sc.def_locations]) - - # Build additional-dependencies-from-menus-and-ifs string - additional_deps_str = " " + \ - self._expr_val_str(sc.deps_from_containing, - "(no additional dependencies)") + # The lowest? + sym_low = sym.assignable[0] - # - # Symbol-specific stuff - # + # Can the symbol be set to at least m? + if sym.assignable[-1] >= 1: + ... - if isinstance(sc, Symbol): - # Build ranges string - if isinstance(sc, Symbol): - if not sc.ranges: - ranges_str = " (no ranges)" - else: - ranges_str_rows = [] - for l, u, cond_expr in sc.ranges: - ranges_str_rows.append( - " [{0}, {1}]".format(s(l), s(u)) - if cond_expr is None else - " [{0}, {1}] if {2}" - .format(s(l), s(u), self._expr_val_str(cond_expr))) - ranges_str = "\n".join(ranges_str_rows) - - # Build default values string - if not sc.def_exprs: - defaults_str = " (no default values)" - else: - defaults_str_rows = [] - for val_expr, cond_expr in sc.orig_def_exprs: - row_str = " " + self._expr_val_str(val_expr, "(none)", - sc.type == STRING) - defaults_str_rows.append(row_str) - defaults_str_rows.append(" Condition: " + - self._expr_val_str(cond_expr)) - defaults_str = "\n".join(defaults_str_rows) - - # Build selects string - if not sc.orig_selects: - selects_str = " (no selects)" - else: - selects_str_rows = [] - for target, cond_expr in sc.orig_selects: - selects_str_rows.append( - " {0}".format(target.name) if cond_expr is None else - " {0} if {1}".format(target.name, - self._expr_val_str(cond_expr))) - selects_str = "\n".join(selects_str_rows) - - # Build implies string - if not sc.orig_implies: - implies_str = " (no implies)" - else: - implies_str_rows = [] - for target, cond_expr in sc.orig_implies: - implies_str_rows.append( - " {0}".format(target.name) if cond_expr is None else - " {0} if {1}".format(target.name, - self._expr_val_str(cond_expr))) - implies_str = "\n".join(implies_str_rows) - - res = _lines("Symbol " + - ("(no name)" if sc.name is None else sc.name), - "Type : " + TYPENAME[sc.type], - "Value : " + s(sc.get_value()), - "User value : " + user_val_str, - "Visibility : " + s(_get_visibility(sc)), - "Is choice item : " + BOOL_STR[sc.is_choice_sym], - "Is defined : " + BOOL_STR[sc.is_defined_], - "Is from env. : " + BOOL_STR[sc.is_from_env], - "Is special : " + BOOL_STR[sc.is_special_] + "\n") - if sc.ranges: - res += _lines("Ranges:", ranges_str + "\n") - res += _lines("Prompts:", - prompts_str, - "Default values:", - defaults_str, - "Selects:", - selects_str, - "Implies:", - implies_str, - "Reverse (select-related) dependencies:", - " (no reverse dependencies)" - if sc.rev_dep == "n" - else " " + self._expr_val_str(sc.rev_dep), - "Weak reverse (imply-related) dependencies:", - " (no weak reverse dependencies)" - if sc.weak_rev_dep == "n" - else " " + self._expr_val_str(sc.weak_rev_dep), - "Additional dependencies from enclosing menus " - "and ifs:", - additional_deps_str, - "Locations: " + locations_str) + # Can the symbol be set to m? + if 1 in sym.assignable: + ... - return res + visibility: + The visibility of the symbol. One of 0, 1, 2, representing n, m, y. See + the module documentation for an overview of symbol values and visibility. - # - # Choice-specific stuff - # + user_value: + The user value of the symbol. None if no user value has been assigned + (via Kconfig.load_config() or Symbol.set_value()). - # Build selected symbol string - sel = sc.get_selection() - sel_str = "(no selection)" if sel is None else sel.name + Holds 0, 1, or 2 for bool/tristate symbols, and a string for the other + symbol types. - # Build default values string - if not sc.def_exprs: - defaults_str = " (no default values)" - else: - defaults_str_rows = [] - for sym, cond_expr in sc.orig_def_exprs: - defaults_str_rows.append( - " {0}".format(sym.name) if cond_expr is None else - " {0} if {1}".format(sym.name, - self._expr_val_str(cond_expr))) - defaults_str = "\n".join(defaults_str_rows) - - # Build contained symbols string - names = [sym.name for sym in sc.actual_symbols] - syms_string = " ".join(names) if names else "(empty)" - - return _lines("Choice", - "Name (for named choices): " + - ("(no name)" if sc.name is None else sc.name), - "Type : " + TYPENAME[sc.type], - "Selected symbol : " + sel_str, - "User value : " + user_val_str, - "Mode : " + s(sc.get_mode()), - "Visibility : " + s(_get_visibility(sc)), - "Optional : " + BOOL_STR[sc.optional], - "Prompts:", - prompts_str, - "Defaults:", - defaults_str, - "Choice symbols:", - " " + syms_string, - "Additional dependencies from enclosing menus and " - "ifs:", - additional_deps_str, - "Locations: " + locations_str) + WARNING: Do not assign directly to this. It will break things. Use + Symbol.set_value(). - def _warn(self, msg, filename=None, linenr=None): - """For printing warnings to stderr.""" - msg = _build_msg("warning: " + msg, filename, linenr) - if self.print_warnings: - sys.stderr.write(msg + "\n") - self._warnings.append(msg) + config_string: + The .config assignment string that would get written out for the symbol + by Kconfig.write_config(). Returns the empty string if no .config + assignment would get written out. -class Item(object): + In general, visible symbols, symbols with (active) defaults, and selected + symbols get written out. This includes all non-n-valued bool/tristate + symbols, and all visible string/int/hex symbols. - """Base class for symbols and other Kconfig constructs. Subclasses are - Symbol, Choice, Menu, and Comment.""" + Symbols with the (no longer needed) 'option env=...' option generate no + configuration output, and neither does the special + 'option defconfig_list' symbol. - def is_symbol(self): - """Returns True if the item is a symbol. Short for - isinstance(item, kconfiglib.Symbol).""" - return isinstance(self, Symbol) + Tip: This field is useful when generating custom configuration output, + even for non-.config-like formats. To write just the symbols that would + get written out to .config files, do this: - def is_choice(self): - """Returns True if the item is a choice. Short for - isinstance(item, kconfiglib.Choice).""" - return isinstance(self, Choice) + if sym.config_string: + *Write symbol, e.g. by looking sym.str_value* - def is_menu(self): - """Returns True if the item is a menu. Short for - isinstance(item, kconfiglib.Menu).""" - return isinstance(self, Menu) + This is a superset of the symbols written out by write_autoconf(). + That function skips all n-valued symbols. - def is_comment(self): - """Returns True if the item is a comment. Short for - isinstance(item, kconfiglib.Comment).""" - return isinstance(self, Comment) + There usually won't be any great harm in just writing all symbols either, + though you might get some special symbols and possibly some "redundant" + n-valued symbol entries in there. -class Symbol(Item): + nodes: + A list of MenuNodes for this symbol. Will contain a single MenuNode for + most symbols. Undefined and constant symbols have an empty nodes list. + Symbols defined in multiple locations get one node for each location. - """Represents a configuration symbol - e.g. FOO for + choice: + Holds the parent Choice for choice symbols, and None for non-choice + symbols. Doubles as a flag for whether a symbol is a choice symbol. - config FOO - ...""" + defaults: + List of (default, cond) tuples for the symbol's 'default' properties. For + example, 'default A && B if C || D' is represented as + ((AND, A, B), (OR, C, D)). If no condition was given, 'cond' is + self.kconfig.y. - # - # Public interface - # + Note that 'depends on' and parent dependencies are propagated to + 'default' conditions. + + selects: + List of (symbol, cond) tuples for the symbol's 'select' properties. For + example, 'select A if B && C' is represented as (A, (AND, B, C)). If no + condition was given, 'cond' is self.kconfig.y. + + Note that 'depends on' and parent dependencies are propagated to 'select' + conditions. + + implies: + Like 'selects', for imply. + + ranges: + List of (low, high, cond) tuples for the symbol's 'range' properties. For + example, 'range 1 2 if A' is represented as (1, 2, A). If there is no + condition, 'cond' is self.kconfig.y. + + Note that 'depends on' and parent dependencies are propagated to 'range' + conditions. + + Gotcha: 1 and 2 above will be represented as (undefined) Symbols rather + than plain integers. Undefined symbols get their name as their string + value, so this works out. The C tools work the same way. + + orig_defaults: + orig_selects: + orig_implies: + orig_ranges: + See the corresponding attributes on the MenuNode class. + + rev_dep: + Reverse dependency expression from other symbols selecting this symbol. + Multiple selections get ORed together. A condition on a select is ANDed + with the selecting symbol. + + For example, if A has 'select FOO' and B has 'select FOO if C', then + FOO's rev_dep will be (OR, A, (AND, B, C)). + + weak_rev_dep: + Like rev_dep, for imply. + + direct_dep: + The direct ('depends on') dependencies for the symbol, or self.kconfig.y + if there are no direct dependencies. + + This attribute includes any dependencies from surrounding menus and ifs. + Those get propagated to the direct dependencies, and the resulting direct + dependencies in turn get propagated to the conditions of all properties. + + If the symbol is defined in multiple locations, the dependencies from the + different locations get ORed together. + + referenced: + A set() with all symbols and choices referenced in the properties and + property conditions of the symbol. + + Also includes dependencies from surrounding menus and ifs, because those + get propagated to the symbol (see the 'Intro to symbol values' section in + the module docstring). - def get_config(self): - """Returns the Config instance this symbol is from.""" - return self.config - - def get_name(self): - """Returns the name of the symbol.""" - return self.name - - def get_type(self): - """Returns the type of the symbol: one of UNKNOWN, BOOL, TRISTATE, - STRING, HEX, or INT. These are defined at the top level of the module, - so you'd do something like - - if sym.get_type() == kconfiglib.STRING: - ...""" - return self.type - - def get_prompts(self): - """Returns a list of prompts defined for the symbol, in the order they - appear in the configuration files. Returns the empty list for symbols - with no prompt. - - This list will have a single entry for the vast majority of symbols - having prompts, but having multiple prompts for a single symbol is - possible through having multiple 'config' entries for it.""" - return [prompt for prompt, _ in self.orig_prompts] - - def get_help(self): - """Returns the help text of the symbol, or None if the symbol has no - help text.""" - return self.help - - def get_parent(self): - """Returns the menu or choice statement that contains the symbol, or - None if the symbol is at the top level. Note that if statements are - treated as syntactic and do not have an explicit class - representation.""" - return self.parent - - def get_def_locations(self): - """Returns a list of (filename, linenr) tuples, where filename (string) - and linenr (int) represent a location where the symbol is defined. For - the vast majority of symbols this list will only contain one element. - For the following Kconfig, FOO would get two entries: the lines marked - with *. - - config FOO * - bool "foo prompt 1" - - config FOO * - bool "foo prompt 2" - """ - return self.def_locations - - def get_ref_locations(self): - """Returns a list of (filename, linenr) tuples, where filename (string) - and linenr (int) represent a location where the symbol is referenced in - the configuration. For example, the lines marked by * would be included - for FOO below: + Choices appear in the dependencies of choice symbols. + + For the following definitions, only B and not C appears in A's + 'referenced'. To get transitive references, you'll have to recursively + expand 'references' until no new items appear. config A - bool - default BAR || FOO * + bool + depends on B config B - tristate - depends on FOO * - default m if FOO * + bool + depends on C + + config C + bool + + See the Symbol.direct_dep attribute if you're only interested in the + direct dependencies of the symbol (its 'depends on'). You can extract the + symbols in it with the global expr_items() function. + + env_var: + If the Symbol has an 'option env="FOO"' option, this contains the name + ("FOO") of the environment variable. None for symbols without no + 'option env'. + + 'option env="FOO"' acts like a 'default' property whose value is the + value of $FOO. + + Symbols with 'option env' are never written out to .config files, even if + they are visible. env_var corresponds to a flag called SYMBOL_AUTO in the + C implementation. + + is_allnoconfig_y: + True if the symbol has 'option allnoconfig_y' set on it. This has no + effect internally (except when printing symbols), but can be checked by + scripts. + + is_constant: + True if the symbol is a constant (quoted) symbol. + + kconfig: + The Kconfig instance this symbol is from. + """ + __slots__ = ( + "_cached_assignable", + "_cached_str_val", + "_cached_tri_val", + "_cached_vis", + "_dependents", + "_old_val", + "_visited", + "_was_set", + "_write_to_conf", + "choice", + "defaults", + "direct_dep", + "env_var", + "implies", + "is_allnoconfig_y", + "is_constant", + "kconfig", + "name", + "nodes", + "orig_type", + "ranges", + "rev_dep", + "selects", + "user_value", + "weak_rev_dep", + ) - if FOO * - config A - bool "A" - endif + # + # Public interface + # - config FOO (definition not included) - bool + @property + def type(self): + """ + See the class documentation. """ - return self.ref_locations + if self.orig_type is TRISTATE and \ + (self.choice and self.choice.tri_value == 2 or + not self.kconfig.modules.tri_value): + + return BOOL - def get_value(self): - """Calculate and return the value of the symbol. See also - Symbol.set_user_value().""" + return self.orig_type + + @property + def str_value(self): + """ + See the class documentation. + """ + if self._cached_str_val is not None: + return self._cached_str_val - if self.cached_val is not None: - return self.cached_val + if self.orig_type in _BOOL_TRISTATE: + # Also calculates the visibility, so invalidation safe + self._cached_str_val = TRI_TO_STR[self.tri_value] + return self._cached_str_val # As a quirk of Kconfig, undefined symbols get their name as their - # value. This is why things like "FOO = bar" work for seeing if FOO has - # the value "bar". - if self.type == UNKNOWN: - self.cached_val = self.name + # string value. This is why things like "FOO = bar" work for seeing if + # FOO has the value "bar". + if not self.orig_type: # UNKNOWN + self._cached_str_val = self.name return self.name - new_val = DEFAULT_VALUE[self.type] - vis = _get_visibility(self) + val = "" + # Warning: See Symbol._rec_invalidate(), and note that this is a hidden + # function call (property magic) + vis = self.visibility + + self._write_to_conf = (vis != 0) - # This is easiest to calculate together with the value - self.write_to_conf = False + if self.orig_type in _INT_HEX: + # The C implementation checks the user value against the range in a + # separate code path (post-processing after loading a .config). + # Checking all values here instead makes more sense for us. It + # requires that we check for a range first. - if self.type == BOOL or self.type == TRISTATE: - # The visibility and mode (modules-only or single-selection) of - # choice items will be taken into account in _get_visibility() - if self.is_choice_sym: - if vis != "n": - choice = self.parent - mode = choice.get_mode() + base = _TYPE_TO_BASE[self.orig_type] - self.write_to_conf = (mode != "n") + # Check if a range is in effect + for low_expr, high_expr, cond in self.ranges: + if expr_value(cond): + has_active_range = True - if mode == "y": - new_val = "y" if choice.get_selection() is self \ - else "n" - elif mode == "m": - if self.user_val == "m" or self.user_val == "y": - new_val = "m" + # The zeros are from the C implementation running strtoll() + # on empty strings + low = int(low_expr.str_value, base) if \ + _is_base_n(low_expr.str_value, base) else 0 + high = int(high_expr.str_value, base) if \ + _is_base_n(high_expr.str_value, base) else 0 + break else: - # If the symbol is visible and has a user value, use that. - # Otherwise, look at defaults and weak reverse dependencies - # (implies). - use_defaults_and_weak_rev_deps = True - - if vis != "n": - self.write_to_conf = True - if self.user_val is not None: - new_val = self.config._eval_min(self.user_val, vis) - use_defaults_and_weak_rev_deps = False - - if use_defaults_and_weak_rev_deps: - for val_expr, cond_expr in self.def_exprs: - cond_eval = self.config._eval_expr(cond_expr) - if cond_eval != "n": - self.write_to_conf = True - new_val = self.config._eval_min(val_expr, - cond_eval) - break - - weak_rev_dep_val = \ - self.config._eval_expr(self.weak_rev_dep) - if weak_rev_dep_val != "n": - self.write_to_conf = True - new_val = self.config._eval_max(new_val, - weak_rev_dep_val) - - # Reverse (select-related) dependencies take precedence - rev_dep_val = self.config._eval_expr(self.rev_dep) - if rev_dep_val != "n": - self.write_to_conf = True - new_val = self.config._eval_max(new_val, rev_dep_val) - - # We need to promote "m" to "y" in two circumstances: - # 1) If our type is boolean - # 2) If our weak_rev_dep (from IMPLY) is "y" - if new_val == "m" and \ - (self.type == BOOL or - self.config._eval_expr(self.weak_rev_dep) == "y"): - new_val = "y" - - elif self.type == INT or self.type == HEX: - has_active_range = False - low = None - high = None + has_active_range = False + + # Defaults are used if the symbol is invisible, lacks a user value, + # or has an out-of-range user value use_defaults = True - base = 16 if self.type == HEX else 10 + if vis and self.user_value: + user_val = int(self.user_value, base) + if has_active_range and not low <= user_val <= high: + num2str = str if base == 10 else hex + self.kconfig._warn( + "user value {} on the {} symbol {} ignored due to " + "being outside the active range ([{}, {}]) -- falling " + "back on defaults" + .format(num2str(user_val), TYPE_TO_STR[self.orig_type], + _name_and_loc(self), + num2str(low), num2str(high))) + else: + # If the user value is well-formed and satisfies range + # contraints, it is stored in exactly the same form as + # specified in the assignment (with or without "0x", etc.) + val = self.user_value + use_defaults = False - for l, h, cond_expr in self.ranges: - if self.config._eval_expr(cond_expr) != "n": - has_active_range = True + if use_defaults: + # No user value or invalid user value. Look at defaults. - low_str = _str_val(l) - high_str = _str_val(h) - low = int(low_str, base) if \ - _is_base_n(low_str, base) else 0 - high = int(high_str, base) if \ - _is_base_n(high_str, base) else 0 + # Used to implement the warning below + has_default = False - break + for sym, cond in self.defaults: + if expr_value(cond): + has_default = self._write_to_conf = True - if vis != "n": - self.write_to_conf = True + val = sym.str_value - if self.user_val is not None and \ - _is_base_n(self.user_val, base) and \ - (not has_active_range or - low <= int(self.user_val, base) <= high): + if _is_base_n(val, base): + val_num = int(val, base) + else: + val_num = 0 # strtoll() on empty string - # If the user value is OK, it is stored in exactly the same - # form as specified in the assignment (with or without - # "0x", etc). + break + else: + val_num = 0 # strtoll() on empty string + + # This clamping procedure runs even if there's no default + if has_active_range: + clamp = None + if val_num < low: + clamp = low + elif val_num > high: + clamp = high + + if clamp is not None: + # The value is rewritten to a standard form if it is + # clamped + val = str(clamp) \ + if self.orig_type is INT else \ + hex(clamp) + + if has_default: + num2str = str if base == 10 else hex + self.kconfig._warn( + "default value {} on {} clamped to {} due to " + "being outside the active range ([{}, {}])" + .format(val_num, _name_and_loc(self), + num2str(clamp), num2str(low), + num2str(high))) + + elif self.orig_type is STRING: + if vis and self.user_value is not None: + # If the symbol is visible and has a user value, use that + val = self.user_value + else: + # Otherwise, look at defaults + for sym, cond in self.defaults: + if expr_value(cond): + val = sym.str_value + self._write_to_conf = True + break - use_defaults = False - new_val = self.user_val + # env_var corresponds to SYMBOL_AUTO in the C implementation, and is + # also set on the defconfig_list symbol there. Test for the + # defconfig_list symbol explicitly instead here, to avoid a nonsensical + # env_var setting and the defconfig_list symbol being printed + # incorrectly. This code is pretty cold anyway. + if self.env_var is not None or self is self.kconfig.defconfig_list: + self._write_to_conf = False - if use_defaults: - for val_expr, cond_expr in self.def_exprs: - if self.config._eval_expr(cond_expr) != "n": - self.write_to_conf = True - - # If the default value is OK, it is stored in exactly - # the same form as specified. Otherwise, it is clamped - # to the range, and the output has "0x" as appropriate - # for the type. - - new_val = _str_val(val_expr) - - if _is_base_n(new_val, base): - new_val_num = int(new_val, base) - if has_active_range: - clamped_val = None - - if new_val_num < low: - clamped_val = low - elif new_val_num > high: - clamped_val = high - - if clamped_val is not None: - new_val = (hex(clamped_val) if \ - self.type == HEX else str(clamped_val)) - - break - else: # For the for loop - # If no user value or default kicks in but the hex/int has - # an active range, then the low end of the range is used, - # provided it's > 0, with "0x" prepended as appropriate. - if has_active_range and low > 0: - new_val = (hex(low) if self.type == HEX else str(low)) - - elif self.type == STRING: - use_defaults = True + self._cached_str_val = val + return val - if vis != "n": - self.write_to_conf = True - if self.user_val is not None: - new_val = self.user_val - use_defaults = False + @property + def tri_value(self): + """ + See the class documentation. + """ + if self._cached_tri_val is not None: + return self._cached_tri_val - if use_defaults: - for val_expr, cond_expr in self.def_exprs: - if self.config._eval_expr(cond_expr) != "n": - self.write_to_conf = True - new_val = _str_val(val_expr) - break + if self.orig_type not in _BOOL_TRISTATE: + if self.orig_type: # != UNKNOWN + # Would take some work to give the location here + self.kconfig._warn( + "The {} symbol {} is being evaluated in a logical context " + "somewhere. It will always evaluate to n." + .format(TYPE_TO_STR[self.orig_type], _name_and_loc(self))) - self.cached_val = new_val - return new_val + self._cached_tri_val = 0 + return 0 - def get_user_value(self): - """Returns the value assigned to the symbol in a .config or via - Symbol.set_user_value() (provided the value was valid for the type of - the symbol). Returns None in case of no user value.""" - return self.user_val + # Warning: See Symbol._rec_invalidate(), and note that this is a hidden + # function call (property magic) + vis = self.visibility + self._write_to_conf = (vis != 0) - def get_upper_bound(self): - """For string/hex/int symbols and for bool and tristate symbols that - cannot be modified (see is_modifiable()), returns None. + val = 0 - Otherwise, returns the highest value the symbol can be set to with - Symbol.set_user_value() (that will not be truncated): one of "m" or - "y", arranged from lowest to highest. This corresponds to the highest - value the symbol could be given in e.g. the 'make menuconfig' - interface. + if not self.choice: + # Non-choice symbol - See also the tri_less*() and tri_greater*() functions, which could come - in handy.""" - if self.type != BOOL and self.type != TRISTATE: - return None - rev_dep = self.config._eval_expr(self.rev_dep) - # A bool selected to "m" gets promoted to "y", pinning it - if rev_dep == "m" and self.type == BOOL: - return None - vis = _get_visibility(self) - if TRI_TO_INT[vis] > TRI_TO_INT[rev_dep]: - return vis - return None + if vis and self.user_value is not None: + # If the symbol is visible and has a user value, use that + val = min(self.user_value, vis) - def get_lower_bound(self): - """For string/hex/int symbols and for bool and tristate symbols that - cannot be modified (see is_modifiable()), returns None. + else: + # Otherwise, look at defaults and weak reverse dependencies + # (implies) + + for default, cond in self.defaults: + dep_val = expr_value(cond) + if dep_val: + val = min(expr_value(default), dep_val) + if val: + self._write_to_conf = True + break - Otherwise, returns the lowest value the symbol can be set to with - Symbol.set_user_value() (that will not be truncated): one of "n" or - "m", arranged from lowest to highest. This corresponds to the lowest - value the symbol could be given in e.g. the 'make menuconfig' - interface. + # Weak reverse dependencies are only considered if our + # direct dependencies are met + dep_val = expr_value(self.weak_rev_dep) + if dep_val and expr_value(self.direct_dep): + val = max(dep_val, val) + self._write_to_conf = True + + # Reverse (select-related) dependencies take precedence + dep_val = expr_value(self.rev_dep) + if dep_val: + if expr_value(self.direct_dep) < dep_val: + self._warn_select_unsatisfied_deps() + + val = max(dep_val, val) + self._write_to_conf = True + + # m is promoted to y for (1) bool symbols and (2) symbols with a + # weak_rev_dep (from imply) of y + if val == 1 and \ + (self.type is BOOL or expr_value(self.weak_rev_dep) == 2): + val = 2 + + elif vis == 2: + # Visible choice symbol in y-mode choice. The choice mode limits + # the visibility of choice symbols, so it's sufficient to just + # check the visibility of the choice symbols themselves. + val = 2 if self.choice.selection is self else 0 + + elif vis and self.user_value: + # Visible choice symbol in m-mode choice, with set non-0 user value + val = 1 + + self._cached_tri_val = val + return val + + @property + def assignable(self): + """ + See the class documentation. + """ + if self._cached_assignable is None: + self._cached_assignable = self._assignable() + return self._cached_assignable - See also the tri_less*() and tri_greater*() functions, which could come - in handy.""" - if self.type != BOOL and self.type != TRISTATE: - return None - rev_dep = self.config._eval_expr(self.rev_dep) - # A bool selected to "m" gets promoted to "y", pinning it - if rev_dep == "m" and self.type == BOOL: - return None - if TRI_TO_INT[_get_visibility(self)] > TRI_TO_INT[rev_dep]: - return rev_dep - return None + @property + def visibility(self): + """ + See the class documentation. + """ + if self._cached_vis is None: + self._cached_vis = _visibility(self) + return self._cached_vis - def get_assignable_values(self): - """For string/hex/int symbols and for bool and tristate symbols that - cannot be modified (see is_modifiable()), returns the empty list. - - Otherwise, returns a list containing the user values that can be - assigned to the symbol (that won't be truncated). Usage example: - - if "m" in sym.get_assignable_values(): - sym.set_user_value("m") - - This is basically a more convenient interface to - get_lower/upper_bound() when wanting to test if a particular tristate - value can be assigned.""" - if self.type != BOOL and self.type != TRISTATE: - return [] - rev_dep = self.config._eval_expr(self.rev_dep) - # A bool selected to "m" gets promoted to "y", pinning it - if rev_dep == "m" and self.type == BOOL: - return [] - res = ["n", "m", "y"][TRI_TO_INT[rev_dep] : - TRI_TO_INT[_get_visibility(self)] + 1] - return res if len(res) > 1 else [] - - def get_visibility(self): - """Returns the visibility of the symbol: one of "n", "m" or "y". For - bool and tristate symbols, this is an upper bound on the value users - can set for the symbol. For other types of symbols, a visibility of "n" - means the user value will be ignored. A visibility of "n" corresponds - to not being visible in the 'make *config' interfaces. - - Example (assuming we're running with modules enabled -- i.e., MODULES - set to 'y'): - - # Assume this has been assigned 'n' - config N_SYM - tristate "N_SYM" - - # Assume this has been assigned 'm' - config M_SYM - tristate "M_SYM" - - # Has visibility 'n' - config A - tristate "A" - depends on N_SYM + @property + def config_string(self): + """ + See the class documentation. + """ + # _write_to_conf is determined when the value is calculated. This is a + # hidden function call due to property magic. + val = self.str_value + if not self._write_to_conf: + return "" + + if self.orig_type in _BOOL_TRISTATE: + return "{}{}={}\n" \ + .format(self.kconfig.config_prefix, self.name, val) \ + if val != "n" else \ + "# {}{} is not set\n" \ + .format(self.kconfig.config_prefix, self.name) + + if self.orig_type in _INT_HEX: + return "{}{}={}\n" \ + .format(self.kconfig.config_prefix, self.name, val) + + # sym.orig_type is STRING + return '{}{}="{}"\n' \ + .format(self.kconfig.config_prefix, self.name, escape(val)) + + def set_value(self, value): + """ + Sets the user value of the symbol. - # Has visibility 'm' - config B - tristate "B" - depends on M_SYM + Equal in effect to assigning the value to the symbol within a .config + file. For bool and tristate symbols, use the 'assignable' attribute to + check which values can currently be assigned. Setting values outside + 'assignable' will cause Symbol.user_value to differ from + Symbol.str/tri_value (be truncated down or up). + + Setting a choice symbol to 2 (y) sets Choice.user_selection to the + choice symbol in addition to setting Symbol.user_value. + Choice.user_selection is considered when the choice is in y mode (the + "normal" mode). + + Other symbols that depend (possibly indirectly) on this symbol are + automatically recalculated to reflect the assigned value. + + value: + The user value to give to the symbol. For bool and tristate symbols, + n/m/y can be specified either as 0/1/2 (the usual format for tristate + values in Kconfiglib) or as one of the strings "n"/"m"/"y". For other + symbol types, pass a string. + + Note that the value for an int/hex symbol is passed as a string, e.g. + "123" or "0x0123". The format of this string is preserved in the + output. + + Values that are invalid for the type (such as "foo" or 1 (m) for a + BOOL or "0x123" for an INT) are ignored and won't be stored in + Symbol.user_value. Kconfiglib will print a warning by default for + invalid assignments, and set_value() will return False. + + Returns True if the value is valid for the type of the symbol, and + False otherwise. This only looks at the form of the value. For BOOL and + TRISTATE symbols, check the Symbol.assignable attribute to see what + values are currently in range and would actually be reflected in the + value of the symbol. For other symbol types, check whether the + visibility is non-n. + """ + if self.orig_type in _BOOL_TRISTATE and value in STR_TO_TRI: + value = STR_TO_TRI[value] - # Has visibility 'y' - config C - tristate "C" - - # Has no prompt, and hence visibility 'n' - config D - tristate - - Having visibility be tri-valued ensures that e.g. a symbol cannot be - set to "y" by the user if it depends on a symbol with value "m", which - wouldn't be safe. - - You should probably look at get_lower/upper_bound(), - get_assignable_values() and is_modifiable() before using this.""" - return _get_visibility(self) - - def get_referenced_symbols(self, refs_from_enclosing=False): - """Returns the set() of all symbols referenced by this symbol. For - example, the symbol defined by - - config FOO - bool - prompt "foo" if A && B - default C if D - depends on E - select F if G - - references the symbols A through G. - - refs_from_enclosing (default: False): If True, the symbols referenced - by enclosing menus and ifs will be included in the result.""" - return self.all_referenced_syms if refs_from_enclosing else \ - self.referenced_syms - - def get_selected_symbols(self): - """Returns the set() of all symbols X for which this symbol has a - 'select X' or 'select X if Y' (regardless of whether Y is satisfied or - not). This is a subset of the symbols returned by - get_referenced_symbols().""" - return self.selected_syms - - def get_implied_symbols(self): - """Returns the set() of all symbols X for which this symbol has an - 'imply X' or 'imply X if Y' (regardless of whether Y is satisfied or - not). This is a subset of the symbols returned by - get_referenced_symbols().""" - return self.implied_syms - - def set_user_value(self, v): - """Sets the user value of the symbol. + # If the new user value matches the old, nothing changes, and we can + # avoid invalidating cached values. + # + # This optimization is skipped for choice symbols: Setting a choice + # symbol's user value to y might change the state of the choice, so it + # wouldn't be safe (symbol user values always match the values set in a + # .config file or via set_value(), and are never implicitly updated). + if value == self.user_value and not self.choice: + self._was_set = True + return True - Equal in effect to assigning the value to the symbol within a .config - file. Use get_lower/upper_bound() or get_assignable_values() to find - the range of currently assignable values for bool and tristate symbols; - setting values outside this range will cause the user value to differ - from the result of Symbol.get_value() (be truncated). Values that are - invalid for the type (such as a_bool.set_user_value("foo")) are - ignored, and a warning is emitted if an attempt is made to assign such - a value. - - For any type of symbol, is_modifiable() can be used to check if a user - value will currently have any effect on the symbol, as determined by - its visibility and range of assignable values. Any value that is valid - for the type (bool, tristate, etc.) will end up being reflected in - get_user_value() though, and might have an effect later if conditions - change. To get rid of the user value, use unset_user_value(). - - Any symbols dependent on the symbol are (recursively) invalidated, so - things will just work with regards to dependencies. - - v: The user value to give to the symbol.""" - self._set_user_value_no_invalidate(v, False) - - # There might be something more efficient you could do here, but play - # it safe. - if self.name == "MODULES": - self.config._invalidate_all() - return + # Check if the value is valid for our type + if not (self.orig_type is BOOL and value in (2, 0) or + self.orig_type is TRISTATE and value in TRI_TO_STR or + value.__class__ is str and + (self.orig_type is STRING or + self.orig_type is INT and _is_base_n(value, 10) or + self.orig_type is HEX and _is_base_n(value, 16) + and int(value, 16) >= 0)): + + # Display tristate values as n, m, y in the warning + self.kconfig._warn( + "the value {} is invalid for {}, which has type {} -- " + "assignment ignored" + .format(TRI_TO_STR[value] if value in TRI_TO_STR else + "'{}'".format(value), + _name_and_loc(self), TYPE_TO_STR[self.orig_type])) - self._invalidate() - self._invalidate_dependent() - - def unset_user_value(self): - """Resets the user value of the symbol, as if the symbol had never - gotten a user value via Config.load_config() or - Symbol.set_user_value().""" - self._unset_user_value_no_recursive_invalidate() - self._invalidate_dependent() - - def is_modifiable(self): - """Returns True if the value of the symbol could be modified by calling - Symbol.set_user_value(). - - For bools and tristates, this corresponds to the symbol being visible - in the 'make menuconfig' interface and not already being pinned to a - specific value (e.g. because it is selected by another symbol). - - For strings and numbers, this corresponds to just being visible. (See - Symbol.get_visibility().)""" - if self.is_special_: return False - if self.type == BOOL or self.type == TRISTATE: - rev_dep = self.config._eval_expr(self.rev_dep) - # A bool selected to "m" gets promoted to "y", pinning it - if rev_dep == "m" and self.type == BOOL: - return False - return TRI_TO_INT[_get_visibility(self)] > TRI_TO_INT[rev_dep] - return _get_visibility(self) != "n" - - def is_defined(self): - """Returns False if the symbol is referred to in the Kconfig but never - actually defined.""" - return self.is_defined_ - - def is_special(self): - """Returns True if the symbol is one of the special symbols n, m, y, or - UNAME_RELEASE, or gets its value from the environment.""" - return self.is_special_ - - def is_from_environment(self): - """Returns True if the symbol gets its value from the environment.""" - return self.is_from_env - - def has_ranges(self): - """Returns True if the symbol is of type INT or HEX and has ranges that - limit what values it can take on.""" - return bool(self.ranges) - - def is_choice_symbol(self): - """Returns True if the symbol is in a choice statement and is an actual - choice symbol (see Choice.get_symbols()).""" - return self.is_choice_sym - - def is_choice_selection(self): - """Returns True if the symbol is contained in a choice statement and is - the selected item. Equivalent to - - sym.is_choice_symbol() and sym.get_parent().get_selection() is sym""" - return self.is_choice_sym and self.parent.get_selection() is self - - def is_allnoconfig_y(self): - """Returns True if the symbol has the 'allnoconfig_y' option set.""" - return self.allnoconfig_y + + self.user_value = value + self._was_set = True + + if self.choice and value == 2: + # Setting a choice symbol to y makes it the user selection of the + # choice. Like for symbol user values, the user selection is not + # guaranteed to match the actual selection of the choice, as + # dependencies come into play. + self.choice.user_selection = self + self.choice._was_set = True + self.choice._rec_invalidate() + else: + self._rec_invalidate_if_has_prompt() + + return True + + def unset_value(self): + """ + Removes any user value from the symbol, as if the symbol had never + gotten a user value via Kconfig.load_config() or Symbol.set_value(). + """ + if self.user_value is not None: + self.user_value = None + self._rec_invalidate_if_has_prompt() + + @property + def referenced(self): + """ + See the class documentation. + """ + return {item for node in self.nodes for item in node.referenced} + + @property + def orig_defaults(self): + """ + See the class documentation. + """ + return [d for node in self.nodes for d in node.orig_defaults] + + @property + def orig_selects(self): + """ + See the class documentation. + """ + return [s for node in self.nodes for s in node.orig_selects] + + @property + def orig_implies(self): + """ + See the class documentation. + """ + return [i for node in self.nodes for i in node.orig_implies] + + @property + def orig_ranges(self): + """ + See the class documentation. + """ + return [r for node in self.nodes for r in node.orig_ranges] + + def __repr__(self): + """ + Returns a string with information about the symbol (including its name, + value, visibility, and location(s)) when it is evaluated on e.g. the + interactive Python prompt. + """ + fields = ["symbol " + self.name, TYPE_TO_STR[self.type]] + add = fields.append + + for node in self.nodes: + if node.prompt: + add('"{}"'.format(node.prompt[0])) + + # Only add quotes for non-bool/tristate symbols + add("value " + (self.str_value if self.orig_type in _BOOL_TRISTATE + else '"{}"'.format(self.str_value))) + + if not self.is_constant: + # These aren't helpful to show for constant symbols + + if self.user_value is not None: + # Only add quotes for non-bool/tristate symbols + add("user value " + (TRI_TO_STR[self.user_value] + if self.orig_type in _BOOL_TRISTATE + else '"{}"'.format(self.user_value))) + + add("visibility " + TRI_TO_STR[self.visibility]) + + if self.choice: + add("choice symbol") + + if self.is_allnoconfig_y: + add("allnoconfig_y") + + if self is self.kconfig.defconfig_list: + add("is the defconfig_list symbol") + + if self.env_var is not None: + add("from environment variable " + self.env_var) + + if self is self.kconfig.modules: + add("is the modules symbol") + + add("direct deps " + TRI_TO_STR[expr_value(self.direct_dep)]) + + if self.nodes: + for node in self.nodes: + add("{}:{}".format(node.filename, node.linenr)) + else: + add("constant" if self.is_constant else "undefined") + + return "<{}>".format(", ".join(fields)) def __str__(self): - """Returns a string containing various information about the symbol.""" - return self.config._get_sym_or_choice_str(self) + """ + Returns a string representation of the symbol when it is printed. + Matches the Kconfig format, with any parent dependencies propagated to + the 'depends on' condition. + + The string is constructed by joining the strings returned by + MenuNode.__str__() for each of the symbol's menu nodes, so symbols + defined in multiple locations will return a string with all + definitions. + + The returned string does not end in a newline. An empty string is + returned for undefined and constant symbols. + """ + return self.custom_str(standard_sc_expr_str) + + def custom_str(self, sc_expr_str_fn): + """ + Works like Symbol.__str__(), but allows a custom format to be used for + all symbol/choice references. See expr_str(). + """ + return "\n\n".join(node.custom_str(sc_expr_str_fn) + for node in self.nodes) # # Private methods # def __init__(self): - """Symbol constructor -- not intended to be called directly by - Kconfiglib clients.""" - - self.name = None - self.type = UNKNOWN - self.prompts = [] - self.def_exprs = [] # 'default' properties - self.ranges = [] # 'range' properties (for int and hex) - self.help = None # Help text - self.rev_dep = "n" # Reverse (select-related) dependencies - self.weak_rev_dep = "n" # Weak reverse (imply-related) dependencies - self.config = None - self.parent = None - - self.user_val = None # Value set by user - - # The prompt, default value, select, and imply conditions without any - # dependencies from menus and ifs propagated to them - self.orig_prompts = [] - self.orig_def_exprs = [] - self.orig_selects = [] - self.orig_implies = [] - - # Dependencies inherited from containing menus and ifs - self.deps_from_containing = None - # The set of symbols referenced by this symbol (see - # get_referenced_symbols()) - self.referenced_syms = set() - # The set of symbols selected by this symbol (see - # get_selected_symbols()) - self.selected_syms = set() - # The set of symbols implied by this symbol (see get_implied_symbols()) - self.implied_syms = set() - # Like 'referenced_syms', but includes symbols from - # dependencies inherited from enclosing menus and ifs - self.all_referenced_syms = set() - - # This records only dependencies from enclosing ifs and menus together - # with local 'depends on' dependencies. Needed when determining actual - # choice items (hrrrr...). See Choice._determine_actual_symbols(). - self.menu_dep = None - - # See Symbol.get_ref/def_locations(). - self.def_locations = [] - self.ref_locations = [] - - # Populated in Config._build_dep() after parsing. Links the symbol to - # the symbols that immediately depend on it (in a caching/invalidation - # sense). The total set of dependent symbols for the symbol (the - # transitive closure) is calculated on an as-needed basis in - # _get_dependent(). - self.dep = set() - - # Cached values - - # Caches the calculated value - self.cached_val = None - # Caches the visibility, which acts as an upper bound on the value - self.cached_visibility = None - # Caches the total list of dependent symbols. Calculated in - # _get_dependent(). - self.cached_deps = None - - # Flags - - # Does the symbol have an entry in the Kconfig file? The trailing - # underscore avoids a collision with is_defined(). - self.is_defined_ = False - # Should the symbol get an entry in .config? - self.write_to_conf = False - # Set to true when _make_conf() is called on a symbol, so that symbols - # defined in multiple locations only get one .config entry. We need to - # reset it prior to writing out a new .config. - self.already_written = False - # This is set to True for "actual" choice symbols; see - # Choice._determine_actual_symbols(). - self.is_choice_sym = False - # Does the symbol get its value in some special way, e.g. from the - # environment or by being one of the special symbols n, m, and y? If - # so, the value is stored in self.cached_val, which is never - # invalidated. The trailing underscore avoids a collision with - # is_special(). - self.is_special_ = False - # Does the symbol get its value from the environment? - self.is_from_env = False - # Does the symbol have the 'allnoconfig_y' option set? - self.allnoconfig_y = False + """ + Symbol constructor -- not intended to be called directly by Kconfiglib + clients. + """ + # These attributes are always set on the instance from outside and + # don't need defaults: + # kconfig + # direct_dep + # is_constant + # name + # rev_dep + # weak_rev_dep - def _invalidate(self): - if self.is_special_: - return + # - UNKNOWN == 0 + # - _visited is used during tree iteration and dep. loop detection + self.orig_type = self._visited = 0 - if self.is_choice_sym: - self.parent._invalidate() + self.nodes = [] - self.cached_val = None - self.cached_visibility = None + self.defaults = [] + self.selects = [] + self.implies = [] + self.ranges = [] - def _invalidate_dependent(self): - for sym in self._get_dependent(): - sym._invalidate() + self.user_value = \ + self.choice = \ + self.env_var = \ + self._cached_str_val = self._cached_tri_val = self._cached_vis = \ + self._cached_assignable = None - def _set_user_value_no_invalidate(self, v, suppress_load_warnings): - """Like set_user_value(), but does not invalidate any symbols. + # _write_to_conf is calculated along with the value. If True, the + # Symbol gets a .config entry. - suppress_load_warnings: some warnings are annoying when loading a - .config that can be helpful when manually invoking set_user_value(). - This flag is set to True to suppress such warnings. + self.is_allnoconfig_y = \ + self._was_set = \ + self._write_to_conf = False - Perhaps this could be made optional for load_config() instead.""" + # See Kconfig._build_dep() + self._dependents = set() - if self.is_special_: - if self.is_from_env: - self.config._warn('attempt to assign the value "{0}" to the ' - 'symbol {1}, which gets its value from the ' - 'environment. Assignment ignored.' - .format(v, self.name)) - else: - self.config._warn('attempt to assign the value "{0}" to the ' - 'special symbol {1}. Assignment ignored.' - .format(v, self.name)) - return + def _assignable(self): + # Worker function for the 'assignable' attribute - if not self.is_defined_: - filename, linenr = self.ref_locations[0] - if self.config.print_undef_assign: - _stderr_msg('note: attempt to assign the value "{0}" to {1}, ' - "which is referenced at {2}:{3} but never " - "defined. Assignment ignored." - .format(v, self.name, filename, linenr)) - return + if self.orig_type not in _BOOL_TRISTATE: + return () - # Check if the value is valid for our type - if not ((self.type == BOOL and (v == "y" or v == "n") ) or - (self.type == TRISTATE and (v == "y" or v == "m" or - v == "n") ) or - (self.type == STRING ) or - (self.type == INT and _is_base_n(v, 10) ) or - (self.type == HEX and _is_base_n(v, 16) )): - self.config._warn('the value "{0}" is invalid for {1}, which has ' - "type {2}. Assignment ignored." - .format(v, self.name, TYPENAME[self.type])) - return + # Warning: See Symbol._rec_invalidate(), and note that this is a hidden + # function call (property magic) + vis = self.visibility + if not vis: + return () - if not self.prompts and not suppress_load_warnings: - self.config._warn('assigning "{0}" to the symbol {1} which ' - 'lacks prompts and thus has visibility "n". ' - 'The assignment will have no effect.' - .format(v, self.name)) + rev_dep_val = expr_value(self.rev_dep) - self.user_val = v + if vis == 2: + if self.choice: + return (2,) - if self.is_choice_sym and (self.type == BOOL or self.type == TRISTATE): - choice = self.parent - if v == "y": - choice.user_val = self - choice.user_mode = "y" - elif v == "m": - choice.user_val = None - choice.user_mode = "m" + if not rev_dep_val: + if self.type is BOOL or expr_value(self.weak_rev_dep) == 2: + return (0, 2) + return (0, 1, 2) - def _unset_user_value_no_recursive_invalidate(self): - self._invalidate() - self.user_val = None + if rev_dep_val == 2: + return (2,) - if self.is_choice_sym: - self.parent._unset_user_value() + # rev_dep_val == 1 - def _make_conf(self, append_fn): - if self.already_written: - return + if self.type is BOOL or expr_value(self.weak_rev_dep) == 2: + return (2,) + return (1, 2) - self.already_written = True + # vis == 1 - # Note: write_to_conf is determined in get_value() - val = self.get_value() - if not self.write_to_conf: - return + # Must be a tristate here, because bool m visibility gets promoted to y + + if not rev_dep_val: + return (0, 1) if expr_value(self.weak_rev_dep) != 2 else (0, 2) + + if rev_dep_val == 2: + return (2,) - if self.type == BOOL or self.type == TRISTATE: - append_fn("{0}{1}={2}".format(self.config.config_prefix, self.name, val) - if val == "y" or val == "m" else - "# {0}{1} is not set".format(self.config.config_prefix, self.name)) + # vis == rev_dep_val == 1 - elif self.type == INT or self.type == HEX: - append_fn("{0}{1}={2}".format(self.config.config_prefix, self.name, val)) + return (1,) - elif self.type == STRING: - # Escape \ and " - append_fn('{0}{1}="{2}"' - .format(self.config.config_prefix, self.name, - val.replace("\\", "\\\\").replace('"', '\\"'))) + def _invalidate(self): + # Marks the symbol as needing to be recalculated + + self._cached_str_val = self._cached_tri_val = self._cached_vis = \ + self._cached_assignable = None + + def _rec_invalidate(self): + # Invalidates the symbol and all items that (possibly) depend on it + if self is self.kconfig.modules: + # Invalidating MODULES has wide-ranging effects + self.kconfig._invalidate_all() else: - _internal_error("Internal error while creating .config: unknown " - 'type "{0}".'.format(self.type)) - - def _get_dependent(self): - """Returns the set of symbols that should be invalidated if the value - of the symbol changes, because they might be affected by the change. - Note that this is an internal API -- it's probably of limited - usefulness to clients.""" - if self.cached_deps is not None: - return self.cached_deps - - res = set(self.dep) - for s in self.dep: - res |= s._get_dependent() - - if self.is_choice_sym: - # Choice symbols also depend (recursively) on their siblings. The - # siblings are not included in 'dep' to avoid dependency loops. - for sibling in self.parent.actual_symbols: - if sibling is not self: - res.add(sibling) - res |= sibling.dep - for s in sibling.dep: - res |= s._get_dependent() - - self.cached_deps = res - return res + self._invalidate() + + for item in self._dependents: + # _cached_vis doubles as a flag that tells us whether 'item' + # has cached values, because it's calculated as a side effect + # of calculating all other (non-constant) cached values. + # + # If item._cached_vis is None, it means there can't be cached + # values on other items that depend on 'item', because if there + # were, some value on 'item' would have been calculated and + # item._cached_vis set as a side effect. It's therefore safe to + # stop the invalidation at symbols with _cached_vis None. + # + # This approach massively speeds up scripts that set a lot of + # values, vs simply invalidating all possibly dependent symbols + # (even when you already have a list of all the dependent + # symbols, because some symbols get huge dependency trees). + # + # This gracefully handles dependency loops too, which is nice + # for choices, where the choice depends on the choice symbols + # and vice versa. + if item._cached_vis is not None: + item._rec_invalidate() + + def _rec_invalidate_if_has_prompt(self): + # Invalidates the symbol and its dependent symbols, but only if the + # symbol has a prompt. User values never have an effect on promptless + # symbols, so we skip invalidation for them as an optimization. + # + # This also prevents constant (quoted) symbols from being invalidated + # if set_value() is called on them, which would make them lose their + # value and break things. + # + # Prints a warning if the symbol has no prompt. In some contexts (e.g. + # when loading a .config files) assignments to promptless symbols are + # normal and expected, so the warning can be disabled. - def _has_auto_menu_dep_on(self, on): - """See Choice._determine_actual_symbols().""" - if not isinstance(self.parent, Choice): - _internal_error("Attempt to determine auto menu dependency for " - "symbol ouside of choice.") + for node in self.nodes: + if node.prompt: + self._rec_invalidate() + return - if not self.prompts: - # If we have no prompt, use the menu dependencies instead (what was - # specified with 'depends on') - return self.menu_dep is not None and \ - self.config._expr_depends_on(self.menu_dep, on) + if self.kconfig._warn_assign_no_prompt: + self.kconfig._warn(_name_and_loc(self) + " has no prompt, meaning " + "user values have no effect on it") + + def _str_default(self): + # write_min_config() helper function. Returns the value the symbol + # would get from defaults if it didn't have a user value. Uses exactly + # the same algorithm as the C implementation (though a bit cleaned up), + # for compatibility. + + if self.orig_type in _BOOL_TRISTATE: + val = 0 + + # Defaults, selects, and implies do not affect choice symbols + if not self.choice: + for default, cond in self.defaults: + cond_val = expr_value(cond) + if cond_val: + val = min(expr_value(default), cond_val) + break - for _, cond_expr in self.prompts: - if self.config._expr_depends_on(cond_expr, on): - return True + val = max(expr_value(self.rev_dep), + expr_value(self.weak_rev_dep), + val) - return False + # Transpose mod to yes if type is bool (possibly due to modules + # being disabled) + if val == 1 and self.type is BOOL: + val = 2 + + return TRI_TO_STR[val] + + if self.orig_type: # STRING/INT/HEX + for default, cond in self.defaults: + if expr_value(cond): + return default.str_value + + return "" + + def _warn_select_unsatisfied_deps(self): + # Helper for printing an informative warning when a symbol with + # unsatisfied direct dependencies (dependencies from 'depends on', ifs, + # and menus) is selected by some other symbol. Also warn if a symbol + # whose direct dependencies evaluate to m is selected to y. + + msg = "{} has direct dependencies {} with value {}, but is " \ + "currently being {}-selected by the following symbols:" \ + .format(_name_and_loc(self), expr_str(self.direct_dep), + TRI_TO_STR[expr_value(self.direct_dep)], + TRI_TO_STR[expr_value(self.rev_dep)]) + + # The reverse dependencies from each select are ORed together + for select in split_expr(self.rev_dep, OR): + if expr_value(select) <= expr_value(self.direct_dep): + # Only include selects that exceed the direct dependencies + continue + + # - 'select A if B' turns into A && B + # - 'select A' just turns into A + # + # In both cases, we can split on AND and pick the first operand + selecting_sym = split_expr(select, AND)[0] + + msg += "\n - {}, with value {}, direct dependencies {} " \ + "(value: {})" \ + .format(_name_and_loc(selecting_sym), + selecting_sym.str_value, + expr_str(selecting_sym.direct_dep), + TRI_TO_STR[expr_value(selecting_sym.direct_dep)]) + + if select.__class__ is tuple: + msg += ", and select condition {} (value: {})" \ + .format(expr_str(select[2]), + TRI_TO_STR[expr_value(select[2])]) + + self.kconfig._warn(msg) + + +class Choice(object): + """ + Represents a choice statement: + + choice + ... + endchoice + + The following attributes are available on Choice instances. They should be + treated as read-only, and some are implemented through @property magic (but + are still efficient to access due to internal caching). -class Menu(Item): + Note: Prompts, help texts, and locations are stored in the Choice's + MenuNode(s) rather than in the Choice itself. Check the MenuNode class and + the Choice.nodes attribute. This organization matches the C tools. - """Represents a menu statement.""" + name: + The name of the choice, e.g. "FOO" for 'choice FOO', or None if the + Choice has no name. + + type: + The type of the choice. One of BOOL, TRISTATE, UNKNOWN. UNKNOWN is for + choices defined without a type where none of the contained symbols have a + type either (otherwise the choice inherits the type of the first symbol + defined with a type). + + When running without modules (CONFIG_MODULES=n), TRISTATE choices + magically change type to BOOL. This matches the C tools, and makes sense + for menuconfig-like functionality. + + orig_type: + The type as given in the Kconfig file, without any magic applied. Used + when printing the choice. + + tri_value: + The tristate value (mode) of the choice. A choice can be in one of three + modes: + + 0 (n) - The choice is disabled and no symbols can be selected. For + visible choices, this mode is only possible for choices with + the 'optional' flag set (see kconfig-language.txt). + + 1 (m) - Any number of choice symbols can be set to m, the rest will + be n. + + 2 (y) - One symbol will be y, the rest n. + + Only tristate choices can be in m mode. The visibility of the choice is + an upper bound on the mode, and the mode in turn is an upper bound on the + visibility of the choice symbols. + + To change the mode, use Choice.set_value(). + + Implementation note: + The C tools internally represent choices as a type of symbol, with + special-casing in many code paths. This is why there is a lot of + similarity to Symbol. The value (mode) of a choice is really just a + normal symbol value, and an implicit reverse dependency forces its + lower bound to m for visible non-optional choices (the reverse + dependency is 'm && <visibility>'). + + Symbols within choices get the choice propagated as a dependency to + their properties. This turns the mode of the choice into an upper bound + on e.g. the visibility of choice symbols, and explains the gotcha + related to printing choice symbols mentioned in the module docstring. + + Kconfiglib uses a separate Choice class only because it makes the code + and interface less confusing (especially in a user-facing interface). + Corresponding attributes have the same name in the Symbol and Choice + classes, for consistency and compatibility. + + assignable: + See the symbol class documentation. Gives the assignable values (modes). + + visibility: + See the Symbol class documentation. Acts on the value (mode). + + selection: + The Symbol instance of the currently selected symbol. None if the Choice + is not in y mode or has no selected symbol (due to unsatisfied + dependencies on choice symbols). + + WARNING: Do not assign directly to this. It will break things. Call + sym.set_value(2) on the choice symbol you want to select instead. + + user_value: + The value (mode) selected by the user through Choice.set_value(). Either + 0, 1, or 2, or None if the user hasn't selected a mode. See + Symbol.user_value. + + WARNING: Do not assign directly to this. It will break things. Use + Choice.set_value() instead. + + user_selection: + The symbol selected by the user (by setting it to y). Ignored if the + choice is not in y mode, but still remembered so that the choice "snaps + back" to the user selection if the mode is changed back to y. This might + differ from 'selection' due to unsatisfied dependencies. + + WARNING: Do not assign directly to this. It will break things. Call + sym.set_value(2) on the choice symbol to be selected instead. + + syms: + List of symbols contained in the choice. + + Obscure gotcha: If a symbol depends on the previous symbol within a + choice so that an implicit menu is created, it won't be a choice symbol, + and won't be included in 'syms'. + + nodes: + A list of MenuNodes for this choice. In practice, the list will probably + always contain a single MenuNode, but it is possible to give a choice a + name and define it in multiple locations. + + defaults: + List of (symbol, cond) tuples for the choice's 'defaults' properties. For + example, 'default A if B && C' is represented as (A, (AND, B, C)). If + there is no condition, 'cond' is self.kconfig.y. + + Note that 'depends on' and parent dependencies are propagated to + 'default' conditions. + + orig_defaults: + See the corresponding attribute on the MenuNode class. + + direct_dep: + See Symbol.direct_dep. + + referenced: + A set() with all symbols referenced in the properties and property + conditions of the choice. + + Also includes dependencies from surrounding menus and ifs, because those + get propagated to the choice (see the 'Intro to symbol values' section in + the module docstring). + + is_optional: + True if the choice has the 'optional' flag set on it and can be in + n mode. + + kconfig: + The Kconfig instance this choice is from. + """ + __slots__ = ( + "_cached_assignable", + "_cached_selection", + "_cached_vis", + "_dependents", + "_visited", + "_was_set", + "defaults", + "direct_dep", + "is_constant", + "is_optional", + "kconfig", + "name", + "nodes", + "orig_type", + "syms", + "user_selection", + "user_value", + ) # # Public interface # - def get_config(self): - """Return the Config instance this menu is from.""" - return self.config - - def get_title(self): - """Returns the title text of the menu.""" - return self.title - - def get_parent(self): - """Returns the menu or choice statement that contains the menu, or - None if the menu is at the top level. Note that if statements are - treated as syntactic sugar and do not have an explicit class - representation.""" - return self.parent - - def get_location(self): - """Returns the location of the menu as a (filename, linenr) tuple, - where filename is a string and linenr an int.""" - return (self.filename, self.linenr) - - def get_items(self, recursive=False): - """Returns a list containing the items (symbols, menus, choice - statements and comments) in in the menu, in the same order that the - items appear within the menu. - - recursive (default: False): True if items contained in items within the - menu should be included recursively (preorder).""" - - if not recursive: - return self.block - - res = [] - for item in self.block: - res.append(item) - if isinstance(item, Menu): - res.extend(item.get_items(True)) - elif isinstance(item, Choice): - res.extend(item.get_items()) - return res + @property + def type(self): + """ + Returns the type of the choice. See Symbol.type. + """ + if self.orig_type is TRISTATE and not self.kconfig.modules.tri_value: + return BOOL + return self.orig_type + + @property + def str_value(self): + """ + See the class documentation. + """ + return TRI_TO_STR[self.tri_value] + + @property + def tri_value(self): + """ + See the class documentation. + """ + # This emulates a reverse dependency of 'm && visibility' for + # non-optional choices, which is how the C implementation does it + + val = 0 if self.is_optional else 1 + + if self.user_value is not None: + val = max(val, self.user_value) + + # Warning: See Symbol._rec_invalidate(), and note that this is a hidden + # function call (property magic) + val = min(val, self.visibility) - def get_symbols(self, recursive=False): - """Returns a list containing the symbols in the menu, in the same order - that they appear within the menu. + # Promote m to y for boolean choices + return 2 if val == 1 and self.type is BOOL else val - recursive (default: False): True if symbols contained in items within - the menu should be included recursively.""" + @property + def assignable(self): + """ + See the class documentation. + """ + if self._cached_assignable is None: + self._cached_assignable = self._assignable() + return self._cached_assignable + + @property + def visibility(self): + """ + See the class documentation. + """ + if self._cached_vis is None: + self._cached_vis = _visibility(self) + return self._cached_vis - return [item for item in self.get_items(recursive) if - isinstance(item, Symbol)] + @property + def selection(self): + """ + See the class documentation. + """ + if self._cached_selection is _NO_CACHED_SELECTION: + self._cached_selection = self._selection() + return self._cached_selection - def get_visibility(self): - """Returns the visibility of the menu. This also affects the visibility - of subitems. See also Symbol.get_visibility().""" - return self.config._eval_expr(self.dep_expr) + def set_value(self, value): + """ + Sets the user value (mode) of the choice. Like for Symbol.set_value(), + the visibility might truncate the value. Choices without the 'optional' + attribute (is_optional) can never be in n mode, but 0/"n" is still + accepted since it's not a malformed value (though it will have no + effect). + + Returns True if the value is valid for the type of the choice, and + False otherwise. This only looks at the form of the value. Check the + Choice.assignable attribute to see what values are currently in range + and would actually be reflected in the mode of the choice. + """ + if value in STR_TO_TRI: + value = STR_TO_TRI[value] - def get_visible_if_visibility(self): - """Returns the visibility the menu gets from its 'visible if' - condition. "y" if the menu has no 'visible if' condition.""" - return self.config._eval_expr(self.visible_if_expr) + if value == self.user_value: + # We know the value must be valid if it was successfully set + # previously + self._was_set = True + return True + + if not (self.orig_type is BOOL and value in (2, 0) or + self.orig_type is TRISTATE and value in TRI_TO_STR): + + # Display tristate values as n, m, y in the warning + self.kconfig._warn( + "the value {} is invalid for {}, which has type {} -- " + "assignment ignored" + .format(TRI_TO_STR[value] if value in TRI_TO_STR else + "'{}'".format(value), + _name_and_loc(self), TYPE_TO_STR[self.orig_type])) + + return False + + self.user_value = value + self._was_set = True + self._rec_invalidate() + + return True + + def unset_value(self): + """ + Resets the user value (mode) and user selection of the Choice, as if + the user had never touched the mode or any of the choice symbols. + """ + if self.user_value is not None or self.user_selection: + self.user_value = self.user_selection = None + self._rec_invalidate() + + @property + def referenced(self): + """ + See the class documentation. + """ + return {item for node in self.nodes for item in node.referenced} + + @property + def orig_defaults(self): + """ + See the class documentation. + """ + return [d for node in self.nodes for d in node.orig_defaults] + + def __repr__(self): + """ + Returns a string with information about the choice when it is evaluated + on e.g. the interactive Python prompt. + """ + fields = ["choice " + self.name if self.name else "choice", + TYPE_TO_STR[self.type]] + add = fields.append - def get_referenced_symbols(self, refs_from_enclosing=False): - """See Symbol.get_referenced_symbols().""" - return self.all_referenced_syms if refs_from_enclosing else \ - self.referenced_syms + for node in self.nodes: + if node.prompt: + add('"{}"'.format(node.prompt[0])) + + add("mode " + self.str_value) + + if self.user_value is not None: + add('user mode {}'.format(TRI_TO_STR[self.user_value])) + + if self.selection: + add("{} selected".format(self.selection.name)) + + if self.user_selection: + user_sel_str = "{} selected by user" \ + .format(self.user_selection.name) + + if self.selection is not self.user_selection: + user_sel_str += " (overridden)" + + add(user_sel_str) + + add("visibility " + TRI_TO_STR[self.visibility]) + + if self.is_optional: + add("optional") + + for node in self.nodes: + add("{}:{}".format(node.filename, node.linenr)) + + return "<{}>".format(", ".join(fields)) def __str__(self): - """Returns a string containing various information about the menu.""" - depends_on_str = self.config._expr_val_str(self.orig_deps, - "(no dependencies)") - visible_if_str = self.config._expr_val_str(self.visible_if_expr, - "(no dependencies)") - - additional_deps_str = " " + \ - self.config._expr_val_str(self.deps_from_containing, - "(no additional dependencies)") - - return _lines("Menu", - "Title : " + self.title, - "'depends on' dependencies : " + depends_on_str, - "'visible if' dependencies : " + visible_if_str, - "Additional dependencies from enclosing menus and " - "ifs:", - additional_deps_str, - "Location: {0}:{1}".format(self.filename, self.linenr)) + """ + Returns a string representation of the choice when it is printed. + Matches the Kconfig format (though without the contained choice + symbols), with any parent dependencies propagated to the 'depends on' + condition. + + The returned string does not end in a newline. + + See Symbol.__str__() as well. + """ + return self.custom_str(standard_sc_expr_str) + + def custom_str(self, sc_expr_str_fn): + """ + Works like Choice.__str__(), but allows a custom format to be used for + all symbol/choice references. See expr_str(). + """ + return "\n\n".join(node.custom_str(sc_expr_str_fn) + for node in self.nodes) # # Private methods # def __init__(self): - """Menu constructor -- not intended to be called directly by - Kconfiglib clients.""" - - self.title = None - self.dep_expr = None - self.visible_if_expr = None - self.block = [] # List of contained items - self.config = None - self.parent = None - - # Dependency expression without dependencies from enclosing menus and - # ifs propagated - self.orig_deps = None - - # Dependencies inherited from containing menus and ifs - self.deps_from_containing = None - # The set of symbols referenced by this menu (see - # get_referenced_symbols()) - self.referenced_syms = set() - # Like 'referenced_syms', but includes symbols from - # dependencies inherited from enclosing menus and ifs - self.all_referenced_syms = None + """ + Choice constructor -- not intended to be called directly by Kconfiglib + clients. + """ + # These attributes are always set on the instance from outside and + # don't need defaults: + # direct_dep + # kconfig - self.filename = None - self.linenr = None + # - UNKNOWN == 0 + # - _visited is used during dep. loop detection + self.orig_type = self._visited = 0 - def _make_conf(self, append_fn): - if self.config._eval_expr(self.dep_expr) != "n" and \ - self.config._eval_expr(self.visible_if_expr) != "n": - append_fn("\n#\n# {0}\n#".format(self.title)) - _make_block_conf(self.block, append_fn) + self.nodes = [] -class Choice(Item): + self.syms = [] + self.defaults = [] - """Represents a choice statement. A choice can be in one of three modes: + self.name = \ + self.user_value = self.user_selection = \ + self._cached_vis = self._cached_assignable = None - "n" - The choice is not visible and no symbols can be selected. + self._cached_selection = _NO_CACHED_SELECTION - "m" - Any number of symbols can be set to "m". The rest will be "n". This - is safe since potentially conflicting options don't actually get - compiled into the kernel simultaneously with "m". + # is_constant is checked by _make_depend_on(). Just set it to avoid + # having to special-case choices. + self.is_constant = self.is_optional = False - "y" - One symbol will be "y" while the rest are "n". + # See Kconfig._build_dep() + self._dependents = set() - Only tristate choices can be in "m" mode, and the visibility of the choice - is an upper bound on the mode, so that e.g. a choice that depends on a - symbol with value "m" will be in "m" mode. + def _assignable(self): + # Worker function for the 'assignable' attribute - The mode changes automatically when a value is assigned to a symbol within - the choice. + # Warning: See Symbol._rec_invalidate(), and note that this is a hidden + # function call (property magic) + vis = self.visibility - See Symbol.get_visibility() too.""" + if not vis: + return () - # - # Public interface - # + if vis == 2: + if not self.is_optional: + return (2,) if self.type is BOOL else (1, 2) + return (0, 2) if self.type is BOOL else (0, 1, 2) + + # vis == 1 - def get_config(self): - """Returns the Config instance this choice is from.""" - return self.config - - def get_name(self): - """For named choices, returns the name. Returns None for unnamed - choices. No named choices appear anywhere in the kernel Kconfig files - as of Linux 3.7.0-rc8.""" - return self.name - - def get_type(self): - """Returns the type of the choice. See Symbol.get_type().""" - return self.type - - def get_prompts(self): - """Returns a list of prompts defined for the choice, in the order they - appear in the configuration files. Returns the empty list for choices - with no prompt. - - This list will have a single entry for the vast majority of choices - having prompts, but having multiple prompts for a single choice is - possible through having multiple 'choice' entries for it (though I'm - not sure if that ever happens in practice).""" - return [prompt for prompt, _ in self.orig_prompts] - - def get_help(self): - """Returns the help text of the choice, or None if the choice has no - help text.""" - return self.help - - def get_parent(self): - """Returns the menu or choice statement that contains the choice, or - None if the choice is at the top level. Note that if statements are - treated as syntactic sugar and do not have an explicit class - representation.""" - return self.parent - - def get_def_locations(self): - """Returns a list of (filename, linenr) tuples, where filename (string) - and linenr (int) represent a location where the choice is defined. For - the vast majority of choices (all of them as of Linux 3.7.0-rc8) this - list will only contain one element, but its possible for named choices - to be defined in multiple locations.""" - return self.def_locations - - def get_selection(self): - """Returns the symbol selected (either by the user or through - defaults), or None if either no symbol is selected or the mode is not - "y".""" - if self.cached_selection is not None: - if self.cached_selection == NO_SELECTION: - return None - return self.cached_selection - - if self.get_mode() != "y": - return self._cache_ret(None) - - # User choice available? - if self.user_val is not None and _get_visibility(self.user_val) == "y": - return self._cache_ret(self.user_val) - - if self.optional: - return self._cache_ret(None) - - return self._cache_ret(self.get_selection_from_defaults()) - - def get_selection_from_defaults(self): - """Like Choice.get_selection(), but acts as if no symbol has been - selected by the user and no 'optional' flag is in effect.""" - - if not self.actual_symbols: + return (0, 1) if self.is_optional else (1,) + + def _selection(self): + # Worker function for the 'selection' attribute + + # Warning: See Symbol._rec_invalidate(), and note that this is a hidden + # function call (property magic) + if self.tri_value != 2: + # Not in y mode, so no selection return None - for symbol, cond_expr in self.def_exprs: - if self.config._eval_expr(cond_expr) != "n": - chosen_symbol = symbol - break - else: - chosen_symbol = self.actual_symbols[0] - - # Is the chosen symbol visible? - if _get_visibility(chosen_symbol) != "n": - return chosen_symbol - # Otherwise, pick the first visible symbol - for sym in self.actual_symbols: - if _get_visibility(sym) != "n": + # Use the user selection if it's visible + if self.user_selection and self.user_selection.visibility: + return self.user_selection + + # Otherwise, check if we have a default + return self._selection_from_defaults() + + def _selection_from_defaults(self): + # Check if we have a default + for sym, cond in self.defaults: + # The default symbol must be visible too + if expr_value(cond) and sym.visibility: + return sym + + # Otherwise, pick the first visible symbol, if any + for sym in self.syms: + if sym.visibility: return sym + + # Couldn't find a selection return None - def get_user_selection(self): - """If the choice is in "y" mode and has a user-selected symbol, returns - that symbol. Otherwise, returns None.""" - return self.user_val - - def get_items(self): - """Gets all items contained in the choice in the same order as within - the configuration ("items" instead of "symbols" since choices and - comments might appear within choices. This only happens in one place as - of Linux 3.7.0-rc8, in drivers/usb/gadget/Kconfig).""" - return self.block - - def get_symbols(self): - """Returns a list containing the choice's symbols. - - A quirk (perhaps a bug) of Kconfig is that you can put items within a - choice that will not be considered members of the choice insofar as - selection is concerned. This happens for example if one symbol within a - choice 'depends on' the symbol preceding it, or if you put non-symbol - items within choices. - - As of Linux 3.7.0-rc8, this seems to be used intentionally in one - place: drivers/usb/gadget/Kconfig. - - This function returns the "proper" symbols of the choice in the order - they appear in the choice, excluding such items. If you want all items - in the choice, use get_items().""" - return self.actual_symbols - - def get_referenced_symbols(self, refs_from_enclosing=False): - """See Symbol.get_referenced_symbols().""" - return self.all_referenced_syms if refs_from_enclosing else \ - self.referenced_syms - - def get_visibility(self): - """Returns the visibility of the choice statement: one of "n", "m" or - "y". This acts as an upper limit on the mode of the choice (though bool - choices can only have the mode "y"). See the class documentation for an - explanation of modes.""" - return _get_visibility(self) - - def get_mode(self): - """Returns the mode of the choice. See the class documentation for - an explanation of modes.""" - minimum_mode = "n" if self.optional else "m" - mode = self.user_mode if self.user_mode is not None else minimum_mode - mode = self.config._eval_min(mode, _get_visibility(self)) - - # Promote "m" to "y" for boolean choices - if mode == "m" and self.type == BOOL: - return "y" - - return mode - - def is_optional(self): - """Returns True if the choice has the 'optional' flag set (and so will - default to "n" mode).""" - return self.optional + def _invalidate(self): + self._cached_vis = self._cached_assignable = None + self._cached_selection = _NO_CACHED_SELECTION - def __str__(self): - """Returns a string containing various information about the choice - statement.""" - return self.config._get_sym_or_choice_str(self) + def _rec_invalidate(self): + # See Symbol._rec_invalidate() - # - # Private methods - # + self._invalidate() + + for item in self._dependents: + if item._cached_vis is not None: + item._rec_invalidate() + + +class MenuNode(object): + """ + Represents a menu node in the configuration. This corresponds to an entry + in e.g. the 'make menuconfig' interface, though non-visible choices, menus, + and comments also get menu nodes. If a symbol or choice is defined in + multiple locations, it gets one menu node for each location. + + The top-level menu node, corresponding to the implicit top-level menu, is + available in Kconfig.top_node. + + The menu nodes for a Symbol or Choice can be found in the + Symbol/Choice.nodes attribute. Menus and comments are represented as plain + menu nodes, with their text stored in the prompt attribute (prompt[0]). + This mirrors the C implementation. + + The following attributes are available on MenuNode instances. They should + be viewed as read-only. + + item: + Either a Symbol, a Choice, or one of the constants MENU and COMMENT. + Menus and comments are represented as plain menu nodes. Ifs are collapsed + (matching the C implementation) and do not appear in the final menu tree. + + next: + The following menu node. None if there is no following node. + + list: + The first child menu node. None if there are no children. + + Choices and menus naturally have children, but Symbols can also have + children because of menus created automatically from dependencies (see + kconfig-language.txt). + + parent: + The parent menu node. None if there is no parent. + + prompt: + A (string, cond) tuple with the prompt for the menu node and its + conditional expression (which is self.kconfig.y if there is no + condition). None if there is no prompt. + + For symbols and choices, the prompt is stored in the MenuNode rather than + the Symbol or Choice instance. For menus and comments, the prompt holds + the text. + + defaults: + The 'default' properties for this particular menu node. See + symbol.defaults. + + When evaluating defaults, you should use Symbol/Choice.defaults instead, + as it include properties from all menu nodes (a symbol/choice can have + multiple definition locations/menu nodes). MenuNode.defaults is meant for + documentation generation. + + selects: + Like MenuNode.defaults, for selects. + + implies: + Like MenuNode.defaults, for implies. + + ranges: + Like MenuNode.defaults, for ranges. + + orig_prompt: + orig_defaults: + orig_selects: + orig_implies: + orig_ranges: + These work the like the corresponding attributes without orig_*, but omit + any dependencies propagated from 'depends on' and surrounding 'if's (the + direct dependencies, stored in MenuNode.dep). + + One use for this is generating less cluttered documentation, by only + showing the direct dependencies in one place. + + help: + The help text for the menu node for Symbols and Choices. None if there is + no help text. Always stored in the node rather than the Symbol or Choice. + It is possible to have a separate help text at each location if a symbol + is defined in multiple locations. + + Trailing whitespace (including a final newline) is stripped from the help + text. This was not the case before Kconfiglib 10.21.0, where the format + was undocumented. + + dep: + The direct ('depends on') dependencies for the menu node, or + self.kconfig.y if there are no direct dependencies. + + This attribute includes any dependencies from surrounding menus and ifs. + Those get propagated to the direct dependencies, and the resulting direct + dependencies in turn get propagated to the conditions of all properties. + + If a symbol or choice is defined in multiple locations, only the + properties defined at a particular location get the corresponding + MenuNode.dep dependencies propagated to them. + + visibility: + The 'visible if' dependencies for the menu node (which must represent a + menu), or self.kconfig.y if there are no 'visible if' dependencies. + 'visible if' dependencies are recursively propagated to the prompts of + symbols and choices within the menu. + + referenced: + A set() with all symbols and choices referenced in the properties and + property conditions of the menu node. + + Also includes dependencies inherited from surrounding menus and ifs. + Choices appear in the dependencies of choice symbols. + + is_menuconfig: + Set to True if the children of the menu node should be displayed in a + separate menu. This is the case for the following items: + + - Menus (node.item == MENU) + + - Choices + + - Symbols defined with the 'menuconfig' keyword. The children come from + implicitly created submenus, and should be displayed in a separate + menu rather than being indented. + + 'is_menuconfig' is just a hint on how to display the menu node. It's + ignored internally by Kconfiglib, except when printing symbols. + + filename/linenr: + The location where the menu node appears. The filename is relative to + $srctree (or to the current directory if $srctree isn't set), except + absolute paths are used for paths outside $srctree. + + include_path: + A tuple of (filename, linenr) tuples, giving the locations of the + 'source' statements via which the Kconfig file containing this menu node + was included. The first element is the location of the 'source' statement + in the top-level Kconfig file passed to Kconfig.__init__(), etc. + + Note that the Kconfig file of the menu node itself isn't included. Check + 'filename' and 'linenr' for that. + + kconfig: + The Kconfig instance the menu node is from. + """ + __slots__ = ( + "dep", + "filename", + "help", + "include_path", + "is_menuconfig", + "item", + "kconfig", + "linenr", + "list", + "next", + "parent", + "prompt", + "visibility", + + # Properties + "defaults", + "selects", + "implies", + "ranges", + ) def __init__(self): - """Choice constructor -- not intended to be called directly by - Kconfiglib clients.""" - - self.name = None # Yes, choices can be named - self.type = UNKNOWN - self.prompts = [] - self.def_exprs = [] # 'default' properties - self.help = None # Help text - self.block = [] # List of contained items - self.config = None - self.parent = None - - self.user_val = None - self.user_mode = None - - # We need to filter out symbols that appear within the choice block but - # are not considered choice items (see - # Choice._determine_actual_symbols()) This list holds the "actual" - # choice items. - self.actual_symbols = [] - - # The prompts and default values without any dependencies from - # enclosing menus and ifs propagated - self.orig_prompts = [] - self.orig_def_exprs = [] - - # Dependencies inherited from containing menus and ifs - self.deps_from_containing = None - # The set of symbols referenced by this choice (see - # get_referenced_symbols()) - self.referenced_syms = set() - # Like 'referenced_syms', but includes symbols from - # dependencies inherited from enclosing menus and ifs - self.all_referenced_syms = set() - - # See Choice.get_def_locations() - self.def_locations = [] - - # Cached values - self.cached_selection = None - self.cached_visibility = None - - self.optional = False - - def _determine_actual_symbols(self): - """If a symbol's visibility depends on the preceding symbol within a - choice, it is no longer viewed as a choice item. (This is quite - possibly a bug, but some things consciously use it... ugh. It stems - from automatic submenu creation.) In addition, it's possible to have - choices and comments within choices, and those shouldn't be considered - choice items either. Only drivers/usb/gadget/Kconfig seems to depend on - any of this. This method computes the "actual" items in the choice and - sets the is_choice_sym flag on them (retrieved via is_choice_symbol()). - - Don't let this scare you: an earlier version simply checked for a - sequence of symbols where all symbols after the first appeared in the - 'depends on' expression of the first, and that worked fine. The added - complexity is to be future-proof in the event that - drivers/usb/gadget/Kconfig turns even more sinister. It might very well - be overkilling things (especially if that file is refactored ;).""" - - # Items might depend on each other in a tree structure, so we need a - # stack to keep track of the current tentative parent - stack = [] - - for item in self.block: - if not isinstance(item, Symbol): - stack = [] - continue + # Properties defined on this particular menu node. A local 'depends on' + # only applies to these, in case a symbol is defined in multiple + # locations. + self.defaults = [] + self.selects = [] + self.implies = [] + self.ranges = [] + + @property + def orig_prompt(self): + """ + See the class documentation. + """ + if not self.prompt: + return None + return (self.prompt[0], self._strip_dep(self.prompt[1])) - while stack: - if item._has_auto_menu_dep_on(stack[-1]): - # The item should not be viewed as a choice item, so don't - # set item.is_choice_sym - stack.append(item) - break - else: - stack.pop() - else: - item.is_choice_sym = True - self.actual_symbols.append(item) - stack.append(item) - - def _cache_ret(self, selection): - # As None is used to indicate the lack of a cached value we can't use - # that to cache the fact that the choice has no selection. Instead, we - # use the symbolic constant NO_SELECTION. - if selection is None: - self.cached_selection = NO_SELECTION - else: - self.cached_selection = selection + @property + def orig_defaults(self): + """ + See the class documentation. + """ + return [(default, self._strip_dep(cond)) + for default, cond in self.defaults] - return selection + @property + def orig_selects(self): + """ + See the class documentation. + """ + return [(select, self._strip_dep(cond)) + for select, cond in self.selects] - def _invalidate(self): - self.cached_selection = None - self.cached_visibility = None + @property + def orig_implies(self): + """ + See the class documentation. + """ + return [(imply, self._strip_dep(cond)) + for imply, cond in self.implies] - def _unset_user_value(self): - self._invalidate() - self.user_val = None - self.user_mode = None + @property + def orig_ranges(self): + """ + See the class documentation. + """ + return [(low, high, self._strip_dep(cond)) + for low, high, cond in self.ranges] - def _make_conf(self, append_fn): - _make_block_conf(self.block, append_fn) + @property + def referenced(self): + """ + See the class documentation. + """ + # self.dep is included to catch dependencies from a lone 'depends on' + # when there are no properties to propagate it to + res = expr_items(self.dep) -class Comment(Item): + if self.prompt: + res |= expr_items(self.prompt[1]) - """Represents a comment statement.""" + if self.item is MENU: + res |= expr_items(self.visibility) - # - # Public interface - # + for value, cond in self.defaults: + res |= expr_items(value) + res |= expr_items(cond) - def get_config(self): - """Returns the Config instance this comment is from.""" - return self.config + for value, cond in self.selects: + res.add(value) + res |= expr_items(cond) - def get_text(self): - """Returns the text of the comment.""" - return self.text + for value, cond in self.implies: + res.add(value) + res |= expr_items(cond) - def get_parent(self): - """Returns the menu or choice statement that contains the comment, or - None if the comment is at the top level. Note that if statements are - treated as syntactic sugar and do not have an explicit class - representation.""" - return self.parent + for low, high, cond in self.ranges: + res.add(low) + res.add(high) + res |= expr_items(cond) - def get_location(self): - """Returns the location of the comment as a (filename, linenr) tuple, - where filename is a string and linenr an int.""" - return (self.filename, self.linenr) + return res - def get_visibility(self): - """Returns the visibility of the comment. See also - Symbol.get_visibility().""" - return self.config._eval_expr(self.dep_expr) + def __repr__(self): + """ + Returns a string with information about the menu node when it is + evaluated on e.g. the interactive Python prompt. + """ + fields = [] + add = fields.append + + if self.item.__class__ is Symbol: + add("menu node for symbol " + self.item.name) + + elif self.item.__class__ is Choice: + s = "menu node for choice" + if self.item.name is not None: + s += " " + self.item.name + add(s) + + elif self.item is MENU: + add("menu node for menu") + + else: # self.item is COMMENT + add("menu node for comment") + + if self.prompt: + add('prompt "{}" (visibility {})'.format( + self.prompt[0], TRI_TO_STR[expr_value(self.prompt[1])])) + + if self.item.__class__ is Symbol and self.is_menuconfig: + add("is menuconfig") + + add("deps " + TRI_TO_STR[expr_value(self.dep)]) + + if self.item is MENU: + add("'visible if' deps " + TRI_TO_STR[expr_value(self.visibility)]) - def get_referenced_symbols(self, refs_from_enclosing=False): - """See Symbol.get_referenced_symbols().""" - return self.all_referenced_syms if refs_from_enclosing else \ - self.referenced_syms + if self.item.__class__ in _SYMBOL_CHOICE and self.help is not None: + add("has help") + + if self.list: + add("has child") + + if self.next: + add("has next") + + add("{}:{}".format(self.filename, self.linenr)) + + return "<{}>".format(", ".join(fields)) def __str__(self): - """Returns a string containing various information about the - comment.""" - dep_str = self.config._expr_val_str(self.orig_deps, - "(no dependencies)") - - additional_deps_str = " " + \ - self.config._expr_val_str(self.deps_from_containing, - "(no additional dependencies)") - - return _lines("Comment", - "Text: " + str(self.text), - "Dependencies: " + dep_str, - "Additional dependencies from enclosing menus and " - "ifs:", - additional_deps_str, - "Location: {0}:{1}".format(self.filename, self.linenr)) + """ + Returns a string representation of the menu node. Matches the Kconfig + format, with any parent dependencies propagated to the 'depends on' + condition. - # - # Private methods - # + The output could (almost) be fed back into a Kconfig parser to redefine + the object associated with the menu node. See the module documentation + for a gotcha related to choice symbols. - def __init__(self): - """Comment constructor -- not intended to be called directly by - Kconfiglib clients.""" - - self.text = None - self.dep_expr = None - self.config = None - self.parent = None - - # Dependency expression without dependencies from enclosing menus and - # ifs propagated - self.orig_deps = None - - # Dependencies inherited from containing menus and ifs - self.deps_from_containing = None - # The set of symbols referenced by this comment (see - # get_referenced_symbols()) - self.referenced_syms = set() - # Like 'referenced_syms', but includes symbols from - # dependencies inherited from enclosing menus and ifs - self.all_referenced_syms = None + For symbols and choices with multiple menu nodes (multiple definition + locations), properties that aren't associated with a particular menu + node are shown on all menu nodes ('option env=...', 'optional' for + choices, etc.). - self.filename = None - self.linenr = None + The returned string does not end in a newline. + """ + return self.custom_str(standard_sc_expr_str) + + def custom_str(self, sc_expr_str_fn): + """ + Works like MenuNode.__str__(), but allows a custom format to be used + for all symbol/choice references. See expr_str(). + """ + return self._menu_comment_node_str(sc_expr_str_fn) \ + if self.item in _MENU_COMMENT else \ + self._sym_choice_node_str(sc_expr_str_fn) + + def _menu_comment_node_str(self, sc_expr_str_fn): + s = '{} "{}"'.format("menu" if self.item is MENU else "comment", + self.prompt[0]) + + if self.dep is not self.kconfig.y: + s += "\n\tdepends on {}".format(expr_str(self.dep, sc_expr_str_fn)) + + if self.item is MENU and self.visibility is not self.kconfig.y: + s += "\n\tvisible if {}".format(expr_str(self.visibility, + sc_expr_str_fn)) + + return s + + def _sym_choice_node_str(self, sc_expr_str_fn): + def indent_add(s): + lines.append("\t" + s) + + def indent_add_cond(s, cond): + if cond is not self.kconfig.y: + s += " if " + expr_str(cond, sc_expr_str_fn) + indent_add(s) + + sc = self.item + + if sc.__class__ is Symbol: + lines = [("menuconfig " if self.is_menuconfig else "config ") + + sc.name] + else: + lines = ["choice " + sc.name if sc.name else "choice"] + + if sc.orig_type and not self.prompt: # sc.orig_type != UNKNOWN + # If there's a prompt, we'll use the '<type> "prompt"' shorthand + # instead + indent_add(TYPE_TO_STR[sc.orig_type]) + + if self.prompt: + if sc.orig_type: + prefix = TYPE_TO_STR[sc.orig_type] + else: + # Symbol defined without a type (which generates a warning) + prefix = "prompt" + + indent_add_cond(prefix + ' "{}"'.format(escape(self.prompt[0])), + self.orig_prompt[1]) + + if sc.__class__ is Symbol: + if sc.is_allnoconfig_y: + indent_add("option allnoconfig_y") - def _make_conf(self, append_fn): - if self.config._eval_expr(self.dep_expr) != "n": - append_fn("\n#\n# {0}\n#".format(self.text)) + if sc is sc.kconfig.defconfig_list: + indent_add("option defconfig_list") -class Kconfig_Syntax_Error(Exception): - """Exception raised for syntax errors.""" - pass + if sc.env_var is not None: + indent_add('option env="{}"'.format(sc.env_var)) + + if sc is sc.kconfig.modules: + indent_add("option modules") + + for low, high, cond in self.orig_ranges: + indent_add_cond( + "range {} {}".format(sc_expr_str_fn(low), + sc_expr_str_fn(high)), + cond) + + for default, cond in self.orig_defaults: + indent_add_cond("default " + expr_str(default, sc_expr_str_fn), + cond) + + if sc.__class__ is Choice and sc.is_optional: + indent_add("optional") + + if sc.__class__ is Symbol: + for select, cond in self.orig_selects: + indent_add_cond("select " + sc_expr_str_fn(select), cond) + + for imply, cond in self.orig_implies: + indent_add_cond("imply " + sc_expr_str_fn(imply), cond) + + if self.dep is not sc.kconfig.y: + indent_add("depends on " + expr_str(self.dep, sc_expr_str_fn)) + + if self.help is not None: + indent_add("help") + for line in self.help.splitlines(): + indent_add(" " + line) + + return "\n".join(lines) + + def _strip_dep(self, expr): + # Helper function for removing MenuNode.dep from 'expr'. Uses two + # pieces of internal knowledge: (1) Expressions are reused rather than + # copied, and (2) the direct dependencies always appear at the end. + + # ... if dep -> ... if y + if self.dep is expr: + return self.kconfig.y + + # (AND, X, dep) -> X + if expr.__class__ is tuple and expr[0] is AND and expr[2] is self.dep: + return expr[1] + + return expr + + +class Variable(object): + """ + Represents a preprocessor variable/function. + + The following attributes are available: + + name: + The name of the variable. + + value: + The unexpanded value of the variable. + + expanded_value: + The expanded value of the variable. For simple variables (those defined + with :=), this will equal 'value'. Accessing this property will raise a + KconfigError if the expansion seems to be stuck in a loop. + + Accessing this field is the same as calling expanded_value_w_args() with + no arguments. I hadn't considered function arguments when adding it. It + is retained for backwards compatibility though. + + is_recursive: + True if the variable is recursive (defined with =). + """ + __slots__ = ( + "_n_expansions", + "is_recursive", + "kconfig", + "name", + "value", + ) + + @property + def expanded_value(self): + """ + See the class documentation. + """ + return self.expanded_value_w_args() + + def expanded_value_w_args(self, *args): + """ + Returns the expanded value of the variable/function. Any arguments + passed will be substituted for $(1), $(2), etc. + + Raises a KconfigError if the expansion seems to be stuck in a loop. + """ + return self.kconfig._fn_val((self.name,) + args) + + def __repr__(self): + return "<variable {}, {}, value '{}'>" \ + .format(self.name, + "recursive" if self.is_recursive else "immediate", + self.value) + + +class KconfigError(Exception): + """ + Exception raised for Kconfig-related errors. + + KconfigError and KconfigSyntaxError are the same class. The + KconfigSyntaxError alias is only maintained for backwards compatibility. + """ + +KconfigSyntaxError = KconfigError # Backwards compatibility + + +class InternalError(Exception): + "Never raised. Kept around for backwards compatibility." + + +# Workaround: +# +# If 'errno' and 'strerror' are set on IOError, then __str__() always returns +# "[Errno <errno>] <strerror>", ignoring any custom message passed to the +# constructor. By defining our own subclass, we can use a custom message while +# also providing 'errno', 'strerror', and 'filename' to scripts. +class _KconfigIOError(IOError): + def __init__(self, ioerror, msg): + self.msg = msg + super(_KconfigIOError, self).__init__( + ioerror.errno, ioerror.strerror, ioerror.filename) + + def __str__(self): + return self.msg -class Internal_Error(Exception): - """Exception raised for internal errors.""" - pass # # Public functions # -def tri_less(v1, v2): - """Returns True if the tristate v1 is less than the tristate v2, where "n", - "m" and "y" are ordered from lowest to highest.""" - return TRI_TO_INT[v1] < TRI_TO_INT[v2] -def tri_less_eq(v1, v2): - """Returns True if the tristate v1 is less than or equal to the tristate - v2, where "n", "m" and "y" are ordered from lowest to highest.""" - return TRI_TO_INT[v1] <= TRI_TO_INT[v2] +def expr_value(expr): + """ + Evaluates the expression 'expr' to a tristate value. Returns 0 (n), 1 (m), + or 2 (y). -def tri_greater(v1, v2): - """Returns True if the tristate v1 is greater than the tristate v2, where - "n", "m" and "y" are ordered from lowest to highest.""" - return TRI_TO_INT[v1] > TRI_TO_INT[v2] + 'expr' must be an already-parsed expression from a Symbol, Choice, or + MenuNode property. To evaluate an expression represented as a string, use + Kconfig.eval_string(). -def tri_greater_eq(v1, v2): - """Returns True if the tristate v1 is greater than or equal to the tristate - v2, where "n", "m" and "y" are ordered from lowest to highest.""" - return TRI_TO_INT[v1] >= TRI_TO_INT[v2] + Passing subexpressions of expressions to this function works as expected. + """ + if expr.__class__ is not tuple: + return expr.tri_value -# -# Internal classes -# + if expr[0] is AND: + v1 = expr_value(expr[1]) + # Short-circuit the n case as an optimization (~5% faster + # allnoconfig.py and allyesconfig.py, as of writing) + return 0 if not v1 else min(v1, expr_value(expr[2])) -class _Feed(object): + if expr[0] is OR: + v1 = expr_value(expr[1]) + # Short-circuit the y case as an optimization + return 2 if v1 == 2 else max(v1, expr_value(expr[2])) - """Class for working with sequences in a stream-like fashion; handy for - tokens.""" + if expr[0] is NOT: + return 2 - expr_value(expr[1]) - # This would be more helpful on the item classes, but would remove some - # flexibility - __slots__ = ['items', 'length', 'i'] + # Relation + # + # Implements <, <=, >, >= comparisons as well. These were added to + # kconfig in 31847b67 (kconfig: allow use of relations other than + # (in)equality). - def __init__(self, items): - self.items = items - self.length = len(self.items) - self.i = 0 + rel, v1, v2 = expr - def get_next(self): - if self.i >= self.length: - return None - item = self.items[self.i] - self.i += 1 - return item - - def peek_next(self): - return None if self.i >= self.length else self.items[self.i] - - def check(self, token): - """Check if the next token is 'token'. If so, remove it from the token - feed and return True. Otherwise, leave it in and return False.""" - if self.i < self.length and self.items[self.i] == token: - self.i += 1 - return True - return False + # If both operands are strings... + if v1.orig_type is STRING and v2.orig_type is STRING: + # ...then compare them lexicographically + comp = _strcmp(v1.str_value, v2.str_value) + else: + # Otherwise, try to compare them as numbers + try: + comp = _sym_to_num(v1) - _sym_to_num(v2) + except ValueError: + # Fall back on a lexicographic comparison if the operands don't + # parse as numbers + comp = _strcmp(v1.str_value, v2.str_value) + + return 2*(comp == 0 if rel is EQUAL else + comp != 0 if rel is UNEQUAL else + comp < 0 if rel is LESS else + comp <= 0 if rel is LESS_EQUAL else + comp > 0 if rel is GREATER else + comp >= 0) + + +def standard_sc_expr_str(sc): + """ + Standard symbol/choice printing function. Uses plain Kconfig syntax, and + displays choices as <choice> (or <choice NAME>, for named choices). + + See expr_str(). + """ + if sc.__class__ is Symbol: + if sc.is_constant and sc.name not in STR_TO_TRI: + return '"{}"'.format(escape(sc.name)) + return sc.name + + return "<choice {}>".format(sc.name) if sc.name else "<choice>" + + +def expr_str(expr, sc_expr_str_fn=standard_sc_expr_str): + """ + Returns the string representation of the expression 'expr', as in a Kconfig + file. + + Passing subexpressions of expressions to this function works as expected. + + sc_expr_str_fn (default: standard_sc_expr_str): + This function is called for every symbol/choice (hence "sc") appearing in + the expression, with the symbol/choice as the argument. It is expected to + return a string to be used for the symbol/choice. + + This can be used e.g. to turn symbols/choices into links when generating + documentation, or for printing the value of each symbol/choice after it. + + Note that quoted values are represented as constants symbols + (Symbol.is_constant == True). + """ + if expr.__class__ is not tuple: + return sc_expr_str_fn(expr) + + if expr[0] is AND: + return "{} && {}".format(_parenthesize(expr[1], OR, sc_expr_str_fn), + _parenthesize(expr[2], OR, sc_expr_str_fn)) + + if expr[0] is OR: + # This turns A && B || C && D into "(A && B) || (C && D)", which is + # redundant, but more readable + return "{} || {}".format(_parenthesize(expr[1], AND, sc_expr_str_fn), + _parenthesize(expr[2], AND, sc_expr_str_fn)) + + if expr[0] is NOT: + if expr[1].__class__ is tuple: + return "!({})".format(expr_str(expr[1], sc_expr_str_fn)) + return "!" + sc_expr_str_fn(expr[1]) # Symbol + + # Relation + # + # Relation operands are always symbols (quoted strings are constant + # symbols) + return "{} {} {}".format(sc_expr_str_fn(expr[1]), REL_TO_STR[expr[0]], + sc_expr_str_fn(expr[2])) - def unget_all(self): - self.i = 0 -class _FileFeed(object): +def expr_items(expr): + """ + Returns a set() of all items (symbols and choices) that appear in the + expression 'expr'. - """Feeds lines from a file. Keeps track of the filename and current line - number. Joins any line ending in \\ with the following line. We need to be - careful to get the line number right in the presence of continuation - lines.""" + Passing subexpressions of expressions to this function works as expected. + """ + res = set() - __slots__ = ['filename', 'lines', 'length', 'linenr'] + def rec(subexpr): + if subexpr.__class__ is tuple: + # AND, OR, NOT, or relation - def __init__(self, filename): - self.filename = _clean_up_path(filename) - with open(filename, "r") as f: - # No interleaving of I/O and processing yet. Don't know if it would - # help. - self.lines = f.readlines() - self.length = len(self.lines) - self.linenr = 0 + rec(subexpr[1]) - def get_next(self): - if self.linenr >= self.length: - return None - line = self.lines[self.linenr] - self.linenr += 1 - while line.endswith("\\\n"): - line = line[:-2] + self.lines[self.linenr] - self.linenr += 1 - return line + # NOTs only have a single operand + if subexpr[0] is not NOT: + rec(subexpr[2]) - def peek_next(self): - linenr = self.linenr - if linenr >= self.length: - return None - line = self.lines[linenr] - while line.endswith("\\\n"): - linenr += 1 - line = line[:-2] + self.lines[linenr] - return line - - def unget(self): - self.linenr -= 1 - while self.lines[self.linenr].endswith("\\\n"): - self.linenr -= 1 - - def next_nonblank(self): - """Removes lines up to and including the next non-blank (not all-space) - line and returns it. Returns None if there are no more non-blank - lines.""" - while 1: - line = self.get_next() - if line is None or not line.isspace(): - return line + else: + # Symbol or choice + res.add(subexpr) -# -# Internal functions -# + rec(expr) + return res -def _get_visibility(sc): - """Symbols and Choices have a "visibility" that acts as an upper bound on - the values a user can set for them, corresponding to the visibility in e.g. - 'make menuconfig'. This function calculates the visibility for the Symbol - or Choice 'sc' -- the logic is nearly identical.""" - if sc.cached_visibility is None: - vis = "n" - for _, cond_expr in sc.prompts: - vis = sc.config._eval_max(vis, cond_expr) - - if isinstance(sc, Symbol) and sc.is_choice_sym: - if sc.type == TRISTATE and vis == "m" and \ - sc.parent.get_mode() == "y": - # Choice symbols with visibility "m" are not visible if the - # choice has mode "y" - vis = "n" - else: - vis = sc.config._eval_min(vis, _get_visibility(sc.parent)) - # Promote "m" to "y" if we're dealing with a non-tristate - if vis == "m" and sc.type != TRISTATE: - vis = "y" +def split_expr(expr, op): + """ + Returns a list containing the top-level AND or OR operands in the + expression 'expr', in the same (left-to-right) order as they appear in + the expression. - sc.cached_visibility = vis + This can be handy e.g. for splitting (weak) reverse dependencies + from 'select' and 'imply' into individual selects/implies. - return sc.cached_visibility + op: + Either AND to get AND operands, or OR to get OR operands. -def _make_and(e1, e2): - """Constructs an AND (&&) expression. Performs trivial simplification. - Nones equate to 'y'. + (Having this as an operand might be more future-safe than having two + hardcoded functions.) - Note: returns None if e1 == e2 == None.""" - if e1 is None or e1 == "y": - return e2 - if e2 is None or e2 == "y": - return e1 - # Prefer to merge argument lists if possible to reduce the number of nodes + Pseudo-code examples: - if isinstance(e1, tuple) and e1[0] == AND: - if isinstance(e2, tuple) and e2[0] == AND: - return (AND, e1[1] + e2[1]) - return (AND, e1[1] + [e2]) + split_expr( A , OR ) -> [A] + split_expr( A && B , OR ) -> [A && B] + split_expr( A || B , OR ) -> [A, B] + split_expr( A || B , AND ) -> [A || B] + split_expr( A || B || (C && D) , OR ) -> [A, B, C && D] - if isinstance(e2, tuple) and e2[0] == AND: - return (AND, e2[1] + [e1]) + # Second || is not at the top level + split_expr( A || (B && (C || D)) , OR ) -> [A, B && (C || D)] - return (AND, [e1, e2]) + # Parentheses don't matter as long as we stay at the top level (don't + # encounter any non-'op' nodes) + split_expr( (A || B) || C , OR ) -> [A, B, C] + split_expr( A || (B || C) , OR ) -> [A, B, C] + """ + res = [] + + def rec(subexpr): + if subexpr.__class__ is tuple and subexpr[0] is op: + rec(subexpr[1]) + rec(subexpr[2]) + else: + res.append(subexpr) + + rec(expr) + return res -def _make_or(e1, e2): - """Constructs an OR (||) expression. Performs trivial simplification and - avoids Nones. Nones equate to 'y', which is usually what we want, but needs - to be kept in mind.""" - # Perform trivial simplification and avoid None's (which - # correspond to y's) - if e1 is None or e2 is None or e1 == "y" or e2 == "y": - return "y" - if e1 == "n": - return e2 +def escape(s): + r""" + Escapes the string 's' in the same fashion as is done for display in + Kconfig format and when writing strings to a .config file. " and \ are + replaced by \" and \\, respectively. + """ + # \ must be escaped before " to avoid double escaping + return s.replace("\\", r"\\").replace('"', r'\"') - # Prefer to merge argument lists if possible to reduce the number of nodes - if isinstance(e1, tuple) and e1[0] == OR: - if isinstance(e2, tuple) and e2[0] == OR: - return (OR, e1[1] + e2[1]) - return (OR, e1[1] + [e2]) +def unescape(s): + r""" + Unescapes the string 's'. \ followed by any character is replaced with just + that character. Used internally when reading .config files. + """ + return _unescape_sub(r"\1", s) - if isinstance(e2, tuple) and e2[0] == OR: - return (OR, e2[1] + [e1]) +# unescape() helper +_unescape_sub = re.compile(r"\\(.)").sub - return (OR, [e1, e2]) -def _get_expr_syms_rec(expr, res): - """_get_expr_syms() helper. Recurses through expressions.""" - if isinstance(expr, Symbol): - res.add(expr) - elif isinstance(expr, str): +def standard_kconfig(): + """ + Helper for tools. Loads the top-level Kconfig specified as the first + command-line argument, or "Kconfig" if there are no command-line arguments. + Returns the Kconfig instance. + + Exits with sys.exit() (which raises a SystemExit exception) and prints a + usage note to stderr if more than one command-line argument is passed. + """ + if len(sys.argv) > 2: + sys.exit("usage: {} [Kconfig]".format(sys.argv[0])) + + # Only show backtraces for unexpected exceptions + try: + return Kconfig("Kconfig" if len(sys.argv) < 2 else sys.argv[1]) + except (EnvironmentError, KconfigError) as e: + # Some long exception messages have extra newlines for better + # formatting when reported as an unhandled exception. Strip them here. + sys.exit(str(e).strip()) + + +def standard_config_filename(): + """ + Helper for tools. Returns the value of KCONFIG_CONFIG (which specifies the + .config file to load/save) if it is set, and ".config" otherwise. + + Calling load_config() with filename=None might give the behavior you want, + without having to use this function. + """ + return os.getenv("KCONFIG_CONFIG", ".config") + + +def load_allconfig(kconf, filename): + """ + Helper for all*config. Loads (merges) the configuration file specified by + KCONFIG_ALLCONFIG, if any. See Documentation/kbuild/kconfig.txt in the + Linux kernel. + + Disables warnings for duplicated assignments within configuration files for + the duration of the call (kconf.warn_assign_override/warn_assign_redun = False), + and restores the previous warning settings at the end. The + KCONFIG_ALLCONFIG configuration file is expected to override symbols. + + Exits with sys.exit() (which raises a SystemExit exception) and prints an + error to stderr if KCONFIG_ALLCONFIG is set but the configuration file + can't be opened. + + kconf: + Kconfig instance to load the configuration in. + + filename: + Command-specific configuration filename - "allyes.config", + "allno.config", etc. + """ + allconfig = os.getenv("KCONFIG_ALLCONFIG") + if allconfig is None: return - elif expr[0] == AND or expr[0] == OR: - for term in expr[1]: - _get_expr_syms_rec(term, res) - elif expr[0] == NOT: - _get_expr_syms_rec(expr[1], res) - elif expr[0] == EQUAL or expr[0] == UNEQUAL: - if isinstance(expr[1], Symbol): - res.add(expr[1]) - if isinstance(expr[2], Symbol): - res.add(expr[2]) + + def std_msg(e): + # "Upcasts" a _KconfigIOError to an IOError, removing the custom + # __str__() message. The standard message is better here. + # + # This might also convert an OSError to an IOError in obscure cases, + # but it's probably not a big deal. The distinction is shaky (see + # PEP-3151). + return IOError(e.errno, e.strerror, e.filename) + + old_warn_assign_override = kconf.warn_assign_override + old_warn_assign_redun = kconf.warn_assign_redun + kconf.warn_assign_override = kconf.warn_assign_redun = False + + if allconfig in ("", "1"): + try: + print(kconf.load_config(filename, False)) + except EnvironmentError as e1: + try: + print(kconf.load_config("all.config", False)) + except EnvironmentError as e2: + sys.exit("error: KCONFIG_ALLCONFIG is set, but neither {} " + "nor all.config could be opened: {}, {}" + .format(filename, std_msg(e1), std_msg(e2))) else: - _internal_error("Internal error while fetching symbols from an " - "expression with token stream {0}.".format(expr)) + try: + print(kconf.load_config(allconfig, False)) + except EnvironmentError as e: + sys.exit("error: KCONFIG_ALLCONFIG is set to '{}', which " + "could not be opened: {}" + .format(allconfig, std_msg(e))) -def _get_expr_syms(expr): - """Returns the set() of symbols appearing in expr.""" - res = set() - if expr is not None: - _get_expr_syms_rec(expr, res) - return res + kconf.warn_assign_override = old_warn_assign_override + kconf.warn_assign_redun = old_warn_assign_redun -def _str_val(obj): - """Returns the value of obj as a string. If obj is not a string (constant - symbol), it must be a Symbol.""" - return obj if isinstance(obj, str) else obj.get_value() - -def _make_block_conf(block, append_fn): - """Returns a list of .config strings for a block (list) of items.""" - - # Collect the substrings in a list and later use join() instead of += to - # build the final .config contents. With older Python versions, this yields - # linear instead of quadratic complexity. - for item in block: - item._make_conf(append_fn) - -def _sym_str_string(sym_or_str): - if isinstance(sym_or_str, str): - return '"' + sym_or_str + '"' - return sym_or_str.name - -def _intersperse(lst, op): - """_expr_to_str() helper. Gets the string representation of each expression - in lst and produces a list where op has been inserted between the - elements.""" - if not lst: - return "" - res = [] +# +# Internal functions +# - def handle_sub_expr(expr): - no_parens = isinstance(expr, (str, Symbol)) or \ - expr[0] in (EQUAL, UNEQUAL) or \ - PRECEDENCE[op] <= PRECEDENCE[expr[0]] - if not no_parens: - res.append("(") - res.extend(_expr_to_str_rec(expr)) - if not no_parens: - res.append(")") - op_str = OP_TO_STR[op] +def _visibility(sc): + # Symbols and Choices have a "visibility" that acts as an upper bound on + # the values a user can set for them, corresponding to the visibility in + # e.g. 'make menuconfig'. This function calculates the visibility for the + # Symbol or Choice 'sc' -- the logic is nearly identical. - handle_sub_expr(lst[0]) - for expr in lst[1:]: - res.append(op_str) - handle_sub_expr(expr) + vis = 0 - return res + for node in sc.nodes: + if node.prompt: + vis = max(vis, expr_value(node.prompt[1])) -def _expr_to_str_rec(expr): - if expr is None: - return [""] + if sc.__class__ is Symbol and sc.choice: + if sc.choice.orig_type is TRISTATE and \ + sc.orig_type is not TRISTATE and sc.choice.tri_value != 2: + # Non-tristate choice symbols are only visible in y mode + return 0 - if isinstance(expr, (Symbol, str)): - return [_sym_str_string(expr)] + if sc.orig_type is TRISTATE and vis == 1 and sc.choice.tri_value == 2: + # Choice symbols with m visibility are not visible in y mode + return 0 - if expr[0] in (AND, OR): - return _intersperse(expr[1], expr[0]) + # Promote m to y if we're dealing with a non-tristate (possibly due to + # modules being disabled) + if vis == 1 and sc.type is not TRISTATE: + return 2 - if expr[0] == NOT: - need_parens = not isinstance(expr[1], (str, Symbol)) + return vis - res = ["!"] - if need_parens: - res.append("(") - res.extend(_expr_to_str_rec(expr[1])) - if need_parens: - res.append(")") - return res - if expr[0] in (EQUAL, UNEQUAL): - return [_sym_str_string(expr[1]), - OP_TO_STR[expr[0]], - _sym_str_string(expr[2])] +def _make_depend_on(sc, expr): + # Adds 'sc' (symbol or choice) as a "dependee" to all symbols in 'expr'. + # Constant symbols in 'expr' are skipped as they can never change value + # anyway. + + if expr.__class__ is tuple: + # AND, OR, NOT, or relation + + _make_depend_on(sc, expr[1]) + + # NOTs only have a single operand + if expr[0] is not NOT: + _make_depend_on(sc, expr[2]) + + elif not expr.is_constant: + # Non-constant symbol, or choice + expr._dependents.add(sc) + -def _expr_to_str(expr): - return "".join(_expr_to_str_rec(expr)) +def _parenthesize(expr, type_, sc_expr_str_fn): + # expr_str() helper. Adds parentheses around expressions of type 'type_'. -def _indentation(line): - """Returns the length of the line's leading whitespace, treating tab stops - as being spaced 8 characters apart.""" - line = line.expandtabs() - return len(line) - len(line.lstrip()) + if expr.__class__ is tuple and expr[0] is type_: + return "({})".format(expr_str(expr, sc_expr_str_fn)) + return expr_str(expr, sc_expr_str_fn) + + +def _ordered_unique(lst): + # Returns 'lst' with any duplicates removed, preserving order. This hacky + # version seems to be a common idiom. It relies on short-circuit evaluation + # and set.add() returning None, which is falsy. + + seen = set() + seen_add = seen.add + return [x for x in lst if x not in seen and not seen_add(x)] -def _deindent(line, indent): - """Deindent 'line' by 'indent' spaces.""" - line = line.expandtabs() - if len(line) <= indent: - return line - return line[indent:] def _is_base_n(s, n): try: @@ -3412,133 +6222,809 @@ def _is_base_n(s, n): except ValueError: return False -def _lines(*args): - """Returns a string consisting of all arguments, with newlines inserted - between them.""" - return "\n".join(args) - -def _comment(s): - """Returns a new string with "#" inserted before each line in 's'.""" - if not s: - return "#" - res = "".join(["#" + line for line in s.splitlines(True)]) - if s.endswith("\n"): - return res + "#" - return res -def _clean_up_path(path): - """Strips an initial "./" and any trailing slashes from 'path'.""" - if path.startswith("./"): - path = path[2:] - return path.rstrip("/") - -def _build_msg(msg, filename, linenr): - if filename is not None: - msg = "{0}:{1}: ".format(_clean_up_path(filename), linenr) + msg - return msg - -def _stderr_msg(msg, filename, linenr): - sys.stderr.write(_build_msg(msg, filename, linenr) + "\n") - -def _tokenization_error(s, filename, linenr): - loc = "" if filename is None else "{0}:{1}: ".format(filename, linenr) - raise Kconfig_Syntax_Error("{0}Couldn't tokenize '{1}'" - .format(loc, s.strip())) - -def _parse_error(s, msg, filename, linenr): - loc = "" if filename is None else "{0}:{1}: ".format(filename, linenr) - raise Kconfig_Syntax_Error("{0}Couldn't parse '{1}'{2}" - .format(loc, s.strip(), - "." if msg is None else ": " + msg)) - -def _internal_error(msg): - raise Internal_Error(msg + - "\nSorry! You may want to send an email to ulfalizer a.t Google's " - "email service to tell me about this. Include the message above and the " - "stack trace and describe what you were doing.") +def _strcmp(s1, s2): + # strcmp()-alike that returns -1, 0, or 1 + + return (s1 > s2) - (s1 < s2) + + +def _sym_to_num(sym): + # expr_value() helper for converting a symbol to a number. Raises + # ValueError for symbols that can't be converted. + + # For BOOL and TRISTATE, n/m/y count as 0/1/2. This mirrors 9059a3493ef + # ("kconfig: fix relational operators for bool and tristate symbols") in + # the C implementation. + return sym.tri_value if sym.orig_type in _BOOL_TRISTATE else \ + int(sym.str_value, _TYPE_TO_BASE[sym.orig_type]) + + +def _touch_dep_file(path, sym_name): + # If sym_name is MY_SYM_NAME, touches my/sym/name.h. See the sync_deps() + # docstring. + + sym_path = path + os.sep + sym_name.lower().replace("_", os.sep) + ".h" + sym_path_dir = dirname(sym_path) + if not exists(sym_path_dir): + os.makedirs(sym_path_dir, 0o755) + + # A kind of truncating touch, mirroring the C tools + os.close(os.open( + sym_path, os.O_WRONLY | os.O_CREAT | os.O_TRUNC, 0o644)) + + +def _save_old(path): + # See write_config() + + def copy(src, dst): + # Import as needed, to save some startup time + import shutil + shutil.copyfile(src, dst) + + if islink(path): + # Preserve symlinks + copy_fn = copy + elif hasattr(os, "replace"): + # Python 3 (3.3+) only. Best choice when available, because it + # removes <filename>.old on both *nix and Windows. + copy_fn = os.replace + elif os.name == "posix": + # Removes <filename>.old on POSIX systems + copy_fn = os.rename + else: + # Fall back on copying + copy_fn = copy + + try: + copy_fn(path, path + ".old") + except Exception: + # Ignore errors from 'path' missing as well as other errors. + # <filename>.old file is usually more of a nice-to-have, and not worth + # erroring out over e.g. if <filename>.old happens to be a directory or + # <filename> is something like /dev/null. + pass + + +def _name_and_loc(sc): + # Helper for giving the symbol/choice name and location(s) in e.g. warnings + + # Reuse the expression format. That way choices show up as + # '<choice (name, if any)>' + name = standard_sc_expr_str(sc) + + if not sc.nodes: + return name + " (undefined)" + + return "{} (defined at {})".format( + name, + ", ".join("{}:{}".format(node.filename, node.linenr) + for node in sc.nodes)) + + +# Menu manipulation + + +def _expr_depends_on(expr, sym): + # Reimplementation of expr_depends_symbol() from mconf.c. Used to determine + # if a submenu should be implicitly created. This also influences which + # items inside choice statements are considered choice items. + + if expr.__class__ is not tuple: + return expr is sym + + if expr[0] in _EQUAL_UNEQUAL: + # Check for one of the following: + # sym = m/y, m/y = sym, sym != n, n != sym + + left, right = expr[1:] + + if right is sym: + left, right = right, left + elif left is not sym: + return False + + return (expr[0] is EQUAL and right is sym.kconfig.m or + right is sym.kconfig.y) or \ + (expr[0] is UNEQUAL and right is sym.kconfig.n) + + return expr[0] is AND and \ + (_expr_depends_on(expr[1], sym) or + _expr_depends_on(expr[2], sym)) + + +def _auto_menu_dep(node1, node2): + # Returns True if node2 has an "automatic menu dependency" on node1. If + # node2 has a prompt, we check its condition. Otherwise, we look directly + # at node2.dep. + + return _expr_depends_on(node2.prompt[1] if node2.prompt else node2.dep, + node1.item) + + +def _flatten(node): + # "Flattens" menu nodes without prompts (e.g. 'if' nodes and non-visible + # symbols with children from automatic menu creation) so that their + # children appear after them instead. This gives a clean menu structure + # with no unexpected "jumps" in the indentation. + # + # Do not flatten promptless choices (which can appear "legitimately" if a + # named choice is defined in multiple locations to add on symbols). It + # looks confusing, and the menuconfig already shows all choice symbols if + # you enter the choice at some location with a prompt. + + while node: + if node.list and not node.prompt and \ + node.item.__class__ is not Choice: + + last_node = node.list + while 1: + last_node.parent = node.parent + if not last_node.next: + break + last_node = last_node.next + + last_node.next = node.next + node.next = node.list + node.list = None + + node = node.next + + +def _remove_ifs(node): + # Removes 'if' nodes (which can be recognized by MenuNode.item being None), + # which are assumed to already have been flattened. The C implementation + # doesn't bother to do this, but we expose the menu tree directly, and it + # makes it nicer to work with. + + cur = node.list + while cur and not cur.item: + cur = cur.next + + node.list = cur + + while cur: + next = cur.next + while next and not next.item: + next = next.next + + # Equivalent to + # + # cur.next = next + # cur = next + # + # due to tricky Python semantics. The order matters. + cur.next = cur = next + + +def _finalize_choice(node): + # Finalizes a choice, marking each symbol whose menu node has the choice as + # the parent as a choice symbol, and automatically determining types if not + # specified. + + choice = node.item + + cur = node.list + while cur: + if cur.item.__class__ is Symbol: + cur.item.choice = choice + choice.syms.append(cur.item) + cur = cur.next + + # If no type is specified for the choice, its type is that of + # the first choice item with a specified type + if not choice.orig_type: + for item in choice.syms: + if item.orig_type: + choice.orig_type = item.orig_type + break + + # Each choice item of UNKNOWN type gets the type of the choice + for sym in choice.syms: + if not sym.orig_type: + sym.orig_type = choice.orig_type + + +def _check_dep_loop_sym(sym, ignore_choice): + # Detects dependency loops using depth-first search on the dependency graph + # (which is calculated earlier in Kconfig._build_dep()). + # + # Algorithm: + # + # 1. Symbols/choices start out with _visited = 0, meaning unvisited. + # + # 2. When a symbol/choice is first visited, _visited is set to 1, meaning + # "visited, potentially part of a dependency loop". The recursive + # search then continues from the symbol/choice. + # + # 3. If we run into a symbol/choice X with _visited already set to 1, + # there's a dependency loop. The loop is found on the call stack by + # recording symbols while returning ("on the way back") until X is seen + # again. + # + # 4. Once a symbol/choice and all its dependencies (or dependents in this + # case) have been checked recursively without detecting any loops, its + # _visited is set to 2, meaning "visited, not part of a dependency + # loop". + # + # This saves work if we run into the symbol/choice again in later calls + # to _check_dep_loop_sym(). We just return immediately. + # + # Choices complicate things, as every choice symbol depends on every other + # choice symbol in a sense. When a choice is "entered" via a choice symbol + # X, we visit all choice symbols from the choice except X, and prevent + # immediately revisiting the choice with a flag (ignore_choice). + # + # Maybe there's a better way to handle this (different flags or the + # like...) + + if not sym._visited: + # sym._visited == 0, unvisited + + sym._visited = 1 + + for dep in sym._dependents: + # Choices show up in Symbol._dependents when the choice has the + # symbol in a 'prompt' or 'default' condition (e.g. + # 'default ... if SYM'). + # + # Since we aren't entering the choice via a choice symbol, all + # choice symbols need to be checked, hence the None. + loop = _check_dep_loop_choice(dep, None) \ + if dep.__class__ is Choice \ + else _check_dep_loop_sym(dep, False) + + if loop: + # Dependency loop found + return _found_dep_loop(loop, sym) + + if sym.choice and not ignore_choice: + loop = _check_dep_loop_choice(sym.choice, sym) + if loop: + # Dependency loop found + return _found_dep_loop(loop, sym) + + # The symbol is not part of a dependency loop + sym._visited = 2 + + # No dependency loop found + return None + + if sym._visited == 2: + # The symbol was checked earlier and is already known to not be part of + # a dependency loop + return None + + # sym._visited == 1, found a dependency loop. Return the symbol as the + # first element in it. + return (sym,) + + +def _check_dep_loop_choice(choice, skip): + if not choice._visited: + # choice._visited == 0, unvisited + + choice._visited = 1 + + # Check for loops involving choice symbols. If we came here via a + # choice symbol, skip that one, as we'd get a false positive + # '<sym FOO> -> <choice> -> <sym FOO>' loop otherwise. + for sym in choice.syms: + if sym is not skip: + # Prevent the choice from being immediately re-entered via the + # "is a choice symbol" path by passing True + loop = _check_dep_loop_sym(sym, True) + if loop: + # Dependency loop found + return _found_dep_loop(loop, choice) + + # The choice is not part of a dependency loop + choice._visited = 2 + + # No dependency loop found + return None + + if choice._visited == 2: + # The choice was checked earlier and is already known to not be part of + # a dependency loop + return None + + # choice._visited == 1, found a dependency loop. Return the choice as the + # first element in it. + return (choice,) + + +def _found_dep_loop(loop, cur): + # Called "on the way back" when we know we have a loop + + # Is the symbol/choice 'cur' where the loop started? + if cur is not loop[0]: + # Nope, it's just a part of the loop + return loop + (cur,) + + # Yep, we have the entire loop. Throw an exception that shows it. + + msg = "\nDependency loop\n" \ + "===============\n\n" + + for item in loop: + if item is not loop[0]: + msg += "...depends on " + if item.__class__ is Symbol and item.choice: + msg += "the choice symbol " + + msg += "{}, with definition...\n\n{}\n\n" \ + .format(_name_and_loc(item), item) + + # Small wart: Since we reuse the already calculated + # Symbol/Choice._dependents sets for recursive dependency detection, we + # lose information on whether a dependency came from a 'select'/'imply' + # condition or e.g. a 'depends on'. + # + # This might cause selecting symbols to "disappear". For example, + # a symbol B having 'select A if C' gives a direct dependency from A to + # C, since it corresponds to a reverse dependency of B && C. + # + # Always print reverse dependencies for symbols that have them to make + # sure information isn't lost. I wonder if there's some neat way to + # improve this. + + if item.__class__ is Symbol: + if item.rev_dep is not item.kconfig.n: + msg += "(select-related dependencies: {})\n\n" \ + .format(expr_str(item.rev_dep)) + + if item.weak_rev_dep is not item.kconfig.n: + msg += "(imply-related dependencies: {})\n\n" \ + .format(expr_str(item.rev_dep)) + + msg += "...depends again on {}".format(_name_and_loc(loop[0])) + + raise KconfigError(msg) + + +def _decoding_error(e, filename, macro_linenr=None): + # Gives the filename and context for UnicodeDecodeError's, which are a pain + # to debug otherwise. 'e' is the UnicodeDecodeError object. + # + # If the decoding error is for the output of a $(shell,...) command, + # macro_linenr holds the line number where it was run (the exact line + # number isn't available for decoding errors in files). + + raise KconfigError( + "\n" + "Malformed {} in {}\n" + "Context: {}\n" + "Problematic data: {}\n" + "Reason: {}".format( + e.encoding, + "'{}'".format(filename) if macro_linenr is None else + "output from macro at {}:{}".format(filename, macro_linenr), + e.object[max(e.start - 40, 0):e.end + 40], + e.object[e.start:e.end], + e.reason)) + + +def _warn_verbose_deprecated(fn_name): + sys.stderr.write( + "Deprecation warning: {0}()'s 'verbose' argument has no effect. Since " + "Kconfiglib 12.0.0, the message is returned from {0}() instead, " + "and is always generated. Do e.g. print(kconf.{0}()) if you want to " + "want to show a message like \"Loaded configuration '.config'\" on " + "stdout. The old API required ugly hacks to reuse messages in " + "configuration interfaces.\n".format(fn_name)) + + +# Predefined preprocessor functions + + +def _filename_fn(kconf, _): + return kconf.filename + + +def _lineno_fn(kconf, _): + return str(kconf.linenr) + + +def _info_fn(kconf, _, msg): + print("{}:{}: {}".format(kconf.filename, kconf.linenr, msg)) + + return "" + + +def _warning_if_fn(kconf, _, cond, msg): + if cond == "y": + kconf._warn(msg, kconf.filename, kconf.linenr) + + return "" + + +def _error_if_fn(kconf, _, cond, msg): + if cond == "y": + raise KconfigError("{}:{}: {}".format( + kconf.filename, kconf.linenr, msg)) + + return "" + + +def _shell_fn(kconf, _, command): + # Only import as needed, to save some startup time + import subprocess + + stdout, stderr = subprocess.Popen( + command, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE + ).communicate() + + if not _IS_PY2: + try: + stdout = stdout.decode(kconf._encoding) + stderr = stderr.decode(kconf._encoding) + except UnicodeDecodeError as e: + _decoding_error(e, kconf.filename, kconf.linenr) + + if stderr: + kconf._warn("'{}' wrote to stderr: {}".format( + command, "\n".join(stderr.splitlines())), + kconf.filename, kconf.linenr) + + # Universal newlines with splitlines() (to prevent e.g. stray \r's in + # command output on Windows), trailing newline removal, and + # newline-to-space conversion. + # + # On Python 3 versions before 3.6, it's not possible to specify the + # encoding when passing universal_newlines=True to Popen() (the 'encoding' + # parameter was added in 3.6), so we do this manual version instead. + return "\n".join(stdout.splitlines()).rstrip("\n").replace("\n", " ") # -# Internal global constants +# Global constants # -# Tokens -(T_AND, T_OR, T_NOT, - T_OPEN_PAREN, T_CLOSE_PAREN, - T_EQUAL, T_UNEQUAL, - T_MAINMENU, T_MENU, T_ENDMENU, - T_SOURCE, T_CHOICE, T_ENDCHOICE, - T_COMMENT, T_CONFIG, T_MENUCONFIG, - T_HELP, T_IF, T_ENDIF, T_DEPENDS, T_ON, - T_OPTIONAL, T_PROMPT, T_DEFAULT, - T_BOOL, T_TRISTATE, T_HEX, T_INT, T_STRING, - T_DEF_BOOL, T_DEF_TRISTATE, - T_SELECT, T_IMPLY, T_RANGE, T_OPTION, T_ALLNOCONFIG_Y, T_ENV, - T_DEFCONFIG_LIST, T_MODULES, T_VISIBLE) = range(40) - -# The leading underscore before the function assignments below prevent pydoc -# from listing them. The constants could be hidden too, but they're fairly -# obviously internal anyway, so don't bother spamming the code. - -# Keyword to token map. Note that the get() method is assigned directly as a -# small optimization. -_get_keyword = \ - {"mainmenu": T_MAINMENU, "menu": T_MENU, "endmenu": T_ENDMENU, - "endif": T_ENDIF, "endchoice": T_ENDCHOICE, "source": T_SOURCE, - "choice": T_CHOICE, "config": T_CONFIG, "comment": T_COMMENT, - "menuconfig": T_MENUCONFIG, "help": T_HELP, "if": T_IF, - "depends": T_DEPENDS, "on": T_ON, "optional": T_OPTIONAL, - "prompt": T_PROMPT, "default": T_DEFAULT, "bool": T_BOOL, "boolean": T_BOOL, - "tristate": T_TRISTATE, "int": T_INT, "hex": T_HEX, "def_bool": T_DEF_BOOL, - "def_tristate": T_DEF_TRISTATE, "string": T_STRING, "select": T_SELECT, - "imply" : T_IMPLY, "range": T_RANGE, "option": T_OPTION, - "allnoconfig_y": T_ALLNOCONFIG_Y, "env": T_ENV, - "defconfig_list": T_DEFCONFIG_LIST, "modules": T_MODULES, - "visible": T_VISIBLE}.get - -# Strings to use for True and False -BOOL_STR = {False: "false", True: "true"} - -# Tokens after which identifier-like lexemes are treated as strings. T_CHOICE -# is included to avoid symbols being registered for named choices. -STRING_LEX = frozenset((T_BOOL, T_TRISTATE, T_INT, T_HEX, T_STRING, T_CHOICE, - T_PROMPT, T_MENU, T_COMMENT, T_SOURCE, T_MAINMENU)) - -# Matches the initial token on a line; see _tokenize(). Also eats trailing -# whitespace as an optimization. -_initial_token_re_match = re.compile(r"[^\w]*(\w+)\s*").match - -# Matches an identifier/keyword optionally preceded by whitespace. Also eats -# trailing whitespace as an optimization. -_id_keyword_re_match = re.compile(r"\s*([\w./-]+)\s*").match - -# Regular expression for finding $-references to symbols in strings -_sym_ref_re_search = re.compile(r"\$[A-Za-z0-9_]+").search - -# Integers representing symbol types -UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(6) - -# Strings to use for types -TYPENAME = {UNKNOWN: "unknown", BOOL: "bool", TRISTATE: "tristate", - STRING: "string", HEX: "hex", INT: "int"} - -# Token to type mapping -TOKEN_TO_TYPE = {T_BOOL: BOOL, T_TRISTATE: TRISTATE, T_STRING: STRING, - T_INT: INT, T_HEX: HEX} - -# Default values for symbols of different types (the value the symbol gets if -# it is not assigned a user value and none of its 'default' clauses kick in) -DEFAULT_VALUE = {BOOL: "n", TRISTATE: "n", STRING: "", INT: "", HEX: ""} - -# Indicates that no item is selected in a choice statement -NO_SELECTION = 0 - -# Integers representing expression types -AND, OR, NOT, EQUAL, UNEQUAL = range(5) - -# Map from tristate values to integers -TRI_TO_INT = {"n": 0, "m": 1, "y": 2} - -# Printing-related stuff - -OP_TO_STR = {AND: " && ", OR: " || ", EQUAL: " = ", UNEQUAL: " != "} -PRECEDENCE = {OR: 0, AND: 1, NOT: 2} +TRI_TO_STR = { + 0: "n", + 1: "m", + 2: "y", +} + +STR_TO_TRI = { + "n": 0, + "m": 1, + "y": 2, +} + +# Constant representing that there's no cached choice selection. This is +# distinct from a cached None (no selection). Any object that's not None or a +# Symbol will do. We test this with 'is'. +_NO_CACHED_SELECTION = 0 + +# Are we running on Python 2? +_IS_PY2 = sys.version_info[0] < 3 + +try: + _UNAME_RELEASE = os.uname()[2] +except AttributeError: + # Only import as needed, to save some startup time + import platform + _UNAME_RELEASE = platform.uname()[2] + +# The token and type constants below are safe to test with 'is', which is a bit +# faster (~30% faster on my machine, and a few % faster for total parsing +# time), even without assuming Python's small integer optimization (which +# caches small integer objects). The constants end up pointing to unique +# integer objects, and since we consistently refer to them via the names below, +# we always get the same object. +# +# Client code should use == though. + +# Tokens, with values 1, 2, ... . Avoiding 0 simplifies some checks by making +# all tokens except empty strings truthy. +( + _T_ALLNOCONFIG_Y, + _T_AND, + _T_BOOL, + _T_CHOICE, + _T_CLOSE_PAREN, + _T_COMMENT, + _T_CONFIG, + _T_DEFAULT, + _T_DEFCONFIG_LIST, + _T_DEF_BOOL, + _T_DEF_HEX, + _T_DEF_INT, + _T_DEF_STRING, + _T_DEF_TRISTATE, + _T_DEPENDS, + _T_ENDCHOICE, + _T_ENDIF, + _T_ENDMENU, + _T_ENV, + _T_EQUAL, + _T_GREATER, + _T_GREATER_EQUAL, + _T_HELP, + _T_HEX, + _T_IF, + _T_IMPLY, + _T_INT, + _T_LESS, + _T_LESS_EQUAL, + _T_MAINMENU, + _T_MENU, + _T_MENUCONFIG, + _T_MODULES, + _T_NOT, + _T_ON, + _T_OPEN_PAREN, + _T_OPTION, + _T_OPTIONAL, + _T_OR, + _T_ORSOURCE, + _T_OSOURCE, + _T_PROMPT, + _T_RANGE, + _T_RSOURCE, + _T_SELECT, + _T_SOURCE, + _T_STRING, + _T_TRISTATE, + _T_UNEQUAL, + _T_VISIBLE, +) = range(1, 51) + +# Keyword to token map, with the get() method assigned directly as a small +# optimization +_get_keyword = { + "---help---": _T_HELP, + "allnoconfig_y": _T_ALLNOCONFIG_Y, + "bool": _T_BOOL, + "boolean": _T_BOOL, + "choice": _T_CHOICE, + "comment": _T_COMMENT, + "config": _T_CONFIG, + "def_bool": _T_DEF_BOOL, + "def_hex": _T_DEF_HEX, + "def_int": _T_DEF_INT, + "def_string": _T_DEF_STRING, + "def_tristate": _T_DEF_TRISTATE, + "default": _T_DEFAULT, + "defconfig_list": _T_DEFCONFIG_LIST, + "depends": _T_DEPENDS, + "endchoice": _T_ENDCHOICE, + "endif": _T_ENDIF, + "endmenu": _T_ENDMENU, + "env": _T_ENV, + "grsource": _T_ORSOURCE, # Backwards compatibility + "gsource": _T_OSOURCE, # Backwards compatibility + "help": _T_HELP, + "hex": _T_HEX, + "if": _T_IF, + "imply": _T_IMPLY, + "int": _T_INT, + "mainmenu": _T_MAINMENU, + "menu": _T_MENU, + "menuconfig": _T_MENUCONFIG, + "modules": _T_MODULES, + "on": _T_ON, + "option": _T_OPTION, + "optional": _T_OPTIONAL, + "orsource": _T_ORSOURCE, + "osource": _T_OSOURCE, + "prompt": _T_PROMPT, + "range": _T_RANGE, + "rsource": _T_RSOURCE, + "select": _T_SELECT, + "source": _T_SOURCE, + "string": _T_STRING, + "tristate": _T_TRISTATE, + "visible": _T_VISIBLE, +}.get + +# The constants below match the value of the corresponding tokens to remove the +# need for conversion + +# Node types +MENU = _T_MENU +COMMENT = _T_COMMENT + +# Expression types +AND = _T_AND +OR = _T_OR +NOT = _T_NOT +EQUAL = _T_EQUAL +UNEQUAL = _T_UNEQUAL +LESS = _T_LESS +LESS_EQUAL = _T_LESS_EQUAL +GREATER = _T_GREATER +GREATER_EQUAL = _T_GREATER_EQUAL + +REL_TO_STR = { + EQUAL: "=", + UNEQUAL: "!=", + LESS: "<", + LESS_EQUAL: "<=", + GREATER: ">", + GREATER_EQUAL: ">=", +} + +# Symbol/choice types. UNKNOWN is 0 (falsy) to simplify some checks. +# Client code shouldn't rely on it though, as it was non-zero in +# older versions. +UNKNOWN = 0 +BOOL = _T_BOOL +TRISTATE = _T_TRISTATE +STRING = _T_STRING +INT = _T_INT +HEX = _T_HEX + +TYPE_TO_STR = { + UNKNOWN: "unknown", + BOOL: "bool", + TRISTATE: "tristate", + STRING: "string", + INT: "int", + HEX: "hex", +} + +# Used in comparisons. 0 means the base is inferred from the format of the +# string. +_TYPE_TO_BASE = { + HEX: 16, + INT: 10, + STRING: 0, + UNKNOWN: 0, +} + +# def_bool -> BOOL, etc. +_DEF_TOKEN_TO_TYPE = { + _T_DEF_BOOL: BOOL, + _T_DEF_HEX: HEX, + _T_DEF_INT: INT, + _T_DEF_STRING: STRING, + _T_DEF_TRISTATE: TRISTATE, +} + +# Tokens after which strings are expected. This is used to tell strings from +# constant symbol references during tokenization, both of which are enclosed in +# quotes. +# +# Identifier-like lexemes ("missing quotes") are also treated as strings after +# these tokens. _T_CHOICE is included to avoid symbols being registered for +# named choices. +_STRING_LEX = frozenset({ + _T_BOOL, + _T_CHOICE, + _T_COMMENT, + _T_HEX, + _T_INT, + _T_MAINMENU, + _T_MENU, + _T_ORSOURCE, + _T_OSOURCE, + _T_PROMPT, + _T_RSOURCE, + _T_SOURCE, + _T_STRING, + _T_TRISTATE, +}) + +# Various sets for quick membership tests. Gives a single global lookup and +# avoids creating temporary dicts/tuples. + +_TYPE_TOKENS = frozenset({ + _T_BOOL, + _T_TRISTATE, + _T_INT, + _T_HEX, + _T_STRING, +}) + +_SOURCE_TOKENS = frozenset({ + _T_SOURCE, + _T_RSOURCE, + _T_OSOURCE, + _T_ORSOURCE, +}) + +_REL_SOURCE_TOKENS = frozenset({ + _T_RSOURCE, + _T_ORSOURCE, +}) + +# Obligatory (non-optional) sources +_OBL_SOURCE_TOKENS = frozenset({ + _T_SOURCE, + _T_RSOURCE, +}) + +_BOOL_TRISTATE = frozenset({ + BOOL, + TRISTATE, +}) + +_BOOL_TRISTATE_UNKNOWN = frozenset({ + BOOL, + TRISTATE, + UNKNOWN, +}) + +_INT_HEX = frozenset({ + INT, + HEX, +}) + +_SYMBOL_CHOICE = frozenset({ + Symbol, + Choice, +}) + +_MENU_COMMENT = frozenset({ + MENU, + COMMENT, +}) + +_EQUAL_UNEQUAL = frozenset({ + EQUAL, + UNEQUAL, +}) + +_RELATIONS = frozenset({ + EQUAL, + UNEQUAL, + LESS, + LESS_EQUAL, + GREATER, + GREATER_EQUAL, +}) + +# Helper functions for getting compiled regular expressions, with the needed +# matching function returned directly as a small optimization. +# +# Use ASCII regex matching on Python 3. It's already the default on Python 2. + + +def _re_match(regex): + return re.compile(regex, 0 if _IS_PY2 else re.ASCII).match + + +def _re_search(regex): + return re.compile(regex, 0 if _IS_PY2 else re.ASCII).search + + +# Various regular expressions used during parsing + +# The initial token on a line. Also eats leading and trailing whitespace, so +# that we can jump straight to the next token (or to the end of the line if +# there is only one token). +# +# This regex will also fail to match for empty lines and comment lines. +# +# '$' is included to detect preprocessor variable assignments with macro +# expansions in the left-hand side. +_command_match = _re_match(r"\s*([A-Za-z0-9_$-]+)\s*") + +# An identifier/keyword after the first token. Also eats trailing whitespace. +# '$' is included to detect identifiers containing macro expansions. +_id_keyword_match = _re_match(r"([A-Za-z0-9_$/.-]+)\s*") + +# A fragment in the left-hand side of a preprocessor variable assignment. These +# are the portions between macro expansions ($(foo)). Macros are supported in +# the LHS (variable name). +_assignment_lhs_fragment_match = _re_match("[A-Za-z0-9_-]*") + +# The assignment operator and value (right-hand side) in a preprocessor +# variable assignment +_assignment_rhs_match = _re_match(r"\s*(=|:=|\+=)\s*(.*)") + +# Special characters/strings while expanding a macro (')', ',', and '$(') +_macro_special_search = _re_search(r"\)|,|\$\(") + +# Special characters/strings while expanding a string (quotes, '\', and '$(') +_string_special_search = _re_search(r'"|\'|\\|\$\(') + +# Special characters/strings while expanding a symbol name. Also includes +# end-of-line, in case the macro is the last thing on the line. +_name_special_search = _re_search(r'[^A-Za-z0-9_$/.-]|\$\(|$') + +# A valid right-hand side for an assignment to a string symbol in a .config +# file, including escaped characters. Extracts the contents. +_conf_string_match = _re_match(r'"((?:[^\\"]|\\.)*)"') diff --git a/tools/default_image.c b/tools/default_image.c index 4b7d1ed..f7990e2 100644 --- a/tools/default_image.c +++ b/tools/default_image.c @@ -19,6 +19,7 @@ #include <image.h> #include <tee/optee.h> #include <u-boot/crc.h> +#include <imximage.h> static image_header_t header; @@ -106,7 +107,9 @@ static void image_set_header(void *ptr, struct stat *sbuf, int ifd, if (params->type == IH_TYPE_FIRMWARE_IVT) /* Add size of CSF minus IVT */ - imagesize = sbuf->st_size - sizeof(image_header_t) + 0x1FE0; + imagesize = sbuf->st_size - sizeof(image_header_t) + + 0x2060 - sizeof(flash_header_v2_t); + else imagesize = sbuf->st_size - sizeof(image_header_t); diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py index e9bbd15..4ff0bff 100755 --- a/tools/genboardscfg.py +++ b/tools/genboardscfg.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python2 +#!/usr/bin/env python3 # SPDX-License-Identifier: GPL-2.0+ # # Author: Masahiro Yamada <yamada.m@jp.panasonic.com> @@ -91,7 +91,7 @@ def output_is_new(output): # Detect a board that has been removed since the current board database # was generated - with open(output) as f: + with open(output, encoding="utf-8") as f: for line in f: if line[0] == '#' or line == '\n': continue @@ -118,12 +118,12 @@ class KconfigScanner: } def __init__(self): - """Scan all the Kconfig files and create a Config object.""" + """Scan all the Kconfig files and create a Kconfig object.""" # Define environment variables referenced from Kconfig os.environ['srctree'] = os.getcwd() os.environ['UBOOTVERSION'] = 'dummy' os.environ['KCONFIG_OBJDIR'] = '' - self._conf = kconfiglib.Config(print_warnings=False) + self._conf = kconfiglib.Kconfig(warn=False) def __del__(self): """Delete a leftover temporary file before exit. @@ -165,11 +165,7 @@ class KconfigScanner: else: f.write(line[colon + 1:]) - warnings = self._conf.load_config(self._tmpfile) - if warnings: - for warning in warnings: - print '%s: %s' % (defconfig, warning) - + self._conf.load_config(self._tmpfile) try_remove(self._tmpfile) self._tmpfile = None @@ -177,8 +173,8 @@ class KconfigScanner: # Get the value of CONFIG_SYS_ARCH, CONFIG_SYS_CPU, ... etc. # Set '-' if the value is empty. - for key, symbol in self._SYMBOL_TABLE.items(): - value = self._conf.get_symbol(symbol).get_value() + for key, symbol in list(self._SYMBOL_TABLE.items()): + value = self._conf.syms.get(symbol).str_value if value: params[key] = value else: @@ -242,8 +238,8 @@ def scan_defconfigs(jobs=1): processes = [] queues = [] for i in range(jobs): - defconfigs = all_defconfigs[total_boards * i / jobs : - total_boards * (i + 1) / jobs] + defconfigs = all_defconfigs[total_boards * i // jobs : + total_boards * (i + 1) // jobs] q = multiprocessing.Queue(maxsize=-1) p = multiprocessing.Process(target=scan_defconfigs_for_multiprocess, args=(q, defconfigs)) @@ -290,7 +286,7 @@ class MaintainersDatabase: 'Active', 'Orphan' or '-'. """ if not target in self.database: - print >> sys.stderr, "WARNING: no status info for '%s'" % target + print("WARNING: no status info for '%s'" % target, file=sys.stderr) return '-' tmp = self.database[target][0] @@ -301,8 +297,8 @@ class MaintainersDatabase: elif tmp.startswith('Orphan'): return 'Orphan' else: - print >> sys.stderr, ("WARNING: %s: unknown status for '%s'" % - (tmp, target)) + print(("WARNING: %s: unknown status for '%s'" % + (tmp, target)), file=sys.stderr) return '-' def get_maintainers(self, target): @@ -313,7 +309,7 @@ class MaintainersDatabase: they are separated with colons. """ if not target in self.database: - print >> sys.stderr, "WARNING: no maintainers for '%s'" % target + print("WARNING: no maintainers for '%s'" % target, file=sys.stderr) return '' return ':'.join(self.database[target][1]) @@ -330,7 +326,7 @@ class MaintainersDatabase: targets = [] maintainers = [] status = '-' - for line in open(file): + for line in open(file, encoding="utf-8"): # Check also commented maintainers if line[:3] == '#M:': line = line[1:] @@ -404,7 +400,7 @@ def format_and_output(params_list, output): # ignore case when sorting output_lines.sort(key=str.lower) - with open(output, 'w') as f: + with open(output, 'w', encoding="utf-8") as f: f.write(COMMENT_BLOCK + '\n'.join(output_lines) + '\n') def gen_boards_cfg(output, jobs=1, force=False): @@ -418,7 +414,7 @@ def gen_boards_cfg(output, jobs=1, force=False): check_top_directory() if not force and output_is_new(output): - print "%s is up to date. Nothing to do." % output + print("%s is up to date. Nothing to do." % output) sys.exit(0) params_list = scan_defconfigs(jobs) diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh index ec0881a..08a6a48 100755 --- a/tools/imx8m_image.sh +++ b/tools/imx8m_image.sh @@ -35,8 +35,9 @@ if [ $post_process = 1 ]; then objcopy -I binary -O binary --pad-to 0x8000 --gap-fill=0x0 $srctree/lpddr4_pmu_train_2d_imem.bin lpddr4_pmu_train_2d_imem_pad.bin cat lpddr4_pmu_train_1d_imem_pad.bin lpddr4_pmu_train_1d_dmem_pad.bin > lpddr4_pmu_train_1d_fw.bin cat lpddr4_pmu_train_2d_imem_pad.bin $srctree/lpddr4_pmu_train_2d_dmem.bin > lpddr4_pmu_train_2d_fw.bin - cat spl/u-boot-spl.bin lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin > spl/u-boot-spl-ddr.bin - rm -f lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin lpddr4_pmu_train_1d_imem_pad.bin lpddr4_pmu_train_1d_dmem_pad.bin lpddr4_pmu_train_2d_imem_pad.bin + dd if=spl/u-boot-spl.bin of=spl/u-boot-spl-pad.bin bs=4 conv=sync + cat spl/u-boot-spl-pad.bin lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin > spl/u-boot-spl-ddr.bin + rm -f lpddr4_pmu_train_1d_fw.bin lpddr4_pmu_train_2d_fw.bin lpddr4_pmu_train_1d_imem_pad.bin lpddr4_pmu_train_1d_dmem_pad.bin lpddr4_pmu_train_2d_imem_pad.bin spl/u-boot-spl-pad.bin fi fi diff --git a/tools/imx8mimage.c b/tools/imx8mimage.c index 50a256c..6c02337 100644 --- a/tools/imx8mimage.c +++ b/tools/imx8mimage.c @@ -99,8 +99,6 @@ static void parse_cfg_cmd(int32_t cmd, char *token, char *name, int lineno) break; case CMD_SIGNED_HDMI: signed_hdmi = token; - case CMD_FIT: - using_fit = 1; break; case CMD_DDR_FW: /* Do nothing */ @@ -120,6 +118,11 @@ static void parse_cfg_fld(int32_t *cmd, char *token, name, lineno, token); exit(EXIT_FAILURE); } + switch (*cmd) { + case CMD_FIT: + using_fit = 1; + break; + } break; case CFG_REG_SIZE: parse_cfg_cmd(*cmd, token, name, lineno); diff --git a/tools/logos/technexion.bmp b/tools/logos/technexion.bmp Binary files differnew file mode 100644 index 0000000..bccde2d --- /dev/null +++ b/tools/logos/technexion.bmp diff --git a/tools/moveconfig.py b/tools/moveconfig.py index 0bbc7c1..b99417e 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -851,7 +851,7 @@ class KconfigScanner: os.environ['srctree'] = os.getcwd() os.environ['UBOOTVERSION'] = 'dummy' os.environ['KCONFIG_OBJDIR'] = '' - self.conf = kconfiglib.Config() + self.conf = kconfiglib.Kconfig() class KconfigParser: @@ -1525,7 +1525,7 @@ def find_kconfig_rules(kconf, config, imply_config): """Check whether a config has a 'select' or 'imply' keyword Args: - kconf: Kconfig.Config object + kconf: Kconfiglib.Kconfig object config: Name of config to check (without CONFIG_ prefix) imply_config: Implying config (without CONFIG_ prefix) which may or may not have an 'imply' for 'config') @@ -1533,7 +1533,7 @@ def find_kconfig_rules(kconf, config, imply_config): Returns: Symbol object for 'config' if found, else None """ - sym = kconf.get_symbol(imply_config) + sym = kconf.syms.get(imply_config) if sym: for sel in sym.get_selected_symbols() | sym.get_implied_symbols(): if sel.get_name() == config: @@ -1547,7 +1547,7 @@ def check_imply_rule(kconf, config, imply_config): to add an 'imply' for 'config' to that part of the Kconfig. Args: - kconf: Kconfig.Config object + kconf: Kconfiglib.Kconfig object config: Name of config to check (without CONFIG_ prefix) imply_config: Implying config (without CONFIG_ prefix) which may or may not have an 'imply' for 'config') @@ -1558,7 +1558,7 @@ def check_imply_rule(kconf, config, imply_config): line number within the Kconfig file, or 0 if none message indicating the result """ - sym = kconf.get_symbol(imply_config) + sym = kconf.syms.get(imply_config) if not sym: return 'cannot find sym' locs = sym.get_def_locations() @@ -1784,7 +1784,7 @@ def do_imply_config(config_list, add_imply, imply_flags, skip_added, if skip_added: show = False else: - sym = kconf.get_symbol(iconfig[CONFIG_LEN:]) + sym = kconf.syms.get(iconfig[CONFIG_LEN:]) fname = '' if sym: locs = sym.get_def_locations() diff --git a/tools/spl_size_limit.c b/tools/spl_size_limit.c index 98ff491..c6c139e 100644 --- a/tools/spl_size_limit.c +++ b/tools/spl_size_limit.c @@ -14,6 +14,9 @@ int main(int argc, char *argv[]) #ifdef CONFIG_SPL_SIZE_LIMIT spl_size_limit = CONFIG_SPL_SIZE_LIMIT; +#if defined(CONFIG_IMX_HAB) && defined(CONFIG_CSF_SIZE) + spl_size_limit -= CONFIG_CSF_SIZE; +#endif #ifdef CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD spl_size_limit -= GENERATED_GBL_DATA_SIZE; #endif |
