diff options
59 files changed, 492 insertions, 442 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ae911d6..f7f0383 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1813,7 +1813,6 @@ config ARCH_STM32 select CPU_V7M select DM select DM_SERIAL - select GPIO_EXTRA_HEADER imply CMD_DM config ARCH_STI @@ -1839,7 +1838,6 @@ config ARCH_STM32MP select DM_GPIO select DM_RESET select DM_SERIAL - select GPIO_EXTRA_HEADER select MISC select OF_CONTROL select OF_LIBFDT diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi index 43a7909..db23d80 100644 --- a/arch/arm/dts/stm32mp15-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15-u-boot.dtsi @@ -21,6 +21,10 @@ pinctrl1 = &pinctrl_z; }; + binman: binman { + multiple-images; + }; + clocks { u-boot,dm-pre-reloc; }; @@ -228,3 +232,28 @@ resets = <&rcc UART8_R>; }; +#if defined(CONFIG_STM32MP15x_STM32IMAGE) +&binman { + u-boot-stm32 { + filename = "u-boot.stm32"; + mkimage { + args = "-T stm32image -a 0xC0100000 -e 0xC0100000"; + u-boot { + }; + }; + }; +}; +#endif + +#if defined(CONFIG_SPL) +&binman { + spl-stm32 { + filename = "u-boot-spl.stm32"; + mkimage { + args = "-T stm32image -a 0x2FFC2500 -e 0x2FFC2500"; + u-boot-spl { + }; + }; + }; +}; +#endif diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index 6e89f88..f62b46b 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -321,8 +321,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi index 11bc247..71b0486 100644 --- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi @@ -50,15 +50,6 @@ }; }; -&gpiof { - snor-nwp { - gpio-hog; - gpios = <7 0>; - output-high; - line-name = "spi-nor-nwp"; - }; -}; - &i2c4 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi index 9d3db20..502cd95 100644 --- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi +++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi @@ -25,15 +25,6 @@ u-boot,dm-spl; }; -&gpiof { - snor-nwp { - gpio-hog; - gpios = <7 0>; - output-high; - line-name = "spi-nor-nwp"; - }; -}; - &i2c4 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 68987f6..8fc93b0 100644 --- a/arch/arm/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi @@ -228,15 +228,15 @@ cs42l51_tx_endpoint: endpoint@0 { reg = <0>; remote-endpoint = <&sai2a_endpoint>; - frame-master; - bitclock-master; + frame-master = <&cs42l51_tx_endpoint>; + bitclock-master = <&cs42l51_tx_endpoint>; }; cs42l51_rx_endpoint: endpoint@1 { reg = <1>; remote-endpoint = <&sai2b_endpoint>; - frame-master; - bitclock-master; + frame-master = <&cs42l51_rx_endpoint>; + bitclock-master = <&cs42l51_rx_endpoint>; }; }; }; @@ -478,8 +478,8 @@ &m4_rproc { memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>, <&vdev0vring1>, <&vdev0buffer>; - mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>; - mbox-names = "vq0", "vq1", "shutdown"; + mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>; + mbox-names = "vq0", "vq1", "shutdown", "detach"; interrupt-parent = <&exti>; interrupts = <68 1>; status = "okay"; diff --git a/arch/arm/include/asm/arch-stm32f4/gpio.h b/arch/arm/include/asm/arch-stm32f4/gpio.h deleted file mode 100644 index 490f686..0000000 --- a/arch/arm/include/asm/arch-stm32f4/gpio.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2011 - * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com - * - * (C) Copyright 2015 - * Kamil Lulko, <kamil.lulko@gmail.com> - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ - -#include <asm/arch-stm32/gpio.h> - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h deleted file mode 100644 index 21f4e0f..0000000 --- a/arch/arm/include/asm/arch-stm32f7/gpio.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2016, STMicroelectronics - All Rights Reserved - * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ - -#include <asm/arch-stm32/gpio.h> - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/include/asm/arch-stm32h7/gpio.h b/arch/arm/include/asm/arch-stm32h7/gpio.h deleted file mode 100644 index 4f57f17..0000000 --- a/arch/arm/include/asm/arch-stm32h7/gpio.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017, STMicroelectronics - All Rights Reserved - * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics. - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ - -#include <asm/arch-stm32/gpio.h> - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/arm/mach-exynos/mmu-arm64.c b/arch/arm/mach-exynos/mmu-arm64.c index e3bd995..d2c550b 100644 --- a/arch/arm/mach-exynos/mmu-arm64.c +++ b/arch/arm/mach-exynos/mmu-arm64.c @@ -7,7 +7,8 @@ #include <common.h> #include <asm/armv8/mmu.h> -#ifdef CONFIG_EXYNOS7420 +#if CONFIG_IS_ENABLED(EXYNOS7420) + static struct mm_region exynos7420_mem_map[] = { { .virt = 0x10000000UL, @@ -28,9 +29,9 @@ static struct mm_region exynos7420_mem_map[] = { }; struct mm_region *mem_map = exynos7420_mem_map; -#endif -#ifdef CONFIG_EXYNOS7870 +#elif CONFIG_IS_ENABLED(EXYNOS7870) + static struct mm_region exynos7870_mem_map[] = { { .virt = 0x10000000UL, @@ -61,9 +62,9 @@ static struct mm_region exynos7870_mem_map[] = { }; struct mm_region *mem_map = exynos7870_mem_map; -#endif -#ifdef CONFIG_EXYNOS7880 +#elif CONFIG_IS_ENABLED(EXYNOS7880) + static struct mm_region exynos7880_mem_map[] = { { .virt = 0x10000000UL, diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig index 69d56c2..a6c7fc5 100644 --- a/arch/arm/mach-stm32mp/Kconfig +++ b/arch/arm/mach-stm32mp/Kconfig @@ -35,10 +35,10 @@ config ENV_SIZE config STM32MP15x bool "Support STMicroelectronics STM32MP15x Soc" - select ARCH_SUPPORT_PSCI if !TFABOOT - select ARM_SMCCC if TFABOOT + select ARCH_SUPPORT_PSCI + select BINMAN select CPU_V7A - select CPU_V7_HAS_NONSEC if !TFABOOT + select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT select OF_BOARD_SETUP select PINCTRL_STM32 @@ -47,8 +47,6 @@ config STM32MP15x select STM32_SERIAL select SYS_ARCH_TIMER imply CMD_NVEDIT_INFO - imply SYSRESET_PSCI if TFABOOT - imply SYSRESET_SYSCON if !TFABOOT help support of STMicroelectronics SOC STM32MP15x family STM32MP157, STM32MP153 or STM32MP151 @@ -153,7 +151,6 @@ config NR_DRAM_BANKS config DDR_CACHEABLE_SIZE hex "Size of the DDR marked cacheable in pre-reloc stage" - default 0x10000000 if TFABOOT default 0x40000000 help Define the size of the DDR marked as cacheable in U-Boot diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c index fe39bd8..27d1829 100644 --- a/arch/arm/mach-stm32mp/bsec.c +++ b/arch/arm/mach-stm32mp/bsec.c @@ -295,7 +295,7 @@ static int stm32mp_bsec_read_otp(struct udevice *dev, u32 *val, u32 otp) u32 tmp_data = 0; int ret; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_OTP, otp, 0, val); @@ -326,7 +326,7 @@ static int stm32mp_bsec_read_shadow(struct udevice *dev, u32 *val, u32 otp) { struct stm32mp_bsec_plat *plat; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc(STM32_SMC_BSEC, STM32_SMC_READ_SHADOW, otp, 0, val); @@ -350,7 +350,7 @@ static int stm32mp_bsec_write_otp(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_PROG_OTP, otp, val); @@ -365,7 +365,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) { struct stm32mp_bsec_plat *plat; - if (IS_ENABLED(CONFIG_TFABOOT)) + if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD)) return stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_WRITE_SHADOW, otp, val); @@ -377,7 +377,7 @@ static int stm32mp_bsec_write_shadow(struct udevice *dev, u32 val, u32 otp) static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp) { - if (!IS_ENABLED(CONFIG_TFABOOT)) + if (!IS_ENABLED(CONFIG_ARM_SMCCC) || IS_ENABLED(CONFIG_SPL_BUILD)) return -ENOTSUPP; if (val == 1) @@ -503,10 +503,9 @@ static int stm32mp_bsec_probe(struct udevice *dev) /* * update unlocked shadow for OTP cleared by the rom code - * only executed in U-Boot proper when TF-A is not used + * only executed in SPL, it is done in TF-A for TFABOOT */ - - if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) { + if (IS_ENABLED(CONFIG_SPL_BUILD)) { plat = dev_get_plat(dev); for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++) diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig index f4c0d18..dd166a1 100644 --- a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig +++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig @@ -1,4 +1,3 @@ - config CMD_STM32PROG bool "command stm32prog for STM32CudeProgrammer" select DFU @@ -31,4 +30,4 @@ config CMD_STM32PROG_SERIAL help activate the command "stm32prog serial" for STM32MP soc family with the tools STM32CubeProgrammer using U-Boot serial device - and UART protocol.
\ No newline at end of file + and UART protocol. diff --git a/arch/arm/mach-stm32mp/config.mk b/arch/arm/mach-stm32mp/config.mk deleted file mode 100644 index f7f5b77..0000000 --- a/arch/arm/mach-stm32mp/config.mk +++ /dev/null @@ -1,29 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause -# -# Copyright (C) 2018, STMicroelectronics - All Rights Reserved -# - -ifndef CONFIG_SPL -INPUTS-$(CONFIG_STM32MP15x_STM32IMAGE) += u-boot.stm32 -else -ifdef CONFIG_SPL_BUILD -INPUTS-y += u-boot-spl.stm32 -endif -endif - -MKIMAGEFLAGS_u-boot.stm32 = -T stm32image -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) - -u-boot.stm32: MKIMAGEOUTPUT = u-boot.stm32.log - -u-boot.stm32: u-boot.bin FORCE - $(call if_changed,mkimage) - -MKIMAGEFLAGS_u-boot-spl.stm32 = -T stm32image -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE) - -spl/u-boot-spl.stm32: MKIMAGEOUTPUT = spl/u-boot-spl.stm32.log - -spl/u-boot-spl.stm32: spl/u-boot-spl.bin FORCE - $(call if_changed,mkimage) - -u-boot-spl.stm32 : spl/u-boot-spl.stm32 - $(call if_changed,copy) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index eb79f3f..325d710 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -93,8 +93,6 @@ u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000); struct lmb lmb; -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT static void security_init(void) { /* Disable the backup domain write protection */ @@ -154,7 +152,6 @@ static void security_init(void) writel(BIT(0), RCC_MP_AHB5ENSETR); writel(0x0, GPIOZ_SECCFGR); } -#endif /* CONFIG_TFABOOT */ /* * Debug init @@ -166,7 +163,7 @@ static void dbgmcu_init(void) * done in TF-A for TRUSTED boot and * DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE */ - if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) { + if (bsec_dbgswenable()) { setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2); } @@ -174,12 +171,17 @@ static void dbgmcu_init(void) void spl_board_init(void) { + struct udevice *dev; + int ret; + dbgmcu_init(); + + /* force probe of BSEC driver to shadow the upper OTP */ + ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev); + if (ret) + log_warning("BSEC probe failed: %d\n", ret); } -#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */ -#if !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* get bootmode from ROM code boot context: saved in TAMP register */ static void update_bootmode(void) { @@ -205,7 +207,6 @@ static void update_bootmode(void) TAMP_BOOT_MODE_MASK, boot_mode << TAMP_BOOT_MODE_SHIFT); } -#endif u32 get_bootmode(void) { @@ -283,29 +284,26 @@ int arch_cpu_init(void) /* early armv7 timer init: needed for polling */ timer_init(); -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) -#ifndef CONFIG_TFABOOT - security_init(); - update_bootmode(); -#endif - /* Reset Coprocessor state unless it wakes up from Standby power mode */ - if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { - writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); - writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + if (IS_ENABLED(CONFIG_SPL_BUILD)) { + security_init(); + update_bootmode(); + } +/* reset copro state in SPL, when used, or in U-Boot */ + if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) { + /* Reset Coprocessor state unless it wakes up from Standby power mode */ + if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) { + writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE); + writel(0, TAMP_COPRO_RSC_TBL_ADDRESS); + } } -#endif boot_mode = get_bootmode(); if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) && (boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART) gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; -#if defined(CONFIG_DEBUG_UART) && \ - !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) - else + else if (IS_ENABLED(CONFIG_DEBUG_UART) && IS_ENABLED(CONFIG_SPL_BUILD)) debug_uart_init(); -#endif return 0; } @@ -459,7 +457,7 @@ void get_soc_name(char name[SOC_NAME_SIZE]) soc_type[type], soc_pkg[pkg], soc_rev[rev]); } -#if defined(CONFIG_DISPLAY_CPUINFO) +/* used when CONFIG_DISPLAY_CPUINFO is activated */ int print_cpuinfo(void) { char name[SOC_NAME_SIZE]; @@ -469,7 +467,6 @@ int print_cpuinfo(void) return 0; } -#endif /* CONFIG_DISPLAY_CPUINFO */ static void setup_boot_mode(void) { @@ -599,13 +596,15 @@ static void setup_boot_mode(void) */ __weak int setup_mac_address(void) { -#if defined(CONFIG_NET) int ret; int i; u32 otp[2]; uchar enetaddr[6]; struct udevice *dev; + if (!IS_ENABLED(CONFIG_NET)) + return 0; + /* MAC already in environment */ if (eth_env_get_enetaddr("ethaddr", enetaddr)) return 0; @@ -632,7 +631,6 @@ __weak int setup_mac_address(void) ret = eth_env_set_enetaddr("ethaddr", enetaddr); if (ret) log_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret); -#endif return 0; } diff --git a/arch/arm/mach-stm32mp/include/mach/gpio.h b/arch/arm/mach-stm32mp/include/mach/gpio.h deleted file mode 100644 index 7a0f293..0000000 --- a/arch/arm/mach-stm32mp/include/mach/gpio.h +++ /dev/null @@ -1,87 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2016 - * Vikas Manocha, <vikas.manocha@st.com> - */ - -#ifndef _STM32_GPIO_H_ -#define _STM32_GPIO_H_ -#include <asm/gpio.h> - -enum stm32_gpio_mode { - STM32_GPIO_MODE_IN = 0, - STM32_GPIO_MODE_OUT, - STM32_GPIO_MODE_AF, - STM32_GPIO_MODE_AN -}; - -enum stm32_gpio_otype { - STM32_GPIO_OTYPE_PP = 0, - STM32_GPIO_OTYPE_OD -}; - -enum stm32_gpio_speed { - STM32_GPIO_SPEED_2M = 0, - STM32_GPIO_SPEED_25M, - STM32_GPIO_SPEED_50M, - STM32_GPIO_SPEED_100M -}; - -enum stm32_gpio_pupd { - STM32_GPIO_PUPD_NO = 0, - STM32_GPIO_PUPD_UP, - STM32_GPIO_PUPD_DOWN -}; - -enum stm32_gpio_af { - STM32_GPIO_AF0 = 0, - STM32_GPIO_AF1, - STM32_GPIO_AF2, - STM32_GPIO_AF3, - STM32_GPIO_AF4, - STM32_GPIO_AF5, - STM32_GPIO_AF6, - STM32_GPIO_AF7, - STM32_GPIO_AF8, - STM32_GPIO_AF9, - STM32_GPIO_AF10, - STM32_GPIO_AF11, - STM32_GPIO_AF12, - STM32_GPIO_AF13, - STM32_GPIO_AF14, - STM32_GPIO_AF15 -}; - -struct stm32_gpio_dsc { - u8 port; - u8 pin; -}; - -struct stm32_gpio_ctl { - enum stm32_gpio_mode mode; - enum stm32_gpio_otype otype; - enum stm32_gpio_speed speed; - enum stm32_gpio_pupd pupd; - enum stm32_gpio_af af; -}; - -struct stm32_gpio_regs { - u32 moder; /* GPIO port mode */ - u32 otyper; /* GPIO port output type */ - u32 ospeedr; /* GPIO port output speed */ - u32 pupdr; /* GPIO port pull-up/pull-down */ - u32 idr; /* GPIO port input data */ - u32 odr; /* GPIO port output data */ - u32 bsrr; /* GPIO port bit set/reset */ - u32 lckr; /* GPIO port configuration lock */ - u32 afr[2]; /* GPIO alternate function */ -}; - -struct stm32_gpio_priv { - struct stm32_gpio_regs *regs; - unsigned int gpio_range; -}; - -int stm32_offset_to_index(struct udevice *dev, unsigned int offset); - -#endif /* _STM32_GPIO_H_ */ diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 3540773..fc39bb2 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -64,6 +64,10 @@ static inline phys_addr_t map_to_sysmem(const void *ptr) #define __raw_readl(a) __arch_getl(a) #define __raw_readq(a) __arch_getq(a) +/* adding for cadence_qspi_apb.c */ +#define memcpy_fromio(a, c, l) memcpy((a), (c), (l)) +#define memcpy_toio(c, a, l) memcpy((c), (a), (l)) + #define dmb() mb() #define __iormb() rmb() #define __iowmb() wmb() diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 5030892..bfcd204 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -152,6 +152,7 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, void sbi_set_timer(uint64_t stime_value); long sbi_get_spec_version(void); int sbi_get_impl_id(void); +int sbi_get_impl_version(long *version); int sbi_probe_extension(int ext); void sbi_srst_reset(unsigned long type, unsigned long reason); diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c index 2b53896..d427d1b 100644 --- a/arch/riscv/lib/sbi.c +++ b/arch/riscv/lib/sbi.c @@ -90,6 +90,25 @@ int sbi_get_impl_id(void) } /** + * sbi_get_impl_version() - get SBI implementation version + * + * @version: pointer to receive version + * Return: 0 on success, -ENOTSUPP otherwise + */ +int sbi_get_impl_version(long *version) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_GET_IMP_VERSION, + 0, 0, 0, 0, 0, 0); + if (ret.error) + return -ENOTSUPP; + if (version) + *version = ret.value; + return 0; +} + +/** * sbi_probe_extension() - Check if an SBI extension ID is supported or not. * @extid: The extension ID to be probed. * diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 5fb32fd..d6a4291 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -57,9 +57,9 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) void *board_fdt_blob_setup(int *err) { *err = 0; -#if CONFIG_IS_ENABLED(OF_BOARD) +#if defined(CONFIG_OF_BOARD) return (void *)(ulong)gd->arch.firmware_fdt_addr; -#elif CONFIG_IS_ENABLED(OF_SEPARATE) +#elif defined(CONFIG_OF_SEPARATE) return (void *)CONFIG_SYS_FDT_BASE; #else *err = -EINVAL; diff --git a/board/dhelectronics/dh_stm32mp1/Kconfig b/board/dhelectronics/dh_stm32mp1/Kconfig index 1fc792c..dc707c2 100644 --- a/board/dhelectronics/dh_stm32mp1/Kconfig +++ b/board/dhelectronics/dh_stm32mp1/Kconfig @@ -7,7 +7,7 @@ config SYS_VENDOR default "dhelectronics" config SYS_CONFIG_NAME - default "dh_stm32mp1" + default "stm32mp15_dh_dhsom" config ENV_SECT_SIZE default 0x10000 if ENV_IS_IN_SPI_FLASH diff --git a/board/dhelectronics/dh_stm32mp1/MAINTAINERS b/board/dhelectronics/dh_stm32mp1/MAINTAINERS index 9ce21c3..865588f 100644 --- a/board/dhelectronics/dh_stm32mp1/MAINTAINERS +++ b/board/dhelectronics/dh_stm32mp1/MAINTAINERS @@ -6,4 +6,4 @@ F: arch/arm/dts/stm32mp15xx-dhcom* F: board/dhelectronics/dh_stm32mp1/ F: configs/stm32mp15_dhcom_basic_defconfig F: configs/stm32mp15_dhcor_basic_defconfig -F: include/configs/stm32mp1.h +F: include/configs/stm32mp15_dh_dhsom.h diff --git a/board/dhelectronics/dh_stm32mp1/Makefile b/board/dhelectronics/dh_stm32mp1/Makefile index b368b39..30db1de 100644 --- a/board/dhelectronics/dh_stm32mp1/Makefile +++ b/board/dhelectronics/dh_stm32mp1/Makefile @@ -5,5 +5,4 @@ obj-y += ../../st/common/stpmic1.o board.o -obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += ../../st/common/stm32mp_mtdparts.o obj-$(CONFIG_SET_DFU_ALT_INFO) += ../../st/common/stm32mp_dfu.o diff --git a/board/engicam/stm32mp1/Kconfig b/board/engicam/stm32mp1/Kconfig index c800fd4..3802d44 100644 --- a/board/engicam/stm32mp1/Kconfig +++ b/board/engicam/stm32mp1/Kconfig @@ -7,6 +7,6 @@ config SYS_VENDOR default "engicam" config SYS_CONFIG_NAME - default "stm32mp1" + default "stm32mp15_common" endif diff --git a/board/samsung/espresso7420/Kconfig b/board/samsung/espresso7420/Kconfig index 62251c5..6a088a2 100644 --- a/board/samsung/espresso7420/Kconfig +++ b/board/samsung/espresso7420/Kconfig @@ -1,5 +1,8 @@ if TARGET_ESPRESSO7420 +config EXYNOS7420 + def_bool y + config SYS_BOARD default "espresso7420" help diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c index 08c2102..95d83e7 100644 --- a/board/st/stm32f746-disco/stm32f746-disco.c +++ b/board/st/stm32f746-disco/stm32f746-disco.c @@ -21,7 +21,6 @@ #include <asm/io.h> #include <asm/armv7m.h> #include <asm/arch/stm32.h> -#include <asm/arch/gpio.h> #include <asm/arch/syscfg.h> #include <asm/gpio.h> #include <linux/delay.h> diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig index c5ab755..89e97ae 100644 --- a/board/st/stm32mp1/Kconfig +++ b/board/st/stm32mp1/Kconfig @@ -7,7 +7,7 @@ config SYS_VENDOR default "st" config SYS_CONFIG_NAME - default "stm32mp1" + default "stm32mp15_st_common" source "board/st/common/Kconfig" endif diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS index 0e6d80f..6451195 100644 --- a/board/st/stm32mp1/MAINTAINERS +++ b/board/st/stm32mp1/MAINTAINERS @@ -8,4 +8,5 @@ F: board/st/stm32mp1/ F: configs/stm32mp15_defconfig F: configs/stm32mp15_basic_defconfig F: configs/stm32mp15_trusted_defconfig -F: include/configs/stm32mp1.h +F: include/configs/stm32mp15_common.h +F: include/configs/stm32mp15_st_common.h diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index 2c2faad..8459267 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -658,7 +658,11 @@ int board_init(void) if (IS_ENABLED(CONFIG_DM_REGULATOR)) regulators_enable_boot_on(_DEBUG); - if (!IS_ENABLED(CONFIG_TFABOOT)) + /* + * sysconf initialisation done only when U-Boot is running in secure + * done in TF-A for TFABOOT. + */ + if (IS_ENABLED(CONFIG_ARMV7_NONSEC)) sysconf_init(); if (CONFIG_IS_ENABLED(LED)) diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c index 65a2c93..c4a9c84 100644 --- a/cmd/riscv/sbi.c +++ b/cmd/riscv/sbi.c @@ -49,24 +49,34 @@ static struct sbi_ext extensions[] = { static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { - int i; + int i, impl_id; long ret; ret = sbi_get_spec_version(); if (ret >= 0) - printf("SBI %ld.%ld\n", ret >> 24, ret & 0xffffff); - ret = sbi_get_impl_id(); - if (ret >= 0) { + printf("SBI %ld.%ld", ret >> 24, ret & 0xffffff); + impl_id = sbi_get_impl_id(); + if (impl_id >= 0) { for (i = 0; i < ARRAY_SIZE(implementations); ++i) { - if (ret == implementations[i].id) { - printf("%s\n", implementations[i].name); + if (impl_id == implementations[i].id) { + long vers; + + printf("\n%s ", implementations[i].name); + ret = sbi_get_impl_version(&vers); + if (ret < 0) + break; + if (impl_id == 1) + printf("%ld.%ld", + vers >> 16, vers & 0xffff); + else + printf("0x%lx", vers); break; } } if (i == ARRAY_SIZE(implementations)) - printf("Unknown implementation ID %ld\n", ret); + printf("Unknown implementation ID %ld", ret); } - printf("Extensions:\n"); + printf("\nExtensions:\n"); for (i = 0; i < ARRAY_SIZE(extensions); ++i) { ret = sbi_probe_extension(extensions[i].id); if (ret > 0) diff --git a/common/image-board.c b/common/image-board.c index e766035..ddf30c6 100644 --- a/common/image-board.c +++ b/common/image-board.c @@ -898,7 +898,7 @@ int boot_get_kbd(struct lmb *lmb, struct bd_info **kbd) debug("## kernel board info at 0x%08lx\n", (ulong)*kbd); #if defined(DEBUG) - if (IS_ENABLED(CONFIG_CMD_BDI) + if (IS_ENABLED(CONFIG_CMD_BDI)) do_bdinfo(NULL, 0, 0, NULL); #endif diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 14bf6d1..adb8f10 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -73,7 +73,9 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_LZO=y CONFIG_ERRNO_STR=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 648ecbf..dca35db 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -73,7 +73,9 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_LZO=y CONFIG_ERRNO_STR=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index f422ffb..aa6a28e 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -73,7 +73,9 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_LZO=y CONFIG_ERRNO_STR=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 244d9cc..9abd1a1 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -73,7 +73,9 @@ CONFIG_REMOTEPROC_STM32_COPRO=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y +CONFIG_SYSRESET_SYSCON=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_LZO=y CONFIG_ERRNO_STR=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 77ed82c..2cc26d4 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -147,6 +147,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y @@ -170,6 +171,7 @@ CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_ERRNO_STR=y CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_LMB_USE_MAX_REGIONS is not set diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 701b151..4c6a52f 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -8,10 +8,12 @@ CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -126,6 +128,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set @@ -152,6 +155,7 @@ CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_ERRNO_STR=y CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_LMB_USE_MAX_REGIONS is not set diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 5b85f6a..013ba2d 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -22,6 +22,7 @@ CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its" # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y @@ -53,7 +54,6 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y @@ -61,7 +61,11 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=nor0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k(env1),64k(env2)" # CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_OF_LIST="stm32mp15xx-dhcom-pdk2 stm32mp15xx-dhcom-drc02 stm32mp15xx-dhcom-picoitx" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y @@ -70,7 +74,7 @@ CONFIG_ENV_SPI_BUS=0 CONFIG_USE_ENV_SPI_CS=y CONFIG_ENV_SPI_CS=0 CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=10000000 +CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -81,6 +85,7 @@ CONFIG_TFTP_BLOCKSIZE=1536 CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y CONFIG_DFU_MMC=y +CONFIG_DFU_MTD=y CONFIG_DFU_RAM=y CONFIG_DFU_VIRT=y CONFIG_SET_DFU_ALT_INFO=y @@ -98,8 +103,10 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x50 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y CONFIG_MTD=y -CONFIG_SYS_MTDPARTS_RUNTIME=y +CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y @@ -129,6 +136,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y @@ -141,17 +149,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_DM_VIDEO=y -CONFIG_BACKLIGHT_GPIO=y -CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y -CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y -CONFIG_VIDEO_STM32=y -CONFIG_VIDEO_STM32_DSI=y -CONFIG_VIDEO_STM32_MAX_XRES=1280 -CONFIG_VIDEO_STM32_MAX_YRES=800 -CONFIG_VIDEO_BMP_RLE8=y -CONFIG_BMP_16BPP=y -CONFIG_BMP_24BPP=y -CONFIG_BMP_32BPP=y +# CONFIG_BINMAN_FDT is not set +CONFIG_FAT_WRITE=y CONFIG_LZO=y CONFIG_FDT_FIXUP_PARTITIONS=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 37dd275..18aaf94 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its" # CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" +CONFIG_CONSOLE_MUX=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y @@ -51,7 +52,6 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y @@ -59,7 +59,11 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y +CONFIG_MTDIDS_DEFAULT="nor0=nor0" +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k(env1),64k(env2)" # CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_ISO_PARTITION is not set +# CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_USE_ENV_SPI_BUS=y @@ -67,7 +71,7 @@ CONFIG_ENV_SPI_BUS=0 CONFIG_USE_ENV_SPI_CS=y CONFIG_ENV_SPI_CS=0 CONFIG_USE_ENV_SPI_MAX_HZ=y -CONFIG_ENV_SPI_MAX_HZ=10000000 +CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_USE_ENV_SPI_MODE=y CONFIG_ENV_SPI_MODE=0x0 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y @@ -79,6 +83,7 @@ CONFIG_STM32_ADC=y CONFIG_SPL_BLOCK_CACHE=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y +CONFIG_DFU_MTD=y CONFIG_DFU_VIRT=y CONFIG_GPIO_HOG=y CONFIG_DM_HWSPINLOCK=y @@ -94,7 +99,10 @@ CONFIG_SYS_I2C_EEPROM_ADDR=0x53 CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y CONFIG_MTD=y +CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_SPEED=50000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y @@ -123,6 +131,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_SYSCON=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y CONFIG_USB_EHCI_HCD=y @@ -135,17 +144,8 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0483 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 CONFIG_USB_GADGET_DWC2_OTG=y CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_DM_VIDEO=y -CONFIG_BACKLIGHT_GPIO=y -CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y -CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y -CONFIG_VIDEO_STM32=y -CONFIG_VIDEO_STM32_DSI=y -CONFIG_VIDEO_STM32_MAX_XRES=1280 -CONFIG_VIDEO_STM32_MAX_YRES=800 -CONFIG_VIDEO_BMP_RLE8=y -CONFIG_BMP_16BPP=y -CONFIG_BMP_24BPP=y -CONFIG_BMP_32BPP=y +CONFIG_FAT_WRITE=y +# CONFIG_BINMAN_FDT is not set CONFIG_LZO=y CONFIG_FDT_FIXUP_PARTITIONS=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index b4ed090..feca26e 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -9,10 +9,12 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_STM32MP15x_STM32IMAGE=y CONFIG_TARGET_ST_STM32MP15x=y +CONFIG_DDR_CACHEABLE_SIZE=0x10000000 CONFIG_CMD_STM32KEY=y CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y +# CONFIG_ARMV7_NONSEC is not set CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y @@ -127,6 +129,7 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y +CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set @@ -153,6 +156,7 @@ CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y CONFIG_WDT=y CONFIG_WDT_STM32MP=y +# CONFIG_BINMAN_FDT is not set CONFIG_ERRNO_STR=y CONFIG_FDT_FIXUP_PARTITIONS=y # CONFIG_LMB_USE_MAX_REGIONS is not set diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 114192b..83ab6b7 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -27,12 +27,10 @@ DECLARE_GLOBAL_DATA_PTR; -#ifndef CONFIG_TFABOOT -#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) +#if defined(CONFIG_SPL_BUILD) /* activate clock tree initialization in the driver */ #define STM32MP1_CLOCK_TREE_INIT #endif -#endif #define MAX_HSI_HZ 64000000 diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c index 125c237..8667ed3 100644 --- a/drivers/gpio/stm32_gpio.c +++ b/drivers/gpio/stm32_gpio.c @@ -11,7 +11,6 @@ #include <dm.h> #include <fdtdec.h> #include <log.h> -#include <asm/arch/gpio.h> #include <asm/arch/stm32.h> #include <asm/gpio.h> #include <asm/io.h> @@ -20,6 +19,8 @@ #include <linux/errno.h> #include <linux/io.h> +#include "stm32_gpio_priv.h" + #define STM32_GPIOS_PER_BANK 16 #define MODE_BITS(gpio_pin) ((gpio_pin) * 2) diff --git a/arch/arm/include/asm/arch-stm32/gpio.h b/drivers/gpio/stm32_gpio_priv.h index 233ce27..d3d8f2e 100644 --- a/arch/arm/include/asm/arch-stm32/gpio.h +++ b/drivers/gpio/stm32_gpio_priv.h @@ -4,8 +4,8 @@ * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. */ -#ifndef _GPIO_H_ -#define _GPIO_H_ +#ifndef _STM32_GPIO_PRIV_H_ +#define _STM32_GPIO_PRIV_H_ enum stm32_gpio_mode { STM32_GPIO_MODE_IN = 0, @@ -83,4 +83,4 @@ struct stm32_gpio_priv { int stm32_offset_to_index(struct udevice *dev, unsigned int offset); -#endif /* _GPIO_H_ */ +#endif /* _STM32_GPIO_PRIV_H_ */ diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index c575e94..14cd82d 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -97,7 +97,6 @@ struct mvebu_pcie { * and 64K of I/O space when registered. */ static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE; -#define PCIE_MEM_SIZE (128 << 20) static void __iomem *mvebu_pcie_iobase = (void __iomem *)MBUS_PCI_IO_BASE; static inline bool mvebu_pcie_link_up(struct mvebu_pcie *pcie) @@ -433,14 +432,14 @@ static int mvebu_pcie_probe(struct udevice *dev) mvebu_pcie_set_local_dev_nr(pcie, 1); pcie->mem.start = (u32)mvebu_pcie_membase; - pcie->mem.end = pcie->mem.start + PCIE_MEM_SIZE - 1; - mvebu_pcie_membase += PCIE_MEM_SIZE; + pcie->mem.end = pcie->mem.start + MBUS_PCI_MEM_SIZE - 1; + mvebu_pcie_membase += MBUS_PCI_MEM_SIZE; if (mvebu_mbus_add_window_by_id(pcie->mem_target, pcie->mem_attr, (phys_addr_t)pcie->mem.start, - PCIE_MEM_SIZE)) { + MBUS_PCI_MEM_SIZE)) { printf("PCIe unable to add mbus window for mem at %08x+%08x\n", - (u32)pcie->mem.start, PCIE_MEM_SIZE); + (u32)pcie->mem.start, MBUS_PCI_MEM_SIZE); } pcie->io.start = (u32)mvebu_pcie_iobase; @@ -459,7 +458,7 @@ static int mvebu_pcie_probe(struct udevice *dev) /* PCI memory space */ pci_set_region(hose->regions + 0, pcie->mem.start, - pcie->mem.start, PCIE_MEM_SIZE, PCI_REGION_MEM); + pcie->mem.start, MBUS_PCI_MEM_SIZE, PCI_REGION_MEM); pci_set_region(hose->regions + 1, 0, 0, gd->ram_size, diff --git a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c index 01e9a4f..1b696fd 100644 --- a/drivers/pinctrl/exynos/pinctrl-exynos78x0.c +++ b/drivers/pinctrl/exynos/pinctrl-exynos78x0.c @@ -19,12 +19,12 @@ #include <asm/arch/pinmux.h> #include "pinctrl-exynos.h" -static struct pinctrl_ops exynos78x0_pinctrl_ops = { +static const struct pinctrl_ops exynos78x0_pinctrl_ops = { .set_state = exynos_pinctrl_set_state }; /* pin banks of exynos78x0 pin-controller 0 (ALIVE) */ -static struct samsung_pin_bank_data exynos78x0_pin_banks0[] = { +static const struct samsung_pin_bank_data exynos78x0_pin_banks0[] = { EXYNOS_PIN_BANK(6, 0x000, "etc0"), EXYNOS_PIN_BANK(3, 0x020, "etc1"), EXYNOS_PIN_BANK(8, 0x040, "gpa0"), @@ -35,19 +35,19 @@ static struct samsung_pin_bank_data exynos78x0_pin_banks0[] = { }; /* pin banks of exynos78x0 pin-controller 1 (CCORE) */ -static struct samsung_pin_bank_data exynos78x0_pin_banks1[] = { +static const struct samsung_pin_bank_data exynos78x0_pin_banks1[] = { EXYNOS_PIN_BANK(2, 0x000, "gpm0"), }; /* pin banks of exynos78x0 pin-controller 2 (DISPAUD) */ -static struct samsung_pin_bank_data exynos78x0_pin_banks2[] = { +static const struct samsung_pin_bank_data exynos78x0_pin_banks2[] = { EXYNOS_PIN_BANK(4, 0x000, "gpz0"), EXYNOS_PIN_BANK(6, 0x020, "gpz1"), EXYNOS_PIN_BANK(4, 0x040, "gpz2"), }; /* pin banks of exynos78x0 pin-controller 4 (FSYS) */ -static struct samsung_pin_bank_data exynos78x0_pin_banks4[] = { +static const struct samsung_pin_bank_data exynos78x0_pin_banks4[] = { EXYNOS_PIN_BANK(3, 0x000, "gpr0"), EXYNOS_PIN_BANK(8, 0x020, "gpr1"), EXYNOS_PIN_BANK(2, 0x040, "gpr2"), @@ -56,7 +56,7 @@ static struct samsung_pin_bank_data exynos78x0_pin_banks4[] = { }; /* pin banks of exynos78x0 pin-controller 6 (TOP) */ -static struct samsung_pin_bank_data exynos78x0_pin_banks6[] = { +static const struct samsung_pin_bank_data exynos78x0_pin_banks6[] = { EXYNOS_PIN_BANK(4, 0x000, "gpb0"), EXYNOS_PIN_BANK(3, 0x020, "gpc0"), EXYNOS_PIN_BANK(4, 0x040, "gpc1"), @@ -78,7 +78,7 @@ static struct samsung_pin_bank_data exynos78x0_pin_banks6[] = { EXYNOS_PIN_BANK(5, 0x240, "gpf4"), }; -struct samsung_pin_ctrl exynos78x0_pin_ctrl[] = { +const struct samsung_pin_ctrl exynos78x0_pin_ctrl[] = { { /* pin-controller instance 0 Alive data */ .pin_banks = exynos78x0_pin_banks0, diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 6c98538..5729799 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -10,7 +10,6 @@ #include <hwspinlock.h> #include <log.h> #include <malloc.h> -#include <asm/arch/gpio.h> #include <asm/gpio.h> #include <asm/io.h> #include <dm/device_compat.h> @@ -20,6 +19,8 @@ #include <linux/err.h> #include <linux/libfdt.h> +#include "../gpio/stm32_gpio_priv.h" + #define MAX_PINS_ONE_IP 70 #define MODE_BITS_MASK 3 #define OSPEED_MASK 3 diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c index 1afaf78..609025d 100644 --- a/drivers/pwm/exynos_pwm.c +++ b/drivers/pwm/exynos_pwm.c @@ -43,6 +43,10 @@ static int exynos_pwm_set_config(struct udevice *dev, uint channel, tcnt = period_ns / rate_ns; tcmp = duty_ns / rate_ns; debug("%s: tcnt %u, tcmp %u\n", __func__, tcnt, tcmp); + + /* Ensure that the comparitor will actually hit the target */ + if (tcmp == tcnt) + tcmp = tcnt - 1; offset = channel * 3; writel(tcnt, ®s->tcntb0 + offset); writel(tcmp, ®s->tcmpb0 + offset); diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c index 26f0b4f..98fa1f4 100644 --- a/drivers/ram/stm32mp1/stm32mp1_ram.c +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c @@ -202,17 +202,16 @@ static int stm32mp1_ddr_probe(struct udevice *dev) priv->info.base = STM32_DDR_BASE; -#if !defined(CONFIG_TFABOOT) && \ - (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) - priv->info.size = 0; - ret = stm32mp1_ddr_setup(dev); + if (IS_ENABLED(CONFIG_SPL_BUILD)) { + priv->info.size = 0; + ret = stm32mp1_ddr_setup(dev); + + return log_ret(ret); + } - return log_ret(ret); -#else ofnode node = stm32mp1_ddr_get_ofnode(dev); priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0); return 0; -#endif } static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info) diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c index 9ae09ee..a5b38ac 100644 --- a/drivers/video/dw_mipi_dsi.c +++ b/drivers/video/dw_mipi_dsi.c @@ -17,7 +17,6 @@ #include <panel.h> #include <video.h> #include <asm/io.h> -#include <asm/arch/gpio.h> #include <dm/device-internal.h> #include <dm/device_compat.h> #include <linux/bitops.h> diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c index 4027e97..134abd9 100644 --- a/drivers/video/stm32/stm32_dsi.c +++ b/drivers/video/stm32/stm32_dsi.c @@ -21,7 +21,6 @@ #include <video.h> #include <video_bridge.h> #include <asm/io.h> -#include <asm/arch/gpio.h> #include <dm/device-internal.h> #include <dm/device_compat.h> #include <dm/lists.h> diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c index f55a394..65c882d 100644 --- a/drivers/video/stm32/stm32_ltdc.c +++ b/drivers/video/stm32/stm32_ltdc.c @@ -17,7 +17,6 @@ #include <video.h> #include <video_bridge.h> #include <asm/io.h> -#include <asm/arch/gpio.h> #include <dm/device-internal.h> #include <dm/device_compat.h> #include <linux/bitops.h> diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index d306054..1177f17 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -12,6 +12,7 @@ config WATCHDOG config WATCHDOG_AUTOSTART bool "Automatically start watchdog timer" depends on WDT + default n if ARCH_SUNXI default y help Automatically start watchdog timer and start servicing it during diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index 4a1ecbb..464f927 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -10,7 +10,6 @@ /* High Level Configuration Options */ #define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_EXYNOS7420 /* Exynos7 Family */ #define CONFIG_S5P #include <asm/arch/cpu.h> /* get chip and board defs */ diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp15_common.h index 30d4e8f..4e2cabf 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp15_common.h @@ -5,12 +5,12 @@ * Configuration settings for the STM32MP15x CPU */ -#ifndef __CONFIG_H -#define __CONFIG_H +#ifndef __CONFIG_STM32MP15_COMMMON_H +#define __CONFIG_STM32MP15_COMMMON_H #include <linux/sizes.h> #include <asm/arch/stm32.h> -#ifndef CONFIG_TFABOOT +#ifdef CONFIG_ARMV7_PSCI /* PSCI support */ #define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE #define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE @@ -104,11 +104,11 @@ BOOT_TARGET_PXE(func) /* - * bootcmd for stm32mp1: + * default bootcmd for stm32mp1: * for serial/usb: execute the stm32prog command - * for mmc boot (eMMC, SD card), boot only on the same device - * for nand or spi-nand boot, boot with on ubifs partition on UBI partition - * for nor boot, use the default order + * for mmc boot (eMMC, SD card), distro boot on the same mmc device + * for nand or spi-nand boot, distro boot with ubifs on UBI partition + * for nor boot, use the default distro order in ${boot_targets} */ #define STM32MP_BOOTCMD "bootcmd_stm32mp=" \ "echo \"Boot over ${boot_device}${boot_instance}!\";" \ @@ -126,7 +126,7 @@ #ifdef CONFIG_FASTBOOT_CMD_OEM_FORMAT /* eMMC default partitions for fastboot command: oem format */ -#define PARTS_DEFAULT \ +#define STM32MP_PARTS_DEFAULT \ "partitions=" \ "name=ssbl,size=2M;" \ "name=bootfs,size=64MB,bootable;" \ @@ -134,9 +134,14 @@ "name=rootfs,size=746M;" \ "name=userfs,size=-\0" #else -#define PARTS_DEFAULT +#define STM32MP_PARTS_DEFAULT #endif +#define STM32MP_EXTRA \ + "altbootcmd=run bootcmd\0" \ + "env_check=if env info -p -d -q; then env save; fi\0" \ + "boot_net_usb_start=true\0" + #include <config_distro_bootcmd.h> /* @@ -144,21 +149,29 @@ * 1M fdt, 1M script, 1M pxe and 1M for overlay * and the ramdisk at the end. */ +#define __KERNEL_ADDR_R __stringify(0xc2000000) +#define __FDT_ADDR_R __stringify(0xc4000000) +#define __SCRIPT_ADDR_R __stringify(0xc4100000) +#define __PXEFILE_ADDR_R __stringify(0xc4200000) +#define __FDTOVERLAY_ADDR_R __stringify(0xc4300000) +#define __RAMDISK_ADDR_R __stringify(0xc4400000) + +#define STM32MP_MEM_LAYOUT \ + "kernel_addr_r=" __KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" __FDT_ADDR_R "\0" \ + "scriptaddr=" __SCRIPT_ADDR_R "\0" \ + "pxefile_addr_r=" __PXEFILE_ADDR_R "\0" \ + "fdtoverlay_addr_r=" __FDTOVERLAY_ADDR_R "\0" \ + "ramdisk_addr_r=" __RAMDISK_ADDR_R "\0" + #define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_addr_r=0xc2000000\0" \ - "fdt_addr_r=0xc4000000\0" \ - "scriptaddr=0xc4100000\0" \ - "pxefile_addr_r=0xc4200000\0" \ - "fdtoverlay_addr_r=0xc4300000\0" \ - "ramdisk_addr_r=0xc4400000\0" \ - "altbootcmd=run bootcmd\0" \ - "env_check=if env info -p -d -q; then env save; fi\0" \ + STM32MP_MEM_LAYOUT \ STM32MP_BOOTCMD \ - PARTS_DEFAULT \ + STM32MP_PARTS_DEFAULT \ BOOTENV \ - "boot_net_usb_start=true\0" + STM32MP_EXTRA #endif /* ifndef CONFIG_SPL_BUILD */ #endif /* ifdef CONFIG_DISTRO_DEFAULTS*/ -#endif /* __CONFIG_H */ +#endif /* __CONFIG_STM32MP15_COMMMON_H */ diff --git a/include/configs/dh_stm32mp1.h b/include/configs/stm32mp15_dh_dhsom.h index 89d317b..c559cd7 100644 --- a/include/configs/dh_stm32mp1.h +++ b/include/configs/stm32mp15_dh_dhsom.h @@ -5,10 +5,10 @@ * Configuration settings for the DH STM32MP15x SoMs */ -#ifndef __CONFIG_DH_STM32MP1_H__ -#define __CONFIG_DH_STM32MP1_H__ +#ifndef __CONFIG_STM32MP15_DH_DHSOM_H__ +#define __CONFIG_STM32MP15_DH_DHSOM_H__ -#include <configs/stm32mp1.h> +#include <configs/stm32mp15_common.h> #define CONFIG_SPL_TARGET "u-boot.itb" diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h new file mode 100644 index 0000000..10248bf --- /dev/null +++ b/include/configs/stm32mp15_st_common.h @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ +/* + * Copyright (C) 2021, STMicroelectronics - All Rights Reserved + * + * Configuration settings for the STMicroelectonics STM32MP15x boards + */ + +#ifndef __CONFIG_STM32MP15_ST_COMMON_H__ +#define __CONFIG_STM32MP15_ST_COMMON_H__ + +#include <configs/stm32mp15_common.h> + +#ifdef CONFIG_EXTRA_ENV_SETTINGS +/* + * default bootcmd for stm32mp1 STMicroelectronics boards: + * for serial/usb: execute the stm32prog command + * for mmc boot (eMMC, SD card), distro boot on the same mmc device + * for nand or spi-nand boot, distro boot with ubifs on UBI partition + * for nor boot, distro boot on SD card = mmc0 ONLY ! + */ +#define ST_STM32MP1_BOOTCMD "bootcmd_stm32mp=" \ + "echo \"Boot over ${boot_device}${boot_instance}!\";" \ + "if test ${boot_device} = serial || test ${boot_device} = usb;" \ + "then stm32prog ${boot_device} ${boot_instance}; " \ + "else " \ + "run env_check;" \ + "if test ${boot_device} = mmc;" \ + "then env set boot_targets \"mmc${boot_instance}\"; fi;" \ + "if test ${boot_device} = nand ||" \ + " test ${boot_device} = spi-nand ;" \ + "then env set boot_targets ubifs0; fi;" \ + "if test ${boot_device} = nor;" \ + "then env set boot_targets mmc0; fi;" \ + "run distro_bootcmd;" \ + "fi;\0" + +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + STM32MP_MEM_LAYOUT \ + ST_STM32MP1_BOOTCMD \ + STM32MP_PARTS_DEFAULT \ + BOOTENV \ + STM32MP_EXTRA + +#endif +#endif diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 67c0c62..875f636 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -101,6 +101,8 @@ enum image_cfg_type { IMAGE_CFG_DATA, IMAGE_CFG_DATA_DELAY, IMAGE_CFG_BAUDRATE, + IMAGE_CFG_UART_PORT, + IMAGE_CFG_UART_MPP, IMAGE_CFG_DEBUG, IMAGE_CFG_KAK, IMAGE_CFG_CSK, @@ -129,6 +131,8 @@ static const char * const id_strs[] = { [IMAGE_CFG_DATA] = "DATA", [IMAGE_CFG_DATA_DELAY] = "DATA_DELAY", [IMAGE_CFG_BAUDRATE] = "BAUDRATE", + [IMAGE_CFG_UART_PORT] = "UART_PORT", + [IMAGE_CFG_UART_MPP] = "UART_MPP", [IMAGE_CFG_DEBUG] = "DEBUG", [IMAGE_CFG_KAK] = "KAK", [IMAGE_CFG_CSK] = "CSK", @@ -161,6 +165,8 @@ struct image_cfg_element { struct ext_hdr_v0_reg regdata; unsigned int regdata_delay; unsigned int baudrate; + unsigned int uart_port; + unsigned int uart_mpp; unsigned int debug; const char *key_name; int csk_idx; @@ -260,6 +266,18 @@ static bool image_get_spezialized_img(void) return e->sec_specialized_img; } +static int image_get_bootfrom(void) +{ + struct image_cfg_element *e; + + e = image_find_option(IMAGE_CFG_BOOT_FROM); + if (!e) + /* fallback to SPI if no BOOT_FROM is not provided */ + return IBR_HDR_SPI_ID; + + return e->bootfrom; +} + /* * Compute a 8-bit checksum of a memory area. This algorithm follows * the requirements of the Marvell SoC BootROM specifications. @@ -840,6 +858,41 @@ done: return ret; } +static size_t image_headersz_align(size_t headersz, uint8_t blockid) +{ + /* + * Header needs to be 4-byte aligned, which is already ensured by code + * above. Moreover UART images must have header aligned to 128 bytes + * (xmodem block size), NAND images to 256 bytes (ECC calculation), + * and SATA and SDIO images to 512 bytes (storage block size). + * Note that SPI images do not have to have header size aligned + * to 256 bytes because it is possible to read from SPI storage from + * any offset (read offset does not have to be aligned to block size). + */ + if (blockid == IBR_HDR_UART_ID) + return ALIGN(headersz, 128); + else if (blockid == IBR_HDR_NAND_ID) + return ALIGN(headersz, 256); + else if (blockid == IBR_HDR_SATA_ID || blockid == IBR_HDR_SDIO_ID) + return ALIGN(headersz, 512); + else + return headersz; +} + +static size_t image_headersz_v0(int *hasext) +{ + size_t headersz; + + headersz = sizeof(struct main_hdr_v0); + if (image_count_options(IMAGE_CFG_DATA) > 0) { + headersz += sizeof(struct ext_hdr_v0); + if (hasext) + *hasext = 1; + } + + return image_headersz_align(headersz, image_get_bootfrom()); +} + static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, int payloadsz) { @@ -853,12 +906,7 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, * Calculate the size of the header and the size of the * payload */ - headersz = sizeof(struct main_hdr_v0); - - if (image_count_options(IMAGE_CFG_DATA) > 0) { - has_ext = 1; - headersz += sizeof(struct ext_hdr_v0); - } + headersz = image_headersz_v0(&has_ext); image = malloc(headersz); if (!image) { @@ -872,15 +920,14 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, /* Fill in the main header */ main_hdr->blocksize = - cpu_to_le32(payloadsz - headersz); + cpu_to_le32(payloadsz); main_hdr->srcaddr = cpu_to_le32(headersz); main_hdr->ext = has_ext; + main_hdr->version = 0; main_hdr->destaddr = cpu_to_le32(params->addr); main_hdr->execaddr = cpu_to_le32(params->ep); + main_hdr->blockid = image_get_bootfrom(); - e = image_find_option(IMAGE_CFG_BOOT_FROM); - if (e) - main_hdr->blockid = e->bootfrom; e = image_find_option(IMAGE_CFG_NAND_ECC_MODE); if (e) main_hdr->nandeccmode = e->nandeccmode; @@ -890,6 +937,28 @@ static void *image_create_v0(size_t *imagesz, struct image_tool_params *params, main_hdr->checksum = image_checksum8(image, sizeof(struct main_hdr_v0)); + /* + * For SATA srcaddr is specified in number of sectors starting from + * sector 0. The main header is stored at sector number 1. + * This expects the sector size to be 512 bytes. + * Header size is already aligned. + */ + if (main_hdr->blockid == IBR_HDR_SATA_ID) + main_hdr->srcaddr = cpu_to_le32(headersz / 512 + 1); + + /* + * For SDIO srcaddr is specified in number of sectors starting from + * sector 0. The main header is stored at sector number 0. + * This expects sector size to be 512 bytes. + * Header size is already aligned. + */ + if (main_hdr->blockid == IBR_HDR_SDIO_ID) + main_hdr->srcaddr = cpu_to_le32(headersz / 512); + + /* For PCIe srcaddr is not used and must be set to 0xFFFFFFFF. */ + if (main_hdr->blockid == IBR_HDR_PEX_ID) + main_hdr->srcaddr = cpu_to_le32(0xFFFFFFFF); + /* Generate the ext header */ if (has_ext) { struct ext_hdr_v0 *ext_hdr; @@ -977,11 +1046,7 @@ static size_t image_headersz_v1(int *hasext) *hasext = 1; } - /* - * The payload should be aligned on some reasonable - * boundary - */ - return ALIGN(headersz, 4096); + return image_headersz_align(headersz, image_get_bootfrom()); } int add_binary_header_v1(uint8_t **cur, uint8_t **next_ext, @@ -1186,6 +1251,7 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, { struct image_cfg_element *e; struct main_hdr_v1 *main_hdr; + struct opt_hdr_v1 *ohdr; struct register_set_hdr_v1 *register_set_hdr; struct secure_hdr_v1 *secure_hdr = NULL; size_t headersz; @@ -1217,7 +1283,7 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, /* Fill the main header */ main_hdr->blocksize = - cpu_to_le32(payloadsz - headersz); + cpu_to_le32(payloadsz); main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF); main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16; main_hdr->destaddr = cpu_to_le32(params->addr); @@ -1225,9 +1291,8 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, main_hdr->srcaddr = cpu_to_le32(headersz); main_hdr->ext = hasext; main_hdr->version = 1; - e = image_find_option(IMAGE_CFG_BOOT_FROM); - if (e) - main_hdr->blockid = e->bootfrom; + main_hdr->blockid = image_get_bootfrom(); + e = image_find_option(IMAGE_CFG_NAND_BLKSZ); if (e) main_hdr->nandblocksize = e->nandblksz / (64 * 1024); @@ -1239,7 +1304,13 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, main_hdr->nandbadblklocation = e->nandbadblklocation; e = image_find_option(IMAGE_CFG_BAUDRATE); if (e) - main_hdr->options = baudrate_to_option(e->baudrate); + main_hdr->options |= baudrate_to_option(e->baudrate); + e = image_find_option(IMAGE_CFG_UART_PORT); + if (e) + main_hdr->options |= (e->uart_port & 3) << 3; + e = image_find_option(IMAGE_CFG_UART_MPP); + if (e) + main_hdr->options |= (e->uart_mpp & 7) << 5; e = image_find_option(IMAGE_CFG_DEBUG); if (e) main_hdr->flags = e->debug ? 0x1 : 0; @@ -1323,7 +1394,7 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, return NULL; } - if (secure_hdr && add_secure_header_v1(params, ptr, payloadsz, + if (secure_hdr && add_secure_header_v1(params, ptr, payloadsz + headersz, headersz, image, secure_hdr)) return NULL; @@ -1331,6 +1402,14 @@ static void *image_create_v1(size_t *imagesz, struct image_tool_params *params, main_hdr->checksum = image_checksum8(main_hdr, headersz); *imagesz = headersz; + + /* Fill the real header size without padding into the main header */ + headersz = sizeof(*main_hdr); + for_each_opt_hdr_v1 (ohdr, main_hdr) + headersz += opt_hdr_v1_size(ohdr); + main_hdr->headersz_lsb = cpu_to_le16(headersz & 0xFFFF); + main_hdr->headersz_msb = (headersz & 0xFFFF0000) >> 16; + return image; } @@ -1441,6 +1520,12 @@ static int image_create_config_parse_oneline(char *line, case IMAGE_CFG_BAUDRATE: el->baudrate = strtoul(value1, NULL, 10); break; + case IMAGE_CFG_UART_PORT: + el->uart_port = strtoul(value1, NULL, 16); + break; + case IMAGE_CFG_UART_MPP: + el->uart_mpp = strtoul(value1, NULL, 16); + break; case IMAGE_CFG_DEBUG: el->debug = strtoul(value1, NULL, 10); break; @@ -1540,17 +1625,6 @@ static int image_get_version(void) return e->version; } -static int image_get_bootfrom(void) -{ - struct image_cfg_element *e; - - e = image_find_option(IMAGE_CFG_BOOT_FROM); - if (!e) - return -1; - - return e->bootfrom; -} - static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, struct image_tool_params *params) { @@ -1558,9 +1632,22 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, void *image = NULL; int version; size_t headersz = 0; + size_t datasz; uint32_t checksum; + struct stat s; int ret; + /* + * Do not use sbuf->st_size as it contains size with padding. + * We need original image data size, so stat original file. + */ + if (stat(params->datafile, &s)) { + fprintf(stderr, "Could not stat data file %s: %s\n", + params->datafile, strerror(errno)); + exit(EXIT_FAILURE); + } + datasz = ALIGN(s.st_size, 4); + fcfg = fopen(params->imagename, "r"); if (!fcfg) { fprintf(stderr, "Could not open input file %s\n", @@ -1595,11 +1682,11 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, */ case -1: case 0: - image = image_create_v0(&headersz, params, sbuf->st_size); + image = image_create_v0(&headersz, params, datasz + 4); break; case 1: - image = image_create_v1(&headersz, params, ptr, sbuf->st_size); + image = image_create_v1(&headersz, params, ptr, datasz + 4); break; default: @@ -1616,11 +1703,10 @@ static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, free(image_cfg); - /* Build and add image checksum header */ + /* Build and add image data checksum */ checksum = cpu_to_le32(image_checksum32((uint8_t *)ptr + headersz, - sbuf->st_size - headersz - sizeof(uint32_t))); - memcpy((uint8_t *)ptr + sbuf->st_size - sizeof(uint32_t), &checksum, - sizeof(uint32_t)); + datasz)); + memcpy((uint8_t *)ptr + headersz + datasz, &checksum, sizeof(uint32_t)); /* Finally copy the header into the image area */ memcpy(ptr, image, headersz); @@ -1663,6 +1749,9 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size, struct image_tool_params *params) { size_t header_size = kwbheader_size(ptr); + uint8_t blockid; + uint32_t offset; + uint32_t size; uint8_t csum; if (header_size > image_size) @@ -1682,61 +1771,64 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size, if (csum != ext_hdr->checksum) return -FDT_ERR_BADSTRUCTURE; } + + blockid = mhdr->blockid; + offset = le32_to_cpu(mhdr->srcaddr); + size = le32_to_cpu(mhdr->blocksize); } else if (kwbimage_version(ptr) == 1) { struct main_hdr_v1 *mhdr = (struct main_hdr_v1 *)ptr; const uint8_t *mhdr_end; struct opt_hdr_v1 *ohdr; - uint32_t offset; - uint32_t size; mhdr_end = (uint8_t *)mhdr + header_size; for_each_opt_hdr_v1 (ohdr, ptr) if (!opt_hdr_v1_valid_size(ohdr, mhdr_end)) return -FDT_ERR_BADSTRUCTURE; + blockid = mhdr->blockid; offset = le32_to_cpu(mhdr->srcaddr); + size = le32_to_cpu(mhdr->blocksize); + } else { + return -FDT_ERR_BADSTRUCTURE; + } - /* - * For SATA srcaddr is specified in number of sectors. - * The main header is must be stored at sector number 1. - * This expects that sector size is 512 bytes and recalculates - * data offset to bytes relative to the main header. - */ - if (mhdr->blockid == IBR_HDR_SATA_ID) { - if (offset < 1) - return -FDT_ERR_BADSTRUCTURE; - offset -= 1; - offset *= 512; - } + /* + * For SATA srcaddr is specified in number of sectors. + * The main header is must be stored at sector number 1. + * This expects that sector size is 512 bytes and recalculates + * data offset to bytes relative to the main header. + */ + if (blockid == IBR_HDR_SATA_ID) { + if (offset < 1) + return -FDT_ERR_BADSTRUCTURE; + offset -= 1; + offset *= 512; + } - /* - * For SDIO srcaddr is specified in number of sectors. - * This expects that sector size is 512 bytes and recalculates - * data offset to bytes. - */ - if (mhdr->blockid == IBR_HDR_SDIO_ID) - offset *= 512; + /* + * For SDIO srcaddr is specified in number of sectors. + * This expects that sector size is 512 bytes and recalculates + * data offset to bytes. + */ + if (blockid == IBR_HDR_SDIO_ID) + offset *= 512; - /* - * For PCIe srcaddr is always set to 0xFFFFFFFF. - * This expects that data starts after all headers. - */ - if (mhdr->blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF) - offset = header_size; + /* + * For PCIe srcaddr is always set to 0xFFFFFFFF. + * This expects that data starts after all headers. + */ + if (blockid == IBR_HDR_PEX_ID && offset == 0xFFFFFFFF) + offset = header_size; - if (offset > image_size || offset % 4 != 0) - return -FDT_ERR_BADSTRUCTURE; + if (offset > image_size || offset % 4 != 0) + return -FDT_ERR_BADSTRUCTURE; - size = le32_to_cpu(mhdr->blocksize); - if (size < 4 || offset + size > image_size || size % 4 != 0) - return -FDT_ERR_BADSTRUCTURE; + if (size < 4 || offset + size > image_size || size % 4 != 0) + return -FDT_ERR_BADSTRUCTURE; - if (image_checksum32(ptr + offset, size - 4) != - *(uint32_t *)(ptr + offset + size - 4)) - return -FDT_ERR_BADSTRUCTURE; - } else { + if (image_checksum32(ptr + offset, size - 4) != + *(uint32_t *)(ptr + offset + size - 4)) return -FDT_ERR_BADSTRUCTURE; - } return 0; } @@ -1793,8 +1885,7 @@ static int kwbimage_generate(struct image_tool_params *params, */ case -1: case 0: - alloc_len = sizeof(struct main_hdr_v0) + - sizeof(struct ext_hdr_v0); + alloc_len = image_headersz_v0(NULL); break; case 1: @@ -1824,6 +1915,7 @@ static int kwbimage_generate(struct image_tool_params *params, * The resulting image needs to be 4-byte aligned. At least * the Marvell hdrparser tool complains if its unaligned. * After the image data is stored 4-byte checksum. + * Final UART image must be aligned to 128 bytes. * Final SPI and NAND images must be aligned to 256 bytes. * Final SATA and SDIO images must be aligned to 512 bytes. */ @@ -1831,6 +1923,8 @@ static int kwbimage_generate(struct image_tool_params *params, return 4 + (256 - (alloc_len + s.st_size + 4) % 256) % 256; else if (bootfrom == IBR_HDR_SATA_ID || bootfrom == IBR_HDR_SDIO_ID) return 4 + (512 - (alloc_len + s.st_size + 4) % 512) % 512; + else if (bootfrom == IBR_HDR_UART_ID) + return 4 + (128 - (alloc_len + s.st_size + 4) % 128) % 128; else return 4 + (4 - s.st_size % 4) % 4; } @@ -1893,7 +1987,7 @@ static int kwbimage_check_params(struct image_tool_params *params) char *msg = "Configuration file for kwbimage creation omitted"; fprintf(stderr, "Error:%s - %s\n", params->cmdname, msg); - return CFG_INVALID; + return 1; } return (params->dflag && (params->fflag || params->lflag)) || diff --git a/tools/kwbimage.h b/tools/kwbimage.h index f1ba95c..8d37357 100644 --- a/tools/kwbimage.h +++ b/tools/kwbimage.h @@ -42,7 +42,8 @@ struct main_hdr_v0 { uint8_t nandeccmode; /* 0x1 */ uint16_t nandpagesize; /* 0x2-0x3 */ uint32_t blocksize; /* 0x4-0x7 */ - uint32_t rsvd1; /* 0x8-0xB */ + uint8_t version; /* 0x8 */ + uint8_t rsvd1[3]; /* 0x9-0xB */ uint32_t srcaddr; /* 0xC-0xF */ uint32_t destaddr; /* 0x10-0x13 */ uint32_t execaddr; /* 0x14-0x17 */ @@ -190,28 +191,6 @@ struct register_set_hdr_v1 { #define OPT_HDR_V1_BINARY_TYPE 0x2 #define OPT_HDR_V1_REGISTER_TYPE 0x3 -enum kwbimage_cmd { - CMD_INVALID, - CMD_BOOT_FROM, - CMD_NAND_ECC_MODE, - CMD_NAND_PAGE_SIZE, - CMD_SATA_PIO_MODE, - CMD_DDR_INIT_DELAY, - CMD_DATA -}; - -enum kwbimage_cmd_types { - CFG_INVALID = -1, - CFG_COMMAND, - CFG_DATA0, - CFG_DATA1 -}; - -/* - * functions - */ -void init_kwb_image_type (void); - /* * Byte 8 of the image header contains the version number. In the v0 * header, byte 8 was reserved, and always set to 0. In the v1 header, diff --git a/tools/kwboot.c b/tools/kwboot.c index bacca15..d22e6ea 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -1073,6 +1073,14 @@ kwboot_xmodem(int tty, const void *_img, size_t size, int baudrate) hdrsz = kwbheader_size(img); + /* + * If header size is not aligned to xmodem block size (which applies + * for all images in kwbimage v0 format) then we have to ensure that + * the last xmodem block of header contains beginning of the data + * followed by the header. So align header size to xmodem block size. + */ + hdrsz += (KWBOOT_XM_BLKSZ - hdrsz % KWBOOT_XM_BLKSZ) % KWBOOT_XM_BLKSZ; + kwboot_printv("Waiting 2s and flushing tty\n"); sleep(2); /* flush isn't effective without it */ tcflush(tty, TCIOFLUSH); @@ -1083,12 +1091,17 @@ kwboot_xmodem(int tty, const void *_img, size_t size, int baudrate) if (rc) return rc; - img += hdrsz; - size -= hdrsz; - - rc = kwboot_xmodem_one(tty, &pnum, 0, img, size, 0); - if (rc) - return rc; + /* + * If we have already sent image data as a part of the last + * xmodem header block then we have nothing more to send. + */ + if (hdrsz < size) { + img += hdrsz; + size -= hdrsz; + rc = kwboot_xmodem_one(tty, &pnum, 0, img, size, 0); + if (rc) + return rc; + } rc = kwboot_xm_finish(tty); if (rc) @@ -1627,7 +1640,6 @@ err: static void kwboot_usage(FILE *stream, char *progname) { - fprintf(stream, "kwboot version %s\n", PLAIN_VERSION); fprintf(stream, "Usage: %s [OPTIONS] [-b <image> | -D <image> ] [-B <baud> ] <TTY>\n", progname); @@ -1672,6 +1684,8 @@ main(int argc, char **argv) after_img_rsv = KWBOOT_XM_BLKSZ; baudrate = 115200; + printf("kwboot version %s\n", PLAIN_VERSION); + kwboot_verbose = isatty(STDOUT_FILENO); do { |