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-rw-r--r--arch/arm/dts/rk3036.dtsi1
-rw-r--r--drivers/mmc/rockchip_dw_mmc.c21
2 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm/dts/rk3036.dtsi b/arch/arm/dts/rk3036.dtsi
index 0daae1e..ecf5416 100644
--- a/arch/arm/dts/rk3036.dtsi
+++ b/arch/arm/dts/rk3036.dtsi
@@ -257,6 +257,7 @@
cap-mmc-highspeed;
mmc-ddr-1_8v;
disable-wp;
+ fifo-mode;
non-removable;
num-slots = <1>;
default-sample-phase = <158>;
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index dfe20f9..aeaec6c 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -64,6 +64,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
struct dwmci_host *host = &priv->host;
u32 minmax[2];
int ret;
+ int fifo_depth;
priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
if (IS_ERR(priv->grf))
@@ -72,10 +73,22 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
if (ret)
return ret;
- ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
- "clock-freq-min-max", minmax, 2);
- if (!ret)
- ret = add_dwmci(host, minmax[1], minmax[0]);
+ if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+ "clock-freq-min-max", minmax, 2))
+ return -EINVAL;
+
+ fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+ "fifo-depth", 0);
+ if (fifo_depth < 0)
+ return -EINVAL;
+
+ host->fifoth_val = MSIZE(0x2) |
+ RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
+
+ if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
+ host->fifo_mode = true;
+
+ ret = add_dwmci(host, minmax[1], minmax[0]);
if (ret)
return ret;