diff options
45 files changed, 398 insertions, 328 deletions
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 6083f99..7864b4b 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -294,7 +294,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_50_grp", "gpio0_51_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts b/arch/arm/dts/zynqmp-dlc21-revA.dts index f737004..2076271 100644 --- a/arch/arm/dts/zynqmp-dlc21-revA.dts +++ b/arch/arm/dts/zynqmp-dlc21-revA.dts @@ -43,13 +43,13 @@ reg = <0 0 0 0x80000000>, <0x8 0 0x3 0x80000000>; }; - si5332_1: si5332_1 { /* clk0_sgmii - u142 */ + si5332_1: si5332-1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; - si5332_2: si5332_2 { /* clk1_usb - u142 */ + si5332_2: si5332-2 { /* clk1_usb - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; @@ -155,7 +155,6 @@ /* u138 - TUSB320IRWBR - for USB-C */ }; - &usb0 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts index cc57c2a..f1b0a4a 100644 --- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts @@ -43,7 +43,7 @@ reg = <0x0 0x0 0x0 0x80000000>; }; - si5332_1: si5332_1 { /* u142 - GEM0 */ + si5332_1: si5332-1 { /* u142 - GEM0 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; diff --git a/arch/arm/dts/zynqmp-mini-emmc0.dts b/arch/arm/dts/zynqmp-mini-emmc0.dts index 02e80bd..7823c58 100644 --- a/arch/arm/dts/zynqmp-mini-emmc0.dts +++ b/arch/arm/dts/zynqmp-mini-emmc0.dts @@ -35,7 +35,7 @@ bootph-all; }; - clk_xin: clk_xin { + clk_xin: clk-xin { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; diff --git a/arch/arm/dts/zynqmp-mini-emmc1.dts b/arch/arm/dts/zynqmp-mini-emmc1.dts index ce1cdb2..2f6ba95 100644 --- a/arch/arm/dts/zynqmp-mini-emmc1.dts +++ b/arch/arm/dts/zynqmp-mini-emmc1.dts @@ -35,7 +35,7 @@ bootph-all; }; - clk_xin: clk_xin { + clk_xin: clk-xin { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <200000000>; diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index ee8be53..e35317f 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -53,7 +53,7 @@ #size-cells = <0>; }; - misc_clk: misc_clk { + misc_clk: misc-clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 9acccad..5a60b86 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -43,13 +43,13 @@ reg = <0x0 0x0 0x0 0x80000000>; }; - si5332_1: si5332_1 { /* clk0_sgmii - u142 */ + si5332_1: si5332-1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; - si5332_2: si5332_2 { /* clk1_usb - u142 */ + si5332_2: si5332-2 { /* clk1_usb - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; diff --git a/arch/arm/dts/zynqmp-sc-revB.dts b/arch/arm/dts/zynqmp-sc-revB.dts index e0b554c..8517bda 100644 --- a/arch/arm/dts/zynqmp-sc-revB.dts +++ b/arch/arm/dts/zynqmp-sc-revB.dts @@ -71,7 +71,7 @@ }; }; - si5332_2: si5332_2 { /* u42 */ + si5332_2: si5332-2 { /* u42 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; @@ -344,7 +344,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_34_grp", "gpio0_35_grp"; function = "gpio0"; @@ -371,7 +371,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = <SLEW_RATE_SLOW>; diff --git a/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso b/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso index 750bc39..853d981 100644 --- a/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso +++ b/arch/arm/dts/zynqmp-sc-vpk120-revB.dtso @@ -13,7 +13,6 @@ /dts-v1/; /plugin/; - &{/} { compatible = "xlnx,zynqmp-sc-vpk120-revB", "xlnx,zynqmp-vpk120-revB", "xlnx,zynqmp-vpk120", "xlnx,zynqmp"; diff --git a/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso b/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso index 551341f..1862593 100644 --- a/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso +++ b/arch/arm/dts/zynqmp-sc-vpk180-revA.dtso @@ -13,7 +13,6 @@ /dts-v1/; /plugin/; - &{/} { compatible = "xlnx,zynqmp-sc-vpk180-revA", "xlnx,zynqmp-vpk180-revA", "xlnx,zynqmp-vpk180", "xlnx,zynqmp"; diff --git a/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso b/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso index e70eb4d..3990d05 100644 --- a/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso +++ b/arch/arm/dts/zynqmp-sc-vpk180-revB.dtso @@ -13,7 +13,6 @@ /dts-v1/; /plugin/; - &{/} { compatible = "xlnx,zynqmp-sc-vpk180-revB", "xlnx,zynqmp-vpk180-revB", "xlnx,zynqmp-vpk180", "xlnx,zynqmp"; diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso index 8d0ddec..766f783 100644 --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso @@ -120,6 +120,8 @@ #address-cells = <1>; #size-cells = <0>; phy0: ethernet-phy@8 { /* Adin u31 */ + #phy-cells = <1>; + compatible = "ethernet-phy-id0283.bc30"; reg = <8>; adi,rx-internal-delay-ps = <2000>; adi,tx-internal-delay-ps = <2000>; @@ -223,7 +225,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = <SLEW_RATE_SLOW>; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso index 95b1dc5..7717abf 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso @@ -25,37 +25,37 @@ io-channels = <&u14 0>, <&u14 1>, <&u14 2>; }; - si5332_0: si5332_0 { /* u17 - GEM0/1 */ + si5332_0: si5332-0 { /* u17 - GEM0/1 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; - si5332_1: si5332_1 { /* u17 - DP */ + si5332_1: si5332-1 { /* u17 - DP */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; - si5332_2: si5332_2 { /* u17 - USB */ + si5332_2: si5332-2 { /* u17 - USB */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; - si5332_3: si5332_3 { /* u17 - SFP+ */ + si5332_3: si5332-3 { /* u17 - SFP+ */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <156250000>; }; - si5332_4: si5332_4 { /* u17 - GEM2 */ + si5332_4: si5332-4 { /* u17 - GEM2 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; - si5332_5: si5332_5 { /* u17 - GEM3 */ + si5332_5: si5332-5 { /* u17 - GEM3 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; @@ -274,7 +274,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = <SLEW_RATE_SLOW>; diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index e2387a2..2118739 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -274,7 +274,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = <SLEW_RATE_SLOW>; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso index f43c159..6d0d5c4 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso @@ -27,69 +27,67 @@ "xlnx,zynqmp-sk-kv260-revZ", "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; model = "ZynqMP KV260 revA"; -}; - -&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1_default>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - - u14: ina260@40 { /* u14 */ - compatible = "ti,ina260"; - #io-channel-cells = <1>; - label = "ina260-u14"; - reg = <0x40>; - }; - /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ -}; -&amba { ina260-u14 { compatible = "iio-hwmon"; io-channels = <&u14 0>, <&u14 1>, <&u14 2>; }; - si5332_0: si5332_0 { /* u17 */ + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; - si5332_1: si5332_1 { /* u17 */ + si5332_1: si5332-1 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; - si5332_2: si5332_2 { /* u17 */ + si5332_2: si5332-2 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <48000000>; }; - si5332_3: si5332_3 { /* u17 */ + si5332_3: si5332-3 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; }; - si5332_4: si5332_4 { /* u17 */ + si5332_4: si5332-4 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; - si5332_5: si5332_5 { /* u17 */ + si5332_5: si5332-5 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; }; +&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ +}; + /* DP/USB 3.0 and SATA */ &psgtr { status = "okay"; @@ -250,7 +248,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = <SLEW_RATE_SLOW>; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso index 3643569..a4b4465 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso @@ -22,70 +22,68 @@ "xlnx,zynqmp-sk-kv260-revB", "xlnx,zynqmp-sk-kv260", "xlnx,zynqmp"; model = "ZynqMP KV260 revB"; -}; - -&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1_default>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; - - u14: ina260@40 { /* u14 */ - compatible = "ti,ina260"; - #io-channel-cells = <1>; - label = "ina260-u14"; - reg = <0x40>; - }; - /* u43 - 0x2d - USB hub */ - /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ -}; -&amba { ina260-u14 { compatible = "iio-hwmon"; io-channels = <&u14 0>, <&u14 1>, <&u14 2>; }; - si5332_0: si5332_0 { /* u17 */ + si5332_0: si5332-0 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <125000000>; }; - si5332_1: si5332_1 { /* u17 */ + si5332_1: si5332-1 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <25000000>; }; - si5332_2: si5332_2 { /* u17 */ + si5332_2: si5332-2 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <48000000>; }; - si5332_3: si5332_3 { /* u17 */ + si5332_3: si5332-3 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24000000>; }; - si5332_4: si5332_4 { /* u17 */ + si5332_4: si5332-4 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; - si5332_5: si5332_5 { /* u17 */ + si5332_5: si5332-5 { /* u17 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; }; }; +&i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c1_default>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + u14: ina260@40 { /* u14 */ + compatible = "ti,ina260"; + #io-channel-cells = <1>; + label = "ina260-u14"; + reg = <0x40>; + }; + /* u43 - 0x2d - USB hub */ + /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ +}; + /* DP/USB 3.0 */ &psgtr { status = "okay"; @@ -237,7 +235,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { conf { groups = "gpio0_24_grp", "gpio0_25_grp"; slew-rate = <SLEW_RATE_SLOW>; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 1d62c48..5859e6c 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -144,7 +144,7 @@ &qspi { /* MIO 0-5 - U143 */ status = "okay"; spi_flash: flash@0 { /* MT25QU512A */ - compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */ + compatible = "jedec,spi-nor"; /* 64MB */ reg = <0>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; diff --git a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts index 9ab8f5b..2a3bbe1 100644 --- a/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts +++ b/arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts @@ -65,19 +65,19 @@ }; }; - si5332_0: si5332_0 { /* ps_ref_clk - u142 */ + si5332_0: si5332-0 { /* ps_ref_clk - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; }; - si5332_1: si5332_1 { /* clk0_sgmii - u142 */ + si5332_1: si5332-1 { /* clk0_sgmii - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; /* FIXME */ }; - si5332_2: si5332_2 { /* clk1_usb - u142 */ + si5332_2: si5332-2 { /* clk1_usb - u142 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; @@ -400,7 +400,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_34_grp", "gpio0_35_grp"; function = "gpio0"; @@ -427,7 +427,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_36_grp", "gpio0_37_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-vpk120-revA.dts b/arch/arm/dts/zynqmp-vpk120-revA.dts index ce76e0b..e0e4f1b 100644 --- a/arch/arm/dts/zynqmp-vpk120-revA.dts +++ b/arch/arm/dts/zynqmp-vpk120-revA.dts @@ -65,19 +65,19 @@ }; }; - si5332_0: si5332_0 { /* ps_ref_clk */ + si5332_0: si5332-0 { /* ps_ref_clk */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; }; - si5332_1: si5332_1 { /* clk0_sgmii */ + si5332_1: si5332-1 { /* clk0_sgmii */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <33333333>; /* FIXME */ }; - si5332_2: si5332_2 { /* clk1_usb */ + si5332_2: si5332-2 { /* clk1_usb */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; @@ -536,7 +536,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_34_grp", "gpio0_35_grp"; function = "gpio0"; @@ -563,7 +563,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_36_grp", "gpio0_37_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index e72ed50..27b38e9 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -148,7 +148,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_36_grp", "gpio0_37_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 160c6c5..ff7069b 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -273,7 +273,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_6_grp", "gpio0_7_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index b1857e1..53aa3dc 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -125,7 +125,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_74_grp", "gpio0_75_grp"; function = "gpio0"; @@ -152,7 +152,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_76_grp", "gpio0_77_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 44d1b24..c594506 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -103,15 +103,6 @@ }; }; - ltc2954: ltc2954 { /* U7 */ - compatible = "lltc,ltc2954", "lltc,ltc2952"; - status = "disabled"; - trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */ - /* If there is HW watchdog on mezzanine this signal should be connected there */ - watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */ - kill-gpios = <&gpio 34 GPIO_ACTIVE_LOW>; /* KILL signal - output */ - }; - wmmcsdio_fixed: fixedregulator-mmcsdio { compatible = "regulator-fixed"; regulator-name = "wmmcsdio_fixed"; @@ -284,7 +275,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_4_grp", "gpio0_5_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index e166c95..3132fa5 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -708,7 +708,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -735,7 +735,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index cdfeea2..31effbf 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -272,7 +272,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 4b942ac..999b243 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -284,7 +284,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index b90ff61..ba3989c 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -719,7 +719,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -746,7 +746,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index ba9e489..787cf0d 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -589,7 +589,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -616,7 +616,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 4f85837..38735b1 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -37,26 +37,6 @@ reg = <0x0 0x0 0x0 0x80000000>; }; - ina226-u60 { - compatible = "iio-hwmon"; - io-channels = <&u60 0>, <&u60 1>, <&u60 2>, <&u60 3>; - }; - ina226-u61 { - compatible = "iio-hwmon"; - io-channels = <&u61 0>, <&u61 1>, <&u61 2>, <&u61 3>; - }; - ina226-u63 { - compatible = "iio-hwmon"; - io-channels = <&u63 0>, <&u63 1>, <&u63 2>, <&u63 3>; - }; - ina226-u65 { - compatible = "iio-hwmon"; - io-channels = <&u65 0>, <&u65 1>, <&u65 2>, <&u65 3>; - }; - ina226-u64 { - compatible = "iio-hwmon"; - io-channels = <&u64 0>, <&u64 1>, <&u64 2>, <&u64 3>; - }; }; &dcc { @@ -67,160 +47,6 @@ status = "okay"; clock-frequency = <400000>; - i2c-mux@75 { - compatible = "nxp,pca9548"; /* u22 */ - #address-cells = <1>; - #size-cells = <0>; - reg = <0x75>; - - i2c@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - /* PMBUS */ - max20751@74 { /* u23 */ - compatible = "maxim,max20751"; - reg = <0x74>; - }; - max20751@70 { /* u89 */ - compatible = "maxim,max20751"; - reg = <0x70>; - }; - max15301@a { /* u28 */ - compatible = "maxim,max15301"; - reg = <0xa>; - }; - max15303@b { /* u48 */ - compatible = "maxim,max15303"; - reg = <0xb>; - }; - max15303@d { /* u27 */ - compatible = "maxim,max15303"; - reg = <0xd>; - }; - max15303@e { /* u11 */ - compatible = "maxim,max15303"; - reg = <0xe>; - }; - max15303@f { /* u96 */ - compatible = "maxim,max15303"; - reg = <0xf>; - }; - max15303@11 { /* u47 */ - compatible = "maxim,max15303"; - reg = <0x11>; - }; - max15303@12 { /* u24 */ - compatible = "maxim,max15303"; - reg = <0x12>; - }; - max15301@13 { /* u29 */ - compatible = "maxim,max15301"; - reg = <0x13>; - }; - max15303@14 { /* u51 */ - compatible = "maxim,max15303"; - reg = <0x14>; - }; - max15303@15 { /* u30 */ - compatible = "maxim,max15303"; - reg = <0x15>; - }; - max15303@16 { /* u102 */ - compatible = "maxim,max15303"; - reg = <0x16>; - }; - max15301@17 { /* u50 */ - compatible = "maxim,max15301"; - reg = <0x17>; - }; - max15301@18 { /* u31 */ - compatible = "maxim,max15301"; - reg = <0x18>; - }; - }; - i2c@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - /* CM_I2C */ - }; - i2c@2 { - #address-cells = <1>; - #size-cells = <0>; - reg = <2>; - /* SYS_EEPROM */ - eeprom: eeprom@54 { /* u101 */ - compatible = "atmel,24c32"; /* 24LC32A */ - reg = <0x54>; - }; - }; - i2c@3 { - #address-cells = <1>; - #size-cells = <0>; - reg = <3>; - /* FMC1 */ - }; - i2c@4 { - #address-cells = <1>; - #size-cells = <0>; - reg = <4>; - /* FMC2 */ - }; - i2c@5 { - #address-cells = <1>; - #size-cells = <0>; - reg = <5>; - /* ANALOG_PMBUS */ - u60: ina226@40 { /* u60 */ - compatible = "ti,ina226"; - #io-channel-cells = <1>; - label = "ina226-u60"; - reg = <0x40>; - shunt-resistor = <1000>; - }; - u61: ina226@41 { /* u61 */ - compatible = "ti,ina226"; - #io-channel-cells = <1>; - label = "ina226-u61"; - reg = <0x41>; - shunt-resistor = <1000>; - }; - u63: ina226@42 { /* u63 */ - compatible = "ti,ina226"; - #io-channel-cells = <1>; - label = "ina226-u63"; - reg = <0x42>; - shunt-resistor = <1000>; - }; - u65: ina226@43 { /* u65 */ - compatible = "ti,ina226"; - #io-channel-cells = <1>; - label = "ina226-u65"; - reg = <0x43>; - shunt-resistor = <1000>; - }; - u64: ina226@44 { /* u64 */ - compatible = "ti,ina226"; - #io-channel-cells = <1>; - label = "ina226-u64"; - reg = <0x44>; - shunt-resistor = <1000>; - }; - }; - i2c@6 { - #address-cells = <1>; - #size-cells = <0>; - reg = <6>; - /* ANALOG_CM_I2C */ - }; - i2c@7 { - #address-cells = <1>; - #size-cells = <0>; - reg = <7>; - /* FMC3 */ - }; - }; }; &gem1 { diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 22ad8d3..b4e2474 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -600,7 +600,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -627,7 +627,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 575ff5b..6f593e8 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -610,7 +610,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -637,7 +637,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu670-revA.dts b/arch/arm/dts/zynqmp-zcu670-revA.dts index edbbf0b..7f70904 100644 --- a/arch/arm/dts/zynqmp-zcu670-revA.dts +++ b/arch/arm/dts/zynqmp-zcu670-revA.dts @@ -131,7 +131,7 @@ clock-frequency = <48000000>; }; - si5381_6: si5381_6 { /* refclk_usb3 - u43 */ + si5381_6: si5381-6 { /* refclk_usb3 - u43 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; @@ -573,7 +573,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -600,7 +600,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp-zcu670-revB.dts b/arch/arm/dts/zynqmp-zcu670-revB.dts index 97599c5..0adb206 100644 --- a/arch/arm/dts/zynqmp-zcu670-revB.dts +++ b/arch/arm/dts/zynqmp-zcu670-revB.dts @@ -131,7 +131,7 @@ clock-frequency = <48000000>; }; - si5381_6: si5381_6 { /* refclk_usb3 - u43 */ + si5381_6: si5381-6 { /* refclk_usb3 - u43 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; @@ -573,7 +573,7 @@ }; }; - pinctrl_i2c0_gpio: i2c0-gpio { + pinctrl_i2c0_gpio: i2c0-gpio-grp { mux { groups = "gpio0_14_grp", "gpio0_15_grp"; function = "gpio0"; @@ -600,7 +600,7 @@ }; }; - pinctrl_i2c1_gpio: i2c1-gpio { + pinctrl_i2c1_gpio: i2c1-gpio-grp { mux { groups = "gpio0_16_grp", "gpio0_17_grp"; function = "gpio0"; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 21be909..63238c0 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -198,7 +198,7 @@ method = "smc"; bootph-all; - zynqmp_power: zynqmp-power { + zynqmp_power: power-management { bootph-all; compatible = "xlnx,zynqmp-power"; interrupt-parent = <&gic>; @@ -258,12 +258,18 @@ efuse_spkid: efuse-spkid@5c { reg = <0x5c 0x4>; }; + efuse_aeskey: efuse-aeskey@60 { + reg = <0x60 0x20>; + }; efuse_ppk0hash: efuse-ppk0hash@a0 { reg = <0xa0 0x30>; }; efuse_ppk1hash: efuse-ppk1hash@d0 { reg = <0xd0 0x30>; }; + efuse_pufuser: efuse-pufuser@100 { + reg = <0x100 0x7F>; + }; }; zynqmp_pcap: pcap { @@ -737,7 +743,7 @@ compatible = "xlnx,zynqmp-ocmc-1.0"; reg = <0x0 0xff960000 0x0 0x1000>; interrupt-parent = <&gic>; - interrupts = <0 10 4>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; }; pcie: pcie@fd0e0000 { @@ -996,7 +1002,7 @@ status = "disabled"; reg = <0x0 0xfe200000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "dwc_usb3", "otg", "hiber"; + interrupt-names = "host", "peripheral", "otg"; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; @@ -1028,7 +1034,7 @@ status = "disabled"; reg = <0x0 0xfe300000 0x0 0x40000>; interrupt-parent = <&gic>; - interrupt-names = "dwc_usb3", "otg", "hiber"; + interrupt-names = "host", "peripheral", "otg"; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/mach-zynqmp-r5/include/mach/sys_r5_proto.h b/arch/arm/mach-zynqmp-r5/include/mach/sys_r5_proto.h new file mode 100644 index 0000000..0f7a47b --- /dev/null +++ b/arch/arm/mach-zynqmp-r5/include/mach/sys_r5_proto.h @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2024, Advanced Micro Devices, Inc. + * Michal Simek <michal.simek@amd.com> + */ diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 12a877c..9641ed3 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -25,6 +25,7 @@ #include <i2c_eeprom.h> #include <net.h> #include <generated/dt.h> +#include <rng.h> #include <slre.h> #include <soc.h> #include <linux/ctype.h> @@ -682,3 +683,51 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size) return reg + size; } #endif + +#ifdef CONFIG_OF_BOARD_SETUP +#define MAX_RAND_SIZE 8 +int ft_board_setup(void *blob, struct bd_info *bd) +{ + size_t n = MAX_RAND_SIZE; + struct udevice *dev; + u8 buf[MAX_RAND_SIZE]; + int nodeoffset, ret; + + if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) { + debug("No RNG device\n"); + return 0; + } + + if (dm_rng_read(dev, buf, n)) { + debug("Reading RNG failed\n"); + return 0; + } + + if (!blob) { + debug("No FDT memory address configured. Please configure\n" + "the FDT address via \"fdt addr <address>\" command.\n" + "Aborting!\n"); + return 0; + } + + ret = fdt_check_header(blob); + if (ret < 0) { + debug("fdt_chosen: %s\n", fdt_strerror(ret)); + return ret; + } + + nodeoffset = fdt_find_or_add_subnode(blob, 0, "chosen"); + if (nodeoffset < 0) { + debug("Reading chosen node failed\n"); + return nodeoffset; + } + + ret = fdt_setprop(blob, nodeoffset, "kaslr-seed", buf, sizeof(buf)); + if (ret < 0) { + debug("Unable to set kaslr-seed on chosen node: %s\n", fdt_strerror(ret)); + return ret; + } + + return 0; +} +#endif diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 59feaaf..9f50090 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -156,9 +156,12 @@ int board_init(void) #if defined(CONFIG_ZYNQMP_FIRMWARE) struct udevice *dev; - uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev); - if (!dev) - panic("PMU Firmware device not found - Enable it"); + uclass_get_device_by_name(UCLASS_FIRMWARE, "power-management", &dev); + if (!dev) { + uclass_get_device_by_name(UCLASS_FIRMWARE, "zynqmp-power", &dev); + if (!dev) + panic("PMU Firmware device not found - Enable it"); + } #endif #if defined(CONFIG_SPL_BUILD) @@ -670,7 +673,7 @@ void set_dfu_alt_info(char *interface, char *devstr) len += snprintf(buf + len, DFU_ALT_BUF_LEN, ";%s raw 0x%x 0x500000", CONFIG_SPL_FS_LOAD_PAYLOAD_NAME, - CONFIG_SYS_SPI_U_BOOT_OFFS); + multiboot * SZ_32K + CONFIG_SYS_SPI_U_BOOT_OFFS); #endif break; default: diff --git a/board/xilinx/zynqmp/zynqmp_kria.env b/board/xilinx/zynqmp/zynqmp_kria.env index 7038453..0f940bd 100644 --- a/board/xilinx/zynqmp/zynqmp_kria.env +++ b/board/xilinx/zynqmp/zynqmp_kria.env @@ -58,9 +58,12 @@ kv260_setup=i2c dev 1 && run usb_hub_init # usb hub init kr260_setup=i2c dev 1 && run usb_hub_init; i2c dev 2 && run usb_hub_init; # usb hub init with enabling PM nodes for ... -kd240_setup=i2c dev 0 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47 +kd240_setup=i2c dev 1 && run usb_hub_init;zynqmp pmufw node 33; zynqmp pmufw node 47 + +tpm_setup=tpm autostart; board_setup=\ if test ${card1_name} = SCK-KV-G; then run kv260_setup; fi;\ if test ${card1_name} = SCK-KR-G; then run kr260_setup; fi;\ -if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi; +if test ${card1_name} = SCK-KD-G; then run kd240_setup; fi;\ +run tpm_setup diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 3d88868..371d14e 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -45,6 +45,9 @@ CONFIG_CMD_USB=y CONFIG_BOOTP_MAY_FAIL=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_NFS=y +CONFIG_CMD_WGET=y +CONFIG_CMD_DNS=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y @@ -68,6 +71,7 @@ CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_BLKMAP=y CONFIG_CLK_VERSAL=y CONFIG_DFU_RAM=y CONFIG_ZYNQ_GPIO=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 2d88315..5f76a30 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -47,6 +47,9 @@ CONFIG_CMD_USB=y CONFIG_BOOTP_MAY_FAIL=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_NFS=y +CONFIG_CMD_WGET=y +CONFIG_CMD_DNS=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y @@ -71,6 +74,7 @@ CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_BLKMAP=y CONFIG_CLK_VERSAL=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_RAM=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 36c59ae..2a99cdb 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -70,6 +70,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_BOOTP_MAY_FAIL=y CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_NFS=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index a65a59c..86741f1 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 CONFIG_SYS_BOOTM_LEN=0x6400000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_OF_BOARD_SETUP=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_PBSIZE=2073 diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 169dd4b..8ac37cc 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -82,6 +82,9 @@ CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_BOOTP_MAY_FAIL=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_NFS=y +CONFIG_CMD_WGET=y +CONFIG_CMD_DNS=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y @@ -119,6 +122,8 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y CONFIG_SATA_CEVA=y +# CONFIG_SPL_BLK is not set +CONFIG_BLKMAP=y CONFIG_BUTTON=y CONFIG_BUTTON_GPIO=y CONFIG_CLK_ZYNQMP=y diff --git a/tools/zynqmpimage.c b/tools/zynqmpimage.c index bb54f41..4db9877 100644 --- a/tools/zynqmpimage.c +++ b/tools/zynqmpimage.c @@ -135,10 +135,59 @@ static int zynqmpimage_verify_header(unsigned char *ptr, int image_size, return 0; } +static struct image_header * +find_partition_image(const struct zynqmp_header *zynqhdr, + const struct partition_header *ph) +{ + struct partition_header *ph_walk; + struct image_header *ih; + int i; + + for_each_zynqmp_image(zynqhdr, ih) { + for_each_zynqmp_part_in_image(zynqhdr, i, ph_walk, ih) { + if (ph == ph_walk) + return ih; + } + } + + return NULL; +} + +static void print_partition_name(const struct zynqmp_header *zynqhdr, + const struct partition_header *ph) +{ + const struct image_header *ih; + size_t word_len; + char *name; + int i; + + ih = find_partition_image(zynqhdr, ph); + if (!ih) + return; + + /* Name is stored in big-endian words, find the terminating word and + * byte-swap into a new buffer + */ + word_len = strlen((char *)ih->image_name); + word_len = ALIGN(word_len + 1, 4); + + name = calloc(1, word_len); + if (!name) + return; + + for (i = 0; i < word_len / 4; i++) + ((uint32_t *)name)[i] = uswap_32(ih->image_name[i]); + + printf(" Image name : %s\n", name); + free(name); +} + static void print_partition(const void *ptr, const struct partition_header *ph) { uint32_t attr = le32_to_cpu(ph->attributes); unsigned long len = le32_to_cpu(ph->len) * 4; + unsigned long len_enc = le32_to_cpu(ph->len_enc) * 4; + unsigned long len_unenc = le32_to_cpu(ph->len_unenc) * 4; const char *part_owner; const char *dest_devs[0x8] = { "none", "PS", "PL", "PMU", "unknown", "unknown", "unknown", @@ -161,8 +210,13 @@ static void print_partition(const void *ptr, const struct partition_header *ph) dest_cpus[(attr & PART_ATTR_DEST_CPU_MASK) >> 8], dest_devs[(attr & PART_ATTR_DEST_DEVICE_MASK) >> 4]); + print_partition_name(ptr, ph); printf(" Offset : 0x%08x\n", le32_to_cpu(ph->offset) * 4); printf(" Size : %lu (0x%lx) bytes\n", len, len); + if (len != len_unenc) + printf(" Size Data : %lu (0x%lx) bytes\n", len_unenc, len_unenc); + if (len_unenc != len_enc) + printf(" Size Enc : %lu (0x%lx) bytes\n", len_unenc, len_unenc); printf(" Load : 0x%08llx", (unsigned long long)le64_to_cpu(ph->load_address)); if (ph->load_address != ph->entry_point) @@ -212,6 +266,7 @@ static void print_partition(const void *ptr, const struct partition_header *ph) void zynqmpimage_print_header(const void *ptr, struct image_tool_params *params) { struct zynqmp_header *zynqhdr = (struct zynqmp_header *)ptr; + struct partition_header *ph; int i; printf("Image Type : Xilinx ZynqMP Boot Image support\n"); @@ -249,25 +304,8 @@ void zynqmpimage_print_header(const void *ptr, struct image_tool_params *params) le32_to_cpu(zynqhdr->register_init[i].data)); } - if (zynqhdr->image_header_table_offset) { - struct image_header_table *iht = (void *)ptr + - zynqhdr->image_header_table_offset; - struct partition_header *ph; - uint32_t ph_offset; - uint32_t next; - int i; - - ph_offset = le32_to_cpu(iht->partition_header_offset) * 4; - ph = (void *)ptr + ph_offset; - for (i = 0; i < le32_to_cpu(iht->nr_parts); i++) { - next = le32_to_cpu(ph->next_partition_offset) * 4; - - /* Partition 0 is the base image itself */ - if (i) - print_partition(ptr, ph); - - ph = (void *)ptr + next; - } + for_each_zynqmp_part(zynqhdr, i, ph) { + print_partition(ptr, ph); } free(dynamic_header); @@ -292,7 +330,7 @@ static int zynqmpimage_check_params(struct image_tool_params *params) return -1; } - return !(params->lflag || params->dflag); + return !(params->lflag || params->dflag || params->outfile); } static int zynqmpimage_check_image_types(uint8_t type) @@ -427,6 +465,39 @@ static void zynqmpimage_set_header(void *ptr, struct stat *sbuf, int ifd, zynqhdr->checksum = zynqmpimage_checksum(zynqhdr); } +static int zynqmpimage_partition_extract(struct zynqmp_header *zynqhdr, + const struct partition_header *ph, + const char *filename) +{ + ulong data = (ulong)zynqmp_get_offset(zynqhdr, ph->offset); + unsigned long len = le32_to_cpu(ph->len_enc) * 4; + + return imagetool_save_subimage(filename, data, len); +} + +/** + * zynqmpimage_extract_contents - retrieve a sub-image component from the image + * @ptr: pointer to the image header + * @params: command line parameters + * + * returns: + * zero in case of success or a negative value if fail. + */ +static int zynqmpimage_extract_contents(void *ptr, struct image_tool_params *params) +{ + struct zynqmp_header *zynqhdr = (struct zynqmp_header *)ptr; + struct partition_header *ph; + int i; + + for_each_zynqmp_part(zynqhdr, i, ph) { + if (i == params->pflag) + return zynqmpimage_partition_extract(ptr, ph, params->outfile); + } + + printf("No partition found\n"); + return -1; +} + static int zynqmpimage_vrec_header(struct image_tool_params *params, struct image_type_params *tparams) { @@ -480,7 +551,7 @@ U_BOOT_IMAGE_TYPE( zynqmpimage_verify_header, zynqmpimage_print_header, zynqmpimage_set_header, - NULL, + zynqmpimage_extract_contents, zynqmpimage_check_image_types, NULL, zynqmpimage_vrec_header diff --git a/tools/zynqmpimage.h b/tools/zynqmpimage.h index ca74898..7c47dc0 100644 --- a/tools/zynqmpimage.h +++ b/tools/zynqmpimage.h @@ -51,6 +51,14 @@ struct image_header_table { uint32_t checksum; /* 0x3c */ }; +struct image_header { + uint32_t next_image_header_offset; /* 0x00 */ + uint32_t corresponding_partition_header; /* 0x04 */ + uint32_t __reserved1; /* 0x08 */ + uint32_t partition_count; /* 0x0c */ + uint32_t image_name[]; /* 0x10 */ +}; + #define PART_ATTR_VEC_LOCATION 0x800000 #define PART_ATTR_BS_BLOCK_SIZE_MASK 0x700000 #define PART_ATTR_BS_BLOCK_SIZE_DEFAULT 0x000000 @@ -135,4 +143,103 @@ struct zynqmp_header { void zynqmpimage_default_header(struct zynqmp_header *ptr); void zynqmpimage_print_header(const void *ptr, struct image_tool_params *params); +static inline struct image_header_table * +zynqmp_get_iht(const struct zynqmp_header *zynqhdr) +{ + if (!zynqhdr->image_header_table_offset) + return NULL; + return (struct image_header_table *)((void *)zynqhdr + zynqhdr->image_header_table_offset); +} + +static inline void *zynqmp_get_offset(const struct zynqmp_header *zynqhdr, + uint32_t offset) +{ + uint32_t offset_cpu = le32_to_cpu(offset); + + if (!offset_cpu) + return NULL; + return (void *)zynqhdr + offset_cpu * 4; +} + +static inline struct partition_header * +zynqmp_part_first(const struct zynqmp_header *zynqhdr) +{ + struct image_header_table *iht; + + iht = zynqmp_get_iht(zynqhdr); + if (!iht) + return NULL; + + return zynqmp_get_offset(zynqhdr, iht->partition_header_offset); +} + +static inline struct partition_header * +zynqmp_part_next(const struct zynqmp_header *zynqhdr, + const struct partition_header *ph) +{ + return zynqmp_get_offset(zynqhdr, ph->next_partition_offset); +} + +static inline size_t zynqmp_part_count(const struct zynqmp_header *zynqhdr) +{ + struct image_header_table *iht; + + iht = zynqmp_get_iht(zynqhdr); + if (!iht) + return 0; + + return le32_to_cpu(iht->nr_parts); +} + +#define _for_each_zynqmp_part(_zynqhdr, _iter, _ph, _start, _count) \ + for (_iter = 0, _ph = _start; \ + _iter < (_count) && _ph; \ + _iter++, _ph = zynqmp_part_next(_zynqhdr, _ph)) + +#define for_each_zynqmp_part(_zynqhdr, _iter, _ph) \ + _for_each_zynqmp_part(_zynqhdr, _iter, _ph, \ + zynqmp_part_first(_zynqhdr), \ + zynqmp_part_count(_zynqhdr)) + +static inline struct partition_header * +zynqmp_part_in_image_first(const struct zynqmp_header *zynqhdr, + const struct image_header *ih) +{ + return zynqmp_get_offset(zynqhdr, ih->corresponding_partition_header); +} + +static inline size_t zynqmp_part_in_image_count(const struct image_header *ih) +{ + return le32_to_cpu(ih->partition_count); +} + +#define for_each_zynqmp_part_in_image(_zynqhdr, _iter, _ph, _ih) \ + _for_each_zynqmp_part(_zynqhdr, _iter, _ph, \ + zynqmp_part_in_image_first(_zynqhdr, _ih), \ + zynqmp_part_in_image_count(_ih)) + +static inline struct image_header * +zynqmp_image_first(const struct zynqmp_header *zynqhdr) +{ + struct image_header_table *iht; + + iht = zynqmp_get_iht(zynqhdr); + if (!iht) + return NULL; + + return zynqmp_get_offset(zynqhdr, iht->image_header_offset); +} + +static inline struct image_header * +zynqmp_image_next(const struct zynqmp_header *zynqhdr, + const struct image_header *ih) +{ + return zynqmp_get_offset(zynqhdr, ih->next_image_header_offset); +} + +#define for_each_zynqmp_image(_zynqhdr, _ih) \ + for (_ih = zynqmp_image_first(_zynqhdr); \ + _ih; \ + _ih = zynqmp_image_next(_zynqhdr, _ih)) + #endif /* _ZYNQMPIMAGE_H_ */ |