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-rw-r--r--arch/arm/lib/cache-cp15.c12
-rw-r--r--arch/microblaze/cpu/cache.c18
-rw-r--r--board/armltd/integrator/integrator.c2
-rw-r--r--board/cobra5272/flash.c12
-rw-r--r--include/common.h2
-rw-r--r--post/lib_powerpc/cpu.c6
6 files changed, 28 insertions, 24 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 47c2239..8ca8e48 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -253,17 +253,17 @@ static void cache_disable(uint32_t cache_bit)
#endif
#if CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
-void icache_enable (void)
+void icache_enable(void)
{
return;
}
-void icache_disable (void)
+void icache_disable(void)
{
return;
}
-int icache_status (void)
+int icache_status(void)
{
return 0; /* always off */
}
@@ -285,17 +285,17 @@ int icache_status(void)
#endif
#if CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-void dcache_enable (void)
+void dcache_enable(void)
{
return;
}
-void dcache_disable (void)
+void dcache_disable(void)
{
return;
}
-int dcache_status (void)
+int dcache_status(void)
{
return 0; /* always off */
}
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index eebeb37..9411455 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -8,7 +8,7 @@
#include <common.h>
#include <asm/asm.h>
-int dcache_status (void)
+int dcache_status(void)
{
int i = 0;
int mask = 0x80;
@@ -18,7 +18,7 @@ int dcache_status (void)
return i;
}
-int icache_status (void)
+int icache_status(void)
{
int i = 0;
int mask = 0x20;
@@ -28,28 +28,32 @@ int icache_status (void)
return i;
}
-void icache_enable (void) {
+void icache_enable(void)
+{
MSRSET(0x20);
}
-void icache_disable(void) {
+void icache_disable(void)
+{
/* we are not generate ICACHE size -> flush whole cache */
flush_cache(0, 32768);
MSRCLR(0x20);
}
-void dcache_enable (void) {
+void dcache_enable(void)
+{
MSRSET(0x80);
}
-void dcache_disable(void) {
+void dcache_disable(void)
+{
#ifdef XILINX_USE_DCACHE
flush_cache(0, XILINX_DCACHE_BYTE_SIZE);
#endif
MSRCLR(0x80);
}
-void flush_cache (ulong addr, ulong size)
+void flush_cache(ulong addr, ulong size)
{
int i;
for (i = 0; i < size; i += 4)
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index 0a2baa7..f0fbe2b 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -109,7 +109,7 @@ extern void cm_remap(void);
writel(SC_CTRL_FLASHVPP | SC_CTRL_FLASHWP, SC_CTRLS);
#endif
- icache_enable ();
+ icache_enable();
return 0;
}
diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
index e5edc2a..9bf8248 100644
--- a/board/cobra5272/flash.c
+++ b/board/cobra5272/flash.c
@@ -164,8 +164,8 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
* chip is in programming mode.
*/
- cflag = icache_status ();
- icache_disable ();
+ cflag = icache_status();
+ icache_disable();
iflag = disable_interrupts ();
printf ("\n");
@@ -237,7 +237,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
enable_interrupts ();
if (cflag)
- icache_enable ();
+ icache_enable();
return rc;
}
@@ -267,8 +267,8 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
* chip is in programming mode.
*/
- cflag = icache_status ();
- icache_disable ();
+ cflag = icache_status();
+ icache_disable();
iflag = disable_interrupts ();
MEM_FLASH_ADDR1 = CMD_UNLOCK1;
@@ -303,7 +303,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
enable_interrupts ();
if (cflag)
- icache_enable ();
+ icache_enable();
return rc;
}
diff --git a/include/common.h b/include/common.h
index 3f6a95d..82b1abe 100644
--- a/include/common.h
+++ b/include/common.h
@@ -189,7 +189,7 @@ int testdram(void);
int icache_status (void);
void icache_enable (void);
void icache_disable(void);
-int dcache_status (void);
+int dcache_status(void);
void dcache_enable (void);
void dcache_disable(void);
void mmu_disable(void);
diff --git a/post/lib_powerpc/cpu.c b/post/lib_powerpc/cpu.c
index 109be38..6713039 100644
--- a/post/lib_powerpc/cpu.c
+++ b/post/lib_powerpc/cpu.c
@@ -57,12 +57,12 @@ ulong cpu_post_makecr (long v)
int cpu_post_test (int flags)
{
- int ic = icache_status ();
+ int ic = icache_status();
int ret = 0;
WATCHDOG_RESET();
if (ic)
- icache_disable ();
+ icache_disable();
if (ret == 0)
ret = cpu_post_test_cmp ();
@@ -110,7 +110,7 @@ int cpu_post_test (int flags)
WATCHDOG_RESET();
if (ic)
- icache_enable ();
+ icache_enable();
WATCHDOG_RESET();