diff options
62 files changed, 796 insertions, 492 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b3115b0..bdd535f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -798,6 +798,8 @@ config ARCH_K3 select SPL select SUPPORT_SPL select FIT + select REGEX + select FIT_SIGNATURE if ARM64 config ARCH_OMAP2PLUS bool "TI OMAP2+" diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi index b468d95..a35d641 100644 --- a/arch/arm/dts/k3-am625-sk-binman.dtsi +++ b/arch/arm/dts/k3-am625-sk-binman.dtsi @@ -145,7 +145,7 @@ #define SPL_AM625_SK_DTB "spl/dts/k3-am625-sk.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define AM625_SK_DTB "arch/arm/dts/k3-am625-sk.dtb" +#define AM625_SK_DTB "u-boot.dtb" &binman { ti-dm { diff --git a/arch/arm/dts/k3-am62a-sk-binman.dtsi b/arch/arm/dts/k3-am62a-sk-binman.dtsi index a79d3f1..de09430 100644 --- a/arch/arm/dts/k3-am62a-sk-binman.dtsi +++ b/arch/arm/dts/k3-am62a-sk-binman.dtsi @@ -148,7 +148,7 @@ #define SPL_AM62A7_SK_DTB "spl/dts/k3-am62a7-sk.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define AM62A7_SK_DTB "arch/arm/dts/k3-am62a7-sk.dtb" +#define AM62A7_SK_DTB "u-boot.dtb" &binman { ti-dm { diff --git a/arch/arm/dts/k3-am64x-binman.dtsi b/arch/arm/dts/k3-am64x-binman.dtsi index 26e17bd..a5e5400 100644 --- a/arch/arm/dts/k3-am64x-binman.dtsi +++ b/arch/arm/dts/k3-am64x-binman.dtsi @@ -123,7 +123,7 @@ #define SPL_AM642_SK_DTB "spl/dts/k3-am642-sk.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define AM642_EVM_DTB "arch/arm/dts/k3-am642-evm.dtb" +#define AM642_EVM_DTB "u-boot.dtb" #define AM642_SK_DTB "arch/arm/dts/k3-am642-sk.dtb" &binman { diff --git a/arch/arm/dts/k3-am65x-binman.dtsi b/arch/arm/dts/k3-am65x-binman.dtsi index 4bf0845..59605ca 100644 --- a/arch/arm/dts/k3-am65x-binman.dtsi +++ b/arch/arm/dts/k3-am65x-binman.dtsi @@ -210,7 +210,7 @@ #define SPL_AM654_EVM_DTB "spl/dts/k3-am654-base-board.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define AM654_EVM_DTB "arch/arm/dts/k3-am654-base-board.dtb" +#define AM654_EVM_DTB "u-boot.dtb" &binman { ti-spl { diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index 613aca5..14f7dea 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -184,7 +184,7 @@ #define SPL_J7200_EVM_DTB "spl/dts/k3-j7200-common-proc-board.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define J7200_EVM_DTB "arch/arm/dts/k3-j7200-common-proc-board.dtb" +#define J7200_EVM_DTB "u-boot.dtb" &binman { ti-dm { diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi index 7fb63d6..4f566c2 100644 --- a/arch/arm/dts/k3-j721e-binman.dtsi +++ b/arch/arm/dts/k3-j721e-binman.dtsi @@ -299,7 +299,7 @@ #define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb" +#define J721E_EVM_DTB "u-boot.dtb" #define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb" &binman { diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi b/arch/arm/dts/k3-j721s2-binman.dtsi index 1671217..5bca4e9 100644 --- a/arch/arm/dts/k3-j721s2-binman.dtsi +++ b/arch/arm/dts/k3-j721s2-binman.dtsi @@ -146,7 +146,7 @@ #define SPL_AM68_SK_DTB "spl/dts/k3-am68-sk-base-board.dtb" #define UBOOT_NODTB "u-boot-nodtb.bin" -#define J721S2_EVM_DTB "arch/arm/dts/k3-j721s2-common-proc-board.dtb" +#define J721S2_EVM_DTB "u-boot.dtb" #define AM68_SK_DTB "arch/arm/dts/k3-am68-sk-base-board.dtb" &binman { diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index bae0a82..bf1c3c5 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -52,7 +52,7 @@ config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE config SYS_K3_MCU_SCRATCHPAD_BASE hex default 0x40280000 if SOC_K3_AM654 - default 0x40280000 if SOC_K3_J721S2 + default 0x41cff9fc if SOC_K3_J721S2 default 0x41cff9fc if SOC_K3_J721E help Describes the base address of MCU Scratchpad RAM. diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c index 450c7b7..a351104 100644 --- a/arch/arm/mach-k3/common.c +++ b/arch/arm/mach-k3/common.c @@ -497,8 +497,7 @@ static void remove_fwl_regions(struct fwl_data fwl_data, size_t num_regions, /* Don't disable the background regions */ if (region.control != 0 && - ((region.control & K3_FIREWALL_BACKGROUND_BIT) == - fwl_type)) { + ((region.control >> K3_FIREWALL_BACKGROUND_BIT) & 1) == fwl_type) { pr_debug("Attempting to disable firewall %5d (%25s)\n", region.fwl_id, fwl_data.name); region.control = 0; diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h index 6cffbd4..9bd9ad6 100644 --- a/arch/arm/mach-k3/common.h +++ b/arch/arm/mach-k3/common.h @@ -9,7 +9,7 @@ #include <asm/armv7_mpu.h> #include <asm/hardware.h> -#define K3_FIREWALL_BACKGROUND_BIT BIT(8) +#define K3_FIREWALL_BACKGROUND_BIT (8) struct fwl_data { const char *name; diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c index 02a2c12..6038c96 100644 --- a/arch/arm/mach-k3/security.c +++ b/arch/arm/mach-k3/security.c @@ -91,8 +91,9 @@ void ti_secure_image_post_process(void **p_image, size_t *p_size) return; } - if (get_device_type() != K3_DEVICE_TYPE_HS_SE && - get_device_type() != K3_DEVICE_TYPE_HS_FS) + if (get_device_type() == K3_DEVICE_TYPE_GP && + (get_device_type() != K3_DEVICE_TYPE_HS_SE && + !ti_secure_cert_detected(*p_image))) return; /* Clean out image so it can be seen by system firmware */ diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig index 897765c..2baba22 100644 --- a/arch/riscv/cpu/generic/Kconfig +++ b/arch/riscv/cpu/generic/Kconfig @@ -6,6 +6,7 @@ config GENERIC_RISCV bool select BINMAN if SPL select ARCH_EARLY_INIT_R + select SYS_CACHE_SHIFT_6 imply CPU imply CPU_RISCV imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index dad22bf..59d58a5 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -91,16 +91,35 @@ _start: * Set stackpointer in internal/ex RAM to call board_init_f */ call_board_init_f: - li t0, -16 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) - li t1, CONFIG_SPL_STACK + li t0, CONFIG_SPL_STACK #else - li t1, SYS_INIT_SP_ADDR + li t0, SYS_INIT_SP_ADDR #endif - and sp, t1, t0 /* force 16 byte alignment */ + and t0, t0, -16 /* force 16 byte alignment */ + + /* setup stack */ +#if CONFIG_IS_ENABLED(SMP) + /* tp: hart id */ + slli t1, tp, CONFIG_STACK_SIZE_SHIFT + sub sp, t0, t1 +#else + mv sp, t0 +#endif +/* + * Now sp points to the right stack belonging to current CPU. + * It's essential before any function call, otherwise, we get data-race. + */ call_board_init_f_0: - mv a0, sp + /* find top of reserve space */ +#if CONFIG_IS_ENABLED(SMP) + li t1, CONFIG_NR_CPUS +#else + li t1, 1 +#endif + slli t1, t1, CONFIG_STACK_SIZE_SHIFT + sub a0, t0, t1 /* t1 -> size of all CPU stacks */ jal board_init_f_alloc_reserve /* @@ -109,14 +128,6 @@ call_board_init_f_0: */ mv s0, a0 - /* setup stack */ -#if CONFIG_IS_ENABLED(SMP) - /* tp: hart id */ - slli t0, tp, CONFIG_STACK_SIZE_SHIFT - sub sp, a0, t0 -#else - mv sp, a0 -#endif /* Configure proprietary settings and customized CSRs of harts */ call_harts_early_init: diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi index 710b082..b90e7f8 100644 --- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi @@ -313,9 +313,9 @@ <&syscrg JH7110_SYSCLK_BUS_ROOT>, <&syscrg JH7110_SYSCLK_PERH_ROOT>, <&syscrg JH7110_SYSCLK_QSPI_REF>; - assigned-clock-parents = <&syscrg JH7110_SYSCLK_PLL0_OUT>, - <&syscrg JH7110_SYSCLK_PLL2_OUT>, - <&syscrg JH7110_SYSCLK_PLL2_OUT>, + assigned-clock-parents = <&pllclk JH7110_SYSCLK_PLL0_OUT>, + <&pllclk JH7110_SYSCLK_PLL2_OUT>, + <&pllclk JH7110_SYSCLK_PLL2_OUT>, <&syscrg JH7110_SYSCLK_QSPI_REF_SRC>; assigned-clock-rates = <0>, <0>, <0>, <0>; }; diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi index c221195..2f560e7 100644 --- a/arch/riscv/dts/jh7110-u-boot.dtsi +++ b/arch/riscv/dts/jh7110-u-boot.dtsi @@ -83,7 +83,6 @@ &syscrg { bootph-pre-ram; - starfive,sys-syscon = <&sys_syscon>; }; &stgcrg { diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index 58e332e..825fbb7 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -487,19 +487,29 @@ <&gmac1_rgmii_rxin>, <&i2stx_bclk_ext>, <&i2stx_lrck_ext>, <&i2srx_bclk_ext>, <&i2srx_lrck_ext>, - <&tdm_ext>, <&mclk_ext>; + <&tdm_ext>, <&mclk_ext>, + <&pllclk JH7110_SYSCLK_PLL0_OUT>, + <&pllclk JH7110_SYSCLK_PLL1_OUT>, + <&pllclk JH7110_SYSCLK_PLL2_OUT>; clock-names = "osc", "gmac1_rmii_refin", "gmac1_rgmii_rxin", "i2stx_bclk_ext", "i2stx_lrck_ext", "i2srx_bclk_ext", "i2srx_lrck_ext", - "tdm_ext", "mclk_ext"; + "tdm_ext", "mclk_ext", + "pll0_out", "pll1_out", "pll2_out"; #clock-cells = <1>; #reset-cells = <1>; }; sys_syscon: sys_syscon@13030000 { - compatible = "starfive,jh7110-sys-syscon","syscon"; + compatible = "starfive,jh7110-sys-syscon","syscon", "simple-mfd"; reg = <0x0 0x13030000 0x0 0x1000>; + + pllclk: clock-controller { + compatible = "starfive,jh7110-pll"; + clocks = <&osc>; + #clock-cells = <1>; + }; }; sysgpio: pinctrl@13040000 { diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env index 8c1c26e..491ec97 100644 --- a/board/ti/am62ax/am62ax.env +++ b/board/ti/am62ax/am62ax.env @@ -1,7 +1,7 @@ #include <environment/ti/ti_armv7_common.env> #include <environment/ti/mmc.env> -default_device_tree=k3-am62a7-sk.dtb +default_device_tree=ti/k3-am62a7-sk.dtb findfdt= setenv name_fdt ${default_device_tree}; setenv fdtfile ${name_fdt} @@ -17,7 +17,6 @@ bootpart=1:2 bootdir=/boot rd_spec=- init_mmc=run args_all args_mmc -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} get_overlay_mmc= fdt address ${fdtaddr}; fdt resize 0x100000; diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env index 5ac15fd..0901a85 100644 --- a/board/ti/am62x/am62x.env +++ b/board/ti/am62x/am62x.env @@ -1,7 +1,7 @@ #include <environment/ti/ti_armv7_common.env> #include <environment/ti/mmc.env> -default_device_tree=k3-am625-sk.dtb +default_device_tree=ti/k3-am625-sk.dtb findfdt= setenv name_fdt ${default_device_tree}; setenv fdtfile ${name_fdt} @@ -17,7 +17,6 @@ bootpart=1:2 bootdir=/boot rd_spec=- init_mmc=run args_all args_mmc -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} get_overlay_mmc= fdt address ${fdtaddr}; fdt resize 0x100000; diff --git a/board/ti/am64x/am64x.env b/board/ti/am64x/am64x.env index c3960be..015f63a 100644 --- a/board/ti/am64x/am64x.env +++ b/board/ti/am64x/am64x.env @@ -4,11 +4,12 @@ findfdt= if test $board_name = am64x_gpevm; then - setenv name_fdt k3-am642-evm.dtb; fi; + setenv name_fdt ti/k3-am642-evm.dtb; fi; if test $board_name = am64x_skevm; then - setenv name_fdt k3-am642-sk.dtb; fi; + setenv name_fdt ti/k3-am642-sk.dtb; fi; if test $name_fdt = undefined; then echo WARNING: Could not determine device tree to use; fi; + setenv fdtfile ${name_fdt} name_kern=Image console=ttyS2,115200n8 args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 ${mtdparts} @@ -20,7 +21,6 @@ bootpart=1:2 bootdir=/boot rd_spec=- init_mmc=run args_all args_mmc -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} get_overlay_mmc= fdt address ${fdtaddr}; fdt resize 0x100000; diff --git a/board/ti/am65x/am65x.env b/board/ti/am65x/am65x.env index a048b47..d7130cc 100644 --- a/board/ti/am65x/am65x.env +++ b/board/ti/am65x/am65x.env @@ -6,7 +6,7 @@ #endif findfdt= - setenv name_fdt k3-am654-base-board.dtb; + setenv name_fdt ti/k3-am654-base-board.dtb; setenv fdtfile ${name_fdt} name_kern=Image console=ttyS2,115200n8 @@ -20,7 +20,6 @@ bootpart=1:2 bootdir=/boot rd_spec=- init_mmc=run args_all args_mmc -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} get_overlay_mmc= fdt address ${fdtaddr}; fdt resize 0x100000; diff --git a/board/ti/j721e/j721e.env b/board/ti/j721e/j721e.env index c181741..23ce7e1 100644 --- a/board/ti/j721e/j721e.env +++ b/board/ti/j721e/j721e.env @@ -7,15 +7,15 @@ #include <environment/ti/k3_rproc.env> #endif -default_device_tree=k3-j721e-common-proc-board.dtb +default_device_tree=ti/k3-j721e-common-proc-board.dtb findfdt= setenv name_fdt ${default_device_tree}; if test $board_name = j721e; then - setenv name_fdt k3-j721e-common-proc-board.dtb; fi; + setenv name_fdt ti/k3-j721e-common-proc-board.dtb; fi; if test $board_name = j7200; then - setenv name_fdt k3-j7200-common-proc-board.dtb; fi; + setenv name_fdt ti/k3-j7200-common-proc-board.dtb; fi; if test $board_name = j721e-eaik || test $board_name = j721e-sk; then - setenv name_fdt k3-j721e-sk.dtb; fi; + setenv name_fdt ti/k3-j721e-sk.dtb; fi; setenv fdtfile ${name_fdt} name_kern=Image console=ttyS2,115200n8 @@ -37,7 +37,6 @@ bootpart=1:2 bootdir=/boot rd_spec=- init_mmc=run args_all args_mmc -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} get_overlay_mmc= fdt address ${fdtaddr}; fdt resize 0x100000; diff --git a/board/ti/j721s2/j721s2.env b/board/ti/j721s2/j721s2.env index f446777..9464fe4 100644 --- a/board/ti/j721s2/j721s2.env +++ b/board/ti/j721s2/j721s2.env @@ -7,13 +7,13 @@ #include <environment/ti/k3_rproc.env> #endif -default_device_tree=k3-j721s2-common-proc-board.dtb +default_device_tree=ti/k3-j721s2-common-proc-board.dtb findfdt= setenv name_fdt ${default_device_tree}; if test $board_name = j721s2; then \ - setenv name_fdt k3-j721s2-common-proc-board.dtb; fi; + setenv name_fdt ti/k3-j721s2-common-proc-board.dtb; fi; if test $board_name = am68-sk; then - setenv name_fdt k3-am68-sk-base-board.dtb; fi; + setenv name_fdt ti/k3-am68-sk-base-board.dtb; fi; setenv fdtfile ${name_fdt} name_kern=Image console=ttyS2,115200n8 @@ -31,7 +31,6 @@ name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw #endif rd_spec=- init_mmc=run args_all args_mmc -get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt} get_overlay_mmc= fdt address ${fdtaddr}; fdt resize 0x100000; diff --git a/board/ti/keys/custMpk.crt b/board/ti/keys/custMpk.crt new file mode 100644 index 0000000..01bd64a --- /dev/null +++ b/board/ti/keys/custMpk.crt @@ -0,0 +1,33 @@ +-----BEGIN CERTIFICATE----- +MIIFwzCCA6sCFHKW0ueol0+vsilVaZyqKhppo9ryMA0GCSqGSIb3DQEBCwUAMIGd +MQswCQYDVQQGEwJVUzELMAkGA1UECAwCVFgxDzANBgNVBAcMBkRhbGxhczEnMCUG +A1UECgweVGV4YXMgSW5zdHJ1bWVudHMgSW5jb3Jwb3JhdGVkMRMwEQYDVQQLDApQ +cm9jZXNzb3JzMRMwEQYDVQQDDApUSSBTdXBwb3J0MR0wGwYJKoZIhvcNAQkBFg5z +dXBwb3J0QHRpLmNvbTAeFw0yMzA2MDEwNTIxMTZaFw0zMzA1MjkwNTIxMTZaMIGd +MQswCQYDVQQGEwJVUzELMAkGA1UECAwCVFgxDzANBgNVBAcMBkRhbGxhczEnMCUG +A1UECgweVGV4YXMgSW5zdHJ1bWVudHMgSW5jb3Jwb3JhdGVkMRMwEQYDVQQLDApQ +cm9jZXNzb3JzMRMwEQYDVQQDDApUSSBTdXBwb3J0MR0wGwYJKoZIhvcNAQkBFg5z +dXBwb3J0QHRpLmNvbTCCAiIwDQYJKoZIhvcNAQEBBQADggIPADCCAgoCggIBAL8U +rknYf3LTayPN60gOZdwiTfIOT4L27bXy3dt8kfpuWf/V97beBB2KzNKV2dHgxMH4 +UL//SAyRIlCaTHuL85YKKCazpNngqVVBGvs+Wydsv8rAca8vciLuRgElYq0+xwT2 +sRi2LMASbg/imz7lpqCoBkUDQRdOFh+pdNaETtZ5pxC4EakOkh8l3X+x8tG58mjY +M1lLgn13zNGc+iO0+1iI8s3q1RbyLHUt+mLDwQlu4AZw4LUHCZli2dbk52xtyIIH +UJP34tjt0V/j0J7Pk1TZX91dzjdg8asUigR7Zae6f99FRXxLoVuuTsaUPYxOh9KU +PKTzn9r88jZ85w2tWkI38SqB0G6hp2cDHoftALtzSmgoMaKCmqMEweiH/0V+qsGf +1DsFx4P9IXH+vX84yRYZUg7mAzONHR7JNhzNTp2CKYjNmyq+bF97srI6eQBqffWt +Gp0ezVgqz170ToCrO0/d+NTeNKLEINlZGS2FAl4faLFMjbkRBuktdrVYjFCoN25m +eG+DMEZNNJ+0GEq5u/p7xa7WMhCEhGw/moAzNfxNvNVuYFRQz35tgJcE+o8LIP29 +mCuhN71Z/UrsRaEJixfJchQztwVeEl3iWh3OIVT24erVVaon600J3xlAgi5miRdl +2W6z1jhOjWEW1nTU3hZfURnVQriD0sjeS6lpl7aNAgMBAAEwDQYJKoZIhvcNAQEL +BQADggIBAHy+h1FQKedFTJWgqGJkTwtcym5LyXD6ig8LyhJpVEbXmqK7ZKY2F2hB +PqVbfCZNogszIvl8q3ykz+tcGbfBk3rq+KMUwbk5E29mSMmAJ9DNNozudgKkKq9w +RmcO1bXCEspFgNvNEkYAQCBvMOyH/nCyFu9QzOzN35XIzf0fI3jM6rueLxSXq3xO +7yHUZ3mzAZp6e1Qo6cuABAw1q6KqKYJCnJ3Nq6F42bmGp8mSD+2AuGV8cU+7Z3sh +k/ooFMCsulj1R5+TlKgEfqspQXbefEsvRW3n3ZD8bcQF0ytiX7XVmDMFVpQkTzps +92fjZ08Zcj7bCZQsFXXACIQkMiTiiMW6NwLFZDyq11/B1oe1bhjFUuqqUkHC/PKx +gdWRwluGRt+onFRD5/upXnugKT99j/hQ7sy80a64A1xoCcKVbwcHU7YBQG1vLk6D +idg0vI3gj7v+/jZEPkv/KrqAI6YuvpplkcHkEKuAUFAkozvVJ5pPK3K0xHBJGNMK +kJ9FMAakFj6jfZaR5Ay3ZuOAn5oPMwd6RaauNOzVpBll6DFOyw2rU6fbId/gi841 +drmBfM6ufue6ecslkp9zSOpPLXhjt2g9NRVKPE20CmRetVSDLcMFet7ZImbxqggw +yjDxA7oR+Px+o+xr+djcDlfj6500Rys6W1SNHe99HXOCcpQqivX0 +-----END CERTIFICATE----- diff --git a/board/ti/keys/custMpk.key b/board/ti/keys/custMpk.key new file mode 100644 index 0000000..adba378 --- /dev/null +++ b/board/ti/keys/custMpk.key @@ -0,0 +1,51 @@ +-----BEGIN RSA PRIVATE KEY----- +MIIJKQIBAAKCAgEAvxSuSdh/ctNrI83rSA5l3CJN8g5PgvbttfLd23yR+m5Z/9X3 +tt4EHYrM0pXZ0eDEwfhQv/9IDJEiUJpMe4vzlgooJrOk2eCpVUEa+z5bJ2y/ysBx +ry9yIu5GASVirT7HBPaxGLYswBJuD+KbPuWmoKgGRQNBF04WH6l01oRO1nmnELgR +qQ6SHyXdf7Hy0bnyaNgzWUuCfXfM0Zz6I7T7WIjyzerVFvIsdS36YsPBCW7gBnDg +tQcJmWLZ1uTnbG3IggdQk/fi2O3RX+PQns+TVNlf3V3ON2DxqxSKBHtlp7p/30VF +fEuhW65OxpQ9jE6H0pQ8pPOf2vzyNnznDa1aQjfxKoHQbqGnZwMeh+0Au3NKaCgx +ooKaowTB6If/RX6qwZ/UOwXHg/0hcf69fzjJFhlSDuYDM40dHsk2HM1OnYIpiM2b +Kr5sX3uysjp5AGp99a0anR7NWCrPXvROgKs7T9341N40osQg2VkZLYUCXh9osUyN +uREG6S12tViMUKg3bmZ4b4MwRk00n7QYSrm7+nvFrtYyEISEbD+agDM1/E281W5g +VFDPfm2AlwT6jwsg/b2YK6E3vVn9SuxFoQmLF8lyFDO3BV4SXeJaHc4hVPbh6tVV +qifrTQnfGUCCLmaJF2XZbrPWOE6NYRbWdNTeFl9RGdVCuIPSyN5LqWmXto0CAwEA +AQKCAgAzkAwcJ0z1GnId/lJQZno8NhGckRoJuEKbR8dwlCP8VUz6Ca5H7Y9kvXDa +Hs/hn+rYgP6hYOz7XyrIX2rmJ/T6dxEwqGeC1+o59FConcIRWHpE5zuGT6JYJL5F +TuZa48bm4v8VMQvQZOjIZpkIFwao8c6HTwKAnHTB5IN/48I2hCt+Cn3RhfoOZ7Rm +4gkpaSkt+7GXlhXHb82YfujNO+hbktEamhUYlQ9EK70Wa8aqmf3gHxO0JgsEFjW8 +lJaSnultlTW8SDcx3LMUUjCYumECk4oX/VlJfmKYjPlVjkr3QQ+Cm3nNucb4K4hc +c+JL+2ERhSj8RjXL7VgbNgdPnIjvQDJuTNqecTU8xWPYrkOLQpNibbLjnutLkhJz +fMyRtmDtrsey8WiCDuCHkPJ8/f8RjL2zWI9fzTDDIzdlEKouUFGOovaHVnbua6pn +hymcu9d9FV3p2rcbj0ivCs7e8j+vhSxFJEJoAbcQdXCTi/n2uR7pLtoMNiUzsejy +d46Uz+KEU920NTwE2z6JJq8I2vegnxjc7PDDrV3/5rK04B93aXiqvwWseCpxelrI +xaMkRHbXrIXRO6MXQ3N+zNq8Dg3hjGTTvaBKuwgvqLwlXY8+Aa3ooFzEOInIOSsI +XcWqXxt/tgZgsj9RwpC42t8kbA+BkbNk9EIUa+P5kEr2P/fO7QKCAQEA4EtArnOX +D6tQF8uTw8USOZC2P9s/ez1z4jRq3oKP0Kv4tJiuIObJ/dUvGVD7aM5v2xaCfhm8 +xpk09VPUgghfG5jR5qVvQr75kCNToJQudWi4ngk1HwKJzzTO11giFEdybvTUA+Pj +fmxCM0dYYqRWZoj0hLqXlUCwxE74BFIhJVjeYbf+nTQrqpllTLoW7MTZHzGx5SXx +4dNzyVAUH49Yt2D8mgXXCkf5sGLh762wj34b/rR10Kr4O5utGMZrfTRIbuQ1pNjU +m66baPzq+mC0BzqZEW70TgEb7lOr8rcVXLOi3r36omfd9/MHx7iZD6o3K1axSO15 +grD4ZrN7Ac3QJwKCAQEA2heCoBdpvy6YUk8AO2k8qDygTdmPQRuwjjT+Z2fMslBt +D7DkpKwZ6Bl9OclcpiiLHmH+hv65KqYg+tR0RRb7PcogB9El9x7yKkGTPZEYWGky +n8P84rJpKwjnwWQvPQktI1cs3YGvZA9DQTFBavRrwuzgd1oSJq5aPQ2tme0kMvWp +l1/B/cPK+PKCi/Wfisaze1TjijP9qIeUwkdNN6WLrLU3QgsGppcg2I7RQtAIikT6 +GkuiOQAvWMsrJVV6PNrVKz4fJDJ59Rz6jbDHZNi1MEYNxQoB/Pl7QIakbfjWpHLv +8Ey7cB2JKxjQy8tmyl8WNQVbXbE6daPXcMTUmaRAKwKCAQBv1lYMJmq+T2eCVen6 +BbvOpE+bi5EdvEiaFBTtmiBnpjg+pJq+oRU60h/H+c9CNR0lGxY6Fk9An4f+g6xE +ojP6KLsQzJCrsVny+wpp2TlJJcxYULMCIVvhy60PR0zG29E9biqBPhJjKUvhEcQK +e3LxcXyq6fdHXphFajLUxLbuTl+kTgBRFoBnclFGbsubh5PTsA3J+p+fQLZNPPar +veg4l82cZykQYU8pGkUaI3sUMYd3+zd7sqRP5JHs9pMGPRmY4YW2CsAIWIn5UZNB +ARMDP76vKKn8cyUgMuxb+9pU/OVLN2NPs4bEaZQJjAwV+YPEwldny7F47xEM9JVz +EtKlAoIBAQDUt62u3GdGE/p5/ZgqWoDRTyDEDfmN9aYFbmbdEP80xQE7FrxMaZhz +K7laja6SWmUm40nQ/c45bQQp4uLtKHcxU15egX7YRBTLZl5o5IasZR79ebnEm2O8 +l9kEZeU1USf3mmWmP4GExOZCRfqaiYA6BbUCdJXTqKdXeWnkAssV8UrS3JFoJHpq +yo7OWGqefyQ8nRW6jO9SW7uaqtUD+7H6aF5XSk3YWvusfdBZrHNH+fM/hpnZovaL +Us7ogTDS/laA8PyK37jYfMVdQhmZoU1Iomt3zkUWK3gt/aWPpfAlQf4Jka4YspZB +tNiijefaZ1hPqsPs5Joyd/YAhdsfaHc1AoIBAQCn/9j6RRjRaw0ip756oad4AXHz +XBwVB2CrY96qT6Hj9Sq7tGgdskqGkOQkAivBLBizUdcWv0t1yenOsSgasQeMlvlh +B8md9cLvpKXPB3HM3rTDH/xNXe0TpVKLf7SXC8HfDyIweHwMW3QgO2DWrvI4BV/T +ckBatRNQ90HxkqGFhC/Mp529lQlyg3ifxPxJsvZOyPMUnrflAvsKQk5c2ZiQg3nZ +h7I2pjSYgCl+Ib52l8p9bf1kcrVGgPM+auzm496i0RPobFeDBoBvSoznJktHJ7+3 +NnZH+jLiZCODiQPGtQUi+T6eIZUIJF0YASpsCCtUzXCxwW3lYIDNy7UlMivF +-----END RSA PRIVATE KEY----- diff --git a/boot/Kconfig b/boot/Kconfig index b424265..e8fb03b 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -125,8 +125,7 @@ config FIT_BEST_MATCH config FIT_IMAGE_POST_PROCESS bool "Enable post-processing of FIT artifacts after loading by U-Boot" depends on FIT - depends on TI_SECURE_DEVICE || SOCFPGA_SECURE_VAB_AUTH - default y if TI_SECURE_DEVICE + depends on SOCFPGA_SECURE_VAB_AUTH help Allows doing any sort of manipulation to blobs after they got extracted from FIT images like stripping off headers or modifying the size of the diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 1e93439..a3a4ab3 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -37,7 +37,6 @@ CONFIG_SYS_BOOTM_LEN=0x1000000 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y -# CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_DNS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand.0" diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index 466b12e..01428ac 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -38,7 +38,6 @@ CONFIG_SYS_MAXARGS=64 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y -# CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_DNS2=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nand0=nand.0" diff --git a/configs/am43xx_hs_evm_qspi_defconfig b/configs/am43xx_hs_evm_qspi_defconfig index ad6ce2b..54051ca 100644 --- a/configs/am43xx_hs_evm_qspi_defconfig +++ b/configs/am43xx_hs_evm_qspi_defconfig @@ -31,7 +31,6 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_DNS2=y CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 1b03848..94ffce1 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -49,7 +49,6 @@ CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_BCB=y # CONFIG_CMD_FLASH is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_AB_SELECT=y CONFIG_BOOTP_DNS2=y # CONFIG_CMD_PMIC is not set diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 39fdc05..404e714 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -52,7 +52,6 @@ CONFIG_CMD_ABOOTIMG=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_BCB=y # CONFIG_CMD_FLASH is not set -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_AB_SELECT=y CONFIG_BOOTP_DNS2=y # CONFIG_CMD_PMIC is not set diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 76ec5ed..773cf3a 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -23,6 +23,7 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 5c572df..424a032 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -29,8 +29,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; setenv fdtfile ti/${name_fdt}; run distro_bootcmd" -CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80c80000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 6485ed1..5fdaafb 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -14,7 +14,7 @@ CONFIG_TARGET_AM642_A53_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 +CONFIG_SYS_SPI_U_BOOT_OFFS=0x300000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" @@ -33,7 +33,7 @@ CONFIG_SPL_SPI=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run run_kern" +CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x180000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -62,7 +62,6 @@ CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 -CONFIG_SYS_BOOTM_LEN=0x800000 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y CONFIG_CMD_DM=y @@ -79,8 +78,6 @@ CONFIG_OF_LIST="k3-am642-evm k3-am642-sk" CONFIG_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_MMC_ENV_PART=1 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index c3a2f09..4301553 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -71,7 +71,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs)" diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index e0277d4..3f9626e 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -69,7 +69,6 @@ CONFIG_CMD_MMC=y CONFIG_CMD_PCI=y CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=47040000.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs)" diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index cc68a21..c68d525 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -12,7 +12,6 @@ CONFIG_TARGET_J7200_A72_EVM=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" @@ -23,7 +22,6 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -35,7 +33,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;" +CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -78,7 +76,6 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_UFS=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" @@ -90,8 +87,6 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 32ac47c..525f150 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -33,7 +33,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;" +CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -76,7 +76,6 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_UFS=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" @@ -91,11 +90,7 @@ CONFIG_OF_LIST="k3-j721e-common-proc-board k3-j721e-sk" CONFIG_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_NOWHERE=y -CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 37c1fde..d59f315 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -32,7 +32,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_OF_SYSTEM_SETUP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run get_overlaystring; run run_fit; else; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;" +CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" CONFIG_LOGLEVEL=7 CONFIG_SPL_MAX_SIZE=0xc0000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -76,7 +76,6 @@ CONFIG_CMD_REMOTEPROC=y CONFIG_CMD_UFS=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y -# CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus" @@ -89,10 +88,7 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIST="k3-j721s2-common-proc-board k3-am68-sk-base-board" CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_ENV_OVERWRITE=y -CONFIG_ENV_IS_IN_FAT=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 185694d..9456b9e 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -27,6 +27,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index e33dcb8..9ef0ff4 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -28,6 +28,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index acd7517..aed9eda 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 6346e53..c9a2072 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -29,6 +29,7 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_QSPI_BOOT=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 76fa56e..c01a0c4 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -31,6 +31,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y +CONFIG_LTO=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_FIT=y CONFIG_SPI_BOOT=y diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig index 570a1f5..75b7274 100644 --- a/configs/starfive_visionfive2_defconfig +++ b/configs/starfive_visionfive2_defconfig @@ -9,7 +9,7 @@ CONFIG_SF_DEFAULT_SPEED=100000000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2" CONFIG_SPL_TEXT_BASE=0x8000000 -CONFIG_SYS_PROMPT="StarFive #" +CONFIG_SYS_PROMPT="StarFive # " CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_SPL_MMC=y diff --git a/doc/board/starfive/visionfive2.rst b/doc/board/starfive/visionfive2.rst index 951e0d8..941899a 100644 --- a/doc/board/starfive/visionfive2.rst +++ b/doc/board/starfive/visionfive2.rst @@ -206,16 +206,16 @@ Sample boot log from StarFive VisionFive2 board Working FDT set to ff74a340 Hit any key to stop autoboot: 0 StarFive # - StarFive #version + StarFive # version U-Boot 2023.04-rc2-00055-gfc43b9c51a-dirty (Mar 02 2023 - 10:51:39 +0800) riscv64-buildroot-linux-gnu-gcc.br_real (Buildroot VF2_515_v1.0.0_rc4) 10.3.0 GNU ld (GNU Binutils) 2.36.1 StarFive # - StarFive #mmc dev 1 + StarFive # mmc dev 1 switch to partitions #0, OK mmc1 is current device - StarFive #mmc info + StarFive # mmc info Device: mmc@16020000 Manufacturer ID: 9f OEM: 5449 @@ -229,7 +229,7 @@ Sample boot log from StarFive VisionFive2 board Bus Width: 4-bit Erase Group Size: 512 Bytes StarFive # - StarFive #mmc part + StarFive # mmc part Partition Map for MMC device 1 -- Partition Type: EFI @@ -253,7 +253,7 @@ Sample boot log from StarFive VisionFive2 board (data) guid: 539a6df9-4655-4953-8541-733ca36eb1db StarFive # - StarFive #fatls mmc 1:3 + StarFive # fatls mmc 1:3 6429424 Image.gz 717705 u-boot.itb 125437 u-boot-spl.bin.normal.out @@ -262,13 +262,13 @@ Sample boot log from StarFive VisionFive2 board 5 file(s), 0 dir(s) - StarFive #fatload mmc 1:3 ${kernel_addr_r} Image.gz + StarFive # fatload mmc 1:3 ${kernel_addr_r} Image.gz 6429424 bytes read in 394 ms (15.6 MiB/s) - StarFive #fatload mmc 1:3 ${fdt_addr_r} jh7110-starfive-visionfive-2.dtb + StarFive # fatload mmc 1:3 ${fdt_addr_r} jh7110-starfive-visionfive-2.dtb 11285 bytes read in 5 ms (2.2 MiB/s) - StarFive #fatload mmc 1:3 ${ramdisk_addr_r} initramfs.cpio.gz + StarFive # fatload mmc 1:3 ${ramdisk_addr_r} initramfs.cpio.gz 152848495 bytes read in 9271 ms (15.7 MiB/s) - StarFive #booti ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} ${fdt_addr_r} + StarFive # booti ${kernel_addr_r} ${ramdisk_addr_r}:${filesize} ${fdt_addr_r} Uncompressing Kernel Image ## Flattened Device Tree blob at 46000000 Booting using the fdt blob at 0x46000000 diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 7390e03..2db7bbd 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -241,3 +241,173 @@ wakeup and main domain and to boot to the U-Boot prompt | `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices | `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices + +Fit Signature Signing +--------------------- + +K3 Platforms have fit signature signing enabled by default on their primary +platforms. Here we'll take an example for creating fit image for J721e platform +and the same can be extended to other platforms + +1. Describing FIT source + + .. code-block:: bash + + /dts-v1/; + + / { + description = "Kernel fitImage for j721e-hs-evm"; + #address-cells = <1>; + + images { + kernel-1 { + description = "Linux kernel"; + data = /incbin/("Image"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "none"; + load = <0x80080000>; + entry = <0x80080000>; + hash-1 { + algo = "sha512"; + }; + + }; + fdt-ti_k3-j721e-common-proc-board.dtb { + description = "Flattened Device Tree blob"; + data = /incbin/("k3-j721e-common-proc-board.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x83000000>; + hash-1 { + algo = "sha512"; + }; + + }; + }; + + configurations { + default = "conf-ti_k3-j721e-common-proc-board.dtb"; + conf-ti_k3-j721e-common-proc-board.dtb { + description = "Linux kernel, FDT blob"; + fdt = "fdt-ti_k3-j721e-common-proc-board.dtb"; + kernel = "kernel-1"; + signature-1 { + algo = "sha512,rsa4096"; + key-name-hint = "custMpk"; + sign-images = "kernel", "fdt"; + }; + }; + }; + }; + + You would require to change the '/incbin/' lines to point to the respective + files in your local machine and the key-name-hint also needs to be changed + if you are using some other key other than the TI dummy key that we are + using for this example. + +2. Compile U-boot for the respective board + + .. code-block:: bash + + make O=build/a72 CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=arm + BL31=/path/to/bl31.bin TEE=/path/to/bl32.bin + BINMAN_INDIRS="/path/to/ti-linux-firmware" -j15 + + .. note:: + + The changes only affect a72 binaries so the example just builds that + +3. Sign the fit image and embed the dtb in uboot + + Now once the build is done, you'll have a dtb for your board that you'll + be passing to mkimage for signing the fitImage and embedding the key in + the u-boot dtb. + + .. code-block:: bash + + mkimage -r -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K + $UBOOT_PATH/build/a72/dts/dt.dtb + + For signing a secondary platform, pass the -K parameter to that DTB + + .. code-block:: bash + + mkimage -f fitImage.its -k $UBOOT_PATH/board/ti/keys -K + $UBOOT_PATH/build/a72/arch/arm/dts/k3-j721e-sk.dtb + + .. note:: + + If changing `CONFIG_DEFAULT_DEVICE_TREE` to the secondary platform, + binman changes would also be required so that correct dtb gets packaged. + + .. code-block:: bash + + diff --git a/arch/arm/dts/k3-j721e-binman.dtsi b/arch/arm/dts/k3-j721e-binman.dtsi + index 673be646b1e3..752fa805fe8d 100644 + --- a/arch/arm/dts/k3-j721e-binman.dtsi + +++ b/arch/arm/dts/k3-j721e-binman.dtsi + @@ -299,8 +299,8 @@ + #define SPL_J721E_SK_DTB "spl/dts/k3-j721e-sk.dtb" + + #define UBOOT_NODTB "u-boot-nodtb.bin" + -#define J721E_EVM_DTB "u-boot.dtb" + -#define J721E_SK_DTB "arch/arm/dts/k3-j721e-sk.dtb" + +#define J721E_EVM_DTB "arch/arm/dts/k3-j721e-common-proc-board.dtb" + +#define J721E_SK_DTB "u-boot.dtb" + +5. Rebuilt u-boot + + This is required so that the modified dtb gets updated in u-boot.img + + .. code-block:: bash + + make O=build/a72 CROSS_COMPILE=aarch64-none-linux-gnu- ARCH=arm + BL31=/path/to/bl31.bin TEE=/path/to/bl32.bin + BINMAN_INDIRS="/path/to/ti-linux-firmware" -j15 + +6. (Optional) Enabled FIT_SIGNATURE_ENFORCED + + By default u-boot will boot up the fit image without any authentication as + such if the public key is not embedded properly, to check if the public key + nodes are proper you can enable FIT_SIGNATURE_ENFORCED that would not rely + on the dtb for anything else then the signature node for checking the fit + image, rest other things will be enforced such as the property of + required-keys. This is not an extensive check so do manual checks also + + This is by default enabled for devices with TI_SECURE_DEVICE enabled. + +.. note:: + + The devices now also have distroboot enabled so if the fit image doesn't + work then the fallback to normal distroboot will be there on hs devices, + this will need to be explicitly disabled by changing the boot_targets. + +Saving environment +------------------ + +SAVEENV is disabled by default and for the new flow uses Uenv.txt as the default +way for saving the environments. This has been done as Uenv.txt is more granular +then the saveenv command and can be used across various bootmodes too. + +**Writing to MMC/EMMC** + +.. code-block:: + + => env export -t $loadaddr <list of variables> + => fatwrite mmc ${mmcdev} ${loadaddr} ${bootenvfile} ${filesize} + +**Reading from MMC/EMMC** + +By default run envboot will read it from the MMC/EMMC partition ( based on +mmcdev) and set the environments. + +If manually needs to be done then the environment can be read from the +filesystem and then imported + +.. code-block:: + + => fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} + => env import -t ${loadaddr} ${filesize} diff --git a/drivers/clk/starfive/clk-jh7110-pll.c b/drivers/clk/starfive/clk-jh7110-pll.c index 7492b1f..1568a1f 100644 --- a/drivers/clk/starfive/clk-jh7110-pll.c +++ b/drivers/clk/starfive/clk-jh7110-pll.c @@ -3,6 +3,7 @@ * Copyright (C) 2022-23 StarFive Technology Co., Ltd. * * Author: Yanhong Wang <yanhong.wang@starfivetech.com> + * Xingyu Wu <xingyu.wu@starfivetech.com> */ #include <common.h> @@ -11,6 +12,8 @@ #include <clk-uclass.h> #include <div64.h> #include <dm/device.h> +#include <dm/read.h> +#include <dt-bindings/clock/starfive,jh7110-crg.h> #include <linux/bitops.h> #include <linux/clk-provider.h> #include <linux/delay.h> @@ -30,6 +33,47 @@ #define CLK_DDR_BUS_PLL1_DIV4 2 #define CLK_DDR_BUS_PLL1_DIV8 3 +#define JH7110_PLL_ID_TRANS(id) ((id) + JH7110_EXTCLK_END) + +enum starfive_pll_type { + PLL0 = 0, + PLL1, + PLL2, + PLL_MAX = PLL2 +}; + +struct starfive_pllx_rate { + u64 rate; + u32 prediv; + u32 fbdiv; + u32 frac; +}; + +struct starfive_pllx_offset { + u32 pd; + u32 prediv; + u32 fbdiv; + u32 frac; + u32 postdiv1; + u32 dacpd; + u32 dsmpd; + u32 pd_mask; + u32 prediv_mask; + u32 fbdiv_mask; + u32 frac_mask; + u32 postdiv1_mask; + u32 dacpd_mask; + u32 dsmpd_mask; +}; + +struct starfive_pllx_clk { + enum starfive_pll_type type; + const struct starfive_pllx_offset *offset; + const struct starfive_pllx_rate *rate_table; + int rate_count; + int flags; +}; + struct clk_jh7110_pllx { struct clk clk; void __iomem *base; @@ -271,7 +315,7 @@ static ulong jh7110_pllx_set_rate(struct clk *clk, ulong drate) return jh7110_pllx_recalc_rate(clk); } -static const struct clk_ops clk_jh7110_ops = { +static const struct clk_ops jh7110_clk_pllx_ops = { .set_rate = jh7110_pllx_set_rate, .get_rate = jh7110_pllx_recalc_rate, }; @@ -314,8 +358,63 @@ struct clk *starfive_jh7110_pll(const char *name, const char *parent_name, return clk; } +/* PLLx clock implementation */ U_BOOT_DRIVER(jh7110_clk_pllx) = { .name = UBOOT_DM_CLK_JH7110_PLLX, .id = UCLASS_CLK, - .ops = &clk_jh7110_ops, + .ops = &jh7110_clk_pllx_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +static int jh7110_pll_clk_probe(struct udevice *dev) +{ + void __iomem *reg = (void __iomem *)dev_read_addr_ptr(dev->parent); + fdt_addr_t sysreg = ofnode_get_addr(ofnode_by_compatible(ofnode_null(), + "starfive,jh7110-syscrg")); + + if (sysreg == FDT_ADDR_T_NONE) + return -EINVAL; + + clk_dm(JH7110_PLL_ID_TRANS(JH7110_SYSCLK_PLL0_OUT), + starfive_jh7110_pll("pll0_out", "oscillator", reg, + (void __iomem *)sysreg, &starfive_jh7110_pll0)); + clk_dm(JH7110_PLL_ID_TRANS(JH7110_SYSCLK_PLL1_OUT), + starfive_jh7110_pll("pll1_out", "oscillator", reg, + (void __iomem *)sysreg, &starfive_jh7110_pll1)); + clk_dm(JH7110_PLL_ID_TRANS(JH7110_SYSCLK_PLL2_OUT), + starfive_jh7110_pll("pll2_out", "oscillator", reg, + (void __iomem *)sysreg, &starfive_jh7110_pll2)); + + return 0; +} + +static int jh7110_pll_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) +{ + if (args->args_count > 1) { + debug("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + + if (args->args_count) + clk->id = JH7110_PLL_ID_TRANS(args->args[0]); + else + clk->id = 0; + + return 0; +} + +static const struct udevice_id jh7110_pll_clk_of_match[] = { + { .compatible = "starfive,jh7110-pll", }, + { } +}; + +JH7110_CLK_OPS(pll); + +/* PLL clk device */ +U_BOOT_DRIVER(jh7110_pll_clk) = { + .name = "jh7110_pll_clk", + .id = UCLASS_CLK, + .of_match = jh7110_pll_clk_of_match, + .probe = jh7110_pll_clk_probe, + .ops = &jh7110_pll_clk_ops, }; diff --git a/drivers/clk/starfive/clk-jh7110.c b/drivers/clk/starfive/clk-jh7110.c index a74b709..31aaf33 100644 --- a/drivers/clk/starfive/clk-jh7110.c +++ b/drivers/clk/starfive/clk-jh7110.c @@ -3,6 +3,7 @@ * Copyright (C) 2022-23 StarFive Technology Co., Ltd. * * Author: Yanhong Wang <yanhong.wang@starfivetech.com> + * Xingyu Wu <xingyu.wu@starfivetech.com> */ #include <common.h> @@ -24,8 +25,10 @@ #define STARFIVE_CLK_DIV_SHIFT 0 /* [23:0] */ #define OFFSET(id) ((id) * 4) -#define AONOFFSET(id) (((id) - JH7110_SYSCLK_END) * 4) -#define STGOFFSET(id) (((id) - JH7110_AONCLK_END) * 4) + +#define JH7110_SYS_ID_TRANS(id) ((id) + JH7110_PLLCLK_END + JH7110_EXTCLK_END) +#define JH7110_AON_ID_TRANS(id) ((id) + JH7110_SYS_ID_TRANS(JH7110_SYSCLK_END)) +#define JH7110_STG_ID_TRANS(id) ((id) + JH7110_AON_ID_TRANS(JH7110_AONCLK_END)) typedef int (*jh1710_init_fn)(struct udevice *dev); @@ -230,224 +233,204 @@ static struct clk *starfive_clk_gate_divider(void __iomem *reg, static int jh7110_syscrg_init(struct udevice *dev) { struct jh7110_clk_priv *priv = dev_get_priv(dev); - struct ofnode_phandle_args args; - fdt_addr_t addr; struct clk *pclk; - int ret; - - ret = ofnode_parse_phandle_with_args(dev->node_, "starfive,sys-syscon", NULL, 0, 0, &args); - if (ret) - return ret; - - addr = ofnode_get_addr(args.node); - if (addr == FDT_ADDR_T_NONE) - return -EINVAL; - clk_dm(JH7110_SYSCLK_PLL0_OUT, - starfive_jh7110_pll("pll0_out", "oscillator", (void __iomem *)addr, - priv->reg, &starfive_jh7110_pll0)); - clk_dm(JH7110_SYSCLK_PLL1_OUT, - starfive_jh7110_pll("pll1_out", "oscillator", (void __iomem *)addr, - priv->reg, &starfive_jh7110_pll1)); - clk_dm(JH7110_SYSCLK_PLL2_OUT, - starfive_jh7110_pll("pll2_out", "oscillator", (void __iomem *)addr, - priv->reg, &starfive_jh7110_pll2)); - clk_dm(JH7110_SYSCLK_CPU_ROOT, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_CPU_ROOT), starfive_clk_mux(priv->reg, "cpu_root", OFFSET(JH7110_SYSCLK_CPU_ROOT), 1, cpu_root_sels, ARRAY_SIZE(cpu_root_sels))); - clk_dm(JH7110_SYSCLK_CPU_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_CPU_CORE), starfive_clk_divider(priv->reg, "cpu_core", "cpu_root", OFFSET(JH7110_SYSCLK_CPU_CORE), 3)); - clk_dm(JH7110_SYSCLK_CPU_BUS, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_CPU_BUS), starfive_clk_divider(priv->reg, "cpu_bus", "cpu_core", OFFSET(JH7110_SYSCLK_CPU_BUS), 2)); - clk_dm(JH7110_SYSCLK_PERH_ROOT, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_PERH_ROOT), starfive_clk_composite(priv->reg, "perh_root", perh_root_sels, ARRAY_SIZE(perh_root_sels), OFFSET(JH7110_SYSCLK_PERH_ROOT), 1, 0, 2)); - clk_dm(JH7110_SYSCLK_BUS_ROOT, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_BUS_ROOT), starfive_clk_mux(priv->reg, "bus_root", OFFSET(JH7110_SYSCLK_BUS_ROOT), 1, bus_root_sels, ARRAY_SIZE(bus_root_sels))); - clk_dm(JH7110_SYSCLK_NOCSTG_BUS, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_NOCSTG_BUS), starfive_clk_divider(priv->reg, "nocstg_bus", "bus_root", OFFSET(JH7110_SYSCLK_NOCSTG_BUS), 3)); - clk_dm(JH7110_SYSCLK_AXI_CFG0, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_AXI_CFG0), starfive_clk_divider(priv->reg, "axi_cfg0", "bus_root", OFFSET(JH7110_SYSCLK_AXI_CFG0), 2)); - clk_dm(JH7110_SYSCLK_STG_AXIAHB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_STG_AXIAHB), starfive_clk_divider(priv->reg, "stg_axiahb", "axi_cfg0", OFFSET(JH7110_SYSCLK_STG_AXIAHB), 2)); - clk_dm(JH7110_SYSCLK_AHB0, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_AHB0), starfive_clk_gate(priv->reg, "ahb0", "stg_axiahb", OFFSET(JH7110_SYSCLK_AHB0))); - clk_dm(JH7110_SYSCLK_AHB1, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_AHB1), starfive_clk_gate(priv->reg, "ahb1", "stg_axiahb", OFFSET(JH7110_SYSCLK_AHB1))); - clk_dm(JH7110_SYSCLK_APB_BUS, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_APB_BUS), starfive_clk_divider(priv->reg, "apb_bus", "stg_axiahb", OFFSET(JH7110_SYSCLK_APB_BUS), 4)); - clk_dm(JH7110_SYSCLK_APB0, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_APB0), starfive_clk_gate(priv->reg, "apb0", "apb_bus", OFFSET(JH7110_SYSCLK_APB0))); - clk_dm(JH7110_SYSCLK_QSPI_AHB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_QSPI_AHB), starfive_clk_gate(priv->reg, "qspi_ahb", "ahb1", OFFSET(JH7110_SYSCLK_QSPI_AHB))); - clk_dm(JH7110_SYSCLK_QSPI_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_QSPI_APB), starfive_clk_gate(priv->reg, "qspi_apb", "apb_bus", OFFSET(JH7110_SYSCLK_QSPI_APB))); - clk_dm(JH7110_SYSCLK_QSPI_REF_SRC, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_QSPI_REF_SRC), starfive_clk_divider(priv->reg, "qspi_ref_src", "pll0_out", OFFSET(JH7110_SYSCLK_QSPI_REF_SRC), 5)); - clk_dm(JH7110_SYSCLK_QSPI_REF, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_QSPI_REF), starfive_clk_composite(priv->reg, "qspi_ref", qspi_ref_sels, ARRAY_SIZE(qspi_ref_sels), OFFSET(JH7110_SYSCLK_QSPI_REF), 1, 1, 0)); - clk_dm(JH7110_SYSCLK_SDIO0_AHB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_SDIO0_AHB), starfive_clk_gate(priv->reg, "sdio0_ahb", "ahb0", OFFSET(JH7110_SYSCLK_SDIO0_AHB))); - clk_dm(JH7110_SYSCLK_SDIO1_AHB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_SDIO1_AHB), starfive_clk_gate(priv->reg, "sdio1_ahb", "ahb0", OFFSET(JH7110_SYSCLK_SDIO1_AHB))); - clk_dm(JH7110_SYSCLK_SDIO0_SDCARD, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_SDIO0_SDCARD), starfive_clk_fix_parent_composite(priv->reg, "sdio0_sdcard", "axi_cfg0", OFFSET(JH7110_SYSCLK_SDIO0_SDCARD), 0, 1, 4)); - clk_dm(JH7110_SYSCLK_SDIO1_SDCARD, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_SDIO1_SDCARD), starfive_clk_fix_parent_composite(priv->reg, "sdio1_sdcard", "axi_cfg0", OFFSET(JH7110_SYSCLK_SDIO1_SDCARD), 0, 1, 4)); - clk_dm(JH7110_SYSCLK_USB_125M, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_USB_125M), starfive_clk_divider(priv->reg, "usb_125m", "pll0_out", OFFSET(JH7110_SYSCLK_USB_125M), 4)); - clk_dm(JH7110_SYSCLK_NOC_BUS_STG_AXI, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_NOC_BUS_STG_AXI), starfive_clk_gate(priv->reg, "noc_bus_stg_axi", "nocstg_bus", OFFSET(JH7110_SYSCLK_NOC_BUS_STG_AXI))); - clk_dm(JH7110_SYSCLK_GMAC1_AHB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_AHB), starfive_clk_gate(priv->reg, "gmac1_ahb", "ahb0", OFFSET(JH7110_SYSCLK_GMAC1_AHB))); - clk_dm(JH7110_SYSCLK_GMAC1_AXI, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_AXI), starfive_clk_gate(priv->reg, "gmac1_axi", "stg_axiahb", OFFSET(JH7110_SYSCLK_GMAC1_AXI))); - clk_dm(JH7110_SYSCLK_GMAC_SRC, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC_SRC), starfive_clk_divider(priv->reg, "gmac_src", "pll0_out", OFFSET(JH7110_SYSCLK_GMAC_SRC), 3)); - clk_dm(JH7110_SYSCLK_GMAC1_GTXCLK, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_GTXCLK), starfive_clk_divider(priv->reg, "gmac1_gtxclk", "pll0_out", OFFSET(JH7110_SYSCLK_GMAC1_GTXCLK), 4)); - clk_dm(JH7110_SYSCLK_GMAC1_GTXC, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_GTXC), starfive_clk_gate(priv->reg, "gmac1_gtxc", "gmac1_gtxclk", OFFSET(JH7110_SYSCLK_GMAC1_GTXC))); - clk_dm(JH7110_SYSCLK_GMAC1_RMII_RTX, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_RMII_RTX), starfive_clk_divider(priv->reg, "gmac1_rmii_rtx", "gmac1-rmii-refin-clock", OFFSET(JH7110_SYSCLK_GMAC1_RMII_RTX), 5)); - clk_dm(JH7110_SYSCLK_GMAC1_PTP, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_PTP), starfive_clk_gate_divider(priv->reg, "gmac1_ptp", "gmac_src", OFFSET(JH7110_SYSCLK_GMAC1_PTP), 5)); - clk_dm(JH7110_SYSCLK_GMAC1_RX, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_RX), starfive_clk_mux(priv->reg, "gmac1_rx", OFFSET(JH7110_SYSCLK_GMAC1_RX), 1, gmac1_rx_sels, ARRAY_SIZE(gmac1_rx_sels))); - clk_dm(JH7110_SYSCLK_GMAC1_TX, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_TX), starfive_clk_composite(priv->reg, "gmac1_tx", gmac1_tx_sels, ARRAY_SIZE(gmac1_tx_sels), OFFSET(JH7110_SYSCLK_GMAC1_TX), 1, 1, 0)); - clk_dm(JH7110_SYSCLK_GMAC1_TX_INV, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC1_TX_INV), starfive_clk_inv(priv->reg, "gmac1_tx_inv", "gmac1_tx", OFFSET(JH7110_SYSCLK_GMAC1_TX_INV))); - clk_dm(JH7110_SYSCLK_GMAC0_GTXCLK, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC0_GTXCLK), starfive_clk_gate_divider(priv->reg, "gmac0_gtxclk", "pll0_out", OFFSET(JH7110_SYSCLK_GMAC0_GTXCLK), 4)); - clk_dm(JH7110_SYSCLK_GMAC0_PTP, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC0_PTP), starfive_clk_gate_divider(priv->reg, "gmac0_ptp", "gmac_src", OFFSET(JH7110_SYSCLK_GMAC0_PTP), 5)); - clk_dm(JH7110_SYSCLK_GMAC0_GTXC, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_GMAC0_GTXC), starfive_clk_gate(priv->reg, "gmac0_gtxc", "gmac0_gtxclk", OFFSET(JH7110_SYSCLK_GMAC0_GTXC))); - clk_dm(JH7110_SYSCLK_UART0_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART0_APB), starfive_clk_gate(priv->reg, "uart0_apb", "apb0", OFFSET(JH7110_SYSCLK_UART0_APB))); - clk_dm(JH7110_SYSCLK_UART0_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART0_CORE), starfive_clk_gate(priv->reg, "uart0_core", "oscillator", OFFSET(JH7110_SYSCLK_UART0_CORE))); - clk_dm(JH7110_SYSCLK_UART1_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART1_APB), starfive_clk_gate(priv->reg, "uart1_apb", "apb0", OFFSET(JH7110_SYSCLK_UART1_APB))); - clk_dm(JH7110_SYSCLK_UART1_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART1_CORE), starfive_clk_gate(priv->reg, "uart1_core", "oscillator", OFFSET(JH7110_SYSCLK_UART1_CORE))); - clk_dm(JH7110_SYSCLK_UART2_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART2_APB), starfive_clk_gate(priv->reg, "uart2_apb", "apb0", OFFSET(JH7110_SYSCLK_UART2_APB))); - clk_dm(JH7110_SYSCLK_UART2_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART2_CORE), starfive_clk_gate(priv->reg, "uart2_core", "oscillator", OFFSET(JH7110_SYSCLK_UART2_CORE))); - clk_dm(JH7110_SYSCLK_UART3_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART3_APB), starfive_clk_gate(priv->reg, "uart3_apb", "apb0", OFFSET(JH7110_SYSCLK_UART3_APB))); - clk_dm(JH7110_SYSCLK_UART3_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART3_CORE), starfive_clk_gate_divider(priv->reg, "uart3_core", "perh_root", OFFSET(JH7110_SYSCLK_UART3_CORE), 8)); - clk_dm(JH7110_SYSCLK_UART4_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART4_APB), starfive_clk_gate(priv->reg, "uart4_apb", "apb0", OFFSET(JH7110_SYSCLK_UART4_APB))); - clk_dm(JH7110_SYSCLK_UART4_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART4_CORE), starfive_clk_gate_divider(priv->reg, "uart4_core", "perh_root", OFFSET(JH7110_SYSCLK_UART4_CORE), 8)); - clk_dm(JH7110_SYSCLK_UART5_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART5_APB), starfive_clk_gate(priv->reg, "uart5_apb", "apb0", OFFSET(JH7110_SYSCLK_UART5_APB))); - clk_dm(JH7110_SYSCLK_UART5_CORE, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_UART5_CORE), starfive_clk_gate_divider(priv->reg, "uart5_core", "perh_root", OFFSET(JH7110_SYSCLK_UART5_CORE), 8)); - clk_dm(JH7110_SYSCLK_I2C2_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_I2C2_APB), starfive_clk_gate(priv->reg, "i2c2_apb", "apb0", OFFSET(JH7110_SYSCLK_I2C2_APB))); - clk_dm(JH7110_SYSCLK_I2C5_APB, + clk_dm(JH7110_SYS_ID_TRANS(JH7110_SYSCLK_I2C5_APB), starfive_clk_gate(priv->reg, "i2c5_apb", "apb0", OFFSET(JH7110_SYSCLK_I2C5_APB))); @@ -463,39 +446,39 @@ static int jh7110_aoncrg_init(struct udevice *dev) { struct jh7110_clk_priv *priv = dev_get_priv(dev); - clk_dm(JH7110_AONCLK_OSC_DIV4, + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_OSC_DIV4), starfive_clk_divider(priv->reg, "osc_div4", "oscillator", - AONOFFSET(JH7110_AONCLK_OSC_DIV4), 5)); - clk_dm(JH7110_AONCLK_APB_FUNC, + OFFSET(JH7110_AONCLK_OSC_DIV4), 5)); + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_APB_FUNC), starfive_clk_mux(priv->reg, "apb_func", - AONOFFSET(JH7110_AONCLK_APB_FUNC), 1, + OFFSET(JH7110_AONCLK_APB_FUNC), 1, apb_func_sels, ARRAY_SIZE(apb_func_sels))); - clk_dm(JH7110_AONCLK_GMAC0_AHB, + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_GMAC0_AHB), starfive_clk_gate(priv->reg, "gmac0_ahb", "stg_axiahb", - AONOFFSET(JH7110_AONCLK_GMAC0_AHB))); - clk_dm(JH7110_AONCLK_GMAC0_AXI, + OFFSET(JH7110_AONCLK_GMAC0_AHB))); + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_GMAC0_AXI), starfive_clk_gate(priv->reg, "gmac0_axi", "stg_axiahb", - AONOFFSET(JH7110_AONCLK_GMAC0_AXI))); - clk_dm(JH7110_AONCLK_GMAC0_RMII_RTX, + OFFSET(JH7110_AONCLK_GMAC0_AXI))); + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_GMAC0_RMII_RTX), starfive_clk_divider(priv->reg, "gmac0_rmii_rtx", "gmac0-rmii-refin-clock", - AONOFFSET(JH7110_AONCLK_GMAC0_RMII_RTX), 5)); - clk_dm(JH7110_AONCLK_GMAC0_TX, + OFFSET(JH7110_AONCLK_GMAC0_RMII_RTX), 5)); + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_GMAC0_TX), starfive_clk_composite(priv->reg, "gmac0_tx", gmac0_tx_sels, ARRAY_SIZE(gmac0_tx_sels), - AONOFFSET(JH7110_AONCLK_GMAC0_TX), 1, 1, 0)); - clk_dm(JH7110_AONCLK_GMAC0_TX_INV, + OFFSET(JH7110_AONCLK_GMAC0_TX), 1, 1, 0)); + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_GMAC0_TX_INV), starfive_clk_inv(priv->reg, "gmac0_tx_inv", "gmac0_tx", - AONOFFSET(JH7110_AONCLK_GMAC0_TX_INV))); - clk_dm(JH7110_AONCLK_OTPC_APB, + OFFSET(JH7110_AONCLK_GMAC0_TX_INV))); + clk_dm(JH7110_AON_ID_TRANS(JH7110_AONCLK_OTPC_APB), starfive_clk_gate(priv->reg, "otpc_apb", "apb_bus", - AONOFFSET(JH7110_AONCLK_OTPC_APB))); + OFFSET(JH7110_AONCLK_OTPC_APB))); return 0; } @@ -504,57 +487,57 @@ static int jh7110_stgcrg_init(struct udevice *dev) { struct jh7110_clk_priv *priv = dev_get_priv(dev); - clk_dm(JH7110_STGCLK_USB_APB, + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_APB), starfive_clk_gate(priv->reg, "usb_apb", "apb_bus", - STGOFFSET(JH7110_STGCLK_USB_APB))); - clk_dm(JH7110_STGCLK_USB_UTMI_APB, + OFFSET(JH7110_STGCLK_USB_APB))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_UTMI_APB), starfive_clk_gate(priv->reg, "usb_utmi_apb", "apb_bus", - STGOFFSET(JH7110_STGCLK_USB_UTMI_APB))); - clk_dm(JH7110_STGCLK_USB_AXI, + OFFSET(JH7110_STGCLK_USB_UTMI_APB))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_AXI), starfive_clk_gate(priv->reg, "usb_axi", "stg_axiahb", - STGOFFSET(JH7110_STGCLK_USB_AXI))); - clk_dm(JH7110_STGCLK_USB_LPM, + OFFSET(JH7110_STGCLK_USB_AXI))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_LPM), starfive_clk_gate_divider(priv->reg, "usb_lpm", "oscillator", - STGOFFSET(JH7110_STGCLK_USB_LPM), 2)); - clk_dm(JH7110_STGCLK_USB_STB, + OFFSET(JH7110_STGCLK_USB_LPM), 2)); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_STB), starfive_clk_gate_divider(priv->reg, "usb_stb", "oscillator", - STGOFFSET(JH7110_STGCLK_USB_STB), 3)); - clk_dm(JH7110_STGCLK_USB_APP_125, + OFFSET(JH7110_STGCLK_USB_STB), 3)); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_APP_125), starfive_clk_gate(priv->reg, "usb_app_125", "usb_125m", - STGOFFSET(JH7110_STGCLK_USB_APP_125))); - clk_dm(JH7110_STGCLK_USB_REFCLK, + OFFSET(JH7110_STGCLK_USB_APP_125))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_USB_REFCLK), starfive_clk_divider(priv->reg, "usb_refclk", "oscillator", - STGOFFSET(JH7110_STGCLK_USB_REFCLK), 2)); - clk_dm(JH7110_STGCLK_PCIE0_AXI, + OFFSET(JH7110_STGCLK_USB_REFCLK), 2)); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE0_AXI), starfive_clk_gate(priv->reg, "pcie0_axi", "stg_axiahb", - STGOFFSET(JH7110_STGCLK_PCIE0_AXI))); - clk_dm(JH7110_STGCLK_PCIE0_APB, + OFFSET(JH7110_STGCLK_PCIE0_AXI))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE0_APB), starfive_clk_gate(priv->reg, "pcie0_apb", "apb_bus", - STGOFFSET(JH7110_STGCLK_PCIE0_APB))); - clk_dm(JH7110_STGCLK_PCIE0_TL, + OFFSET(JH7110_STGCLK_PCIE0_APB))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE0_TL), starfive_clk_gate(priv->reg, "pcie0_tl", "stg_axiahb", - STGOFFSET(JH7110_STGCLK_PCIE0_TL))); - clk_dm(JH7110_STGCLK_PCIE1_AXI, + OFFSET(JH7110_STGCLK_PCIE0_TL))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE1_AXI), starfive_clk_gate(priv->reg, "pcie1_axi", "stg_axiahb", - STGOFFSET(JH7110_STGCLK_PCIE1_AXI))); - clk_dm(JH7110_STGCLK_PCIE1_APB, + OFFSET(JH7110_STGCLK_PCIE1_AXI))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE1_APB), starfive_clk_gate(priv->reg, "pcie1_apb", "apb_bus", - STGOFFSET(JH7110_STGCLK_PCIE1_APB))); - clk_dm(JH7110_STGCLK_PCIE1_TL, + OFFSET(JH7110_STGCLK_PCIE1_APB))); + clk_dm(JH7110_STG_ID_TRANS(JH7110_STGCLK_PCIE1_TL), starfive_clk_gate(priv->reg, "pcie1_tl", "stg_axiahb", - STGOFFSET(JH7110_STGCLK_PCIE1_TL))); + OFFSET(JH7110_STGCLK_PCIE1_TL))); return 0; } @@ -579,25 +562,104 @@ static int jh7110_clk_bind(struct udevice *dev) dev_ofnode(dev), NULL); } -static const struct udevice_id jh7110_clk_of_match[] = { +static int jh7110_sys_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) +{ + if (args->args_count > 1) { + debug("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + + if (args->args_count) + clk->id = JH7110_SYS_ID_TRANS(args->args[0]); + else + clk->id = 0; + + return 0; +} + +static int jh7110_aon_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) +{ + if (args->args_count > 1) { + debug("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + + if (args->args_count) + clk->id = JH7110_AON_ID_TRANS(args->args[0]); + else + clk->id = 0; + + return 0; +} + +static int jh7110_stg_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) +{ + if (args->args_count > 1) { + debug("Invalid args_count: %d\n", args->args_count); + return -EINVAL; + } + + if (args->args_count) + clk->id = JH7110_STG_ID_TRANS(args->args[0]); + else + clk->id = 0; + + return 0; +} + +static const struct udevice_id jh7110_sys_clk_of_match[] = { { .compatible = "starfive,jh7110-syscrg", .data = (ulong)&jh7110_syscrg_init }, - { .compatible = "starfive,jh7110-stgcrg", - .data = (ulong)&jh7110_stgcrg_init - }, + { } +}; + +JH7110_CLK_OPS(sys); + +U_BOOT_DRIVER(jh7110_sys_clk) = { + .name = "jh7110_sys_clk", + .id = UCLASS_CLK, + .of_match = jh7110_sys_clk_of_match, + .probe = jh7110_clk_probe, + .ops = &jh7110_sys_clk_ops, + .priv_auto = sizeof(struct jh7110_clk_priv), + .bind = jh7110_clk_bind, +}; + +static const struct udevice_id jh7110_aon_clk_of_match[] = { { .compatible = "starfive,jh7110-aoncrg", .data = (ulong)&jh7110_aoncrg_init }, { } }; -U_BOOT_DRIVER(jh7110_clk) = { - .name = "jh7110_clk", +JH7110_CLK_OPS(aon); + +U_BOOT_DRIVER(jh7110_aon_clk) = { + .name = "jh7110_aon_clk", + .id = UCLASS_CLK, + .of_match = jh7110_aon_clk_of_match, + .probe = jh7110_clk_probe, + .ops = &jh7110_aon_clk_ops, + .priv_auto = sizeof(struct jh7110_clk_priv), + .bind = jh7110_clk_bind, +}; + +static const struct udevice_id jh7110_stg_clk_of_match[] = { + { .compatible = "starfive,jh7110-stgcrg", + .data = (ulong)&jh7110_stgcrg_init + }, + { } +}; + +JH7110_CLK_OPS(stg); + +U_BOOT_DRIVER(jh7110_stg_clk) = { + .name = "jh7110_stg_clk", .id = UCLASS_CLK, - .of_match = jh7110_clk_of_match, + .of_match = jh7110_stg_clk_of_match, .probe = jh7110_clk_probe, - .ops = &ccf_clk_ops, + .ops = &jh7110_stg_clk_ops, .priv_auto = sizeof(struct jh7110_clk_priv), - .bind = jh7110_clk_bind, + .bind = jh7110_clk_bind, }; diff --git a/drivers/clk/starfive/clk.h b/drivers/clk/starfive/clk.h index 4dee12f..9d20ed0 100644 --- a/drivers/clk/starfive/clk.h +++ b/drivers/clk/starfive/clk.h @@ -1,57 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright (C) 2022 Starfive, Inc. + * Copyright (C) 2022 StarFive Technology Co., Ltd. * Author: Yanhong Wang <yanhong.wang@starfivetech.com> - * */ #ifndef __CLK_STARFIVE_H #define __CLK_STARFIVE_H -enum starfive_pll_type { - PLL0 = 0, - PLL1, - PLL2, - PLL_MAX = PLL2 -}; +/* the number of fixed clocks in DTS */ +#define JH7110_EXTCLK_END 12 -struct starfive_pllx_rate { - u64 rate; - u32 prediv; - u32 fbdiv; - u32 frac; -}; +#define _JH7110_CLK_OPS(_name) \ +static const struct clk_ops jh7110_##_name##_clk_ops = { \ + .set_rate = ccf_clk_set_rate, \ + .get_rate = ccf_clk_get_rate, \ + .set_parent = ccf_clk_set_parent, \ + .enable = ccf_clk_enable, \ + .disable = ccf_clk_disable, \ + .of_xlate = jh7110_##_name##_clk_of_xlate, \ +} -struct starfive_pllx_offset { - u32 pd; - u32 prediv; - u32 fbdiv; - u32 frac; - u32 postdiv1; - u32 dacpd; - u32 dsmpd; - u32 pd_mask; - u32 prediv_mask; - u32 fbdiv_mask; - u32 frac_mask; - u32 postdiv1_mask; - u32 dacpd_mask; - u32 dsmpd_mask; -}; +#define JH7110_CLK_OPS(name) _JH7110_CLK_OPS(name) -struct starfive_pllx_clk { - enum starfive_pll_type type; - const struct starfive_pllx_offset *offset; - const struct starfive_pllx_rate *rate_table; - int rate_count; - int flags; -}; - -extern struct starfive_pllx_clk starfive_jh7110_pll0; -extern struct starfive_pllx_clk starfive_jh7110_pll1; -extern struct starfive_pllx_clk starfive_jh7110_pll2; - -struct clk *starfive_jh7110_pll(const char *name, const char *parent_name, - void __iomem *base, void __iomem *sysreg, - const struct starfive_pllx_clk *pll_clk); #endif diff --git a/drivers/mmc/atmel_sdhci.c b/drivers/mmc/atmel_sdhci.c index 37b0bee..5347ba9 100644 --- a/drivers/mmc/atmel_sdhci.c +++ b/drivers/mmc/atmel_sdhci.c @@ -15,6 +15,9 @@ #define ATMEL_SDHC_MIN_FREQ 400000 #define ATMEL_SDHC_GCK_RATE 240000000 +#define ATMEL_SDHC_MC1R 0x204 +#define ATMEL_SDHC_MC1R_FCD 0x80 + #ifndef CONFIG_DM_MMC int atmel_sdhci_init(void *regbase, u32 id) { @@ -52,11 +55,37 @@ struct atmel_sdhci_plat { struct mmc mmc; }; +static void atmel_sdhci_config_fcd(struct sdhci_host *host) +{ + u8 mc1r; + + /* If nonremovable, assume that the card is always present. + * + * WA: SAMA5D2 doesn't drive CMD if using CD GPIO line. + */ + if ((host->mmc->cfg->host_caps & MMC_CAP_NONREMOVABLE) +#if CONFIG_IS_ENABLED(DM_GPIO) + || dm_gpio_get_value(&host->cd_gpio) >= 0 +#endif + ) { + sdhci_readb(host, ATMEL_SDHC_MC1R); + mc1r |= ATMEL_SDHC_MC1R_FCD; + sdhci_writeb(host, mc1r, ATMEL_SDHC_MC1R); + } +} + static int atmel_sdhci_deferred_probe(struct sdhci_host *host) { struct udevice *dev = host->mmc->dev; + int ret; - return sdhci_probe(dev); + ret = sdhci_probe(dev); + if (ret) + return ret; + + atmel_sdhci_config_fcd(host); + + return 0; } static const struct sdhci_ops atmel_sdhci_ops = { @@ -120,7 +149,13 @@ static int atmel_sdhci_probe(struct udevice *dev) clk_free(&clk); - return sdhci_probe(dev); + ret = sdhci_probe(dev); + if (ret) + return ret; + + atmel_sdhci_config_fcd(host); + + return 0; } static int atmel_sdhci_bind(struct udevice *dev) diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index d8ef250..3997ce5 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -15,77 +15,6 @@ /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 -#define PARTS_DEFAULT \ - /* Linux partitions */ \ - "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" \ - -/* U-Boot general configuration */ -#define EXTRA_ENV_AM62A7_BOARD_SETTINGS \ - "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ - "findfdt=" \ - "setenv name_fdt ${default_device_tree};" \ - "setenv fdtfile ${name_fdt}\0" \ - "name_kern=Image\0" \ - "console=ttyS2,115200n8\0" \ - "args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000 " \ - "${mtdparts}\0" \ - "run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" - -/* U-Boot MMC-specific configuration */ -#define EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ - "boot=mmc\0" \ - "mmcdev=1\0" \ - "bootpart=1:2\0" \ - "bootdir=/boot\0" \ - "rd_spec=-\0" \ - "init_mmc=run args_all args_mmc\0" \ - "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \ - "get_overlay_mmc=" \ - "fdt address ${fdtaddr};" \ - "fdt resize 0x100000;" \ - "for overlay in $name_overlays;" \ - "do;" \ - "load mmc ${bootpart} ${dtboaddr} ${bootdir}/${overlay} && " \ - "fdt apply ${dtboaddr};" \ - "done;\0" \ - "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \ - "${bootdir}/${name_kern}\0" \ - "get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \ - "${bootdir}/${name_fit}\0" \ - "partitions=" PARTS_DEFAULT - -#define BOOTENV_DEV_TI_MMC(devtypeu, devtypel, instance) \ - DEFAULT_MMC_TI_ARGS \ - EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ - "bootcmd_ti_mmc=" \ - "run findfdt; run envboot; run init_mmc;" \ - "if test ${boot_fit} -eq 1; then;" \ - "run get_fit_mmc; run get_overlaystring;" \ - "run run_fit;" \ - "else;" \ - "run get_kern_mmc; run get_fdt_mmc;" \ - "run get_overlay_mmc;" \ - "run run_kern;" \ - "fi;\0" - -#define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \ - "ti_mmc " - -#if IS_ENABLED(CONFIG_CMD_MMC) - #define BOOT_TARGET_MMC(func) \ - func(TI_MMC, ti_mmc, na) -#else - #define BOOT_TARGET_MMC(func) -#endif /* IS_ENABLED(CONFIG_CMD_MMC) */ - -#define BOOT_TARGET_DEVICES(func) \ - BOOT_TARGET_MMC(func) - -#include <config_distro_bootcmd.h> - -/* Incorporate settings into the U-Boot environment */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV /* Now for the remaining common defines */ #include <configs/ti_armv7_common.h> diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h index 7bf0780..6b2a6ee 100644 --- a/include/configs/am62x_evm.h +++ b/include/configs/am62x_evm.h @@ -15,33 +15,6 @@ /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 -#ifdef CONFIG_CMD_MMC -#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) -#else -#define DISTRO_BOOT_DEV_MMC(func) -#endif - -#ifdef CONFIG_CMD_PXE -#define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) -#else -#define DISTRO_BOOT_DEV_PXE(func) -#endif - -#ifdef CONFIG_CMD_DHCP -#define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) -#else -#define DISTRO_BOOT_DEV_DHCP(func) -#endif - -#define BOOT_TARGET_DEVICES(func) \ - DISTRO_BOOT_DEV_MMC(func) \ - DISTRO_BOOT_DEV_PXE(func) \ - DISTRO_BOOT_DEV_DHCP(func) - -/* Incorporate settings into the U-Boot environment */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV - /* Now for the remaining common defines */ #include <configs/ti_armv7_common.h> diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index c549573..2fa658d 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -17,20 +17,6 @@ /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 -#ifdef CONFIG_TARGET_AM654_A53_EVM -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) - -#include <config_distro_bootcmd.h> -#else -#define BOOTENV -#endif - -/* Incorporate settings into the U-Boot environment */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV - /* Now for the remaining common defines */ #include <configs/ti_armv7_common.h> diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 82174b8..2177e0d 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -13,31 +13,6 @@ #include <linux/sizes.h> -#if IS_ENABLED(CONFIG_CMD_USB) -# define BOOT_TARGET_USB(func) \ - func(USB, usb, 0) \ - func(USB, usb, 1) \ - func(USB, usb, 2) -#else -# define BOOT_TARGET_USB(func) -#endif - -/* - * This defines all MMC devices, even if the basic variant has no mmc1. - * The non-supported device will be removed from the boot targets during - * runtime, when that board was detected. - */ -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - BOOT_TARGET_USB(func) - -#include <config_distro_bootcmd.h> - -#define CFG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - BOOTENV - #include <configs/ti_armv7_common.h> #ifdef CONFIG_ENV_WRITEABLE_LIST diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index de92cd4..ea39d1b 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -24,40 +24,8 @@ #define CFG_SYS_UBOOT_BASE 0x50080000 #endif -#if CONFIG_IS_ENABLED(CMD_PXE) -# define BOOT_TARGET_PXE(func) func(PXE, pxe, na) -#else -# define BOOT_TARGET_PXE(func) -#endif - -#if CONFIG_IS_ENABLED(CMD_DHCP) -# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) -#else -# define BOOT_TARGET_DHCP(func) -#endif - -#ifdef CONFIG_CMD_USB -# define BOOT_TARGET_USB(func) func(USB, usb, 0) -#else -# define BOOT_TARGET_USB(func) -#endif - -#define BOOT_TARGET_DEVICES(func) \ - BOOT_TARGET_USB(func) \ - func(MMC, mmc, 1) \ - func(MMC, mmc, 0) \ - BOOT_TARGET_PXE(func) \ - BOOT_TARGET_DHCP(func) - -#include <config_distro_bootcmd.h> - -/* Incorporate settings into the U-Boot environment */ -#define CFG_EXTRA_ENV_SETTINGS \ - BOOTENV - /* Now for the remaining common defines */ #include <configs/ti_armv7_common.h> -/* MMC ENV related defines */ #endif /* __CONFIG_J721E_EVM_H */ diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 1e0da9f..692c6bb 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -23,12 +23,7 @@ #define CFG_SYS_UBOOT_BASE 0x50080000 #endif -/* Incorporate settings into the U-Boot environment */ -#define CFG_EXTRA_ENV_SETTINGS - /* Now for the remaining common defines */ #include <configs/ti_armv7_common.h> -/* MMC ENV related defines */ - #endif /* __CONFIG_J721S2_EVM_H */ diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 149a74d..dbbeff3 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -154,4 +154,54 @@ #define NETARGS "" #endif +#ifdef CONFIG_ARM64 +#ifdef CONFIG_DISTRO_DEFAULTS +#ifdef CONFIG_CMD_PXE +# define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +#else +# define BOOT_TARGET_PXE(func) +#endif + +#ifdef CONFIG_CMD_DHCP +# define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +#else +# define BOOT_TARGET_DHCP(func) +#endif + +#ifdef CONFIG_CMD_MMC +#define BOOT_TARGET_MMC(func) \ + func(TI_MMC, ti_mmc, na) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) +#else +#define BOOT_TARGET_MMC(func) +#endif + +#define BOOTENV_DEV_TI_MMC(devtypeu, devtypel, instance) + +#define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \ + "ti_mmc " + +#ifdef CONFIG_CMD_USB +# define BOOT_TARGET_USB(func) func(USB, usb, 0) +#else +# define BOOT_TARGET_USB(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_MMC(func) \ + BOOT_TARGET_USB(func) \ + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) + +#include <config_distro_bootcmd.h> + +/* Incorporate settings into the U-Boot environment */ +#define CFG_EXTRA_ENV_SETTINGS \ + BOOTENV + +#endif + +#endif /* CONFIG_ARM64 */ + #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ diff --git a/include/dt-bindings/clock/starfive,jh7110-crg.h b/include/dt-bindings/clock/starfive,jh7110-crg.h index 77b70e7..b51e382 100644 --- a/include/dt-bindings/clock/starfive,jh7110-crg.h +++ b/include/dt-bindings/clock/starfive,jh7110-crg.h @@ -8,6 +8,11 @@ #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7110_H__ #define __DT_BINDINGS_CLOCK_STARFIVE_JH7110_H__ +#define JH7110_SYSCLK_PLL0_OUT 0 +#define JH7110_SYSCLK_PLL1_OUT 1 +#define JH7110_SYSCLK_PLL2_OUT 2 +#define JH7110_PLLCLK_END 3 + #define JH7110_SYSCLK_CPU_ROOT 0 #define JH7110_SYSCLK_CPU_CORE 1 #define JH7110_SYSCLK_CPU_BUS 2 @@ -199,59 +204,55 @@ #define JH7110_SYSCLK_TDM_CLK_TDM_N 188 #define JH7110_SYSCLK_JTAG_CERTIFICATION_TRNG 189 -#define JH7110_SYSCLK_PLL0_OUT 190 -#define JH7110_SYSCLK_PLL1_OUT 191 -#define JH7110_SYSCLK_PLL2_OUT 192 - -#define JH7110_SYSCLK_END 193 +#define JH7110_SYSCLK_END 190 -#define JH7110_AONCLK_OSC_DIV4 (JH7110_SYSCLK_END + 0) -#define JH7110_AONCLK_APB_FUNC (JH7110_SYSCLK_END + 1) -#define JH7110_AONCLK_GMAC0_AHB (JH7110_SYSCLK_END + 2) -#define JH7110_AONCLK_GMAC0_AXI (JH7110_SYSCLK_END + 3) -#define JH7110_AONCLK_GMAC0_RMII_RTX (JH7110_SYSCLK_END + 4) -#define JH7110_AONCLK_GMAC0_TX (JH7110_SYSCLK_END + 5) -#define JH7110_AONCLK_GMAC0_TX_INV (JH7110_SYSCLK_END + 6) -#define JH7110_AONCLK_GMAC0_RX (JH7110_SYSCLK_END + 7) -#define JH7110_AONCLK_GMAC0_RX_INV (JH7110_SYSCLK_END + 8) -#define JH7110_AONCLK_OTPC_APB (JH7110_SYSCLK_END + 9) -#define JH7110_AONCLK_RTC_APB (JH7110_SYSCLK_END + 10) -#define JH7110_AONCLK_RTC_INTERNAL (JH7110_SYSCLK_END + 11) -#define JH7110_AONCLK_RTC_32K (JH7110_SYSCLK_END + 12) -#define JH7110_AONCLK_RTC_CAL (JH7110_SYSCLK_END + 13) +#define JH7110_AONCLK_OSC_DIV4 0 +#define JH7110_AONCLK_APB_FUNC 1 +#define JH7110_AONCLK_GMAC0_AHB 2 +#define JH7110_AONCLK_GMAC0_AXI 3 +#define JH7110_AONCLK_GMAC0_RMII_RTX 4 +#define JH7110_AONCLK_GMAC0_TX 5 +#define JH7110_AONCLK_GMAC0_TX_INV 6 +#define JH7110_AONCLK_GMAC0_RX 7 +#define JH7110_AONCLK_GMAC0_RX_INV 8 +#define JH7110_AONCLK_OTPC_APB 9 +#define JH7110_AONCLK_RTC_APB 10 +#define JH7110_AONCLK_RTC_INTERNAL 11 +#define JH7110_AONCLK_RTC_32K 12 +#define JH7110_AONCLK_RTC_CAL 13 -#define JH7110_AONCLK_END (JH7110_SYSCLK_END + 14) +#define JH7110_AONCLK_END 14 -#define JH7110_STGCLK_HIFI4_CORE (JH7110_AONCLK_END + 0) -#define JH7110_STGCLK_USB_APB (JH7110_AONCLK_END + 1) -#define JH7110_STGCLK_USB_UTMI_APB (JH7110_AONCLK_END + 2) -#define JH7110_STGCLK_USB_AXI (JH7110_AONCLK_END + 3) -#define JH7110_STGCLK_USB_LPM (JH7110_AONCLK_END + 4) -#define JH7110_STGCLK_USB_STB (JH7110_AONCLK_END + 5) -#define JH7110_STGCLK_USB_APP_125 (JH7110_AONCLK_END + 6) -#define JH7110_STGCLK_USB_REFCLK (JH7110_AONCLK_END + 7) -#define JH7110_STGCLK_PCIE0_AXI (JH7110_AONCLK_END + 8) -#define JH7110_STGCLK_PCIE0_APB (JH7110_AONCLK_END + 9) -#define JH7110_STGCLK_PCIE0_TL (JH7110_AONCLK_END + 10) -#define JH7110_STGCLK_PCIE1_AXI (JH7110_AONCLK_END + 11) -#define JH7110_STGCLK_PCIE1_APB (JH7110_AONCLK_END + 12) -#define JH7110_STGCLK_PCIE1_TL (JH7110_AONCLK_END + 13) -#define JH7110_STGCLK_PCIE01_MAIN (JH7110_AONCLK_END + 14) -#define JH7110_STGCLK_SEC_HCLK (JH7110_AONCLK_END + 15) -#define JH7110_STGCLK_SEC_MISCAHB (JH7110_AONCLK_END + 16) -#define JH7110_STGCLK_MTRX_GRP0_MAIN (JH7110_AONCLK_END + 17) -#define JH7110_STGCLK_MTRX_GRP0_BUS (JH7110_AONCLK_END + 18) -#define JH7110_STGCLK_MTRX_GRP0_STG (JH7110_AONCLK_END + 19) -#define JH7110_STGCLK_MTRX_GRP1_MAIN (JH7110_AONCLK_END + 20) -#define JH7110_STGCLK_MTRX_GRP1_BUS (JH7110_AONCLK_END + 21) -#define JH7110_STGCLK_MTRX_GRP1_STG (JH7110_AONCLK_END + 22) -#define JH7110_STGCLK_MTRX_GRP1_HIFI (JH7110_AONCLK_END + 23) -#define JH7110_STGCLK_E2_RTC (JH7110_AONCLK_END + 24) -#define JH7110_STGCLK_E2_CORE (JH7110_AONCLK_END + 25) -#define JH7110_STGCLK_E2_DBG (JH7110_AONCLK_END + 26) -#define JH7110_STGCLK_DMA1P_AXI (JH7110_AONCLK_END + 27) -#define JH7110_STGCLK_DMA1P_AHB (JH7110_AONCLK_END + 28) +#define JH7110_STGCLK_HIFI4_CORE 0 +#define JH7110_STGCLK_USB_APB 1 +#define JH7110_STGCLK_USB_UTMI_APB 2 +#define JH7110_STGCLK_USB_AXI 3 +#define JH7110_STGCLK_USB_LPM 4 +#define JH7110_STGCLK_USB_STB 5 +#define JH7110_STGCLK_USB_APP_125 6 +#define JH7110_STGCLK_USB_REFCLK 7 +#define JH7110_STGCLK_PCIE0_AXI 8 +#define JH7110_STGCLK_PCIE0_APB 9 +#define JH7110_STGCLK_PCIE0_TL 10 +#define JH7110_STGCLK_PCIE1_AXI 11 +#define JH7110_STGCLK_PCIE1_APB 12 +#define JH7110_STGCLK_PCIE1_TL 13 +#define JH7110_STGCLK_PCIE01_MAIN 14 +#define JH7110_STGCLK_SEC_HCLK 15 +#define JH7110_STGCLK_SEC_MISCAHB 16 +#define JH7110_STGCLK_MTRX_GRP0_MAIN 17 +#define JH7110_STGCLK_MTRX_GRP0_BUS 18 +#define JH7110_STGCLK_MTRX_GRP0_STG 19 +#define JH7110_STGCLK_MTRX_GRP1_MAIN 20 +#define JH7110_STGCLK_MTRX_GRP1_BUS 21 +#define JH7110_STGCLK_MTRX_GRP1_STG 22 +#define JH7110_STGCLK_MTRX_GRP1_HIFI 23 +#define JH7110_STGCLK_E2_RTC 24 +#define JH7110_STGCLK_E2_CORE 25 +#define JH7110_STGCLK_E2_DBG 26 +#define JH7110_STGCLK_DMA1P_AXI 27 +#define JH7110_STGCLK_DMA1P_AHB 28 -#define JH7110_STGCLK_END (JH7110_AONCLK_END + 29) +#define JH7110_STGCLK_END 29 #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7110_H__ */ diff --git a/include/environment/ti/mmc.env b/include/environment/ti/mmc.env index 5677d05..a052d28 100644 --- a/include/environment/ti/mmc.env +++ b/include/environment/ti/mmc.env @@ -13,7 +13,8 @@ importbootenv=echo Importing environment from mmc${mmcdev} ...; env import -t ${loadaddr} ${filesize} loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenvfile} loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile} -loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile} +loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/dtb/${fdtfile} +get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/dtb/${name_fdt} envboot=mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device ${mmcdev}; @@ -32,7 +33,7 @@ envboot=mmc dev ${mmcdev}; fi; mmcloados= if test ${boot_fdt} = yes || test ${boot_fdt} = try; then - if run loadfdt; then + if run get_fdt_mmc; then bootz ${loadaddr} - ${fdtaddr}; else if test ${boot_fdt} = try; then diff --git a/include/environment/ti/ti_armv7_common.env b/include/environment/ti/ti_armv7_common.env index 0c0929d..e87a41a 100644 --- a/include/environment/ti/ti_armv7_common.env +++ b/include/environment/ti/ti_armv7_common.env @@ -22,4 +22,13 @@ get_overlaystring= done; get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile} run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring} - +bootcmd_ti_mmc= + run findfdt; run init_${boot}; +#if CONFIG_CMD_REMOTEPROC + run main_cpsw0_qsgmii_phyinit; run boot_rprocs; +#endif + if test ${boot_fit} -eq 1; + then run get_fit_${boot}; run get_overlaystring; run run_fit; + else; + run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; + fi; diff --git a/lib/Kconfig b/lib/Kconfig index c8b3ec1..3926652 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -508,6 +508,7 @@ config SHA256 config SHA512 bool "Enable SHA512 support" + default y if TI_SECURE_DEVICE && FIT_SIGNATURE help This option enables support of hashing using SHA512 algorithm. The hash is calculated in software. |