diff options
1656 files changed, 20280 insertions, 16160 deletions
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index db45291..314d277 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -2,7 +2,7 @@ variables: windows_vm: windows-2019 ubuntu_vm: ubuntu-18.04 macos_vm: macOS-10.15 - ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20220113-03Feb2022 + ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20220302-15Mar2022 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", # since our $(ci_runner_image) user is not root. @@ -68,10 +68,12 @@ stages: -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' \ | sort -u > $KSYMLST for CFG in `find include/configs -name "*.h"`; do - grep '#define[[:blank:]]CONFIG_' $CFG | \ - sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | \ + (grep '#define[[:blank:]]CONFIG_' $CFG | \ + sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ; \ + grep '#undef[[:blank:]]CONFIG_' $CFG | \ + sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') | \ sort -u > ${KUSEDLST} || true - NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \ + NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | \ cut -d , -f 3` if [[ $NUM -ne 0 ]]; then echo "Unmigrated symbols found in $CFG" @@ -202,6 +204,28 @@ stages: export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH test/nokia_rx51_test.sh + - job: pylint + displayName: Check for any pylint regressions + pool: + vmImage: $(ubuntu_vm) + container: + image: $(ci_runner_image) + options: $(container_option) + steps: + - script: | + cd ${WORK_DIR} + export USER=azure + pip install -r test/py/requirements.txt + pip install asteval pylint==2.12.2 pyopenssl + export PATH=${PATH}:~/.local/bin + echo "[MASTER]" >> .pylintrc + echo "load-plugins=pylint.extensions.docparams" >> .pylintrc + export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl + ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w --board sandbox_spl + pylint --version + export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt + make pylint_err + - stage: test_py jobs: - job: test_py diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 85b5296..43fe8c6 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found at: # https://source.denx.de/u-boot/gitlab-ci-runner -image: trini/u-boot-gitlab-ci-runner:focal-20220113-03Feb2022 +image: trini/u-boot-gitlab-ci-runner:focal-20220302-15Mar2022 # We run some tests in different order, to catch some failures quicker. stages: @@ -129,10 +129,12 @@ check for migrated symbols in board header: -e 's/^\s*menuconfig *\([A-Za-z0-9_]*\).*$/CONFIG_\1/p' | sort -u > $KSYMLST; for CFG in `find include/configs -name "*.h"`; do - grep '#define[[:blank:]]CONFIG_' $CFG | - sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' | + (grep '#define[[:blank:]]CONFIG_' $CFG | + sed -n 's/#define.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p' ; + grep '#undef[[:blank:]]CONFIG_' $CFG | + sed -n 's/#undef.\(CONFIG_[A-Za-z0-9_]*\).*/\1/p') | sort -u > ${KUSEDLST} || true; - NUM=`comm -12 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | + NUM=`comm -123 --total --output-delimiter=, ${KSYMLST} ${KUSEDLST} | cut -d , -f 3`; if [[ $NUM -ne 0 ]]; then echo "Unmigrated symbols found in $CFG"; @@ -215,6 +217,22 @@ Run tests for Nokia RX-51 (aka N900): - export PATH=/opt/gcc-11.1.0-nolibc/arm-linux-gnueabi/bin:$PATH; test/nokia_rx51_test.sh +# Check for any pylint regressions +Run pylint: + stage: testsuites + script: + - pip install -r test/py/requirements.txt + - pip install asteval pylint==2.12.2 pyopenssl + - export PATH=${PATH}:~/.local/bin + - echo "[MASTER]" >> .pylintrc + - echo "load-plugins=pylint.extensions.docparams" >> .pylintrc + - export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl + - ./tools/buildman/buildman -T0 -o ${UBOOT_TRAVIS_BUILD_DIR} -w + --board sandbox_spl + - pylint --version + - export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt" + - make pylint_err + # Test sandbox with test.py sandbox test.py: variables: @@ -72,15 +72,32 @@ config CLANG_VERSION int default $(shell,$(srctree)/scripts/clang-version.sh $(CC)) +choice + prompt "Optimization level" + default CC_OPTIMIZE_FOR_SIZE + config CC_OPTIMIZE_FOR_SIZE bool "Optimize for size" - default y help - Enabling this option will pass "-Os" instead of "-O2" to gcc - resulting in a smaller U-Boot image. + Enabling this option will pass "-Os" to gcc, resulting in a smaller + U-Boot image. This option is enabled by default for U-Boot. +config CC_OPTIMIZE_FOR_SPEED + bool "Optimize for speed" + help + Enabling this option will pass "-O2" to gcc, resulting in a faster + U-Boot image. + +config CC_OPTIMIZE_FOR_DEBUG + bool "Optimize for debugging" + help + Enabling this option will pass "-Og" to gcc, enabling optimizations + which don't interfere with debugging. + +endchoice + config OPTIMIZE_INLINING bool "Allow compiler to uninline functions marked 'inline' in full U-Boot" help diff --git a/MAINTAINERS b/MAINTAINERS index 96582fc..aca97cd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -352,6 +352,7 @@ F: arch/arm/mach-at91/ F: board/atmel/ F: drivers/cpu/at91_cpu.c F: drivers/misc/microchip_flexcom.c +F: drivers/timer/atmel_tcb_timer.c F: include/dt-bindings/mfd/atmel-flexcom.h F: drivers/timer/mchp-pit64b-timer.c @@ -621,8 +622,10 @@ F: drivers/i2c/muxes/pca954x.c F: drivers/i2c/zynq_i2c.c F: drivers/mmc/zynq_sdhci.c F: drivers/mtd/nand/raw/zynq_nand.c +F: drivers/net/phy/ethernet_id.c F: drivers/net/phy/xilinx_phy.c F: drivers/net/zynq_gem.c +F: drivers/pinctrl/pinctrl-zynqmp.c F: drivers/serial/serial_zynq.c F: drivers/spi/zynq_qspi.c F: drivers/spi/zynq_spi.c @@ -640,6 +643,7 @@ F: arch/arm/mach-zynqmp/ F: drivers/clk/clk_zynqmp.c F: driver/firmware/firmware-zynqmp.c F: drivers/fpga/zynqpl.c +F: drivers/gpio/gpio_slg7xl45106.c F: drivers/gpio/zynq_gpio.c F: drivers/gpio/zynqmp_gpio_modepin.c F: drivers/i2c/i2c-cdns.c @@ -659,7 +663,6 @@ F: drivers/soc/soc_xilinx_zynqmp.c F: drivers/spi/zynq_qspi.c F: drivers/spi/zynq_spi.c F: drivers/timer/cadence-ttc.c -F: drivers/usb/host/ehci-zynq.c F: drivers/video/seps525.c F: drivers/watchdog/cdns_wdt.c F: include/zynqmppl.h @@ -813,6 +816,25 @@ S: Maintained F: doc/usage/environment.rst F: scripts/env2string.awk +EROFS +M: Huang Jianan <jnhuang95@gmail.com> +L: linux-erofs@lists.ozlabs.org +S: Maintained +F: cmd/erofs.c +F: fs/erofs/ +F: include/erofs.h +F: test/py/tests/test_fs/test_erofs.py + +EVENTS +M: Simon Glass <sjg@chromium.org> +S: Maintained +F: cmd/event.c +F: common/event.c +F: include/event.h +F: scripts/event_dump.py +F: test/common/event.c +F: test/py/tests/test_event_dump.py + FASTBOOT S: Orphaned F: cmd/fastboot.c @@ -1152,6 +1174,11 @@ F: arch/sandbox/ F: doc/arch/sandbox.rst F: include/dt-bindings/*/sandbox*.h +SEMIHOSTING +R: Sean Anderson <sean.anderson@seco.com> +S: Orphaned +N: semihosting + SETEXPR M: Roland Gaudig <roland.gaudig@weidmueller.com> S: Maintained @@ -521,7 +521,8 @@ env_h := include/generated/environment.h no-dot-config-targets := clean clobber mrproper distclean \ help %docs check% coccicheck \ - ubootversion backup tests check qcheck tcheck pylint + ubootversion backup tests check qcheck tcheck pylint \ + pylint_err config-targets := 0 mixed-targets := 0 @@ -682,10 +683,16 @@ endif ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE KBUILD_CFLAGS += -Os -else +endif + +ifdef CONFIG_CC_OPTIMIZE_FOR_SPEED KBUILD_CFLAGS += -O2 endif +ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG +KBUILD_CFLAGS += -Og +endif + LTO_CFLAGS := LTO_FINAL_LDFLAGS := export LTO_CFLAGS LTO_FINAL_LDFLAGS @@ -1335,6 +1342,7 @@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ -a tpl-bss-pad=$(if $(CONFIG_TPL_SEPARATE_BSS),,1) \ -a spl-dtb=$(CONFIG_SPL_OF_REAL) \ -a tpl-dtb=$(CONFIG_TPL_OF_REAL) \ + -a pre-load-key-path=${PRE_LOAD_KEY_PATH} \ $(BINMAN_$(@F)) OBJCOPYFLAGS_u-boot.ldr.hex := -I binary -O ihex @@ -2265,7 +2273,7 @@ distclean: mrproper @rm -f boards.cfg CHANGELOG # See doc/develop/python_cq.rst -PHONY += pylint +PHONY += pylint pylint_err PYLINT_BASE := scripts/pylint.base PYLINT_CUR := pylint.cur PYLINT_DIFF := pylint.diff @@ -2307,6 +2315,11 @@ pylint: echo "No pylint regressions"; \ fi +# Check for errors only +pylint_err: + $(Q)pylint -E -j 0 --ignore-imports=yes \ + $(shell find tools test -name "*.py") + backup: F=`basename $(srctree)` ; cd .. ; \ gtar --force-local -zcvf `LC_ALL=C date "+$$F-%Y-%m-%d-%T.tar.gz"` $$F @@ -374,14 +374,6 @@ The following options need to be configured: See Freescale App Note 4493 for more information about this erratum. - CONFIG_A003399_NOR_WORKAROUND - Enables a workaround for IFC erratum A003399. It is only - required during NOR boot. - - CONFIG_A008044_WORKAROUND - Enables a workaround for T1040/T1042 erratum A008044. It is only - required during NAND boot and valid for Rev 1.0 SoC revision - CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY This is the value to write into CCSR offset 0x18600 @@ -411,10 +403,6 @@ The following options need to be configured: This CONFIG is defined when the CPC is configured as SRAM at the time of U-Boot entry and is required to be re-initialized. - CONFIG_DEEP_SLEEP - Indicates this SoC supports deep sleep feature. If deep sleep is - supported, core will start to execute uboot when wakes up. - - Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN @@ -565,13 +553,6 @@ The following options need to be configured: boards with QUICC Engines require OF_QE to set UCC MAC addresses - CONFIG_OF_SYSTEM_SETUP - - Other code has addition modification that it wants to make - to the flat device tree before handing it off to the kernel. - This causes ft_system_setup() to be called before booting - the kernel. - CONFIG_OF_IDE_FIXUP U-Boot can detect if an IDE device is present or not. @@ -985,34 +966,12 @@ The following options need to be configured: - Keyboard Support: See Kconfig help for available keyboard drivers. -- Video support: - CONFIG_FSL_DIU_FB - Enable the Freescale DIU video driver. Reference boards for - SOCs that have a DIU should define this macro to enable DIU - support, and should also define these other macros: - - CONFIG_SYS_DIU_ADDR - CONFIG_VIDEO - CONFIG_CFB_CONSOLE - CONFIG_VIDEO_SW_CURSOR - CONFIG_VGA_AS_SINGLE_DEVICE - CONFIG_VIDEO_BMP_LOGO - - The DIU driver will look for the 'video-mode' environment - variable, and if defined, enable the DIU as a console during - boot. See the documentation file doc/README.video for a - description of this variable. - - LCD Support: CONFIG_LCD Define this to enable LCD support (for output to LCD display); also select one of the supported displays by defining one of these: - CONFIG_ATMEL_LCD: - - HITACHI TX09D70VM1CCA, 3.5", 240x320. - CONFIG_NEC_NL6448AC33: NEC NL6448AC33-18. Active, color, single scan. @@ -1081,22 +1040,11 @@ The following options need to be configured: If CONFIG_LCD_ROTATION is not defined, the console will be initialized with 0degree rotation. - CONFIG_LCD_BMP_RLE8 - - Support drawing of RLE8-compressed bitmaps on the LCD. - - MII/PHY support: CONFIG_PHY_CLOCK_FREQ (ppc4xx) The clock frequency of the MII bus - CONFIG_PHY_RESET_DELAY - - Some PHY like Intel LXT971A need extra delay after - reset before any MII register access is possible. - For such PHY, set this option to the usec delay - required. (minimum 300usec for LXT971A) - CONFIG_PHY_CMD_DELAY (ppc4xx) Some PHY like Intel LXT971A need extra delay after @@ -1172,35 +1120,6 @@ The following options need to be configured: from a BOOTP client in networks with unusually high latency. - DHCP Advanced Options: - You can fine tune the DHCP functionality by defining - CONFIG_BOOTP_* symbols: - - CONFIG_BOOTP_NISDOMAIN - CONFIG_BOOTP_BOOTFILESIZE - CONFIG_BOOTP_NTPSERVER - CONFIG_BOOTP_TIMEOFFSET - CONFIG_BOOTP_VENDOREX - CONFIG_BOOTP_MAY_FAIL - - CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found - after the configured retry count, the call will fail - instead of starting over. This can be used to fail over - to Link-local IP address configuration if the DHCP server - is not available. - - CONFIG_BOOTP_DHCP_REQUEST_DELAY - - A 32bit value in microseconds for a delay between - receiving a "DHCP Offer" and sending the "DHCP Request". - This fixes a problem with certain DHCP servers that don't - respond 100% of the time to a "DHCP request". E.g. On an - AT91RM9200 processor running at 180MHz, this delay needed - to be *at least* 15,000 usec before a Windows Server 2003 - DHCP server would reply 100% of the time. I recommend at - least 50,000 usec to be safe. The alternative is to hope - that one of the retries will be successful but note that - the DHCP timeout and retry process takes a longer than - this delay. - Link-local IP address negotiation: Negotiate with other link-local clients on the local network @@ -1592,24 +1511,6 @@ The following options need to be configured: FLAGADM - Error Recovery: - CONFIG_NET_RETRY_COUNT - - This variable defines the number of retries for - network operations like ARP, RARP, TFTP, or BOOTP - before giving up the operation. If not defined, a - default value of 5 is used. - - CONFIG_ARP_TIMEOUT - - Timeout waiting for an ARP reply in milliseconds. - - CONFIG_NFS_TIMEOUT - - Timeout in milliseconds used in NFS protocol. - If you encounter "ERROR: Cannot umount" in nfs command, - try longer timeout such as - #define CONFIG_NFS_TIMEOUT 10000UL - Note: In the current implementation, the local variables @@ -1674,26 +1575,6 @@ The following options need to be configured: this is instead controlled by the value of /config/load-environment. -- TFTP Fixed UDP Port: - CONFIG_TFTP_PORT - - If this is defined, the environment variable tftpsrcp - is used to supply the TFTP UDP source port value. - If tftpsrcp isn't defined, the normal pseudo-random port - number generator is used. - - Also, the environment variable tftpdstp is used to supply - the TFTP UDP destination port value. If tftpdstp isn't - defined, the normal port 69 is used. - - The purpose for tftpsrcp is to allow a TFTP server to - blindly start the TFTP transfer using the pre-configured - target IP address and UDP port. This has the effect of - "punching through" the (Windows XP) firewall, allowing - the remainder of the TFTP transfer to proceed normally. - A better solution is to properly configure the firewall, - but sometimes that is not allowed. - CONFIG_STANDALONE_LOAD_ADDR This option defines a board specific value for the @@ -1876,10 +1757,6 @@ The following options need to be configured: CONFIG_SPL_SKIP_RELOCATE Avoid SPL relocation - CONFIG_SPL_NAND_IDENT - SPL uses the chip ID list to identify the NAND flash. - Requires CONFIG_SPL_NAND_BASE. - CONFIG_SPL_UBI Support for a lightweight UBI (fastmap) scanner and loader @@ -1972,7 +1849,6 @@ typically in board_init_f() and board_init_r(). - CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f() - CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r() - CONFIG_BOARD_LATE_INIT: Call board_late_init() -- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init() Configuration Settings: ----------------------- @@ -2041,12 +1917,6 @@ Configuration Settings: - CONFIG_SYS_FLASH_BASE: Physical start address of Flash memory. -- CONFIG_SYS_MONITOR_BASE: - Physical start address of boot monitor code (set by - make config files to be same as the text base address - (CONFIG_SYS_TEXT_BASE) used when linking) - same as - CONFIG_SYS_FLASH_BASE when booting from flash. - - CONFIG_SYS_MONITOR_LEN: Size of memory reserved for monitor code, used to determine _at_compile_time_ (!) if the environment is @@ -2196,14 +2066,6 @@ Configuration Settings: while unprotecting/erasing/programming. Please only enable this option if you really know what you are doing. -- CONFIG_SYS_RX_ETH_BUFFER: - Defines the number of Ethernet receive buffers. On some - Ethernet controllers it is recommended to set this value - to 8 or even higher (EEPRO100 or 405 EMAC), since all - buffers can be full shortly after enabling the interface - on high Ethernet traffic. - Defaults to 4 if not defined. - - CONFIG_ENV_MAX_ENTRIES Maximum number of entries in the hash table that is used @@ -2301,12 +2163,6 @@ Note: once the monitor has been relocated, then it will complain if the default environment is used; a new CRC is computed as soon as you use the "saveenv" command to store a valid environment. -- CONFIG_SYS_FAULT_ECHO_LINK_DOWN: - Echo the inverted Ethernet link state to the fault LED. - - Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR - also needs to be defined. - - CONFIG_SYS_FAULT_MII_ADDR: MII address of the PHY to check for the Ethernet link state. diff --git a/arch/Kconfig b/arch/Kconfig index 7ecb375..156567e 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -94,6 +94,7 @@ config NIOS2 bool "Nios II architecture" select CPU select DM + imply DM_EVENT select OF_CONTROL select SUPPORT_OF_CONTROL imply CMD_DM @@ -113,6 +114,7 @@ config RISCV select DM imply DM_SERIAL imply DM_ETH + imply DM_EVENT imply DM_MMC imply DM_SPI imply DM_SPI_FLASH @@ -203,6 +205,7 @@ config SANDBOX imply KEYBOARD imply PHYSMEM imply GENERATE_ACPI_TABLE + imply BINMAN config SH bool "SuperH architecture" @@ -238,6 +241,7 @@ config X86 imply CMD_SF_TEST imply CMD_ZBOOT imply DM_ETH + imply DM_EVENT imply DM_GPIO imply DM_KEYBOARD imply DM_MMC @@ -444,3 +448,5 @@ source "arch/sh/Kconfig" source "arch/x86/Kconfig" source "arch/xtensa/Kconfig" source "arch/riscv/Kconfig" + +source "board/keymile/Kconfig" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4567c18..f277929 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -403,11 +403,50 @@ config ARM_SMCCC firmware (for example, PSCI) according to SMCCC. config SEMIHOSTING - bool "support boot from semihosting" + bool "Support ARM semihosting" help - In emulated environments, semihosting is a way for - the hosted environment to call out to the emulator to - retrieve files from the host machine. + Semihosting is a method for a target to communicate with a host + debugger. It uses special instructions which the debugger will trap + on and interpret. This allows U-Boot to read/write files, print to + the console, and execute arbitrary commands on the host system. + + Enabling this option will add support for reading and writing files + on the host system. If you don't have a debugger attached then trying + to do this will likely cause U-Boot to hang. Say 'n' if you are unsure. + +config SEMIHOSTING_FALLBACK + bool "Recover gracefully when semihosting fails" + depends on SEMIHOSTING && ARM64 + default y + help + Normally, if U-Boot makes a semihosting call and no debugger is + attached, then it will panic due to a synchronous abort + exception. This config adds an exception handler which will allow + U-Boot to recover. Say 'y' if unsure. + +config SPL_SEMIHOSTING + bool "Support ARM semihosting in SPL" + depends on SPL + help + Semihosting is a method for a target to communicate with a host + debugger. It uses special instructions which the debugger will trap + on and interpret. This allows U-Boot to read/write files, print to + the console, and execute arbitrary commands on the host system. + + Enabling this option will add support for reading and writing files + on the host system. If you don't have a debugger attached then trying + to do this will likely cause U-Boot to hang. Say 'n' if you are unsure. + +config SPL_SEMIHOSTING_FALLBACK + bool "Recover gracefully when semihosting fails in SPL" + depends on SPL_SEMIHOSTING && ARM64 + select ARMV8_SPL_EXCEPTION_VECTORS + default y + help + Normally, if U-Boot makes a semihosting call and no debugger is + attached, then it will panic due to a synchronous abort + exception. This config adds an exception handler which will allow + U-Boot to recover. Say 'y' if unsure. config SYS_THUMB_BUILD bool "Build U-Boot using the Thumb instruction set" @@ -617,6 +656,13 @@ config ARCH_BCM63158 select OF_CONTROL imply CMD_DM +config ARCH_BCM6753 + bool "Broadcom BCM6753 family" + select CPU_V7A + select DM + select OF_CONTROL + imply CMD_DM + config ARCH_BCM68360 bool "Broadcom BCM68360 family" select DM @@ -767,6 +813,7 @@ config ARCH_OMAP2PLUS select SUPPORT_SPL imply TI_SYSC if DM && OF_CONTROL imply FIT + imply DM_EVENT config ARCH_MESON bool "Amlogic Meson" @@ -811,6 +858,7 @@ config ARCH_IMX8 select MACH_IMX select OF_CONTROL select ENABLE_ARM_SOC_BOOT0_HOOK + imply DM_EVENT config ARCH_IMX8M bool "NXP i.MX8M platform" @@ -824,6 +872,7 @@ config ARCH_IMX8M select DM select SUPPORT_SPL imply CMD_DM + imply DM_EVENT config ARCH_IMX8ULP bool "NXP i.MX8ULP platform" @@ -834,6 +883,7 @@ config ARCH_IMX8ULP select SUPPORT_SPL select GPIO_EXTRA_HEADER imply CMD_DM + imply DM_EVENT config ARCH_IMXRT bool "NXP i.MXRT platform" @@ -869,6 +919,7 @@ config ARCH_MX31 config ARCH_MX7ULP bool "NXP MX7ULP" + select BOARD_POSTCLK_INIT select CPU_V7A select GPIO_EXTRA_HEADER select MACH_IMX @@ -894,6 +945,7 @@ config ARCH_MX7 config ARCH_MX6 bool "Freescale MX6" + select BOARD_POSTCLK_INIT select CPU_V7A select GPIO_EXTRA_HEADER select MACH_IMX @@ -1237,34 +1289,19 @@ config ARCH_TEGRA imply DISTRO_DEFAULTS imply FAT_WRITE -config TARGET_VEXPRESS64_AEMV8A - bool "Support vexpress_aemv8a" +config ARCH_VEXPRESS64 + bool "Support ARMv8 Arm Ltd. VExpress based boards and models" select ARM64 - select GPIO_EXTRA_HEADER - select PL01X_SERIAL - -config TARGET_VEXPRESS64_BASE_FVP - bool "Support Versatile Express ARMv8a FVP BASE model" - select ARM64 - select GPIO_EXTRA_HEADER - select PL01X_SERIAL - select SEMIHOSTING - -config TARGET_VEXPRESS64_JUNO - bool "Support Versatile Express Juno Development Platform" - select ARM64 - select GPIO_EXTRA_HEADER - select PL01X_SERIAL select DM + select DM_SERIAL + select PL01X_SERIAL select OF_CONTROL select CLK - select DM_SERIAL - select ARM_PSCI_FW - select PSCI_RESET - select DM_ETH select BLK - select USB - imply OF_HAS_PRIOR_STAGE + select MTD_NOR_FLASH if MTD + select FLASH_CFI_DRIVER if MTD + select ENV_IS_IN_FLASH if MTD + imply DISTRO_DEFAULTS config TARGET_TOTAL_COMPUTE bool "Support Total Compute Platform" @@ -1975,6 +2012,25 @@ config TARGET_DURIAN Support for durian platform. It has 2GB Sdram, uart and pcie. +config TARGET_POMELO + bool "Support Phytium Pomelo Platform" + select ARM64 + select DM + select AHCI + select SCSI_AHCI + select AHCI_PCI + select BLK + select PCI + select DM_PCI + select SCSI + select DM_SCSI + select DM_SERIAL + select DM_ETH if NET + imply CMD_PCI + help + Support for pomelo platform. + It has 8GB Sdram, uart and pcie. + config TARGET_PRESIDIO_ASIC bool "Support Cortina Presidio ASIC Platform" select ARM64 @@ -2206,6 +2262,7 @@ source "board/armltd/vexpress/Kconfig" source "board/armltd/vexpress64/Kconfig" source "board/cortina/presidio-asic/Kconfig" source "board/broadcom/bcm963158/Kconfig" +source "board/broadcom/bcm96753ref/Kconfig" source "board/broadcom/bcm968360bg/Kconfig" source "board/broadcom/bcm968580xref/Kconfig" source "board/broadcom/bcmns3/Kconfig" @@ -2245,8 +2302,8 @@ source "board/traverse/ten64/Kconfig" source "board/variscite/dart_6ul/Kconfig" source "board/vscom/baltos/Kconfig" source "board/phytium/durian/Kconfig" +source "board/phytium/pomelo/Kconfig" source "board/xen/xenguest_arm64/Kconfig" -source "board/keymile/Kconfig" source "arch/arm/Kconfig.debug" diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig index 2eeef3c..f1e4e26 100644 --- a/arch/arm/cpu/armv7/Kconfig +++ b/arch/arm/cpu/armv7/Kconfig @@ -27,6 +27,37 @@ config ARMV7_BOOT_SEC_DEFAULT This can be overridden at run-time by setting the bootm_boot_mode env. variable to "sec" or "nonsec". +config HAS_ARMV7_SECURE_BASE + bool "Enable support for a ahardware secure memory area" + default y if ARCH_LS1021A || ARCH_MX7 || ARCH_MX7ULP || ARCH_STM32MP \ + || MACH_SUN6I || MACH_SUN7I || MACH_SUN8I || TEGRA124 + +config ARMV7_SECURE_BASE + hex "Base address for secure mode memory" + depends on HAS_ARMV7_SECURE_BASE + default 0xfff00000 if TEGRA124 + default 0x2ffc0000 if ARCH_STM32MP + default 0x2f000000 if ARCH_MX7ULP + default 0x10010000 if ARCH_LS1021A + default 0x00900000 if ARCH_MX7 + default 0x00044000 if MACH_SUN8I + default 0x00020000 if MACH_SUN6I || MACH_SUN7I + +config ARMV7_SECURE_RESERVE_SIZE + hex + depends on TEGRA124 && HAS_ARMV7_SECURE_BASE + default 0x100000 + help + Reserve top 1M for secure RAM + +config ARMV7_SECURE_MAX_SIZE + hex + depends on ARMV7_SECURE_BASE && ARCH_STM32MP || MACH_SUN6I \ + || MACH_SUN7I || MACH_SUN8I + default 0xbc00 if MACH_SUN8I && !MACH_SUN8I_H3 + default 0x3c00 if MACH_SUN8I && MACH_SUN8I_H3 + default 0x10000 + config ARMV7_VIRT bool "Enable support for hardware virtualization" if EXPERT depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 6a948d7..ef1f456 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -5,7 +5,7 @@ config ARCH_LS1021A select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 select SYS_FSL_ERRATUM_A008407 - select SYS_FSL_ERRATUM_A008850 + select SYS_FSL_ERRATUM_A008850 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008997 if USB select SYS_FSL_ERRATUM_A009007 if USB select SYS_FSL_ERRATUM_A009008 if USB diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c index 8a95ee8..728efc4 100644 --- a/arch/arm/cpu/armv7/ls102xa/soc.c +++ b/arch/arm/cpu/armv7/ls102xa/soc.c @@ -12,7 +12,9 @@ #include <asm/arch/ls102xa_soc.h> #include <asm/arch/ls102xa_stream_id.h> #include <fsl_csu.h> +#ifdef CONFIG_SYS_FSL_ERRATUM_A008850 #include <fsl_ddr_sdram.h> +#endif struct liodn_id_table sec_liodn_tbl[] = { SET_SEC_JR_LIODN_ENTRY(0, 0x10, 0x10), @@ -172,10 +174,6 @@ int arch_soc_init(void) out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); #endif -#ifdef CONFIG_VIDEO_FSL_DCU_FB - out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); -#endif - /* Configure Little endian for SAI, ASRC and SPDIF */ out_be32(&scfg->endiancr, SCFG_ENDIANCR_LE); diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 9967376..4d4469c 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -31,6 +31,12 @@ config ARMV8_SET_SMPEN it can be safely enabled when EL2/EL3 initialized SMPEN bit or when CPU implementation doesn't include that register. +config ARMV8_SWITCH_TO_EL1 + bool "Enable switching to running in EL1" + help + In some circumstances we need to switch to running in EL1. + Enable this option to have U-Boot switch to EL1. + config ARMV8_SPIN_TABLE bool "Support spin-table enable method" depends on ARMV8_MULTIENTRY && OF_LIBFDT diff --git a/arch/arm/cpu/armv8/exceptions.S b/arch/arm/cpu/armv8/exceptions.S index a15af72..504d566 100644 --- a/arch/arm/cpu/armv8/exceptions.S +++ b/arch/arm/cpu/armv8/exceptions.S @@ -77,14 +77,18 @@ _save_el_regs: switch_el x11, 3f, 2f, 1f 3: mrs x1, esr_el3 mrs x2, elr_el3 + mrs x3, spsr_el3 b 0f 2: mrs x1, esr_el2 mrs x2, elr_el2 + mrs x3, spsr_el2 b 0f 1: mrs x1, esr_el1 mrs x2, elr_el1 + mrs x3, spsr_el1 0: - stp x2, x0, [sp, #-16]! + stp x1, x0, [sp, #-16]! + stp x3, x2, [sp, #-16]! mov x0, sp ret @@ -98,7 +102,7 @@ _save_el_regs: * This is the first part of the shared routine called into from all entries. */ exception_exit: - ldp x2, x0, [sp],#16 + ldp xzr, x2, [sp],#16 switch_el x11, 3f, 2f, 1f 3: msr elr_el3, x2 b _restore_regs @@ -118,6 +122,7 @@ exception_exit: * This is the second part of the shared routine called into from all entries. */ _restore_regs: + ldp xzr, x0, [sp],#16 ldp x1, x2, [sp],#16 ldp x3, x4, [sp],#16 ldp x5, x6, [sp],#16 diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index 2ded3e4..177f568 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -8,7 +8,6 @@ #include <clock_legacy.h> #include <cpu_func.h> #include <env.h> -#include <fsl_ddr_sdram.h> #include <init.h> #include <hang.h> #include <log.h> @@ -36,6 +35,7 @@ #endif #include <asm/armv8/sec_firmware.h> #ifdef CONFIG_SYS_FSL_DDR +#include <fsl_ddr_sdram.h> #include <fsl_ddr.h> #endif #include <asm/arch/clock.h> @@ -1632,12 +1632,14 @@ void update_early_mmu_table(void) __weak int dram_init(void) { +#ifdef CONFIG_SYS_FSL_DDR fsl_initdram(); #if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \ defined(CONFIG_SPL_BUILD) /* This will break-before-make MMU for DDR */ update_early_mmu_table(); #endif +#endif return 0; } diff --git a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S index 3aa1a9c..2fb4e40 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S @@ -74,15 +74,6 @@ ENDPROC(smp_kick_all_cpus) ENTRY(lowlevel_init) mov x29, lr /* Save LR */ - /* unmask SError and abort */ - msr daifclr, #4 - - /* Set HCR_EL2[AMO] so SError @EL2 is taken */ - mrs x0, hcr_el2 - orr x0, x0, #0x20 /* AMO */ - msr hcr_el2, x0 - isb - switch_el x1, 1f, 100f, 100f /* skip if not in EL3 */ 1: @@ -209,7 +200,7 @@ ENTRY(lowlevel_init) #endif 100: - branch_if_master x0, x1, 2f + branch_if_master x0, 2f #if defined(CONFIG_MP) && defined(CONFIG_ARMV8_MULTIENTRY) /* diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c index 564cc27..5f09ef0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c @@ -12,6 +12,7 @@ #include <image.h> #include <init.h> #include <log.h> +#include <semihosting.h> #include <spl.h> #include <asm/cache.h> #include <asm/global_data.h> @@ -27,6 +28,8 @@ DECLARE_GLOBAL_DATA_PTR; u32 spl_boot_device(void) { + if (semihosting_enabled()) + return BOOT_DEVICE_SMH; #ifdef CONFIG_SPL_MMC return BOOT_DEVICE_MMC1; #endif diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index 91b00a4..6a6a4f8 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -126,6 +126,8 @@ pie_fixup_done: b 0f 2: mrs x1, hcr_el2 tbnz x1, #34, 1f /* HCR_EL2.E2H */ + orr x1, x1, #HCR_EL2_AMO_EL2 /* Route SErrors to EL2 */ + msr hcr_el2, x1 set_vbar vbar_el2, x0 mov x0, #0x33ff msr cptr_el2, x0 /* Enable FP/SIMD */ @@ -134,6 +136,7 @@ pie_fixup_done: mov x0, #3 << 20 msr cpacr_el1, x0 /* Enable FP/SIMD */ 0: + msr daifclr, #0x4 /* Unmask SError interrupts */ #ifdef COUNTER_FREQUENCY branch_if_not_highest_el x0, 4f @@ -172,11 +175,11 @@ pie_fixup_done: bl lowlevel_init #if defined(CONFIG_ARMV8_SPIN_TABLE) && !defined(CONFIG_SPL_BUILD) - branch_if_master x0, x1, master_cpu + branch_if_master x0, master_cpu b spin_table_secondary_jump /* never return */ #elif defined(CONFIG_ARMV8_MULTIENTRY) - branch_if_master x0, x1, master_cpu + branch_if_master x0, master_cpu /* * Slave CPUs @@ -189,6 +192,7 @@ slave_cpu: br x0 /* branch to the given address */ #endif /* CONFIG_ARMV8_MULTIENTRY */ master_cpu: + msr SPSel, #1 /* make sure we use SP_ELx */ bl _main /*-----------------------------------------------------------------------*/ @@ -301,7 +305,7 @@ WEAK(lowlevel_init) #endif #ifdef CONFIG_ARMV8_MULTIENTRY - branch_if_master x0, x1, 2f + branch_if_master x0, 2f /* * Slave should wait for master clearing spin table. diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 644ba96..cd9a820 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -350,6 +350,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-zcu104-revA.dtb \ zynqmp-zcu104-revC.dtb \ zynqmp-zcu106-revA.dtb \ + zynqmp-zcu106-rev1.0.dtb \ zynqmp-zcu111-revA.dtb \ zynqmp-zcu1275-revA.dtb \ zynqmp-zcu1275-revB.dtb \ @@ -1045,7 +1046,7 @@ dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \ omap5-uevm.dtb dtb-$(CONFIG_TARGET_SAMA7G5EK) += \ - sama7g5ek.dtb + at91-sama7g5ek.dtb dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \ at91-sama5d2_ptc_ek.dtb @@ -1105,6 +1106,9 @@ dtb-$(CONFIG_ARCH_BCM63158) += \ dtb-$(CONFIG_ARCH_BCM68360) += \ bcm968360bg.dtb +dtb-$(CONFIG_ARCH_BCM6753) += \ + bcm96753ref.dtb + dtb-$(CONFIG_ARCH_BCM6858) += \ bcm968580xref.dtb @@ -1181,11 +1185,14 @@ dtb-$(CONFIG_TARGET_MX53PPD) += imx53-ppd.dtb # TODO(Linus Walleij <linus.walleij@linaro.org>): Should us a single vexpress # Kconfig option to build all of these. See examples above. dtb-$(CONFIG_TARGET_VEXPRESS_CA9X4) += vexpress-v2p-ca9.dtb +dtb-$(CONFIG_TARGET_VEXPRESS64_BASE_FVP) += fvp-base-revc.dtb +dtb-$(CONFIG_TARGET_VEXPRESS64_BASER_FVP) += arm_fvp.dtb dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb dtb-$(CONFIG_TARGET_TOTAL_COMPUTE) += total_compute.dtb dtb-$(CONFIG_TARGET_DURIAN) += phytium-durian.dtb +dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi index b509302..5871344 100644 --- a/arch/arm/dts/am33xx.dtsi +++ b/arch/arm/dts/am33xx.dtsi @@ -40,6 +40,9 @@ ethernet1 = &cpsw_emac1; spi0 = &spi0; spi1 = &spi1; + mmc0 = &mmc1; + mmc1 = &mmc2; + mmc2 = &mmc3; }; cpus { @@ -301,6 +304,35 @@ }; }; + target-module@47810000 { + compatible = "ti,sysc-omap2", "ti,sysc"; + reg = <0x478102fc 0x4>, + <0x47810110 0x4>, + <0x47810114 0x4>; + reg-names = "rev", "sysc", "syss"; + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | + SYSC_OMAP2_ENAWAKEUP | + SYSC_OMAP2_SOFTRESET | + SYSC_OMAP2_AUTOIDLE)>; + ti,sysc-sidle = <SYSC_IDLE_FORCE>, + <SYSC_IDLE_NO>, + <SYSC_IDLE_SMART>; + ti,syss-mask = <1>; + clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>; + clock-names = "fck"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x47810000 0x1000>; + + mmc3: mmc@0 { + compatible = "ti,am335-sdhci"; + ti,needs-special-reset; + interrupts = <29>; + reg = <0x0 0x1000>; + status = "disabled"; + }; + }; + i2c0: i2c@44e0b000 { compatible = "ti,omap4-i2c"; #address-cells = <1>; @@ -357,15 +389,6 @@ status = "disabled"; }; - mmc3: mmc@47810000 { - compatible = "ti,omap4-hsmmc"; - ti,hwmods = "mmc3"; - ti,needs-special-reset; - interrupts = <29>; - reg = <0x47810000 0x1000>; - status = "disabled"; - }; - wdt2: wdt@44e35000 { compatible = "ti,omap3-wdt"; ti,hwmods = "wd_timer2"; diff --git a/arch/arm/dts/am3517-evm-u-boot.dtsi b/arch/arm/dts/am3517-evm-u-boot.dtsi index d5a4ce9..1a70630 100644 --- a/arch/arm/dts/am3517-evm-u-boot.dtsi +++ b/arch/arm/dts/am3517-evm-u-boot.dtsi @@ -37,7 +37,18 @@ /delete-property/ u-boot,dm-spl; }; -/delete-node/ &uart1; -/delete-node/ &uart2; -/delete-node/ &mmc2; -/delete-node/ &mmc3; +&mmc2 { + /delete-property/ u-boot,dm-spl; +}; + +&mmc3 { + /delete-property/ u-boot,dm-spl; +}; + +&uart1 { + /delete-property/ u-boot,dm-spl; +}; + +&uart2 { + /delete-property/ u-boot,dm-spl; +}; diff --git a/arch/arm/dts/am3517-evm-ui.dtsi b/arch/arm/dts/am3517-evm-ui.dtsi index 54aa252..7d8f32b 100644 --- a/arch/arm/dts/am3517-evm-ui.dtsi +++ b/arch/arm/dts/am3517-evm-ui.dtsi @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2018 Logic PD, Inc - http://www.logicpd.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2018 Logic PD, Inc - https://www.logicpd.com/ */ #include <dt-bindings/input/input.h> diff --git a/arch/arm/dts/am3517-evm.dts b/arch/arm/dts/am3517-evm.dts index 935c471..a01f9cf 100644 --- a/arch/arm/dts/am3517-evm.dts +++ b/arch/arm/dts/am3517-evm.dts @@ -1,9 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ */ /dts-v1/; @@ -127,10 +124,11 @@ }; lcd0: display@0 { - compatible = "panel-dpi"; + /* This isn't the exact LCD, but the timings meet spec */ + /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */ + compatible = "newhaven,nhd-4.3-480272ef-atxl"; label = "15"; - status = "okay"; - pinctrl-names = "default"; + backlight = <&bl>; enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */ vcc-supply = <&vdd_io_reg>; @@ -139,22 +137,6 @@ remote-endpoint = <&dpi_out>; }; }; - - panel-timing { - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hfront-porch = <3>; - hback-porch = <2>; - hsync-len = <42>; - vback-porch = <3>; - vfront-porch = <4>; - vsync-len = <11>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; }; bl: backlight { @@ -174,10 +156,13 @@ pinctrl-0 = <&pwm_pins>; ti,timers = <&timer11>; #pwm-cells = <3>; + ti,clock-source = <0x01>; }; /* HS USB Host PHY on PORT 1 */ hsusb1_phy: hsusb1_phy { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb1_rst_pins>; compatible = "usb-nop-xceiv"; reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */ #phy-cells = <0>; @@ -185,7 +170,9 @@ }; &davinci_emac { - status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <ðernet_pins>; + status = "okay"; }; &davinci_mdio { @@ -240,6 +227,8 @@ }; &usbhshost { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb1_pins>; port1-mode = "ehci-phy"; }; @@ -248,8 +237,21 @@ }; &omap3_pmx_core { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb1_rst_pins>; + + ethernet_pins: pinmux_ethernet_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */ + OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */ + OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */ + OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */ + OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */ + OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */ + OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */ + OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */ + OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */ + OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */ + >; + }; leds_pins: pinmux_leds_pins { pinctrl-single,pins = < @@ -317,8 +319,6 @@ }; &omap3_pmx_core2 { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb1_pins>; hsusb1_pins: pinmux_hsusb1_pins { pinctrl-single,pins = < diff --git a/arch/arm/dts/am3517-som.dtsi b/arch/arm/dts/am3517-som.dtsi index b1c988e..8b669e2 100644 --- a/arch/arm/dts/am3517-som.dtsi +++ b/arch/arm/dts/am3517-som.dtsi @@ -1,11 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2016 Derald D. Woods <woods.technical@gmail.com> * * Based on am3517-evm.dts - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. */ / { diff --git a/arch/arm/dts/arm_fvp.dts b/arch/arm/dts/arm_fvp.dts new file mode 100644 index 0000000..3a4ad5d --- /dev/null +++ b/arch/arm/dts/arm_fvp.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Empty device tree for the Arm Ltd FVP platform model + + * Copyright 2022 Arm Ltd. + */ + +/dts-v1/; + +/ { +}; diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi index 98359bf..ee66ef6 100644 --- a/arch/arm/dts/ast2500.dtsi +++ b/arch/arm/dts/ast2500.dtsi @@ -214,6 +214,7 @@ reg = <0x1e780000 0x1000>; interrupts = <20>; gpio-ranges = <&pinctrl 0 0 220>; + ngpios = <228>; interrupt-controller; }; diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index c17988e..0d65054 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -37,6 +37,26 @@ }; }; +&pwm { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default + &pinctrl_pwm1_default + &pinctrl_pwm2_default + &pinctrl_pwm3_default + &pinctrl_pwm4_default + &pinctrl_pwm5_default + &pinctrl_pwm6_default + &pinctrl_pwm7_default + &pinctrl_pwm8g1_default + &pinctrl_pwm9g1_default + &pinctrl_pwm10g1_default + &pinctrl_pwm11g1_default + &pinctrl_pwm12g1_default + &pinctrl_pwm13g1_default + &pinctrl_pwm14g1_default>; +}; + &uart5 { u-boot,dm-pre-reloc; status = "okay"; diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index 98840ce..6407430 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -113,6 +113,21 @@ reg = < 0x1e600000 0x100>; }; + pwm_tach: pwm_tach@1e610000 { + compatible = "aspeed,ast2600-pwm-tach", "simple-mfd", "syscon"; + reg = <0x1e610000 0x100>; + clocks = <&scu ASPEED_CLK_AHB>; + resets = <&rst ASPEED_RESET_PWM>; + + pwm: pwm { + compatible = "aspeed,ast2600-pwm"; + #pwm-cells = <3>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; + fmc: flash-controller@1e620000 { reg = < 0x1e620000 0xc4 0x20000000 0x10000000 >; @@ -1626,6 +1641,86 @@ groups = "PWM7"; }; + pinctrl_pwm8g0_default: pwm8g0_default { + function = "PWM8G0"; + groups = "PWM8G0"; + }; + + pinctrl_pwm8g1_default: pwm8g1_default { + function = "PWM8G1"; + groups = "PWM8G1"; + }; + + pinctrl_pwm9g0_default: pwm9g0_default { + function = "PWM9G0"; + groups = "PWM9G0"; + }; + + pinctrl_pwm9g1_default: pwm9g1_default { + function = "PWM9G1"; + groups = "PWM9G1"; + }; + + pinctrl_pwm10g0_default: pwm10g0_default { + function = "PWM10G0"; + groups = "PWM10G0"; + }; + + pinctrl_pwm10g1_default: pwm10g1_default { + function = "PWM10G1"; + groups = "PWM10G1"; + }; + + pinctrl_pwm11g0_default: pwm11g0_default { + function = "PWM11G0"; + groups = "PWM11G0"; + }; + + pinctrl_pwm11g1_default: pwm11g1_default { + function = "PWM11G1"; + groups = "PWM11G1"; + }; + + pinctrl_pwm12g0_default: pwm12g0_default { + function = "PWM12G0"; + groups = "PWM12G0"; + }; + + pinctrl_pwm12g1_default: pwm12g1_default { + function = "PWM12G1"; + groups = "PWM12G1"; + }; + + pinctrl_pwm13g0_default: pwm13g0_default { + function = "PWM13G0"; + groups = "PWM13G0"; + }; + + pinctrl_pwm13g1_default: pwm13g1_default { + function = "PWM13G1"; + groups = "PWM13G1"; + }; + + pinctrl_pwm14g0_default: pwm14g0_default { + function = "PWM14G0"; + groups = "PWM14G0"; + }; + + pinctrl_pwm14g1_default: pwm14g1_default { + function = "PWM14G1"; + groups = "PWM14G1"; + }; + + pinctrl_pwm15g0_default: pwm15g0_default { + function = "PWM15G0"; + groups = "PWM15G0"; + }; + + pinctrl_pwm15g1_default: pwm15g1_default { + function = "PWM15G1"; + groups = "PWM15G1"; + }; + pinctrl_rgmii1_default: rgmii1_default { function = "RGMII1"; groups = "RGMII1"; diff --git a/arch/arm/dts/sama7g5ek-u-boot.dtsi b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi index 5e1a0d5..6013867 100644 --- a/arch/arm/dts/sama7g5ek-u-boot.dtsi +++ b/arch/arm/dts/at91-sama7g5ek-u-boot.dtsi @@ -1,11 +1,12 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * sama7g5ek-u-boot.dts - Device Tree file for SAMA7G5 SoC u-boot properties. + * at91-sama7g5ek-u-boot.dtsi - Device Tree file for SAMA7G5 SoC u-boot + * properties. * - * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries * - * Author: Eugen Hristev <eugen.hristev@microchip.com> - * Author: Claudiu Beznea <claudiu.beznea@microchip.com> + * Author: Eugen Hristev <eugen.hristev@microchip.com> + * Author: Claudiu Beznea <claudiu.beznea@microchip.com> * */ @@ -14,12 +15,8 @@ u-boot,dm-pre-reloc; }; - ahb { + soc { u-boot,dm-pre-reloc; - - apb { - u-boot,dm-pre-reloc; - }; }; }; @@ -31,18 +28,18 @@ u-boot,dm-pre-reloc; }; -&pioA { +&pinctrl { u-boot,dm-pre-reloc; - - pinctrl { - u-boot,dm-pre-reloc; - }; }; &pinctrl_flx3_default { u-boot,dm-pre-reloc; }; +&pioA { + u-boot,dm-pre-reloc; +}; + &pit64b0 { u-boot,dm-pre-reloc; }; @@ -59,7 +56,7 @@ u-boot,dm-pre-reloc; }; -&uart0 { +&uart3 { u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts new file mode 100644 index 0000000..5313c6d --- /dev/null +++ b/arch/arm/dts/at91-sama7g5ek.dts @@ -0,0 +1,804 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board + * + * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries + * + * Author: Eugen Hristev <eugen.hristev@microchip.com> + * Author: Claudiu Beznea <claudiu.beznea@microchip.com> + * + */ +/dts-v1/; +#include "sama7g5-pinfunc.h" +#include "sama7g5.dtsi" +#include <dt-bindings/mfd/atmel-flexcom.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/at91.h> + +/ { + model = "Microchip SAMA7G5-EK"; + compatible = "microchip,sama7g5ek", "microchip,sama7g5", "microchip,sama7"; + + chosen { + bootargs = "rw root=/dev/mmcblk1p2 rootfstype=ext4 rootwait"; + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &uart3; + serial1 = &uart4; + serial2 = &uart7; + serial3 = &uart0; + i2c0 = &i2c1; + i2c1 = &i2c8; + i2c2 = &i2c9; + }; + + clocks { + slow_xtal { + clock-frequency = <32768>; + }; + + main_xtal { + clock-frequency = <24000000>; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_key_gpio_default>; + + bp1 { + label = "PB_USER"; + gpios = <&pioA PIN_PA12 GPIO_ACTIVE_LOW>; + linux,code = <KEY_PROG1>; + wakeup-source; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led_gpio_default>; + status = "okay"; /* Conflict with pwm. */ + + red_led { + label = "red"; + gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>; + }; + + green_led { + label = "green"; + gpios = <&pioA PIN_PA13 GPIO_ACTIVE_HIGH>; + }; + + blue_led { + label = "blue"; + gpios = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + /* 512 M */ + memory@60000000 { + device_type = "memory"; + reg = <0x60000000 0x20000000>; + }; + + sound: sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "sama7g5ek audio"; + #address-cells = <1>; + #size-cells = <0>; + simple-audio-card,dai-link@0 { + reg = <0>; + cpu { + sound-dai = <&spdiftx>; + }; + codec { + sound-dai = <&spdif_out>; + }; + }; + simple-audio-card,dai-link@1 { + reg = <1>; + cpu { + sound-dai = <&spdifrx>; + }; + codec { + sound-dai = <&spdif_in>; + }; + }; + }; + + spdif_in: spdif-in { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dir"; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; +}; + +&adc { + vddana-supply = <&vddout25>; + vref-supply = <&vddout25>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus1_an_default &pinctrl_mikrobus2_an_default>; + status = "okay"; +}; + +&can0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can0_default>; + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can1_default>; + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vddcpu>; +}; + +&qspi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_qspi>; + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <133000000>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + m25p,fast-read; + + at91bootstrap@0 { + label = "ospi: at91bootstrap"; + reg = <0x0 0x40000>; + }; + + bootloader@40000 { + label = "ospi: bootloader"; + reg = <0x40000 0xc0000>; + }; + + bootloaderenvred@100000 { + label = "ospi: bootloader env redundant"; + reg = <0x100000 0x40000>; + }; + + bootloaderenv@140000 { + label = "ospi: bootloader env"; + reg = <0x140000 0x40000>; + }; + + dtb@180000 { + label = "ospi: device tree"; + reg = <0x180000 0x80000>; + }; + + kernel@200000 { + label = "ospi: kernel"; + reg = <0x200000 0x600000>; + }; + + rootfs@800000 { + label = "ospi: rootfs"; + reg = <0x800000 0x7800000>; + }; + + }; +}; + +&dma0 { + status = "okay"; +}; + +&dma1 { + status = "okay"; +}; + +&dma2 { + status = "okay"; +}; + +&flx0 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; + status = "disabled"; + + uart0: serial@200 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx0_default>; + status = "disabled"; + }; +}; + +&flx1 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; + status = "okay"; + + i2c1: i2c@600 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + status = "okay"; + + mcp16502@5b { + compatible = "microchip,mcp16502"; + reg = <0x5b>; + status = "okay"; + + regulators { + vdd_3v3: VDD_IO { + regulator-name = "VDD_IO"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3700000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-mode = <4>; + }; + }; + + vddioddr: VDD_DDR { + regulator-name = "VDD_DDR"; + regulator-min-microvolt = <1300000>; + regulator-max-microvolt = <1450000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1350000>; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1350000>; + regulator-mode = <4>; + }; + }; + + vddcore: VDD_CORE { + regulator-name = "VDD_CORE"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1850000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-suspend-voltage = <1150000>; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-mode = <4>; + }; + }; + + vddcpu: VDD_OTHER { + regulator-name = "VDD_OTHER"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1850000>; + regulator-initial-mode = <2>; + regulator-allowed-modes = <2>, <4>; + regulator-ramp-delay = <3125>; + regulator-always-on; + + regulator-state-standby { + regulator-on-in-suspend; + regulator-suspend-voltage = <1050000>; + regulator-mode = <4>; + }; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-mode = <4>; + }; + }; + + vldo1: LDO1 { + regulator-name = "LDO1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + + regulator-state-standby { + regulator-suspend-voltage = <1800000>; + regulator-on-in-suspend; + }; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vldo2: LDO2 { + regulator-name = "LDO2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3700000>; + + regulator-state-standby { + regulator-suspend-voltage = <1800000>; + regulator-on-in-suspend; + }; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + }; +}; + +&flx3 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; + status = "okay"; + + uart3: serial@200 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx3_default>; + status = "okay"; + }; +}; + +&flx4 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; + status = "okay"; + + uart4: serial@200 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx4_default>; + status = "okay"; + }; +}; + +&flx7 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; + status = "okay"; + + uart7: serial@200 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flx7_default>; + status = "okay"; + }; +}; + +&flx8 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; + status = "okay"; + + i2c8: i2c@600 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c8_default>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + status = "okay"; + + eeprom@52 { + compatible = "microchip,24aa02e48"; + reg = <0x52>; + pagesize = <16>; + }; + + eeprom@53 { + compatible = "microchip,24aa02e48"; + reg = <0x53>; + pagesize = <16>; + }; + }; +}; + +&flx9 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; + status = "okay"; + + i2c9: i2c@600 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c9_default>; + i2c-analog-filter; + i2c-digital-filter; + i2c-digital-filter-width-ns = <35>; + status = "okay"; + }; +}; + +&flx11 { + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>; + status = "okay"; + + spi11: spi@400 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>; + status = "okay"; + }; +}; + +&gmac0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac0_default + &pinctrl_gmac0_mdio_default + &pinctrl_gmac0_txck_default + &pinctrl_gmac0_phy_irq>; + phy-mode = "rgmii-id"; + status = "okay"; + + ethernet-phy@7 { + reg = <0x7>; + interrupt-parent = <&pioA>; + interrupts = <PIN_PA31 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&gmac1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gmac1_default + &pinctrl_gmac1_mdio_default + &pinctrl_gmac1_phy_irq>; + phy-mode = "rmii"; + status = "okay"; + + ethernet-phy@0 { + reg = <0x0>; + interrupt-parent = <&pioA>; + interrupts = <PIN_PA21 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&i2s0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s0_default>; +}; + +&pioA { + + pinctrl_can0_default: can0_default { + pinmux = <PIN_PD12__CANTX0>, + <PIN_PD13__CANRX0 >; + bias-disable; + }; + + pinctrl_can1_default: can1_default { + pinmux = <PIN_PD14__CANTX1>, + <PIN_PD15__CANRX1 >; + bias-disable; + }; + + pinctrl_flx0_default: flx0_default { + pinmux = <PIN_PE3__FLEXCOM0_IO0>, + <PIN_PE4__FLEXCOM0_IO1>, + <PIN_PE6__FLEXCOM0_IO3>, + <PIN_PE7__FLEXCOM0_IO4>; + bias-disable; + }; + + pinctrl_flx3_default: flx3_default { + pinmux = <PIN_PD16__FLEXCOM3_IO0>, + <PIN_PD17__FLEXCOM3_IO1>; + bias-pull-up; + }; + + pinctrl_flx4_default: flx4_default { + pinmux = <PIN_PD18__FLEXCOM4_IO0>, + <PIN_PD19__FLEXCOM4_IO1>; + bias-disable; + }; + + pinctrl_flx7_default: flx7_default { + pinmux = <PIN_PC23__FLEXCOM7_IO0>, + <PIN_PC24__FLEXCOM7_IO1>; + bias-disable; + }; + + pinctrl_gmac0_default: gmac0_default { + pinmux = <PIN_PA16__G0_TX0>, + <PIN_PA17__G0_TX1>, + <PIN_PA26__G0_TX2>, + <PIN_PA27__G0_TX3>, + <PIN_PA19__G0_RX0>, + <PIN_PA20__G0_RX1>, + <PIN_PA28__G0_RX2>, + <PIN_PA29__G0_RX3>, + <PIN_PA15__G0_TXEN>, + <PIN_PA30__G0_RXCK>, + <PIN_PA18__G0_RXDV>, + <PIN_PA25__G0_125CK>; + slew-rate = <0>; + bias-disable; + }; + + pinctrl_gmac0_mdio_default: gmac0_mdio_default { + pinmux = <PIN_PA22__G0_MDC>, + <PIN_PA23__G0_MDIO>; + bias-disable; + }; + + pinctrl_gmac0_txck_default: gmac0_txck_default { + pinmux = <PIN_PA24__G0_TXCK>; + slew-rate = <0>; + bias-pull-up; + }; + + pinctrl_gmac0_phy_irq: gmac0_phy_irq { + pinmux = <PIN_PA31__GPIO>; + bias-disable; + }; + + pinctrl_gmac1_default: gmac1_default { + pinmux = <PIN_PD30__G1_TXCK>, + <PIN_PD22__G1_TX0>, + <PIN_PD23__G1_TX1>, + <PIN_PD21__G1_TXEN>, + <PIN_PD25__G1_RX0>, + <PIN_PD26__G1_RX1>, + <PIN_PD27__G1_RXER>, + <PIN_PD24__G1_RXDV>; + slew-rate = <0>; + bias-disable; + }; + + pinctrl_gmac1_mdio_default: gmac1_mdio_default { + pinmux = <PIN_PD28__G1_MDC>, + <PIN_PD29__G1_MDIO>; + bias-disable; + }; + + pinctrl_gmac1_phy_irq: gmac1_phy_irq { + pinmux = <PIN_PA21__GPIO>; + bias-disable; + }; + + pinctrl_i2c1_default: i2c1_default { + pinmux = <PIN_PC9__FLEXCOM1_IO0>, + <PIN_PC10__FLEXCOM1_IO1>; + bias-disable; + }; + + pinctrl_i2c8_default: i2c8_default { + pinmux = <PIN_PC14__FLEXCOM8_IO0>, + <PIN_PC13__FLEXCOM8_IO1>; + bias-disable; + }; + + pinctrl_i2c9_default: i2c9_default { + pinmux = <PIN_PC18__FLEXCOM9_IO0>, + <PIN_PC19__FLEXCOM9_IO1>; + bias-disable; + }; + + pinctrl_i2s0_default: i2s0_default { + pinmux = <PIN_PB23__I2SMCC0_CK>, + <PIN_PB24__I2SMCC0_WS>, + <PIN_PB25__I2SMCC0_DOUT1>, + <PIN_PB26__I2SMCC0_DOUT0>, + <PIN_PB27__I2SMCC0_MCK>; + bias-disable; + }; + + pinctrl_key_gpio_default: key_gpio_default { + pinmux = <PIN_PA12__GPIO>; + bias-pull-up; + }; + + pinctrl_led_gpio_default: led_gpio_default { + pinmux = <PIN_PA13__GPIO>, + <PIN_PB8__GPIO>, + <PIN_PD20__GPIO>; + bias-pull-up; + }; + + pinctrl_mikrobus1_an_default: mikrobus1_an_default { + pinmux = <PIN_PD0__GPIO>; + bias-disable; + }; + + pinctrl_mikrobus2_an_default: mikrobus2_an_default { + pinmux = <PIN_PD1__GPIO>; + bias-disable; + }; + + pinctrl_mikrobus1_pwm2_default: mikrobus1_pwm2_default { + pinmux = <PIN_PA13__PWMH2>; + bias-disable; + }; + + pinctrl_mikrobus2_pwm3_default: mikrobus2_pwm3_default { + pinmux = <PIN_PD20__PWMH3>; + bias-disable; + }; + + pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs { + pinmux = <PIN_PB6__FLEXCOM11_IO3>; + bias-disable; + }; + + pinctrl_mikrobus1_spi: mikrobus1_spi { + pinmux = <PIN_PB3__FLEXCOM11_IO0>, + <PIN_PB4__FLEXCOM11_IO1>, + <PIN_PB5__FLEXCOM11_IO2>; + bias-disable; + }; + + pinctrl_qspi: qspi { + pinmux = <PIN_PB12__QSPI0_IO0>, + <PIN_PB11__QSPI0_IO1>, + <PIN_PB10__QSPI0_IO2>, + <PIN_PB9__QSPI0_IO3>, + <PIN_PB16__QSPI0_IO4>, + <PIN_PB17__QSPI0_IO5>, + <PIN_PB18__QSPI0_IO6>, + <PIN_PB19__QSPI0_IO7>, + <PIN_PB13__QSPI0_CS>, + <PIN_PB14__QSPI0_SCK>, + <PIN_PB15__QSPI0_SCKN>, + <PIN_PB20__QSPI0_DQS>, + <PIN_PB21__QSPI0_INT>; + bias-disable; + slew-rate = <0>; + atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>; + }; + + pinctrl_sdmmc0_default: sdmmc0_default { + pinmux = <PIN_PA1__SDMMC0_CMD>, + <PIN_PA3__SDMMC0_DAT0>, + <PIN_PA4__SDMMC0_DAT1>, + <PIN_PA5__SDMMC0_DAT2>, + <PIN_PA6__SDMMC0_DAT3>, + <PIN_PA7__SDMMC0_DAT4>, + <PIN_PA8__SDMMC0_DAT5>, + <PIN_PA9__SDMMC0_DAT6>, + <PIN_PA10__SDMMC0_DAT7>, + <PIN_PA0__SDMMC0_CK>, + <PIN_PA2__SDMMC0_RSTN>, + <PIN_PA14__SDMMC0_CD>, + <PIN_PA11__SDMMC0_DS>; + slew-rate = <0>; + bias-pull-up; + }; + + pinctrl_sdmmc1_default: sdmmc1_default { + pinmux = <PIN_PB29__SDMMC1_CMD>, + <PIN_PB31__SDMMC1_DAT0>, + <PIN_PC0__SDMMC1_DAT1>, + <PIN_PC1__SDMMC1_DAT2>, + <PIN_PC2__SDMMC1_DAT3>, + <PIN_PB30__SDMMC1_CK>, + <PIN_PB28__SDMMC1_RSTN>, + <PIN_PC5__SDMMC1_1V8SEL>, + <PIN_PC4__SDMMC1_CD>; + slew-rate = <0>; + bias-pull-up; + }; + + pinctrl_sdmmc2_default: sdmmc2_default { + pinmux = <PIN_PD3__SDMMC2_CMD>, + <PIN_PD5__SDMMC2_DAT0>, + <PIN_PD6__SDMMC2_DAT1>, + <PIN_PD7__SDMMC2_DAT2>, + <PIN_PD8__SDMMC2_DAT3>, + <PIN_PD4__SDMMC2_CK>; + slew-rate = <0>; + bias-pull-up; + }; + + pinctrl_spdifrx_default: spdifrx_default { + pinmux = <PIN_PB0__SPDIF_RX>; + bias-disable; + }; + + pinctrl_spdiftx_default: spdiftx_default { + pinmux = <PIN_PB1__SPDIF_TX>; + bias-disable; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mikrobus1_pwm2_default &pinctrl_mikrobus2_pwm3_default>; + status = "disabled"; /* Conflict with leds. */ +}; + +&rtt { + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; +}; + +&sdmmc0 { + bus-width = <8>; + non-removable; + no-1-8-v; + sdhci-caps-mask = <0x0 0x00200000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc0_default>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + no-1-8-v; + sdhci-caps-mask = <0x0 0x00200000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc1_default>; + status = "okay"; +}; + +&sdmmc2 { + bus-width = <4>; + no-1-8-v; + sdhci-caps-mask = <0x0 0x00200000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc2_default>; +}; + +&shdwc { + atmel,shdwc-debouncer = <976>; + status = "okay"; + + input@0 { + reg = <0>; + }; +}; + +&spdifrx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdifrx_default>; + status = "okay"; +}; + +&spdiftx { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spdiftx_default>; + status = "okay"; +}; + +&tcb0 { + timer0: timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>; + }; + + timer1: timer@1 { + compatible = "atmel,tcb-timer"; + reg = <1>; + }; +}; + +&trng { + status = "okay"; +}; + +&vddout25 { + vin-supply = <&vdd_3v3>; + status = "okay"; +}; diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi new file mode 100644 index 0000000..e88ab09 --- /dev/null +++ b/arch/arm/dts/bcm6753.dtsi @@ -0,0 +1,208 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com> + */ + +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm6753"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu0: cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x1>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu2: cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x2>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + l2: l2-cache0 { + compatible = "cache"; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + u-boot,dm-pre-reloc; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + u-boot,dm-pre-reloc; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_osc>; + clock-mult = <2>; + clock-div = <1>; + }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + uart0: serial@ff812000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xff812000 0x1000>; + clock = <50000000>; + + status = "disabled"; + }; + + wdt1: watchdog@ff800480 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff800480 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt2: watchdog@ff8004c0 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff8004c0 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdt1>; + }; + + gpio0: gpio-controller@0xff800500 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800500 0x4>, + <0xff800520 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio1: gpio-controller@0xff800504 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800504 0x4>, + <0xff800524 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio2: gpio-controller@0xff800508 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800508 0x4>, + <0xff800528 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio3: gpio-controller@0xff80050c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80050c 0x4>, + <0xff80052c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio4: gpio-controller@0xff800510 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800510 0x4>, + <0xff800530 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio5: gpio-controller@0xff800514 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800514 0x4>, + <0xff800534 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio6: gpio-controller@0xff800518 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800518 0x4>, + <0xff800538 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio7: gpio-controller@0xff80051c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80051c 0x4>, + <0xff80053c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + nand: nand-controller@ff801800 { + compatible = "brcm,nand-bcm6753", + "brcm,brcmnand-v5.0", + "brcm,brcmnand"; + reg-names = "nand", "nand-int-base", "nand-cache"; + reg = <0xff801800 0x180>, + <0xff802000 0x10>, + <0xff801c00 0x200>; + parameter-page-big-endian = <0>; + + status = "disabled"; + }; + + leds: led-controller@ff803000 { + compatible = "brcm,bcm6753-leds"; + reg = <0xff803000 0x3480>; + + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/dts/bcm96753ref.dts b/arch/arm/dts/bcm96753ref.dts new file mode 100644 index 0000000..ca15ca5f --- /dev/null +++ b/arch/arm/dts/bcm96753ref.dts @@ -0,0 +1,98 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com> + */ + +/dts-v1/; + +#include "bcm6753.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Broadcom bcm6753ref"; + compatible = "broadcom,bcm6753ref", "brcm,bcm6753"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; + }; +}; + +&uart0 { + u-boot,dm-pre-reloc; + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&gpio4 { + status = "okay"; +}; + +&gpio5 { + status = "okay"; +}; + +&gpio6 { + status = "okay"; +}; + +&gpio7 { + status = "okay"; +}; + +&nand { + status = "okay"; + write-protect = <0>; + #address-cells = <1>; + #size-cells = <0>; + + nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sector-size = <16>; + }; +}; + +&leds { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + brcm,serial-led-en-pol; + brcm,serial-led-data-ppol; + + led@0 { + reg = <0>; + label = "led_red"; + }; + + led@1 { + reg = <1>; + label = "led_green"; + }; +}; diff --git a/arch/arm/dts/bitmain-antminer-s9.dts b/arch/arm/dts/bitmain-antminer-s9.dts index 0694350..408862b 100644 --- a/arch/arm/dts/bitmain-antminer-s9.dts +++ b/arch/arm/dts/bitmain-antminer-s9.dts @@ -50,7 +50,7 @@ ps-clk-frequency = <33333333>; }; -&nand0 { +&nfc0 { status = "okay"; }; diff --git a/arch/arm/dts/fvp-base-revc.dts b/arch/arm/dts/fvp-base-revc.dts new file mode 100644 index 0000000..269b649 --- /dev/null +++ b/arch/arm/dts/fvp-base-revc.dts @@ -0,0 +1,246 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * Architecture Envelope Model (AEM) ARMv8-A + * ARMAEMv8AMPCT + * + * FVP Base RevC + */ + +/dts-v1/; + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/memreserve/ 0x80000000 0x00010000; + +#include "rtsm_ve-motherboard.dtsi" +#include "rtsm_ve-motherboard-rs2.dtsi" + +/ { + model = "FVP Base RevC"; + compatible = "arm,fvp-base-revc", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + chosen { }; + + aliases { + serial0 = &v2m_serial0; + serial1 = &v2m_serial1; + serial2 = &v2m_serial2; + serial3 = &v2m_serial3; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x000>; + enable-method = "psci"; + }; + cpu1: cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "psci"; + }; + cpu2: cpu@200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x200>; + enable-method = "psci"; + }; + cpu3: cpu@300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x300>; + enable-method = "psci"; + }; + cpu4: cpu@10000 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10000>; + enable-method = "psci"; + }; + cpu5: cpu@10100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10100>; + enable-method = "psci"; + }; + cpu6: cpu@10200 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10200>; + enable-method = "psci"; + }; + cpu7: cpu@10300 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x10300>; + enable-method = "psci"; + }; + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>, + <0x00000008 0x80000000 0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* Chipselect 2,00000000 is physically at 0x18000000 */ + vram: vram@18000000 { + /* 8 MB of designated video RAM */ + compatible = "shared-dma-pool"; + reg = <0x00000000 0x18000000 0 0x00800000>; + no-map; + }; + }; + + gic: interrupt-controller@2f000000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + interrupt-controller; + reg = <0x0 0x2f000000 0 0x10000>, // GICD + <0x0 0x2f100000 0 0x200000>, // GICR + <0x0 0x2c000000 0 0x2000>, // GICC + <0x0 0x2c010000 0 0x2000>, // GICH + <0x0 0x2c02f000 0 0x2000>; // GICV + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + + its: msi-controller@2f020000 { + #msi-cells = <1>; + compatible = "arm,gic-v3-its"; + reg = <0x0 0x2f020000 0x0 0x20000>; // GITS + msi-controller; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; + + pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; + }; + + spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; + }; + + pci: pci@40000000 { + #address-cells = <0x3>; + #size-cells = <0x2>; + #interrupt-cells = <0x1>; + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + bus-range = <0x0 0x1>; + reg = <0x0 0x40000000 0x0 0x10000000>; + ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>; + interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 0 GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 0 GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + msi-map = <0x0 &its 0x0 0x10000>; + iommu-map = <0x0 &smmu 0x0 0x10000>; + + dma-coherent; + }; + + smmu: iommu@2b400000 { + compatible = "arm,smmu-v3"; + reg = <0x0 0x2b400000 0x0 0x100000>; + interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>, + <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "eventq", "gerror", "priq", "cmdq-sync"; + dma-coherent; + #iommu-cells = <1>; + msi-parent = <&its 0x10000>; + }; + + panel { + compatible = "arm,rtsm-display", "panel-dpi"; + port { + panel_in: endpoint { + remote-endpoint = <&clcd_pads>; + }; + }; + }; + + bus@8000000 { + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 63>; + interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <0 0 1 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <0 0 2 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <0 0 3 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <0 0 4 &gic 0 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <0 0 5 &gic 0 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <0 0 6 &gic 0 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <0 0 7 &gic 0 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <0 0 8 &gic 0 0 GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <0 0 9 &gic 0 0 GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <0 0 10 &gic 0 0 GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <0 0 11 &gic 0 0 GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <0 0 12 &gic 0 0 GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <0 0 13 &gic 0 0 GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <0 0 14 &gic 0 0 GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <0 0 15 &gic 0 0 GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <0 0 16 &gic 0 0 GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <0 0 17 &gic 0 0 GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <0 0 18 &gic 0 0 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <0 0 19 &gic 0 0 GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <0 0 20 &gic 0 0 GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <0 0 21 &gic 0 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <0 0 22 &gic 0 0 GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <0 0 23 &gic 0 0 GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <0 0 24 &gic 0 0 GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <0 0 25 &gic 0 0 GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <0 0 26 &gic 0 0 GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <0 0 27 &gic 0 0 GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <0 0 28 &gic 0 0 GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <0 0 29 &gic 0 0 GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <0 0 30 &gic 0 0 GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <0 0 31 &gic 0 0 GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <0 0 32 &gic 0 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <0 0 33 &gic 0 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <0 0 34 &gic 0 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <0 0 35 &gic 0 0 GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <0 0 36 &gic 0 0 GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <0 0 37 &gic 0 0 GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <0 0 38 &gic 0 0 GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <0 0 39 &gic 0 0 GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <0 0 40 &gic 0 0 GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <0 0 41 &gic 0 0 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <0 0 42 &gic 0 0 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, + <0 0 43 &gic 0 0 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, + <0 0 44 &gic 0 0 GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + }; +}; diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts index f7a841a..f690bc8 100644 --- a/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts +++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit.dts @@ -9,5 +9,19 @@ / { model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit"; - compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3"; + compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3"; +}; + +&omap3_pmx_core2 { + + hsusb2_2_pins: pinmux_hsusb2_2_pins { + pinctrl-single,pins = < + OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ + OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ + OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ + OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ + OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ + OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ + >; + }; }; diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts index a604d92..e28e962 100644 --- a/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts +++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit.dts @@ -11,3 +11,17 @@ model = "LogicPD Zoom DM3730 SOM-LV Development Kit"; compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3"; }; + +&omap3_pmx_core2 { + + hsusb2_2_pins: pinmux_hsusb2_2_pins { + pinctrl-single,pins = < + OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ + OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ + OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ + OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ + OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ + OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ + >; + }; +}; diff --git a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi index 100396f..7d0468a 100644 --- a/arch/arm/dts/logicpd-som-lv-baseboard.dtsi +++ b/arch/arm/dts/logicpd-som-lv-baseboard.dtsi @@ -51,6 +51,8 @@ &mcbsp2 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mcbsp2_pins>; }; &charger { @@ -77,7 +79,7 @@ }; &dss { - status = "ok"; + status = "okay"; vdds_dsi-supply = <&vpll2>; vdda_video-supply = <&video_reg>; pinctrl-names = "default"; @@ -102,35 +104,18 @@ regulator-max-microvolt = <3300000>; }; - lcd0: display@0 { - compatible = "panel-dpi"; - label = "28"; - status = "okay"; - /* default-on; */ + lcd0: display { + /* This isn't the exact LCD, but the timings meet spec */ + compatible = "logicpd,type28"; pinctrl-names = "default"; pinctrl-0 = <&lcd_enable_pin>; - enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */ + backlight = <&bl>; + enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; port { lcd_in: endpoint { remote-endpoint = <&dpi_out>; }; }; - - panel-timing { - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hfront-porch = <3>; - hback-porch = <2>; - hsync-len = <42>; - vback-porch = <3>; - vfront-porch = <2>; - vsync-len = <11>; - hsync-active = <1>; - vsync-active = <1>; - de-active = <1>; - pixelclk-active = <0>; - }; }; bl: backlight { diff --git a/arch/arm/dts/logicpd-som-lv.dtsi b/arch/arm/dts/logicpd-som-lv.dtsi index b56524c..385bc8d 100644 --- a/arch/arm/dts/logicpd-som-lv.dtsi +++ b/arch/arm/dts/logicpd-som-lv.dtsi @@ -27,6 +27,8 @@ /* HS USB Host PHY on PORT 1 */ hsusb2_phy: hsusb2_phy { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb2_reset_pin>; compatible = "usb-nop-xceiv"; reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */ #phy-cells = <0>; @@ -144,6 +146,8 @@ }; &usbhshost { + pinctrl-names = "default"; + pinctrl-0 = <&hsusb2_pins>, <&hsusb2_2_pins>; port2-mode = "ehci-phy"; }; @@ -153,8 +157,6 @@ &omap3_pmx_core { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb2_pins>; mmc3_pins: pinmux_mm3_pins { pinctrl-single,pins = < @@ -166,6 +168,7 @@ OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */ >; }; + mcbsp2_pins: pinmux_mcbsp2_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */ @@ -183,6 +186,7 @@ OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */ >; }; + mcspi1_pins: pinmux_mcspi1_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ @@ -250,13 +254,13 @@ }; &omap3_pmx_wkup { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb2_reset_pin>; + hsusb2_reset_pin: pinmux_hsusb1_reset_pin { pinctrl-single,pins = < OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */ >; }; + wl127x_gpio: pinmux_wl127x_gpio_pin { pinctrl-single,pins = < OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */ @@ -265,21 +269,6 @@ }; }; -&omap3_pmx_core2 { - pinctrl-names = "default"; - pinctrl-0 = <&hsusb2_2_pins>; - hsusb2_2_pins: pinmux_hsusb2_2_pins { - pinctrl-single,pins = < - OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */ - OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */ - OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */ - OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */ - OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */ - OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */ - >; - }; -}; - &uart2 { interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>; pinctrl-names = "default"; diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts b/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts index 7675bc3..cb08aa6 100644 --- a/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts +++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit.dts @@ -9,5 +9,13 @@ / { model = "LogicPD Zoom OMAP35xx Torpedo Development Kit"; - compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3"; + compatible = "logicpd,dm3730-torpedo-devkit", "ti,omap3430", "ti,omap3"; +}; + +&omap3_pmx_core { + isp1763_pins: pinmux_isp1763_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat6.gpio_128 */ + >; + }; }; diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts index 18c27e8..07ea822 100644 --- a/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts +++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit.dts @@ -50,6 +50,20 @@ }; }; +&uart2 { + /delete-property/dma-names; + bluetooth { + compatible = "ti,wl1283-st"; + enable-gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>; /* gpio 162 */ + max-speed = <3000000>; + }; +}; + +/* The DM3730 has a faster L3 than OMAP35, so increase pixel clock */ +&mt9p031_out { + pixel-clock-frequency = <90000000>; +}; + &omap3_pmx_core { mmc3_pins: pinmux_mm3_pins { pinctrl-single,pins = < @@ -71,3 +85,12 @@ >; }; }; + +/* The gpio muxing between omap3530 and dm3730 is different for GPIO_128 */ +&omap3_pmx_wkup { + isp1763_pins: pinmux_isp1763_pins { + pinctrl-single,pins = < + OMAP3_WKUP_IOPAD(0x2a58, PIN_INPUT_PULLUP | MUX_MODE4) /* reserved.gpio_128 */ + >; + }; +}; diff --git a/arch/arm/dts/logicpd-torpedo-baseboard.dtsi b/arch/arm/dts/logicpd-torpedo-baseboard.dtsi index 642e809..b4664ab 100644 --- a/arch/arm/dts/logicpd-torpedo-baseboard.dtsi +++ b/arch/arm/dts/logicpd-torpedo-baseboard.dtsi @@ -65,6 +65,7 @@ pinctrl-0 = <&pwm_pins>; ti,timers = <&timer10>; #pwm-cells = <3>; + ti,clock-source = <0x01>; }; }; @@ -80,6 +81,8 @@ }; &mcbsp2 { + pinctrl-names = "default"; + pinctrl-0 = <&mcbsp2_pins>; status = "okay"; }; @@ -90,7 +93,8 @@ &gpmc { ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */ - 1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */ + 1 0 0x2c000000 0x1000000 /* CS1: 16MB for LAN9221 */ + 6 0 0x28000000 0x1000000>; /* CS6: 16MB for ISP1763 */ ethernet@gpmc { pinctrl-names = "default"; @@ -99,16 +103,60 @@ interrupts = <1 IRQ_TYPE_LEVEL_LOW>; /* gpio129 */ reg = <1 0 0xff>; }; + + usb@6,0 { + pinctrl-names = "default"; + pinctrl-0 = <&isp1763_pins>; + compatible = "nxp,usb-isp1763"; + reg = <0x6 0x0 0xff>; + interrupt-parent = <&gpio5>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + interrupt-names = "host"; + bus-width = <16>; + dr_mode = "host"; + gpmc,mux-add-data = <0>; + gpmc,device-width = <2>; + gpmc,wait-pin = <0>; + gpmc,burst-length = <4>; + gpmc,cycle2cycle-samecsen = <1>; + gpmc,cycle2cycle-diffcsen = <1>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <45>; + gpmc,cs-wr-off-ns = <45>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <0>; + gpmc,adv-wr-off-ns = <0>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <45>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <25>; + gpmc,rd-cycle-ns = <60>; + gpmc,wr-cycle-ns = <45>; + gpmc,access-ns = <35>; + gpmc,page-burst-access-ns = <0>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <60>; + gpmc,wait-monitoring-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wr-data-mux-bus-ns = <5>; + gpmc,wr-access-ns = <20>; + }; }; +&hdqw1w { + pinctrl-names = "default"; + pinctrl-0 = <&hdq_pins>; +}; + + &vpll2 { regulator-always-on; }; &dss { - status = "ok"; + status = "okay"; vdds_dsi-supply = <&vpll2>; - vdda_video-supply = <&video_reg>; + vdda_video-supply = <&vpll2>; pinctrl-names = "default"; pinctrl-0 = <&dss_dpi_pins1>; port { @@ -124,44 +172,19 @@ display0 = &lcd0; }; - video_reg: video_reg { - pinctrl-names = "default"; - pinctrl-0 = <&panel_pwr_pins>; - compatible = "regulator-fixed"; - regulator-name = "fixed-supply"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd INI */ - }; - lcd0: display { - compatible = "panel-dpi"; + /* This isn't the exact LCD, but the timings meet spec */ + compatible = "newhaven,nhd-4.3-480272ef-atxl"; label = "15"; - status = "okay"; - /* default-on; */ pinctrl-names = "default"; - + pinctrl-0 = <&panel_pwr_pins>; + backlight = <&bl>; + enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; port { lcd_in: endpoint { remote-endpoint = <&dpi_out>; }; }; - - panel-timing { - clock-frequency = <9000000>; - hactive = <480>; - vactive = <272>; - hfront-porch = <3>; - hback-porch = <2>; - hsync-len = <42>; - vback-porch = <3>; - vfront-porch = <4>; - vsync-len = <11>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; }; bl: backlight { @@ -193,6 +216,12 @@ >; }; + hdq_pins: hdq_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE0) /* hdq_sio */ + >; + }; + pwm_pins: pinmux_pwm_pins { pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x20B8, PIN_OUTPUT | PIN_OFF_OUTPUT_LOW | MUX_MODE3) /* gpmc_ncs5.gpt_10_pwm_evt */ diff --git a/arch/arm/dts/logicpd-torpedo-som.dtsi b/arch/arm/dts/logicpd-torpedo-som.dtsi index 3fdd0a7..3a52285 100644 --- a/arch/arm/dts/logicpd-torpedo-som.dtsi +++ b/arch/arm/dts/logicpd-torpedo-som.dtsi @@ -35,6 +35,11 @@ }; }; +/* The Torpedo doesn't route the USB host pins */ +&usbhshost { + status = "disabled"; +}; + &gpmc { ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */ @@ -192,3 +197,7 @@ &twl_gpio { ti,use-leds; }; + +&twl_keypad { + status = "disabled"; +}; diff --git a/arch/arm/dts/phytium-pomelo.dts b/arch/arm/dts/phytium-pomelo.dts new file mode 100644 index 0000000..3f809c0 --- /dev/null +++ b/arch/arm/dts/phytium-pomelo.dts @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Phytium Pomelo board + * Copyright (C) 2021, Phytium Ltd. + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ +/dts-v1/; + +/ { + model = "Phytium Pomelo Board"; + compatible = "phytium,d2000-pomelo", "phytium,d2000"; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart0; + }; + + sysclk_48mhz: clk48mhz { + compatible = "fixed-clock"; + #clock-cells = <0x0>; + clock-frequency = <48000000>; + clock-output-names = "sysclk_48mhz"; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial@28001000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0 0x28001000 0x0 0x1000>; + clocks = <&sysclk_48mhz>; + }; + + pcie@40000000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + reg = <0x0 0x40000000 0x0 0x10000000>; + ranges = <0x01000000 0x00 0x00000000 0x0 0x50000000 0x0 0x00F00000>, + <0x02000000 0x00 0x58000000 0x0 0x58000000 0x0 0x28000000>, + <0x43000000 0x10 0x00000000 0x10 0x00000000 0x10 0x00000000>; + }; + }; +}; diff --git a/arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi b/arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi new file mode 100644 index 0000000..33182d9 --- /dev/null +++ b/arch/arm/dts/rtsm_ve-motherboard-rs2.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * "rs2" extension for the v2m motherboard + */ +/ { + bus@8000000 { + motherboard-bus@8000000 { + arm,v2m-memory-map = "rs2"; + + iofpga-bus@300000000 { + virtio-p9@140000 { + compatible = "virtio,mmio"; + reg = <0x140000 0x200>; + interrupts = <43>; + }; + + virtio-net@150000 { + compatible = "virtio,mmio"; + reg = <0x150000 0x200>; + interrupts = <44>; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/rtsm_ve-motherboard.dtsi b/arch/arm/dts/rtsm_ve-motherboard.dtsi new file mode 100644 index 0000000..5f6cab6 --- /dev/null +++ b/arch/arm/dts/rtsm_ve-motherboard.dtsi @@ -0,0 +1,258 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * ARM Ltd. Fast Models + * + * Versatile Express (VE) system model + * Motherboard component + * + * VEMotherBoard.lisa + */ +/ { + v2m_clk24mhz: clk24mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24000000>; + clock-output-names = "v2m:clk24mhz"; + }; + + v2m_refclk1mhz: refclk1mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000>; + clock-output-names = "v2m:refclk1mhz"; + }; + + v2m_refclk32khz: refclk32khz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "v2m:refclk32khz"; + }; + + v2m_fixed_3v3: v2m-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + mcc { + compatible = "arm,vexpress,config-bus"; + arm,vexpress,config-bridge = <&v2m_sysreg>; + + v2m_oscclk1: oscclk1 { + /* CLCD clock */ + compatible = "arm,vexpress-osc"; + arm,vexpress-sysreg,func = <1 1>; + freq-range = <23750000 63500000>; + #clock-cells = <0>; + clock-output-names = "v2m:oscclk1"; + }; + + reset { + compatible = "arm,vexpress-reset"; + arm,vexpress-sysreg,func = <5 0>; + }; + + muxfpga { + compatible = "arm,vexpress-muxfpga"; + arm,vexpress-sysreg,func = <7 0>; + }; + + shutdown { + compatible = "arm,vexpress-shutdown"; + arm,vexpress-sysreg,func = <8 0>; + }; + + reboot { + compatible = "arm,vexpress-reboot"; + arm,vexpress-sysreg,func = <9 0>; + }; + + dvimode { + compatible = "arm,vexpress-dvimode"; + arm,vexpress-sysreg,func = <11 0>; + }; + }; + + bus@8000000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0x8000000 0 0x8000000 0x18000000>; + + motherboard-bus@8000000 { + compatible = "arm,vexpress,v2m-p1", "simple-bus"; + #address-cells = <2>; /* SMB chipselect number and offset */ + #size-cells = <1>; + ranges = <0 0 0 0x08000000 0x04000000>, + <1 0 0 0x14000000 0x04000000>, + <2 0 0 0x18000000 0x04000000>, + <3 0 0 0x1c000000 0x04000000>, + <4 0 0 0x0c000000 0x04000000>, + <5 0 0 0x10000000 0x04000000>; + + flash@0 { + compatible = "arm,vexpress-flash", "cfi-flash"; + reg = <0 0x00000000 0x04000000>, + <4 0x00000000 0x04000000>; + bank-width = <4>; + }; + + ethernet@202000000 { + compatible = "smsc,lan91c111"; + reg = <2 0x02000000 0x10000>; + interrupts = <15>; + }; + + iofpga-bus@300000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 3 0 0x200000>; + + v2m_sysreg: sysreg@10000 { + compatible = "arm,vexpress-sysreg"; + reg = <0x010000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + }; + + v2m_sysctl: sysctl@20000 { + compatible = "arm,sp810", "arm,primecell"; + reg = <0x020000 0x1000>; + clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; + clock-names = "refclk", "timclk", "apb_pclk"; + #clock-cells = <1>; + clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; + assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>; + assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; + }; + + aaci@40000 { + compatible = "arm,pl041", "arm,primecell"; + reg = <0x040000 0x1000>; + interrupts = <11>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + mmc@50000 { + compatible = "arm,pl180", "arm,primecell"; + reg = <0x050000 0x1000>; + interrupts = <9>, <10>; + cd-gpios = <&v2m_sysreg 0 0>; + wp-gpios = <&v2m_sysreg 1 0>; + max-frequency = <12000000>; + vmmc-supply = <&v2m_fixed_3v3>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "mclk", "apb_pclk"; + }; + + kmi@60000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x060000 0x1000>; + interrupts = <12>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + kmi@70000 { + compatible = "arm,pl050", "arm,primecell"; + reg = <0x070000 0x1000>; + interrupts = <13>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "KMIREFCLK", "apb_pclk"; + }; + + v2m_serial0: serial@90000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x090000 0x1000>; + interrupts = <5>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial1: serial@a0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0a0000 0x1000>; + interrupts = <6>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial2: serial@b0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0b0000 0x1000>; + interrupts = <7>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + v2m_serial3: serial@c0000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x0c0000 0x1000>; + interrupts = <8>; + clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; + clock-names = "uartclk", "apb_pclk"; + }; + + watchdog@f0000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x0f0000 0x1000>; + interrupts = <0>; + clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; + clock-names = "wdog_clk", "apb_pclk"; + }; + + v2m_timer01: timer@110000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x110000 0x1000>; + interrupts = <2>; + clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + v2m_timer23: timer@120000 { + compatible = "arm,sp804", "arm,primecell"; + reg = <0x120000 0x1000>; + interrupts = <3>; + clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; + clock-names = "timclken1", "timclken2", "apb_pclk"; + }; + + virtio-block@130000 { + compatible = "virtio,mmio"; + reg = <0x130000 0x200>; + interrupts = <42>; + }; + + rtc@170000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x170000 0x1000>; + interrupts = <4>; + clocks = <&v2m_clk24mhz>; + clock-names = "apb_pclk"; + }; + + clcd@1f0000 { + compatible = "arm,pl111", "arm,primecell"; + reg = <0x1f0000 0x1000>; + interrupt-names = "combined"; + interrupts = <14>; + clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; + clock-names = "clcdclk", "apb_pclk"; + memory-region = <&vram>; + + port { + clcd_pads: endpoint { + remote-endpoint = <&panel_in>; + arm,pl11x,tft-r0g0b0-pads = <0 8 16>; + }; + }; + }; + }; + }; + }; +}; diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi index 038cd73..d92bdd5 100644 --- a/arch/arm/dts/sama5d2.dtsi +++ b/arch/arm/dts/sama5d2.dtsi @@ -1,8 +1,10 @@ #include "skeleton.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> / { model = "Atmel SAMA5D2 family SoC"; compatible = "atmel,sama5d2"; + interrupt-parent = <&aic>; aliases { spi0 = &spi0; @@ -361,6 +363,7 @@ #clock-cells = <0>; reg = <35>; atmel,clk-output-range = <0 83000000>; + u-boot,dm-pre-reloc; }; tcb1_clk: tcb1_clk@36 { @@ -638,6 +641,23 @@ status = "disabled"; }; + tcb0: timer@f800c000 { + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; + reg = <0xf800c000 0x100>; + interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>; + clock-names = "t0_clk", "gclk", "slow_clk"; + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + timer0: timer@0 { + compatible = "atmel,tcb-timer"; + reg = <0>, <1>; + u-boot,dm-pre-reloc; + }; + }; + uart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x100>; @@ -762,6 +782,14 @@ status = "disabled"; }; + aic: interrupt-controller@fc020000 { + #interrupt-cells = <3>; + compatible = "atmel,sama5d2-aic"; + interrupt-controller; + reg = <0xfc020000 0x200>; + atmel,external-irqs = <49>; + }; + i2c1: i2c@fc028000 { compatible = "atmel,sama5d2-i2c"; reg = <0xfc028000 0x100>; diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi index 2505a2f..b7c261e 100644 --- a/arch/arm/dts/sama7g5.dtsi +++ b/arch/arm/dts/sama7g5.dtsi @@ -1,11 +1,11 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * sama7g5.dtsi - Device Tree Include file for SAMA7G5 SoC. + * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC * - * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries + * Copyright (C) 2020 Microchip Technology, Inc. and its subsidiaries * - * Author: Eugen Hristev <eugen.hristev@microchip.com> - * Author: Claudiu Beznea <claudiu.beznea@microchip.com> + * Author: Eugen Hristev <eugen.hristev@microchip.com> + * Author: Claudiu Beznea <claudiu.beznea@microchip.com> * */ @@ -14,12 +14,63 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clk/at91.h> #include <dt-bindings/dma/at91.h> +#include <dt-bindings/gpio/gpio.h> / { model = "Microchip SAMA7G5 family SoC"; compatible = "microchip,sama7g5"; + #address-cells = <1>; + #size-cells = <1>; interrupt-parent = <&gic>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>; + clock-names = "cpu", "master", "xtal"; + }; + }; + + cpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-90000000 { + opp-hz = /bits/ 64 <90000000>; + opp-microvolt = <1050000 1050000 1225000>; + clock-latency-ns = <320000>; + }; + + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <1050000 1050000 1225000>; + clock-latency-ns = <320000>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1050000 1050000 1225000>; + clock-latency-ns = <320000>; + opp-suspend; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1150000 1125000 1225000>; + clock-latency-ns = <320000>; + }; + + opp-1000000002 { + opp-hz = /bits/ 64 <1000000002>; + opp-microvolt = <1250000 1225000 1300000>; + clock-latency-ns = <320000>; + }; + }; + clocks { slow_rc_osc: slow_rc_osc { compatible = "fixed-clock"; @@ -42,205 +93,794 @@ compatible = "fixed-clock"; #clock-cells = <0>; }; + + usb_clk: usb_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <48000000>; + }; }; - cpus { - #address-cells = <1>; - #size-cells = <0>; + vddout25: fixed-regulator-vddout25 { + compatible = "regulator-fixed"; - A7_0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a7"; - clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 22>, <&main_xtal>; - clock-names = "cpu", "master", "xtal"; - }; + regulator-name = "VDDOUT25"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-boot-on; + status = "disabled"; + }; + + ns_sram: sram@100000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x100000 0x20000>; + ranges; }; - ahb { + soc { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; + ranges; - apb { - compatible = "simple-bus"; + nfc_sram: sram@600000 { + compatible = "mmio-sram"; + no-memory-wc; + reg = <0x00600000 0x2400>; #address-cells = <1>; #size-cells = <1>; + ranges = <0 0x00600000 0x2400>; + }; - pioA: pinctrl@e0014000 { - compatible = "microchip,sama7g5-gpio"; - reg = <0xe0014000 0x800>; - gpio-controller; - #gpio-cells = <2>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; - status = "okay"; + nfc_io: nfc-io@10000000 { + compatible = "atmel,sama5d3-nfc-io", "syscon"; + reg = <0x10000000 0x8000000>; + }; - pinctrl: pinctrl_default { - compatible = "microchip,sama7g5-pinctrl"; - }; + ebi: ebi@40000000 { + compatible = "atmel,sama5d3-ebi"; + #address-cells = <2>; + #size-cells = <1>; + atmel,smc = <&hsmc>; + reg = <0x40000000 0x20000000>; + ranges = <0x0 0x0 0x40000000 0x8000000 + 0x1 0x0 0x48000000 0x8000000 + 0x2 0x0 0x50000000 0x8000000 + 0x3 0x0 0x58000000 0x8000000>; + clocks = <&pmc PMC_TYPE_CORE 13>; /* PMC_MCK1 */ + status = "disabled"; + + nand_controller: nand-controller { + compatible = "atmel,sama5d3-nand-controller"; + atmel,nfc-sram = <&nfc_sram>; + atmel,nfc-io = <&nfc_io>; + ecc-engine = <&pmecc>; + #address-cells = <2>; + #size-cells = <1>; + ranges; + status = "disabled"; }; + }; + + securam: securam@e0000000 { + compatible = "microchip,sama7g5-securam", "atmel,sama5d2-securam", "mmio-sram"; + reg = <0xe0000000 0x4000>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 18>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xe0000000 0x4000>; + no-memory-wc; + }; - pmc: pmc@e0018000 { - compatible = "microchip,sama7g5-pmc"; - reg = <0xe0018000 0x200>; - #clock-cells = <2>; - clocks = <&clk32 1>, <&clk32 0>, <&main_xtal>, <&main_rc>; - clock-names = "td_slck", "md_slck", "main_xtal", "main_rc"; - status = "okay"; + secumod: secumod@e0004000 { + compatible = "microchip,sama7g5-secumod", "atmel,sama5d2-secumod", "syscon"; + reg = <0xe0004000 0x4000>; + gpio-controller; + #gpio-cells = <2>; + }; + + sfrbu: sfr@e0008000 { + compatible = "microchip,sama7g5-sfrbu", "atmel,sama5d2-sfrbu", "syscon"; + reg = <0xe0008000 0x20>; + }; + + pinctrl: pinctrl@e0014000 { + compatible = "microchip,sama7g5-gpio"; + reg = <0xe0014000 0x800>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 11>; + + pioA: pinctrl_default { + interrupt-controller; + #interrupt-cells = <2>; + gpio-controller; + #gpio-cells = <2>; + compatible = "microchip,sama7g5-pinctrl"; }; + }; + + pmc: pmc@e0018000 { + compatible = "microchip,sama7g5-pmc", "syscon"; + reg = <0xe0018000 0x200>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + #clock-cells = <2>; + clocks = <&clk32k 1>, <&clk32k 0>, <&main_xtal>, <&main_rc>; + clock-names = "td_slck", "md_slck", "main_xtal", "main_rc"; + }; + + shdwc: shdwc@e001d010 { + compatible = "microchip,sama7g5-shdwc", "syscon"; + reg = <0xe001d010 0x10>; + clocks = <&clk32k 0>; + #address-cells = <1>; + #size-cells = <0>; + atmel,wakeup-rtc-timer; + atmel,wakeup-rtt-timer; + status = "disabled"; + }; + + rtt: rtt@e001d020 { + compatible = "microchip,sama7g5-rtt", "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt"; + reg = <0xe001d020 0x30>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk32k 0>; + }; + + clk32k: clock-controller@e001d050 { + compatible = "microchip,sama7g5-sckc", "microchip,sam9x60-sckc"; + reg = <0xe001d050 0x4>; + clocks = <&slow_rc_osc>, <&slow_xtal>; + #clock-cells = <1>; + }; + + gpbr: gpbr@e001d060 { + compatible = "microchip,sama7g5-gpbr", "syscon"; + reg = <0xe001d060 0x48>; + }; + + rtc: rtc@e001d0a8 { + compatible = "microchip,sama7g5-rtc", "microchip,sam9x60-rtc"; + reg = <0xe001d0a8 0x30>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk32k 1>; + }; + + ps_wdt: watchdog@e001d180 { + compatible = "microchip,sama7g5-wdt"; + reg = <0xe001d180 0x24>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk32k 0>; + }; + + chipid@e0020000 { + compatible = "microchip,sama7g5-chipid"; + reg = <0xe0020000 0x8>; + }; + + tcb1: timer@e0800000 { + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe0800000 0x100>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 91>, <&pmc PMC_TYPE_PERIPHERAL 92>, <&pmc PMC_TYPE_PERIPHERAL 93>, <&clk32k 1>; + clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; + }; - clk32: sckc@e001d050 { - compatible = "microchip,sam9x60-sckc"; - reg = <0xe001d050 0x4>; - clocks = <&slow_rc_osc>, <&slow_xtal>; - #clock-cells = <1>; + hsmc: hsmc@e0808000 { + compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd"; + reg = <0xe0808000 0x1000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 21>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pmecc: ecc-engine@e0808070 { + compatible = "atmel,sama5d2-pmecc"; + reg = <0xe0808070 0x490>, + <0xe0808500 0x200>; }; + }; - qspi0: spi@e080c000 { - compatible = "microchip,sama7g5-ospi"; - reg = <0xe080c000 0x400>, <0x20000000 0x10000000>; - reg-names = "qspi_base", "qspi_mmap"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>; - clock-names = "pclk", "gclk"; - assigned-clocks = <&pmc PMC_TYPE_GCK 78>; - assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ - #address-cells = <1>; - #size-cells = <0>; + qspi0: spi@e080c000 { + compatible = "microchip,sama7g5-ospi"; + reg = <0xe080c000 0x400>, <0x20000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(41)>, + <&dma0 AT91_XDMAC_DT_PERID(40)>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 78>, <&pmc PMC_TYPE_GCK 78>; + clock-names = "pclk", "gclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 78>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + qspi1: spi@e0810000 { + compatible = "microchip,sama7g5-qspi"; + reg = <0xe0810000 0x400>, <0x30000000 0x10000000>; + reg-names = "qspi_base", "qspi_mmap"; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(43)>, + <&dma0 AT91_XDMAC_DT_PERID(42)>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>; + clock-names = "pclk", "gclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 78>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + can0: can@e0828000 { + compatible = "bosch,m_can"; + reg = <0xe0828000 0x100>, <0x100000 0x7800>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 61>, <&pmc PMC_TYPE_GCK 61>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 61>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x3400 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can1: can@e082c000 { + compatible = "bosch,m_can"; + reg = <0xe082c000 0x100>, <0x100000 0xbc00>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 62>, <&pmc PMC_TYPE_GCK 62>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 62>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x7800 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can2: can@e0830000 { + compatible = "bosch,m_can"; + reg = <0xe0830000 0x100>, <0x100000 0x10000>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 63>, <&pmc PMC_TYPE_GCK 63>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 63>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0xbc00 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can3: can@e0834000 { + compatible = "bosch,m_can"; + reg = <0xe0834000 0x100>, <0x110000 0x4400>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 64>, <&pmc PMC_TYPE_GCK 64>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 64>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can4: can@e0838000 { + compatible = "bosch,m_can"; + reg = <0xe0838000 0x100>, <0x110000 0x8800>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 65>, <&pmc PMC_TYPE_GCK 65>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 65>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x4400 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + can5: can@e083c000 { + compatible = "bosch,m_can"; + reg = <0xe083c000 0x100>, <0x110000 0xcc00>; + reg-names = "m_can", "message_ram"; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "int0", "int1"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 66>, <&pmc PMC_TYPE_GCK 66>; + clock-names = "hclk", "cclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 66>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clock-rates = <40000000>; + bosch,mram-cfg = <0x8800 0 0 64 0 0 32 32>; + status = "disabled"; + }; + + adc: adc@e1000000 { + compatible = "microchip,sama7g5-adc"; + reg = <0xe1000000 0x200>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_GCK 26>; + assigned-clocks = <&pmc PMC_TYPE_GCK 26>; + assigned-clock-rates = <100000000>; + clock-names = "adc_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>; + dma-names = "rx"; + atmel,min-sample-rate-hz = <200000>; + atmel,max-sample-rate-hz = <20000000>; + atmel,startup-time-ms = <4>; + status = "disabled"; + }; + + sdmmc0: mmc@e1204000 { + compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci"; + reg = <0xe1204000 0x4000>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>; + clock-names = "hclock", "multclk"; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + assigned-clocks = <&pmc PMC_TYPE_GCK 80>; + assigned-clock-rates = <200000000>; + microchip,sdcal-inverted; + status = "disabled"; + }; + + sdmmc1: mmc@e1208000 { + compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci"; + reg = <0xe1208000 0x4000>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>; + clock-names = "hclock", "multclk"; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + assigned-clocks = <&pmc PMC_TYPE_GCK 81>; + assigned-clock-rates = <200000000>; + microchip,sdcal-inverted; + status = "disabled"; + }; + + sdmmc2: mmc@e120c000 { + compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci"; + reg = <0xe120c000 0x4000>; + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 82>, <&pmc PMC_TYPE_GCK 82>; + clock-names = "hclock", "multclk"; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div */ + assigned-clocks = <&pmc PMC_TYPE_GCK 82>; + assigned-clock-rates = <200000000>; + microchip,sdcal-inverted; + status = "disabled"; + }; + + pwm: pwm@e1604000 { + compatible = "microchip,sama7g5-pwm", "atmel,sama5d2-pwm"; + reg = <0xe1604000 0x4000>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; + #pwm-cells = <3>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 77>; + status = "disabled"; + }; + + spdifrx: spdifrx@e1614000 { + #sound-dai-cells = <0>; + compatible = "microchip,sama7g5-spdifrx"; + reg = <0xe1614000 0x4000>; + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(49)>; + dma-names = "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 84>, <&pmc PMC_TYPE_GCK 84>; + clock-names = "pclk", "gclk"; + status = "disabled"; + }; + + spdiftx: spdiftx@e1618000 { + #sound-dai-cells = <0>; + compatible = "microchip,sama7g5-spdiftx"; + reg = <0xe1618000 0x4000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(50)>; + dma-names = "tx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 85>, <&pmc PMC_TYPE_GCK 85>; + clock-names = "pclk", "gclk"; + }; + + i2s0: i2s@e161c000 { + compatible = "microchip,sama7g5-i2smcc"; + #sound-dai-cells = <0>; + reg = <0xe161c000 0x4000>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(34)>, <&dma0 AT91_XDMAC_DT_PERID(33)>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>; + clock-names = "pclk", "gclk"; + status = "disabled"; + }; + + i2s1: i2s@e1620000 { + compatible = "microchip,sama7g5-i2smcc"; + #sound-dai-cells = <0>; + reg = <0xe1620000 0x4000>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(36)>, <&dma0 AT91_XDMAC_DT_PERID(35)>; + dma-names = "tx", "rx"; + clocks = <&pmc PMC_TYPE_PERIPHERAL 58>, <&pmc PMC_TYPE_GCK 58>; + clock-names = "pclk", "gclk"; + status = "disabled"; + }; + + eic: interrupt-controller@e1628000 { + compatible = "microchip,sama7g5-eic"; + reg = <0xe1628000 0xec>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>; + clock-names = "pclk"; + status = "disabled"; + }; + + pit64b0: timer@e1800000 { + compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b"; + reg = <0xe1800000 0x4000>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>; + clock-names = "pclk", "gclk"; + }; + + pit64b1: timer@e1804000 { + compatible = "microchip,sama7g5-pit64b", "microchip,sam9x60-pit64b"; + reg = <0xe1804000 0x4000>; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 71>, <&pmc PMC_TYPE_GCK 71>; + clock-names = "pclk", "gclk"; + }; + + aes: crypto@e1810000 { + compatible = "atmel,at91sam9g46-aes"; + reg = <0xe1810000 0x100>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 27>; + clock-names = "aes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + }; + + sha: crypto@e1814000 { + compatible = "atmel,at91sam9g46-sha"; + reg = <0xe1814000 0x100>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 83>; + clock-names = "sha_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>; + dma-names = "tx"; + }; + + flx0: flexcom@e1818000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe1818000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe1818000 0x800>; + status = "disabled"; + + uart0: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 38>; + clock-names = "usart"; + dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>, + <&dma1 AT91_XDMAC_DT_PERID(5)>; + dma-names = "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; status = "disabled"; }; + }; - qspi1: spi@e0810000 { - compatible = "microchip,sama7g5-qspi"; - reg = <0xe0810000 0x400>, <0x30000000 0x10000000>; - reg-names = "qspi_base", "qspi_mmap"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 79>, <&pmc PMC_TYPE_GCK 79>; - clock-names = "pclk", "gclk"; - assigned-clocks = <&pmc PMC_TYPE_GCK 78>; - assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + flx1: flexcom@e181c000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe181c000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe181c000 0x800>; + status = "disabled"; + + i2c1: i2c@600 { + compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; + atmel,fifo-size = <32>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names = "rx", "tx"; status = "disabled"; }; + }; - sdmmc0: sdio-host@e1204000 { - compatible = "microchip,sama7g5-sdhci"; - reg = <0xe1204000 0x300>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 80>, <&pmc PMC_TYPE_GCK 80>; - clock-names = "hclock", "multclk"; - assigned-clocks = <&pmc PMC_TYPE_GCK 80>; - assigned-clock-rates = <200000000>; - assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ - status = "disabled"; - }; + flx3: flexcom@e1824000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe1824000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe1824000 0x800>; + status = "disabled"; - sdmmc1: sdio-host@e1208000 { - compatible = "microchip,sama7g5-sdhci"; - reg = <0xe1208000 0x300>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 81>, <&pmc PMC_TYPE_GCK 81>; - clock-names = "hclock", "multclk"; - assigned-clocks = <&pmc PMC_TYPE_GCK 81>; - assigned-clock-rates = <200000000>; - assigned-clock-parents = <&pmc PMC_TYPE_CORE 10>; /* sys pll div. */ + uart3: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; + clock-names = "usart"; + dmas = <&dma1 AT91_XDMAC_DT_PERID(12)>, + <&dma1 AT91_XDMAC_DT_PERID(11)>; + dma-names = "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; status = "disabled"; }; + }; - pit64b0: timer@e1800000 { - compatible = "microchip,sama7g5-pit64b"; - reg = <0xe1800000 0x4000>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 70>, <&pmc PMC_TYPE_GCK 70>; - clock-names = "pclk", "gclk"; - status = "okay"; - }; + trng: rng@e2010000 { + compatible = "microchip,sama7g5-trng", "atmel,at91sam9g45-trng"; + reg = <0xe2010000 0x100>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 97>; + status = "disabled"; + }; - flx1: flexcom@e181c000 { - compatible = "atmel,sama5d2-flexcom"; - reg = <0xe181c000 0x200>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0xe181c000 0x800>; - status = "disabled"; + tdes: crypto@e2014000 { + compatible = "atmel,at91sam9g46-tdes"; + reg = <0xe2014000 0x100>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 96>; + clock-names = "tdes_clk"; + dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>, + <&dma0 AT91_XDMAC_DT_PERID(53)>; + dma-names = "tx", "rx"; + }; - i2c1: i2c@600 { - compatible = "atmel,sama5d2-i2c"; - reg = <0x600 0x200>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 39>; - }; - }; + flx4: flexcom@e2018000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe2018000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe2018000 0x800>; + status = "disabled"; - uart0: serial@e1824200 { + uart4: serial@200 { compatible = "atmel,at91sam9260-usart"; - reg = <0xe1824200 0x200>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 41>; + reg = <0x200 0x200>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 42>; clock-names = "usart"; + dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>, + <&dma1 AT91_XDMAC_DT_PERID(13)>; + dma-names = "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size = <16>; status = "disabled"; }; + }; - gmac0: ethernet@e2800000 { - compatible = "cdns,sama7g5-gem"; - reg = <0xe2800000 0x4000>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>; - clock-names = "hclk", "pclk", "tx_clk"; - assigned-clocks = <&pmc PMC_TYPE_GCK 51>; - assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */ - assigned-clock-rates = <125000000>; + flx7: flexcom@e2024000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe2024000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe2024000 0x800>; + status = "disabled"; + + uart7: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 45>; + clock-names = "usart"; + dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>, + <&dma1 AT91_XDMAC_DT_PERID(19)>; + dma-names = "tx", "rx"; + atmel,use-dma-rx; + atmel,use-dma-tx; + atmel,fifo-size = <16>; status = "disabled"; }; + }; + + gmac0: ethernet@e2800000 { + compatible = "cdns,sama7g5-gem"; + reg = <0xe2800000 0x1000>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_GCK 51>, <&pmc PMC_TYPE_GCK 53>; + clock-names = "pclk", "hclk", "tx_clk", "tsu_clk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 51>; + assigned-clock-parents = <&pmc PMC_TYPE_CORE 21>; /* eth pll div. */ + assigned-clock-rates = <125000000>; + status = "disabled"; + }; + + gmac1: ethernet@e2804000 { + compatible = "cdns,sama7g5-emac"; + reg = <0xe2804000 0x1000>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH + GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; + + dma0: dma-controller@e2808000 { + compatible = "microchip,sama7g5-dma"; + reg = <0xe2808000 0x1000>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; + clock-names = "dma_clk"; + status = "disabled"; + }; + + dma1: dma-controller@e280c000 { + compatible = "microchip,sama7g5-dma"; + reg = <0xe280c000 0x1000>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "dma_clk"; + status = "disabled"; + }; + + /* Place dma2 here despite it's address */ + dma2: dma-controller@e1200000 { + compatible = "microchip,sama7g5-dma"; + reg = <0xe1200000 0x1000>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 24>; + clock-names = "dma_clk"; + dma-requests = <0>; + status = "disabled"; + }; + + tcb0: timer@e2814000 { + compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xe2814000 0x100>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 88>, <&pmc PMC_TYPE_PERIPHERAL 89>, <&pmc PMC_TYPE_PERIPHERAL 90>, <&clk32k 1>; + clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; + }; + + flx8: flexcom@e2818000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe2818000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe2818000 0x800>; + status = "disabled"; - gmac1: ethernet@e2804000 { - compatible = "cdns,sama7g5-emac"; - reg = <0xe2804000 0x1000>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 52>, <&pmc PMC_TYPE_PERIPHERAL 52>; - clock-names = "pclk", "hclk"; + i2c8: i2c@600 { + compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; + atmel,fifo-size = <32>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>, + <&dma0 AT91_XDMAC_DT_PERID(22)>; + dma-names = "rx", "tx"; status = "disabled"; }; + }; - dma0: dma-controller@e2808000 { - compatible = "microchip,sama7g5-dma"; - reg = <0xe2808000 0x1000>; - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - #dma-cells = <1>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 22>; - clock-names = "dma_clk"; + flx9: flexcom@e281c000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe281c000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 47>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe281c000 0x800>; + status = "disabled"; + + i2c9: i2c@600 { + compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c"; + reg = <0x600 0x200>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 47>; + atmel,fifo-size = <32>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(23)>, + <&dma0 AT91_XDMAC_DT_PERID(24)>; + dma-names = "rx", "tx"; status = "disabled"; }; + }; - flx8: flexcom@e2818000 { - compatible = "atmel,sama5d2-flexcom"; - reg = <0xe2818000 0x200>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; + flx11: flexcom@e2824000 { + compatible = "atmel,sama5d2-flexcom"; + reg = <0xe2824000 0x200>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 49>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0xe2824000 0x800>; + status = "disabled"; + + spi11: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 49>; + clock-names = "spi_clk"; #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0xe2818000 0x800>; + #size-cells = <0>; + atmel,fifo-size = <32>; + dmas = <&dma0 AT91_XDMAC_DT_PERID(27)>, + <&dma0 AT91_XDMAC_DT_PERID(28)>; + dma-names = "rx", "tx"; status = "disabled"; - - i2c8: i2c@600 { - compatible = "microchip,sama7g5-i2c", "microchip,sam9x60-i2c"; - reg = <0x600 0x200>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&pmc PMC_TYPE_PERIPHERAL 46>; - atmel,fifo-size = <32>; - dmas = <&dma0 AT91_XDMAC_DT_PERID(21)>, - <&dma0 AT91_XDMAC_DT_PERID(22)>; - dma-names = "rx", "tx"; - atmel,use-dma-rx; - atmel,use-dma-tx; - status = "disabled"; - }; }; + }; - gic: interrupt-controller@e8c11000 { - compatible = "arm,cortex-a7-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - interrupt-parent; - reg = <0xe8c11000 0x1000>, - <0xe8c12000 0x2000>; - }; + uddrc: uddrc@e3800000 { + compatible = "microchip,sama7g5-uddrc"; + reg = <0xe3800000 0x4000>; + }; + + ddr3phy: ddr3phy@e3804000 { + compatible = "microchip,sama7g5-ddr3phy"; + reg = <0xe3804000 0x1000>; + }; + + gic: interrupt-controller@e8c11000 { + compatible = "arm,cortex-a7-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + interrupt-parent; + reg = <0xe8c11000 0x1000>, + <0xe8c12000 0x2000>; }; }; }; diff --git a/arch/arm/dts/sama7g5ek.dts b/arch/arm/dts/sama7g5ek.dts deleted file mode 100644 index ac6f23f..0000000 --- a/arch/arm/dts/sama7g5ek.dts +++ /dev/null @@ -1,275 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * sama7g5ek.dts - Device Tree file for SAMA7G5 EK - * SAMA7G5 Evaluation Kit - * - * Copyright (c) 2020, Microchip Technology Inc. - * 2020, Eugen Hristev <eugen.hristev@microchip.com> - * 2020, Claudiu Beznea <claudiu.beznea@microchip.com> - */ -/dts-v1/; -#include <dt-bindings/mfd/atmel-flexcom.h> -#include "sama7g5.dtsi" -#include "sama7g5-pinfunc.h" -#include <dt-bindings/pinctrl/at91.h> - -/ { - model = "Microchip SAMA7G5 Evaluation Kit"; - compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7"; - - aliases { - serial0 = &uart0; - i2c0 = &i2c1; - i2c1 = &i2c8; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - clocks { - slow_xtal: slow_xtal { - clock-frequency = <32768>; - }; - - main_xtal: main_xtal { - clock-frequency = <24000000>; - }; - }; - - ahb { - - apb { - sdmmc0: sdio-host@e1204000 { - bus-width = <8>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default - &pinctrl_sdmmc0_ck_rstn_ds_cd_default>; - status = "okay"; - }; - - sdmmc1: sdio-host@e1208000 { - bus-width = <4>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default - &pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>; - status = "okay"; - }; - - uart0: serial@e1824200 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flx3_default>; - status = "okay"; - }; - }; - }; -}; - -&qspi0 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_qspi>; - status = "okay"; - - flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <133000000>; - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - m25p,fast-read; - - }; -}; - -&flx1 { - atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; - status = "okay"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_flx1_default>; - status = "okay"; -}; - -&flx8 { - atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>; - status = "okay"; - - i2c8: i2c@600 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c8_default>; - i2c-analog-filter; - i2c-digital-filter; - i2c-digital-filter-width-ns = <35>; - status = "okay"; - - eeprom@52 { - compatible = "microchip,24aa02e48"; - reg = <0x52>; - pagesize = <16>; - }; - - eeprom@53 { - compatible = "microchip,24aa02e48"; - reg = <0x53>; - pagesize = <16>; - }; - }; -}; - -&gmac0 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac0_default - &pinctrl_gmac0_mdio_default - &pinctrl_gmac0_txc_default>; - phy-mode = "rgmii-id"; - status = "okay"; - - ethernet-phy@7 { - reg = <0x7>; - }; -}; - -&gmac1 { - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_mdio_default>; - phy-mode = "rmii"; - status = "okay"; - - ethernet-phy@0 { - reg = <0x0>; - }; -}; - -&pinctrl { - pinctrl_flx1_default: flx1_default { - pinmux = <PIN_PC9__FLEXCOM1_IO0>, - <PIN_PC10__FLEXCOM1_IO1>; - bias-disable; - }; - - pinctrl_flx3_default: flx3_default { - pinmux = <PIN_PD16__FLEXCOM3_IO0>, - <PIN_PD17__FLEXCOM3_IO1>; - bias-pull-up; - }; - - pinctrl_i2c8_default: i2c8_default { - pinmux = <PIN_PC14__FLEXCOM8_IO0>, - <PIN_PC13__FLEXCOM8_IO1>; - bias-disable; - }; - - pinctrl_qspi: qspi { - pinmux = <PIN_PB12__QSPI0_IO0>, - <PIN_PB11__QSPI0_IO1>, - <PIN_PB10__QSPI0_IO2>, - <PIN_PB9__QSPI0_IO3>, - <PIN_PB16__QSPI0_IO4>, - <PIN_PB17__QSPI0_IO5>, - <PIN_PB18__QSPI0_IO6>, - <PIN_PB19__QSPI0_IO7>, - <PIN_PB13__QSPI0_CS>, - <PIN_PB14__QSPI0_SCK>, - <PIN_PB15__QSPI0_SCKN>, - <PIN_PB20__QSPI0_DQS>, - <PIN_PB21__QSPI0_INT>; - bias-disable; - slew-rate = <0>; - atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>; - }; - - pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default { - pinmux = <PIN_PA1__SDMMC0_CMD>, - <PIN_PA3__SDMMC0_DAT0>, - <PIN_PA4__SDMMC0_DAT1>, - <PIN_PA5__SDMMC0_DAT2>, - <PIN_PA6__SDMMC0_DAT3>, - <PIN_PA7__SDMMC0_DAT4>, - <PIN_PA8__SDMMC0_DAT5>, - <PIN_PA9__SDMMC0_DAT6>, - <PIN_PA10__SDMMC0_DAT7>; - bias-pull-up; - }; - - pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default { - pinmux = <PIN_PA0__SDMMC0_CK>, - <PIN_PA2__SDMMC0_RSTN>, - <PIN_PA11__SDMMC0_DS>, - <PIN_PA14__SDMMC0_CD>; - bias-pull-up; - }; - - pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default { - pinmux = <PIN_PB29__SDMMC1_CMD>, - <PIN_PB31__SDMMC1_DAT0>, - <PIN_PC0__SDMMC1_DAT1>, - <PIN_PC1__SDMMC1_DAT2>, - <PIN_PC2__SDMMC1_DAT3>; - bias-pull-up; - }; - - pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default { - pinmux = <PIN_PB30__SDMMC1_CK>, - <PIN_PB28__SDMMC1_RSTN>, - <PIN_PC5__SDMMC1_1V8SEL>, - <PIN_PC4__SDMMC1_CD>; - bias-pull-up; - }; - - pinctrl_gmac0_default: gmac0_default { - pinmux = <PIN_PA16__G0_TX0>, - <PIN_PA17__G0_TX1>, - <PIN_PA26__G0_TX2>, - <PIN_PA27__G0_TX3>, - <PIN_PA19__G0_RX0>, - <PIN_PA20__G0_RX1>, - <PIN_PA28__G0_RX2>, - <PIN_PA29__G0_RX3>, - <PIN_PA15__G0_TXEN>, - <PIN_PA30__G0_RXCK>, - <PIN_PA18__G0_RXDV>, - <PIN_PA25__G0_125CK>; - slew-rate = <0>; - bias-disable; - }; - - pinctrl_gmac0_mdio_default: gmac0_mdio_default { - pinmux = <PIN_PA22__G0_MDC>, - <PIN_PA23__G0_MDIO>; - bias-disable; - }; - - pinctrl_gmac0_txc_default: gmac0_txc_default { - pinmux = <PIN_PA24__G0_TXCK>; - slew-rate = <0>; - bias-pull-up; - }; - - pinctrl_gmac1_default: gmac1_default { - pinmux = <PIN_PD30__G1_TXCK>, - <PIN_PD22__G1_TX0>, - <PIN_PD23__G1_TX1>, - <PIN_PD21__G1_TXEN>, - <PIN_PD25__G1_RX0>, - <PIN_PD26__G1_RX1>, - <PIN_PD27__G1_RXER>, - <PIN_PD24__G1_RXDV>; - slew-rate = <0>; - bias-disable; - }; - - pinctrl_gmac1_mdio_default: gmac1_mdio_default { - pinmux = <PIN_PD28__G1_MDC>, - <PIN_PD29__G1_MDIO>; - bias-disable; - }; -}; diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 4dda753..9495911 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -246,33 +246,6 @@ #size-cells = <0>; }; - smcc: memory-controller@e000e000 { - #address-cells = <1>; - #size-cells = <1>; - status = "disabled"; - clock-names = "memclk", "apb_pclk"; - clocks = <&clkc 11>, <&clkc 44>; - compatible = "arm,pl353-smc-r2p1", "arm,primecell"; - interrupt-parent = <&intc>; - interrupts = <0 18 4>; - ranges ; - reg = <0xe000e000 0x1000>; - nand0: flash@e1000000 { - status = "disabled"; - compatible = "arm,pl353-nand-r2p1"; - reg = <0xe1000000 0x1000000>; - #address-cells = <1>; - #size-cells = <1>; - }; - nor0: flash@e2000000 { - status = "disabled"; - compatible = "cfi-flash"; - reg = <0xe2000000 0x2000000>; - #address-cells = <1>; - #size-cells = <1>; - }; - }; - gem0: ethernet@e000b000 { compatible = "cdns,zynq-gem", "cdns,gem"; reg = <0xe000b000 0x1000>; @@ -295,6 +268,36 @@ #size-cells = <0>; }; + smcc: memory-controller@e000e000 { + compatible = "arm,pl353-smc-r2p1", "arm,primecell"; + reg = <0xe000e000 0x0001000>; + status = "disabled"; + clock-names = "memclk", "apb_pclk"; + clocks = <&clkc 11>, <&clkc 44>; + ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */ + 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */ + 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */ + #address-cells = <2>; + #size-cells = <1>; + interrupt-parent = <&intc>; + interrupts = <0 18 4>; + + nfc0: nand-controller@0,0 { + compatible = "arm,pl353-nand-r2p1"; + reg = <0 0 0x1000000>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + }; + nor0: flash@1,0 { + status = "disabled"; + compatible = "cfi-flash"; + reg = <1 0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; + sdhci0: mmc@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; diff --git a/arch/arm/dts/zynq-zc770-xm011.dts b/arch/arm/dts/zynq-zc770-xm011.dts index b6e3e25..0ef2ae1 100644 --- a/arch/arm/dts/zynq-zc770-xm011.dts +++ b/arch/arm/dts/zynq-zc770-xm011.dts @@ -47,7 +47,7 @@ }; }; -&nand0 { +&nfc0 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 664e658..7b09d75 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -215,10 +215,12 @@ &sdhci0 { clocks = <&zynqmp_clk SDIO0_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk SDIO0_REF>; }; &sdhci1 { clocks = <&zynqmp_clk SDIO1_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk SDIO1_REF>; }; &spi0 { @@ -255,10 +257,12 @@ &usb0 { clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; &usb1 { clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; &watchdog0 { @@ -279,10 +283,14 @@ &zynqmp_dpdma { clocks = <&zynqmp_clk DPDMA_REF>; + assigned-clocks = <&zynqmp_clk DPDMA_REF>; /* apll */ }; &zynqmp_dpsub { clocks = <&zynqmp_clk TOPSW_LSBUS>, <&zynqmp_clk DP_AUDIO_REF>, <&zynqmp_clk DP_VIDEO_REF>; + assigned-clocks = <&zynqmp_clk DP_STC_REF>, + <&zynqmp_clk DP_AUDIO_REF>, + <&zynqmp_clk DP_VIDEO_REF>; /* rpll, rpll, vpll */ }; diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts index 5d21795..b3fe42f 100644 --- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts +++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts @@ -511,10 +511,10 @@ #address-cells = <1>; #size-cells = <0>; reg = <6>; - si570_hsdp: clock-generator@5d { /* u5 */ + si570_hsdp: clock-generator@60 { /* u5 */ #clock-cells = <0>; compatible = "silabs,si570"; - reg = <0x5d>; /* 570JAC000900DG */ + reg = <0x60>; /* 570JAC000900DG */ temperature-stability = <50>; factory-fout = <156250000>; clock-frequency = <156250000>; @@ -528,10 +528,10 @@ /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */ /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */ - clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 - pcie clocking 3 */ + clock_8t49n287: clock-generator@60 { /* u39 8T49N240 - pcie clocking 3 */ #clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/ compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */ - reg = <0xd8>; + reg = <0x60>; /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */ /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */ diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts index 22602d8..85994be 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dts @@ -115,10 +115,12 @@ status = "disabled"; phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; + assigned-clock-rates = <27000000>, <25000000>, <300000000>; }; &zynqmp_dpdma { status = "okay"; + assigned-clock-rates = <600000000>; }; &usb0 { @@ -129,7 +131,7 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; usbhub: usb5744 { /* u43 */ compatible = "microchip,usb5744"; - reset-gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; }; }; @@ -152,6 +154,8 @@ no-1-8-v; disable-wp; xlnx,mio-bank = <1>; + assigned-clock-rates = <187498123>; + bus-width = <8>; }; &gem3 { /* required by spec */ @@ -164,16 +168,18 @@ mdio: mdio { #address-cells = <1>; #size-cells = <0>; - reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; - reset-delay-us = <2>; phy0: ethernet-phy@1 { #phy-cells = <1>; reg = <1>; + compatible = "ethernet-phy-id2000.a231"; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts index df054e1..b81c2e6 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dts +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dts @@ -36,11 +36,7 @@ label = "ina260-u14"; reg = <0x40>; }; - usbhub: usb5744@2d { /* u43 */ - compatible = "microchip,usb5744"; - reg = <0x2d>; - reset-gpios = <&gpio 44 GPIO_ACTIVE_HIGH>; - }; + /* u43 - 0x2d - USB hub */ /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ }; @@ -96,13 +92,15 @@ }; &zynqmp_dpsub { - status = "disabled"; + status = "okay"; phy-names = "dp-phy0", "dp-phy1"; phys = <&psgtr 1 PHY_TYPE_DP 0 0>, <&psgtr 0 PHY_TYPE_DP 1 0>; + assigned-clock-rates = <27000000>, <25000000>, <300000000>; }; &zynqmp_dpdma { status = "okay"; + assigned-clock-rates = <600000000>; }; &usb0 { @@ -111,6 +109,14 @@ pinctrl-0 = <&pinctrl_usb0_default>; phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; + assigned-clock-rates = <250000000>, <20000000>; + + usb5744: usb-hub { /* u43 */ + status = "okay"; + compatible = "microchip,usb5744"; + i2c-bus = <&i2c1>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; }; &dwc3_0 { @@ -135,6 +141,8 @@ clk-phase-sd-hs = <126>, <60>; clk-phase-uhs-sdr25 = <120>, <60>; clk-phase-uhs-ddr50 = <126>, <48>; + assigned-clock-rates = <187498123>; + bus-width = <8>; }; &gem3 { /* required by spec */ @@ -147,16 +155,18 @@ mdio: mdio { #address-cells = <1>; #size-cells = <0>; - reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; - reset-delay-us = <2>; phy0: ethernet-phy@1 { #phy-cells = <1>; reg = <1>; + compatible = "ethernet-phy-id2000.a231"; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,dp83867-rxctrl-strap-quirk; + reset-assert-us = <100>; + reset-deassert-us = <280>; + reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; }; }; }; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 5f55df2..14ab316 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -14,6 +14,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/phy/phy.h> +#include <dt-bindings/pinctrl/pinctrl-zynqmp.h> / { model = "ZynqMP SM-K26 Rev1/B/A"; @@ -92,6 +93,23 @@ status = "okay"; }; +&pinctrl0 { + status = "okay"; + pinctrl_sdhci0_default: sdhci0-default { + conf { + groups = "sdio0_0_grp"; + slew-rate = <SLEW_RATE_SLOW>; + power-source = <IO_STANDARD_LVCMOS18>; + bias-disable; + }; + + mux { + groups = "sdio0_0_grp"; + function = "sdio0"; + }; + }; +}; + &qspi { /* MIO 0-5 - U143 */ status = "okay"; flash@0 { /* MT25QU512A */ @@ -185,10 +203,13 @@ &sdhci0 { /* MIO13-23 - 16GB emmc MTFC16GAPALBH-IT - U133A */ status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdhci0_default>; non-removable; disable-wp; bus-width = <8>; xlnx,mio-bank = <0>; + assigned-clock-rates = <187498123>; }; &spi1 { /* MIO6, 9-11 */ @@ -316,3 +337,7 @@ &ams_pl { status = "okay"; }; + +&zynqmp_dpsub { + status = "okay"; +}; diff --git a/arch/arm/dts/zynqmp-zcu106-rev1.0.dts b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts new file mode 100644 index 0000000..f43c477 --- /dev/null +++ b/arch/arm/dts/zynqmp-zcu106-rev1.0.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * dts file for Xilinx ZynqMP ZCU106 Rev1.0 + * + * (C) Copyright 2016 - 2022, Xilinx, Inc. + * + * Michal Simek <michal.simek@xilinx.com> + */ + +#include "zynqmp-zcu106-revA.dts" + +/ { + model = "ZynqMP ZCU106 Rev1.0"; + compatible = "xlnx,zynqmp-zcu106-rev1.0", "xlnx,zynqmp-zcu106-revA", + "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; +}; diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h index 27f30d1..327c0e0 100644 --- a/arch/arm/include/asm/arch-bcmcygnus/configs.h +++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h @@ -19,7 +19,4 @@ #define CONFIG_SYS_NS16550_CLK_DIV 54 #define CONFIG_SYS_NS16550_COM3 0x18023000 -/* Ethernet */ -#define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/ - #endif /* __ARCH_CONFIGS_H */ diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 86a4e1f..3b1d9a3 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -88,7 +88,6 @@ #define CONFIG_SYS_FSL_ESDHC_BE #define CONFIG_SYS_FSL_WDOG_BE #define CONFIG_SYS_FSL_DSPI_BE -#define CONFIG_SYS_FSL_DCU_BE #define CONFIG_SYS_FSL_SEC_MON_LE #define CONFIG_SYS_FSL_SFP_VER_3_2 #define CONFIG_SYS_FSL_SFP_BE diff --git a/arch/arm/include/asm/esr.h b/arch/arm/include/asm/esr.h new file mode 100644 index 0000000..f19e4e7 --- /dev/null +++ b/arch/arm/include/asm/esr.h @@ -0,0 +1,343 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2013 - ARM Ltd + * Author: Marc Zyngier <marc.zyngier@arm.com> + */ + +#ifndef __ASM_ESR_H +#define __ASM_ESR_H + +#include <asm/memory.h> +#include <linux/const.h> + +#define ESR_ELx_EC_UNKNOWN (0x00) +#define ESR_ELx_EC_WFx (0x01) +/* Unallocated EC: 0x02 */ +#define ESR_ELx_EC_CP15_32 (0x03) +#define ESR_ELx_EC_CP15_64 (0x04) +#define ESR_ELx_EC_CP14_MR (0x05) +#define ESR_ELx_EC_CP14_LS (0x06) +#define ESR_ELx_EC_FP_ASIMD (0x07) +#define ESR_ELx_EC_CP10_ID (0x08) /* EL2 only */ +#define ESR_ELx_EC_PAC (0x09) /* EL2 and above */ +/* Unallocated EC: 0x0A - 0x0B */ +#define ESR_ELx_EC_CP14_64 (0x0C) +#define ESR_ELx_EC_BTI (0x0D) +#define ESR_ELx_EC_ILL (0x0E) +/* Unallocated EC: 0x0F - 0x10 */ +#define ESR_ELx_EC_SVC32 (0x11) +#define ESR_ELx_EC_HVC32 (0x12) /* EL2 only */ +#define ESR_ELx_EC_SMC32 (0x13) /* EL2 and above */ +/* Unallocated EC: 0x14 */ +#define ESR_ELx_EC_SVC64 (0x15) +#define ESR_ELx_EC_HVC64 (0x16) /* EL2 and above */ +#define ESR_ELx_EC_SMC64 (0x17) /* EL2 and above */ +#define ESR_ELx_EC_SYS64 (0x18) +#define ESR_ELx_EC_SVE (0x19) +#define ESR_ELx_EC_ERET (0x1a) /* EL2 only */ +/* Unallocated EC: 0x1B */ +#define ESR_ELx_EC_FPAC (0x1C) /* EL1 and above */ +/* Unallocated EC: 0x1D - 0x1E */ +#define ESR_ELx_EC_IMP_DEF (0x1f) /* EL3 only */ +#define ESR_ELx_EC_IABT_LOW (0x20) +#define ESR_ELx_EC_IABT_CUR (0x21) +#define ESR_ELx_EC_PC_ALIGN (0x22) +/* Unallocated EC: 0x23 */ +#define ESR_ELx_EC_DABT_LOW (0x24) +#define ESR_ELx_EC_DABT_CUR (0x25) +#define ESR_ELx_EC_SP_ALIGN (0x26) +/* Unallocated EC: 0x27 */ +#define ESR_ELx_EC_FP_EXC32 (0x28) +/* Unallocated EC: 0x29 - 0x2B */ +#define ESR_ELx_EC_FP_EXC64 (0x2C) +/* Unallocated EC: 0x2D - 0x2E */ +#define ESR_ELx_EC_SERROR (0x2F) +#define ESR_ELx_EC_BREAKPT_LOW (0x30) +#define ESR_ELx_EC_BREAKPT_CUR (0x31) +#define ESR_ELx_EC_SOFTSTP_LOW (0x32) +#define ESR_ELx_EC_SOFTSTP_CUR (0x33) +#define ESR_ELx_EC_WATCHPT_LOW (0x34) +#define ESR_ELx_EC_WATCHPT_CUR (0x35) +/* Unallocated EC: 0x36 - 0x37 */ +#define ESR_ELx_EC_BKPT32 (0x38) +/* Unallocated EC: 0x39 */ +#define ESR_ELx_EC_VECTOR32 (0x3A) /* EL2 only */ +/* Unallocated EC: 0x3B */ +#define ESR_ELx_EC_BRK64 (0x3C) +/* Unallocated EC: 0x3D - 0x3F */ +#define ESR_ELx_EC_MAX (0x3F) + +#define ESR_ELx_EC_SHIFT (26) +#define ESR_ELx_EC_WIDTH (6) +#define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) +#define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) + +#define ESR_ELx_IL_SHIFT (25) +#define ESR_ELx_IL (UL(1) << ESR_ELx_IL_SHIFT) +#define ESR_ELx_ISS_MASK (ESR_ELx_IL - 1) + +/* ISS field definitions shared by different classes */ +#define ESR_ELx_WNR_SHIFT (6) +#define ESR_ELx_WNR (UL(1) << ESR_ELx_WNR_SHIFT) + +/* Asynchronous Error Type */ +#define ESR_ELx_IDS_SHIFT (24) +#define ESR_ELx_IDS (UL(1) << ESR_ELx_IDS_SHIFT) +#define ESR_ELx_AET_SHIFT (10) +#define ESR_ELx_AET (UL(0x7) << ESR_ELx_AET_SHIFT) + +#define ESR_ELx_AET_UC (UL(0) << ESR_ELx_AET_SHIFT) +#define ESR_ELx_AET_UEU (UL(1) << ESR_ELx_AET_SHIFT) +#define ESR_ELx_AET_UEO (UL(2) << ESR_ELx_AET_SHIFT) +#define ESR_ELx_AET_UER (UL(3) << ESR_ELx_AET_SHIFT) +#define ESR_ELx_AET_CE (UL(6) << ESR_ELx_AET_SHIFT) + +/* Shared ISS field definitions for Data/Instruction aborts */ +#define ESR_ELx_SET_SHIFT (11) +#define ESR_ELx_SET_MASK (UL(3) << ESR_ELx_SET_SHIFT) +#define ESR_ELx_FnV_SHIFT (10) +#define ESR_ELx_FnV (UL(1) << ESR_ELx_FnV_SHIFT) +#define ESR_ELx_EA_SHIFT (9) +#define ESR_ELx_EA (UL(1) << ESR_ELx_EA_SHIFT) +#define ESR_ELx_S1PTW_SHIFT (7) +#define ESR_ELx_S1PTW (UL(1) << ESR_ELx_S1PTW_SHIFT) + +/* Shared ISS fault status code(IFSC/DFSC) for Data/Instruction aborts */ +#define ESR_ELx_FSC (0x3F) +#define ESR_ELx_FSC_TYPE (0x3C) +#define ESR_ELx_FSC_LEVEL (0x03) +#define ESR_ELx_FSC_EXTABT (0x10) +#define ESR_ELx_FSC_MTE (0x11) +#define ESR_ELx_FSC_SERROR (0x11) +#define ESR_ELx_FSC_ACCESS (0x08) +#define ESR_ELx_FSC_FAULT (0x04) +#define ESR_ELx_FSC_PERM (0x0C) + +/* ISS field definitions for Data Aborts */ +#define ESR_ELx_ISV_SHIFT (24) +#define ESR_ELx_ISV (UL(1) << ESR_ELx_ISV_SHIFT) +#define ESR_ELx_SAS_SHIFT (22) +#define ESR_ELx_SAS (UL(3) << ESR_ELx_SAS_SHIFT) +#define ESR_ELx_SSE_SHIFT (21) +#define ESR_ELx_SSE (UL(1) << ESR_ELx_SSE_SHIFT) +#define ESR_ELx_SRT_SHIFT (16) +#define ESR_ELx_SRT_MASK (UL(0x1F) << ESR_ELx_SRT_SHIFT) +#define ESR_ELx_SF_SHIFT (15) +#define ESR_ELx_SF (UL(1) << ESR_ELx_SF_SHIFT) +#define ESR_ELx_AR_SHIFT (14) +#define ESR_ELx_AR (UL(1) << ESR_ELx_AR_SHIFT) +#define ESR_ELx_CM_SHIFT (8) +#define ESR_ELx_CM (UL(1) << ESR_ELx_CM_SHIFT) + +/* ISS field definitions for exceptions taken in to Hyp */ +#define ESR_ELx_CV (UL(1) << 24) +#define ESR_ELx_COND_SHIFT (20) +#define ESR_ELx_COND_MASK (UL(0xF) << ESR_ELx_COND_SHIFT) +#define ESR_ELx_WFx_ISS_TI (UL(1) << 0) +#define ESR_ELx_WFx_ISS_WFI (UL(0) << 0) +#define ESR_ELx_WFx_ISS_WFE (UL(1) << 0) +#define ESR_ELx_xVC_IMM_MASK ((1UL << 16) - 1) + +#define DISR_EL1_IDS (UL(1) << 24) +/* + * DISR_EL1 and ESR_ELx share the bottom 13 bits, but the RES0 bits may mean + * different things in the future... + */ +#define DISR_EL1_ESR_MASK (ESR_ELx_AET | ESR_ELx_EA | ESR_ELx_FSC) + +/* ESR value templates for specific events */ +#define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | ESR_ELx_WFx_ISS_TI) +#define ESR_ELx_WFx_WFI_VAL ((ESR_ELx_EC_WFx << ESR_ELx_EC_SHIFT) | \ + ESR_ELx_WFx_ISS_WFI) + +/* BRK instruction trap from AArch64 state */ +#define ESR_ELx_BRK64_ISS_COMMENT_MASK 0xffff + +/* ISS field definitions for System instruction traps */ +#define ESR_ELx_SYS64_ISS_RES0_SHIFT 22 +#define ESR_ELx_SYS64_ISS_RES0_MASK (UL(0x7) << ESR_ELx_SYS64_ISS_RES0_SHIFT) +#define ESR_ELx_SYS64_ISS_DIR_MASK 0x1 +#define ESR_ELx_SYS64_ISS_DIR_READ 0x1 +#define ESR_ELx_SYS64_ISS_DIR_WRITE 0x0 + +#define ESR_ELx_SYS64_ISS_RT_SHIFT 5 +#define ESR_ELx_SYS64_ISS_RT_MASK (UL(0x1f) << ESR_ELx_SYS64_ISS_RT_SHIFT) +#define ESR_ELx_SYS64_ISS_CRM_SHIFT 1 +#define ESR_ELx_SYS64_ISS_CRM_MASK (UL(0xf) << ESR_ELx_SYS64_ISS_CRM_SHIFT) +#define ESR_ELx_SYS64_ISS_CRN_SHIFT 10 +#define ESR_ELx_SYS64_ISS_CRN_MASK (UL(0xf) << ESR_ELx_SYS64_ISS_CRN_SHIFT) +#define ESR_ELx_SYS64_ISS_OP1_SHIFT 14 +#define ESR_ELx_SYS64_ISS_OP1_MASK (UL(0x7) << ESR_ELx_SYS64_ISS_OP1_SHIFT) +#define ESR_ELx_SYS64_ISS_OP2_SHIFT 17 +#define ESR_ELx_SYS64_ISS_OP2_MASK (UL(0x7) << ESR_ELx_SYS64_ISS_OP2_SHIFT) +#define ESR_ELx_SYS64_ISS_OP0_SHIFT 20 +#define ESR_ELx_SYS64_ISS_OP0_MASK (UL(0x3) << ESR_ELx_SYS64_ISS_OP0_SHIFT) +#define ESR_ELx_SYS64_ISS_SYS_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \ + ESR_ELx_SYS64_ISS_OP1_MASK | \ + ESR_ELx_SYS64_ISS_OP2_MASK | \ + ESR_ELx_SYS64_ISS_CRN_MASK | \ + ESR_ELx_SYS64_ISS_CRM_MASK) +#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ + (((op0) << ESR_ELx_SYS64_ISS_OP0_SHIFT) | \ + ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \ + ((op2) << ESR_ELx_SYS64_ISS_OP2_SHIFT) | \ + ((crn) << ESR_ELx_SYS64_ISS_CRN_SHIFT) | \ + ((crm) << ESR_ELx_SYS64_ISS_CRM_SHIFT)) + +#define ESR_ELx_SYS64_ISS_SYS_OP_MASK (ESR_ELx_SYS64_ISS_SYS_MASK | \ + ESR_ELx_SYS64_ISS_DIR_MASK) +#define ESR_ELx_SYS64_ISS_RT(esr) \ + (((esr) & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT) +/* + * User space cache operations have the following sysreg encoding + * in System instructions. + * op0=1, op1=3, op2=1, crn=7, crm={ 5, 10, 11, 12, 13, 14 }, WRITE (L=0) + */ +#define ESR_ELx_SYS64_ISS_CRM_DC_CIVAC 14 +#define ESR_ELx_SYS64_ISS_CRM_DC_CVADP 13 +#define ESR_ELx_SYS64_ISS_CRM_DC_CVAP 12 +#define ESR_ELx_SYS64_ISS_CRM_DC_CVAU 11 +#define ESR_ELx_SYS64_ISS_CRM_DC_CVAC 10 +#define ESR_ELx_SYS64_ISS_CRM_IC_IVAU 5 + +#define ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \ + ESR_ELx_SYS64_ISS_OP1_MASK | \ + ESR_ELx_SYS64_ISS_OP2_MASK | \ + ESR_ELx_SYS64_ISS_CRN_MASK | \ + ESR_ELx_SYS64_ISS_DIR_MASK) +#define ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL \ + (ESR_ELx_SYS64_ISS_SYS_VAL(1, 3, 1, 7, 0) | \ + ESR_ELx_SYS64_ISS_DIR_WRITE) +/* + * User space MRS operations which are supported for emulation + * have the following sysreg encoding in System instructions. + * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1) + */ +#define ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK (ESR_ELx_SYS64_ISS_OP0_MASK | \ + ESR_ELx_SYS64_ISS_OP1_MASK | \ + ESR_ELx_SYS64_ISS_CRN_MASK | \ + ESR_ELx_SYS64_ISS_DIR_MASK) +#define ESR_ELx_SYS64_ISS_SYS_MRS_OP_VAL \ + (ESR_ELx_SYS64_ISS_SYS_VAL(3, 0, 0, 0, 0) | \ + ESR_ELx_SYS64_ISS_DIR_READ) + +#define ESR_ELx_SYS64_ISS_SYS_CTR ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 1, 0, 0) +#define ESR_ELx_SYS64_ISS_SYS_CTR_READ (ESR_ELx_SYS64_ISS_SYS_CTR | \ + ESR_ELx_SYS64_ISS_DIR_READ) + +#define ESR_ELx_SYS64_ISS_SYS_CNTVCT (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 2, 14, 0) | \ + ESR_ELx_SYS64_ISS_DIR_READ) + +#define ESR_ELx_SYS64_ISS_SYS_CNTVCTSS (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 6, 14, 0) | \ + ESR_ELx_SYS64_ISS_DIR_READ) + +#define ESR_ELx_SYS64_ISS_SYS_CNTFRQ (ESR_ELx_SYS64_ISS_SYS_VAL(3, 3, 0, 14, 0) | \ + ESR_ELx_SYS64_ISS_DIR_READ) + +#define esr_sys64_to_sysreg(e) \ + sys_reg((((e) & ESR_ELx_SYS64_ISS_OP0_MASK) >> \ + ESR_ELx_SYS64_ISS_OP0_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >> \ + ESR_ELx_SYS64_ISS_OP1_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >> \ + ESR_ELx_SYS64_ISS_CRN_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >> \ + ESR_ELx_SYS64_ISS_CRM_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >> \ + ESR_ELx_SYS64_ISS_OP2_SHIFT)) + +#define esr_cp15_to_sysreg(e) \ + sys_reg(3, \ + (((e) & ESR_ELx_SYS64_ISS_OP1_MASK) >> \ + ESR_ELx_SYS64_ISS_OP1_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_CRN_MASK) >> \ + ESR_ELx_SYS64_ISS_CRN_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_CRM_MASK) >> \ + ESR_ELx_SYS64_ISS_CRM_SHIFT), \ + (((e) & ESR_ELx_SYS64_ISS_OP2_MASK) >> \ + ESR_ELx_SYS64_ISS_OP2_SHIFT)) + +/* + * ISS field definitions for floating-point exception traps + * (FP_EXC_32/FP_EXC_64). + * + * (The FPEXC_* constants are used instead for common bits.) + */ + +#define ESR_ELx_FP_EXC_TFV (UL(1) << 23) + +/* + * ISS field definitions for CP15 accesses + */ +#define ESR_ELx_CP15_32_ISS_DIR_MASK 0x1 +#define ESR_ELx_CP15_32_ISS_DIR_READ 0x1 +#define ESR_ELx_CP15_32_ISS_DIR_WRITE 0x0 + +#define ESR_ELx_CP15_32_ISS_RT_SHIFT 5 +#define ESR_ELx_CP15_32_ISS_RT_MASK (UL(0x1f) << ESR_ELx_CP15_32_ISS_RT_SHIFT) +#define ESR_ELx_CP15_32_ISS_CRM_SHIFT 1 +#define ESR_ELx_CP15_32_ISS_CRM_MASK (UL(0xf) << ESR_ELx_CP15_32_ISS_CRM_SHIFT) +#define ESR_ELx_CP15_32_ISS_CRN_SHIFT 10 +#define ESR_ELx_CP15_32_ISS_CRN_MASK (UL(0xf) << ESR_ELx_CP15_32_ISS_CRN_SHIFT) +#define ESR_ELx_CP15_32_ISS_OP1_SHIFT 14 +#define ESR_ELx_CP15_32_ISS_OP1_MASK (UL(0x7) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) +#define ESR_ELx_CP15_32_ISS_OP2_SHIFT 17 +#define ESR_ELx_CP15_32_ISS_OP2_MASK (UL(0x7) << ESR_ELx_CP15_32_ISS_OP2_SHIFT) + +#define ESR_ELx_CP15_32_ISS_SYS_MASK (ESR_ELx_CP15_32_ISS_OP1_MASK | \ + ESR_ELx_CP15_32_ISS_OP2_MASK | \ + ESR_ELx_CP15_32_ISS_CRN_MASK | \ + ESR_ELx_CP15_32_ISS_CRM_MASK | \ + ESR_ELx_CP15_32_ISS_DIR_MASK) +#define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \ + (((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \ + ((op2) << ESR_ELx_CP15_32_ISS_OP2_SHIFT) | \ + ((crn) << ESR_ELx_CP15_32_ISS_CRN_SHIFT) | \ + ((crm) << ESR_ELx_CP15_32_ISS_CRM_SHIFT)) + +#define ESR_ELx_CP15_64_ISS_DIR_MASK 0x1 +#define ESR_ELx_CP15_64_ISS_DIR_READ 0x1 +#define ESR_ELx_CP15_64_ISS_DIR_WRITE 0x0 + +#define ESR_ELx_CP15_64_ISS_RT_SHIFT 5 +#define ESR_ELx_CP15_64_ISS_RT_MASK (UL(0x1f) << ESR_ELx_CP15_64_ISS_RT_SHIFT) + +#define ESR_ELx_CP15_64_ISS_RT2_SHIFT 10 +#define ESR_ELx_CP15_64_ISS_RT2_MASK (UL(0x1f) << ESR_ELx_CP15_64_ISS_RT2_SHIFT) + +#define ESR_ELx_CP15_64_ISS_OP1_SHIFT 16 +#define ESR_ELx_CP15_64_ISS_OP1_MASK (UL(0xf) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) +#define ESR_ELx_CP15_64_ISS_CRM_SHIFT 1 +#define ESR_ELx_CP15_64_ISS_CRM_MASK (UL(0xf) << ESR_ELx_CP15_64_ISS_CRM_SHIFT) + +#define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \ + (((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \ + ((crm) << ESR_ELx_CP15_64_ISS_CRM_SHIFT)) + +#define ESR_ELx_CP15_64_ISS_SYS_MASK (ESR_ELx_CP15_64_ISS_OP1_MASK | \ + ESR_ELx_CP15_64_ISS_CRM_MASK | \ + ESR_ELx_CP15_64_ISS_DIR_MASK) + +#define ESR_ELx_CP15_64_ISS_SYS_CNTVCT (ESR_ELx_CP15_64_ISS_SYS_VAL(1, 14) | \ + ESR_ELx_CP15_64_ISS_DIR_READ) + +#define ESR_ELx_CP15_64_ISS_SYS_CNTVCTSS (ESR_ELx_CP15_64_ISS_SYS_VAL(9, 14) | \ + ESR_ELx_CP15_64_ISS_DIR_READ) + +#define ESR_ELx_CP15_32_ISS_SYS_CNTFRQ (ESR_ELx_CP15_32_ISS_SYS_VAL(0, 0, 14, 0) |\ + ESR_ELx_CP15_32_ISS_DIR_READ) + +#ifndef __ASSEMBLY__ +#include <asm/types.h> + +static inline bool esr_is_data_abort(u32 esr) +{ + const u32 ec = ESR_ELx_EC(esr); + + return ec == ESR_ELx_EC_DABT_LOW || ec == ESR_ELx_EC_DABT_CUR; +} + +const char *esr_get_class_string(u32 esr); +#endif /* __ASSEMBLY */ + +#endif /* __ASM_ESR_H */ diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 36b8403..89b1015 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -1,45 +1,26 @@ /* - * linux/include/asm-arm/io.h + * I/O device access primitives. Based on early versions from the Linux kernel. * * Copyright (C) 1996-2000 Russell King * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * - * Modifications: - * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both - * constant addresses and variable addresses. - * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture - * specific IO header files. - * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. - * 04-Apr-1999 PJB Added check_signature. - * 12-Dec-1999 RMK More cleanups - * 18-Jun-2000 RMK Removed virt_to_* and friends definitions */ #ifndef __ASM_ARM_IO_H #define __ASM_ARM_IO_H -#ifdef __KERNEL__ - #include <linux/types.h> #include <linux/kernel.h> #include <asm/byteorder.h> #include <asm/memory.h> #include <asm/barriers.h> -#if 0 /* XXX###XXX */ -#include <asm/arch/hardware.h> -#endif /* XXX###XXX */ static inline void sync(void) { } -/* - * Generic virtual read/write. Note that we don't support half-word - * read/writes. We define __arch_*[bl] here, and leave __arch_*w - * to the architecture specific code. - */ +/* Generic virtual read/write. */ #define __arch_getb(a) (*(volatile unsigned char *)(a)) #define __arch_getw(a) (*(volatile unsigned short *)(a)) #define __arch_getl(a) (*(volatile unsigned int *)(a)) @@ -248,13 +229,6 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen) #define clrsetbits_64(addr, clear, set) clrsetbits(64, addr, clear, set) /* - * Now, pick up the machine-defined IO definitions - */ -#if 0 /* XXX###XXX */ -#include <asm/arch/io.h> -#endif /* XXX###XXX */ - -/* * IO port access primitives * ------------------------- * @@ -318,24 +292,12 @@ static inline void __raw_readsl(unsigned long addr, void *data, int longlen) #define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s) /* - * DMA-consistent mapping functions. These allocate/free a region of - * uncached, unwrite-buffered mapped memory space for use with DMA - * devices. This is the "generic" version. The PCI specific version - * is in pci.h - */ -extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle); -extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle); -extern void consistent_sync(void *vaddr, size_t size, int rw); - -/* * String version of IO memory access ops: */ extern void _memcpy_fromio(void *, unsigned long, size_t); extern void _memcpy_toio(unsigned long, const void *, size_t); extern void _memset_io(unsigned long, int, size_t); -extern void __readwrite_bug(const char *fn); - /* Optimized copy functions to read from/write to IO sapce */ #ifdef CONFIG_ARM64 #include <cpu_func.h> @@ -441,62 +403,6 @@ void __memset_io(volatile void __iomem *dst, int c, size_t count) #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) #endif -/* - * If this architecture has ISA IO, then define the isa_read/isa_write - * macros. - */ -#ifdef __mem_isa - -#define isa_readb(addr) __raw_readb(__mem_isa(addr)) -#define isa_readw(addr) __raw_readw(__mem_isa(addr)) -#define isa_readl(addr) __raw_readl(__mem_isa(addr)) -#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr)) -#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr)) -#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr)) -#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c)) -#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c)) -#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c)) - -#define isa_eth_io_copy_and_sum(a,b,c,d) \ - eth_copy_and_sum((a),__mem_isa(b),(c),(d)) - -static inline int -isa_check_signature(unsigned long io_addr, const unsigned char *signature, - int length) -{ - int retval = 0; - do { - if (isa_readb(io_addr) != *signature) - goto out; - io_addr++; - signature++; - length--; - } while (length); - retval = 1; -out: - return retval; -} - -#else /* __mem_isa */ - -#define isa_readb(addr) (__readwrite_bug("isa_readb"),0) -#define isa_readw(addr) (__readwrite_bug("isa_readw"),0) -#define isa_readl(addr) (__readwrite_bug("isa_readl"),0) -#define isa_writeb(val,addr) __readwrite_bug("isa_writeb") -#define isa_writew(val,addr) __readwrite_bug("isa_writew") -#define isa_writel(val,addr) __readwrite_bug("isa_writel") -#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io") -#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio") -#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio") - -#define isa_eth_io_copy_and_sum(a,b,c,d) \ - __readwrite_bug("isa_eth_io_copy_and_sum") - -#define isa_check_signature(io,sig,len) (0) - -#endif /* __mem_isa */ -#endif /* __KERNEL__ */ - #include <asm-generic/io.h> #include <iotrace.h> diff --git a/arch/arm/include/asm/mach-imx/mx5_video.h b/arch/arm/include/asm/mach-imx/mx5_video.h index dc6aa00c..b55c0fe 100644 --- a/arch/arm/include/asm/mach-imx/mx5_video.h +++ b/arch/arm/include/asm/mach-imx/mx5_video.h @@ -6,12 +6,7 @@ #ifndef __MX5_VIDEO_H #define __MX5_VIDEO_H -#ifdef CONFIG_VIDEO -void lcd_enable(void); -void setup_iomux_lcd(void); -#else static inline void lcd_enable(void) { } static inline void setup_iomux_lcd(void) { } -#endif #endif diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index ec0171e..1a1edc9 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -69,12 +69,10 @@ lr .req x30 */ .macro switch_el, xreg, el3_label, el2_label, el1_label mrs \xreg, CurrentEL - cmp \xreg, 0xc - b.eq \el3_label - cmp \xreg, 0x8 + cmp \xreg, #0x8 + b.gt \el3_label b.eq \el2_label - cmp \xreg, 0x4 - b.eq \el1_label + b.lt \el1_label .endm /* @@ -123,19 +121,10 @@ lr .req x30 */ .macro branch_if_slave, xreg, slave_label #ifdef CONFIG_ARMV8_MULTIENTRY - /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ mrs \xreg, mpidr_el1 - tst \xreg, #0xff /* Test Affinity 0 */ - b.ne \slave_label - lsr \xreg, \xreg, #8 - tst \xreg, #0xff /* Test Affinity 1 */ - b.ne \slave_label - lsr \xreg, \xreg, #8 - tst \xreg, #0xff /* Test Affinity 2 */ - b.ne \slave_label - lsr \xreg, \xreg, #16 - tst \xreg, #0xff /* Test Affinity 3 */ - b.ne \slave_label + and \xreg, \xreg, 0xffffffffff /* clear bits [63:40] */ + and \xreg, \xreg, ~0x00ff000000 /* also clear bits [31:24] */ + cbnz \xreg, \slave_label #endif .endm @@ -143,16 +132,12 @@ lr .req x30 * Branch if current processor is a master, * choose processor with all zero affinity value as the master. */ -.macro branch_if_master, xreg1, xreg2, master_label +.macro branch_if_master, xreg, master_label #ifdef CONFIG_ARMV8_MULTIENTRY - /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */ - mrs \xreg1, mpidr_el1 - lsr \xreg2, \xreg1, #32 - lsl \xreg2, \xreg2, #32 - lsl \xreg1, \xreg1, #40 - lsr \xreg1, \xreg1, #40 - orr \xreg1, \xreg1, \xreg2 - cbz \xreg1, \master_label + mrs \xreg, mpidr_el1 + and \xreg, \xreg, 0xffffffffff /* clear bits [63:40] */ + and \xreg, \xreg, ~0x00ff000000 /* also clear bits [31:24] */ + cbz \xreg, \master_label #else b \master_label #endif diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h index e37ad8f..2db60d5 100644 --- a/arch/arm/include/asm/proc-armv/ptrace.h +++ b/arch/arm/include/asm/proc-armv/ptrace.h @@ -14,6 +14,79 @@ #define PCMASK 0 +/* + * PSR bits + */ +#define PSR_MODE_EL0t 0x00000000 +#define PSR_MODE_EL1t 0x00000004 +#define PSR_MODE_EL1h 0x00000005 +#define PSR_MODE_EL2t 0x00000008 +#define PSR_MODE_EL2h 0x00000009 +#define PSR_MODE_EL3t 0x0000000c +#define PSR_MODE_EL3h 0x0000000d +#define PSR_MODE_MASK 0x0000000f + +/* AArch32 CPSR bits */ +#define PSR_MODE32_BIT 0x00000010 + +/* AArch64 SPSR bits */ +#define PSR_F_BIT 0x00000040 +#define PSR_I_BIT 0x00000080 +#define PSR_A_BIT 0x00000100 +#define PSR_D_BIT 0x00000200 +#define PSR_BTYPE_MASK 0x00000c00 +#define PSR_SSBS_BIT 0x00001000 +#define PSR_PAN_BIT 0x00400000 +#define PSR_UAO_BIT 0x00800000 +#define PSR_DIT_BIT 0x01000000 +#define PSR_TCO_BIT 0x02000000 +#define PSR_V_BIT 0x10000000 +#define PSR_C_BIT 0x20000000 +#define PSR_Z_BIT 0x40000000 +#define PSR_N_BIT 0x80000000 + +#define PSR_BTYPE_SHIFT 10 + +/* + * Groups of PSR bits + */ +#define PSR_f 0xff000000 /* Flags */ +#define PSR_s 0x00ff0000 /* Status */ +#define PSR_x 0x0000ff00 /* Extension */ +#define PSR_c 0x000000ff /* Control */ + +/* Convenience names for the values of PSTATE.BTYPE */ +#define PSR_BTYPE_NONE (0b00 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_JC (0b01 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_C (0b10 << PSR_BTYPE_SHIFT) +#define PSR_BTYPE_J (0b11 << PSR_BTYPE_SHIFT) + +/* SPSR_ELx bits for exceptions taken from AArch32 */ +#define PSR_AA32_MODE_MASK 0x0000001f +#define PSR_AA32_MODE_USR 0x00000010 +#define PSR_AA32_MODE_FIQ 0x00000011 +#define PSR_AA32_MODE_IRQ 0x00000012 +#define PSR_AA32_MODE_SVC 0x00000013 +#define PSR_AA32_MODE_ABT 0x00000017 +#define PSR_AA32_MODE_HYP 0x0000001a +#define PSR_AA32_MODE_UND 0x0000001b +#define PSR_AA32_MODE_SYS 0x0000001f +#define PSR_AA32_T_BIT 0x00000020 +#define PSR_AA32_F_BIT 0x00000040 +#define PSR_AA32_I_BIT 0x00000080 +#define PSR_AA32_A_BIT 0x00000100 +#define PSR_AA32_E_BIT 0x00000200 +#define PSR_AA32_PAN_BIT 0x00400000 +#define PSR_AA32_SSBS_BIT 0x00800000 +#define PSR_AA32_DIT_BIT 0x01000000 +#define PSR_AA32_Q_BIT 0x08000000 +#define PSR_AA32_V_BIT 0x10000000 +#define PSR_AA32_C_BIT 0x20000000 +#define PSR_AA32_Z_BIT 0x40000000 +#define PSR_AA32_N_BIT 0x80000000 +#define PSR_AA32_IT_MASK 0x0600fc00 /* If-Then execution state mask */ +#define PSR_AA32_GE_MASK 0x000f0000 + #ifndef __ASSEMBLY__ /* @@ -21,7 +94,9 @@ * on the stack during an exception. */ struct pt_regs { + unsigned long spsr; unsigned long elr; + unsigned long esr; unsigned long regs[31]; }; diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index e568af2..b5790bd 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -30,6 +30,7 @@ enum { BOOT_DEVICE_DFU, BOOT_DEVICE_XIP, BOOT_DEVICE_BOOTROM, + BOOT_DEVICE_SMH, BOOT_DEVICE_NONE }; #endif diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index f75eea1..87d1c77 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -82,6 +82,7 @@ #define HCR_EL2_RW_AARCH64 (1 << 31) /* EL1 is AArch64 */ #define HCR_EL2_RW_AARCH32 (0 << 31) /* Lower levels are AArch32 */ #define HCR_EL2_HCD_DIS (1 << 29) /* Hypervisor Call disabled */ +#define HCR_EL2_AMO_EL2 (1 << 5) /* Route SErrors to EL2 */ /* * ID_AA64ISAR1_EL1 bits definitions diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index 0b93cc4..aef0487 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -46,13 +46,8 @@ void do_software_interrupt(struct pt_regs *pt_regs); void do_prefetch_abort(struct pt_regs *pt_regs); void do_data_abort(struct pt_regs *pt_regs); void do_not_used(struct pt_regs *pt_regs); -#ifdef CONFIG_ARM64 -void do_fiq(struct pt_regs *pt_regs, unsigned int esr); -void do_irq(struct pt_regs *pt_regs, unsigned int esr); -#else void do_fiq(struct pt_regs *pt_regs); -void do_irq(struct pt_regs *pt_regswq); -#endif +void do_irq(struct pt_regs *pt_regs); void reset_misc(void); diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index c48e1f6..594fc12 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -46,7 +46,7 @@ else obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o endif -obj-$(CONFIG_SEMIHOSTING) += semihosting.o +obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o obj-y += bdinfo.o obj-y += sections.o diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c index c653e67..2e09141 100644 --- a/arch/arm/lib/interrupts_64.c +++ b/arch/arm/lib/interrupts_64.c @@ -5,11 +5,13 @@ */ #include <common.h> +#include <asm/esr.h> #include <asm/global_data.h> #include <asm/ptrace.h> #include <irq_func.h> #include <linux/compiler.h> #include <efi_loader.h> +#include <semihosting.h> DECLARE_GLOBAL_DATA_PTR; @@ -64,12 +66,55 @@ void show_regs(struct pt_regs *regs) } /* + * Try to "emulate" a semihosting call in the event that we don't have a + * debugger attached. + */ +static bool smh_emulate_trap(struct pt_regs *regs) +{ + int size; + + if (ESR_ELx_EC(regs->esr) != ESR_ELx_EC_UNKNOWN) + return false; + + if (regs->spsr & PSR_MODE32_BIT) { + if (regs->spsr & PSR_AA32_T_BIT) { + u16 *insn = (u16 *)ALIGN_DOWN(regs->elr, 2); + + if (*insn != SMH_T32_SVC && *insn != SMH_T32_HLT) + return false; + size = 2; + } else { + u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4); + + if (*insn != SMH_A32_SVC && *insn != SMH_A32_HLT) + return false; + size = 4; + } + } else { + u32 *insn = (u32 *)ALIGN_DOWN(regs->elr, 4); + + if (*insn != SMH_A64_HLT) + return false; + size = 4; + } + + /* Avoid future semihosting calls */ + disable_semihosting(); + + /* Just pretend the call failed */ + regs->regs[0] = -1; + regs->elr += size; + return true; +} + +/* * do_bad_sync handles the impossible case in the Synchronous Abort vector. */ -void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr) +void do_bad_sync(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08x\n", esr); + printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08lx\n", + pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -78,10 +123,10 @@ void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr) /* * do_bad_irq handles the impossible case in the Irq vector. */ -void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr) +void do_bad_irq(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr); + printf("Bad mode in \"Irq\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -90,10 +135,10 @@ void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr) /* * do_bad_fiq handles the impossible case in the Fiq vector. */ -void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr) +void do_bad_fiq(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr); + printf("Bad mode in \"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -102,10 +147,10 @@ void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr) /* * do_bad_error handles the impossible case in the Error vector. */ -void do_bad_error(struct pt_regs *pt_regs, unsigned int esr) +void do_bad_error(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("Bad mode in \"Error\" handler, esr 0x%08x\n", esr); + printf("Bad mode in \"Error\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -114,10 +159,13 @@ void do_bad_error(struct pt_regs *pt_regs, unsigned int esr) /* * do_sync handles the Synchronous Abort exception. */ -void do_sync(struct pt_regs *pt_regs, unsigned int esr) +void do_sync(struct pt_regs *pt_regs) { + if (CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) && + smh_emulate_trap(pt_regs)) + return; efi_restore_gd(); - printf("\"Synchronous Abort\" handler, esr 0x%08x\n", esr); + printf("\"Synchronous Abort\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -126,10 +174,10 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr) /* * do_irq handles the Irq exception. */ -void do_irq(struct pt_regs *pt_regs, unsigned int esr) +void do_irq(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("\"Irq\" handler, esr 0x%08x\n", esr); + printf("\"Irq\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -138,10 +186,10 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr) /* * do_fiq handles the Fiq exception. */ -void do_fiq(struct pt_regs *pt_regs, unsigned int esr) +void do_fiq(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("\"Fiq\" handler, esr 0x%08x\n", esr); + printf("\"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); @@ -153,10 +201,10 @@ void do_fiq(struct pt_regs *pt_regs, unsigned int esr) * it is defined with weak attribute and can be redefined * in processor specific code. */ -void __weak do_error(struct pt_regs *pt_regs, unsigned int esr) +void __weak do_error(struct pt_regs *pt_regs) { efi_restore_gd(); - printf("\"Error\" handler, esr 0x%08x\n", esr); + printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); show_efi_loaded_images(pt_regs); panic("Resetting CPU ...\n"); diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index 9fd8245..dbea2b0 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -1,28 +1,29 @@ // SPDX-License-Identifier: GPL-2.0+ /* + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com> * Copyright 2014 Broadcom Corporation */ /* - * Minimal semihosting implementation for reading files into memory. If more - * features like writing files or console output are required they can be - * added later. This code has been tested on arm64/aarch64 fastmodel only. - * An untested placeholder exists for armv7 architectures, but since they - * are commonly available in silicon now, fastmodel usage makes less sense - * for them. + * This code has been tested on arm64/aarch64 fastmodel only. An untested + * placeholder exists for armv7 architectures, but since they are commonly + * available in silicon now, fastmodel usage makes less sense for them. */ #include <common.h> -#include <command.h> -#include <env.h> #include <log.h> +#include <semihosting.h> #define SYSOPEN 0x01 #define SYSCLOSE 0x02 +#define SYSWRITEC 0x03 +#define SYSWRITE0 0x04 +#define SYSWRITE 0x05 #define SYSREAD 0x06 +#define SYSREADC 0x07 +#define SYSISERROR 0x08 +#define SYSSEEK 0x0A #define SYSFLEN 0x0C - -#define MODE_READ 0x0 -#define MODE_READBIN 0x1 +#define SYSERRNO 0x13 /* * Call the handler @@ -41,32 +42,54 @@ static noinline long smh_trap(unsigned int sysnum, void *addr) return result; } -/* - * Open a file on the host. Mode is "r" or "rb" currently. Returns a file - * descriptor or -1 on error. +#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) +static bool _semihosting_enabled = true; +static bool try_semihosting = true; + +bool semihosting_enabled(void) +{ + if (try_semihosting) { + smh_trap(SYSERRNO, NULL); + try_semihosting = false; + } + + return _semihosting_enabled; +} + +void disable_semihosting(void) +{ + _semihosting_enabled = false; +} +#endif + +/** + * smh_errno() - Read the host's errno + * + * This gets the value of the host's errno and negates it. The host's errno may + * or may not be set, so only call this function if a previous semihosting call + * has failed. + * + * Return: a negative error value */ -static long smh_open(const char *fname, char *modestr) +static int smh_errno(void) +{ + long ret = smh_trap(SYSERRNO, NULL); + + if (ret > 0 && ret < INT_MAX) + return -ret; + return -EIO; +} + +long smh_open(const char *fname, enum smh_open_mode mode) { long fd; - unsigned long mode; struct smh_open_s { const char *fname; unsigned long mode; size_t len; } open; - debug("%s: file \'%s\', mode \'%s\'\n", __func__, fname, modestr); - - /* Check the file mode */ - if (!(strcmp(modestr, "r"))) { - mode = MODE_READ; - } else if (!(strcmp(modestr, "rb"))) { - mode = MODE_READBIN; - } else { - printf("%s: ERROR mode \'%s\' not supported\n", __func__, - modestr); - return -1; - } + debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode); open.fname = fname; open.len = strlen(fname); @@ -75,23 +98,26 @@ static long smh_open(const char *fname, char *modestr) /* Open the file on the host */ fd = smh_trap(SYSOPEN, &open); if (fd == -1) - printf("%s: ERROR fd %ld for file \'%s\'\n", __func__, fd, - fname); - + return smh_errno(); return fd; } -/* - * Read 'len' bytes of file into 'memp'. Returns 0 on success, else failure +/** + * struct smg_rdwr_s - Arguments for read and write + * @fd: A file descriptor returned from smh_open() + * @memp: Pointer to a buffer of memory of at least @len bytes + * @len: The number of bytes to read or write */ -static long smh_read(long fd, void *memp, size_t len) +struct smh_rdwr_s { + long fd; + void *memp; + size_t len; +}; + +long smh_read(long fd, void *memp, size_t len) { long ret; - struct smh_read_s { - long fd; - void *memp; - size_t len; - } read; + struct smh_rdwr_s read; debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len); @@ -100,25 +126,30 @@ static long smh_read(long fd, void *memp, size_t len) read.len = len; ret = smh_trap(SYSREAD, &read); - if (ret < 0) { - /* - * The ARM handler allows for returning partial lengths, - * but in practice this never happens so rather than create - * hard to maintain partial read loops and such, just fail - * with an error message. - */ - printf("%s: ERROR ret %ld, fd %ld, len %zu memp %p\n", - __func__, ret, fd, len, memp); - return -1; - } + if (ret < 0) + return smh_errno(); + return len - ret; +} + +long smh_write(long fd, const void *memp, size_t len, ulong *written) +{ + long ret; + struct smh_rdwr_s write; + + debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len); + write.fd = fd; + write.memp = (void *)memp; + write.len = len; + + ret = smh_trap(SYSWRITE, &write); + *written = len - ret; + if (ret) + return smh_errno(); return 0; } -/* - * Close the file using the file descriptor - */ -static long smh_close(long fd) +long smh_close(long fd) { long ret; @@ -126,15 +157,11 @@ static long smh_close(long fd) ret = smh_trap(SYSCLOSE, &fd); if (ret == -1) - printf("%s: ERROR fd %ld\n", __func__, fd); - - return ret; + return smh_errno(); + return 0; } -/* - * Get the file length from the file descriptor - */ -static long smh_len_fd(long fd) +long smh_flen(long fd) { long ret; @@ -142,77 +169,40 @@ static long smh_len_fd(long fd) ret = smh_trap(SYSFLEN, &fd); if (ret == -1) - printf("%s: ERROR ret %ld, fd %ld\n", __func__, ret, fd); - + return smh_errno(); return ret; } -static int smh_load_file(const char * const name, ulong load_addr, - ulong *end_addr) +long smh_seek(long fd, long pos) { - long fd; - long len; long ret; + struct smh_seek_s { + long fd; + long pos; + } seek; - fd = smh_open(name, "rb"); - if (fd == -1) - return -1; + debug("%s: fd %ld pos %ld\n", __func__, fd, pos); - len = smh_len_fd(fd); - if (len < 0) { - smh_close(fd); - return -1; - } - - ret = smh_read(fd, (void *)load_addr, len); - smh_close(fd); - - if (ret == 0) { - *end_addr = load_addr + len - 1; - printf("loaded file %s from %08lX to %08lX, %08lX bytes\n", - name, - load_addr, - *end_addr, - len); - } else { - printf("read failed\n"); - return 0; - } + seek.fd = fd; + seek.pos = pos; + ret = smh_trap(SYSSEEK, &seek); + if (ret) + return smh_errno(); return 0; } -static int do_smhload(struct cmd_tbl *cmdtp, int flag, int argc, - char *const argv[]) +int smh_getc(void) { - if (argc == 3 || argc == 4) { - ulong load_addr; - ulong end_addr = 0; - int ret; - char end_str[64]; - - load_addr = hextoul(argv[2], NULL); - if (!load_addr) - return -1; - - ret = smh_load_file(argv[1], load_addr, &end_addr); - if (ret < 0) - return CMD_RET_FAILURE; - - /* Optionally save returned end to the environment */ - if (argc == 4) { - sprintf(end_str, "0x%08lx", end_addr); - env_set(argv[3], end_str); - } - } else { - return CMD_RET_USAGE; - } - return 0; + return smh_trap(SYSREADC, NULL); +} + +void smh_putc(char ch) +{ + smh_trap(SYSWRITEC, &ch); } -U_BOOT_CMD(smhload, 4, 0, do_smhload, "load a file using semihosting", - "<file> 0x<address> [end var]\n" - " - load a semihosted file to the address specified\n" - " if the optional [end var] is specified, the end\n" - " address of the file will be stored in this environment\n" - " variable.\n"); +void smh_puts(const char *s) +{ + smh_trap(SYSWRITE0, (char *)s); +} diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 00f3104..488a43a 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -50,6 +50,7 @@ config SAM9X60 config SAMA7G5 bool select CPU_V7A + select AT91RESET_EXTRST config SAMA5D2 bool @@ -81,6 +82,7 @@ config TARGET_ETHERNUT5 config TARGET_SNAPPER9260 bool "Support snapper9260" select AT91SAM9260 + select AT91_WANTS_COMMON_PHY select DM select DM_GPIO select DM_SERIAL @@ -89,6 +91,7 @@ config TARGET_SNAPPER9260 config TARGET_GURNARD bool "Support gurnard" select AT91SAM9G45 + select AT91_WANTS_COMMON_PHY select BOARD_LATE_INIT select DM select DM_ETH @@ -115,6 +118,7 @@ config TARGET_AT91SAM9263EK config TARGET_USB_A9263 bool "Caloa USB A9260 board" select AT91SAM9263 + select AT91_WANTS_COMMON_PHY config TARGET_PM9263 bool "Ronetix pm9263 board" @@ -176,6 +180,7 @@ config TARGET_SAMA5D2_XPLAINED config TARGET_SAMA5D27_SOM1_EK bool "SAMA5D27 SOM1 EK board" + select SAMA5D2 select BOARD_EARLY_INIT_F select BOARD_LATE_INIT select CPU_V7A @@ -249,6 +254,7 @@ config TARGET_MEESC config TARGET_CORVUS bool "Support corvus" select AT91SAM9M10G45 + select AT91_WANTS_COMMON_PHY select DM select DM_ETH select DM_GPIO @@ -266,6 +272,7 @@ config TARGET_SAMA7G5EK config TARGET_TAURUS bool "Support taurus" select AT91SAM9G20 + select AT91_WANTS_COMMON_PHY select DM select DM_ETH select DM_GPIO @@ -278,6 +285,7 @@ config TARGET_TAURUS config TARGET_SMARTWEB bool "Support smartweb" select AT91SAM9260 + select AT91_WANTS_COMMON_PHY select DM select DM_ETH select DM_GPIO @@ -299,6 +307,9 @@ endchoice config ATMEL_SFR bool +config AT91RESET_EXTRST + bool + config SYS_SOC default "at91" @@ -310,6 +321,16 @@ config AT91_EFLASH Enable the driver for the embedded flash used in the Atmel AT91SAM9XE devices. +config AT91_GPIO_PULLUP + bool "Keep pullups on peripheral pins" + depends on CPU_ARM926EJS + +config ATMEL_LEGACY + bool "Legacy GPIO support" + +config AT91_WANTS_COMMON_PHY + bool + source "board/atmel/at91sam9260ek/Kconfig" source "board/atmel/at91sam9261ek/Kconfig" source "board/atmel/at91sam9263ek/Kconfig" diff --git a/arch/arm/mach-at91/armv7/Makefile b/arch/arm/mach-at91/armv7/Makefile index 246050b..f395b55 100644 --- a/arch/arm/mach-at91/armv7/Makefile +++ b/arch/arm/mach-at91/armv7/Makefile @@ -14,9 +14,11 @@ obj-y += cpu.o ifndef CONFIG_$(SPL_TPL_)SYSRESET obj-y += reset.o endif +ifneq ($(CONFIG_ATMEL_TCB_TIMER),y) ifneq ($(CONFIG_ATMEL_PIT_TIMER),y) ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y) # old non-DM timer driver obj-y += timer.o endif endif +endif diff --git a/arch/arm/mach-at91/include/mach/sama5d2.h b/arch/arm/mach-at91/include/mach/sama5d2.h index 9d94627..5ff20e9 100644 --- a/arch/arm/mach-at91/include/mach/sama5d2.h +++ b/arch/arm/mach-at91/include/mach/sama5d2.h @@ -129,6 +129,7 @@ /* * Address Memory Space */ +#define ATMEL_BASE_ROM 0x00000000 #define ATMEL_BASE_CS0 0x10000000 #define ATMEL_BASE_DDRCS 0x20000000 #define ATMEL_BASE_CS1 0x60000000 @@ -142,6 +143,12 @@ #define ATMEL_BASE_QSPI1_MEM 0xd8000000 /* + * PMECC tables in ROM + */ +#define ATMEL_PMECC_INDEX_OFFSET_512 0x40000 +#define ATMEL_PMECC_INDEX_OFFSET_1024 0x48000 + +/* * Internal Memories */ #define ATMEL_BASE_UDPHS_FIFO 0x00300000 /* USB Device HS controller */ @@ -233,9 +240,6 @@ /* PIT Timer(PIT_PIIR) */ #define CONFIG_SYS_TIMER_COUNTER 0xf804803c -/* No PMECC Galois table in ROM */ -#define NO_GALOIS_TABLE_IN_ROM - #ifndef __ASSEMBLY__ unsigned int get_chip_id(void); unsigned int get_extension_chip_id(void); diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 6087d93..f73dbbb 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -1,5 +1,9 @@ if ARCH_EXYNOS +config BOARD_COMMON + def_bool y + depends on !TARGET_SMDKV310 && !TARGET_ARNDALE + choice prompt "EXYNOS architecture type select" optional diff --git a/arch/arm/mach-exynos/exynos4_setup.h b/arch/arm/mach-exynos/exynos4_setup.h index 38735f0..a08d64a 100644 --- a/arch/arm/mach-exynos/exynos4_setup.h +++ b/arch/arm/mach-exynos/exynos4_setup.h @@ -11,19 +11,6 @@ #include <config.h> #include <asm/arch/cpu.h> -#ifdef CONFIG_CLK_800_330_165 -#define DRAM_CLK_330 -#endif -#ifdef CONFIG_CLK_1000_200_200 -#define DRAM_CLK_200 -#endif -#ifdef CONFIG_CLK_1000_330_165 -#define DRAM_CLK_330 -#endif -#ifdef CONFIG_CLK_1000_400_200 -#define DRAM_CLK_400 -#endif - /* Bus Configuration Register Address */ #define ASYNC_CONFIG 0x10010350 @@ -562,15 +549,8 @@ struct mem_timings { #define TIMINGPOWER_VAL 0x52000A3C #else #define TIMINGREF_VAL 0x000000BC -#ifdef DRAM_CLK_330 -#define TIMINGROW_VAL 0x3545548d -#define TIMINGDATA_VAL 0x45430506 -#define TIMINGPOWER_VAL 0x4439033c -#endif -#ifdef DRAM_CLK_400 #define TIMINGROW_VAL 0x45430506 #define TIMINGDATA_VAL 0x56500506 #define TIMINGPOWER_VAL 0x5444033d #endif #endif -#endif diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c index 72244988..93fea9c 100644 --- a/arch/arm/mach-exynos/spl_boot.c +++ b/arch/arm/mach-exynos/spl_boot.c @@ -22,6 +22,36 @@ #include "common_setup.h" #include "clock_init.h" +#ifdef CONFIG_ARCH_EXYNOS5 +#define SECURE_BL1_ONLY + +/* Secure FW size configuration */ +#ifdef SECURE_BL1_ONLY +#define SEC_FW_SIZE (8 << 10) /* 8KB */ +#else +#define SEC_FW_SIZE 0 +#endif + +/* Configuration of BL1, BL2, ENV Blocks on mmc */ +#define RES_BLOCK_SIZE (512) +#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ +#define BL2_SIZE (512UL << 10UL) /* 512 KB */ + +#define BL1_OFFSET (RES_BLOCK_SIZE + SEC_FW_SIZE) +#define BL2_OFFSET (BL1_OFFSET + BL1_SIZE) + +/* U-Boot copy size from boot Media to DRAM.*/ +#define BL2_START_OFFSET (BL2_OFFSET/512) +#define BL2_SIZE_BLOC_COUNT (BL2_SIZE/512) + +#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 +#define SPI_FLASH_UBOOT_POS (SEC_FW_SIZE + BL1_SIZE) +#elif defined(CONFIG_ARCH_EXYNOS4) +#define COPY_BL2_SIZE 0x80000 +#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) +#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) +#endif + DECLARE_GLOBAL_DATA_PTR; /* Index into irom ptr table */ diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c index ee5cc47..359f8c7 100644 --- a/arch/arm/mach-imx/imx8/cpu.c +++ b/arch/arm/mach-imx/imx8/cpu.c @@ -8,6 +8,7 @@ #include <cpu.h> #include <cpu_func.h> #include <dm.h> +#include <event.h> #include <init.h> #include <log.h> #include <asm/cache.h> @@ -66,7 +67,7 @@ int arch_cpu_init(void) return 0; } -int arch_cpu_init_dm(void) +static int imx8_init_mu(void *ctx, struct event *event) { struct udevice *devp; int node, ret; @@ -88,6 +89,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, imx8_init_mu); int print_bootinfo(void) { diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 1a5a391..7397b99 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -7,6 +7,7 @@ #include <common.h> #include <cpu_func.h> +#include <event.h> #include <init.h> #include <log.h> #include <asm/arch/imx-regs.h> @@ -494,7 +495,7 @@ static void imx_set_wdog_powerdown(bool enable) writew(enable, &wdog3->wmcr); } -int arch_cpu_init_dm(void) +static int imx8m_check_clock(void *ctx, struct event *event) { struct udevice *dev; int ret; @@ -511,6 +512,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock); int arch_cpu_init(void) { @@ -1293,7 +1295,7 @@ void imx_tmu_arch_init(void *reg_base) #if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN) bool serror_need_skip = true; -void do_error(struct pt_regs *pt_regs, unsigned int esr) +void do_error(struct pt_regs *pt_regs) { /* * If stack is still in ROM reserved OCRAM not switch to SPL, @@ -1318,7 +1320,7 @@ void do_error(struct pt_regs *pt_regs, unsigned int esr) } efi_restore_gd(); - printf("\"Error\" handler, esr 0x%08x\n", esr); + printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr); show_regs(pt_regs); panic("Resetting CPU ...\n"); } diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index 934b0ef..e6d417e 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -11,6 +11,7 @@ #include <asm/mach-imx/boot_mode.h> #include <asm/global_data.h> #include <efi_loader.h> +#include <event.h> #include <spl.h> #include <asm/arch/rdc.h> #include <asm/arch/s400_api.h> @@ -569,7 +570,7 @@ int arch_cpu_init(void) return 0; } -int arch_cpu_init_dm(void) +static int imx8ulp_check_mu(void *ctx, struct event *event) { struct udevice *devp; int node, ret; @@ -584,6 +585,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, imx8ulp_check_mu); #if defined(CONFIG_SPL_BUILD) __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 382b836..ca2da00 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig @@ -131,7 +131,6 @@ source "board/cloudengines/pogo_e02/Kconfig" source "board/cloudengines/pogo_v4/Kconfig" source "board/d-link/dns325/Kconfig" source "board/iomega/iconnect/Kconfig" -source "board/keymile/Kconfig" source "board/LaCie/net2big_v2/Kconfig" source "board/LaCie/netspace_v2/Kconfig" source "board/raidsonic/ib62x0/Kconfig" diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h index b9f836b..7810cf2 100644 --- a/arch/arm/mach-kirkwood/include/mach/config.h +++ b/arch/arm/mach-kirkwood/include/mach/config.h @@ -46,14 +46,6 @@ #endif /* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ -#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ -#endif /* CONFIG_CMD_NET */ - -/* * IDE Support on SATA ports */ #ifdef CONFIG_IDE diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig index 7d487f2..e17a55a 100644 --- a/arch/arm/mach-mvebu/Kconfig +++ b/arch/arm/mach-mvebu/Kconfig @@ -152,6 +152,7 @@ config TARGET_OCTEONTX2_CN913x config TARGET_DB_MV784MP_GP bool "Support db-mv784mp-gp" + select BOARD_ECC_SUPPORT select MV78460 config TARGET_DS414 @@ -160,6 +161,7 @@ config TARGET_DS414 config TARGET_MAXBCM bool "Support maxbcm" + select BOARD_ECC_SUPPORT select MV78460 config TARGET_THEADORABLE @@ -226,6 +228,9 @@ config DDR_RESET_ON_TRAINING_FAILURE device will still hang - it doesn't make sense to reset the board in such a case. +config BOARD_ECC_SUPPORT + bool + config SYS_BOARD default "clearfog" if TARGET_CLEARFOG default "helios4" if TARGET_HELIOS4 diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h index 681f649..fb4e5af 100644 --- a/arch/arm/mach-mvebu/include/mach/config.h +++ b/arch/arm/mach-mvebu/include/mach/config.h @@ -36,14 +36,6 @@ #define CONFIG_DM_SEQ_ALIAS 1 /* - * Ethernet Driver configuration - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_ARP_TIMEOUT 200 -#define CONFIG_NET_RETRY_COUNT 50 -#endif /* CONFIG_CMD_NET */ - -/* * I2C related stuff */ #ifdef CONFIG_CMD_I2C diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c index 0b63664..68f8ead 100644 --- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c +++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c @@ -62,7 +62,7 @@ static u32 board_id_get(void) return DB_78X60_AMC_ID; #elif defined(CONFIG_DB_78X60_PCAC_REV2) return DB_78X60_PCAC_REV2_ID; -#elif defined(CONFIG_DB_784MP_GP) +#elif defined(CONFIG_TARGET_DB_MV784MP_GP) return DB_784MP_GP_ID; #elif defined(CONFIG_RD_78460_CUSTOMER) return RD_78460_CUSTOMER_ID; diff --git a/arch/arm/mach-nexell/include/mach/display_dev.h b/arch/arm/mach-nexell/include/mach/display_dev.h index 77eb614..f24fb17 100644 --- a/arch/arm/mach-nexell/include/mach/display_dev.h +++ b/arch/arm/mach-nexell/include/mach/display_dev.h @@ -8,16 +8,12 @@ #ifndef _NX__DISPLAY_DEV_H_ #define _NX__DISPLAY_DEV_H_ -#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO -#include <video_fb.h> -#elif defined CONFIG_LCD +#if !defined(CONFIG_DM_VIDEO) && defined(CONFIG_LCD) #include <lcd.h> #endif struct nx_display_dev { -#if defined CONFIG_VIDEO || defined CONFIG_DM_VIDEO - GraphicDevice graphic_device; -#elif defined CONFIG_LCD +#if !defined(CONFIG_DM_VIDEO) && defined(CONFIG_LCD) vidinfo_t *panel_info; #endif unsigned long base; diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig index 1402376..23865d4 100644 --- a/arch/arm/mach-omap2/am33xx/Kconfig +++ b/arch/arm/mach-omap2/am33xx/Kconfig @@ -207,6 +207,19 @@ config TARGET_PDU001 endchoice +config CLOCK_SYNTHESIZER + bool "CDCE913 and CDCEL913 clock synthesizer support" + help + The CDCE913 and CDCEL913 devices are modular PLL-based, low cost, + high performance , programmable clock synthesizers. They generate + up to 3 output clocks from a single input frequency. Each output can + be programmed for any clock-frequency. + +config CLK_SYNTHESIZER_I2C_ADDR + hex "Clock synthesizer i2c bus address" + depends on CLOCK_SYNTHESIZER + default 0x65 + endif if AM43XX @@ -280,3 +293,35 @@ config PUB_ROM_DATA_SIZE image, this area is no longer used, and can be reclaimed for run time use by the boot image. endif + +config AM335X_USB0 + bool "Static mode configuration for USB0 in SPL" + depends on AM33XX && SPL_MUSB_NEW && !SPL_OF_CONTROL + +choice + prompt "USB0 port configuration" + depends on AM335X_USB0 + +config AM335X_USB0_HOST + bool "Port is used in host mode" + +config AM335X_USB0_PERIPHERAL + bool "Port is used in peripheral mode" + +endchoice + +config AM335X_USB1 + bool "Static mode configuration for USB1 in SPL" + depends on AM33XX && SPL_MUSB_NEW && !SPL_OF_CONTROL + +choice + prompt "USB1 port configuration" + depends on AM335X_USB1 + +config AM335X_USB1_HOST + bool "Port is used in host mode" + +config AM335X_USB1_PERIPHERAL + bool "Port is used in peripheral mode" + +endchoice diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c index c446676..7f1b84e 100644 --- a/arch/arm/mach-omap2/am33xx/board.c +++ b/arch/arm/mach-omap2/am33xx/board.c @@ -11,6 +11,7 @@ #include <dm.h> #include <debug_uart.h> #include <errno.h> +#include <event.h> #include <init.h> #include <net.h> #include <ns16550.h> @@ -206,10 +207,8 @@ int cpu_mmc_init(struct bd_info *bis) #define RTC_BOARD_TYPE_SHIFT 16 /* AM33XX has two MUSB controllers which can be host or gadget */ -#if (defined(CONFIG_USB_MUSB_GADGET) || defined(CONFIG_USB_MUSB_HOST)) && \ - (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) && \ - (!CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)) && \ - (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_MUSB_NEW)) +#if (defined(CONFIG_AM335X_USB0) || defined(CONFIG_AM335X_USB1)) && \ + defined(CONFIG_SPL_BUILD) static struct musb_hdrc_config musb_config = { .multipoint = 1, @@ -218,7 +217,7 @@ static struct musb_hdrc_config musb_config = { .ram_bits = 12, }; -#if CONFIG_IS_ENABLED(DM_USB) && !CONFIG_IS_ENABLED(OF_CONTROL) +#ifdef CONFIG_AM335X_USB0 static struct ti_musb_plat usb0 = { .base = (void *)USB0_OTG_BASE, .ctrl_mod_base = &((struct ctrl_dev *)CTRL_DEVICE_BASE)->usb_ctrl0, @@ -228,7 +227,9 @@ static struct ti_musb_plat usb0 = { .platform_ops = &musb_dsps_ops, }, }; +#endif +#ifdef CONFIG_AM335X_USB1 static struct ti_musb_plat usb1 = { .base = (void *)USB1_OTG_BASE, .ctrl_mod_base = &((struct ctrl_dev *)CTRL_DEVICE_BASE)->usb_ctrl1, @@ -238,16 +239,17 @@ static struct ti_musb_plat usb1 = { .platform_ops = &musb_dsps_ops, }, }; +#endif U_BOOT_DRVINFOS(am33xx_usbs) = { -#if CONFIG_AM335X_USB0_MODE == MUSB_PERIPHERAL +#ifdef CONFIG_AM335X_USB0_PERIPHERAL { "ti-musb-peripheral", &usb0 }, -#elif CONFIG_AM335X_USB0_MODE == MUSB_HOST +#elif defined(CONFIG_AM335X_USB0_HOST) { "ti-musb-host", &usb0 }, #endif -#if CONFIG_AM335X_USB1_MODE == MUSB_PERIPHERAL +#ifdef CONFIG_AM335X_USB1_PERIPHERAL { "ti-musb-peripheral", &usb1 }, -#elif CONFIG_AM335X_USB1_MODE == MUSB_HOST +#elif defined(CONFIG_AM335X_USB1_HOST) { "ti-musb-host", &usb1 }, #endif }; @@ -256,77 +258,6 @@ int arch_misc_init(void) { return 0; } -#else -static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; - -/* USB 2.0 PHY Control */ -#define CM_PHY_PWRDN (1 << 0) -#define CM_PHY_OTG_PWRDN (1 << 1) -#define OTGVDET_EN (1 << 19) -#define OTGSESSENDEN (1 << 20) - -static void am33xx_usb_set_phy_power(u8 on, u32 *reg_addr) -{ - if (on) { - clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN, - OTGVDET_EN | OTGSESSENDEN); - } else { - clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN); - } -} - -#ifdef CONFIG_AM335X_USB0 -static void am33xx_otg0_set_phy_power(struct udevice *dev, u8 on) -{ - am33xx_usb_set_phy_power(on, &cdev->usb_ctrl0); -} - -struct omap_musb_board_data otg0_board_data = { - .set_phy_power = am33xx_otg0_set_phy_power, -}; - -static struct musb_hdrc_platform_data otg0_plat = { - .mode = CONFIG_AM335X_USB0_MODE, - .config = &musb_config, - .power = 50, - .platform_ops = &musb_dsps_ops, - .board_data = &otg0_board_data, -}; -#endif - -#ifdef CONFIG_AM335X_USB1 -static void am33xx_otg1_set_phy_power(struct udevice *dev, u8 on) -{ - am33xx_usb_set_phy_power(on, &cdev->usb_ctrl1); -} - -struct omap_musb_board_data otg1_board_data = { - .set_phy_power = am33xx_otg1_set_phy_power, -}; - -static struct musb_hdrc_platform_data otg1_plat = { - .mode = CONFIG_AM335X_USB1_MODE, - .config = &musb_config, - .power = 50, - .platform_ops = &musb_dsps_ops, - .board_data = &otg1_board_data, -}; -#endif - -int arch_misc_init(void) -{ -#ifdef CONFIG_AM335X_USB0 - musb_register(&otg0_plat, &otg0_board_data, - (void *)USB0_OTG_BASE); -#endif -#ifdef CONFIG_AM335X_USB1 - musb_register(&otg1_plat, &otg1_board_data, - (void *)USB1_OTG_BASE); -#endif - return 0; -} -#endif - #else /* CONFIG_USB_MUSB_* && CONFIG_AM335X_USB* && !CONFIG_DM_USB */ int arch_misc_init(void) @@ -596,7 +527,7 @@ void board_init_f(ulong dummy) #endif -int arch_cpu_init_dm(void) +static int am33xx_dm_post_init(void *ctx, struct event *event) { hw_data_init(); #if !CONFIG_IS_ENABLED(SKIP_LOWLEVEL_INIT) @@ -604,3 +535,4 @@ int arch_cpu_init_dm(void) #endif return 0; } +EVENT_SPY(EVT_DM_POST_INIT, am33xx_dm_post_init); diff --git a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c index 59f0d8e..c9b9502 100644 --- a/arch/arm/mach-omap2/am33xx/clk_synthesizer.c +++ b/arch/arm/mach-omap2/am33xx/clk_synthesizer.c @@ -31,12 +31,12 @@ static int clk_synthesizer_reg_read(struct udevice *dev, int addr, u8 *buf) #if !CONFIG_IS_ENABLED(DM_I2C) /* Send the command byte */ - rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1); + rc = i2c_write(CONFIG_CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1); if (rc) printf("Failed to send command to clock synthesizer\n"); /* Read the Data */ - return i2c_read(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1); + return i2c_read(CONFIG_CLK_SYNTHESIZER_I2C_ADDR, addr, 1, buf, 1); #else /* Send the command byte */ rc = dm_i2c_reg_write(dev, addr, *buf); @@ -73,7 +73,7 @@ static int clk_synthesizer_reg_write(struct udevice *dev, int addr, u8 val) cmd[1] = val; #if !CONFIG_IS_ENABLED(DM_I2C) - rc = i2c_write(CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2); + rc = i2c_write(CONFIG_CLK_SYNTHESIZER_I2C_ADDR, addr, 1, cmd, 2); #else rc = dm_i2c_write(dev, addr, cmd, 2); #endif @@ -97,17 +97,17 @@ int setup_clock_synthesizer(struct clk_synth *data) u8 val = 0; struct udevice *dev = NULL; #if !CONFIG_IS_ENABLED(DM_I2C) - rc = i2c_probe(CLK_SYNTHESIZER_I2C_ADDR); + rc = i2c_probe(CONFIG_CLK_SYNTHESIZER_I2C_ADDR); if (rc) { printf("i2c probe failed at address 0x%x\n", - CLK_SYNTHESIZER_I2C_ADDR); + CONFIG_CLK_SYNTHESIZER_I2C_ADDR); return rc; } #else - rc = i2c_get_chip_for_busnum(0, CLK_SYNTHESIZER_I2C_ADDR, 1, &dev); + rc = i2c_get_chip_for_busnum(0, CONFIG_CLK_SYNTHESIZER_I2C_ADDR, 1, &dev); if (rc) { printf("failed to get device for synthesizer at address 0x%x\n", - CLK_SYNTHESIZER_I2C_ADDR); + CONFIG_CLK_SYNTHESIZER_I2C_ADDR); return rc; } #endif diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c index 3da50f9..c4a8eab 100644 --- a/arch/arm/mach-omap2/hwinit-common.c +++ b/arch/arm/mach-omap2/hwinit-common.c @@ -12,6 +12,7 @@ */ #include <common.h> #include <debug_uart.h> +#include <event.h> #include <fdtdec.h> #include <init.h> #include <spl.h> @@ -239,11 +240,13 @@ void board_init_f(ulong dummy) } #endif -int arch_cpu_init_dm(void) +static int omap2_system_init(void *ctx, struct event *event) { early_system_init(); + return 0; } +EVENT_SPY(EVT_DM_POST_INIT, omap2_system_init); /* * Routine: wait_for_command_complete diff --git a/arch/arm/mach-omap2/omap3/clock.c b/arch/arm/mach-omap2/omap3/clock.c index 71f7349..13685e0 100644 --- a/arch/arm/mach-omap2/omap3/clock.c +++ b/arch/arm/mach-omap2/omap3/clock.c @@ -23,7 +23,7 @@ * get_sys_clk_speed() - determine reference oscillator speed * based on known 32kHz clock and gptimer. *****************************************************************************/ -u32 get_osc_clk_speed(void) +static u32 get_osc_clk_speed(void) { u32 start, cstart, cend, cdiff, cdiv, val; struct prcm *prcm_base = (struct prcm *)PRCM_BASE; @@ -90,7 +90,7 @@ u32 get_osc_clk_speed(void) * get_sys_clkin_sel() - returns the sys_clkin_sel field value based on * input oscillator clock frequency. *****************************************************************************/ -void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel) +static void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel) { switch(osc_clk) { case S38_4M: diff --git a/arch/arm/mach-rmobile/lowlevel_init_gen3.S b/arch/arm/mach-rmobile/lowlevel_init_gen3.S index 1df2c40..0d77800 100644 --- a/arch/arm/mach-rmobile/lowlevel_init_gen3.S +++ b/arch/arm/mach-rmobile/lowlevel_init_gen3.S @@ -64,7 +64,7 @@ ENTRY(lowlevel_init) #endif #endif - branch_if_master x0, x1, 2f + branch_if_master x0, 2f /* * Slave should wait for master clearing spin table. diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index bddfd44..78a7549 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -248,6 +248,4 @@ config SYS_CONFIG_NAME default "socfpga_stratix10_socdk" if TARGET_SOCFPGA_STRATIX10_SOCDK default "socfpga_vining_fpga" if TARGET_SOCFPGA_SOFTING_VINING_FPGA -source "board/keymile/Kconfig" - endif diff --git a/arch/arm/mach-socfpga/lowlevel_init_soc64.S b/arch/arm/mach-socfpga/lowlevel_init_soc64.S index 612ea8a..875927c 100644 --- a/arch/arm/mach-socfpga/lowlevel_init_soc64.S +++ b/arch/arm/mach-socfpga/lowlevel_init_soc64.S @@ -38,7 +38,7 @@ slave_wait_atf: #endif #ifdef CONFIG_ARMV8_MULTIENTRY - branch_if_master x0, x1, 2f + branch_if_master x0, 2f /* * Slave should wait for master clearing spin table. diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 97c0b7b..7f6e431 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -113,6 +113,10 @@ config M54418 bool select MCF5441x +# peripherals +config CF_DSPI + bool + choice prompt "Target select" optional @@ -176,6 +180,7 @@ config TARGET_AMCORE config TARGET_STMARK2 bool "Support stmark2" + select CF_DSPI select M54418 endchoice @@ -196,4 +201,7 @@ source "board/freescale/m5373evb/Kconfig" source "board/sysam/amcore/Kconfig" source "board/sysam/stmark2/Kconfig" +config MCFTMR + bool "Use DMA timer" + endmenu diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 02aa95a..ead62cd 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -225,8 +225,6 @@ #define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) #define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000)) -#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC) - /* Timer */ #ifdef CONFIG_MCFTMR #define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) @@ -249,7 +247,6 @@ #define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) #define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000)) -#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC) /* Timer */ #ifdef CONFIG_MCFTMR @@ -283,7 +280,6 @@ #endif #define MMAP_DSPI MMAP_DSPI0 -#define CONFIG_SYS_MCFRTC_BASE (MMAP_RTC) /* Timer */ #ifdef CONFIG_MCFTMR diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h index 3107748..050a8b4 100644 --- a/arch/microblaze/include/asm/system.h +++ b/arch/microblaze/include/asm/system.h @@ -23,6 +23,8 @@ #endif #include <asm/ptrace.h> +#define MMU_SECTION_SIZE (1 * 1024 * 1024) + #define prepare_to_switch() do { } while (0) /* diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 28234aa..06cae68 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -130,6 +130,7 @@ config MACH_PIC32 config TARGET_BOSTON bool "Support Boston" select DM + imply DM_EVENT select DM_SERIAL select MIPS_CM select SYS_CACHE_SHIFT_6 diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c index eac2fe5..de449e3 100644 --- a/arch/mips/mach-pic32/cpu.c +++ b/arch/mips/mach-pic32/cpu.c @@ -7,6 +7,7 @@ #include <common.h> #include <clk.h> #include <dm.h> +#include <event.h> #include <init.h> #include <malloc.h> #include <asm/global_data.h> @@ -95,12 +96,13 @@ static void prefetch_init(void) } /* arch specific CPU init after DM */ -int arch_cpu_init_dm(void) +static int pic32_flash_prefetch(void *ctx, struct event *event) { /* flash prefetch */ prefetch_init(); return 0; } +EVENT_SPY(EVT_DM_POST_INIT, pic32_flash_prefetch); /* Un-gate DDR2 modules (gated by default) */ static void ddr2_pmd_ungate(void) diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c index b55c8fb..4dd9c10 100644 --- a/arch/nios2/cpu/cpu.c +++ b/arch/nios2/cpu/cpu.c @@ -10,6 +10,7 @@ #include <cpu_func.h> #include <dm.h> #include <errno.h> +#include <event.h> #include <init.h> #include <irq_func.h> #include <asm/cache.h> @@ -63,7 +64,7 @@ static void copy_exception_trampoline(void) } #endif -int arch_cpu_init_dm(void) +static int nios_cpu_setup(void *ctx, struct event *event) { struct udevice *dev; int ret; @@ -79,6 +80,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, nios_cpu_setup); static int altera_nios2_get_desc(const struct udevice *dev, char *buf, int size) diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index bcd8375..2ebf8fc 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -1,6 +1,9 @@ menu "mpc83xx CPU" depends on MPC83xx +config E300 + def_bool y + config SYS_CPU default "mpc83xx" @@ -200,7 +203,6 @@ config FSL_ELBC source "board/freescale/mpc837xerdb/Kconfig" source "board/ids/ids8313/Kconfig" -source "board/keymile/Kconfig" source "board/gdsys/mpc8308/Kconfig" endmenu diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c index 3393ad5..33b2151 100644 --- a/arch/powerpc/cpu/mpc83xx/fdt.c +++ b/arch/powerpc/cpu/mpc83xx/fdt.c @@ -51,9 +51,6 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) REVID_MAJOR(spridr) >= 2) fdt_fixup_crypto_node(blob, 0x0204); -#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ - defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\ - defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5) #ifdef CONFIG_ARCH_MPC8313 /* * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1 @@ -66,7 +63,6 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) nodeoffset = fdt_path_offset(blob, "/aliases"); if (nodeoffset >= 0) { -#if defined(CONFIG_HAS_ETH0) prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL); if (prop) { u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 }; @@ -78,8 +74,6 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) fdt_setprop(blob, path, "interrupts", &tmp, sizeof(tmp)); } -#endif -#if defined(CONFIG_HAS_ETH1) prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL); if (prop) { u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 }; @@ -91,11 +85,9 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) fdt_setprop(blob, path, "interrupts", &tmp, sizeof(tmp)); } -#endif } } #endif -#endif do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency", (bd->bi_busfreq / 4), 1); diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c308447..c1b4e94 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -317,6 +317,7 @@ config ARCH_MPC8540 config ARCH_MPC8544 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A005125 @@ -330,6 +331,7 @@ config ARCH_MPC8544 config ARCH_MPC8548 bool + select BTB select FSL_LAW select SYS_FSL_ERRATUM_A005125 select SYS_FSL_ERRATUM_NMG_DDR120 @@ -352,6 +354,8 @@ config ARCH_MPC8560 config ARCH_P1010 bool + select A003399_NOR_WORKAROUND if SYS_FSL_ERRATUM_IFC_A003399 && !SPL + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_HAS_SERDES @@ -400,6 +404,7 @@ config ARCH_P1011 config ARCH_P1020 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004508 @@ -496,6 +501,7 @@ config ARCH_P1025 config ARCH_P2020 bool + select BTB select FSL_LAW select SYS_CACHE_SHIFT_5 select SYS_FSL_ERRATUM_A004477 @@ -517,6 +523,7 @@ config ARCH_P2020 config ARCH_P2041 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -542,6 +549,7 @@ config ARCH_P2041 config ARCH_P3041 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -572,6 +580,7 @@ config ARCH_P3041 config ARCH_P4080 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -611,6 +620,7 @@ config ARCH_P4080 config ARCH_P5040 bool + select BACKSIDE_L2_CACHE select E500MC select FSL_LAW select SYS_CACHE_SHIFT_6 @@ -641,7 +651,9 @@ config ARCH_QEMU_E500 config ARCH_T1024 bool + select BACKSIDE_L2_CACHE select E500MC + select E5500 select FSL_LAW select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_50 @@ -664,7 +676,9 @@ config ARCH_T1024 config ARCH_T1040 bool + select BACKSIDE_L2_CACHE select E500MC + select E5500 select FSL_LAW select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_50 @@ -687,7 +701,9 @@ config ARCH_T1040 config ARCH_T1042 bool + select BACKSIDE_L2_CACHE select E500MC + select E5500 select FSL_LAW select SYS_CACHE_SHIFT_6 select SYS_FSL_DDR_VER_50 @@ -772,6 +788,9 @@ config MPC85XX_HAVE_RESET_VECTOR bool "Indicate reset vector at CONFIG_RESET_VECTOR_ADDRESS - 0xffc" depends on MPC85xx +config BTB + bool "toggle branch predition" + config BOOKE bool default y @@ -784,12 +803,17 @@ config E500 config E500MC bool + select BTB imply CMD_PCI help Enble PowerPC E500MC core +config E5500 + bool + config E6500 bool + select BTB help Enable PowerPC E6500 core @@ -868,6 +892,18 @@ config SYS_CCSRBAR_DEFAULT if changed by pre-boot regime. The value here must match the current value in SoC. If not sure, do not change. +config A003399_NOR_WORKAROUND + bool + help + Enables a workaround for IFC erratum A003399. It is only required + during NOR boot. + +config A008044_WORKAROUND + bool + help + Enables a workaround for T1040/T1042 erratum A008044. It is only + required during NAND boot and valid for Rev 1.0 SoC revision + config SYS_FSL_ERRATUM_A004468 bool @@ -950,6 +986,7 @@ config SYS_FSL_ERRATUM_A007907 config SYS_FSL_ERRATUM_A008044 bool + select A008044_WORKAROUND if MTD_RAW_NAND config SYS_FSL_ERRATUM_CPC_A002 bool @@ -1084,6 +1121,9 @@ config SYS_NUM_TLBCAMS Number of TLB CAM entries for Book-E chips. 64 for E500MC, 16 for other E500 SoCs. +config BACKSIDE_L2_CACHE + bool + config SYS_PPC64 bool @@ -1159,7 +1199,6 @@ source "board/freescale/t104xrdb/Kconfig" source "board/freescale/t208xqds/Kconfig" source "board/freescale/t208xrdb/Kconfig" source "board/freescale/t4rdb/Kconfig" -source "board/keymile/Kconfig" source "board/socrates/Kconfig" endmenu diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile index 6f4ad1f..c32cde0 100644 --- a/arch/powerpc/cpu/mpc85xx/Makefile +++ b/arch/powerpc/cpu/mpc85xx/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_MP) += release.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o endif -obj-$(CONFIG_CPM2) += commproc.o obj-$(CONFIG_OF_LIBFDT) += fdt.o obj-$(CONFIG_FSL_CORENET) += liodn.o @@ -49,7 +48,6 @@ obj-$(CONFIG_ARCH_T2080) += t2080_ids.o obj-$(CONFIG_QE) += qe_io.o -obj-$(CONFIG_CPM2) += serial_scc.o obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c deleted file mode 100644 index 8e8427a..0000000 --- a/arch/powerpc/cpu/mpc85xx/commproc.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * Adapted for Motorola MPC8560 chips - * Xianghua Xiao <x.xiao@motorola.com> - * - * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's - * copyright notice: - * - * General Purpose functions for the global management of the - * 8220 Communication Processor Module. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) - * 2.3.99 Updates - * Copyright (c) 2003 Motorola,Inc. - * - * In addition to the individual control of the communication - * channels, there are a few functions that globally affect the - * communication processor. - * - * Buffer descriptors must be allocated from the dual ported memory - * space. The allocator for that is here. When the communication - * process is reset, we reclaim the memory available. There is - * currently no deallocator for this memory. - */ -#include <common.h> -#include <asm-offsets.h> -#include <asm/cpm_85xx.h> -#include <asm/global_data.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * because we have stack and init data in dual port ram - * we must reduce the size - */ -#undef CPM_DATAONLY_SIZE -#define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) - -void -m8560_cpm_reset(void) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile ulong count; - - gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET); - - /* Reclaim the DP memory for our use. - */ - gd->arch.dp_alloc_base = CPM_DATAONLY_BASE; - gd->arch.dp_alloc_top = gd->arch.dp_alloc_base + CPM_DATAONLY_SIZE; - - /* - * Reset CPM - */ - cpm->im_cpm_cp.cpcr = CPM_CR_RST; - count = 0; - do { /* Spin until command processed */ - __asm__ __volatile__ ("eieio"); - } while ((cpm->im_cpm_cp.cpcr & CPM_CR_FLG) && ++count < 1000000); -} - -/* Allocate some memory from the dual ported ram. - * To help protocols with object alignment restrictions, we do that - * if they ask. - */ -uint -m8560_cpm_dpalloc(uint size, uint align) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - uint retloc; - uint align_mask, off; - uint savebase; - - align_mask = align - 1; - savebase = gd->arch.dp_alloc_base; - - off = gd->arch.dp_alloc_base & align_mask; - if (off != 0) - gd->arch.dp_alloc_base += (align - off); - - if ((off = size & align_mask) != 0) - size += align - off; - - if ((gd->arch.dp_alloc_base + size) >= gd->arch.dp_alloc_top) { - gd->arch.dp_alloc_base = savebase; - panic("m8560_cpm_dpalloc: ran out of dual port ram!"); - } - - retloc = gd->arch.dp_alloc_base; - gd->arch.dp_alloc_base += size; - - memset((void *)&(cpm->im_dprambase[retloc]), 0, size); - - return(retloc); -} - -/* We also own one page of host buffer space for the allocation of - * UART "fifos" and the like. - */ -uint -m8560_cpm_hostalloc(uint size, uint align) -{ - /* the host might not even have RAM yet - just use dual port RAM */ - return (m8560_cpm_dpalloc(size, align)); -} - -/* Set a baud rate generator. This needs lots of work. There are - * eight BRGs, which can be connected to the CPM channels or output - * as clocks. The BRGs are in two different block of internal - * memory mapped space. - * The baud rate clock is the system clock divided by something. - * It was set up long ago during the initial boot phase and is - * is given to us. - * Baud rate clocks are zero-based in the driver code (as that maps - * to port numbers). Documentation uses 1-based numbering. - */ -#define BRG_INT_CLK gd->arch.brg_clk -#define BRG_UART_CLK ((BRG_INT_CLK + 15) / 16) - -/* This function is used by UARTS, or anything else that uses a 16x - * oversampled clock. - */ -void -m8560_cpm_setbrg(uint brg, uint rate) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile uint *bp; - - /* This is good enough to get SMCs running..... - */ - if (brg < 4) { - bp = (uint *)&(cpm->im_cpm_brg1.brgc1); - } - else { - bp = (uint *)&(cpm->im_cpm_brg2.brgc5); - brg -= 4; - } - bp += brg; - *bp = (((((BRG_UART_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; -} - -/* This function is used to set high speed synchronous baud rate - * clocks. - */ -void -m8560_cpm_fastbrg(uint brg, uint rate, int div16) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile uint *bp; - - /* This is good enough to get SMCs running..... - */ - if (brg < 4) { - bp = (uint *)&(cpm->im_cpm_brg1.brgc1); - } - else { - bp = (uint *)&(cpm->im_cpm_brg2.brgc5); - brg -= 4; - } - bp += brg; - *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; - if (div16) - *bp |= CPM_BRG_DIV16; -} - -/* This function is used to set baud rate generators using an external - * clock source and 16x oversampling. - */ - -void -m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile uint *bp; - - if (brg < 4) { - bp = (uint *)&(cpm->im_cpm_brg1.brgc1); - } - else { - bp = (uint *)&(cpm->im_cpm_brg2.brgc5); - brg -= 4; - } - bp += brg; - *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; - if (pinsel == 0) - *bp |= CPM_BRG_EXTC_CLK3_9; - else - *bp |= CPM_BRG_EXTC_CLK5_15; -} diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index cd32290..cc1d02d 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -241,10 +241,6 @@ int checkcpu (void) printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus)); #endif -#ifdef CONFIG_CPM2 - printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freq_systembus)); -#endif - #ifdef CONFIG_QE printf(" QE:%-4s MHz\n", strmhz(buf1, sysinfo.freq_qe)); #endif diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index e920e01..e9e133b 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -152,70 +152,6 @@ static void config_qe_ioports(void) } #endif -#ifdef CONFIG_CPM2 -void config_8560_ioports (volatile ccsr_cpm_t * cpm) -{ - int portnum; - - for (portnum = 0; portnum < 4; portnum++) { - uint pmsk = 0, - ppar = 0, - psor = 0, - pdir = 0, - podr = 0, - pdat = 0; - iop_conf_t *iopc = (iop_conf_t *) & iop_conf_tab[portnum][0]; - iop_conf_t *eiopc = iopc + 32; - uint msk = 1; - - /* - * NOTE: - * index 0 refers to pin 31, - * index 31 refers to pin 0 - */ - while (iopc < eiopc) { - if (iopc->conf) { - pmsk |= msk; - if (iopc->ppar) - ppar |= msk; - if (iopc->psor) - psor |= msk; - if (iopc->pdir) - pdir |= msk; - if (iopc->podr) - podr |= msk; - if (iopc->pdat) - pdat |= msk; - } - - msk <<= 1; - iopc++; - } - - if (pmsk != 0) { - volatile ioport_t *iop = ioport_addr (cpm, portnum); - uint tpmsk = ~pmsk; - - /* - * the (somewhat confused) paragraph at the - * bottom of page 35-5 warns that there might - * be "unknown behaviour" when programming - * PSORx and PDIRx, if PPARx = 1, so I - * decided this meant I had to disable the - * dedicated function first, and enable it - * last. - */ - iop->ppar &= tpmsk; - iop->psor = (iop->psor & tpmsk) | psor; - iop->podr = (iop->podr & tpmsk) | podr; - iop->pdat = (iop->pdat & tpmsk) | pdat; - iop->pdir = (iop->pdir & tpmsk) | pdir; - iop->ppar |= ppar; - } - } -} -#endif - #ifdef CONFIG_SYS_FSL_CPC #if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_CPC_REINIT_F) void disable_cpc_sram(void) @@ -474,16 +410,8 @@ ulong cpu_init_f(void) #endif #endif -#ifdef CONFIG_CPM2 - config_8560_ioports((ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR); -#endif - init_early_memctl_regs(); -#if defined(CONFIG_CPM2) - m8560_cpm_reset(); -#endif - #if defined(CONFIG_QE) && !defined(CONFIG_U_QE) /* Config QE ioports */ config_qe_ioports(); diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index d4b828e..c8ad6a1 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -652,14 +652,6 @@ void ft_cpu_setup(void *blob, struct bd_info *bd) "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); #endif -#ifdef CONFIG_CPM2 - do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart", - "current-speed", gd->baudrate, 1); - - do_fixup_by_compat_u32(blob, "fsl,cpm2-brg", - "clock-frequency", bd->bi_brgfreq, 1); -#endif - #ifdef CONFIG_FSL_CORENET do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0", "clock-frequency", get_board_sys_clk(), 1); diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c index b1b002c..84eb8b4 100644 --- a/arch/powerpc/cpu/mpc85xx/mp.c +++ b/arch/powerpc/cpu/mpc85xx/mp.c @@ -456,18 +456,18 @@ void setup_mp(void) flush_cache(bootpg, 4096); /* look for the tlb covering the reset page, there better be one */ - i = find_tlb_idx((void *)CONFIG_BPTR_VIRT_ADDR, 1); + i = find_tlb_idx((void *)BPTR_VIRT_ADDR, 1); /* we found a match */ if (i != -1) { /* map reset page to bootpg so we can copy code there */ disable_tlb(i); - set_tlb(1, CONFIG_BPTR_VIRT_ADDR, bootpg, /* tlb, epn, rpn */ + set_tlb(1, BPTR_VIRT_ADDR, bootpg, /* tlb, epn, rpn */ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */ 0, i, BOOKE_PAGESZ_4K, 1); /* ts, esel, tsize, iprot */ - memcpy((void *)CONFIG_BPTR_VIRT_ADDR, (void *)fixup, 4096); + memcpy((void *)BPTR_VIRT_ADDR, (void *)fixup, 4096); plat_mp_up(bootpg_map, pagesize); } else { diff --git a/arch/powerpc/cpu/mpc85xx/serial_scc.c b/arch/powerpc/cpu/mpc85xx/serial_scc.c deleted file mode 100644 index a2505d1..0000000 --- a/arch/powerpc/cpu/mpc85xx/serial_scc.c +++ /dev/null @@ -1,262 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2003 Motorola Inc. - * Xianghua Xiao (X.Xiao@motorola.com) - * Modified based on 8260 for 8560. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00. - */ - -/* - * Minimal serial functions needed to use one of the SCC ports - * as serial console interface. - */ - -#include <common.h> -#include <asm/cpm_85xx.h> -#include <serial.h> -#include <asm/global_data.h> -#include <linux/compiler.h> - -DECLARE_GLOBAL_DATA_PTR; - -#if defined(CONFIG_CONS_ON_SCC) - -#if CONFIG_CONS_INDEX == 1 /* Console on SCC1 */ - -#define SCC_INDEX 0 -#define PROFF_SCC PROFF_SCC1 -#define CMXSCR_MASK (CMXSCR_GR1|CMXSCR_SC1|\ - CMXSCR_RS1CS_MSK|CMXSCR_TS1CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS1CS_BRG1|CMXSCR_TS1CS_BRG1) -#define CPM_CR_SCC_PAGE CPM_CR_SCC1_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC1_SBLOCK - -#elif CONFIG_CONS_INDEX == 2 /* Console on SCC2 */ - -#define SCC_INDEX 1 -#define PROFF_SCC PROFF_SCC2 -#define CMXSCR_MASK (CMXSCR_GR2|CMXSCR_SC2|\ - CMXSCR_RS2CS_MSK|CMXSCR_TS2CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS2CS_BRG2|CMXSCR_TS2CS_BRG2) -#define CPM_CR_SCC_PAGE CPM_CR_SCC2_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC2_SBLOCK - -#elif CONFIG_CONS_INDEX == 3 /* Console on SCC3 */ - -#define SCC_INDEX 2 -#define PROFF_SCC PROFF_SCC3 -#define CMXSCR_MASK (CMXSCR_GR3|CMXSCR_SC3|\ - CMXSCR_RS3CS_MSK|CMXSCR_TS3CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS3CS_BRG3|CMXSCR_TS3CS_BRG3) -#define CPM_CR_SCC_PAGE CPM_CR_SCC3_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC3_SBLOCK - -#elif CONFIG_CONS_INDEX == 4 /* Console on SCC4 */ - -#define SCC_INDEX 3 -#define PROFF_SCC PROFF_SCC4 -#define CMXSCR_MASK (CMXSCR_GR4|CMXSCR_SC4|\ - CMXSCR_RS4CS_MSK|CMXSCR_TS4CS_MSK) -#define CMXSCR_VALUE (CMXSCR_RS4CS_BRG4|CMXSCR_TS4CS_BRG4) -#define CPM_CR_SCC_PAGE CPM_CR_SCC4_PAGE -#define CPM_CR_SCC_SBLOCK CPM_CR_SCC4_SBLOCK - -#else - -#error "console not correctly defined" - -#endif - -static int mpc85xx_serial_init(void) -{ - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - volatile ccsr_cpm_scc_t *sp; - volatile scc_uart_t *up; - volatile cbd_t *tbdf, *rbdf; - volatile ccsr_cpm_cp_t *cp = &(cpm->im_cpm_cp); - uint dpaddr; - - /* initialize pointers to SCC */ - - sp = (ccsr_cpm_scc_t *) &(cpm->im_cpm_scc[SCC_INDEX]); - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - - /* Disable transmitter/receiver. - */ - sp->gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); - - /* put the SCC channel into NMSI (non multiplexd serial interface) - * mode and wire the selected SCC Tx and Rx clocks to BRGx (15-15). - */ - cpm->im_cpm_mux.cmxscr = \ - (cpm->im_cpm_mux.cmxscr&~CMXSCR_MASK)|CMXSCR_VALUE; - - /* Set up the baud rate generator. - */ - serial_setbrg (); - - /* Allocate space for two buffer descriptors in the DP ram. - * damm: allocating space after the two buffers for rx/tx data - */ - - dpaddr = m8560_cpm_dpalloc((2 * sizeof (cbd_t)) + 2, 16); - - /* Set the physical address of the host memory buffers in - * the buffer descriptors. - */ - rbdf = (cbd_t *)&(cpm->im_dprambase[dpaddr]); - rbdf->cbd_bufaddr = (uint) (rbdf+2); - rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP; - tbdf = rbdf + 1; - tbdf->cbd_bufaddr = ((uint) (rbdf+2)) + 1; - tbdf->cbd_sc = BD_SC_WRAP; - - /* Set up the uart parameters in the parameter ram. - */ - up->scc_genscc.scc_rbase = dpaddr; - up->scc_genscc.scc_tbase = dpaddr+sizeof(cbd_t); - up->scc_genscc.scc_rfcr = CPMFCR_EB; - up->scc_genscc.scc_tfcr = CPMFCR_EB; - up->scc_genscc.scc_mrblr = 1; - up->scc_maxidl = 0; - up->scc_brkcr = 1; - up->scc_parec = 0; - up->scc_frmec = 0; - up->scc_nosec = 0; - up->scc_brkec = 0; - up->scc_uaddr1 = 0; - up->scc_uaddr2 = 0; - up->scc_toseq = 0; - up->scc_char1 = up->scc_char2 = up->scc_char3 = up->scc_char4 = 0x8000; - up->scc_char5 = up->scc_char6 = up->scc_char7 = up->scc_char8 = 0x8000; - up->scc_rccm = 0xc0ff; - - /* Mask all interrupts and remove anything pending. - */ - sp->sccm = 0; - sp->scce = 0xffff; - - /* Set 8 bit FIFO, 16 bit oversampling and UART mode. - */ - sp->gsmrh = SCC_GSMRH_RFW; /* 8 bit FIFO */ - sp->gsmrl = \ - SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16 | SCC_GSMRL_MODE_UART; - - /* Set CTS no flow control, 1 stop bit, 8 bit character length, - * normal async UART mode, no parity - */ - sp->psmr = SCU_PSMR_CL; - - /* execute the "Init Rx and Tx params" CP command. - */ - - while (cp->cpcr & CPM_CR_FLG) /* wait if cp is busy */ - ; - - cp->cpcr = mk_cr_cmd(CPM_CR_SCC_PAGE, CPM_CR_SCC_SBLOCK, - 0, CPM_CR_INIT_TRX) | CPM_CR_FLG; - - while (cp->cpcr & CPM_CR_FLG) /* wait if cp is busy */ - ; - - /* Enable transmitter/receiver. - */ - sp->gsmrl |= SCC_GSMRL_ENR | SCC_GSMRL_ENT; - - return (0); -} - -static void mpc85xx_serial_setbrg(void) -{ -#if defined(CONFIG_CONS_USE_EXTC) - m8560_cpm_extcbrg(SCC_INDEX, gd->baudrate, - CONFIG_CONS_EXTC_RATE, CONFIG_CONS_EXTC_PINSEL); -#else - m8560_cpm_setbrg(SCC_INDEX, gd->baudrate); -#endif -} - -static void mpc85xx_serial_putc(const char c) -{ - volatile scc_uart_t *up; - volatile cbd_t *tbdf; - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - - if (c == '\n') - serial_putc ('\r'); - - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - tbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_tbase]); - - /* Wait for last character to go. - */ - while (tbdf->cbd_sc & BD_SC_READY) - ; - - /* Load the character into the transmit buffer. - */ - *(volatile char *)tbdf->cbd_bufaddr = c; - tbdf->cbd_datlen = 1; - tbdf->cbd_sc |= BD_SC_READY; -} - -static int mpc85xx_serial_getc(void) -{ - volatile cbd_t *rbdf; - volatile scc_uart_t *up; - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - unsigned char c; - - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - rbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_rbase]); - - /* Wait for character to show up. - */ - while (rbdf->cbd_sc & BD_SC_EMPTY) - ; - - /* Grab the char and clear the buffer again. - */ - c = *(volatile unsigned char *)rbdf->cbd_bufaddr; - rbdf->cbd_sc |= BD_SC_EMPTY; - - return (c); -} - -static int mpc85xx_serial_tstc(void) -{ - volatile cbd_t *rbdf; - volatile scc_uart_t *up; - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - - up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); - rbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_rbase]); - - return ((rbdf->cbd_sc & BD_SC_EMPTY) == 0); -} - -static struct serial_device mpc85xx_serial_drv = { - .name = "mpc85xx_serial", - .start = mpc85xx_serial_init, - .stop = NULL, - .setbrg = mpc85xx_serial_setbrg, - .putc = mpc85xx_serial_putc, - .puts = default_serial_puts, - .getc = mpc85xx_serial_getc, - .tstc = mpc85xx_serial_tstc, -}; - -void mpc85xx_serial_initialize(void) -{ - serial_register(&mpc85xx_serial_drv); -} - -__weak struct serial_device *default_serial_console(void) -{ - return &mpc85xx_serial_drv; -} -#endif /* CONFIG_CONS_ON_SCC */ diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 5a9cd28..4b6f3d2 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -581,15 +581,6 @@ int get_clocks(void) #ifdef CONFIG_ARCH_MPC8544 volatile ccsr_gur_t *gur = (void *) CONFIG_SYS_MPC85xx_GUTS_ADDR; #endif -#if defined(CONFIG_CPM2) - volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; - uint sccr, dfbrg; - - /* set VCO = 4 * BRG */ - cpm->im_cpm_intctl.sccr &= 0xfffffffc; - sccr = cpm->im_cpm_intctl.sccr; - dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT; -#endif get_sys_info (&sys_info); gd->cpu_clk = sys_info.freq_processor[0]; gd->bus_clk = sys_info.freq_systembus; @@ -635,13 +626,6 @@ int get_clocks(void) #endif #endif /* defined(CONFIG_FSL_ESDHC) */ -#if defined(CONFIG_CPM2) - gd->arch.vco_out = 2*sys_info.freq_systembus; - gd->arch.cpm_clk = gd->arch.vco_out / 2; - gd->arch.scc_clk = gd->arch.vco_out / 4; - gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1))); -#endif - if(gd->cpu_clk != 0) return (0); else return (1); } diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index 656cc6e..9ddd371 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -247,7 +247,7 @@ l2_disabled: /* Interrupt vectors do not fit in minimal SPL. */ #if !defined(MINIMAL_SPL) /* Setup interrupt vectors */ - lis r1,CONFIG_SYS_MONITOR_BASE@h + lis r1,CONFIG_VAL(SYS_MONITOR_BASE)@h mtspr IVPR,r1 li r4,CriticalInput@l @@ -450,7 +450,7 @@ nexti: mflr r1 /* R1 = our PC */ */ create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \ 0, BOOKE_PAGESZ_4M, \ - CONFIG_SYS_MONITOR_BASE & 0xffc00000, MAS2_I|MAS2_G, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xffc00000, MAS2_I|MAS2_G, \ 0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 @@ -461,8 +461,8 @@ nexti: mflr r1 /* R1 = our PC */ */ create_tlb1_entry CONFIG_SYS_PPC_E500_DEBUG_TLB, \ 0, BOOKE_PAGESZ_256K, \ - CONFIG_SYS_MONITOR_BASE & 0xfffc0000, MAS2_I, \ - CONFIG_SYS_MONITOR_BASE & 0xfffc0000, MAS3_SX|MAS3_SW|MAS3_SR, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xfffc0000, MAS2_I, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xfffc0000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 #endif #endif @@ -1027,7 +1027,7 @@ create_init_ram_area: /* create a temp mapping in AS=1 to the 4M boot window */ create_tlb1_entry 15, \ 1, BOOKE_PAGESZ_4M, \ - CONFIG_SYS_MONITOR_BASE & 0xffc00000, MAS2_I|MAS2_G, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xffc00000, MAS2_I|MAS2_G, \ 0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 @@ -1037,7 +1037,7 @@ create_init_ram_area: */ create_tlb1_entry 15, \ 1, BOOKE_PAGESZ_1M, \ - CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS2_I|MAS2_G, \ CONFIG_SYS_PBI_FLASH_WINDOW & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 @@ -1048,24 +1048,24 @@ create_init_ram_area: */ #elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_NXP_ESBC) && \ (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) - /* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE + /* create a temp mapping in AS = 1 for mapping CONFIG_VAL(SYS_MONITOR_BASE) * to L3 Address configured by PBL for ISBC code */ create_tlb1_entry 15, \ 1, BOOKE_PAGESZ_1M, \ - CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS2_I|MAS2_G, \ CONFIG_SYS_INIT_L3_ADDR & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 #else /* - * create a temp mapping in AS=1 to the 1M CONFIG_SYS_MONITOR_BASE space, the main - * image has been relocated to CONFIG_SYS_MONITOR_BASE on the second stage. + * create a temp mapping in AS=1 to the 1M CONFIG_VAL(SYS_MONITOR_BASE) space, the main + * image has been relocated to CONFIG_VAL(SYS_MONITOR_BASE) on the second stage. */ create_tlb1_entry 15, \ 1, BOOKE_PAGESZ_1M, \ - CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS2_I|MAS2_G, \ - CONFIG_SYS_MONITOR_BASE & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS2_I|MAS2_G, \ + CONFIG_VAL(SYS_MONITOR_BASE) & 0xfff00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 #endif @@ -1126,8 +1126,8 @@ switch_as: #else /* Calculate absolute address in FLASH and jump there */ /*--------------------------------------------------------------*/ - lis r3,CONFIG_SYS_MONITOR_BASE@h - ori r3,r3,CONFIG_SYS_MONITOR_BASE@l + lis r3,CONFIG_VAL(SYS_MONITOR_BASE)@h + ori r3,r3,CONFIG_VAL(SYS_MONITOR_BASE)@l addi r3,r3,_start_cont - _start mtlr r3 blr @@ -1530,8 +1530,8 @@ relocate_code: GET_GOT #ifndef CONFIG_SPL_SKIP_RELOCATE mr r3,r5 /* Destination Address */ - lis r4,CONFIG_SYS_MONITOR_BASE@h /* Source Address */ - ori r4,r4,CONFIG_SYS_MONITOR_BASE@l + lis r4,CONFIG_VAL(SYS_MONITOR_BASE)@h /* Source Address */ + ori r4,r4,CONFIG_VAL(SYS_MONITOR_BASE)@l lwz r5,GOT(__init_end) sub r5,r5,r4 li r6,CONFIG_SYS_CACHELINE_SIZE /* Cache Line Size */ @@ -1539,7 +1539,7 @@ relocate_code: /* * Fix GOT pointer: * - * New GOT-PTR = (old GOT-PTR - CONFIG_SYS_MONITOR_BASE) + Destination Address + * New GOT-PTR = (old GOT-PTR - CONFIG_VAL(SYS_MONITOR_BASE)) + Destination Address * * Offset: */ diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h index 3541371..059ffe1 100644 --- a/arch/powerpc/include/asm/config.h +++ b/arch/powerpc/include/asm/config.h @@ -31,9 +31,7 @@ * Freescale's default e500 reset page. */ #if (defined(CONFIG_E500) && defined(CONFIG_MP)) -#ifndef CONFIG_BPTR_VIRT_ADDR -#define CONFIG_BPTR_VIRT_ADDR 0xfffff000 -#endif +#define BPTR_VIRT_ADDR 0xfffff000 #endif /* Since so many PPC SOCs have a semi-common LBC, define this here */ diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 7eb4566..47bfcc7 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -270,7 +270,6 @@ #endif #elif defined(CONFIG_ARCH_T1040) || defined(CONFIG_ARCH_T1042) -#define CONFIG_E5500 #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ @@ -299,7 +298,6 @@ #define CONFIG_SYS_FSL_SFP_VER_3_0 #elif defined(CONFIG_ARCH_T1024) -#define CONFIG_E5500 #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1 #define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */ diff --git a/arch/powerpc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h deleted file mode 100644 index d42469c..0000000 --- a/arch/powerpc/include/asm/cpm_85xx.h +++ /dev/null @@ -1,824 +0,0 @@ -/* - * MPC85xx Communication Processor Module - * Copyright (c) 2003,Motorola Inc. - * Xianghua Xiao (X.Xiao@motorola.com) - * - * MPC8260 Communication Processor Module. - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * - * This file contains structures and information for the communication - * processor channels found in the dual port RAM or parameter RAM. - * All CPM control and status is available through the MPC8260 internal - * memory map. See immap.h for details. - */ -#ifndef __CPM_85XX__ -#define __CPM_85XX__ - -#include <asm/immap_85xx.h> - -/* CPM Command register. -*/ -#define CPM_CR_RST ((uint)0x80000000) -#define CPM_CR_PAGE ((uint)0x7c000000) -#define CPM_CR_SBLOCK ((uint)0x03e00000) -#define CPM_CR_FLG ((uint)0x00010000) -#define CPM_CR_MCN ((uint)0x00003fc0) -#define CPM_CR_OPCODE ((uint)0x0000000f) - -/* Device sub-block and page codes. -*/ -#define CPM_CR_SCC1_SBLOCK (0x04) -#define CPM_CR_SCC2_SBLOCK (0x05) -#define CPM_CR_SCC3_SBLOCK (0x06) -#define CPM_CR_SCC4_SBLOCK (0x07) -#define CPM_CR_SMC1_SBLOCK (0x08) -#define CPM_CR_SMC2_SBLOCK (0x09) -#define CPM_CR_SPI_SBLOCK (0x0a) -#define CPM_CR_I2C_SBLOCK (0x0b) -#define CPM_CR_TIMER_SBLOCK (0x0f) -#define CPM_CR_RAND_SBLOCK (0x0e) -#define CPM_CR_FCC1_SBLOCK (0x10) -#define CPM_CR_FCC2_SBLOCK (0x11) -#define CPM_CR_FCC3_SBLOCK (0x12) -#define CPM_CR_MCC1_SBLOCK (0x1c) - -#define CPM_CR_SCC1_PAGE (0x00) -#define CPM_CR_SCC2_PAGE (0x01) -#define CPM_CR_SCC3_PAGE (0x02) -#define CPM_CR_SCC4_PAGE (0x03) -#define CPM_CR_SPI_PAGE (0x09) -#define CPM_CR_I2C_PAGE (0x0a) -#define CPM_CR_TIMER_PAGE (0x0a) -#define CPM_CR_RAND_PAGE (0x0a) -#define CPM_CR_FCC1_PAGE (0x04) -#define CPM_CR_FCC2_PAGE (0x05) -#define CPM_CR_FCC3_PAGE (0x06) -#define CPM_CR_MCC1_PAGE (0x07) -#define CPM_CR_MCC2_PAGE (0x08) - -/* Some opcodes (there are more...later) -*/ -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_INIT_RX ((ushort)0x0001) -#define CPM_CR_INIT_TX ((ushort)0x0002) -#define CPM_CR_HUNT_MODE ((ushort)0x0003) -#define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_RESTART_TX ((ushort)0x0006) -#define CPM_CR_SET_GADDR ((ushort)0x0008) - -#define mk_cr_cmd(PG, SBC, MCN, OP) \ - ((PG << 26) | (SBC << 21) | (MCN << 6) | OP) - -/* Dual Port RAM addresses. The first 16K is available for almost - * any CPM use, so we put the BDs there. The first 128 bytes are - * used for SMC1 and SMC2 parameter RAM, so we start allocating - * BDs above that. All of this must change when we start - * downloading RAM microcode. - */ -#define CPM_DATAONLY_BASE ((uint)128) -#define CPM_DP_NOSPACE ((uint)0x7FFFFFFF) -#define CPM_FCC_SPECIAL_BASE ((uint)0x0000B000) -#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE) - -/* The number of pages of host memory we allocate for CPM. This is - * done early in kernel initialization to get physically contiguous - * pages. - */ -#define NUM_CPM_HOST_PAGES 2 - -/* Export the base address of the communication processor registers - * and dual port ram. - */ -/*extern cpm8560_t *cpmp; Pointer to comm processor */ -uint m8560_cpm_dpalloc(uint size, uint align); -uint m8560_cpm_hostalloc(uint size, uint align); -void m8560_cpm_setbrg(uint brg, uint rate); -void m8560_cpm_fastbrg(uint brg, uint rate, int div16); -void m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel); - -/* Buffer descriptors used by many of the CPM protocols. -*/ -typedef struct cpm_buf_desc { - ushort cbd_sc; /* Status and Control */ - ushort cbd_datlen; /* Data length in buffer */ - uint cbd_bufaddr; /* Buffer address in host memory */ -} cbd_t; - -#define BD_SC_EMPTY ((ushort)0x8000) /* Receive is empty */ -#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ -#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor */ -#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ -#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame */ -#define BD_SC_CM ((ushort)0x0200) /* Continous mode */ -#define BD_SC_ID ((ushort)0x0100) /* Rec'd too many idles */ -#define BD_SC_P ((ushort)0x0100) /* xmt preamble */ -#define BD_SC_BR ((ushort)0x0020) /* Break received */ -#define BD_SC_FR ((ushort)0x0010) /* Framing error */ -#define BD_SC_PR ((ushort)0x0008) /* Parity error */ -#define BD_SC_OV ((ushort)0x0002) /* Overrun */ -#define BD_SC_CD ((ushort)0x0001) /* ?? */ - -/* Function code bits, usually generic to devices. -*/ -#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ -#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ -#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ -#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ -#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ - -/* Parameter RAM offsets from the base. -*/ -#define CPM_POST_WORD_ADDR 0x80FC /* steal a long at the end of SCC1 */ -#define PROFF_SCC1 ((uint)0x8000) -#define PROFF_SCC2 ((uint)0x8100) -#define PROFF_SCC3 ((uint)0x8200) -#define PROFF_SCC4 ((uint)0x8300) -#define PROFF_FCC1 ((uint)0x8400) -#define PROFF_FCC2 ((uint)0x8500) -#define PROFF_FCC3 ((uint)0x8600) -#define PROFF_MCC1 ((uint)0x8700) -#define PROFF_MCC2 ((uint)0x8800) -#define PROFF_SPI_BASE ((uint)0x89fc) -#define PROFF_TIMERS ((uint)0x8ae0) -#define PROFF_REVNUM ((uint)0x8af0) -#define PROFF_RAND ((uint)0x8af8) -#define PROFF_I2C_BASE ((uint)0x8afc) - -/* Baud rate generators. -*/ -#define CPM_BRG_RST ((uint)0x00020000) -#define CPM_BRG_EN ((uint)0x00010000) -#define CPM_BRG_EXTC_INT ((uint)0x00000000) -#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000) -#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000) -#define CPM_BRG_ATB ((uint)0x00002000) -#define CPM_BRG_CD_MASK ((uint)0x00001ffe) -#define CPM_BRG_DIV16 ((uint)0x00000001) - -/* SCCs. -*/ -#define SCC_GSMRH_IRP ((uint)0x00040000) -#define SCC_GSMRH_GDE ((uint)0x00010000) -#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) -#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) -#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) -#define SCC_GSMRH_REVD ((uint)0x00002000) -#define SCC_GSMRH_TRX ((uint)0x00001000) -#define SCC_GSMRH_TTX ((uint)0x00000800) -#define SCC_GSMRH_CDP ((uint)0x00000400) -#define SCC_GSMRH_CTSP ((uint)0x00000200) -#define SCC_GSMRH_CDS ((uint)0x00000100) -#define SCC_GSMRH_CTSS ((uint)0x00000080) -#define SCC_GSMRH_TFL ((uint)0x00000040) -#define SCC_GSMRH_RFW ((uint)0x00000020) -#define SCC_GSMRH_TXSY ((uint)0x00000010) -#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) -#define SCC_GSMRH_SYNL8 ((uint)0x00000008) -#define SCC_GSMRH_SYNL4 ((uint)0x00000004) -#define SCC_GSMRH_RTSM ((uint)0x00000002) -#define SCC_GSMRH_RSYN ((uint)0x00000001) - -#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ -#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) -#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) -#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) -#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) -#define SCC_GSMRL_TCI ((uint)0x10000000) -#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) -#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) -#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) -#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) -#define SCC_GSMRL_RINV ((uint)0x02000000) -#define SCC_GSMRL_TINV ((uint)0x01000000) -#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) -#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) -#define SCC_GSMRL_TPL_48 ((uint)0x00800000) -#define SCC_GSMRL_TPL_32 ((uint)0x00600000) -#define SCC_GSMRL_TPL_16 ((uint)0x00400000) -#define SCC_GSMRL_TPL_8 ((uint)0x00200000) -#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) -#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) -#define SCC_GSMRL_TPP_01 ((uint)0x00100000) -#define SCC_GSMRL_TPP_10 ((uint)0x00080000) -#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) -#define SCC_GSMRL_TEND ((uint)0x00040000) -#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) -#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) -#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) -#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) -#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) -#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) -#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) -#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) -#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) -#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) -#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) -#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) -#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) -#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) -#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ -#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) -#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) -#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) -#define SCC_GSMRL_ENR ((uint)0x00000020) -#define SCC_GSMRL_ENT ((uint)0x00000010) -#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) -#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) -#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) -#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) -#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) -#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) -#define SCC_GSMRL_MODE_UART ((uint)0x00000004) -#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) -#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) -#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) - -#define SCC_TODR_TOD ((ushort)0x8000) - -/* SCC Event and Mask register. -*/ -#define SCCM_TXE ((unsigned char)0x10) -#define SCCM_BSY ((unsigned char)0x04) -#define SCCM_TX ((unsigned char)0x02) -#define SCCM_RX ((unsigned char)0x01) - -typedef struct scc_param { - ushort scc_rbase; /* Rx Buffer descriptor base address */ - ushort scc_tbase; /* Tx Buffer descriptor base address */ - u_char scc_rfcr; /* Rx function code */ - u_char scc_tfcr; /* Tx function code */ - ushort scc_mrblr; /* Max receive buffer length */ - uint scc_rstate; /* Internal */ - uint scc_idp; /* Internal */ - ushort scc_rbptr; /* Internal */ - ushort scc_ibc; /* Internal */ - uint scc_rxtmp; /* Internal */ - uint scc_tstate; /* Internal */ - uint scc_tdp; /* Internal */ - ushort scc_tbptr; /* Internal */ - ushort scc_tbc; /* Internal */ - uint scc_txtmp; /* Internal */ - uint scc_rcrc; /* Internal */ - uint scc_tcrc; /* Internal */ -} sccp_t; - -/* CPM Ethernet through SCC1. - */ -typedef struct scc_enet { - sccp_t sen_genscc; - uint sen_cpres; /* Preset CRC */ - uint sen_cmask; /* Constant mask for CRC */ - uint sen_crcec; /* CRC Error counter */ - uint sen_alec; /* alignment error counter */ - uint sen_disfc; /* discard frame counter */ - ushort sen_pads; /* Tx short frame pad character */ - ushort sen_retlim; /* Retry limit threshold */ - ushort sen_retcnt; /* Retry limit counter */ - ushort sen_maxflr; /* maximum frame length register */ - ushort sen_minflr; /* minimum frame length register */ - ushort sen_maxd1; /* maximum DMA1 length */ - ushort sen_maxd2; /* maximum DMA2 length */ - ushort sen_maxd; /* Rx max DMA */ - ushort sen_dmacnt; /* Rx DMA counter */ - ushort sen_maxb; /* Max BD byte count */ - ushort sen_gaddr1; /* Group address filter */ - ushort sen_gaddr2; - ushort sen_gaddr3; - ushort sen_gaddr4; - uint sen_tbuf0data0; /* Save area 0 - current frame */ - uint sen_tbuf0data1; /* Save area 1 - current frame */ - uint sen_tbuf0rba; /* Internal */ - uint sen_tbuf0crc; /* Internal */ - ushort sen_tbuf0bcnt; /* Internal */ - ushort sen_paddrh; /* physical address (MSB) */ - ushort sen_paddrm; - ushort sen_paddrl; /* physical address (LSB) */ - ushort sen_pper; /* persistence */ - ushort sen_rfbdptr; /* Rx first BD pointer */ - ushort sen_tfbdptr; /* Tx first BD pointer */ - ushort sen_tlbdptr; /* Tx last BD pointer */ - uint sen_tbuf1data0; /* Save area 0 - current frame */ - uint sen_tbuf1data1; /* Save area 1 - current frame */ - uint sen_tbuf1rba; /* Internal */ - uint sen_tbuf1crc; /* Internal */ - ushort sen_tbuf1bcnt; /* Internal */ - ushort sen_txlen; /* Tx Frame length counter */ - ushort sen_iaddr1; /* Individual address filter */ - ushort sen_iaddr2; - ushort sen_iaddr3; - ushort sen_iaddr4; - ushort sen_boffcnt; /* Backoff counter */ - - /* NOTE: Some versions of the manual have the following items - * incorrectly documented. Below is the proper order. - */ - ushort sen_taddrh; /* temp address (MSB) */ - ushort sen_taddrm; - ushort sen_taddrl; /* temp address (LSB) */ -} scc_enet_t; - - -/* SCC Event register as used by Ethernet. -*/ -#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ -#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* SCC Mode Register (PSMR) as used by Ethernet. -*/ -#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */ -#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */ -#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */ -#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */ -#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ -#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */ -#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ -#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */ -#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */ -#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */ -#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */ -#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ -#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ - -/* Buffer descriptor control/status used by Ethernet receive. - * Common to SCC and FCC. - */ -#define BD_ENET_RX_EMPTY ((ushort)0x8000) -#define BD_ENET_RX_WRAP ((ushort)0x2000) -#define BD_ENET_RX_INTR ((ushort)0x1000) -#define BD_ENET_RX_LAST ((ushort)0x0800) -#define BD_ENET_RX_FIRST ((ushort)0x0400) -#define BD_ENET_RX_MISS ((ushort)0x0100) -#define BD_ENET_RX_BC ((ushort)0x0080) /* FCC Only */ -#define BD_ENET_RX_MC ((ushort)0x0040) /* FCC Only */ -#define BD_ENET_RX_LG ((ushort)0x0020) -#define BD_ENET_RX_NO ((ushort)0x0010) -#define BD_ENET_RX_SH ((ushort)0x0008) -#define BD_ENET_RX_CR ((ushort)0x0004) -#define BD_ENET_RX_OV ((ushort)0x0002) -#define BD_ENET_RX_CL ((ushort)0x0001) -#define BD_ENET_RX_STATS ((ushort)0x01ff) /* All status bits */ - -/* Buffer descriptor control/status used by Ethernet transmit. - * Common to SCC and FCC. - */ -#define BD_ENET_TX_READY ((ushort)0x8000) -#define BD_ENET_TX_PAD ((ushort)0x4000) -#define BD_ENET_TX_WRAP ((ushort)0x2000) -#define BD_ENET_TX_INTR ((ushort)0x1000) -#define BD_ENET_TX_LAST ((ushort)0x0800) -#define BD_ENET_TX_TC ((ushort)0x0400) -#define BD_ENET_TX_DEF ((ushort)0x0200) -#define BD_ENET_TX_HB ((ushort)0x0100) -#define BD_ENET_TX_LC ((ushort)0x0080) -#define BD_ENET_TX_RL ((ushort)0x0040) -#define BD_ENET_TX_RCMASK ((ushort)0x003c) -#define BD_ENET_TX_UN ((ushort)0x0002) -#define BD_ENET_TX_CSL ((ushort)0x0001) -#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ - -/* SCC as UART -*/ -typedef struct scc_uart { - sccp_t scc_genscc; - uint scc_res1; /* Reserved */ - uint scc_res2; /* Reserved */ - ushort scc_maxidl; /* Maximum idle chars */ - ushort scc_idlc; /* temp idle counter */ - ushort scc_brkcr; /* Break count register */ - ushort scc_parec; /* receive parity error counter */ - ushort scc_frmec; /* receive framing error counter */ - ushort scc_nosec; /* receive noise counter */ - ushort scc_brkec; /* receive break condition counter */ - ushort scc_brkln; /* last received break length */ - ushort scc_uaddr1; /* UART address character 1 */ - ushort scc_uaddr2; /* UART address character 2 */ - ushort scc_rtemp; /* Temp storage */ - ushort scc_toseq; /* Transmit out of sequence char */ - ushort scc_char1; /* control character 1 */ - ushort scc_char2; /* control character 2 */ - ushort scc_char3; /* control character 3 */ - ushort scc_char4; /* control character 4 */ - ushort scc_char5; /* control character 5 */ - ushort scc_char6; /* control character 6 */ - ushort scc_char7; /* control character 7 */ - ushort scc_char8; /* control character 8 */ - ushort scc_rccm; /* receive control character mask */ - ushort scc_rccr; /* receive control character register */ - ushort scc_rlbc; /* receive last break character */ -} scc_uart_t; - -/* SCC Event and Mask registers when it is used as a UART. -*/ -#define UART_SCCM_GLR ((ushort)0x1000) -#define UART_SCCM_GLT ((ushort)0x0800) -#define UART_SCCM_AB ((ushort)0x0200) -#define UART_SCCM_IDL ((ushort)0x0100) -#define UART_SCCM_GRA ((ushort)0x0080) -#define UART_SCCM_BRKE ((ushort)0x0040) -#define UART_SCCM_BRKS ((ushort)0x0020) -#define UART_SCCM_CCR ((ushort)0x0008) -#define UART_SCCM_BSY ((ushort)0x0004) -#define UART_SCCM_TX ((ushort)0x0002) -#define UART_SCCM_RX ((ushort)0x0001) - -/* The SCC PSMR when used as a UART. -*/ -#define SCU_PSMR_FLC ((ushort)0x8000) -#define SCU_PSMR_SL ((ushort)0x4000) -#define SCU_PSMR_CL ((ushort)0x3000) -#define SCU_PSMR_UM ((ushort)0x0c00) -#define SCU_PSMR_FRZ ((ushort)0x0200) -#define SCU_PSMR_RZS ((ushort)0x0100) -#define SCU_PSMR_SYN ((ushort)0x0080) -#define SCU_PSMR_DRT ((ushort)0x0040) -#define SCU_PSMR_PEN ((ushort)0x0010) -#define SCU_PSMR_RPM ((ushort)0x000c) -#define SCU_PSMR_REVP ((ushort)0x0008) -#define SCU_PSMR_TPM ((ushort)0x0003) -#define SCU_PSMR_TEVP ((ushort)0x0003) - -/* CPM Transparent mode SCC. - */ -typedef struct scc_trans { - sccp_t st_genscc; - uint st_cpres; /* Preset CRC */ - uint st_cmask; /* Constant mask for CRC */ -} scc_trans_t; - -#define BD_SCC_TX_LAST ((ushort)0x0800) - -/* How about some FCCs..... -*/ -#define FCC_GFMR_DIAG_NORM ((uint)0x00000000) -#define FCC_GFMR_DIAG_LE ((uint)0x40000000) -#define FCC_GFMR_DIAG_AE ((uint)0x80000000) -#define FCC_GFMR_DIAG_ALE ((uint)0xc0000000) -#define FCC_GFMR_TCI ((uint)0x20000000) -#define FCC_GFMR_TRX ((uint)0x10000000) -#define FCC_GFMR_TTX ((uint)0x08000000) -#define FCC_GFMR_TTX ((uint)0x08000000) -#define FCC_GFMR_CDP ((uint)0x04000000) -#define FCC_GFMR_CTSP ((uint)0x02000000) -#define FCC_GFMR_CDS ((uint)0x01000000) -#define FCC_GFMR_CTSS ((uint)0x00800000) -#define FCC_GFMR_SYNL_NONE ((uint)0x00000000) -#define FCC_GFMR_SYNL_AUTO ((uint)0x00004000) -#define FCC_GFMR_SYNL_8 ((uint)0x00008000) -#define FCC_GFMR_SYNL_16 ((uint)0x0000c000) -#define FCC_GFMR_RTSM ((uint)0x00002000) -#define FCC_GFMR_RENC_NRZ ((uint)0x00000000) -#define FCC_GFMR_RENC_NRZI ((uint)0x00000800) -#define FCC_GFMR_REVD ((uint)0x00000400) -#define FCC_GFMR_TENC_NRZ ((uint)0x00000000) -#define FCC_GFMR_TENC_NRZI ((uint)0x00000100) -#define FCC_GFMR_TCRC_16 ((uint)0x00000000) -#define FCC_GFMR_TCRC_32 ((uint)0x00000080) -#define FCC_GFMR_ENR ((uint)0x00000020) -#define FCC_GFMR_ENT ((uint)0x00000010) -#define FCC_GFMR_MODE_ENET ((uint)0x0000000c) -#define FCC_GFMR_MODE_ATM ((uint)0x0000000a) -#define FCC_GFMR_MODE_HDLC ((uint)0x00000000) - -/* Generic FCC parameter ram. -*/ -typedef struct fcc_param { - ushort fcc_riptr; /* Rx Internal temp pointer */ - ushort fcc_tiptr; /* Tx Internal temp pointer */ - ushort fcc_res1; - ushort fcc_mrblr; /* Max receive buffer length, mod 32 bytes */ - uint fcc_rstate; /* Upper byte is Func code, must be set */ - uint fcc_rbase; /* Receive BD base */ - ushort fcc_rbdstat; /* RxBD status */ - ushort fcc_rbdlen; /* RxBD down counter */ - uint fcc_rdptr; /* RxBD internal data pointer */ - uint fcc_tstate; /* Upper byte is Func code, must be set */ - uint fcc_tbase; /* Transmit BD base */ - ushort fcc_tbdstat; /* TxBD status */ - ushort fcc_tbdlen; /* TxBD down counter */ - uint fcc_tdptr; /* TxBD internal data pointer */ - uint fcc_rbptr; /* Rx BD Internal buf pointer */ - uint fcc_tbptr; /* Tx BD Internal buf pointer */ - uint fcc_rcrc; /* Rx temp CRC */ - uint fcc_res2; - uint fcc_tcrc; /* Tx temp CRC */ -} fccp_t; - - -/* Ethernet controller through FCC. -*/ -typedef struct fcc_enet { - fccp_t fen_genfcc; - uint fen_statbuf; /* Internal status buffer */ - uint fen_camptr; /* CAM address */ - uint fen_cmask; /* Constant mask for CRC */ - uint fen_cpres; /* Preset CRC */ - uint fen_crcec; /* CRC Error counter */ - uint fen_alec; /* alignment error counter */ - uint fen_disfc; /* discard frame counter */ - ushort fen_retlim; /* Retry limit */ - ushort fen_retcnt; /* Retry counter */ - ushort fen_pper; /* Persistence */ - ushort fen_boffcnt; /* backoff counter */ - uint fen_gaddrh; /* Group address filter, high 32-bits */ - uint fen_gaddrl; /* Group address filter, low 32-bits */ - ushort fen_tfcstat; /* out of sequence TxBD */ - ushort fen_tfclen; - uint fen_tfcptr; - ushort fen_mflr; /* Maximum frame length (1518) */ - ushort fen_paddrh; /* MAC address */ - ushort fen_paddrm; - ushort fen_paddrl; - ushort fen_ibdcount; /* Internal BD counter */ - ushort fen_ibdstart; /* Internal BD start pointer */ - ushort fen_ibdend; /* Internal BD end pointer */ - ushort fen_txlen; /* Internal Tx frame length counter */ - uint fen_ibdbase[8]; /* Internal use */ - uint fen_iaddrh; /* Individual address filter */ - uint fen_iaddrl; - ushort fen_minflr; /* Minimum frame length (64) */ - ushort fen_taddrh; /* Filter transfer MAC address */ - ushort fen_taddrm; - ushort fen_taddrl; - ushort fen_padptr; /* Pointer to pad byte buffer */ - ushort fen_cftype; /* control frame type */ - ushort fen_cfrange; /* control frame range */ - ushort fen_maxb; /* maximum BD count */ - ushort fen_maxd1; /* Max DMA1 length (1520) */ - ushort fen_maxd2; /* Max DMA2 length (1520) */ - ushort fen_maxd; /* internal max DMA count */ - ushort fen_dmacnt; /* internal DMA counter */ - uint fen_octc; /* Total octect counter */ - uint fen_colc; /* Total collision counter */ - uint fen_broc; /* Total broadcast packet counter */ - uint fen_mulc; /* Total multicast packet count */ - uint fen_uspc; /* Total packets < 64 bytes */ - uint fen_frgc; /* Total packets < 64 bytes with errors */ - uint fen_ospc; /* Total packets > 1518 */ - uint fen_jbrc; /* Total packets > 1518 with errors */ - uint fen_p64c; /* Total packets == 64 bytes */ - uint fen_p65c; /* Total packets 64 < bytes <= 127 */ - uint fen_p128c; /* Total packets 127 < bytes <= 255 */ - uint fen_p256c; /* Total packets 256 < bytes <= 511 */ - uint fen_p512c; /* Total packets 512 < bytes <= 1023 */ - uint fen_p1024c; /* Total packets 1024 < bytes <= 1518 */ - uint fen_cambuf; /* Internal CAM buffer poiner */ - ushort fen_rfthr; /* Received frames threshold */ - ushort fen_rfcnt; /* Received frames count */ -} fcc_enet_t; - -/* FCC Event/Mask register as used by Ethernet. -*/ -#define FCC_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define FCC_ENET_RXC ((ushort)0x0040) /* Control Frame Received */ -#define FCC_ENET_TXC ((ushort)0x0020) /* Out of seq. Tx sent */ -#define FCC_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define FCC_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define FCC_ENET_BSY ((ushort)0x0004) /* Busy. Rx Frame dropped */ -#define FCC_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define FCC_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* FCC Mode Register (FPSMR) as used by Ethernet. -*/ -#define FCC_PSMR_HBC ((uint)0x80000000) /* Enable heartbeat */ -#define FCC_PSMR_FC ((uint)0x40000000) /* Force Collision */ -#define FCC_PSMR_SBT ((uint)0x20000000) /* Stop backoff timer */ -#define FCC_PSMR_LPB ((uint)0x10000000) /* Local protect. 1 = FDX */ -#define FCC_PSMR_LCW ((uint)0x08000000) /* Late collision select */ -#define FCC_PSMR_FDE ((uint)0x04000000) /* Full Duplex Enable */ -#define FCC_PSMR_MON ((uint)0x02000000) /* RMON Enable */ -#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */ -#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */ -#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */ -#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */ -#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */ -#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */ - -/* IIC parameter RAM. -*/ -typedef struct iic { - ushort iic_rbase; /* Rx Buffer descriptor base address */ - ushort iic_tbase; /* Tx Buffer descriptor base address */ - u_char iic_rfcr; /* Rx function code */ - u_char iic_tfcr; /* Tx function code */ - ushort iic_mrblr; /* Max receive buffer length */ - uint iic_rstate; /* Internal */ - uint iic_rdp; /* Internal */ - ushort iic_rbptr; /* Internal */ - ushort iic_rbc; /* Internal */ - uint iic_rxtmp; /* Internal */ - uint iic_tstate; /* Internal */ - uint iic_tdp; /* Internal */ - ushort iic_tbptr; /* Internal */ - ushort iic_tbc; /* Internal */ - uint iic_txtmp; /* Internal */ -} iic_t; - -/* SPI parameter RAM. -*/ -typedef struct spi { - ushort spi_rbase; /* Rx Buffer descriptor base address */ - ushort spi_tbase; /* Tx Buffer descriptor base address */ - u_char spi_rfcr; /* Rx function code */ - u_char spi_tfcr; /* Tx function code */ - ushort spi_mrblr; /* Max receive buffer length */ - uint spi_rstate; /* Internal */ - uint spi_rdp; /* Internal */ - ushort spi_rbptr; /* Internal */ - ushort spi_rbc; /* Internal */ - uint spi_rxtmp; /* Internal */ - uint spi_tstate; /* Internal */ - uint spi_tdp; /* Internal */ - ushort spi_tbptr; /* Internal */ - ushort spi_tbc; /* Internal */ - uint spi_txtmp; /* Internal */ - uint spi_res; /* Tx temp. */ - uint spi_res1[4]; /* SDMA temp. */ -} spi_t; - -/* SPI Mode register. -*/ -#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */ -#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */ -#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */ -#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */ -#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */ -#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */ -#define SPMODE_EN ((ushort)0x0100) /* Enable */ -#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */ -#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */ - -#define SPMODE_LEN(x) ((((x)-1)&0xF)<<4) -#define SPMODE_PM(x) ((x) &0xF) - -#define SPI_EB ((u_char)0x10) /* big endian byte order */ - -#define BD_IIC_START ((ushort)0x0400) - -/*----------------------------------------------------------------------- - * CMXFCR - CMX FCC Clock Route Register 15-12 - */ -#define CMXFCR_FC1 0x40000000 /* FCC1 connection */ -#define CMXFCR_RF1CS_MSK 0x38000000 /* Receive FCC1 Clock Source Mask */ -#define CMXFCR_TF1CS_MSK 0x07000000 /* Transmit FCC1 Clock Source Mask */ -#define CMXFCR_FC2 0x00400000 /* FCC2 connection */ -#define CMXFCR_RF2CS_MSK 0x00380000 /* Receive FCC2 Clock Source Mask */ -#define CMXFCR_TF2CS_MSK 0x00070000 /* Transmit FCC2 Clock Source Mask */ -#define CMXFCR_FC3 0x00004000 /* FCC3 connection */ -#define CMXFCR_RF3CS_MSK 0x00003800 /* Receive FCC3 Clock Source Mask */ -#define CMXFCR_TF3CS_MSK 0x00000700 /* Transmit FCC3 Clock Source Mask */ - -#define CMXFCR_RF1CS_BRG5 0x00000000 /* Receive FCC1 Clock Source is BRG5 */ -#define CMXFCR_RF1CS_BRG6 0x08000000 /* Receive FCC1 Clock Source is BRG6 */ -#define CMXFCR_RF1CS_BRG7 0x10000000 /* Receive FCC1 Clock Source is BRG7 */ -#define CMXFCR_RF1CS_BRG8 0x18000000 /* Receive FCC1 Clock Source is BRG8 */ -#define CMXFCR_RF1CS_CLK9 0x20000000 /* Receive FCC1 Clock Source is CLK9 */ -#define CMXFCR_RF1CS_CLK10 0x28000000 /* Receive FCC1 Clock Source is CLK10 */ -#define CMXFCR_RF1CS_CLK11 0x30000000 /* Receive FCC1 Clock Source is CLK11 */ -#define CMXFCR_RF1CS_CLK12 0x38000000 /* Receive FCC1 Clock Source is CLK12 */ - -#define CMXFCR_TF1CS_BRG5 0x00000000 /* Transmit FCC1 Clock Source is BRG5 */ -#define CMXFCR_TF1CS_BRG6 0x01000000 /* Transmit FCC1 Clock Source is BRG6 */ -#define CMXFCR_TF1CS_BRG7 0x02000000 /* Transmit FCC1 Clock Source is BRG7 */ -#define CMXFCR_TF1CS_BRG8 0x03000000 /* Transmit FCC1 Clock Source is BRG8 */ -#define CMXFCR_TF1CS_CLK9 0x04000000 /* Transmit FCC1 Clock Source is CLK9 */ -#define CMXFCR_TF1CS_CLK10 0x05000000 /* Transmit FCC1 Clock Source is CLK10 */ -#define CMXFCR_TF1CS_CLK11 0x06000000 /* Transmit FCC1 Clock Source is CLK11 */ -#define CMXFCR_TF1CS_CLK12 0x07000000 /* Transmit FCC1 Clock Source is CLK12 */ - -#define CMXFCR_RF2CS_BRG5 0x00000000 /* Receive FCC2 Clock Source is BRG5 */ -#define CMXFCR_RF2CS_BRG6 0x00080000 /* Receive FCC2 Clock Source is BRG6 */ -#define CMXFCR_RF2CS_BRG7 0x00100000 /* Receive FCC2 Clock Source is BRG7 */ -#define CMXFCR_RF2CS_BRG8 0x00180000 /* Receive FCC2 Clock Source is BRG8 */ -#define CMXFCR_RF2CS_CLK13 0x00200000 /* Receive FCC2 Clock Source is CLK13 */ -#define CMXFCR_RF2CS_CLK14 0x00280000 /* Receive FCC2 Clock Source is CLK14 */ -#define CMXFCR_RF2CS_CLK15 0x00300000 /* Receive FCC2 Clock Source is CLK15 */ -#define CMXFCR_RF2CS_CLK16 0x00380000 /* Receive FCC2 Clock Source is CLK16 */ - -#define CMXFCR_TF2CS_BRG5 0x00000000 /* Transmit FCC2 Clock Source is BRG5 */ -#define CMXFCR_TF2CS_BRG6 0x00010000 /* Transmit FCC2 Clock Source is BRG6 */ -#define CMXFCR_TF2CS_BRG7 0x00020000 /* Transmit FCC2 Clock Source is BRG7 */ -#define CMXFCR_TF2CS_BRG8 0x00030000 /* Transmit FCC2 Clock Source is BRG8 */ -#define CMXFCR_TF2CS_CLK13 0x00040000 /* Transmit FCC2 Clock Source is CLK13 */ -#define CMXFCR_TF2CS_CLK14 0x00050000 /* Transmit FCC2 Clock Source is CLK14 */ -#define CMXFCR_TF2CS_CLK15 0x00060000 /* Transmit FCC2 Clock Source is CLK15 */ -#define CMXFCR_TF2CS_CLK16 0x00070000 /* Transmit FCC2 Clock Source is CLK16 */ - -#define CMXFCR_RF3CS_BRG5 0x00000000 /* Receive FCC3 Clock Source is BRG5 */ -#define CMXFCR_RF3CS_BRG6 0x00000800 /* Receive FCC3 Clock Source is BRG6 */ -#define CMXFCR_RF3CS_BRG7 0x00001000 /* Receive FCC3 Clock Source is BRG7 */ -#define CMXFCR_RF3CS_BRG8 0x00001800 /* Receive FCC3 Clock Source is BRG8 */ -#define CMXFCR_RF3CS_CLK13 0x00002000 /* Receive FCC3 Clock Source is CLK13 */ -#define CMXFCR_RF3CS_CLK14 0x00002800 /* Receive FCC3 Clock Source is CLK14 */ -#define CMXFCR_RF3CS_CLK15 0x00003000 /* Receive FCC3 Clock Source is CLK15 */ -#define CMXFCR_RF3CS_CLK16 0x00003800 /* Receive FCC3 Clock Source is CLK16 */ - -#define CMXFCR_TF3CS_BRG5 0x00000000 /* Transmit FCC3 Clock Source is BRG5 */ -#define CMXFCR_TF3CS_BRG6 0x00000100 /* Transmit FCC3 Clock Source is BRG6 */ -#define CMXFCR_TF3CS_BRG7 0x00000200 /* Transmit FCC3 Clock Source is BRG7 */ -#define CMXFCR_TF3CS_BRG8 0x00000300 /* Transmit FCC3 Clock Source is BRG8 */ -#define CMXFCR_TF3CS_CLK13 0x00000400 /* Transmit FCC3 Clock Source is CLK13 */ -#define CMXFCR_TF3CS_CLK14 0x00000500 /* Transmit FCC3 Clock Source is CLK14 */ -#define CMXFCR_TF3CS_CLK15 0x00000600 /* Transmit FCC3 Clock Source is CLK15 */ -#define CMXFCR_TF3CS_CLK16 0x00000700 /* Transmit FCC3 Clock Source is CLK16 */ - -/*----------------------------------------------------------------------- - * CMXSCR - CMX SCC Clock Route Register 15-14 - */ -#define CMXSCR_GR1 0x80000000 /* Grant Support of SCC1 */ -#define CMXSCR_SC1 0x40000000 /* SCC1 connection */ -#define CMXSCR_RS1CS_MSK 0x38000000 /* Receive SCC1 Clock Source Mask */ -#define CMXSCR_TS1CS_MSK 0x07000000 /* Transmit SCC1 Clock Source Mask */ -#define CMXSCR_GR2 0x00800000 /* Grant Support of SCC2 */ -#define CMXSCR_SC2 0x00400000 /* SCC2 connection */ -#define CMXSCR_RS2CS_MSK 0x00380000 /* Receive SCC2 Clock Source Mask */ -#define CMXSCR_TS2CS_MSK 0x00070000 /* Transmit SCC2 Clock Source Mask */ -#define CMXSCR_GR3 0x00008000 /* Grant Support of SCC3 */ -#define CMXSCR_SC3 0x00004000 /* SCC3 connection */ -#define CMXSCR_RS3CS_MSK 0x00003800 /* Receive SCC3 Clock Source Mask */ -#define CMXSCR_TS3CS_MSK 0x00000700 /* Transmit SCC3 Clock Source Mask */ -#define CMXSCR_GR4 0x00000080 /* Grant Support of SCC4 */ -#define CMXSCR_SC4 0x00000040 /* SCC4 connection */ -#define CMXSCR_RS4CS_MSK 0x00000038 /* Receive SCC4 Clock Source Mask */ -#define CMXSCR_TS4CS_MSK 0x00000007 /* Transmit SCC4 Clock Source Mask */ - -#define CMXSCR_RS1CS_BRG1 0x00000000 /* SCC1 Rx Clock Source is BRG1 */ -#define CMXSCR_RS1CS_BRG2 0x08000000 /* SCC1 Rx Clock Source is BRG2 */ -#define CMXSCR_RS1CS_BRG3 0x10000000 /* SCC1 Rx Clock Source is BRG3 */ -#define CMXSCR_RS1CS_BRG4 0x18000000 /* SCC1 Rx Clock Source is BRG4 */ -#define CMXSCR_RS1CS_CLK11 0x20000000 /* SCC1 Rx Clock Source is CLK11 */ -#define CMXSCR_RS1CS_CLK12 0x28000000 /* SCC1 Rx Clock Source is CLK12 */ -#define CMXSCR_RS1CS_CLK3 0x30000000 /* SCC1 Rx Clock Source is CLK3 */ -#define CMXSCR_RS1CS_CLK4 0x38000000 /* SCC1 Rx Clock Source is CLK4 */ - -#define CMXSCR_TS1CS_BRG1 0x00000000 /* SCC1 Tx Clock Source is BRG1 */ -#define CMXSCR_TS1CS_BRG2 0x01000000 /* SCC1 Tx Clock Source is BRG2 */ -#define CMXSCR_TS1CS_BRG3 0x02000000 /* SCC1 Tx Clock Source is BRG3 */ -#define CMXSCR_TS1CS_BRG4 0x03000000 /* SCC1 Tx Clock Source is BRG4 */ -#define CMXSCR_TS1CS_CLK11 0x04000000 /* SCC1 Tx Clock Source is CLK11 */ -#define CMXSCR_TS1CS_CLK12 0x05000000 /* SCC1 Tx Clock Source is CLK12 */ -#define CMXSCR_TS1CS_CLK3 0x06000000 /* SCC1 Tx Clock Source is CLK3 */ -#define CMXSCR_TS1CS_CLK4 0x07000000 /* SCC1 Tx Clock Source is CLK4 */ - -#define CMXSCR_RS2CS_BRG1 0x00000000 /* SCC2 Rx Clock Source is BRG1 */ -#define CMXSCR_RS2CS_BRG2 0x00080000 /* SCC2 Rx Clock Source is BRG2 */ -#define CMXSCR_RS2CS_BRG3 0x00100000 /* SCC2 Rx Clock Source is BRG3 */ -#define CMXSCR_RS2CS_BRG4 0x00180000 /* SCC2 Rx Clock Source is BRG4 */ -#define CMXSCR_RS2CS_CLK11 0x00200000 /* SCC2 Rx Clock Source is CLK11 */ -#define CMXSCR_RS2CS_CLK12 0x00280000 /* SCC2 Rx Clock Source is CLK12 */ -#define CMXSCR_RS2CS_CLK3 0x00300000 /* SCC2 Rx Clock Source is CLK3 */ -#define CMXSCR_RS2CS_CLK4 0x00380000 /* SCC2 Rx Clock Source is CLK4 */ - -#define CMXSCR_TS2CS_BRG1 0x00000000 /* SCC2 Tx Clock Source is BRG1 */ -#define CMXSCR_TS2CS_BRG2 0x00010000 /* SCC2 Tx Clock Source is BRG2 */ -#define CMXSCR_TS2CS_BRG3 0x00020000 /* SCC2 Tx Clock Source is BRG3 */ -#define CMXSCR_TS2CS_BRG4 0x00030000 /* SCC2 Tx Clock Source is BRG4 */ -#define CMXSCR_TS2CS_CLK11 0x00040000 /* SCC2 Tx Clock Source is CLK11 */ -#define CMXSCR_TS2CS_CLK12 0x00050000 /* SCC2 Tx Clock Source is CLK12 */ -#define CMXSCR_TS2CS_CLK3 0x00060000 /* SCC2 Tx Clock Source is CLK3 */ -#define CMXSCR_TS2CS_CLK4 0x00070000 /* SCC2 Tx Clock Source is CLK4 */ - -#define CMXSCR_RS3CS_BRG1 0x00000000 /* SCC3 Rx Clock Source is BRG1 */ -#define CMXSCR_RS3CS_BRG2 0x00000800 /* SCC3 Rx Clock Source is BRG2 */ -#define CMXSCR_RS3CS_BRG3 0x00001000 /* SCC3 Rx Clock Source is BRG3 */ -#define CMXSCR_RS3CS_BRG4 0x00001800 /* SCC3 Rx Clock Source is BRG4 */ -#define CMXSCR_RS3CS_CLK5 0x00002000 /* SCC3 Rx Clock Source is CLK5 */ -#define CMXSCR_RS3CS_CLK6 0x00002800 /* SCC3 Rx Clock Source is CLK6 */ -#define CMXSCR_RS3CS_CLK7 0x00003000 /* SCC3 Rx Clock Source is CLK7 */ -#define CMXSCR_RS3CS_CLK8 0x00003800 /* SCC3 Rx Clock Source is CLK8 */ - -#define CMXSCR_TS3CS_BRG1 0x00000000 /* SCC3 Tx Clock Source is BRG1 */ -#define CMXSCR_TS3CS_BRG2 0x00000100 /* SCC3 Tx Clock Source is BRG2 */ -#define CMXSCR_TS3CS_BRG3 0x00000200 /* SCC3 Tx Clock Source is BRG3 */ -#define CMXSCR_TS3CS_BRG4 0x00000300 /* SCC3 Tx Clock Source is BRG4 */ -#define CMXSCR_TS3CS_CLK5 0x00000400 /* SCC3 Tx Clock Source is CLK5 */ -#define CMXSCR_TS3CS_CLK6 0x00000500 /* SCC3 Tx Clock Source is CLK6 */ -#define CMXSCR_TS3CS_CLK7 0x00000600 /* SCC3 Tx Clock Source is CLK7 */ -#define CMXSCR_TS3CS_CLK8 0x00000700 /* SCC3 Tx Clock Source is CLK8 */ - -#define CMXSCR_RS4CS_BRG1 0x00000000 /* SCC4 Rx Clock Source is BRG1 */ -#define CMXSCR_RS4CS_BRG2 0x00000008 /* SCC4 Rx Clock Source is BRG2 */ -#define CMXSCR_RS4CS_BRG3 0x00000010 /* SCC4 Rx Clock Source is BRG3 */ -#define CMXSCR_RS4CS_BRG4 0x00000018 /* SCC4 Rx Clock Source is BRG4 */ -#define CMXSCR_RS4CS_CLK5 0x00000020 /* SCC4 Rx Clock Source is CLK5 */ -#define CMXSCR_RS4CS_CLK6 0x00000028 /* SCC4 Rx Clock Source is CLK6 */ -#define CMXSCR_RS4CS_CLK7 0x00000030 /* SCC4 Rx Clock Source is CLK7 */ -#define CMXSCR_RS4CS_CLK8 0x00000038 /* SCC4 Rx Clock Source is CLK8 */ - -#define CMXSCR_TS4CS_BRG1 0x00000000 /* SCC4 Tx Clock Source is BRG1 */ -#define CMXSCR_TS4CS_BRG2 0x00000001 /* SCC4 Tx Clock Source is BRG2 */ -#define CMXSCR_TS4CS_BRG3 0x00000002 /* SCC4 Tx Clock Source is BRG3 */ -#define CMXSCR_TS4CS_BRG4 0x00000003 /* SCC4 Tx Clock Source is BRG4 */ -#define CMXSCR_TS4CS_CLK5 0x00000004 /* SCC4 Tx Clock Source is CLK5 */ -#define CMXSCR_TS4CS_CLK6 0x00000005 /* SCC4 Tx Clock Source is CLK6 */ -#define CMXSCR_TS4CS_CLK7 0x00000006 /* SCC4 Tx Clock Source is CLK7 */ -#define CMXSCR_TS4CS_CLK8 0x00000007 /* SCC4 Tx Clock Source is CLK8 */ - -#endif /* __CPM_85XX__ */ diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 2975255..770adcd 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -20,13 +20,6 @@ struct arch_global_data { #if defined(CONFIG_MPC8xx) unsigned long brg_clk; #endif -#if defined(CONFIG_CPM2) - /* There are many clocks on the MPC8260 - see page 9-5 */ - unsigned long vco_out; - unsigned long cpm_clk; - unsigned long scc_clk; - unsigned long brg_clk; -#endif /* TODO: sjg@chromium.org: Should these be unslgned long? */ #if defined(CONFIG_MPC83xx) #ifdef CONFIG_CLK_MPC83XX @@ -88,10 +81,6 @@ struct arch_global_data { unsigned long arbiter_event_attributes; unsigned long arbiter_event_address; #endif -#if defined(CONFIG_CPM2) - unsigned int dp_alloc_base; - unsigned int dp_alloc_top; -#endif #ifdef CONFIG_SYS_FPGA_COUNT unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; #endif diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 770705a..b8bc584 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -921,330 +921,6 @@ typedef struct ccsr_pic { u8 res150[130892]; } ccsr_pic_t; -/* CPM Block */ -#ifndef CONFIG_CPM2 -typedef struct ccsr_cpm { - u8 res[262144]; -} ccsr_cpm_t; -#else -/* - * DPARM - * General SIU - */ -typedef struct ccsr_cpm_siu { - u8 res1[80]; - u32 smaer; - u32 smser; - u32 smevr; - u8 res2[4]; - u32 lmaer; - u32 lmser; - u32 lmevr; - u8 res3[2964]; -} ccsr_cpm_siu_t; - -/* IRQ Controller */ -typedef struct ccsr_cpm_intctl { - u16 sicr; - u8 res1[2]; - u32 sivec; - u32 sipnrh; - u32 sipnrl; - u32 siprr; - u32 scprrh; - u32 scprrl; - u32 simrh; - u32 simrl; - u32 siexr; - u8 res2[88]; - u32 sccr; - u8 res3[124]; -} ccsr_cpm_intctl_t; - -/* input/output port */ -typedef struct ccsr_cpm_iop { - u32 pdira; - u32 ppara; - u32 psora; - u32 podra; - u32 pdata; - u8 res1[12]; - u32 pdirb; - u32 pparb; - u32 psorb; - u32 podrb; - u32 pdatb; - u8 res2[12]; - u32 pdirc; - u32 pparc; - u32 psorc; - u32 podrc; - u32 pdatc; - u8 res3[12]; - u32 pdird; - u32 ppard; - u32 psord; - u32 podrd; - u32 pdatd; - u8 res4[12]; -} ccsr_cpm_iop_t; - -/* CPM timers */ -typedef struct ccsr_cpm_timer { - u8 tgcr1; - u8 res1[3]; - u8 tgcr2; - u8 res2[11]; - u16 tmr1; - u16 tmr2; - u16 trr1; - u16 trr2; - u16 tcr1; - u16 tcr2; - u16 tcn1; - u16 tcn2; - u16 tmr3; - u16 tmr4; - u16 trr3; - u16 trr4; - u16 tcr3; - u16 tcr4; - u16 tcn3; - u16 tcn4; - u16 ter1; - u16 ter2; - u16 ter3; - u16 ter4; - u8 res3[608]; -} ccsr_cpm_timer_t; - -/* SDMA */ -typedef struct ccsr_cpm_sdma { - u8 sdsr; - u8 res1[3]; - u8 sdmr; - u8 res2[739]; -} ccsr_cpm_sdma_t; - -/* FCC1 */ -typedef struct ccsr_cpm_fcc1 { - u32 gfmr; - u32 fpsmr; - u16 ftodr; - u8 res1[2]; - u16 fdsr; - u8 res2[2]; - u16 fcce; - u8 res3[2]; - u16 fccm; - u8 res4[2]; - u8 fccs; - u8 res5[3]; - u8 ftirr_phy[4]; -} ccsr_cpm_fcc1_t; - -/* FCC2 */ -typedef struct ccsr_cpm_fcc2 { - u32 gfmr; - u32 fpsmr; - u16 ftodr; - u8 res1[2]; - u16 fdsr; - u8 res2[2]; - u16 fcce; - u8 res3[2]; - u16 fccm; - u8 res4[2]; - u8 fccs; - u8 res5[3]; - u8 ftirr_phy[4]; -} ccsr_cpm_fcc2_t; - -/* FCC3 */ -typedef struct ccsr_cpm_fcc3 { - u32 gfmr; - u32 fpsmr; - u16 ftodr; - u8 res1[2]; - u16 fdsr; - u8 res2[2]; - u16 fcce; - u8 res3[2]; - u16 fccm; - u8 res4[2]; - u8 fccs; - u8 res5[3]; - u8 res[36]; -} ccsr_cpm_fcc3_t; - -/* FCC1 extended */ -typedef struct ccsr_cpm_fcc1_ext { - u32 firper; - u32 firer; - u32 firsr_h; - u32 firsr_l; - u8 gfemr; - u8 res[15]; - -} ccsr_cpm_fcc1_ext_t; - -/* FCC2 extended */ -typedef struct ccsr_cpm_fcc2_ext { - u32 firper; - u32 firer; - u32 firsr_h; - u32 firsr_l; - u8 gfemr; - u8 res[31]; -} ccsr_cpm_fcc2_ext_t; - -/* FCC3 extended */ -typedef struct ccsr_cpm_fcc3_ext { - u8 gfemr; - u8 res[47]; -} ccsr_cpm_fcc3_ext_t; - -/* TC layers */ -typedef struct ccsr_cpm_tmp1 { - u8 res[496]; -} ccsr_cpm_tmp1_t; - -/* BRGs:5,6,7,8 */ -typedef struct ccsr_cpm_brg2 { - u32 brgc5; - u32 brgc6; - u32 brgc7; - u32 brgc8; - u8 res[608]; -} ccsr_cpm_brg2_t; - -/* I2C */ -typedef struct ccsr_cpm_i2c { - u8 i2mod; - u8 res1[3]; - u8 i2add; - u8 res2[3]; - u8 i2brg; - u8 res3[3]; - u8 i2com; - u8 res4[3]; - u8 i2cer; - u8 res5[3]; - u8 i2cmr; - u8 res6[331]; -} ccsr_cpm_i2c_t; - -/* CPM core */ -typedef struct ccsr_cpm_cp { - u32 cpcr; - u32 rccr; - u8 res1[14]; - u16 rter; - u8 res2[2]; - u16 rtmr; - u16 rtscr; - u8 res3[2]; - u32 rtsr; - u8 res4[12]; -} ccsr_cpm_cp_t; - -/* BRGs:1,2,3,4 */ -typedef struct ccsr_cpm_brg1 { - u32 brgc1; - u32 brgc2; - u32 brgc3; - u32 brgc4; -} ccsr_cpm_brg1_t; - -/* SCC1-SCC4 */ -typedef struct ccsr_cpm_scc { - u32 gsmrl; - u32 gsmrh; - u16 psmr; - u8 res1[2]; - u16 todr; - u16 dsr; - u16 scce; - u8 res2[2]; - u16 sccm; - u8 res3; - u8 sccs; - u8 res4[8]; -} ccsr_cpm_scc_t; - -typedef struct ccsr_cpm_tmp2 { - u8 res[32]; -} ccsr_cpm_tmp2_t; - -/* SPI */ -typedef struct ccsr_cpm_spi { - u16 spmode; - u8 res1[4]; - u8 spie; - u8 res2[3]; - u8 spim; - u8 res3[2]; - u8 spcom; - u8 res4[82]; -} ccsr_cpm_spi_t; - -/* CPM MUX */ -typedef struct ccsr_cpm_mux { - u8 cmxsi1cr; - u8 res1; - u8 cmxsi2cr; - u8 res2; - u32 cmxfcr; - u32 cmxscr; - u8 res3[2]; - u16 cmxuar; - u8 res4[16]; -} ccsr_cpm_mux_t; - -/* SI,MCC,etc */ -typedef struct ccsr_cpm_tmp3 { - u8 res[58592]; -} ccsr_cpm_tmp3_t; - -typedef struct ccsr_cpm_iram { - u32 iram[8192]; - u8 res[98304]; -} ccsr_cpm_iram_t; - -typedef struct ccsr_cpm { - /* Some references are into the unique & known dpram spaces, - * others are from the generic base. - */ -#define im_dprambase im_dpram1 - u8 im_dpram1[16*1024]; - u8 res1[16*1024]; - u8 im_dpram2[16*1024]; - u8 res2[16*1024]; - ccsr_cpm_siu_t im_cpm_siu; /* SIU Configuration */ - ccsr_cpm_intctl_t im_cpm_intctl; /* IRQ Controller */ - ccsr_cpm_iop_t im_cpm_iop; /* IO Port control/status */ - ccsr_cpm_timer_t im_cpm_timer; /* CPM timers */ - ccsr_cpm_sdma_t im_cpm_sdma; /* SDMA control/status */ - ccsr_cpm_fcc1_t im_cpm_fcc1; - ccsr_cpm_fcc2_t im_cpm_fcc2; - ccsr_cpm_fcc3_t im_cpm_fcc3; - ccsr_cpm_fcc1_ext_t im_cpm_fcc1_ext; - ccsr_cpm_fcc2_ext_t im_cpm_fcc2_ext; - ccsr_cpm_fcc3_ext_t im_cpm_fcc3_ext; - ccsr_cpm_tmp1_t im_cpm_tmp1; - ccsr_cpm_brg2_t im_cpm_brg2; - ccsr_cpm_i2c_t im_cpm_i2c; - ccsr_cpm_cp_t im_cpm_cp; - ccsr_cpm_brg1_t im_cpm_brg1; - ccsr_cpm_scc_t im_cpm_scc[4]; - ccsr_cpm_tmp2_t im_cpm_tmp2; - ccsr_cpm_spi_t im_cpm_spi; - ccsr_cpm_mux_t im_cpm_mux; - ccsr_cpm_tmp3_t im_cpm_tmp3; - ccsr_cpm_iram_t im_cpm_iram; -} ccsr_cpm_t; -#endif - #ifdef CONFIG_SYS_SRIO /* Architectural regsiters */ struct rio_arch { @@ -2888,7 +2564,6 @@ struct ccsr_pman { #define CONFIG_SYS_MPC85xx_SERDES1_OFFSET 0xE3000 #define CONFIG_SYS_SEC_MON_OFFSET 0xE6000 #define CONFIG_SYS_SFP_OFFSET 0xE7000 -#define CONFIG_SYS_MPC85xx_CPM_OFFSET 0x80000 #define CONFIG_SYS_FSL_QMAN_OFFSET 0x88000 #define CONFIG_SYS_FSL_BMAN_OFFSET 0x8a000 #define CONFIG_SYS_FSL_FM1_OFFSET 0x100000 @@ -2965,8 +2640,6 @@ struct ccsr_pman { (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_ESDHC_OFFSET) #define CONFIG_SYS_MPC8xxx_PIC_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET) -#define CONFIG_SYS_MPC85xx_CPM_ADDR \ - (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_CPM_OFFSET) #define CONFIG_SYS_MPC85xx_SERDES1_ADDR \ (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SERDES1_OFFSET) #define CONFIG_SYS_MPC85xx_SERDES2_ADDR \ diff --git a/arch/powerpc/lib/bdinfo.c b/arch/powerpc/lib/bdinfo.c index d2e5e60..55dcad5 100644 --- a/arch/powerpc/lib/bdinfo.c +++ b/arch/powerpc/lib/bdinfo.c @@ -27,13 +27,6 @@ int arch_setup_bdinfo(void) bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */ bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */ -#if defined(CONFIG_CPM2) - bd->bi_cpmfreq = gd->arch.cpm_clk; - bd->bi_brgfreq = gd->arch.brg_clk; - bd->bi_sccfreq = gd->arch.scc_clk; - bd->bi_vco = gd->arch.vco_out; -#endif /* CONFIG_CPM2 */ - return 0; } @@ -59,10 +52,4 @@ void arch_print_bdinfo(void) puts("addressing = 32-bit\n"); #endif board_detail(); -#if defined(CONFIG_CPM2) - bdinfo_print_mhz("cpmfreq", bd->bi_cpmfreq); - bdinfo_print_mhz("vco", bd->bi_vco); - bdinfo_print_mhz("sccfreq", bd->bi_sccfreq); - bdinfo_print_mhz("brgfreq", bd->bi_brgfreq); -#endif } diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c index 8d65047..3b43066 100644 --- a/arch/powerpc/lib/bootm.c +++ b/arch/powerpc/lib/bootm.c @@ -266,12 +266,6 @@ static void set_clocks_in_mhz (struct bd_info *kbd) /* convert all clock information to MHz */ kbd->bi_intfreq /= 1000000L; kbd->bi_busfreq /= 1000000L; -#if defined(CONFIG_CPM2) - kbd->bi_cpmfreq /= 1000000L; - kbd->bi_brgfreq /= 1000000L; - kbd->bi_sccfreq /= 1000000L; - kbd->bi_vco /= 1000000L; -#endif } } diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index 8d90c5e..3ffcbbd 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -7,9 +7,11 @@ #include <cpu.h> #include <dm.h> #include <dm/lists.h> +#include <event.h> #include <init.h> #include <log.h> #include <asm/encoding.h> +#include <asm/system.h> #include <dm/uclass-internal.h> #include <linux/bitops.h> @@ -81,7 +83,7 @@ static void dummy_pending_ipi_clear(ulong hart, ulong arg0, ulong arg1) } #endif -int arch_cpu_init_dm(void) +int riscv_cpu_setup(void *ctx, struct event *event) { int ret; @@ -133,6 +135,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, riscv_cpu_setup); int arch_early_init_r(void) { diff --git a/arch/riscv/include/asm/system.h b/arch/riscv/include/asm/system.h index a340475..9d8e43e 100644 --- a/arch/riscv/include/asm/system.h +++ b/arch/riscv/include/asm/system.h @@ -7,6 +7,8 @@ #ifndef __ASM_RISCV_SYSTEM_H #define __ASM_RISCV_SYSTEM_H +struct event; + /* * Interrupt configuring macros. * @@ -14,4 +16,7 @@ * */ +/* Hook to set up the CPU (called from SPL too) */ +int riscv_cpu_setup(void *ctx, struct event *event); + #endif /* __ASM_RISCV_SYSTEM_H */ diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c index 8baee07..f4d3b67 100644 --- a/arch/riscv/lib/spl.c +++ b/arch/riscv/lib/spl.c @@ -11,6 +11,7 @@ #include <spl.h> #include <asm/global_data.h> #include <asm/smp.h> +#include <asm/system.h> DECLARE_GLOBAL_DATA_PTR; @@ -27,7 +28,7 @@ __weak void board_init_f(ulong dummy) if (ret) panic("spl_early_init() failed: %d\n", ret); - arch_cpu_init_dm(); + riscv_cpu_setup(NULL, NULL); preloader_console_init(); diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c index 650bdb0..3f107b8 100644 --- a/arch/sandbox/cpu/spl.c +++ b/arch/sandbox/cpu/spl.c @@ -6,6 +6,7 @@ #include <common.h> #include <dm.h> #include <hang.h> +#include <handoff.h> #include <init.h> #include <log.h> #include <os.h> diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c index 13b0731..0f5a873 100644 --- a/arch/sandbox/cpu/start.c +++ b/arch/sandbox/cpu/start.c @@ -4,14 +4,14 @@ */ #include <common.h> +#include <cli.h> #include <command.h> -#include <dm/root.h> #include <efi_loader.h> #include <errno.h> +#include <event.h> #include <init.h> #include <log.h> #include <os.h> -#include <cli.h> #include <sort.h> #include <asm/getopt.h> #include <asm/global_data.h> @@ -19,6 +19,7 @@ #include <asm/malloc.h> #include <asm/sections.h> #include <asm/state.h> +#include <dm/root.h> #include <linux/ctype.h> DECLARE_GLOBAL_DATA_PTR; @@ -119,10 +120,11 @@ int sandbox_early_getopt_check(void) os_exit(0); } -int misc_init_f(void) +static int sandbox_misc_init_f(void *ctx, struct event *event) { return sandbox_early_getopt_check(); } +EVENT_SPY(EVT_MISC_INIT_F, sandbox_misc_init_f); static int sandbox_cmdline_cb_help(struct sandbox_state *state, const char *arg) { diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index ce904b1..e0d0112 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -421,7 +421,8 @@ int state_uninit(void) { int err; - log_info("Writing sandbox state\n"); + if (state->write_ram_buf || state->write_state) + log_info("Writing sandbox state\n"); state = &main_state; /* Finish the bloblist, so that it is correct before writing memory */ diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi index 66b813f..826db26 100644 --- a/arch/sandbox/dts/sandbox.dtsi +++ b/arch/sandbox/dts/sandbox.dtsi @@ -7,6 +7,9 @@ #define USB_CLASS_HUB 9 / { + binman { + }; + chosen { stdout-path = "/serial"; }; diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index 48ca3e1..05c1cd5 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -61,6 +61,9 @@ osd0 = "/osd"; }; + binman { + }; + config { testing-bool; testing-int = <123>; @@ -574,17 +577,21 @@ compatible = "sandbox,firmware"; }; - sandbox-scmi-agent@0 { + scmi { compatible = "sandbox,scmi-agent"; #address-cells = <1>; #size-cells = <0>; - clk_scmi0: protocol@14 { + protocol@10 { + reg = <0x10>; + }; + + clk_scmi: protocol@14 { reg = <0x14>; #clock-cells = <1>; }; - reset_scmi0: protocol@16 { + reset_scmi: protocol@16 { reg = <0x16>; #reset-cells = <1>; }; @@ -596,13 +603,13 @@ #address-cells = <1>; #size-cells = <0>; - regul0_scmi0: reg@0 { + regul0_scmi: reg@0 { reg = <0>; regulator-name = "sandbox-voltd0"; regulator-min-microvolt = <1100000>; regulator-max-microvolt = <3300000>; }; - regul1_scmi0: reg@1 { + regul1_scmi: reg@1 { reg = <0x1>; regulator-name = "sandbox-voltd1"; regulator-min-microvolt = <1800000>; @@ -610,21 +617,6 @@ }; }; }; - - sandbox-scmi-agent@1 { - compatible = "sandbox,scmi-agent"; - #address-cells = <1>; - #size-cells = <0>; - - clk_scmi1: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - - protocol@10 { - reg = <0x10>; - }; - }; }; pinctrl-gpio { @@ -1403,10 +1395,10 @@ sandbox_scmi { compatible = "sandbox,scmi-devices"; - clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>; - resets = <&reset_scmi0 3>; - regul0-supply = <®ul0_scmi0>; - regul1-supply = <®ul1_scmi0>; + clocks = <&clk_scmi 2>, <&clk_scmi 0>; + resets = <&reset_scmi 3>; + regul0-supply = <®ul0_scmi>; + regul1-supply = <®ul1_scmi>; }; pinctrl { diff --git a/arch/sandbox/include/asm/scmi_test.h b/arch/sandbox/include/asm/scmi_test.h index 2930e68..c72ec1e 100644 --- a/arch/sandbox/include/asm/scmi_test.h +++ b/arch/sandbox/include/asm/scmi_test.h @@ -17,7 +17,6 @@ struct sandbox_scmi_service; * @rate: Clock rate in Hertz */ struct sandbox_scmi_clk { - uint id; bool enabled; ulong rate; }; @@ -46,7 +45,6 @@ struct sandbox_scmi_voltd { /** * struct sandbox_scmi_agent - Simulated SCMI service seen by SCMI agent - * @idx: Identifier for the SCMI agent, its index * @clk: Simulated clocks * @clk_count: Simulated clocks array size * @reset: Simulated reset domains @@ -55,7 +53,6 @@ struct sandbox_scmi_voltd { * @voltd_count: Simulated voltage domains array size */ struct sandbox_scmi_agent { - uint idx; struct sandbox_scmi_clk *clk; size_t clk_count; struct sandbox_scmi_reset *reset; @@ -66,12 +63,10 @@ struct sandbox_scmi_agent { /** * struct sandbox_scmi_service - Reference to simutaed SCMI agents/services - * @agent: Pointer to SCMI sandbox agent pointers array - * @agent_count: Number of emulated agents exposed in array @agent. + * @agent: Pointer to SCMI sandbox agent or NULL if not probed */ struct sandbox_scmi_service { - struct sandbox_scmi_agent **agent; - size_t agent_count; + struct sandbox_scmi_agent *agent; }; /** @@ -94,13 +89,13 @@ struct sandbox_scmi_devices { #ifdef CONFIG_SCMI_FIRMWARE /** - * sandbox_scmi_service_context - Get the simulated SCMI services context + * sandbox_scmi_service_ctx - Get the simulated SCMI services context * @return: Reference to backend simulated resources state */ struct sandbox_scmi_service *sandbox_scmi_service_ctx(void); /** - * sandbox_scmi_devices_get_ref - Get references to devices accessed through SCMI + * sandbox_scmi_devices_ctx - Get references to devices accessed through SCMI * @dev: Reference to the test device used get test resources * @return: Reference to the devices probed by the SCMI test */ diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index 0d83f4d..015e96d 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -9,6 +9,7 @@ #define __ASM_TEST_H #include <video.h> +#include <pci_ids.h> /* The sandbox driver always permits an I2C device with this address */ #define SANDBOX_I2C_TEST_ADDR 0x59 @@ -17,8 +18,8 @@ #define SANDBOX_PCI_SWAP_CASE_EMUL_ID 0x5678 #define SANDBOX_PCI_PMC_EMUL_ID 0x5677 #define SANDBOX_PCI_P2SB_EMUL_ID 0x5676 -#define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM -#define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL +#define SANDBOX_PCI_CLASS_CODE (PCI_CLASS_COMMUNICATION_SERIAL >> 8) +#define SANDBOX_PCI_CLASS_SUB_CODE (PCI_CLASS_COMMUNICATION_SERIAL & 0xff) #define PCI_CAP_ID_PM_OFFSET 0x50 #define PCI_CAP_ID_EXP_OFFSET 0x60 diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile index 9618da1..e7520a3 100644 --- a/arch/sh/lib/Makefile +++ b/arch/sh/lib/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_CMD_SH_ZIMAGEBOOT) += zimageboot.o udivsi3-y := udivsi3_i4i-Os.o -ifneq ($(CONFIG_CC_OPTIMIZE_FOR_SIZE),y) +ifeq ($(CONFIG_CC_OPTIMIZE_FOR_SPEED),y) udivsi3-$(CONFIG_CPU_SH4) := udivsi3_i4i.o endif udivsi3-y += udivsi3.o diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c index 309a50a..68bf40b 100644 --- a/arch/x86/cpu/baytrail/cpu.c +++ b/arch/x86/cpu/baytrail/cpu.c @@ -8,6 +8,7 @@ #include <common.h> #include <cpu.h> #include <dm.h> +#include <event.h> #include <init.h> #include <log.h> #include <pci.h> @@ -44,7 +45,7 @@ static void hsuart_clock_set(void *base) * Configure the internal clock of both SIO HS-UARTs, if they are enabled * via FSP */ -int arch_cpu_init_dm(void) +static int baytrail_uart_init(void *ctx, struct event *event) { struct udevice *dev; void *base; @@ -63,6 +64,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, baytrail_uart_init); static void set_max_freq(void) { diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c index 3832a97..2adcf4b 100644 --- a/arch/x86/cpu/broadwell/cpu.c +++ b/arch/x86/cpu/broadwell/cpu.c @@ -8,6 +8,7 @@ #include <common.h> #include <dm.h> #include <cpu.h> +#include <event.h> #include <init.h> #include <log.h> #include <asm/cpu.h> @@ -24,7 +25,7 @@ #include <asm/arch/pch.h> #include <asm/arch/rcb.h> -int arch_cpu_init_dm(void) +static int broadwell_init_cpu(void *ctx, struct event *event) { struct udevice *dev; int ret; @@ -41,6 +42,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, broadwell_init_cpu); void set_max_freq(void) { diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c index a02f4f9..cffc5d5 100644 --- a/arch/x86/cpu/ivybridge/cpu.c +++ b/arch/x86/cpu/ivybridge/cpu.c @@ -14,6 +14,7 @@ #include <cpu_func.h> #include <dm.h> #include <errno.h> +#include <event.h> #include <fdtdec.h> #include <init.h> #include <log.h> @@ -53,7 +54,7 @@ int arch_cpu_init(void) return x86_cpu_init_f(); } -int arch_cpu_init_dm(void) +static int ivybridge_cpu_init(void *ctx, struct event *ev) { struct pci_controller *hose; struct udevice *bus, *dev; @@ -85,6 +86,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, ivybridge_cpu_init); #define PCH_EHCI0_TEMP_BAR0 0xe8000000 #define PCH_EHCI1_TEMP_BAR0 0xe8000400 diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index 30b4711..e016fae 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -5,6 +5,7 @@ #include <common.h> #include <cpu_func.h> +#include <event.h> #include <init.h> #include <mmc.h> #include <asm/cache.h> @@ -247,7 +248,7 @@ int arch_cpu_init(void) return 0; } -int arch_cpu_init_dm(void) +static int quark_init_pcie(void *ctx, struct event *event) { /* * Initialize PCIe controller @@ -262,6 +263,7 @@ int arch_cpu_init_dm(void) return 0; } +EVENT_SPY(EVT_DM_POST_INIT, quark_init_pcie); int checkcpu(void) { diff --git a/arch/x86/include/asm/fsp2/fsp_api.h b/arch/x86/include/asm/fsp2/fsp_api.h index dccbfa4..ca3f684 100644 --- a/arch/x86/include/asm/fsp2/fsp_api.h +++ b/arch/x86/include/asm/fsp2/fsp_api.h @@ -60,4 +60,12 @@ int fsp_silicon_init(bool s3wake, bool use_spi_flash); typedef asmlinkage int (*fsp_silicon_init_func)(struct fsps_upd *params); +/** + * fsp_setup_pinctrl() - Set up the pinctrl for FSP + * + * @ctx: Event context (not used) + * @event: Event information (not used) + */ +int fsp_setup_pinctrl(void *ctx, struct event *event); + #endif diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c index 5afdce1..b15926e 100644 --- a/arch/x86/lib/fsp2/fsp_init.c +++ b/arch/x86/lib/fsp2/fsp_init.c @@ -9,6 +9,7 @@ #include <bootstage.h> #include <cbfs.h> #include <dm.h> +#include <event.h> #include <init.h> #include <log.h> #include <spi.h> @@ -18,7 +19,7 @@ #include <dm/uclass-internal.h> #include <asm/fsp2/fsp_internal.h> -int arch_cpu_init_dm(void) +int fsp_setup_pinctrl(void *ctx, struct event *event) { struct udevice *dev; ofnode node; @@ -41,6 +42,7 @@ int arch_cpu_init_dm(void) return ret; } +EVENT_SPY(EVT_DM_POST_INIT, fsp_setup_pinctrl); #if !defined(CONFIG_TPL_BUILD) binman_sym_declare(ulong, intel_fsp_m, image_pos); diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c index b18c1cd..2d50c62 100644 --- a/arch/x86/lib/spl.c +++ b/arch/x86/lib/spl.c @@ -17,6 +17,7 @@ #include <syscon.h> #include <asm/cpu.h> #include <asm/cpu_common.h> +#include <asm/fsp2/fsp_api.h> #include <asm/global_data.h> #include <asm/mrccache.h> #include <asm/mtrr.h> @@ -27,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; -__weak int arch_cpu_init_dm(void) +__weak int fsp_setup_pinctrl(void *ctx, struct event *event) { return 0; } @@ -89,7 +90,7 @@ static int x86_spl_init(void) return ret; } #ifndef CONFIG_TPL - ret = arch_cpu_init_dm(); + ret = fsp_setup_pinctrl(NULL, NULL); if (ret) { debug("%s: arch_cpu_init_dm() failed\n", __func__); return ret; diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c index 5b57e53..18b05b2 100644 --- a/arch/x86/lib/tpl.c +++ b/arch/x86/lib/tpl.c @@ -19,11 +19,6 @@ DECLARE_GLOBAL_DATA_PTR; -__weak int arch_cpu_init_dm(void) -{ - return 0; -} - static int x86_tpl_init(void) { int ret; @@ -44,11 +39,6 @@ static int x86_tpl_init(void) debug("%s: arch_cpu_init() failed\n", __func__); return ret; } - ret = arch_cpu_init_dm(); - if (ret) { - debug("%s: arch_cpu_init_dm() failed\n", __func__); - return ret; - } preloader_console_init(); return 0; diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 35e5b89..8f668cc 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -13,6 +13,7 @@ choice config TARGET_XTFPGA bool "Support XTFPGA" + select BOARD_POSTCLK_INIT endchoice diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index f13fa11..19af596 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -39,7 +39,6 @@ #include <power/regulator.h> #include <power/da9063_pmic.h> #include <splash.h> -#include <video_fb.h> DECLARE_GLOBAL_DATA_PTR; diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 4aab3f0..a0314c6 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -1,4 +1,4 @@ -if TARGET_VEXPRESS64_BASE_FVP || TARGET_VEXPRESS64_JUNO +if ARCH_VEXPRESS64 config SYS_BOARD default "vexpress64" @@ -9,6 +9,43 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "vexpress_aemv8" +config VEXPRESS64_BASE_MODEL + bool + select SEMIHOSTING + select VIRTIO_BLK if VIRTIO_MMIO + select VIRTIO_NET if VIRTIO_MMIO + select DM_ETH if VIRTIO_NET + select LINUX_KERNEL_IMAGE_HEADER + select POSITION_INDEPENDENT + +choice + prompt "VExpress64 board variant" + +config TARGET_VEXPRESS64_BASE_FVP + bool "Support Versatile Express ARMv8a FVP BASE model" + select VEXPRESS64_BASE_MODEL + select OF_BOARD + +config TARGET_VEXPRESS64_BASER_FVP + bool "Support Versatile Express ARMv8r64 FVP BASE model" + select VEXPRESS64_BASE_MODEL + imply OF_HAS_PRIOR_STAGE + +config TARGET_VEXPRESS64_JUNO + bool "Support Versatile Express Juno Development Platform" + select PCIE_ECAM_GENERIC if PCI + select SATA_SIL + select SMC911X if DM_ETH + select SMC911X_32_BIT if SMC911X + select CMD_USB if USB + select USB_EHCI_HCD if USB + select USB_EHCI_GENERIC if USB + select USB_OHCI_HCD if USB + select USB_OHCI_GENERIC if USB + imply OF_HAS_PRIOR_STAGE + +endchoice + config JUNO_DTB_PART string "NOR flash partition holding DTB" default "board.dtb" @@ -16,4 +53,36 @@ config JUNO_DTB_PART The ARM partition name in the NOR flash memory holding the device tree blob to configure U-Boot. +config LNX_KRNL_IMG_TEXT_OFFSET_BASE + default SYS_TEXT_BASE + +config SYS_TEXT_BASE + default 0x88000000 if TARGET_VEXPRESS64_BASE_FVP + default 0xe0000000 if TARGET_VEXPRESS64_JUNO + default 0x00001000 if TARGET_VEXPRESS64_BASER_FVP + +config SYS_MALLOC_LEN + default 0x810000 if TARGET_VEXPRESS64_JUNO + default 0x840000 if TARGET_VEXPRESS64_BASE_FVP + +config SYS_MALLOC_F_LEN + default 0x2000 + +config SYS_LOAD_ADDR + default 0x10000000 if TARGET_VEXPRESS64_BASER_FVP + default 0x90000000 + +config ENV_ADDR + default 0x0BFC0000 if TARGET_VEXPRESS64_JUNO + default 0x0FFC0000 if TARGET_VEXPRESS64_BASE_FVP + default 0x8FFC0000 if TARGET_VEXPRESS64_BASER_FVP + +config ENV_SIZE + default 0x10000 if TARGET_VEXPRESS64_JUNO + default 0x40000 + +config ENV_SECT_SIZE + default 0x10000 if TARGET_VEXPRESS64_JUNO + default 0x40000 + endif diff --git a/board/armltd/vexpress64/MAINTAINERS b/board/armltd/vexpress64/MAINTAINERS index 0ba044d..b3ecc9b 100644 --- a/board/armltd/vexpress64/MAINTAINERS +++ b/board/armltd/vexpress64/MAINTAINERS @@ -14,3 +14,8 @@ JUNO DEVELOPMENT PLATFORM BOARD M: Linus Walleij <linus.walleij@linaro.org> S: Maintained F: configs/vexpress_aemv8a_juno_defconfig + +VEXPRESS64 ARMV8R-64 +M: Peter Hoyes <Peter.Hoyes@arm.com> +S: Maintained +F: configs/vexpress_aemv8r_defconfig diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c index 1e74158..e553da8 100644 --- a/board/armltd/vexpress64/pcie.c +++ b/board/armltd/vexpress64/pcie.c @@ -150,7 +150,7 @@ static void xr3pci_init(void) /* allow ECRC */ writel(0x6006, XR3_CONFIG_BASE + XR3PCI_PEX_SPC2); /* setup the correct class code for the host bridge */ - writel(PCI_CLASS_BRIDGE_PCI << 16, XR3_CONFIG_BASE + XR3PCI_BRIDGE_PCI_IDS); + writel(PCI_CLASS_BRIDGE_PCI_NORMAL << 8, XR3_CONFIG_BASE + XR3PCI_BRIDGE_PCI_IDS); /* reset phy and root complex */ writel(JUNO_RESET_CTRL_PHY | JUNO_RESET_CTRL_RC, diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 5e22e89..709ebf3 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -15,6 +15,7 @@ #include <asm/global_data.h> #include <asm/io.h> #include <linux/compiler.h> +#include <linux/sizes.h> #include <dm/platform_data/serial_pl01x.h> #include "pcie.h" #include <asm/armv8/mmu.h> @@ -38,16 +39,27 @@ U_BOOT_DRVINFO(vexpress_serials) = { static struct mm_region vexpress64_mem_map[] = { { - .virt = 0x0UL, - .phys = 0x0UL, - .size = 0x80000000UL, + .virt = V2M_PA_BASE, + .phys = V2M_PA_BASE, + .size = SZ_2G, .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | PTE_BLOCK_NON_SHARE | PTE_BLOCK_PXN | PTE_BLOCK_UXN }, { - .virt = 0x80000000UL, - .phys = 0x80000000UL, - .size = 0xff80000000UL, + .virt = V2M_DRAM_BASE, + .phys = V2M_DRAM_BASE, + .size = SZ_2G, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* + * DRAM beyond 2 GiB is located high. Let's map just some + * of it, although U-Boot won't realistically use it, and + * the actual available amount might be smaller on the model. + */ + .virt = 0x880000000UL, /* 32 + 2 GiB */ + .phys = 0x880000000UL, + .size = 6UL * SZ_1G, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_INNER_SHARE }, { @@ -76,20 +88,12 @@ int board_init(void) int dram_init(void) { - gd->ram_size = PHYS_SDRAM_1_SIZE; - return 0; + return fdtdec_setup_mem_size_base(); } int dram_init_banksize(void) { - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -#ifdef PHYS_SDRAM_2 - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; -#endif - - return 0; + return fdtdec_setup_memory_banksize(); } /* Assigned in lowlevel_init.S @@ -168,11 +172,17 @@ void *board_fdt_blob_setup(int *err) } #endif - if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC) { + if (fdt_magic(prior_stage_fdt_address) == FDT_MAGIC && + fdt_totalsize(prior_stage_fdt_address) > 0x100) { *err = 0; return (void *)prior_stage_fdt_address; } + if (fdt_magic(gd->fdt_blob) == FDT_MAGIC) { + *err = 0; + return (void *)gd->fdt_blob; + } + *err = -ENXIO; return NULL; } diff --git a/board/atmel/at91sam9260ek/Kconfig b/board/atmel/at91sam9260ek/Kconfig index 3844f08..40db313 100644 --- a/board/atmel/at91sam9260ek/Kconfig +++ b/board/atmel/at91sam9260ek/Kconfig @@ -9,4 +9,19 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "at91sam9260ek" +choice + prompt "Evaluation board" + +config AT91SAM9G20EK + bool "Atmel AT91SAM9G20 EK" + +config AT91SAM9260EK + bool "Atmel AT91SAM9260 EK" + +endchoice + +config AT91SAM9G20EK_2MMC + bool "Atmel AT91SAM9G20 EK 2MMC variant" + depends on AT91SAM9260EK + endif diff --git a/board/atmel/at91sam9261ek/Kconfig b/board/atmel/at91sam9261ek/Kconfig index 2971b3c..6133efe 100644 --- a/board/atmel/at91sam9261ek/Kconfig +++ b/board/atmel/at91sam9261ek/Kconfig @@ -9,4 +9,18 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "at91sam9261ek" +choice + prompt "Evaluation board" + +config AT91SAM9G10EK + bool "Atmel AT91SAM9G10 EK" + +config AT91SAM9261EK + bool "Atmel AT91SAM9261 EK" + +config AT91SAM9G10 + bool "Atmel AT91SAM9G10 EK" + +endchoice + endif diff --git a/board/atmel/at91sam9263ek/Kconfig b/board/atmel/at91sam9263ek/Kconfig index 3f0873f..71cbc89 100644 --- a/board/atmel/at91sam9263ek/Kconfig +++ b/board/atmel/at91sam9263ek/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "at91sam9263ek" +config SYS_USE_NORFLASH + bool "Use the NOR flash on the platform" + endif diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index 8cb2808..fcca892 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -214,7 +214,8 @@ static void at91sam9m10g45ek_lcd_hw_init(void) at91_periph_clk_enable(ATMEL_ID_LCDC); - gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE; + /* board specific(not enough SRAM) */ + gd->fb_base = 0x73E00000; } #ifdef CONFIG_LCD_INFO @@ -267,11 +268,7 @@ int board_early_init_f(void) int board_init(void) { /* arch number of AT91SAM9M10G45EK-Board */ -#ifdef CONFIG_AT91SAM9M10G45EK gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10G45EK; -#elif defined CONFIG_AT91SAM9G45EKES - gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES; -#endif /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; diff --git a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c index 8c0cf3d..b69f1c8 100644 --- a/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c +++ b/board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c @@ -22,6 +22,13 @@ extern void at91_pda_detect(void); DECLARE_GLOBAL_DATA_PTR; +static void rgb_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 10, 0); /* LED RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 1, 0); /* LED GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 31, 1); /* LED BLUE */ +} + #ifdef CONFIG_CMD_USB static void board_usb_hw_init(void) { @@ -71,6 +78,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + rgb_leds_init(); + #ifdef CONFIG_CMD_USB board_usb_hw_init(); #endif diff --git a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c index 32d51bb..67ada27 100644 --- a/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c +++ b/board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c @@ -22,6 +22,13 @@ extern void at91_pda_detect(void); DECLARE_GLOBAL_DATA_PTR; +static void rgb_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 6, 0); /* LED RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 7, 0); /* LED GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 8, 1); /* LED BLUE */ +} + #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { @@ -64,6 +71,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + rgb_leds_init(); + return 0; } diff --git a/board/atmel/sama5d2_icp/sama5d2_icp.c b/board/atmel/sama5d2_icp/sama5d2_icp.c index 3f33fcf..da697a7 100644 --- a/board/atmel/sama5d2_icp/sama5d2_icp.c +++ b/board/atmel/sama5d2_icp/sama5d2_icp.c @@ -19,6 +19,13 @@ DECLARE_GLOBAL_DATA_PTR; +static void rgb_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 0, 0); /* LED RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 1, 0); /* LED GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTA, 31, 1); /* LED BLUE */ +} + int board_late_init(void) { return 0; @@ -52,6 +59,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + rgb_leds_init(); + return 0; } diff --git a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c index 2a2439c..cca5bd1 100644 --- a/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c +++ b/board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c @@ -25,6 +25,13 @@ extern void at91_pda_detect(void); DECLARE_GLOBAL_DATA_PTR; +static void rgb_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 0); /* LED RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 8, 0); /* LED GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 6, 1); /* LED BLUE */ +} + #ifdef CONFIG_NAND_ATMEL static void board_nand_hw_init(void) { @@ -113,6 +120,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + rgb_leds_init(); + #ifdef CONFIG_NAND_ATMEL board_nand_hw_init(); #endif diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index 8b5cd53..4bbb05c 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -21,6 +21,13 @@ extern void at91_pda_detect(void); DECLARE_GLOBAL_DATA_PTR; +static void rgb_leds_init(void) +{ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 6, 1); /* LED RED */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 5, 1); /* LED GREEN */ + atmel_pio4_set_pio_output(AT91_PIO_PORTB, 0, 0); /* LED BLUE */ +} + #ifdef CONFIG_CMD_USB static void board_usb_hw_init(void) { @@ -70,6 +77,8 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; + rgb_leds_init(); + #ifdef CONFIG_CMD_USB board_usb_hw_init(); #endif diff --git a/board/bluewater/gurnard/Kconfig b/board/bluewater/gurnard/Kconfig index e2cd9f0..41ecbf7 100644 --- a/board/bluewater/gurnard/Kconfig +++ b/board/bluewater/gurnard/Kconfig @@ -1,5 +1,8 @@ if TARGET_GURNARD +config GURNARD_SPLASH + def_bool y + config SYS_BOARD default "gurnard" diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 84e14d1..8566c22 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -356,10 +356,6 @@ int board_eth_init(struct bd_info *bis) goto free_phydev; #endif -#ifdef CONFIG_CI_UDC - /* For otg ethernet*/ - usb_eth_initialize(bis); -#endif return 0; free_phydev: diff --git a/board/broadcom/bcm96753ref/Kconfig b/board/broadcom/bcm96753ref/Kconfig new file mode 100644 index 0000000..479e790 --- /dev/null +++ b/board/broadcom/bcm96753ref/Kconfig @@ -0,0 +1,16 @@ +if TARGET_BCM96753REF + +config SYS_VENDOR + default "broadcom" + +config SYS_BOARD + default "bcm96753ref" + +config SYS_CONFIG_NAME + default "broadcom_bcm96753ref" + +endif + +config TARGET_BCM96753REF + bool "Support Broadcom bcm96753ref" + depends on ARCH_BCM6753 diff --git a/board/broadcom/bcm96753ref/MAINTAINERS b/board/broadcom/bcm96753ref/MAINTAINERS new file mode 100644 index 0000000..be060f5 --- /dev/null +++ b/board/broadcom/bcm96753ref/MAINTAINERS @@ -0,0 +1,6 @@ +BROADCOM BCM96753REF +M: Philippe Reynes <philippe.reynes@softathome.com> +S: Maintained +F: board/broadcom/bcm96753ref +F: include/configs/broadcom_bcm96753ref.h +F: configs/bcm96753ref_ram_defconfig diff --git a/board/broadcom/bcm96753ref/Makefile b/board/broadcom/bcm96753ref/Makefile new file mode 100644 index 0000000..a1fa2bf --- /dev/null +++ b/board/broadcom/bcm96753ref/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += bcm96753ref.o diff --git a/board/broadcom/bcm96753ref/bcm96753ref.c b/board/broadcom/bcm96753ref/bcm96753ref.c new file mode 100644 index 0000000..bf78d84 --- /dev/null +++ b/board/broadcom/bcm96753ref/bcm96753ref.c @@ -0,0 +1,40 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com> + */ + +#include <common.h> +#include <fdtdec.h> +#include <linux/io.h> +#include <cpu_func.h> + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + if (fdtdec_setup_mem_size_base() != 0) + printf("fdtdec_setup_mem_size_base() has failed\n"); + + return 0; +} + +int dram_init_banksize(void) +{ + fdtdec_setup_memory_banksize(); + + return 0; +} + +int print_cpuinfo(void) +{ + return 0; +} + +void enable_caches(void) +{ + icache_enable(); + dcache_enable(); +} diff --git a/board/buffalo/lsxl/Kconfig b/board/buffalo/lsxl/Kconfig index ef78896..fd8f054 100644 --- a/board/buffalo/lsxl/Kconfig +++ b/board/buffalo/lsxl/Kconfig @@ -9,4 +9,15 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "lsxl" +choice + prompt "Board model" + +config LSCHLV2 + bool "LSCHLV2 support" + +config LSXHL + bool "LSXHL support" + +endchoice + endif diff --git a/board/cortina/presidio-asic/lowlevel_init.S b/board/cortina/presidio-asic/lowlevel_init.S index 4450a5d..cbf8134 100644 --- a/board/cortina/presidio-asic/lowlevel_init.S +++ b/board/cortina/presidio-asic/lowlevel_init.S @@ -50,7 +50,7 @@ skip_smp_setup: #endif #ifdef CONFIG_ARMV8_MULTIENTRY - branch_if_master x0, x1, 2f + branch_if_master x0, 2f /* * Slave should wait for master clearing spin table. diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 300b01e..b41d93b 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -22,6 +22,13 @@ config CMD_ESBC_VALIDATE esbc_validate - validate signature using RSA verification esbc_halt - put the core in spin loop (Secure Boot Only) +config DEEP_SLEEP + bool "Enable SoC deep sleep feature" + default y if ARCH_T1024 || ARCH_T1040 || ARCH_T1042 || ARCH_LS1021A + help + Indicates this SoC supports deep sleep feature. If deep sleep is + supported, core will start to execute uboot when wakes up. + config FSL_USE_PCA9547_MUX bool "Enable PCA9547 I2C Mux on Freescale boards" help diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 0ddfb59..f13965d 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -44,16 +44,12 @@ ifndef CONFIG_RAMBOOT_PBL obj-$(CONFIG_FSL_FIXED_MMC_LOCATION) += sdhc_boot.o endif -obj-$(CONFIG_FSL_DIU_CH7301) += diu_ch7301.o - ifdef CONFIG_ARM obj-$(CONFIG_DEEP_SLEEP) += arm_sleep.o else obj-$(CONFIG_DEEP_SLEEP) += mpc85xx_sleep.o endif -obj-$(CONFIG_FSL_DCU_SII9022A) += dcu_sii9022a.o - obj-$(CONFIG_TARGET_MPC8548CDS) += cds_pci_ft.o obj-$(CONFIG_TARGET_MPC8536DS) += ics307_clk.o diff --git a/board/freescale/common/cds_via.c b/board/freescale/common/cds_via.c index 8f8f0d1..6184472 100644 --- a/board/freescale/common/cds_via.c +++ b/board/freescale/common/cds_via.c @@ -28,7 +28,11 @@ void mpc85xx_config_via(struct pci_controller *hose, * This allows legacy I/O (i8259, etc) on the VIA * southbridge to be accessed. */ - bridge = PCI_BDF(0,BRIDGE_ID,0); +#ifdef CONFIG_TARGET_MPC8548CDS_LEGACY + bridge = PCI_BDF(0, 17, 0); +#else + bridge = PCI_BDF(0, 28, 0); +#endif pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0); pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0); pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10); diff --git a/board/freescale/common/dcu_sii9022a.c b/board/freescale/common/dcu_sii9022a.c deleted file mode 100644 index 9137d24..0000000 --- a/board/freescale/common/dcu_sii9022a.c +++ /dev/null @@ -1,248 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2019 NXP - */ - -#include <asm/io.h> -#include <common.h> -#include <fsl_dcu_fb.h> -#include <i2c.h> -#include <linux/fb.h> - -#define PIXEL_CLK_LSB_REG 0x00 -#define PIXEL_CLK_MSB_REG 0x01 -#define VERT_FREQ_LSB_REG 0x02 -#define VERT_FREQ_MSB_REG 0x03 -#define TOTAL_PIXELS_LSB_REG 0x04 -#define TOTAL_PIXELS_MSB_REG 0x05 -#define TOTAL_LINES_LSB_REG 0x06 -#define TOTAL_LINES_MSB_REG 0x07 -#define TPI_INBUS_FMT_REG 0x08 -#define TPI_INPUT_FMT_REG 0x09 -#define TPI_OUTPUT_FMT_REG 0x0A -#define TPI_SYS_CTRL_REG 0x1A -#define TPI_PWR_STAT_REG 0x1E -#define TPI_AUDIO_HANDING_REG 0x25 -#define TPI_AUDIO_INTF_REG 0x26 -#define TPI_AUDIO_FREQ_REG 0x27 -#define TPI_SET_PAGE_REG 0xBC -#define TPI_SET_OFFSET_REG 0xBD -#define TPI_RW_ACCESS_REG 0xBE -#define TPI_TRANS_MODE_REG 0xC7 - -#define TPI_INBUS_CLOCK_RATIO_1 (1 << 6) -#define TPI_INBUS_FULL_PIXEL_WIDE (1 << 5) -#define TPI_INBUS_RISING_EDGE (1 << 4) -#define TPI_INPUT_CLR_DEPTH_8BIT (0 << 6) -#define TPI_INPUT_VRANGE_EXPAN_AUTO (0 << 2) -#define TPI_INPUT_CLR_RGB (0 << 0) -#define TPI_OUTPUT_CLR_DEPTH_8BIT (0 << 6) -#define TPI_OUTPUT_VRANGE_COMPRE_AUTO (0 << 2) -#define TPI_OUTPUT_CLR_HDMI_RGB (0 << 0) -#define TPI_SYS_TMDS_OUTPUT (0 << 4) -#define TPI_SYS_AV_NORAML (0 << 3) -#define TPI_SYS_AV_MUTE (1 << 3) -#define TPI_SYS_DVI_MODE (0 << 0) -#define TPI_SYS_HDMI_MODE (1 << 0) -#define TPI_PWR_STAT_MASK (3 << 0) -#define TPI_PWR_STAT_D0 (0 << 0) -#define TPI_AUDIO_PASS_BASIC (0 << 0) -#define TPI_AUDIO_INTF_I2S (2 << 6) -#define TPI_AUDIO_INTF_NORMAL (0 << 4) -#define TPI_AUDIO_TYPE_PCM (1 << 0) -#define TPI_AUDIO_SAMP_SIZE_16BIT (1 << 6) -#define TPI_AUDIO_SAMP_FREQ_44K (2 << 3) -#define TPI_SET_PAGE_SII9022A 0x01 -#define TPI_SET_OFFSET_SII9022A 0x82 -#define TPI_RW_EN_SRC_TERMIN (1 << 0) -#define TPI_TRANS_MODE_ENABLE (0 << 7) - -/* Programming of Silicon SIi9022a HDMI Transmitter */ -int dcu_set_dvi_encoder(struct fb_videomode *videomode) -{ - u8 temp; - u16 temp1, temp2; - u32 temp3; -#if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *dev; - int ret; - - ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM, - CONFIG_SYS_I2C_DVI_ADDR, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - CONFIG_SYS_I2C_DVI_BUS_NUM); - return ret; - } - - /* Enable TPI transmitter mode */ - temp = TPI_TRANS_MODE_ENABLE; - dm_i2c_write(dev, TPI_TRANS_MODE_REG, &temp, 1); - - /* Enter into D0 state, full operation */ - dm_i2c_read(dev, TPI_PWR_STAT_REG, &temp, 1); - temp &= ~TPI_PWR_STAT_MASK; - temp |= TPI_PWR_STAT_D0; - dm_i2c_write(dev, TPI_PWR_STAT_REG, &temp, 1); - - /* Enable source termination */ - temp = TPI_SET_PAGE_SII9022A; - dm_i2c_write(dev, TPI_SET_PAGE_REG, &temp, 1); - temp = TPI_SET_OFFSET_SII9022A; - dm_i2c_write(dev, TPI_SET_OFFSET_REG, &temp, 1); - - dm_i2c_read(dev, TPI_RW_ACCESS_REG, &temp, 1); - temp |= TPI_RW_EN_SRC_TERMIN; - dm_i2c_write(dev, TPI_RW_ACCESS_REG, &temp, 1); - - /* Set TPI system control */ - temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE; - dm_i2c_write(dev, TPI_SYS_CTRL_REG, &temp, 1); - - /* Set pixel clock */ - temp1 = PICOS2KHZ(videomode->pixclock) / 10; - temp = (u8)(temp1 & 0xFF); - dm_i2c_write(dev, PIXEL_CLK_LSB_REG, &temp, 1); - temp = (u8)(temp1 >> 8); - dm_i2c_write(dev, PIXEL_CLK_MSB_REG, &temp, 1); - - /* Set total pixels per line */ - temp1 = videomode->hsync_len + videomode->left_margin + - videomode->xres + videomode->right_margin; - temp = (u8)(temp1 & 0xFF); - dm_i2c_write(dev, TOTAL_PIXELS_LSB_REG, &temp, 1); - temp = (u8)(temp1 >> 8); - dm_i2c_write(dev, TOTAL_PIXELS_MSB_REG, &temp, 1); - - /* Set total lines */ - temp2 = videomode->vsync_len + videomode->upper_margin + - videomode->yres + videomode->lower_margin; - temp = (u8)(temp2 & 0xFF); - dm_i2c_write(dev, TOTAL_LINES_LSB_REG, &temp, 1); - temp = (u8)(temp2 >> 8); - dm_i2c_write(dev, TOTAL_LINES_MSB_REG, &temp, 1); - - /* Set vertical frequency in Hz */ - temp3 = temp1 * temp2; - temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3; - temp1 = (u16)temp3 * 100; - temp = (u8)(temp1 & 0xFF); - dm_i2c_write(dev, VERT_FREQ_LSB_REG, &temp, 1); - temp = (u8)(temp1 >> 8); - dm_i2c_write(dev, VERT_FREQ_MSB_REG, &temp, 1); - - /* Set TPI input bus and pixel repetition data */ - temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE | - TPI_INBUS_RISING_EDGE; - dm_i2c_write(dev, TPI_INBUS_FMT_REG, &temp, 1); - - /* Set TPI AVI Input format data */ - temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO | - TPI_INPUT_CLR_RGB; - dm_i2c_write(dev, TPI_INPUT_FMT_REG, &temp, 1); - - /* Set TPI AVI Output format data */ - temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO | - TPI_OUTPUT_CLR_HDMI_RGB; - dm_i2c_write(dev, TPI_OUTPUT_FMT_REG, &temp, 1); - - /* Set TPI audio configuration write data */ - temp = TPI_AUDIO_PASS_BASIC; - dm_i2c_write(dev, TPI_AUDIO_HANDING_REG, &temp, 1); - - temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL | - TPI_AUDIO_TYPE_PCM; - dm_i2c_write(dev, TPI_AUDIO_INTF_REG, &temp, 1); - - temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K; - dm_i2c_write(dev, TPI_AUDIO_FREQ_REG, &temp, 1); -#else - i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); - - /* Enable TPI transmitter mode */ - temp = TPI_TRANS_MODE_ENABLE; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1); - - /* Enter into D0 state, full operation */ - i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); - temp &= ~TPI_PWR_STAT_MASK; - temp |= TPI_PWR_STAT_D0; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); - - /* Enable source termination */ - temp = TPI_SET_PAGE_SII9022A; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1); - temp = TPI_SET_OFFSET_SII9022A; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_OFFSET_REG, 1, &temp, 1); - - i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1); - temp |= TPI_RW_EN_SRC_TERMIN; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1); - - /* Set TPI system control */ - temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SYS_CTRL_REG, 1, &temp, 1); - - /* Set pixel clock */ - temp1 = PICOS2KHZ(videomode->pixclock) / 10; - temp = (u8)(temp1 & 0xFF); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_LSB_REG, 1, &temp, 1); - temp = (u8)(temp1 >> 8); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_MSB_REG, 1, &temp, 1); - - /* Set total pixels per line */ - temp1 = videomode->hsync_len + videomode->left_margin + - videomode->xres + videomode->right_margin; - temp = (u8)(temp1 & 0xFF); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_LSB_REG, 1, &temp, 1); - temp = (u8)(temp1 >> 8); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_MSB_REG, 1, &temp, 1); - - /* Set total lines */ - temp2 = videomode->vsync_len + videomode->upper_margin + - videomode->yres + videomode->lower_margin; - temp = (u8)(temp2 & 0xFF); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_LSB_REG, 1, &temp, 1); - temp = (u8)(temp2 >> 8); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_MSB_REG, 1, &temp, 1); - - /* Set vertical frequency in Hz */ - temp3 = temp1 * temp2; - temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3; - temp1 = (u16)temp3 * 100; - temp = (u8)(temp1 & 0xFF); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_LSB_REG, 1, &temp, 1); - temp = (u8)(temp1 >> 8); - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_MSB_REG, 1, &temp, 1); - - /* Set TPI input bus and pixel repetition data */ - temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE | - TPI_INBUS_RISING_EDGE; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INBUS_FMT_REG, 1, &temp, 1); - - /* Set TPI AVI Input format data */ - temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO | - TPI_INPUT_CLR_RGB; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INPUT_FMT_REG, 1, &temp, 1); - - /* Set TPI AVI Output format data */ - temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO | - TPI_OUTPUT_CLR_HDMI_RGB; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_OUTPUT_FMT_REG, 1, &temp, 1); - - /* Set TPI audio configuration write data */ - temp = TPI_AUDIO_PASS_BASIC; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_HANDING_REG, 1, &temp, 1); - - temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL | - TPI_AUDIO_TYPE_PCM; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_INTF_REG, 1, &temp, 1); - - temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K; - i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1); -#endif - - return 0; -} diff --git a/board/freescale/common/dcu_sii9022a.h b/board/freescale/common/dcu_sii9022a.h deleted file mode 100644 index 7851775..0000000 --- a/board/freescale/common/dcu_sii9022a.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - */ - -#ifndef __DCU_HDMI_SII9022A__ -#define __DCU_HDMI_SII9022A__ - -/* Programming of Silicon SII9022A connector HDMI Transmitter*/ -int dcu_set_dvi_encoder(struct fb_videomode *videomode); - -#endif diff --git a/board/freescale/common/diu_ch7301.c b/board/freescale/common/diu_ch7301.c deleted file mode 100644 index 05e6a3a..0000000 --- a/board/freescale/common/diu_ch7301.c +++ /dev/null @@ -1,217 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2019 NXP - * Authors: Priyanka Jain <Priyanka.Jain@freescale.com> - * Wang Dongsheng <dongsheng.wang@freescale.com> - * - * This file is copied and modified from the original t1040qds/diu.c. - * Encoder can be used in T104x and LSx Platform. - */ - -#include <common.h> -#include <stdio_dev.h> -#include <i2c.h> -#include <linux/delay.h> - -#define I2C_DVI_INPUT_DATA_FORMAT_REG 0x1F -#define I2C_DVI_PLL_CHARGE_CNTL_REG 0x33 -#define I2C_DVI_PLL_DIVIDER_REG 0x34 -#define I2C_DVI_PLL_SUPPLY_CNTL_REG 0x35 -#define I2C_DVI_PLL_FILTER_REG 0x36 -#define I2C_DVI_TEST_PATTERN_REG 0x48 -#define I2C_DVI_POWER_MGMT_REG 0x49 -#define I2C_DVI_LOCK_STATE_REG 0x4D -#define I2C_DVI_SYNC_POLARITY_REG 0x56 - -/* - * Set VSYNC/HSYNC to active high. This is polarity of sync signals - * from DIU->DVI. The DIU default is active igh, so DVI is set to - * active high. - */ -#define I2C_DVI_INPUT_DATA_FORMAT_VAL 0x98 - -#define I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL 0x06 -#define I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL 0x26 -#define I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL 0xA0 -#define I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL 0x08 -#define I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL 0x16 -#define I2C_DVI_PLL_FILTER_LOW_SPEED_VAL 0x60 - -/* Clear test pattern */ -#define I2C_DVI_TEST_PATTERN_VAL 0x18 -/* Exit Power-down mode */ -#define I2C_DVI_POWER_MGMT_VAL 0xC0 - -/* Monitor polarity is handled via DVI Sync Polarity Register */ -#define I2C_DVI_SYNC_POLARITY_VAL 0x00 - -/* Programming of HDMI Chrontel CH7301 connector */ -int diu_set_dvi_encoder(unsigned int pixclock) -{ - int ret; - u8 temp; - - temp = I2C_DVI_TEST_PATTERN_VAL; -#if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *dev; - - ret = i2c_get_chip_for_busnum(CONFIG_SYS_I2C_DVI_BUS_NUM, - CONFIG_SYS_I2C_DVI_ADDR, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - CONFIG_SYS_I2C_DVI_BUS_NUM); - return ret; - } - ret = dm_i2c_write(dev, I2C_DVI_TEST_PATTERN_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select proper dvi test pattern\n"); - return ret; - } - temp = I2C_DVI_INPUT_DATA_FORMAT_VAL; - ret = dm_i2c_write(dev, I2C_DVI_INPUT_DATA_FORMAT_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi input data format\n"); - return ret; - } - - /* Set Sync polarity register */ - temp = I2C_DVI_SYNC_POLARITY_VAL; - ret = dm_i2c_write(dev, I2C_DVI_SYNC_POLARITY_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi syc polarity\n"); - return ret; - } - - /* Set PLL registers based on pixel clock rate*/ - if (pixclock > 65000000) { - temp = I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL; - ret = dm_i2c_write(dev, I2C_DVI_PLL_CHARGE_CNTL_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll charge_cntl\n"); - return ret; - } - temp = I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL; - ret = dm_i2c_write(dev, I2C_DVI_PLL_DIVIDER_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll divider\n"); - return ret; - } - temp = I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL; - ret = dm_i2c_write(dev, I2C_DVI_PLL_FILTER_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll filter\n"); - return ret; - } - } else { - temp = I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL; - ret = dm_i2c_write(dev, I2C_DVI_PLL_CHARGE_CNTL_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll charge_cntl\n"); - return ret; - } - temp = I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL; - ret = dm_i2c_write(dev, I2C_DVI_PLL_DIVIDER_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll divider\n"); - return ret; - } - temp = I2C_DVI_PLL_FILTER_LOW_SPEED_VAL; - ret = dm_i2c_write(dev, I2C_DVI_PLL_FILTER_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll filter\n"); - return ret; - } - } - - temp = I2C_DVI_POWER_MGMT_VAL; - ret = dm_i2c_write(dev, I2C_DVI_POWER_MGMT_REG, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi power mgmt\n"); - return ret; - } -#else - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_TEST_PATTERN_REG, 1, - &temp, 1); - if (ret) { - puts("I2C: failed to select proper dvi test pattern\n"); - return ret; - } - temp = I2C_DVI_INPUT_DATA_FORMAT_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_INPUT_DATA_FORMAT_REG, - 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi input data format\n"); - return ret; - } - - /* Set Sync polarity register */ - temp = I2C_DVI_SYNC_POLARITY_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_SYNC_POLARITY_REG, 1, - &temp, 1); - if (ret) { - puts("I2C: failed to select dvi syc polarity\n"); - return ret; - } - - /* Set PLL registers based on pixel clock rate*/ - if (pixclock > 65000000) { - temp = I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, - I2C_DVI_PLL_CHARGE_CNTL_REG, 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll charge_cntl\n"); - return ret; - } - temp = I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, - I2C_DVI_PLL_DIVIDER_REG, 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll divider\n"); - return ret; - } - temp = I2C_DVI_PLL_FILTER_HIGH_SPEED_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, - I2C_DVI_PLL_FILTER_REG, 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll filter\n"); - return ret; - } - } else { - temp = I2C_DVI_PLL_CHARGE_CNTL_LOW_SPEED_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, - I2C_DVI_PLL_CHARGE_CNTL_REG, 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll charge_cntl\n"); - return ret; - } - temp = I2C_DVI_PLL_DIVIDER_LOW_SPEED_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, - I2C_DVI_PLL_DIVIDER_REG, 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll divider\n"); - return ret; - } - temp = I2C_DVI_PLL_FILTER_LOW_SPEED_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, - I2C_DVI_PLL_FILTER_REG, 1, &temp, 1); - if (ret) { - puts("I2C: failed to select dvi pll filter\n"); - return ret; - } - } - - temp = I2C_DVI_POWER_MGMT_VAL; - ret = i2c_write(CONFIG_SYS_I2C_DVI_ADDR, I2C_DVI_POWER_MGMT_REG, 1, - &temp, 1); - if (ret) { - puts("I2C: failed to select dvi power mgmt\n"); - return ret; - } -#endif - - udelay(500); - - return 0; -} diff --git a/board/freescale/common/diu_ch7301.h b/board/freescale/common/diu_ch7301.h deleted file mode 100644 index f35661c..0000000 --- a/board/freescale/common/diu_ch7301.h +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - */ - -#ifndef __DIU_HDMI_CH7301__ -#define __DIU_HDMI_CH7301__ - -/* Programming of HDMI Chrontel CH7301 connector */ -int diu_set_dvi_encoder(unsigned int pixclock); - -#endif diff --git a/board/freescale/ls1021aiot/Makefile b/board/freescale/ls1021aiot/Makefile index bec151f..587bbd7 100644 --- a/board/freescale/ls1021aiot/Makefile +++ b/board/freescale/ls1021aiot/Makefile @@ -3,5 +3,4 @@ # Copyright 2016 Freescale Semiconductor, Inc. obj-y += ls1021aiot.o -obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/board/freescale/ls1021aiot/dcu.c b/board/freescale/ls1021aiot/dcu.c deleted file mode 100644 index e4fbcbc..0000000 --- a/board/freescale/ls1021aiot/dcu.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2016 Freescale Semiconductor, Inc. - * - * FSL DCU Framebuffer driver - */ - -#include <common.h> -#include <fsl_dcu_fb.h> -#include <asm/global_data.h> -#include "div64.h" -#include "../common/dcu_sii9022a.h" - -DECLARE_GLOBAL_DATA_PTR; - -unsigned int dcu_set_pixel_clock(unsigned int pixclock) -{ - unsigned long long div; - - div = (unsigned long long)(gd->bus_clk / 1000); - div *= (unsigned long long)pixclock; - do_div(div, 1000000000); - - return div; -} - -int platform_dcu_init(struct fb_info *fbinfo, - unsigned int xres, unsigned int yres, - const char *port, - struct fb_videomode *dcu_fb_videomode) -{ - const char *name; - unsigned int pixel_format; - - if (strncmp(port, "twr_lcd", 4) == 0) { - name = "TWR_LCD_RGB card"; - } else { - name = "HDMI"; - dcu_set_dvi_encoder(dcu_fb_videomode); - } - - printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); - - pixel_format = 32; - fsl_dcu_init(fbinfo, xres, yres, pixel_format); - - return 0; -} diff --git a/board/freescale/ls1021aqds/Makefile b/board/freescale/ls1021aqds/Makefile index 1e50e46..6503034 100644 --- a/board/freescale/ls1021aqds/Makefile +++ b/board/freescale/ls1021aqds/Makefile @@ -7,5 +7,4 @@ obj-y += ls1021aqds.o obj-y += ddr.o obj-y += eth.o -obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/board/freescale/ls1021aqds/dcu.c b/board/freescale/ls1021aqds/dcu.c deleted file mode 100644 index b5fee06..0000000 --- a/board/freescale/ls1021aqds/dcu.c +++ /dev/null @@ -1,110 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2019 NXP - * - * FSL DCU Framebuffer driver - */ - -#include <asm/global_data.h> -#include <asm/io.h> -#include <common.h> -#include <fsl_dcu_fb.h> -#include <i2c.h> -#include "../common/i2c_mux.h" -#include "div64.h" -#include "../common/diu_ch7301.h" -#include "ls1021aqds_qixis.h" - -DECLARE_GLOBAL_DATA_PTR; - -unsigned int dcu_set_pixel_clock(unsigned int pixclock) -{ - unsigned long long div; - - div = (unsigned long long)(gd->bus_clk / 1000); - div *= (unsigned long long)pixclock; - do_div(div, 1000000000); - - return div; -} - -int platform_dcu_init(struct fb_info *fbinfo, - unsigned int xres, - unsigned int yres, - const char *port, - struct fb_videomode *dcu_fb_videomode) -{ - const char *name; - unsigned int pixel_format; - int ret; - u8 ch; - - /* Mux I2C3+I2C4 as HSYNC+VSYNC */ -#if CONFIG_IS_ENABLED(DM_I2C) - struct udevice *dev; - - /* QIXIS device mount on I2C1 bus*/ - ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_QIXIS_ADDR, - 1, &dev); - if (ret) { - printf("%s: Cannot find udev for a bus %d\n", __func__, - 0); - return ret; - } - ret = dm_i2c_read(dev, QIXIS_DCU_BRDCFG5, &ch, 1); - if (ret) { - printf("Error: failed to read I2C @%02x\n", - CONFIG_SYS_I2C_QIXIS_ADDR); - return ret; - } - ch &= 0x1F; - ch |= 0xA0; - ret = dm_i2c_write(dev, QIXIS_DCU_BRDCFG5, &ch, 1); - -#else - ret = i2c_read(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5, - 1, &ch, 1); - if (ret) { - printf("Error: failed to read I2C @%02x\n", - CONFIG_SYS_I2C_QIXIS_ADDR); - return ret; - } - ch &= 0x1F; - ch |= 0xA0; - ret = i2c_write(CONFIG_SYS_I2C_QIXIS_ADDR, QIXIS_DCU_BRDCFG5, - 1, &ch, 1); -#endif - if (ret) { - printf("Error: failed to write I2C @%02x\n", - CONFIG_SYS_I2C_QIXIS_ADDR); - return ret; - } - - if (strncmp(port, "hdmi", 4) == 0) { - unsigned long pixval; - - name = "HDMI"; - - pixval = 1000000000 / dcu_fb_videomode->pixclock; - pixval *= 1000; - -#if !CONFIG_IS_ENABLED(DM_I2C) - i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); -#endif - select_i2c_ch_pca9547(I2C_MUX_CH_CH7301, - CONFIG_SYS_I2C_DVI_BUS_NUM); - diu_set_dvi_encoder(pixval); - select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, - CONFIG_SYS_I2C_DVI_BUS_NUM); - } else { - return 0; - } - - printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); - - pixel_format = 32; - fsl_dcu_init(fbinfo, xres, yres, pixel_format); - - return 0; -} diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile index d9a2f52..cfa6c0c 100644 --- a/board/freescale/ls1021atwr/Makefile +++ b/board/freescale/ls1021atwr/Makefile @@ -5,5 +5,4 @@ # obj-y += ls1021atwr.o -obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c deleted file mode 100644 index 7bf283e..0000000 --- a/board/freescale/ls1021atwr/dcu.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * - * FSL DCU Framebuffer driver - */ - -#include <common.h> -#include <fsl_dcu_fb.h> -#include <asm/global_data.h> -#include "div64.h" -#include "../common/dcu_sii9022a.h" - -DECLARE_GLOBAL_DATA_PTR; - -unsigned int dcu_set_pixel_clock(unsigned int pixclock) -{ - unsigned long long div; - - div = (unsigned long long)(gd->bus_clk / 1000); - div *= (unsigned long long)pixclock; - do_div(div, 1000000000); - - return div; -} - -int platform_dcu_init(struct fb_info *fbinfo, - unsigned int xres, unsigned int yres, - const char *port, - struct fb_videomode *dcu_fb_videomode) -{ - const char *name; - unsigned int pixel_format; - - if (strncmp(port, "twr_lcd", 4) == 0) { - name = "TWR_LCD_RGB card"; - } else { - name = "HDMI"; - dcu_set_dvi_encoder(dcu_fb_videomode); - } - - printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); - - pixel_format = 32; - fsl_dcu_init(fbinfo, xres, yres, pixel_format); - - return 0; -} diff --git a/board/freescale/ls1046ardb/MAINTAINERS b/board/freescale/ls1046ardb/MAINTAINERS index efdea22..3c8cfe7 100644 --- a/board/freescale/ls1046ardb/MAINTAINERS +++ b/board/freescale/ls1046ardb/MAINTAINERS @@ -14,3 +14,4 @@ F: configs/ls1046ardb_tfa_SECURE_BOOT_defconfig F: configs/ls1046ardb_SECURE_BOOT_defconfig F: configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig F: configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +F: doc/board/nxp/ls1046ardb.rst diff --git a/board/freescale/ls1046ardb/README b/board/freescale/ls1046ardb/README deleted file mode 100644 index 90c44f4..0000000 --- a/board/freescale/ls1046ardb/README +++ /dev/null @@ -1,76 +0,0 @@ -Overview --------- -The LS1046A Reference Design Board (RDB) is a high-performance computing, -evaluation, and development platform that supports the QorIQ LS1046A -LayerScape Architecture processor. The LS1046ARDB provides SW development -platform for the Freescale LS1046A processor series, with a complete -debugging environment. The LS1046A RDB is lead-free and RoHS-compliant. - -LS1046A SoC Overview --------------------- -Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A -SoC overview. - - LS1046ARDB board Overview - ----------------------- - - SERDES1 Connections, 4 lanes supporting: - - Lane0: 10GBase-R with x1 RJ45 connector - - Lane1: 10GBase-R Cage - - Lane2: SGMII.5 - - Lane3: SGMII.6 - - SERDES2 Connections, 4 lanes supporting: - - Lane0: PCIe1 with miniPCIe slot - - Lane1: PCIe2 with PCIe x2 slot - - Lane2: PCIe3 with PCIe x4 slot - - Lane3: SATA - - DDR Controller - - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s - -IFC/Local Bus - - One 512 MB NAND flash with ECC support - - CPLD connection - - USB 3.0 - - one Type A port, one Micro-AB port - - SDHC: connects directly to a full SD/MMC slot - - DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz) - - 4 I2C controllers - - UART - - Two 4-pin serial ports at up to 115.2 Kbit/s - - Two DB9 D-Type connectors supporting one Serial port each - - ARM JTAG support - -Memory map from core's view ----------------------------- -Start Address End Address Description Size -0x00_0000_0000 - 0x00_000F_FFFF Secure Boot ROM 1MB -0x00_0100_0000 - 0x00_0FFF_FFFF CCSRBAR 240MB -0x00_1000_0000 - 0x00_1000_FFFF OCRAM0 64KB -0x00_1001_0000 - 0x00_1001_FFFF OCRAM1 64KB -0x00_2000_0000 - 0x00_20FF_FFFF DCSR 16MB -0x00_7E80_0000 - 0x00_7E80_FFFF IFC - NAND Flash 64KB -0x00_7FB0_0000 - 0x00_7FB0_0FFF IFC - CPLD 4KB -0x00_8000_0000 - 0x00_FFFF_FFFF DRAM1 2GB -0x05_0000_0000 - 0x05_07FF_FFFF QMAN S/W Portal 128M -0x05_0800_0000 - 0x05_0FFF_FFFF BMAN S/W Portal 128M -0x08_8000_0000 - 0x09_FFFF_FFFF DRAM2 6GB -0x40_0000_0000 - 0x47_FFFF_FFFF PCI Express1 32G -0x48_0000_0000 - 0x4F_FFFF_FFFF PCI Express2 32G -0x50_0000_0000 - 0x57_FFFF_FFFF PCI Express3 32G - -QSPI flash map: -Start Address End Address Description Size -0x00_4000_0000 - 0x00_400F_FFFF RCW + PBI 1MB -0x00_4010_0000 - 0x00_402F_FFFF U-Boot 2MB -0x00_4030_0000 - 0x00_403F_FFFF U-Boot Env 1MB -0x00_4040_0000 - 0x00_405F_FFFF PPA 2MB -0x00_4060_0000 - 0x00_408F_FFFF Secure boot header - + bootscript 3MB -0x00_4090_0000 - 0x00_4093_FFFF FMan ucode 256KB -0x00_4094_0000 - 0x00_4097_FFFF QE/uQE firmware 256KB -0x00_4098_0000 - 0x00_40FF_FFFF Reserved 6MB -0x00_4100_0000 - 0x00_43FF_FFFF FIT Image 48MB - -Booting Options ---------------- -a) QSPI boot -b) SD boot -c) eMMC boot diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c index d0abfe8..f2949cf 100644 --- a/board/freescale/ls1046ardb/ls1046ardb.c +++ b/board/freescale/ls1046ardb/ls1046ardb.c @@ -7,6 +7,8 @@ #include <i2c.h> #include <fdt_support.h> #include <init.h> +#include <semihosting.h> +#include <serial.h> #include <asm/global_data.h> #include <asm/io.h> #include <asm/arch/clock.h> @@ -27,6 +29,15 @@ DECLARE_GLOBAL_DATA_PTR; +struct serial_device *default_serial_console(void) +{ +#if IS_ENABLED(CONFIG_SEMIHOSTING_SERIAL) + if (semihosting_enabled()) + return &serial_smh_device; +#endif + return &eserial1_device; +} + int board_early_init_f(void) { fsl_lsch2_early_init_f(); diff --git a/board/freescale/m5235evb/Kconfig b/board/freescale/m5235evb/Kconfig index fc83419..f0d4c8c 100644 --- a/board/freescale/m5235evb/Kconfig +++ b/board/freescale/m5235evb/Kconfig @@ -12,4 +12,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "M5235EVB" +config NORFLASH_PS32BIT + bool "Board has 32bit CFI flash" + endif diff --git a/board/freescale/mpc837xerdb/Kconfig b/board/freescale/mpc837xerdb/Kconfig index 03415f9..3779625 100644 --- a/board/freescale/mpc837xerdb/Kconfig +++ b/board/freescale/mpc837xerdb/Kconfig @@ -1,5 +1,8 @@ if TARGET_MPC837XERDB +config PCIE + def_bool y + config SYS_BOARD default "mpc837xerdb" diff --git a/board/freescale/mpc8548cds/Kconfig b/board/freescale/mpc8548cds/Kconfig index 09f3b0b..87f3374 100644 --- a/board/freescale/mpc8548cds/Kconfig +++ b/board/freescale/mpc8548cds/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "MPC8548CDS" +config TARGET_MPC8548CDS_LEGACY + bool "Legacy platform support" + endif diff --git a/board/freescale/mx51evk/Makefile b/board/freescale/mx51evk/Makefile index 1a9581c..808e350 100644 --- a/board/freescale/mx51evk/Makefile +++ b/board/freescale/mx51evk/Makefile @@ -5,4 +5,3 @@ # (C) Copyright 2009 Freescale Semiconductor, Inc. obj-y += mx51evk.o -obj-$(CONFIG_VIDEO) += mx51evk_video.o diff --git a/board/freescale/mx53loco/Kconfig b/board/freescale/mx53loco/Kconfig index a690a60..5dcdcd9 100644 --- a/board/freescale/mx53loco/Kconfig +++ b/board/freescale/mx53loco/Kconfig @@ -1,5 +1,8 @@ if TARGET_MX53LOCO +config DIALOG_POWER + def_bool y + config SYS_BOARD default "mx53loco" diff --git a/board/freescale/mx53loco/Makefile b/board/freescale/mx53loco/Makefile index d2ebd94..9befe42 100644 --- a/board/freescale/mx53loco/Makefile +++ b/board/freescale/mx53loco/Makefile @@ -4,4 +4,3 @@ # Jason Liu <r64343@freescale.com> obj-y += mx53loco.o -obj-$(CONFIG_VIDEO) += mx53loco_video.o diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 19ece12..b6f0d20 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -160,6 +160,14 @@ int board_early_init_f(void) return 0; } +#if defined(CONFIG_TARGET_P1020RDB_PC) +#define BOARD_NAME "P1020RDB-PC" +#elif defined(CONFIG_TARGET_P1020RDB_PD) +#define BOARD_NAME "P1020RDB-PD" +#elif defined(CONFIG_TARGET_P2020RDB) +#define BOARD_NAME "P2020RDB-PC" +#endif + int checkboard(void) { struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); @@ -167,7 +175,8 @@ int checkboard(void) u8 in, out, io_config, val; int bus_num = CONFIG_SYS_SPD_BUS_NUM; - printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME, + /* FIXME: This should just use the model from the device tree or similar */ + printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", BOARD_NAME, in_8(&cpld_data->cpld_rev_major) & 0x0F, in_8(&cpld_data->cpld_rev_minor) & 0x0F, in_8(&cpld_data->pcba_rev) & 0x0F); diff --git a/board/freescale/t104xrdb/Makefile b/board/freescale/t104xrdb/Makefile index d67e941..a949501 100644 --- a/board/freescale/t104xrdb/Makefile +++ b/board/freescale/t104xrdb/Makefile @@ -8,7 +8,6 @@ else obj-y += t104xrdb.o obj-y += cpld.o obj-y += eth.o -obj-$(CONFIG_FSL_DIU_FB)+= diu.o endif obj-y += ddr.o obj-y += law.o diff --git a/board/freescale/t104xrdb/diu.c b/board/freescale/t104xrdb/diu.c deleted file mode 100644 index 25c8597..0000000 --- a/board/freescale/t104xrdb/diu.c +++ /dev/null @@ -1,84 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * Author: Priyanka Jain <Priyanka.Jain@freescale.com> - */ - -#include <clock_legacy.h> -#include <asm/io.h> -#include <common.h> -#include <command.h> -#include <fsl_diu_fb.h> -#include <linux/ctype.h> -#include <video_fb.h> - -#include "../common/diu_ch7301.h" - -#include "cpld.h" -#include "t104xrdb.h" - -/* - * DIU Area Descriptor - * - * Note that we need to byte-swap the value before it's written to the AD - * register. So even though the registers don't look like they're in the same - * bit positions as they are on the MPC8610, the same value is written to the - * AD register on the MPC8610 and on the P1022. - */ -#define AD_BYTE_F 0x10000000 -#define AD_ALPHA_C_SHIFT 25 -#define AD_BLUE_C_SHIFT 23 -#define AD_GREEN_C_SHIFT 21 -#define AD_RED_C_SHIFT 19 -#define AD_PIXEL_S_SHIFT 16 -#define AD_COMP_3_SHIFT 12 -#define AD_COMP_2_SHIFT 8 -#define AD_COMP_1_SHIFT 4 -#define AD_COMP_0_SHIFT 0 - -void diu_set_pixel_clock(unsigned int pixclock) -{ - unsigned long speed_ccb, temp; - u32 pixval; - int ret; - - speed_ccb = get_bus_freq(0); - temp = 1000000000 / pixclock; - temp *= 1000; - pixval = speed_ccb / temp; - - /* Program HDMI encoder */ - ret = diu_set_dvi_encoder(temp); - if (ret) { - puts("Failed to set DVI encoder\n"); - return; - } - - /* Program pixel clock */ - out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, - ((pixval << PXCK_BITS_START) & PXCK_MASK)); - - /* enable clock*/ - out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR, PXCKEN_MASK | - ((pixval << PXCK_BITS_START) & PXCK_MASK)); -} - -int platform_diu_init(unsigned int xres, unsigned int yres, const char *port) -{ - u32 pixel_format; - u8 sw; - - /*Configure Display ouput port as HDMI*/ - sw = CPLD_READ(sfp_ctl_status); - CPLD_WRITE(sfp_ctl_status , sw & ~(CPLD_DIU_SEL_DFP)); - - pixel_format = cpu_to_le32(AD_BYTE_F | (3 << AD_ALPHA_C_SHIFT) | - (0 << AD_BLUE_C_SHIFT) | (1 << AD_GREEN_C_SHIFT) | - (2 << AD_RED_C_SHIFT) | (8 << AD_COMP_3_SHIFT) | - (8 << AD_COMP_2_SHIFT) | (8 << AD_COMP_1_SHIFT) | - (8 << AD_COMP_0_SHIFT) | (3 << AD_PIXEL_S_SHIFT)); - - printf("DIU: Switching to monitor DVI @ %ux%u\n", xres, yres); - - return fsl_diu_init(xres, yres, pixel_format, 0); -} diff --git a/board/freescale/t208xqds/Kconfig b/board/freescale/t208xqds/Kconfig index f65d8ee..58a31b6 100644 --- a/board/freescale/t208xqds/Kconfig +++ b/board/freescale/t208xqds/Kconfig @@ -9,6 +9,9 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "T208xQDS" +config SRIO_PCIE_BOOT_SLAVE + bool "Boot as a SRIO PCIe slave device" + source "board/freescale/common/Kconfig" endif diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index ed700f4..4e9d841 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -547,7 +547,7 @@ int last_stage_init(void) int checkboard(void) { - printf("BOARD: %s\n", CONFIG_BOARD_NAME); + printf("BOARD: General Electric Bx50v3\n"); return 0; } diff --git a/board/google/Kconfig b/board/google/Kconfig index 22c4be3..c57e518 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -4,12 +4,16 @@ if VENDOR_GOOGLE +config BIOSEMU + bool + choice prompt "Mainboard model" optional config TARGET_CHROMEBOOK_CORAL bool "Chromebook coral" + select BIOSEMU help This is a range of Intel-based laptops released in 2018. They use an Intel Apollo Lake SoC. The design supports WiFi, 4GB to 16GB of @@ -24,6 +28,7 @@ config TARGET_CHROMEBOOK_CORAL config TARGET_CHROMEBOOK_LINK bool "Chromebook link" + select BIOSEMU help This is the Chromebook Pixel released in 2013. It uses an Intel i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of @@ -36,6 +41,7 @@ config TARGET_CHROMEBOOK_LINK config TARGET_CHROMEBOOK_LINK64 bool "Chromebook link 64-bit" + select BIOSEMU help This is the Chromebook Pixel released in 2013. With this config U-Boot is built as a 64-bit binary. This allows testing while this @@ -43,6 +49,7 @@ config TARGET_CHROMEBOOK_LINK64 config TARGET_CHROMEBOX_PANTHER bool "Chromebox panther (not available)" + select BIOSEMU help Note: At present this must be used with coreboot. See README.x86 for instructions. diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c index 182cf75..9e23f5c 100644 --- a/board/google/chromebook_coral/coral.c +++ b/board/google/chromebook_coral/coral.c @@ -10,6 +10,7 @@ #include <command.h> #include <cros_ec.h> #include <dm.h> +#include <event.h> #include <init.h> #include <log.h> #include <sysinfo.h> @@ -32,11 +33,12 @@ struct cros_gpio_info { int flags; }; -int misc_init_f(void) +static int coral_check_ll_boot(void *ctx, struct event *event) { if (!ll_boot_init()) { printf("Running as secondary loader"); - if (gd->arch.coreboot_table) { + if (CONFIG_IS_ENABLED(COREBOOT_SYSINFO) && + gd->arch.coreboot_table) { int ret; printf(" (found coreboot table at %lx)", @@ -55,6 +57,7 @@ int misc_init_f(void) return 0; } +EVENT_SPY(EVT_MISC_INIT_F, coral_check_ll_boot); int arch_misc_init(void) { diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index ff550f7..67db0c5 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -306,7 +306,7 @@ static int ivm_populate_env(unsigned char *buf, int len, int mac_address_offset) return 0; page2 = &buf[CONFIG_SYS_IVM_EEPROM_PAGE_LEN * 2]; - if (IS_ENABLED(CONFIG_KMTEGR1)) { + if (IS_ENABLED(CONFIG_TARGET_KMTEGR1)) { /* KMTEGR1 has a special setup. eth0 has no connection to the * outside and gets an locally administred MAC address, eth1 is * the debug interface and gets the official MAC address from diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig index c52b365..9d222d7 100644 --- a/board/keymile/km_arm/Kconfig +++ b/board/keymile/km_arm/Kconfig @@ -60,4 +60,27 @@ config BOARD_SPECIFIC_OPTIONS # dummy imply FS_CRAMFS imply CMD_USB +choice + prompt "Board model" + +config KM_COGE5UN + bool "Hitachi Power Grids COGE5UN" + +config KM_KIRKWOOD_128M16 + bool "Hitachi Power Grids Kirkwood 128M16" + +config KM_KIRKWOOD + bool "Hitachi Power Grids Kirkwood" + +config KM_KIRKWOOD_PCI + bool "Hitachi Power Grids Kirkwood PCI" + +config KM_NUSA + bool "Hitachi Power Grids Kirkwood (NUSA)" + +config KM_SUSE2 + bool "Hitachi Power Grids Kirkwood (SUSE2)" + +endchoice + endif diff --git a/board/keymile/kmcent2/kmcent2.c b/board/keymile/kmcent2/kmcent2.c index ca24b96..4486538 100644 --- a/board/keymile/kmcent2/kmcent2.c +++ b/board/keymile/kmcent2/kmcent2.c @@ -6,6 +6,7 @@ * Copyright 2013 Freescale Semiconductor, Inc. */ +#include <event.h> #include <asm/cache.h> #include <asm/fsl_fdt.h> #include <asm/fsl_law.h> @@ -181,7 +182,7 @@ unsigned long get_serial_clock(unsigned long dummy) return (gd->bus_clk / 2); } -int misc_init_f(void) +static int kmcent2_misc_init_f(void *ctx, struct event *event) { /* configure QRIO pis for i2c deblocking */ i2c_deblock_gpio_cfg(); @@ -209,6 +210,7 @@ int misc_init_f(void) return 0; } +EVENT_SPY(EVT_MISC_INIT_F, kmcent2_misc_init_f); #define USED_SRDS_BANK 0 #define EXPECTED_SRDS_RFCK SRDS_PLLCR0_RFCK_SEL_100 diff --git a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c index 467f110..ed8142d 100644 --- a/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c +++ b/board/keymile/pg-wcom-ls102xa/pg-wcom-ls102xa.c @@ -4,6 +4,7 @@ */ #include <common.h> +#include <event.h> #include <i2c.h> #include <asm/io.h> #include <asm/arch/immap_ls102xa.h> @@ -109,12 +110,14 @@ int board_early_init_f(void) return 0; } -int misc_init_f(void) +static int pg_wcom_misc_init_f(void *ctx, struct event *event) { if (IS_ENABLED(CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED)) check_for_uboot_update(); + return 0; } +EVENT_SPY(EVT_MISC_INIT_F, pg_wcom_misc_init_f); int board_init(void) { diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c index 3d22f20..24c0fb2 100644 --- a/board/kosagi/novena/novena_spl.c +++ b/board/kosagi/novena/novena_spl.c @@ -379,30 +379,7 @@ static void novena_spl_setup_iomux_uart(void) imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); } -/* - * Video - */ -#ifdef CONFIG_VIDEO -static iomux_v3_cfg_t hdmi_pads[] = { - /* "Ghost HPD" pin */ - MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL), - - /* LCD_PWR_CTL */ - MX6_PAD_CSI0_DAT10__GPIO5_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* LCD_BL_ON */ - MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), - /* GPIO_PWM1 */ - MX6_PAD_DISP0_DAT8__GPIO4_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void novena_spl_setup_iomux_video(void) -{ - imx_iomux_v3_setup_multiple_pads(hdmi_pads, ARRAY_SIZE(hdmi_pads)); - gpio_direction_input(NOVENA_HDMI_GHOST_HPD); -} -#else static inline void novena_spl_setup_iomux_video(void) {} -#endif /* * SPL boots from uSDHC card diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c index f014165..e787441 100644 --- a/board/logicpd/am3517evm/am3517evm.c +++ b/board/logicpd/am3517evm/am3517evm.c @@ -117,17 +117,10 @@ static void am3517_evm_musb_init(void) */ int misc_init_r(void) { - u32 reset; - omap_die_id_display(); am3517_evm_musb_init(); - /* ensure that the Ethernet module is out of reset */ - reset = readl(AM3517_IP_SW_RESET); - reset &= (~CPGMACSS_SW_RST); - writel(reset, AM3517_IP_SW_RESET); - return 0; } @@ -142,7 +135,6 @@ void set_muxconf_regs(void) MUX_AM3517EVM(); } - #if defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET) int board_eth_init(struct bd_info *bis) { diff --git a/board/logicpd/am3517evm/am3517evm.h b/board/logicpd/am3517evm/am3517evm.h index db2134b..aec2b41 100644 --- a/board/logicpd/am3517evm/am3517evm.h +++ b/board/logicpd/am3517evm/am3517evm.h @@ -122,64 +122,7 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(GPMC_NWP), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(GPMC_WAIT0), (IEN | PTU | EN | M0)) \ MUX_VAL(CP(GPMC_WAIT1), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(GPMC_WAIT2), (IEN | PTU | EN | M4)) /*GPIO_64*/\ - /* - ETH_nRESET*/\ MUX_VAL(CP(GPMC_WAIT3), (IEN | PTU | EN | M0)) \ - /* DSS */\ - MUX_VAL(CP(DSS_PCLK), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_HSYNC), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_VSYNC), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_ACBIAS), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA0), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA1), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA2), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA3), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA4), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA5), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA6), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA7), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA8), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA9), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA10), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA11), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA12), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA13), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA14), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA15), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA16), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA17), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA18), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA19), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA20), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA21), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA22), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(DSS_DATA23), (IDIS | PTD | DIS | M0)) \ - /* CAMERA */\ - MUX_VAL(CP(CAM_HS), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(CAM_VS), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(CAM_XCLKA), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_PCLK), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(CAM_FLD), (IDIS | PTD | DIS | M4)) /*GPIO_98*/\ - /* - CAM_RESET*/\ - MUX_VAL(CP(CAM_D0), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D1), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D2), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D3), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D4), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D5), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D6), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D7), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D8), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D9), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D10), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_D11), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_XCLKB), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(CAM_WEN), (IEN | PTD | DIS | M4)) /*GPIO_167*/\ - MUX_VAL(CP(CAM_STROBE), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(CSI2_DX0), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CSI2_DY0), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CSI2_DX1), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CSI2_DY1), (IEN | PTD | DIS | M0)) \ /* MMC */\ MUX_VAL(CP(MMC1_CLK), (IEN | PTU | EN | M0)) \ MUX_VAL(CP(MMC1_CMD), (IEN | PTU | DIS | M0)) \ @@ -187,144 +130,15 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(MMC1_DAT1), (IEN | PTU | DIS | M0)) \ MUX_VAL(CP(MMC1_DAT2), (IEN | PTU | DIS | M0)) \ MUX_VAL(CP(MMC1_DAT3), (IEN | PTU | DIS | M0)) \ - /* WriteProtect */\ - MUX_VAL(CP(MMC1_DAT4), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(MMC1_DAT5), (IEN | PTU | EN | M4)) /*CardDetect*/\ - MUX_VAL(CP(MMC1_DAT6), (IEN | PTU | EN | M4)) \ - MUX_VAL(CP(MMC1_DAT7), (IEN | PTU | EN | M4)) \ - \ - MUX_VAL(CP(MMC2_CLK), (IEN | PTD | EN | M0)) \ - MUX_VAL(CP(MMC2_CMD), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MMC2_DAT0), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MMC2_DAT1), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MMC2_DAT2), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MMC2_DAT3), (IEN | PTD | DIS | M0)) \ - /* McBSP */\ - MUX_VAL(CP(MCBSP_CLKS), (IEN | PTU | DIS | M0)) \ - MUX_VAL(CP(MCBSP1_CLKR), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP1_FSR), (IDIS | PTU | EN | M0)) \ - MUX_VAL(CP(MCBSP1_DX), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP1_DR), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP1_FSX), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTD | DIS | M0)) \ - \ - MUX_VAL(CP(MCBSP2_FSX), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP2_CLKX), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP2_DR), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP2_DX), (IDIS | PTD | DIS | M0)) \ - \ - MUX_VAL(CP(MCBSP3_DX), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP3_DR), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP3_CLKX), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCBSP3_FSX), (IEN | PTD | DIS | M0)) \ - \ - MUX_VAL(CP(MCBSP4_CLKX), (IDIS | PTD | DIS | M4)) /*GPIO_152*/\ - /* - LCD_INI*/\ - MUX_VAL(CP(MCBSP4_DR), (IDIS | PTD | DIS | M4)) /*GPIO_153*/\ - /* - LCD_ENVDD */\ - MUX_VAL(CP(MCBSP4_DX), (IDIS | PTD | DIS | M4)) /*GPIO_154*/\ - /* - LCD_QVGA/nVGA */\ - MUX_VAL(CP(MCBSP4_FSX), (IDIS | PTD | DIS | M4)) /*GPIO_155*/\ - /* - LCD_RESB */\ /* UART */\ - MUX_VAL(CP(UART1_TX), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(UART1_RTS), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(UART1_CTS), (IEN | PTU | DIS | M0)) \ - \ - MUX_VAL(CP(UART1_RX), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(UART2_CTS), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(UART2_RTS), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(UART2_TX), (IDIS | PTD | DIS | M0)) \ - MUX_VAL(CP(UART2_RX), (IEN | PTD | DIS | M0)) \ - \ MUX_VAL(CP(UART3_CTS_RCTX), (IEN | PTU | DIS | M0)) \ MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) \ MUX_VAL(CP(UART3_RX_IRRX), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \ - /* I2C */\ - MUX_VAL(CP(I2C1_SCL), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C1_SDA), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C2_SCL), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C2_SDA), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C3_SCL), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C3_SDA), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C4_SCL), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(I2C4_SDA), (IEN | PTU | EN | M0)) \ - /* McSPI */\ - MUX_VAL(CP(MCSPI1_CLK), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCSPI1_CS0), (IEN | PTD | EN | M0)) \ - MUX_VAL(CP(MCSPI1_CS1), (IEN | PTD | EN | M4)) /*GPIO_175*/\ - MUX_VAL(CP(MCSPI1_CS2), (IEN | PTU | DIS | M4)) /*GPIO_176*/\ - /* - LAN_INTR*/\ - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) \ - \ - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M4)) \ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M4)) \ - /* CCDC */\ - MUX_VAL(CP(CCDC_PCLK), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(CCDC_FIELD), (IEN | PTD | DIS | M1)) \ - MUX_VAL(CP(CCDC_HD), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(CCDC_VD), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(CCDC_WEN), (IEN | PTD | DIS | M1)) \ - MUX_VAL(CP(CCDC_DATA0), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA1), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA2), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA3), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA4), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA5), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA6), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(CCDC_DATA7), (IEN | PTD | DIS | M0)) \ - /* RMII */\ - MUX_VAL(CP(RMII_MDIO_DATA), (IEN | M0)) \ - MUX_VAL(CP(RMII_MDIO_CLK), (M0)) \ - MUX_VAL(CP(RMII_RXD0) , (IEN | PTD | M0)) \ - MUX_VAL(CP(RMII_RXD1), (IEN | PTD | M0)) \ - MUX_VAL(CP(RMII_CRS_DV), (IEN | PTD | M0)) \ - MUX_VAL(CP(RMII_RXER), (PTD | M0)) \ - MUX_VAL(CP(RMII_TXD0), (PTD | M0)) \ - MUX_VAL(CP(RMII_TXD1), (PTD | M0)) \ - MUX_VAL(CP(RMII_TXEN), (PTD | M0)) \ - MUX_VAL(CP(RMII_50MHZ_CLK), (IEN | PTD | EN | M0)) \ - /* HECC */\ - MUX_VAL(CP(HECC1_TXD), (IEN | PTU | EN | M0)) \ - MUX_VAL(CP(HECC1_RXD), (IEN | PTU | EN | M0)) \ - /* HSUSB */\ - MUX_VAL(CP(HSUSB0_CLK), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_STP), (IDIS | PTU | EN | M0)) \ - MUX_VAL(CP(HSUSB0_DIR), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_NXT), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA0), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA1), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA2), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA3), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA4), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA5), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA6), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(HSUSB0_DATA7), (IEN | PTD | DIS | M0)) \ - MUX_VAL(CP(USB0_DRVBUS), (IEN | PTD | EN | M0)) \ - /* HDQ */\ - MUX_VAL(CP(HDQ_SIO), (IEN | PTU | EN | M0)) \ /* Control and debug */\ MUX_VAL(CP(SYS_32K), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(SYS_CLKREQ), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(SYS_NIRQ), (IEN | PTU | EN | M0)) \ - /*SYS_nRESWARM */\ - MUX_VAL(CP(SYS_NRESWARM), (IDIS | PTU | EN | M4)) \ - /* - GPIO30 */\ - MUX_VAL(CP(SYS_BOOT0), (IEN | PTD | DIS | M4)) /*GPIO_2*/\ - /* - PEN_IRQ */\ - MUX_VAL(CP(SYS_BOOT1), (IEN | PTD | DIS | M4)) /*GPIO_3 */\ - MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /*GPIO_4*/\ - MUX_VAL(CP(SYS_BOOT3), (IEN | PTD | DIS | M4)) /*GPIO_5*/\ - MUX_VAL(CP(SYS_BOOT4), (IEN | PTD | DIS | M4)) /*GPIO_6*/\ - MUX_VAL(CP(SYS_BOOT5), (IEN | PTD | DIS | M4)) /*GPIO_7*/\ - MUX_VAL(CP(SYS_BOOT6), (IDIS | PTD | DIS | M4)) /*GPIO_8*/\ - /* - VIO_1V8*/\ MUX_VAL(CP(SYS_BOOT7), (IEN | PTD | EN | M0)) \ MUX_VAL(CP(SYS_BOOT8), (IEN | PTD | EN | M0)) \ \ @@ -339,18 +153,6 @@ const omap3_sysinfo sysinfo = { MUX_VAL(CP(JTAG_EMU0), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(JTAG_EMU1), (IEN | PTD | DIS | M0)) \ /* ETK (ES2 onwards) */\ - MUX_VAL(CP(ETK_CLK_ES2), (IDIS | PTU | EN | M3)) /*HSUSB1_STP*/\ - MUX_VAL(CP(ETK_CTL_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB1_CLK*/\ - MUX_VAL(CP(ETK_D0_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA0*/\ - MUX_VAL(CP(ETK_D1_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA1*/\ - MUX_VAL(CP(ETK_D2_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA2*/\ - MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA7*/\ - MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA4*/\ - MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA5*/\ - MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA6*/\ - MUX_VAL(CP(ETK_D7_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DATA3*/\ - MUX_VAL(CP(ETK_D8_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_DIR*/\ - MUX_VAL(CP(ETK_D9_ES2), (IEN | PTU | DIS | M3)) /*HSUSB1_NXT*/\ MUX_VAL(CP(ETK_D10_ES2), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(ETK_D11_ES2), (IEN | PTD | DIS | M0)) \ MUX_VAL(CP(ETK_D12_ES2), (IEN | PTD | DIS | M0)) \ diff --git a/board/logicpd/omap3som/omap3logic.h b/board/logicpd/omap3som/omap3logic.h index 3a6f6c1..ba63aa0 100644 --- a/board/logicpd/omap3som/omap3logic.h +++ b/board/logicpd/omap3som/omap3logic.h @@ -233,23 +233,6 @@ void set_muxconf_regs(void) MUX_VAL(CP(D2D_SREAD), (IEN | PTD | DIS | M0)) /*d2d_sread*/ MUX_VAL(CP(D2D_MBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_mbusflag*/ MUX_VAL(CP(D2D_SBUSFLAG), (IEN | PTD | DIS | M0)) /*d2d_sbusflag*/ - -#ifdef CONFIG_USB_EHCI_OMAP /* SOM-LV Uses EHCI-OMAP */ - MUX_VAL(CP(ETK_D14_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA0*/ - MUX_VAL(CP(ETK_D15_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_DATA1*/ - MUX_VAL(CP(MCSPI1_CS3), (IEN | PTD | EN | M0)) /*HSUSB2_DATA2*/ - MUX_VAL(CP(MCSPI2_CS1), (IEN | PTD | EN | M0)) /*HSUSB2_DATA3*/ - MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTD | DIS | M0)) /*HSUSB2_DATA4*/ - MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTD | DIS | M0)) /*HSUSB2_DATA5*/ - MUX_VAL(CP(MCSPI2_CS0), (IEN | PTD | EN | M0)) /*HSUSB2_DATA6*/ - MUX_VAL(CP(MCSPI2_CLK), (IEN | PTD | DIS | M0)) /*HSUSB2_DATA7*/ - MUX_VAL(CP(SYS_BOOT2), (IEN | PTD | DIS | M4)) /* GPIO_4 */ - MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB2_CLK*/ - MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)) /*HSUSB2_STP*/ - MUX_VAL(CP(ETK_D12_ES2), (IEN | PTU | DIS | M3)) /*HSUSB2_DIR*/ - MUX_VAL(CP(ETK_D13_ES2), (IEN | PTD | DIS | M3)) /*HSUSB2_NXT*/ -#endif - } #endif diff --git a/board/phytium/pomelo/Kconfig b/board/phytium/pomelo/Kconfig new file mode 100644 index 0000000..281aa8f --- /dev/null +++ b/board/phytium/pomelo/Kconfig @@ -0,0 +1,12 @@ +if TARGET_POMELO + +config SYS_BOARD + default "pomelo" + +config SYS_VENDOR + default "phytium" + +config SYS_CONFIG_NAME + default "pomelo" + +endif diff --git a/board/phytium/pomelo/MAINTAINERS b/board/phytium/pomelo/MAINTAINERS new file mode 100644 index 0000000..d76a4a0 --- /dev/null +++ b/board/phytium/pomelo/MAINTAINERS @@ -0,0 +1,8 @@ +POMELO BOARD +M: lixinde <lixinde@phytium.com.cn> +M: weichangzheng <weichangzheng@phytium.com.cn> +S: Maintained +F: board/phytium/pomelo/* +F: include/configs/pomelo.h +F: configs/pomelo_defconfig +F: arch/arm/dts/phytium-pomelo.dts diff --git a/board/phytium/pomelo/Makefile b/board/phytium/pomelo/Makefile new file mode 100644 index 0000000..b9cb360 --- /dev/null +++ b/board/phytium/pomelo/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2021 +# lixinde <lixinde@phytium.com.cn> +# weichangzheng <weichangzheng@phytium.com.cn> +# + +obj-y += pomelo.o +obj-y += pll.o +obj-y += pcie.o +obj-y += ddr.o +obj-y += sec.o + + diff --git a/board/phytium/pomelo/cpu.h b/board/phytium/pomelo/cpu.h new file mode 100644 index 0000000..005ea59 --- /dev/null +++ b/board/phytium/pomelo/cpu.h @@ -0,0 +1,73 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2021 + * Phytium Technology Ltd <www.phytium.com> + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#ifndef _FT_POMELO_H +#define _FT_POMELO_H + +/* SMCCC ID */ +#define CPU_SVC_VERSION 0xC2000F00 +#define CPU_GET_RST_SOURCE 0xC2000F01 +#define CPU_INIT_PLL 0xC2000F02 +#define CPU_INIT_PCIE 0xC2000F03 +#define CPU_INIT_MEM 0xC2000F04 +#define CPU_INIT_SEC_SVC 0xC2000F05 + +/*CPU RESET*/ +#define CPU_RESET_POWER_ON 0x1 +#define CPU_RESET_PLL 0x4 +#define CPU_RESET_WATCH_DOG 0x8 + +/* PLL */ +#define PARAMETER_PLL_MAGIC 0x54460010 + +/* PCIE */ +#define PARAMETER_PCIE_MAGIC 0x54460011 +#define CFG_INDEPENDENT_TREE 0x0 +#define PCI_PEU0 0x1 +#define PCI_PEU1 0x1 +#define PEU1_OFFSET 16 +#define PEU_C_OFFSET_MODE 16 +#define PEU_C_OFFSET_SPEED 0 +#define RC_MODE 0x1 +#define X8X8 0x1 +#define GEN3 3 + +/* DDR */ +#define PARAMETER_MCU_MAGIC 0x54460014 +#define PARAM_MCU_VERSION 0x1 +#define PARAM_MCU_SIZE 0x100 +#define PARAM_CH_ENABLE 0x3 +#define PARAM_ECC_ENABLE 0x3 +#define PARAM_FORCE_SPD_DISABLE 0x0 +#define PARAM_MCU_MISC_ENABLE 0x0 + +#define UDIMM_TYPE 0x2 +#define DIMM_X8 0x1 +#define NO_MIRROR 0x0 +#define NO_ECC_TYPE 0 +#define DDR4_TYPE 0xC + +/* SEC */ +#define PARAMETER_COMMON_MAGIC 0x54460013 + +/* FLUSH L3 CASHE */ +#define HNF_COUNT 0x8 +#define HNF_PSTATE_REQ (HNF_BASE + 0x10) +#define HNF_PSTATE_STAT (HNF_BASE + 0x18) +#define HNF_PSTATE_OFF 0x0 +#define HNF_PSTATE_SFONLY 0x1 +#define HNF_PSTATE_HALF 0x2 +#define HNF_PSTATE_FULL 0x3 +#define HNF_STRIDE 0x10000 +#define HNF_BASE (unsigned long)(0x3A200000) +void ddr_init(void); +void sec_init(void); +void check_reset(void); +void pcie_init(void); + +#endif /* _FT_POMELO_H */ diff --git a/board/phytium/pomelo/ddr.c b/board/phytium/pomelo/ddr.c new file mode 100644 index 0000000..c6dbed9 --- /dev/null +++ b/board/phytium/pomelo/ddr.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#include <stdio.h> +#include <linux/arm-smccc.h> +#include <init.h> +#include "cpu.h" + +struct ddr_spd { + /******************* read from spd *****************/ + u8 dimm_type; /* 1: RDIMM;2: UDIMM;3: SODIMM;4: LRDIMM */ + u8 data_width; /* 0: x4; 1: x8; 2: x16 */ + u8 mirror_type;/* 0: stardard; 1: mirror */ + u8 ecc_type; /* 0: no-ecc; 1:ecc */ + u8 dram_type; /* 0xB: DDR3; 0xC: DDR4 */ + u8 rank_num; + u8 row_num; + u8 col_num; + + u8 bg_num; /*only DDR4*/ + u8 bank_num; + u16 module_manufacturer_id; + u16 taamin; + u16 trcdmin; + + u16 trpmin; + u16 trasmin; + u16 trcmin; + u16 tfawmin; + + u16 trrd_smin; /*only DDR4*/ + u16 trrd_lmin; /*only DDR4*/ + u16 tccd_lmin; /*only DDR4*/ + u16 twrmin; + + u16 twtr_smin; /*only DDR4*/ + u16 twtr_lmin; /*only DDR4*/ + u16 twtrmin; /*only DDR3*/ + u16 trrdmin; /*only DDR3*/ + + /******************* RCD control words *****************/ + u8 f0rc03; /*bit[3:2]:CS bit[1:0]:CA */ + u8 f0rc04; /*bit[3:2]:ODT bit[1:0]:CKE */ + u8 f0rc05; /*bit[3:2]:CLK-A side bit[1:0]:CLK-B side */ + u8 bc00; + u8 bc01; + u8 bc02; + u8 bc03; + u8 bc04; + + u8 bc05; + u8 f5bc5x; + u8 f5bc6x; + /******************* LRDIMM special *****************/ + u8 vrefdq_pr0; + u8 vrefdq_mdram; + u8 rtt_mdram_1866; + u8 rtt_mdram_2400; + u8 rtt_mdram_3200; + + u8 drive_dram; + u8 odt_dram_1866; + u8 odt_dram_2400; + u8 odt_dram_3200; + u8 park_dram_1866; + u8 park_dram_2400; + u8 park_dram_3200; + u8 rcd_num; +} __attribute((aligned(4))); + +struct mcu_config { + u32 magic; + u32 version; + u32 size; + u8 rev1[4]; + + u8 ch_enable; + u8 misc1_enable; + u8 misc2_enable; + u8 force_spd_enable; + u8 misc3_enable; + u8 train_debug; + u8 train_recover; + u8 rev2[9]; + + struct ddr_spd ddr_spd_info[2]; +} __attribute((aligned(4))); + +static void get_mcu_up_info_default(struct mcu_config *pm) +{ + pm->magic = PARAMETER_MCU_MAGIC; + pm->version = PARAM_MCU_VERSION; + pm->size = PARAM_MCU_SIZE; + pm->ch_enable = PARAM_CH_ENABLE; + pm->misc1_enable = PARAM_ECC_ENABLE; + pm->force_spd_enable = PARAM_FORCE_SPD_DISABLE; + pm->misc3_enable = PARAM_MCU_MISC_ENABLE; + pm->train_recover = 0x0; +} + +static u8 init_dimm_param(u8 ch, struct mcu_config *pm) +{ + debug("manual config dimm info...\n"); + pm->ddr_spd_info[ch].dimm_type = UDIMM_TYPE; + pm->ddr_spd_info[ch].data_width = DIMM_X8; + pm->ddr_spd_info[ch].mirror_type = NO_MIRROR; + pm->ddr_spd_info[ch].ecc_type = NO_ECC_TYPE; + pm->ddr_spd_info[ch].dram_type = DDR4_TYPE; + pm->ddr_spd_info[ch].rank_num = 1; + pm->ddr_spd_info[ch].row_num = 16; + pm->ddr_spd_info[ch].col_num = 10; + pm->ddr_spd_info[ch].bg_num = 4; + pm->ddr_spd_info[ch].bank_num = 4; + pm->ddr_spd_info[ch].taamin = 13750; + pm->ddr_spd_info[ch].trcdmin = 13750; + + pm->ddr_spd_info[ch].trpmin = 13750; + pm->ddr_spd_info[ch].trasmin = 32000; + pm->ddr_spd_info[ch].trcmin = 45750; + pm->ddr_spd_info[ch].tfawmin = 21000; + + pm->ddr_spd_info[ch].trrd_smin = 3000; + pm->ddr_spd_info[ch].trrd_lmin = 4900; + pm->ddr_spd_info[ch].tccd_lmin = 5000; + pm->ddr_spd_info[ch].twrmin = 15000; + + pm->ddr_spd_info[ch].twtr_smin = 2500; + pm->ddr_spd_info[ch].twtr_lmin = 7500; + + return 0; +} + +void get_default_mcu_info(u8 *data) +{ + get_mcu_up_info_default((struct mcu_config *)data); +} + +void fix_mcu_info(u8 *data) +{ + struct mcu_config *mcu_info = (struct mcu_config *)data; + + for (int ch = 0; ch < 2; ch++) + init_dimm_param(ch, mcu_info); +} + +void ddr_init(void) +{ + u8 buffer[0x100]; + struct arm_smccc_res res; + + get_default_mcu_info(buffer); + fix_mcu_info(buffer); + + arm_smccc_smc(CPU_INIT_MEM, 0, (u64)buffer, 0, 0, 0, 0, 0, &res); + if (res.a0 != 0) + panic("DRAM init failed :0x%lx\n", res.a0); +} diff --git a/board/phytium/pomelo/pcie.c b/board/phytium/pomelo/pcie.c new file mode 100644 index 0000000..698d82f --- /dev/null +++ b/board/phytium/pomelo/pcie.c @@ -0,0 +1,60 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#include <stdio.h> +#include <string.h> +#include <linux/arm-smccc.h> +#include <init.h> +#include "cpu.h" + +struct pcu_ctr { + u32 base_config[3]; + u32 equalization[3]; + u8 rev[80]; +} __attribute((aligned(4))); + +struct pcu_config { + u32 magic; + u32 version; + u32 size; + u8 rev1[4]; + u32 independent_tree; + u32 base_cfg; + u8 rev2[16]; + struct pcu_ctr ctr_cfg[2]; +} __attribute((aligned(4))); + +struct pcu_config const peu_base_info = { + .magic = PARAMETER_PCIE_MAGIC, + .version = 0x2, + .size = 0x100, + .independent_tree = CFG_INDEPENDENT_TREE, + .base_cfg = ((PCI_PEU1 | (X8X8 << 1)) << PEU1_OFFSET | (PCI_PEU0 | (X8X8 << 1))), + .ctr_cfg[0].base_config[0] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED), + .ctr_cfg[0].base_config[1] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED), + .ctr_cfg[0].base_config[2] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED), + .ctr_cfg[1].base_config[0] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED), + .ctr_cfg[1].base_config[1] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED), + .ctr_cfg[1].base_config[2] = (RC_MODE << PEU_C_OFFSET_MODE) | (GEN3 << PEU_C_OFFSET_SPEED), + .ctr_cfg[0].equalization[0] = 0x7, + .ctr_cfg[0].equalization[1] = 0x7, + .ctr_cfg[0].equalization[2] = 0x7, + .ctr_cfg[1].equalization[0] = 0x7, + .ctr_cfg[1].equalization[1] = 0x7, + .ctr_cfg[1].equalization[2] = 0x7, +}; + +void pcie_init(void) +{ + u8 buffer[0x100]; + struct arm_smccc_res res; + + memcpy(buffer, &peu_base_info, sizeof(peu_base_info)); + arm_smccc_smc(CPU_INIT_PCIE, 0, (u64)buffer, 0, 0, 0, 0, 0, &res); + if (res.a0 != 0) + panic("PCIE init failed :0x%lx\n", res.a0); +} diff --git a/board/phytium/pomelo/pll.c b/board/phytium/pomelo/pll.c new file mode 100644 index 0000000..a66ffdd --- /dev/null +++ b/board/phytium/pomelo/pll.c @@ -0,0 +1,73 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#include <stdio.h> +#include <string.h> +#include <asm/io.h> +#include <linux/arm-smccc.h> +#include <init.h> +#include "cpu.h" + +struct pll_config { + u32 magic; + u32 version; + u32 size; + u8 rev1[4]; + u32 core_pll; + u32 res1; + u32 lmu_pll; + u32 res2; + u32 res3; + u32 res4; + u32 res5; +} __attribute((aligned(4))); + +struct pll_config const pll_base_info = { + .magic = PARAMETER_PLL_MAGIC, + .version = 0x1, + .size = 0x30, + .core_pll = 2300, /*MHz*/ + .lmu_pll = 667, /*MHz*/ +}; + +u32 get_reset_source(void) +{ + struct arm_smccc_res res; + + arm_smccc_smc(CPU_GET_RST_SOURCE, 0, 0, 0, 0, 0, 0, 0, &res); + return res.a0; +} + +void pll_init(void) +{ + u8 buffer[0x100]; + struct arm_smccc_res res; + + memcpy(buffer, &pll_base_info, sizeof(pll_base_info)); + arm_smccc_smc(CPU_INIT_PLL, 0, (u64)buffer, 0, 0, 0, 0, 0, &res); + if (res.a0 != 0) + panic("PLL init failed :0x%lx\n", res.a0); +} + +void check_reset(void) +{ + u32 rst; + + rst = get_reset_source(); + + switch (rst) { + case CPU_RESET_POWER_ON: + pll_init(); + break; + case CPU_RESET_PLL: + break; + case CPU_RESET_WATCH_DOG: + break; + default: + panic("other reset source\n"); + } +} diff --git a/board/phytium/pomelo/pomelo.c b/board/phytium/pomelo/pomelo.c new file mode 100644 index 0000000..4fbe1e5 --- /dev/null +++ b/board/phytium/pomelo/pomelo.c @@ -0,0 +1,118 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#include <stdio.h> +#include <command.h> +#include <init.h> +#include <asm/armv8/mmu.h> +#include <asm/io.h> +#include <linux/arm-smccc.h> +#include <scsi.h> +#include <init.h> +#include <asm/u-boot.h> +#include "cpu.h" + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + debug("Phytium ddr init\n"); + ddr_init(); + + gd->mem_clk = 0; + gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE, 0x7b000000); + + sec_init(); + debug("PBF relocate done\n"); + + return 0; +} + +int board_init(void) +{ + return 0; +} + +void reset_cpu(void) +{ + struct arm_smccc_res res; + + debug("run in reset cpu\n"); + arm_smccc_smc(0x84000009, 0, 0, 0, 0, 0, 0, 0, &res); + if (res.a0 != 0) + panic("reset cpu error, %lx\n", res.a0); +} + +int mach_cpu_init(void) +{ + check_reset(); + return 0; +} + +int board_early_init_f(void) +{ + pcie_init(); + return 0; +} + +static struct mm_region pomelo_mem_map[] = { + { + .virt = 0x0UL, + .phys = 0x0UL, + .size = 0x80000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | + PTE_BLOCK_UXN + }, + { + .virt = 0x80000000UL, + .phys = 0x80000000UL, + .size = 0x7b000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_NS | + PTE_BLOCK_INNER_SHARE + }, + { + 0, + } +}; + +struct mm_region *mem_map = pomelo_mem_map; + +int __asm_flush_l3_dcache(void) +{ + int i, pstate; + + for (i = 0; i < HNF_COUNT; i++) + writeq(HNF_PSTATE_SFONLY, HNF_PSTATE_REQ + i * HNF_STRIDE); + for (i = 0; i < HNF_COUNT; i++) { + do { + pstate = readq(HNF_PSTATE_STAT + i * HNF_STRIDE); + } while ((pstate & 0xf) != (HNF_PSTATE_SFONLY << 2)); + } + + for (i = 0; i < HNF_COUNT; i++) + writeq(HNF_PSTATE_FULL, HNF_PSTATE_REQ + i * HNF_STRIDE); + + return 0; +} + +int last_stage_init(void) +{ + int ret; + + /* pci e */ + pci_init(); + /* scsi scan */ + ret = scsi_scan(true); + if (ret) { + printf("scsi scan failed\n"); + return CMD_RET_FAILURE; + } + return ret; +} diff --git a/board/phytium/pomelo/sec.c b/board/phytium/pomelo/sec.c new file mode 100644 index 0000000..aeb3983f --- /dev/null +++ b/board/phytium/pomelo/sec.c @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#include <stdio.h> +#include <string.h> +#include <linux/arm-smccc.h> +#include <init.h> +#include "cpu.h" + +struct common_config { + u32 magic; + u32 version; + u32 size; + u8 rev1[4]; + u64 core_bit_map; +} __attribute((aligned(4))); + +struct common_config const common_base_info = { + .magic = PARAMETER_COMMON_MAGIC, + .version = 0x1, + .core_bit_map = 0x3333, +}; + +void sec_init(void) +{ + u8 buffer[0x100]; + struct arm_smccc_res res; + + memcpy(buffer, &common_base_info, sizeof(common_base_info)); + arm_smccc_smc(CPU_INIT_SEC_SVC, 0, (u64)buffer, 0, 0, 0, 0, 0, &res); + if (res.a0 != 0) + panic("SEC init failed :0x%lx\n", res.a0); +} diff --git a/board/ronetix/pm9263/Kconfig b/board/ronetix/pm9263/Kconfig index 5b47d34..d6b8cac 100644 --- a/board/ronetix/pm9263/Kconfig +++ b/board/ronetix/pm9263/Kconfig @@ -1,5 +1,8 @@ if TARGET_PM9263 +config LCD_IN_PSRAM + def_bool y + config SYS_BOARD default "pm9263" diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c index 5628366..85025f2 100644 --- a/board/siemens/common/board.c +++ b/board/siemens/common/board.c @@ -96,9 +96,6 @@ int board_init(void) #ifdef CONFIG_NAND_CS_INIT board_nand_cs_init(); #endif -#ifdef CONFIG_VIDEO - board_video_init(); -#endif return 0; } diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c index fba678b..4e36a6f 100644 --- a/board/siemens/common/factoryset.c +++ b/board/siemens/common/factoryset.c @@ -276,13 +276,6 @@ int factoryset_read_eeprom(int i2c_addr) printf("DFU USB: VID = 0x%4x, PID = 0x%4x\n", factory_dat.usb_vendor_id, factory_dat.usb_product_id); #endif -#if defined(CONFIG_VIDEO) - if (0 <= get_factory_record_val(cp, size, (uchar *)"DISP1", - (uchar *)"name", factory_dat.disp_name, - MAX_STRING_LENGTH)) { - debug("display name: %s\n", factory_dat.disp_name); - } -#endif if (0 <= get_factory_record_val(cp, size, (uchar *)"DEV", (uchar *)"num", factory_dat.serial, MAX_STRING_LENGTH)) { diff --git a/board/siemens/common/factoryset.h b/board/siemens/common/factoryset.h index 261a217..8fa6c3b 100644 --- a/board/siemens/common/factoryset.h +++ b/board/siemens/common/factoryset.h @@ -17,9 +17,6 @@ struct factorysetcontainer { int usb_vendor_id; int usb_product_id; int pxm50; -#if defined(CONFIG_VIDEO) - unsigned char disp_name[MAX_STRING_LENGTH]; -#endif unsigned char serial[MAX_STRING_LENGTH]; int version; uchar asn[MAX_STRING_LENGTH]; diff --git a/board/siemens/corvus/Kconfig b/board/siemens/corvus/Kconfig index 69fe0f0..7797413 100644 --- a/board/siemens/corvus/Kconfig +++ b/board/siemens/corvus/Kconfig @@ -1,5 +1,8 @@ if TARGET_CORVUS +config AT91_LED + def_bool y + config SYS_BOARD default "corvus" diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c index de52838..47f19bc 100644 --- a/board/siemens/pxm2/board.c +++ b/board/siemens/pxm2/board.c @@ -28,7 +28,6 @@ #include <asm/arch/gpio.h> #include <asm/arch/mmc_host_def.h> #include <asm/arch/sys_proto.h> -#include "../../../drivers/video/da8xx-fb.h" #include <asm/io.h> #include <asm/emif.h> #include <asm/gpio.h> @@ -243,194 +242,6 @@ int board_eth_init(struct bd_info *bis) } #endif /* #if defined(CONFIG_DRIVER_TI_CPSW) */ -#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD) -static struct da8xx_panel lcd_panels[] = { - /* AUO G156XW01 V1 */ - [0] = { - .name = "AUO_G156XW01_V1", - .width = 1376, - .height = 768, - .hfp = 14, - .hbp = 64, - .hsw = 56, - .vfp = 1, - .vbp = 28, - .vsw = 3, - .pxl_clk = 60000000, - .invert_pxl_clk = 0, - }, - /* AUO B101EVN06 V0 */ - [1] = { - .name = "AUO_B101EVN06_V0", - .width = 1280, - .height = 800, - .hfp = 52, - .hbp = 84, - .hsw = 36, - .vfp = 3, - .vbp = 14, - .vsw = 6, - .pxl_clk = 60000000, - .invert_pxl_clk = 0, - }, - /* - * Settings from factoryset - * stored in EEPROM - */ - [2] = { - .name = "factoryset", - .width = 0, - .height = 0, - .hfp = 0, - .hbp = 0, - .hsw = 0, - .vfp = 0, - .vbp = 0, - .vsw = 0, - .pxl_clk = 60000000, - .invert_pxl_clk = 0, - }, -}; - -static const struct display_panel disp_panel = { - WVGA, - 32, - 16, - COLOR_ACTIVE, -}; - -static const struct lcd_ctrl_config lcd_cfg = { - &disp_panel, - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 32, - .fdd = 0x80, - .tft_alt_mode = 0, - .stn_565_mode = 0, - .mono_8bit_mode = 0, - .invert_line_clock = 1, - .invert_frm_clock = 1, - .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, -}; - -static int set_gpio(int gpio, int state) -{ - gpio_request(gpio, "temp"); - gpio_direction_output(gpio, state); - gpio_set_value(gpio, state); - gpio_free(gpio); - return 0; -} - -static int enable_backlight(void) -{ - set_gpio(BOARD_LCD_POWER, 1); - set_gpio(BOARD_BACK_LIGHT, 1); - set_gpio(BOARD_TOUCH_POWER, 1); - return 0; -} - -static int enable_pwm(void) -{ - struct pwmss_regs *pwmss = (struct pwmss_regs *)PWMSS0_BASE; - struct pwmss_ecap_regs *ecap; - int ticks = PWM_TICKS; - int duty = PWM_DUTY; - - ecap = (struct pwmss_ecap_regs *)AM33XX_ECAP0_BASE; - /* enable clock */ - setbits_le32(&pwmss->clkconfig, ECAP_CLK_EN); - /* TimeStam Counter register */ - writel(0xdb9, &ecap->tsctr); - /* config period */ - writel(ticks - 1, &ecap->cap3); - writel(ticks - 1, &ecap->cap1); - setbits_le16(&ecap->ecctl2, - (ECTRL2_MDSL_ECAP | ECTRL2_SYNCOSEL_MASK | 0xd0)); - /* config duty */ - writel(duty, &ecap->cap2); - writel(duty, &ecap->cap4); - /* start */ - setbits_le16(&ecap->ecctl2, ECTRL2_CTRSTP_FREERUN); - return 0; -} - -static struct dpll_regs dpll_lcd_regs = { - .cm_clkmode_dpll = CM_WKUP + 0x98, - .cm_idlest_dpll = CM_WKUP + 0x48, - .cm_clksel_dpll = CM_WKUP + 0x54, -}; - -/* no console on this board */ -int board_cfb_skip(void) -{ - return 1; -} - -#define PLL_GET_M(v) ((v >> 8) & 0x7ff) -#define PLL_GET_N(v) (v & 0x7f) - -static int get_clk(struct dpll_regs *dpll_regs) -{ - unsigned int val; - unsigned int m, n; - int f = 0; - - val = readl(dpll_regs->cm_clksel_dpll); - m = PLL_GET_M(val); - n = PLL_GET_N(val); - f = (m * V_OSCK) / n; - - return f; -}; - -int clk_get(int clk) -{ - return get_clk(&dpll_lcd_regs); -}; - -static int conf_disp_pll(int m, int n) -{ - struct cm_perpll *cmper = (struct cm_perpll *)CM_PER; - struct cm_dpll *cmdpll = (struct cm_dpll *)CM_DPLL; - struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1}; - - u32 *const clk_domains[] = { - &cmper->lcdclkctrl, - 0 - }; - u32 *const clk_modules_explicit_en[] = { - &cmper->lcdclkctrl, - &cmper->lcdcclkstctrl, - &cmper->epwmss0clkctrl, - 0 - }; - do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); - writel(0x0, &cmdpll->clklcdcpixelclk); - - do_setup_dpll(&dpll_lcd_regs, &dpll_lcd); - - return 0; -} - -static int board_video_init(void) -{ - conf_disp_pll(24, 1); - if (factory_dat.pxm50) - da8xx_video_init(&lcd_panels[0], &lcd_cfg, lcd_cfg.bpp); - else - da8xx_video_init(&lcd_panels[1], &lcd_cfg, lcd_cfg.bpp); - - enable_pwm(); - enable_backlight(); - - return 0; -} -#endif - #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c index e0f232d..a8b196a 100644 --- a/board/siemens/rut/board.c +++ b/board/siemens/rut/board.c @@ -37,7 +37,6 @@ #include <linux/delay.h> #include "board.h" #include "../common/factoryset.h" -#include "../../../drivers/video/da8xx-fb.h" /* * Read header information from EEPROM into global structure. @@ -224,252 +223,6 @@ void hw_watchdog_init(void) } #endif /* defined(CONFIG_HW_WATCHDOG) */ -#if defined(CONFIG_VIDEO) && !defined(CONFIG_SPL_BUILD) -static struct da8xx_panel lcd_panels[] = { - /* FORMIKE, 4.3", 480x800, KWH043MC17-F01 */ - [0] = { - .name = "KWH043MC17-F01", - .width = 480, - .height = 800, - .hfp = 50, /* no spec, "don't care" values */ - .hbp = 50, - .hsw = 50, - .vfp = 50, - .vbp = 50, - .vsw = 50, - .pxl_clk = 35910000, /* tCYCD=20ns, max 50MHz, 60fps */ - .invert_pxl_clk = 1, - }, - /* FORMIKE, 4.3", 480x800, KWH043ST20-F01 */ - [1] = { - .name = "KWH043ST20-F01", - .width = 480, - .height = 800, - .hfp = 50, /* no spec, "don't care" values */ - .hbp = 50, - .hsw = 50, - .vfp = 50, - .vbp = 50, - .vsw = 50, - .pxl_clk = 35910000, /* tCYCD=20ns, max 50MHz, 60fps */ - .invert_pxl_clk = 1, - }, - /* Multi-Inno, 4.3", 480x800, MI0430VT-1 */ - [2] = { - .name = "MI0430VT-1", - .width = 480, - .height = 800, - .hfp = 50, /* no spec, "don't care" values */ - .hbp = 50, - .hsw = 50, - .vfp = 50, - .vbp = 50, - .vsw = 50, - .pxl_clk = 35910000, /* tCYCD=20ns, max 50MHz, 60fps */ - .invert_pxl_clk = 1, - }, -}; - -static const struct display_panel disp_panels[] = { - [0] = { - WVGA, - 16, /* RGB 888 */ - 16, - COLOR_ACTIVE, - }, - [1] = { - WVGA, - 16, /* RGB 888 */ - 16, - COLOR_ACTIVE, - }, - [2] = { - WVGA, - 24, /* RGB 888 */ - 16, - COLOR_ACTIVE, - }, -}; - -static const struct lcd_ctrl_config lcd_cfgs[] = { - [0] = { - &disp_panels[0], - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 16, - .fdd = 0x80, - .tft_alt_mode = 0, - .stn_565_mode = 0, - .mono_8bit_mode = 0, - .invert_line_clock = 1, - .invert_frm_clock = 1, - .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, - }, - [1] = { - &disp_panels[1], - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 16, - .fdd = 0x80, - .tft_alt_mode = 0, - .stn_565_mode = 0, - .mono_8bit_mode = 0, - .invert_line_clock = 1, - .invert_frm_clock = 1, - .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, - }, - [2] = { - &disp_panels[2], - .ac_bias = 255, - .ac_bias_intrpt = 0, - .dma_burst_sz = 16, - .bpp = 24, - .fdd = 0x80, - .tft_alt_mode = 0, - .stn_565_mode = 0, - .mono_8bit_mode = 0, - .invert_line_clock = 1, - .invert_frm_clock = 1, - .sync_edge = 0, - .sync_ctrl = 1, - .raster_order = 0, - }, - -}; - -/* no console on this board */ -int board_cfb_skip(void) -{ - return 1; -} - -#define PLL_GET_M(v) ((v >> 8) & 0x7ff) -#define PLL_GET_N(v) (v & 0x7f) - -static struct dpll_regs dpll_lcd_regs = { - .cm_clkmode_dpll = CM_WKUP + 0x98, - .cm_idlest_dpll = CM_WKUP + 0x48, - .cm_clksel_dpll = CM_WKUP + 0x54, -}; - -static int get_clk(struct dpll_regs *dpll_regs) -{ - unsigned int val; - unsigned int m, n; - int f = 0; - - val = readl(dpll_regs->cm_clksel_dpll); - m = PLL_GET_M(val); - n = PLL_GET_N(val); - f = (m * V_OSCK) / n; - - return f; -}; - -int clk_get(int clk) -{ - return get_clk(&dpll_lcd_regs); -}; - -static int conf_disp_pll(int m, int n) -{ - struct cm_perpll *cmper = (struct cm_perpll *)CM_PER; - struct dpll_params dpll_lcd = {m, n, -1, -1, -1, -1, -1}; -#if defined(DISPL_PLL_SPREAD_SPECTRUM) - struct cm_wkuppll *cmwkup = (struct cm_wkuppll *)CM_WKUP; -#endif - - u32 *const clk_domains[] = { - &cmper->lcdclkctrl, - 0 - }; - u32 *const clk_modules_explicit_en[] = { - &cmper->lcdclkctrl, - &cmper->lcdcclkstctrl, - &cmper->spi1clkctrl, - 0 - }; - do_enable_clocks(clk_domains, clk_modules_explicit_en, 1); - - do_setup_dpll(&dpll_lcd_regs, &dpll_lcd); - -#if defined(DISPL_PLL_SPREAD_SPECTRUM) - writel(0x64, &cmwkup->resv6[3]); /* 0x50 */ - writel(0x800, &cmwkup->resv6[2]); /* 0x4c */ - writel(readl(&cmwkup->clkmoddplldisp) | CM_CLKMODE_DPLL_SSC_EN_MASK, - &cmwkup->clkmoddplldisp); /* 0x98 */ -#endif - return 0; -} - -static int set_gpio(int gpio, int state) -{ - gpio_request(gpio, "temp"); - gpio_direction_output(gpio, state); - gpio_set_value(gpio, state); - gpio_free(gpio); - return 0; -} - -static int enable_lcd(void) -{ - unsigned char buf[1]; - - set_gpio(BOARD_LCD_RESET, 0); - mdelay(1); - set_gpio(BOARD_LCD_RESET, 1); - mdelay(1); - - /* spi lcd init */ - kwh043st20_f01_spi_startup(1, 0, 5000000, SPI_MODE_0); - - /* backlight on */ - buf[0] = 0xf; - i2c_write(0x24, 0x7, 1, buf, 1); - buf[0] = 0x3f; - i2c_write(0x24, 0x8, 1, buf, 1); - return 0; -} - -int arch_early_init_r(void) -{ - enable_lcd(); - return 0; -} - -static int board_video_init(void) -{ - int i; - int anzdisp = ARRAY_SIZE(lcd_panels); - int display = 1; - - for (i = 0; i < anzdisp; i++) { - if (strncmp((const char *)factory_dat.disp_name, - lcd_panels[i].name, - strlen((const char *)factory_dat.disp_name)) == 0) { - printf("DISPLAY: %s\n", factory_dat.disp_name); - break; - } - } - if (i == anzdisp) { - i = 1; - printf("%s: %s not found, using default %s\n", __func__, - factory_dat.disp_name, lcd_panels[i].name); - } - conf_disp_pll(24, 1); - da8xx_video_init(&lcd_panels[display], &lcd_cfgs[display], - lcd_cfgs[display].bpp); - - return 0; -} -#endif /* ifdef CONFIG_VIDEO */ - #ifdef CONFIG_BOARD_LATE_INIT int board_late_init(void) { diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index f6a3cc1..3430a1e 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -26,7 +26,6 @@ #include <fdt_support.h> #include <asm/io.h> #include <i2c.h> -#include <video_fb.h> #include "upm_table.h" DECLARE_GLOBAL_DATA_PTR; diff --git a/board/sysam/stmark2/Kconfig b/board/sysam/stmark2/Kconfig index 87ab7ab..4abcdb3 100644 --- a/board/sysam/stmark2/Kconfig +++ b/board/sysam/stmark2/Kconfig @@ -1,5 +1,12 @@ if TARGET_STMARK2 +config CF_SBF + def_bool y + +config SYS_INPUT_CLKSRC + hex + default 30000000 + config SYS_CPU default "mcf5445x" diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c index 888a958..847d596 100644 --- a/board/ti/beagle/beagle.c +++ b/board/ti/beagle/beagle.c @@ -447,6 +447,8 @@ int misc_init_r(void) env_set(expansion_config.env_var, expansion_config.env_setting); twl4030_power_init(); + twl4030_power_mmc_init(0); + switch (get_board_revision()) { case REVISION_XM_AB: twl4030_led_init(TWL4030_LED_LEDEN_LEDBON); @@ -499,17 +501,3 @@ void set_muxconf_regs(void) { MUX_BEAGLE(); } - -#if defined(CONFIG_MMC) -int board_mmc_init(struct bd_info *bis) -{ - return omap_mmc_init(0, 0, 0, -1, -1); -} -#endif - -#if defined(CONFIG_MMC) -void board_mmc_power_init(void) -{ - twl4030_power_mmc_init(0); -} -#endif diff --git a/board/toradex/colibri_vf/Makefile b/board/toradex/colibri_vf/Makefile index 6272a77..9be2cbc 100644 --- a/board/toradex/colibri_vf/Makefile +++ b/board/toradex/colibri_vf/Makefile @@ -3,4 +3,3 @@ # Copyright 2013 Freescale Semiconductor, Inc. obj-y := colibri_vf.o -obj-$(CONFIG_VIDEO_FSL_DCU_FB) += dcu.o diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c index c09591e..dcef2db 100644 --- a/board/toradex/colibri_vf/colibri_vf.c +++ b/board/toradex/colibri_vf/colibri_vf.c @@ -19,7 +19,6 @@ #include <asm/io.h> #include <env.h> #include <fdt_support.h> -#include <fsl_dcu_fb.h> #include <g_dnl.h> #include <jffs2/load_kernel.h> #include <mtd_node.h> @@ -205,49 +204,6 @@ static void setup_iomux_gpio(void) } #endif -#ifdef CONFIG_VIDEO_FSL_DCU_FB -static void setup_iomux_fsl_dcu(void) -{ - static const iomux_v3_cfg_t dcu0_pads[] = { - VF610_PAD_PTE0__DCU0_HSYNC, - VF610_PAD_PTE1__DCU0_VSYNC, - VF610_PAD_PTE2__DCU0_PCLK, - VF610_PAD_PTE4__DCU0_DE, - VF610_PAD_PTE5__DCU0_R0, - VF610_PAD_PTE6__DCU0_R1, - VF610_PAD_PTE7__DCU0_R2, - VF610_PAD_PTE8__DCU0_R3, - VF610_PAD_PTE9__DCU0_R4, - VF610_PAD_PTE10__DCU0_R5, - VF610_PAD_PTE11__DCU0_R6, - VF610_PAD_PTE12__DCU0_R7, - VF610_PAD_PTE13__DCU0_G0, - VF610_PAD_PTE14__DCU0_G1, - VF610_PAD_PTE15__DCU0_G2, - VF610_PAD_PTE16__DCU0_G3, - VF610_PAD_PTE17__DCU0_G4, - VF610_PAD_PTE18__DCU0_G5, - VF610_PAD_PTE19__DCU0_G6, - VF610_PAD_PTE20__DCU0_G7, - VF610_PAD_PTE21__DCU0_B0, - VF610_PAD_PTE22__DCU0_B1, - VF610_PAD_PTE23__DCU0_B2, - VF610_PAD_PTE24__DCU0_B3, - VF610_PAD_PTE25__DCU0_B4, - VF610_PAD_PTE26__DCU0_B5, - VF610_PAD_PTE27__DCU0_B6, - VF610_PAD_PTE28__DCU0_B7, - }; - - imx_iomux_v3_setup_multiple_pads(dcu0_pads, ARRAY_SIZE(dcu0_pads)); -} - -static void setup_tcon(void) -{ - setbits_le32(TCON0_BASE_ADDR, (1 << 29)); -} -#endif - static inline int is_colibri_vf61(void) { struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR; @@ -353,11 +309,6 @@ static void clock_init(void) CCM_CSCDR3_NFC_PRE_DIV(3)); clrsetbits_le32(&ccm->cscmr2, CCM_REG_CTRL_MASK, CCM_CSCMR2_RMII_CLK_SEL(2)); - -#ifdef CONFIG_VIDEO_FSL_DCU_FB - setbits_le32(&ccm->ccgr1, CCM_CCGR1_TCON0_CTRL_MASK); - setbits_le32(&ccm->ccgr3, CCM_CCGR3_DCU0_CTRL_MASK); -#endif } static void mscm_init(void) @@ -378,11 +329,6 @@ int board_early_init_f(void) setup_iomux_gpio(); #endif -#ifdef CONFIG_VIDEO_FSL_DCU_FB - setup_tcon(); - setup_iomux_fsl_dcu(); -#endif - return 0; } @@ -433,9 +379,6 @@ int checkboard(void) #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) int ft_board_setup(void *blob, struct bd_info *bd) { -#if defined(CONFIG_VIDEO_FSL_DCU_FB) && !defined(CONFIG_DM_VIDEO) - int ret = 0; -#endif #ifdef CONFIG_FDT_FIXUP_PARTITIONS static const struct node_info nodes[] = { { "fsl,vf610-nfc", MTD_DEV_TYPE_NAND, }, /* NAND flash */ @@ -445,11 +388,6 @@ int ft_board_setup(void *blob, struct bd_info *bd) puts(" Updating MTD partitions...\n"); fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); #endif -#if defined(CONFIG_VIDEO_FSL_DCU_FB) && !defined(CONFIG_DM_VIDEO) - ret = fsl_dcu_fixedfb_setup(blob); - if (ret) - return ret; -#endif return ft_common_board_setup(blob, bd); } diff --git a/board/toradex/colibri_vf/dcu.c b/board/toradex/colibri_vf/dcu.c deleted file mode 100644 index c688ed7..0000000 --- a/board/toradex/colibri_vf/dcu.c +++ /dev/null @@ -1,38 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2017 Toradex AG - * - * FSL DCU platform driver - */ - -#include <asm/arch/crm_regs.h> -#include <asm/io.h> -#include <common.h> -#include <fsl_dcu_fb.h> -#include "div64.h" - -unsigned int dcu_set_pixel_clock(unsigned int pixclock) -{ - struct ccm_reg *ccm = (struct ccm_reg *)CCM_BASE_ADDR; - unsigned long long div; - - clrbits_le32(&ccm->cscmr1, CCM_CSCMR1_DCU0_CLK_SEL); - clrsetbits_le32(&ccm->cscdr3, - CCM_CSCDR3_DCU0_DIV_MASK | CCM_CSCDR3_DCU0_EN, - CCM_CSCDR3_DCU0_DIV(0) | CCM_CSCDR3_DCU0_EN); - div = (unsigned long long)(PLL1_PFD2_FREQ / 1000); - do_div(div, pixclock); - - return div; -} - -int platform_dcu_init(struct fb_info *fbinfo, - unsigned int xres, - unsigned int yres, - const char *port, - struct fb_videomode *dcu_fb_videomode) -{ - fsl_dcu_init(fbinfo, xres, yres, 32); - - return 0; -} diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c index 0068cb8..0769189 100644 --- a/board/xilinx/common/board.c +++ b/board/xilinx/common/board.c @@ -171,6 +171,7 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, { int i, ret, eeprom_size; u8 *fru_content; + u8 id = 0; /* FIXME this is shortcut - if eeprom type is wrong it will fail */ eeprom_size = i2c_eeprom_size(dev); @@ -218,6 +219,14 @@ static int xilinx_read_eeprom_fru(struct udevice *dev, char *name, sizeof(desc->revision)); strncpy(desc->serial, (char *)fru_data.brd.serial_number, sizeof(desc->serial)); + + while (id < EEPROM_HDR_NO_OF_MAC_ADDR) { + if (is_valid_ethaddr((const u8 *)fru_data.mac.macid[id])) + memcpy(&desc->mac_addr[id], + (char *)fru_data.mac.macid[id], ETH_ALEN); + id++; + } + desc->header = EEPROM_HEADER_MAGIC; end: @@ -416,7 +425,7 @@ int board_late_init_xilinx(void) for (i = 0; i < EEPROM_HDR_NO_OF_MAC_ADDR; i++) { if (!desc->mac_addr[i]) - continue; + break; if (is_valid_ethaddr((const u8 *)desc->mac_addr[i])) ret |= eth_env_set_enetaddr_by_index("eth", diff --git a/board/xilinx/common/fru.h b/board/xilinx/common/fru.h index e728470..59f6b72 100644 --- a/board/xilinx/common/fru.h +++ b/board/xilinx/common/fru.h @@ -6,6 +6,7 @@ #ifndef __FRU_H #define __FRU_H +#include <net.h> struct fru_common_hdr { u8 version; @@ -19,6 +20,7 @@ struct fru_common_hdr { }; #define FRU_BOARD_MAX_LEN 32 +#define FRU_MAX_NO_OF_MAC_ADDR 4 struct __packed fru_board_info_header { u8 ver; @@ -56,9 +58,24 @@ struct fru_board_data { u8 uuid[FRU_BOARD_MAX_LEN]; }; +struct fru_multirec_hdr { + u8 rec_type; + u8 type; + u8 len; + u8 csum; + u8 hdr_csum; +}; + +struct fru_multirec_mac { + u8 xlnx_iana_id[3]; + u8 ver; + u8 macid[FRU_MAX_NO_OF_MAC_ADDR][ETH_ALEN]; +}; + struct fru_table { struct fru_common_hdr hdr; struct fru_board_data brd; + struct fru_multirec_mac mac; bool captured; }; @@ -69,6 +86,10 @@ struct fru_table { #define FRU_LANG_CODE_ENGLISH 0 #define FRU_LANG_CODE_ENGLISH_1 25 #define FRU_TYPELEN_EOF 0xC1 +#define FRU_MULTIREC_TYPE_OEM 0xD2 +#define FRU_MULTIREC_MAC_OFFSET 4 +#define FRU_LAST_REC BIT(7) +#define FRU_DUT_MACID 0x31 /* This should be minimum of fields */ #define FRU_BOARD_AREA_TOTAL_FIELDS 5 diff --git a/board/xilinx/common/fru_ops.c b/board/xilinx/common/fru_ops.c index 6ed63bb..49846ae 100644 --- a/board/xilinx/common/fru_ops.c +++ b/board/xilinx/common/fru_ops.c @@ -9,6 +9,7 @@ #include <fdtdec.h> #include <log.h> #include <malloc.h> +#include <net.h> #include <asm/io.h> #include <asm/arch/hardware.h> @@ -39,12 +40,20 @@ static int fru_check_language(u8 code) u8 fru_checksum(u8 *addr, u8 len) { u8 checksum = 0; + u8 cnt = len; while (len--) { + if (*addr == 0) + cnt--; + checksum += *addr; addr++; } + /* If all data bytes are 0's return error */ + if (!cnt) + return EINVAL; + return checksum; } @@ -210,10 +219,43 @@ static int fru_parse_board(unsigned long addr) return 0; } +static int fru_parse_multirec(unsigned long addr) +{ + struct fru_multirec_hdr mrc; + u8 checksum = 0; + u8 hdr_len = sizeof(struct fru_multirec_hdr); + int mac_len = 0; + + debug("%s: multirec addr %lx\n", __func__, addr); + + do { + memcpy(&mrc.rec_type, (void *)addr, hdr_len); + + checksum = fru_checksum((u8 *)addr, hdr_len); + if (checksum) { + debug("%s header CRC error\n", __func__); + return -EINVAL; + } + + if (mrc.rec_type == FRU_MULTIREC_TYPE_OEM) { + struct fru_multirec_mac *mac = (void *)addr + hdr_len; + + if (mac->ver == FRU_DUT_MACID) { + mac_len = mrc.len - FRU_MULTIREC_MAC_OFFSET; + memcpy(&fru_data.mac.macid, mac->macid, mac_len); + } + } + addr += mrc.len + hdr_len; + } while (!(mrc.type & FRU_LAST_REC)); + + return 0; +} + int fru_capture(unsigned long addr) { struct fru_common_hdr *hdr; u8 checksum = 0; + unsigned long multirec_addr = addr; checksum = fru_checksum((u8 *)addr, sizeof(struct fru_common_hdr)); if (checksum) { @@ -222,7 +264,7 @@ int fru_capture(unsigned long addr) } hdr = (struct fru_common_hdr *)addr; - + memset((void *)&fru_data, 0, sizeof(fru_data)); memcpy((void *)&fru_data, (void *)hdr, sizeof(struct fru_common_hdr)); @@ -235,6 +277,11 @@ int fru_capture(unsigned long addr) env_set_hex("fru_addr", addr); + if (hdr->off_multirec) { + multirec_addr += fru_cal_area_len(hdr->off_multirec); + fru_parse_multirec(multirec_addr); + } + return 0; } diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c index a427ac9..f58ecd1 100644 --- a/board/xilinx/microblaze-generic/microblaze-generic.c +++ b/board/xilinx/microblaze-generic/microblaze-generic.c @@ -14,6 +14,8 @@ #include <config.h> #include <env.h> #include <init.h> +#include <image.h> +#include <lmb.h> #include <log.h> #include <asm/global_data.h> #include <dm/lists.h> @@ -36,6 +38,25 @@ int dram_init(void) return 0; }; +ulong board_get_usable_ram_top(ulong total_size) +{ + phys_size_t size; + phys_addr_t reg; + struct lmb lmb; + + /* found enough not-reserved memory to relocated U-Boot */ + lmb_init(&lmb); + lmb_add(&lmb, gd->ram_base, gd->ram_size); + boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob); + size = ALIGN(CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE); + reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE); + + if (!reg) + reg = gd->ram_top - size; + + return reg + size; +} + int board_late_init(void) { ulong max_size; diff --git a/board/xilinx/zynqmp/zynqmp-zcu106-rev1.0/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu106-rev1.0/psu_init_gpl.c new file mode 100644 index 0000000..2ac4e03 --- /dev/null +++ b/board/xilinx/zynqmp/zynqmp-zcu106-rev1.0/psu_init_gpl.c @@ -0,0 +1,842 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (c) Copyright 2015 Xilinx, Inc. All rights reserved. + */ + +#include <asm/arch/psu_init_gpl.h> +#include <xil_io.h> + +static unsigned long psu_pll_init_data(void) +{ + psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4E2C62U); + psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000002U); + psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0048, 0x00003F00U, 0x00000200U); + psu_mask_write(0xFF5E0024, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFF5E0020, 0x00717F00U, 0x00015A00U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000001U, 0x00000000U); + mask_poll(0xFF5E0040, 0x00000001U); + psu_mask_write(0xFF5E0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0044, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0024, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A0020, 0x00717F00U, 0x00014800U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000001U); + psu_mask_write(0xFD1A0020, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0048, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0030, 0xFE7FEDEFU, 0x7E4B0C62U); + psu_mask_write(0xFD1A002C, 0x00717F00U, 0x00014000U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A002C, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000002U); + psu_mask_write(0xFD1A002C, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A004C, 0x00003F00U, 0x00000200U); + psu_mask_write(0xFD1A003C, 0xFE7FEDEFU, 0x7E4B0C82U); + psu_mask_write(0xFD1A0038, 0x00717F00U, 0x00015900U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD1A0038, 0x00000001U, 0x00000000U); + mask_poll(0xFD1A0044, 0x00000004U); + psu_mask_write(0xFD1A0038, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD1A0050, 0x00003F00U, 0x00000300U); + psu_mask_write(0xFD1A0040, 0x8000FFFFU, 0x80008E69U); + + return 1; +} + +static unsigned long psu_clock_init_data(void) +{ + psu_mask_write(0xFF5E005C, 0x063F3F07U, 0x06010C00U); + psu_mask_write(0xFF5E0060, 0x023F3F07U, 0x02010600U); + psu_mask_write(0xFF5E004C, 0x023F3F07U, 0x02031900U); + psu_mask_write(0xFF5E0068, 0x013F3F07U, 0x01010500U); + psu_mask_write(0xFF5E0070, 0x013F3F07U, 0x01010502U); + psu_mask_write(0xFF18030C, 0x00020000U, 0x00000000U); + psu_mask_write(0xFF5E0074, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0078, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0120, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0124, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0088, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E0090, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E009C, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00A4, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00A8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00AC, 0x01003F07U, 0x01000F02U); + psu_mask_write(0xFF5E00B0, 0x01003F07U, 0x01000602U); + psu_mask_write(0xFF5E00B8, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFF5E00C0, 0x013F3F07U, 0x01010A02U); + psu_mask_write(0xFF5E00C4, 0x013F3F07U, 0x01010F00U); + psu_mask_write(0xFF5E00C8, 0x013F3F07U, 0x01010A02U); + psu_mask_write(0xFF5E00CC, 0x013F3F07U, 0x01010A02U); + psu_mask_write(0xFF5E0108, 0x013F3F07U, 0x01011D02U); + psu_mask_write(0xFF5E0104, 0x00000007U, 0x00000000U); + psu_mask_write(0xFF5E0128, 0x01003F07U, 0x01000F00U); + psu_mask_write(0xFD1A00A0, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0070, 0x013F3F07U, 0x01010203U); + psu_mask_write(0xFD1A0074, 0x013F3F07U, 0x01013C00U); + psu_mask_write(0xFD1A007C, 0x013F3F07U, 0x01011303U); + psu_mask_write(0xFD1A0060, 0x03003F07U, 0x03000100U); + psu_mask_write(0xFD1A0068, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A0080, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFD1A0084, 0x07003F07U, 0x07000100U); + psu_mask_write(0xFD1A00B8, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00BC, 0x01003F07U, 0x01000200U); + psu_mask_write(0xFD1A00C0, 0x01003F07U, 0x01000302U); + psu_mask_write(0xFD1A00C4, 0x01003F07U, 0x01000502U); + psu_mask_write(0xFD1A00F8, 0x00003F07U, 0x00000200U); + psu_mask_write(0xFF180380, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD610100, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180300, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF410050, 0x00000001U, 0x00000000U); + + return 1; +} + +static unsigned long psu_ddr_init_data(void) +{ + psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD070000, 0xE30FBE3DU, 0x81040010U); + psu_mask_write(0xFD070010, 0x8000F03FU, 0x00000030U); + psu_mask_write(0xFD070020, 0x000003F3U, 0x00000200U); + psu_mask_write(0xFD070024, 0xFFFFFFFFU, 0x00800000U); + psu_mask_write(0xFD070030, 0x0000007FU, 0x00000000U); + psu_mask_write(0xFD070034, 0x00FFFF1FU, 0x00408410U); + psu_mask_write(0xFD070050, 0x00F1F1F4U, 0x00210000U); + psu_mask_write(0xFD070054, 0x0FFF0FFFU, 0x00000000U); + psu_mask_write(0xFD070060, 0x00000073U, 0x00000001U); + psu_mask_write(0xFD070064, 0x0FFF83FFU, 0x008180BBU); + psu_mask_write(0xFD070070, 0x00000017U, 0x00000010U); + psu_mask_write(0xFD070074, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD0700C4, 0x3F000391U, 0x10000200U); + psu_mask_write(0xFD0700C8, 0x01FF1F3FU, 0x0040051FU); + psu_mask_write(0xFD0700D0, 0xC3FF0FFFU, 0x00020106U); + psu_mask_write(0xFD0700D4, 0x01FF7F0FU, 0x00020000U); + psu_mask_write(0xFD0700D8, 0x0000FF0FU, 0x00002305U); + psu_mask_write(0xFD0700DC, 0xFFFFFFFFU, 0x07300301U); + psu_mask_write(0xFD0700E0, 0xFFFFFFFFU, 0x00200200U); + psu_mask_write(0xFD0700E4, 0x00FF03FFU, 0x00210004U); + psu_mask_write(0xFD0700E8, 0xFFFFFFFFU, 0x000006C0U); + psu_mask_write(0xFD0700EC, 0xFFFF0000U, 0x08190000U); + psu_mask_write(0xFD0700F0, 0x0000003FU, 0x00000010U); + psu_mask_write(0xFD0700F4, 0x00000FFFU, 0x0000066FU); + psu_mask_write(0xFD070100, 0x7F3F7F3FU, 0x11102412U); + psu_mask_write(0xFD070104, 0x001F1F7FU, 0x0004041AU); + psu_mask_write(0xFD070108, 0x3F3F3F3FU, 0x0708060EU); + psu_mask_write(0xFD07010C, 0x3FF3F3FFU, 0x0050400CU); + psu_mask_write(0xFD070110, 0x1F0F0F1FU, 0x08030409U); + psu_mask_write(0xFD070114, 0x0F0F3F1FU, 0x06060403U); + psu_mask_write(0xFD070118, 0x0F0F000FU, 0x01010004U); + psu_mask_write(0xFD07011C, 0x00000F0FU, 0x00000606U); + psu_mask_write(0xFD070120, 0x7F7F7F7FU, 0x04040D07U); + psu_mask_write(0xFD070124, 0x40070F3FU, 0x0002030BU); + psu_mask_write(0xFD07012C, 0x7F1F031FU, 0x1207010EU); + psu_mask_write(0xFD070130, 0x00030F1FU, 0x00020608U); + psu_mask_write(0xFD070180, 0xF7FF03FFU, 0x81000040U); + psu_mask_write(0xFD070184, 0x3FFFFFFFU, 0x020196DCU); + psu_mask_write(0xFD070190, 0x1FBFBF3FU, 0x048B820BU); + psu_mask_write(0xFD070194, 0xF31F0F0FU, 0x00030304U); + psu_mask_write(0xFD070198, 0x0FF1F1F1U, 0x07000101U); + psu_mask_write(0xFD07019C, 0x000000F1U, 0x00000021U); + psu_mask_write(0xFD0701A0, 0xC3FF03FFU, 0x00400003U); + psu_mask_write(0xFD0701A4, 0x00FF00FFU, 0x00C800FFU); + psu_mask_write(0xFD0701B0, 0x00000007U, 0x00000000U); + psu_mask_write(0xFD0701B4, 0x00003F3FU, 0x00000909U); + psu_mask_write(0xFD0701C0, 0x00000007U, 0x00000001U); + psu_mask_write(0XFD070200, 0x0000001FU, 0x0000001FU); + psu_mask_write(0XFD070204, 0x001F1F1FU, 0x001F0909U); + psu_mask_write(0XFD070208, 0x0F0F0F0FU, 0x01010100U); + psu_mask_write(0XFD07020C, 0x0F0F0F0FU, 0x01010101U); + psu_mask_write(0XFD070210, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0XFD070214, 0x0F0F0F0FU, 0x070F0707U); + psu_mask_write(0XFD070218, 0x8F0F0F0FU, 0x07070707U); + psu_mask_write(0XFD07021C, 0x00000F0FU, 0x00000F0FU); + psu_mask_write(0XFD070220, 0x00001F1FU, 0x00001F01U); + psu_mask_write(0XFD070224, 0x0F0F0F0FU, 0x07070707U); + psu_mask_write(0XFD070228, 0x0F0F0F0FU, 0x07070707U); + psu_mask_write(0XFD07022C, 0x0000000FU, 0x00000007U); + psu_mask_write(0xFD070240, 0x0F1F0F7CU, 0x06000600U); + psu_mask_write(0xFD070244, 0x00003333U, 0x00000001U); + psu_mask_write(0xFD070250, 0x7FFF3F07U, 0x01002001U); + psu_mask_write(0xFD070264, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD07026C, 0xFF00FFFFU, 0x08000040U); + psu_mask_write(0xFD070280, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070284, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070288, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD07028C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD070290, 0x0000FFFFU, 0x00000000U); + psu_mask_write(0xFD070294, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070300, 0x00000011U, 0x00000000U); + psu_mask_write(0xFD07030C, 0x80000033U, 0x00000000U); + psu_mask_write(0xFD070320, 0x00000001U, 0x00000000U); + psu_mask_write(0xFD070400, 0x00000111U, 0x00000001U); + psu_mask_write(0xFD070404, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070408, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070490, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070494, 0x0033000FU, 0x0020000BU); + psu_mask_write(0xFD070498, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD0704B4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0704B8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070540, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070544, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD070548, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070564, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070568, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0705F0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0705F4, 0x03330F0FU, 0x02000B03U); + psu_mask_write(0xFD0705F8, 0x07FF07FFU, 0x00000000U); + psu_mask_write(0xFD070614, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070618, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706A0, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD0706A4, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706A8, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD0706AC, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD0706B0, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD0706C4, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD0706C8, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070750, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070754, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070758, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07075C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070760, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070774, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070778, 0x000073FFU, 0x0000200FU); + psu_mask_write(0xFD070800, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD070804, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070808, 0x07FF07FFU, 0x0000004FU); + psu_mask_write(0xFD07080C, 0x0033000FU, 0x00100003U); + psu_mask_write(0xFD070810, 0x000007FFU, 0x0000004FU); + psu_mask_write(0xFD070F04, 0x000001FFU, 0x00000000U); + psu_mask_write(0xFD070F08, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD070F0C, 0x000001FFU, 0x00000010U); + psu_mask_write(0xFD070F10, 0x000000FFU, 0x0000000FU); + psu_mask_write(0xFD072190, 0x1FBFBF3FU, 0x07828002U); + psu_mask_write(0xFD1A0108, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD080010, 0xFFFFFFFFU, 0x07001E00U); + psu_mask_write(0xFD080018, 0xFFFFFFFFU, 0x00F10010U); + psu_mask_write(0xFD08001C, 0xFFFFFFFFU, 0x55AA5480U); + psu_mask_write(0xFD080024, 0xFFFFFFFFU, 0x010100F4U); + psu_mask_write(0xFD080040, 0xFFFFFFFFU, 0x42C21590U); + psu_mask_write(0xFD080044, 0xFFFFFFFFU, 0xD05112C0U); + psu_mask_write(0xFD080068, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD080090, 0xFFFFFFFFU, 0x02A04161U); + psu_mask_write(0XFD0800C0, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0800C4, 0xFFFFFFFFU, 0x000000E5U); + psu_mask_write(0xFD080100, 0xFFFFFFFFU, 0x0800040CU); + psu_mask_write(0xFD080110, 0xFFFFFFFFU, 0x07240F08U); + psu_mask_write(0xFD080114, 0xFFFFFFFFU, 0x28200008U); + psu_mask_write(0xFD080118, 0xFFFFFFFFU, 0x000F0300U); + psu_mask_write(0xFD08011C, 0xFFFFFFFFU, 0x83000800U); + psu_mask_write(0xFD080120, 0xFFFFFFFFU, 0x01762B07U); + psu_mask_write(0xFD080124, 0xFFFFFFFFU, 0x00330F08U); + psu_mask_write(0xFD080128, 0xFFFFFFFFU, 0x00000E0FU); + psu_mask_write(0xFD080140, 0xFFFFFFFFU, 0x08400020U); + psu_mask_write(0xFD080144, 0xFFFFFFFFU, 0x00000C80U); + psu_mask_write(0xFD080150, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080154, 0xFFFFFFFFU, 0x00000300U); + psu_mask_write(0xFD080180, 0xFFFFFFFFU, 0x00000630U); + psu_mask_write(0xFD080184, 0xFFFFFFFFU, 0x00000301U); + psu_mask_write(0xFD080188, 0xFFFFFFFFU, 0x00000020U); + psu_mask_write(0xFD08018C, 0xFFFFFFFFU, 0x00000200U); + psu_mask_write(0xFD080190, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080194, 0xFFFFFFFFU, 0x000006C0U); + psu_mask_write(0xFD080198, 0xFFFFFFFFU, 0x00000819U); + psu_mask_write(0xFD0801AC, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD0801B0, 0xFFFFFFFFU, 0x0000004DU); + psu_mask_write(0xFD0801B4, 0xFFFFFFFFU, 0x00000008U); + psu_mask_write(0xFD0801B8, 0xFFFFFFFFU, 0x0000004DU); + psu_mask_write(0xFD0801D8, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080200, 0xFFFFFFFFU, 0x800091C7U); + psu_mask_write(0xFD080204, 0xFFFFFFFFU, 0x00010236U); + psu_mask_write(0xFD080240, 0xFFFFFFFFU, 0x00141054U); + psu_mask_write(0xFD080250, 0xFFFFFFFFU, 0x00088000U); + psu_mask_write(0xFD080414, 0xFFFFFFFFU, 0x12341000U); + psu_mask_write(0xFD0804F4, 0xFFFFFFFFU, 0x00000005U); + psu_mask_write(0xFD080500, 0xFFFFFFFFU, 0x30000028U); + psu_mask_write(0xFD080508, 0xFFFFFFFFU, 0x0A000000U); + psu_mask_write(0xFD08050C, 0xFFFFFFFFU, 0x00000009U); + psu_mask_write(0xFD080510, 0xFFFFFFFFU, 0x0A000000U); + psu_mask_write(0xFD080520, 0xFFFFFFFFU, 0x0300B0CEU); + psu_mask_write(0xFD080528, 0xFFFFFFFFU, 0xF9032019U); + psu_mask_write(0xFD08052C, 0xFFFFFFFFU, 0x07F001E3U); + psu_mask_write(0xFD080544, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080548, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080558, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD08055C, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080560, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080564, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080680, 0xFFFFFFFFU, 0x008AAA58U); + psu_mask_write(0xFD080684, 0xFFFFFFFFU, 0x000079DDU); + psu_mask_write(0xFD080694, 0xFFFFFFFFU, 0x01E10210U); + psu_mask_write(0xFD080698, 0xFFFFFFFFU, 0x01E10000U); + psu_mask_write(0xFD0806A4, 0xFFFFFFFFU, 0x00087BDBU); + psu_mask_write(0xFD080700, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080704, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08070C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080710, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080714, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080718, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080800, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080804, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08080C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080810, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080814, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080818, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080900, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080904, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD08090C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080910, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080914, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080918, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080A00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080A04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0xFD080A0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080A10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080A14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080A18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080B00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080B04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0XFD080B08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080B0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080B10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080B14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080B18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080C00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080C04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0XFD080C08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080C0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080C10, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080C14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080C18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080D00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080D04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0XFD080D08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080D0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080D10, 0xFFFFFFFFU, 0x0E00B004U); + psu_mask_write(0xFD080D14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080D18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080E00, 0xFFFFFFFFU, 0x40800604U); + psu_mask_write(0xFD080E04, 0xFFFFFFFFU, 0x00007FFFU); + psu_mask_write(0XFD080E08, 0xFFFFFFFFU, 0x00000000U); + psu_mask_write(0xFD080E0C, 0xFFFFFFFFU, 0x3F000008U); + psu_mask_write(0xFD080E10, 0xFFFFFFFFU, 0x0E00B03CU); + psu_mask_write(0xFD080E14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080E18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD080F00, 0xFFFFFFFFU, 0x80803660U); + psu_mask_write(0xFD080F04, 0xFFFFFFFFU, 0x55556000U); + psu_mask_write(0xFD080F08, 0xFFFFFFFFU, 0xAAAAAAAAU); + psu_mask_write(0xFD080F0C, 0xFFFFFFFFU, 0x0029A4A4U); + psu_mask_write(0xFD080F10, 0xFFFFFFFFU, 0x0C00B000U); + psu_mask_write(0xFD080F14, 0xFFFFFFFFU, 0x09095555U); + psu_mask_write(0xFD080F18, 0xFFFFFFFFU, 0x09092B2BU); + psu_mask_write(0xFD081400, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081404, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08141C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08142C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081430, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081440, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081444, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08145C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD08146C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081470, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081480, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD081484, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD08149C, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD0814AC, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD0814B0, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD0814C0, 0xFFFFFFFFU, 0x2A019FFEU); + psu_mask_write(0xFD0814C4, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD0814DC, 0xFFFFFFFFU, 0x01264300U); + psu_mask_write(0xFD0814EC, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD0814F0, 0xFFFFFFFFU, 0x70800000U); + psu_mask_write(0xFD081500, 0xFFFFFFFFU, 0x15019FFEU); + psu_mask_write(0xFD081504, 0xFFFFFFFFU, 0x21100000U); + psu_mask_write(0xFD08151C, 0xFFFFFFFFU, 0x01266300U); + psu_mask_write(0xFD08152C, 0xFFFFFFFFU, 0x00041800U); + psu_mask_write(0xFD081530, 0xFFFFFFFFU, 0x70400000U); + psu_mask_write(0xFD0817C4, 0xFFFFFFFFU, 0x01100000U); + psu_mask_write(0xFD0817DC, 0xFFFFFFFFU, 0x012643C4U); + + return 1; +} + +static unsigned long psu_mio_init_data(void) +{ + psu_mask_write(0xFF180000, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180004, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180008, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18001C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180020, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180024, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180028, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18002C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180030, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180034, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180038, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF18003C, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); + psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF18004C, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180050, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180054, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180058, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18005C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180060, 0x000000FEU, 0x00000020U); + psu_mask_write(0xFF180064, 0x000000FEU, 0x00000020U); + psu_mask_write(0xFF180068, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18006C, 0x000000FEU, 0x00000018U); + psu_mask_write(0xFF180070, 0x000000FEU, 0x00000018U); + psu_mask_write(0xFF180074, 0x000000FEU, 0x00000018U); + psu_mask_write(0xFF180078, 0x000000FEU, 0x00000018U); + psu_mask_write(0xFF18007C, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF180080, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180084, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180088, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF18008C, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180090, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180094, 0x000000FEU, 0x00000008U); + psu_mask_write(0xFF180098, 0x000000FEU, 0x00000000U); + psu_mask_write(0xFF18009C, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800A8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800AC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800B0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800B4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800B8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800BC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C0, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C4, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800C8, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800CC, 0x000000FEU, 0x00000010U); + psu_mask_write(0xFF1800D0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800D4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800D8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800DC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800E8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800EC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F0, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F4, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800F8, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF1800FC, 0x000000FEU, 0x00000004U); + psu_mask_write(0xFF180100, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180104, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180108, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18010C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180110, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180114, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180118, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18011C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180120, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180124, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180128, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); + psu_mask_write(0xFF180204, 0xFFFFFFFFU, 0x52240000U); + psu_mask_write(0xFF180208, 0xFFFFFFFFU, 0x00B03000U); + psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); + psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18013C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180140, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180144, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180148, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18014C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180154, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180158, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF18015C, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180160, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180164, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180168, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180170, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180174, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180178, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF18017C, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180180, 0x03FFFFFFU, 0x03FFFFFFU); + psu_mask_write(0xFF180184, 0x03FFFFFFU, 0x00000000U); + psu_mask_write(0xFF180200, 0x0000000FU, 0x00000000U); + + return 1; +} + +static unsigned long psu_peripherals_init_data(void) +{ + psu_mask_write(0xFF5E0238, 0x00100000U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF180390, 0x00000004U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000000U); + psu_mask_write(0xFD1A0100, 0x0001807EU, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000040U, 0x00000000U); + psu_mask_write(0xFF180310, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF180320, 0x33800000U, 0x02800000U); + psu_mask_write(0xFF18031C, 0x7F800000U, 0x63800000U); + psu_mask_write(0xFF180358, 0x00000008U, 0x00000008U); + psu_mask_write(0xFF180324, 0x03C00000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000100U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000600U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00008000U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00007800U, 0x00000000U); + psu_mask_write(0xFF5E0238, 0x00000006U, 0x00000000U); + psu_mask_write(0xFF4B0024, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFFCA5000, 0x00001FFFU, 0x00000000U); + psu_mask_write(0xFD5C0060, 0x000F000FU, 0x00000000U); + psu_mask_write(0xFFA60040, 0x80000000U, 0x80000000U); + psu_mask_write(0xFF260020, 0xFFFFFFFFU, 0x05F5E100U); + psu_mask_write(0xFF260000, 0x00000001U, 0x00000001U); + + return 1; +} + +static unsigned long psu_serdes_init_data(void) +{ + psu_mask_write(0xFD410000, 0x0000001FU, 0x00000009U); + psu_mask_write(0xFD410004, 0x0000001FU, 0x00000009U); + psu_mask_write(0xFD410008, 0x0000001FU, 0x00000008U); + psu_mask_write(0xFD41000C, 0x0000001FU, 0x0000000FU); + psu_mask_write(0xFD402860, 0x00000088U, 0x00000008U); + psu_mask_write(0xFD402864, 0x00000088U, 0x00000008U); + psu_mask_write(0xFD402868, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40286C, 0x00000082U, 0x00000002U); + psu_mask_write(0xFD40A094, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40A368, 0x000000FFU, 0x00000038U); + psu_mask_write(0xFD40A36C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD40E368, 0x000000FFU, 0x000000E0U); + psu_mask_write(0xFD40E36C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD402368, 0x000000FFU, 0x00000058U); + psu_mask_write(0xFD40236C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD406368, 0x000000FFU, 0x00000058U); + psu_mask_write(0xFD40636C, 0x00000007U, 0x00000003U); + psu_mask_write(0xFD402370, 0x000000FFU, 0x0000007CU); + psu_mask_write(0xFD402374, 0x000000FFU, 0x00000033U); + psu_mask_write(0xFD402378, 0x000000FFU, 0x00000002U); + psu_mask_write(0xFD40237C, 0x00000033U, 0x00000030U); + psu_mask_write(0xFD406370, 0x000000FFU, 0x0000007CU); + psu_mask_write(0xFD406374, 0x000000FFU, 0x00000033U); + psu_mask_write(0xFD406378, 0x000000FFU, 0x00000002U); + psu_mask_write(0xFD40637C, 0x00000033U, 0x00000030U); + psu_mask_write(0xFD40A370, 0x000000FFU, 0x000000F4U); + psu_mask_write(0xFD40A374, 0x000000FFU, 0x00000031U); + psu_mask_write(0xFD40A378, 0x000000FFU, 0x00000002U); + psu_mask_write(0xFD40A37C, 0x00000033U, 0x00000030U); + psu_mask_write(0xFD40E370, 0x000000FFU, 0x000000C9U); + psu_mask_write(0xFD40E374, 0x000000FFU, 0x000000D2U); + psu_mask_write(0xFD40E378, 0x000000FFU, 0x00000001U); + psu_mask_write(0xFD40E37C, 0x000000B3U, 0x000000B0U); + psu_mask_write(0xFD40906C, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD4080F4, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD40E360, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D06C, 0x0000000FU, 0x0000000FU); + psu_mask_write(0xFD40C0F4, 0x0000000BU, 0x0000000BU); + psu_mask_write(0xFD40CB00, 0x000000F0U, 0x000000F0U); + psu_mask_write(0xFD4090CC, 0x00000020U, 0x00000020U); + psu_mask_write(0xFD401074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD405074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD409074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD40D074, 0x00000010U, 0x00000010U); + psu_mask_write(0xFD401994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD405994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40989C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD4098F8, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD4098FC, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD409990, 0x000000FFU, 0x00000010U); + psu_mask_write(0xFD409924, 0x000000FFU, 0x000000FEU); + psu_mask_write(0xFD409928, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD409900, 0x000000FFU, 0x0000001AU); + psu_mask_write(0xFD40992C, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD409980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409914, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD409918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD409940, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD409944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD409994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40D89C, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40D8F8, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D8FC, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D990, 0x000000FFU, 0x00000001U); + psu_mask_write(0xFD40D924, 0x000000FFU, 0x0000009CU); + psu_mask_write(0xFD40D928, 0x000000FFU, 0x00000039U); + psu_mask_write(0xFD40D98C, 0x000000F0U, 0x00000020U); + psu_mask_write(0xFD40D900, 0x000000FFU, 0x0000007DU); + psu_mask_write(0xFD40D92C, 0x000000FFU, 0x00000064U); + psu_mask_write(0xFD40D980, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D914, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD40D918, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40D940, 0x000000FFU, 0x000000F7U); + psu_mask_write(0xFD40D944, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40D994, 0x00000007U, 0x00000007U); + psu_mask_write(0xFD40107C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40507C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40907C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD40D07C, 0x0000000FU, 0x00000001U); + psu_mask_write(0xFD4019A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD401038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40102C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4059A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD405038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40502C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4099A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD409038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40902C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D9A4, 0x000000FFU, 0x000000FFU); + psu_mask_write(0xFD40D038, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD40D02C, 0x00000040U, 0x00000040U); + psu_mask_write(0xFD4019AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4059AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD4099AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD40D9AC, 0x00000003U, 0x00000000U); + psu_mask_write(0xFD401978, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD405978, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD409978, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD40D978, 0x00000080U, 0x00000080U); + psu_mask_write(0xFD410010, 0x00000077U, 0x00000044U); + psu_mask_write(0xFD410014, 0x00000077U, 0x00000023U); + psu_mask_write(0xFD400CB4, 0x00000037U, 0x00000037U); + psu_mask_write(0xFD404CB4, 0x00000037U, 0x00000037U); + psu_mask_write(0xFD4001D8, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD4041D8, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40C1D8, 0x00000001U, 0x00000001U); + psu_mask_write(0xFD40DC14, 0x000000FFU, 0x000000E6U); + psu_mask_write(0xFD40DC40, 0x0000001FU, 0x0000000CU); + psu_mask_write(0xFD40D94C, 0x00000020U, 0x00000020U); + psu_mask_write(0xFD40D950, 0x00000007U, 0x00000006U); + psu_mask_write(0xFD404CC0, 0x0000001FU, 0x00000000U); + psu_mask_write(0xFD400CC0, 0x0000001FU, 0x00000000U); + psu_mask_write(0xFD404048, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD400048, 0x000000FFU, 0x00000000U); + psu_mask_write(0xFD40C048, 0x000000FFU, 0x00000001U); + + return 1; +} + +static unsigned long psu_resetout_init_data(void) +{ + psu_mask_write(0xFF5E023C, 0x00000400U, 0x00000000U); + psu_mask_write(0xFF9D0080, 0x00000001U, 0x00000001U); + psu_mask_write(0xFF9D007C, 0x00000001U, 0x00000000U); + psu_mask_write(0xFF5E023C, 0x00000140U, 0x00000000U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000000U); + psu_mask_write(0xFD3D0100, 0x00000003U, 0x00000003U); + psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000000U); + psu_mask_write(0xFD1A0100, 0x00010000U, 0x00000000U); + psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000000U); + psu_mask_write(0xFD4A0238, 0x0000000FU, 0x00000000U); + psu_mask_write(0xFE20C200, 0x00003FFFU, 0x00002457U); + psu_mask_write(0xFE20C630, 0x003FFF00U, 0x00000000U); + psu_mask_write(0xFE20C11C, 0x00000400U, 0x00000400U); + psu_mask_write(0xFD480064, 0x00000200U, 0x00000200U); + mask_poll(0xFD4063E4, 0x00000010U); + mask_poll(0xFD40A3E4, 0x00000010U); + mask_poll(0xFD40E3E4, 0x00000010U); + psu_mask_write(0xFD0C00AC, 0xFFFFFFFFU, 0x28184018U); + psu_mask_write(0xFD0C00B0, 0xFFFFFFFFU, 0x0E081406U); + psu_mask_write(0xFD0C00B4, 0xFFFFFFFFU, 0x064A0813U); + psu_mask_write(0xFD0C00B8, 0xFFFFFFFFU, 0x3FFC96A4U); + + return 1; +} + +static unsigned long psu_resetin_init_data(void) +{ + psu_mask_write(0xFF5E023C, 0x00000540U, 0x00000540U); + psu_mask_write(0xFF5E0230, 0x00000008U, 0x00000008U); + psu_mask_write(0xFD1A0100, 0x00000002U, 0x00000002U); + psu_mask_write(0xFD4A0238, 0x0000000FU, 0x0000000AU); + psu_mask_write(0xFD4A0200, 0x00000002U, 0x00000002U); + psu_mask_write(0xFD1A0100, 0x00010000U, 0x00010000U); + + return 1; +} + +static unsigned long psu_ddr_phybringup_data(void) +{ + unsigned int regval = 0; + unsigned int pll_retry = 10; + unsigned int pll_locked = 0; + + while ((pll_retry > 0) && (!pll_locked)) { + Xil_Out32(0xFD080004, 0x00040010); + Xil_Out32(0xFD080004, 0x00040011); + + while ((Xil_In32(0xFD080030) & 0x1) != 1) + ; + + pll_locked = (Xil_In32(0xFD080030) & 0x80000000) >> 31; + pll_locked &= (Xil_In32(0xFD0807E0) & 0x10000) >> 16; + pll_locked &= (Xil_In32(0xFD0809E0) & 0x10000) >> 16; + pll_locked &= (Xil_In32(0xFD080BE0) & 0x10000) >> 16; + pll_locked &= (Xil_In32(0xFD080DE0) & 0x10000) >> 16; + pll_retry--; + } + Xil_Out32(0xFD0800C4, Xil_In32(0xFD0800C4) | (pll_retry << 16)); + Xil_Out32(0xFD080004U, 0x00040063U); + + while ((Xil_In32(0xFD080030U) & 0x0000000FU) != 0x0000000FU) + ; + prog_reg(0xFD080004U, 0x00000001U, 0x00000000U, 0x00000001U); + + while ((Xil_In32(0xFD080030U) & 0x000000FFU) != 0x0000001FU) + ; + + Xil_Out32(0xFD0701B0U, 0x00000001U); + Xil_Out32(0xFD070320U, 0x00000001U); + while ((Xil_In32(0xFD070004U) & 0x0000000FU) != 0x00000001U) + ; + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000001U); + Xil_Out32(0xFD080004, 0x0004FE01); + regval = Xil_In32(0xFD080030); + while (regval != 0x80000FFF) + regval = Xil_In32(0xFD080030); + + Xil_Out32(0xFD080200U, 0x100091C7U); + Xil_Out32(0xFD080018U, 0x00F01EF2U); + prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000003U); + prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000003U); + prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000003U); + + Xil_Out32(0xFD080004, 0x00060001); + regval = Xil_In32(0xFD080030); + while ((regval & 0x80004001) != 0x80004001) + regval = Xil_In32(0xFD080030); + + prog_reg(0xFD08001CU, 0x00000018U, 0x00000003U, 0x00000000U); + prog_reg(0xFD08142CU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD08146CU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD0814ACU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD0814ECU, 0x00000030U, 0x00000004U, 0x00000000U); + prog_reg(0xFD08152CU, 0x00000030U, 0x00000004U, 0x00000000U); + + Xil_Out32(0xFD080200U, 0x800091C7U); + Xil_Out32(0xFD080018U, 0x00F12302U); + + Xil_Out32(0xFD080004, 0x0000C001); + regval = Xil_In32(0xFD080030); + while ((regval & 0x80000C01) != 0x80000C01) + regval = Xil_In32(0xFD080030); + + Xil_Out32(0xFD070180U, 0x01000040U); + Xil_Out32(0xFD070060U, 0x00000000U); + prog_reg(0xFD080014U, 0x00000040U, 0x00000006U, 0x00000000U); + + return 1; +} + +static int serdes_fixcal_code(void) +{ + int maskstatus = 1; + unsigned int tmp_0_1, tmp_0_2, tmp_0_3, tmp_0_2_mod; + + Xil_Out32(0xFD40EC4C, 0x00000020); + + Xil_Out32(0xFD410010, 0x00000001); + + maskstatus = mask_poll(0xFD40EF14, 0x2); + + if (maskstatus == 0) { + xil_printf("SERDES initialization timed out\n\r"); + return maskstatus; + } + + tmp_0_1 = mask_read(0xFD400B0C, 0x3F); + + tmp_0_2 = tmp_0_1 & (0x7); + tmp_0_3 = tmp_0_1 & (0x38); + + Xil_Out32(0xFD410010, 0x00000000); + Xil_Out32(0xFD410014, 0x00000000); + + tmp_0_2_mod = (tmp_0_2 << 1) | (0x1); + tmp_0_2_mod = (tmp_0_2_mod << 4); + + tmp_0_3 = tmp_0_3 >> 3; + Xil_Out32(0xFD40EC4C, tmp_0_3); + + Xil_Out32(0xFD40EC48, tmp_0_2_mod); + return maskstatus; +} + +static int serdes_enb_coarse_saturation(void) +{ + Xil_Out32(0xFD402094, 0x00000010); + Xil_Out32(0xFD406094, 0x00000010); + Xil_Out32(0xFD40A094, 0x00000010); + Xil_Out32(0xFD40E094, 0x00000010); + return 1; +} + +static int init_serdes(void) +{ + int status = 1; + + status &= psu_resetin_init_data(); + + status &= serdes_fixcal_code(); + status &= serdes_enb_coarse_saturation(); + + status &= psu_serdes_init_data(); + status &= psu_resetout_init_data(); + + return status; +} + +static void init_peripheral(void) +{ + unsigned int regvalue; + unsigned int tmp_regval; + + Xil_Out32(((0xFF5E0000U) + 0x00000230U), 0x00000000); + Xil_Out32(((0xFF5E0000U) + 0x00000234U), 0x00000000); + Xil_Out32(((0xFF5E0000U) + 0x00000238U), 0x00000000); + + regvalue = Xil_In32(((0xFF5E0000U) + 0x0000023CU)); + regvalue &= 0x7; + Xil_Out32(((0xFF5E0000U) + 0x0000023CU), regvalue); + + Xil_Out32(((0xFD1A0000U) + 0x00000100U), 0x00000000); + + tmp_regval = Xil_In32(0xFD690040); + tmp_regval &= ~0x00000001; + Xil_Out32(0xFD690040, tmp_regval); + + tmp_regval = Xil_In32(0xFD690030); + tmp_regval &= ~0x00000001; + Xil_Out32(0xFD690030, tmp_regval); +} + +int psu_init(void) +{ + int status = 1; + + status &= psu_mio_init_data(); + status &= psu_pll_init_data(); + status &= psu_clock_init_data(); + + status &= psu_ddr_init_data(); + status &= psu_ddr_phybringup_data(); + status &= psu_peripherals_init_data(); + + status &= init_serdes(); + init_peripheral(); + + if (status == 0) + return 1; + return 0; +} diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 70b3c81..bc20909 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -399,9 +399,6 @@ static void print_secure_boot(void) status & ZYNQMP_CSU_STATUS_ENCRYPTED ? "" : "not "); } -#define PS_SYSMON_ANALOG_BUS_VAL 0x3210 -#define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914 - int board_init(void) { #if defined(CONFIG_ZYNQMP_FIRMWARE) @@ -429,9 +426,6 @@ int board_init(void) printf("EL Level:\tEL%d\n", current_el()); - /* Bug in ROM sets wrong value in this register */ - writel(PS_SYSMON_ANALOG_BUS_VAL, PS_SYSMON_ANALOG_BUS_REG); - #if CONFIG_IS_ENABLED(FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) zynqmppl.name = zynqmp_get_silicon_idcode_name(); printf("Chip ID:\t%s\n", zynqmppl.name); diff --git a/boot/Kconfig b/boot/Kconfig index b83a4e8..394b26f 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -370,6 +370,31 @@ config SYS_TEXT_BASE help The address in memory that U-Boot will be running from, initially. +config HAVE_SYS_MONITOR_BASE + bool + depends on ARC || MIPS || M68K || NIOS2 || PPC || XTENSA || X86 \ + || FLASH_PIC32 || ENV_IS_IN_FLASH || MTD_NOR_FLASH + depends on !EFI_APP + default y + +config SYS_MONITOR_BASE + depends on HAVE_SYS_MONITOR_BASE + hex "Physical start address of boot monitor code" + default SYS_TEXT_BASE + help + The physical start address of boot monitor code (which is the same as + CONFIG_SYS_TEXT_BASE when linking) and the same as CONFIG_SYS_FLASH_BASE + when booting from flash. + +config SPL_SYS_MONITOR_BASE + depends on MPC85xx && SPL && HAVE_SYS_MONITOR_BASE + hex "Physical start address of SPL monitor code" + default SPL_TEXT_BASE + +config TPL_SYS_MONITOR_BASE + depends on MPC85xx && TPL && HAVE_SYS_MONITOR_BASE + hex "Physical start address of TPL monitor code" + config DYNAMIC_SYS_CLK_FREQ bool "Determine CPU clock frequency at run-time" help @@ -423,6 +448,20 @@ config RAMBOOT_PBL Some SoCs use PBL to load RCW and/or pre-initialization instructions. For more details refer to doc/README.pblimage +choice + prompt "Freescale PBL load location" + depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \ + || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) \ + && !CMD_NAND) + +config SDCARD + bool "Freescale PBL is found on SD card" + +config SPIFLASH + bool "Freescale PBL is found on SPI flash" + +endchoice + config SYS_FSL_PBL_PBI string "PBI(pre-boot instructions) commands for the PBL image" depends on RAMBOOT_PBL @@ -991,6 +1030,91 @@ config AUTOBOOT_MENU_SHOW environmnent variable (if enabled) and before handling the boot delay. See README.bootmenu for more details. +config BOOT_RETRY + bool "Boot retry feature" + help + Allow for having the U-Boot command prompt time out and attempt + to boot again. If the environment variable "bootretry" is found then + its value is used, otherwise the retry timeout is + CONFIG_BOOT_RETRY_TIME. CONFIG_BOOT_RETRY_MIN is optional and + defaults to CONFIG_BOOT_RETRY_TIME. All times are in seconds. + +config BOOT_RETRY_TIME + int "Timeout in seconds before attempting to boot again" + depends on BOOT_RETRY + help + Time in seconds before the U-Boot prompt will timeout and boot will + be attempted again. + +config BOOT_RETRY_MIN + int "Minimum timeout in seconds for 'bootretry'" + depends on BOOT_RETRY + default BOOT_RETRY_TIME + help + The minimum time in seconds that "bootretry" can be set to. + +config RESET_TO_RETRY + bool "Reset the board to retry autoboot" + depends on BOOT_RETRY + help + After the countdown timed out, the board will be reset to restart + again. + +endmenu + +menu "Image support" + +config IMAGE_PRE_LOAD + bool "Image pre-load support" + help + Enable an image pre-load stage in the SPL. + This pre-load stage allows to do some manipulation + or check (for example signature check) on an image + before launching it. + +config SPL_IMAGE_PRE_LOAD + bool "Image pre-load support within SPL" + depends on SPL && IMAGE_PRE_LOAD + help + Enable an image pre-load stage in the SPL. + This pre-load stage allows to do some manipulation + or check (for example signature check) on an image + before launching it. + +config IMAGE_PRE_LOAD_SIG + bool "Image pre-load signature support" + depends on IMAGE_PRE_LOAD + select FIT_SIGNATURE + select RSA + select RSA_VERIFY_WITH_PKEY + help + Enable signature check support in the pre-load stage. + For this feature a very simple header is added before + the image with few fields: + - a magic + - the image size + - the signature + All other information (header size, type of signature, + ...) are provided in the node /image/pre-load/sig of + u-boot. + +config SPL_IMAGE_PRE_LOAD_SIG + bool "Image pre-load signature support witin SPL" + depends on SPL_IMAGE_PRE_LOAD && IMAGE_PRE_LOAD_SIG + select SPL_FIT_SIGNATURE + select SPL_RSA + select SPL_RSA_VERIFY_WITH_PKEY + help + Enable signature check support in the pre-load stage in the SPL. + For this feature a very simple header is added before + the image with few fields: + - a magic + - the image size + - the signature + All other information (header size, type of signature, + ...) are provided in the node /image/pre-load/sig of + u-boot. + endmenu config USE_BOOTARGS diff --git a/boot/Makefile b/boot/Makefile index 2938c3f..1b99e6e 100644 --- a/boot/Makefile +++ b/boot/Makefile @@ -5,11 +5,7 @@ ifndef CONFIG_SPL_BUILD -# This option is not just y/n - it can have a numeric value -ifdef CONFIG_BOOT_RETRY_TIME -obj-y += bootretry.o -endif - +obj-$(CONFIG_BOOT_RETRY) += bootretry.o obj-$(CONFIG_CMD_BOOTM) += bootm.o bootm_os.o obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o @@ -26,6 +22,7 @@ obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += fdt_region.o obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o +obj-$(CONFIG_$(SPL_TPL_)IMAGE_PRE_LOAD) += image-pre-load.o obj-$(CONFIG_$(SPL_TPL_)IMAGE_SIGN_INFO) += image-sig.o obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-fit-sig.o obj-$(CONFIG_$(SPL_TPL_)FIT_CIPHER) += image-cipher.o diff --git a/boot/bootm.c b/boot/bootm.c index 00c00ae..714406a 100644 --- a/boot/bootm.c +++ b/boot/bootm.c @@ -87,6 +87,33 @@ static int bootm_start(struct cmd_tbl *cmdtp, int flag, int argc, return 0; } +static ulong bootm_data_addr(int argc, char *const argv[]) +{ + ulong addr; + + if (argc > 0) + addr = simple_strtoul(argv[0], NULL, 16); + else + addr = image_load_addr; + + return addr; +} + +static int bootm_pre_load(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + ulong data_addr = bootm_data_addr(argc, argv); + int ret = 0; + + if (CONFIG_IS_ENABLED(CMD_BOOTM_PRE_LOAD)) + ret = image_pre_load(data_addr); + + if (ret) + ret = CMD_RET_FAILURE; + + return ret; +} + static int bootm_find_os(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -677,6 +704,9 @@ int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc, if (states & BOOTM_STATE_START) ret = bootm_start(cmdtp, flag, argc, argv); + if (!ret && (states & BOOTM_STATE_PRE_LOAD)) + ret = bootm_pre_load(cmdtp, flag, argc, argv); + if (!ret && (states & BOOTM_STATE_FINDOS)) ret = bootm_find_os(cmdtp, flag, argc, argv); @@ -866,6 +896,9 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc, &fit_uname_config, &fit_uname_kernel); + if (CONFIG_IS_ENABLED(CMD_BOOTM_PRE_LOAD)) + img_addr += image_load_offset; + bootstage_mark(BOOTSTAGE_ID_CHECK_MAGIC); /* check image type, for FIT images get FIT kernel node */ diff --git a/boot/bootretry.c b/boot/bootretry.c index dac891f..2bc9c68 100644 --- a/boot/bootretry.c +++ b/boot/bootretry.c @@ -12,10 +12,6 @@ #include <time.h> #include <watchdog.h> -#ifndef CONFIG_BOOT_RETRY_MIN -#define CONFIG_BOOT_RETRY_MIN CONFIG_BOOT_RETRY_TIME -#endif - static uint64_t endtime; /* must be set, default is instant timeout */ static int retry_time = -1; /* -1 so can call readline before main_loop */ diff --git a/boot/image-pre-load.c b/boot/image-pre-load.c new file mode 100644 index 0000000..78d8906 --- /dev/null +++ b/boot/image-pre-load.c @@ -0,0 +1,416 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2021 Philippe Reynes <philippe.reynes@softathome.com> + */ + +#include <common.h> +#include <asm/global_data.h> +DECLARE_GLOBAL_DATA_PTR; +#include <image.h> +#include <mapmem.h> + +#include <u-boot/sha256.h> + +#define IMAGE_PRE_LOAD_SIG_MAGIC 0x55425348 +#define IMAGE_PRE_LOAD_SIG_OFFSET_MAGIC 0 +#define IMAGE_PRE_LOAD_SIG_OFFSET_IMG_LEN 4 +#define IMAGE_PRE_LOAD_SIG_OFFSET_SIG 8 + +#define IMAGE_PRE_LOAD_PATH "/image/pre-load/sig" +#define IMAGE_PRE_LOAD_PROP_ALGO_NAME "algo-name" +#define IMAGE_PRE_LOAD_PROP_PADDING_NAME "padding-name" +#define IMAGE_PRE_LOAD_PROP_SIG_SIZE "signature-size" +#define IMAGE_PRE_LOAD_PROP_PUBLIC_KEY "public-key" +#define IMAGE_PRE_LOAD_PROP_MANDATORY "mandatory" + +#ifndef CONFIG_SYS_BOOTM_LEN +/* use 8MByte as default max gunzip size */ +#define CONFIG_SYS_BOOTM_LEN 0x800000 +#endif + +/* + * Information in the device-tree about the signature in the header + */ +struct image_sig_info { + char *algo_name; /* Name of the algo (eg: sha256,rsa2048) */ + char *padding_name; /* Name of the padding */ + u8 *key; /* Public signature key */ + int key_len; /* Length of the public key */ + u32 sig_size; /* size of the signature (in the header) */ + int mandatory; /* Set if the signature is mandatory */ + + struct image_sign_info sig_info; /* Signature info */ +}; + +/* + * Header of the signature header + */ +struct sig_header_s { + u32 magic; + u32 version; + u32 header_size; + u32 image_size; + u32 offset_img_sig; + u32 flags; + u32 reserved0; + u32 reserved1; + u8 sha256_img_sig[SHA256_SUM_LEN]; +}; + +#define SIG_HEADER_LEN (sizeof(struct sig_header_s)) + +/* + * Offset of the image + * + * This value is used to skip the header before really launching the image + */ +ulong image_load_offset; + +/* + * This function gathers information about the signature check + * that could be done before launching the image. + * + * return: + * < 0 => an error has occurred + * 0 => OK + * 1 => no setup + */ +static int image_pre_load_sig_setup(struct image_sig_info *info) +{ + const void *algo_name, *padding_name, *key, *mandatory; + const u32 *sig_size; + int key_len; + int node, ret = 0; + + if (!info) { + log_err("ERROR: info is NULL for image pre-load sig check\n"); + ret = -EINVAL; + goto out; + } + + memset(info, 0, sizeof(*info)); + + node = fdt_path_offset(gd_fdt_blob(), IMAGE_PRE_LOAD_PATH); + if (node < 0) { + log_info("INFO: no info for image pre-load sig check\n"); + ret = 1; + goto out; + } + + algo_name = fdt_getprop(gd_fdt_blob(), node, + IMAGE_PRE_LOAD_PROP_ALGO_NAME, NULL); + if (!algo_name) { + printf("ERROR: no algo_name for image pre-load sig check\n"); + ret = -EINVAL; + goto out; + } + + padding_name = fdt_getprop(gd_fdt_blob(), node, + IMAGE_PRE_LOAD_PROP_PADDING_NAME, NULL); + if (!padding_name) { + log_info("INFO: no padding_name provided, so using pkcs-1.5\n"); + padding_name = "pkcs-1.5"; + } + + sig_size = fdt_getprop(gd_fdt_blob(), node, + IMAGE_PRE_LOAD_PROP_SIG_SIZE, NULL); + if (!sig_size) { + log_err("ERROR: no signature-size for image pre-load sig check\n"); + ret = -EINVAL; + goto out; + } + + key = fdt_getprop(gd_fdt_blob(), node, + IMAGE_PRE_LOAD_PROP_PUBLIC_KEY, &key_len); + if (!key) { + log_err("ERROR: no key for image pre-load sig check\n"); + ret = -EINVAL; + goto out; + } + + info->algo_name = (char *)algo_name; + info->padding_name = (char *)padding_name; + info->key = (uint8_t *)key; + info->key_len = key_len; + info->sig_size = fdt32_to_cpu(*sig_size); + + mandatory = fdt_getprop(gd_fdt_blob(), node, + IMAGE_PRE_LOAD_PROP_MANDATORY, NULL); + if (mandatory && !strcmp((char *)mandatory, "yes")) + info->mandatory = 1; + + /* Compute signature information */ + info->sig_info.name = info->algo_name; + info->sig_info.padding = image_get_padding_algo(info->padding_name); + info->sig_info.checksum = image_get_checksum_algo(info->sig_info.name); + info->sig_info.crypto = image_get_crypto_algo(info->sig_info.name); + info->sig_info.key = info->key; + info->sig_info.keylen = info->key_len; + + out: + return ret; +} + +static int image_pre_load_sig_get_magic(ulong addr, u32 *magic) +{ + struct sig_header_s *sig_header; + int ret = 0; + + sig_header = (struct sig_header_s *)map_sysmem(addr, SIG_HEADER_LEN); + if (!sig_header) { + log_err("ERROR: can't map first header\n"); + ret = -EFAULT; + goto out; + } + + *magic = fdt32_to_cpu(sig_header->magic); + + unmap_sysmem(sig_header); + + out: + return ret; +} + +static int image_pre_load_sig_get_header_size(ulong addr, u32 *header_size) +{ + struct sig_header_s *sig_header; + int ret = 0; + + sig_header = (struct sig_header_s *)map_sysmem(addr, SIG_HEADER_LEN); + if (!sig_header) { + log_err("ERROR: can't map first header\n"); + ret = -EFAULT; + goto out; + } + + *header_size = fdt32_to_cpu(sig_header->header_size); + + unmap_sysmem(sig_header); + + out: + return ret; +} + +/* + * return: + * < 0 => no magic and magic mandatory (or error when reading magic) + * 0 => magic found + * 1 => magic NOT found + */ +static int image_pre_load_sig_check_magic(struct image_sig_info *info, ulong addr) +{ + u32 magic; + int ret = 1; + + ret = image_pre_load_sig_get_magic(addr, &magic); + if (ret < 0) + goto out; + + if (magic != IMAGE_PRE_LOAD_SIG_MAGIC) { + if (info->mandatory) { + log_err("ERROR: signature is mandatory\n"); + ret = -EINVAL; + goto out; + } + ret = 1; + goto out; + } + + ret = 0; /* magic found */ + + out: + return ret; +} + +static int image_pre_load_sig_check_header_sig(struct image_sig_info *info, ulong addr) +{ + void *header; + struct image_region reg; + u32 sig_len; + u8 *sig; + int ret = 0; + + /* Only map header of the header and its signature */ + header = (void *)map_sysmem(addr, SIG_HEADER_LEN + info->sig_size); + if (!header) { + log_err("ERROR: can't map header\n"); + ret = -EFAULT; + goto out; + } + + reg.data = header; + reg.size = SIG_HEADER_LEN; + + sig = (uint8_t *)header + SIG_HEADER_LEN; + sig_len = info->sig_size; + + ret = info->sig_info.crypto->verify(&info->sig_info, ®, 1, sig, sig_len); + if (ret) { + log_err("ERROR: header signature check has failed (err=%d)\n", ret); + ret = -EINVAL; + goto out_unmap; + } + + out_unmap: + unmap_sysmem(header); + + out: + return ret; +} + +static int image_pre_load_sig_check_img_sig_sha256(struct image_sig_info *info, ulong addr) +{ + struct sig_header_s *sig_header; + u32 header_size, offset_img_sig; + void *header; + u8 sha256_img_sig[SHA256_SUM_LEN]; + int ret = 0; + + sig_header = (struct sig_header_s *)map_sysmem(addr, SIG_HEADER_LEN); + if (!sig_header) { + log_err("ERROR: can't map first header\n"); + ret = -EFAULT; + goto out; + } + + header_size = fdt32_to_cpu(sig_header->header_size); + offset_img_sig = fdt32_to_cpu(sig_header->offset_img_sig); + + header = (void *)map_sysmem(addr, header_size); + if (!header) { + log_err("ERROR: can't map header\n"); + ret = -EFAULT; + goto out_sig_header; + } + + sha256_csum_wd(header + offset_img_sig, info->sig_size, + sha256_img_sig, CHUNKSZ_SHA256); + + ret = memcmp(sig_header->sha256_img_sig, sha256_img_sig, SHA256_SUM_LEN); + if (ret) { + log_err("ERROR: sha256 of image signature is invalid\n"); + ret = -EFAULT; + goto out_header; + } + + out_header: + unmap_sysmem(header); + out_sig_header: + unmap_sysmem(sig_header); + out: + return ret; +} + +static int image_pre_load_sig_check_img_sig(struct image_sig_info *info, ulong addr) +{ + struct sig_header_s *sig_header; + u32 header_size, image_size, offset_img_sig; + void *image; + struct image_region reg; + u32 sig_len; + u8 *sig; + int ret = 0; + + sig_header = (struct sig_header_s *)map_sysmem(addr, SIG_HEADER_LEN); + if (!sig_header) { + log_err("ERROR: can't map first header\n"); + ret = -EFAULT; + goto out; + } + + header_size = fdt32_to_cpu(sig_header->header_size); + image_size = fdt32_to_cpu(sig_header->image_size); + offset_img_sig = fdt32_to_cpu(sig_header->offset_img_sig); + + unmap_sysmem(sig_header); + + image = (void *)map_sysmem(addr, header_size + image_size); + if (!image) { + log_err("ERROR: can't map full image\n"); + ret = -EFAULT; + goto out; + } + + reg.data = image + header_size; + reg.size = image_size; + + sig = (uint8_t *)image + offset_img_sig; + sig_len = info->sig_size; + + ret = info->sig_info.crypto->verify(&info->sig_info, ®, 1, sig, sig_len); + if (ret) { + log_err("ERROR: signature check has failed (err=%d)\n", ret); + ret = -EINVAL; + goto out_unmap_image; + } + + log_info("INFO: signature check has succeed\n"); + + out_unmap_image: + unmap_sysmem(image); + + out: + return ret; +} + +int image_pre_load_sig(ulong addr) +{ + struct image_sig_info info; + int ret; + + ret = image_pre_load_sig_setup(&info); + if (ret < 0) + goto out; + if (ret > 0) { + ret = 0; + goto out; + } + + ret = image_pre_load_sig_check_magic(&info, addr); + if (ret < 0) + goto out; + if (ret > 0) { + ret = 0; + goto out; + } + + /* Check the signature of the signature header */ + ret = image_pre_load_sig_check_header_sig(&info, addr); + if (ret < 0) + goto out; + + /* Check sha256 of the image signature */ + ret = image_pre_load_sig_check_img_sig_sha256(&info, addr); + if (ret < 0) + goto out; + + /* Check the image signature */ + ret = image_pre_load_sig_check_img_sig(&info, addr); + if (!ret) { + u32 header_size; + + ret = image_pre_load_sig_get_header_size(addr, &header_size); + if (ret) { + log_err("%s: can't get header size\n", __func__); + ret = -EINVAL; + goto out; + } + + image_load_offset += header_size; + } + + out: + return ret; +} + +int image_pre_load(ulong addr) +{ + int ret = 0; + + image_load_offset = 0; + + if (CONFIG_IS_ENABLED(IMAGE_PRE_LOAD_SIG)) + ret = image_pre_load_sig(addr); + + return ret; +} diff --git a/cmd/Kconfig b/cmd/Kconfig index 5e25e45..7bd9546 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -194,6 +194,16 @@ config CMD_BOOTM help Boot an application image from the memory. +config CMD_BOOTM_PRE_LOAD + bool "enable pre-load on bootm" + depends on CMD_BOOTM + depends on IMAGE_PRE_LOAD + default n + help + Enable support of stage pre-load for the bootm command. + This stage allow to check or modify the image provided + to the bootm command. + config BOOTM_EFI bool "Support booting UEFI FIT images" depends on CMD_BOOTEFI && CMD_BOOTM && FIT @@ -1485,6 +1495,15 @@ config CMD_DHCP help Boot image via network using DHCP/TFTP protocol +config BOOTP_MAY_FAIL + bool "Allow for the BOOTP/DHCP server to not be found" + depends on CMD_BOOTP + help + If the DHCP server is not found after the configured retry count, the + call will fail instead of starting over. This can be used to fail + over to Link-local IP address configuration if the DHCP server is not + available. + config BOOTP_BOOTPATH bool "Request & store 'rootpath' from BOOTP/DHCP server" default y @@ -1493,6 +1512,14 @@ config BOOTP_BOOTPATH Even though the config is called BOOTP_BOOTPATH, it stores the path in the variable 'rootpath'. +config BOOTP_VENDOREX + bool "Support vendor extensions from BOOTP/DHCP server" + depends on CMD_BOOTP + +config BOOTP_BOOTFILESIZE + bool "Request & store 'bootfilesize' from BOOTP/DHCP server" + depends on CMD_BOOTP + config BOOTP_DNS bool "Request & store 'dnsip' from BOOTP/DHCP server" default y @@ -1540,10 +1567,18 @@ config BOOTP_SUBNETMASK default y depends on CMD_BOOTP +config BOOTP_NISDOMAIN + bool "Request & store 'nisdomain' from BOOTP/DHCP server" + depends on CMD_BOOTP + config BOOTP_NTPSERVER bool "Request & store 'ntpserverip' from BOOTP/DHCP server" depends on CMD_BOOTP +config BOOTP_TIMEOFFSET + bool "Request & store 'timeoffset' from BOOTP/DHCP server" + depends on CMD_BOOTP && CMD_SNTP + config CMD_PCAP bool "pcap capture" help @@ -1613,6 +1648,15 @@ config CMD_NFS help Boot image via network using NFS protocol. +config NFS_TIMEOUT + int "Timeout in milliseconds for NFS mounts" + depends on CMD_NFS + default 2000 + help + Timeout in milliseconds used in NFS protocol. If you encounter + "ERROR: Cannot umount" in nfs command, try longer timeout such as + 10000. + config CMD_MII bool "mii" imply CMD_MDIO @@ -1624,6 +1668,10 @@ config CMD_MII to management parameters and services. The interface is referred to as the MII management interface. +config MII_INIT + bool "Call mii_init() in the mii command" + depends on CMD_MII && (MPC8XX_FEC || FSLDMAFE || MCFFEC) + config CMD_MDIO bool "mdio" depends on PHYLIB @@ -1748,7 +1796,7 @@ config CMD_CONITRACE config CMD_CLS bool "Enable clear screen command 'cls'" - depends on CFB_CONSOLE || DM_VIDEO || LCD || VIDEO + depends on DM_VIDEO || LCD || VIDEO default y if LCD help Enable the 'cls' command which clears the screen contents @@ -2176,6 +2224,12 @@ config CMD_CRAMFS cramfsls - lists files in a cramfs image cramfsload - loads a file from a cramfs image +config CMD_EROFS + bool "EROFS command support" + select FS_EROFS + help + Support for the EROFS fs + config CMD_EXT2 bool "ext2 command support" select FS_EXT4 @@ -2342,6 +2396,14 @@ config CMD_DIAG available tests and running either all the tests, or specific tests identified by name. +config CMD_EVENT + bool "event - Show information about events" + default y if EVENT_DEBUG + help + This enables the 'event' command which provides information about + events and event-handler routines. This can help to device event + hadling. + config CMD_IRQ bool "irq - Show information about interrupts" depends on !ARM && !MIPS && !RISCV && !SH diff --git a/cmd/Makefile b/cmd/Makefile index 166c652..ede634d 100644 --- a/cmd/Makefile +++ b/cmd/Makefile @@ -53,6 +53,7 @@ obj-$(CONFIG_CMD_DIAG) += diag.o endif obj-$(CONFIG_CMD_ADTIMG) += adtimg.o obj-$(CONFIG_CMD_ABOOTIMG) += abootimg.o +obj-$(CONFIG_CMD_EVENT) += event.o obj-$(CONFIG_CMD_EXTENSION) += extension_board.o obj-$(CONFIG_CMD_ECHO) += echo.o obj-$(CONFIG_ENV_IS_IN_EEPROM) += eeprom.o @@ -60,6 +61,7 @@ obj-$(CONFIG_CMD_EEPROM) += eeprom.o obj-$(CONFIG_EFI) += efi.o obj-$(CONFIG_CMD_EFIDEBUG) += efidebug.o obj-$(CONFIG_CMD_ELF) += elf.o +obj-$(CONFIG_CMD_EROFS) += erofs.o obj-$(CONFIG_HUSH_PARSER) += exit.o obj-$(CONFIG_CMD_EXT4) += ext4.o obj-$(CONFIG_CMD_EXT2) += ext2.o diff --git a/cmd/arm/exception64.c b/cmd/arm/exception64.c index d5de50a..589a231 100644 --- a/cmd/arm/exception64.c +++ b/cmd/arm/exception64.c @@ -7,19 +7,73 @@ #include <common.h> #include <command.h> +#include <linux/bitops.h> static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { /* - * 0xe7f...f. is undefined in ARM mode - * 0xde.. is undefined in Thumb mode + * Instructions starting with the upper 16 bits all 0 are permanently + * undefined. The lower 16 bits can be used for some kind of immediate. + * --- ARMv8 ARM (ARM DDI 0487G.a C6.2.339: "UDF") */ - asm volatile (".word 0xe7f7defb\n"); + asm volatile (".word 0x00001234\n"); + + return CMD_RET_FAILURE; +} + +/* + * The ID_AA64MMFR2_EL1 register name is only know to binutils for ARMv8.2 + * and later architecture revisions. However the register is valid regardless + * of binutils architecture support or the core the code is running on, so + * just use the generic encoding. + */ +#define ID_AA64MMFR2_EL1 "S3_0_C0_C7_2" + +static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + uint64_t reg; + + /* + * The unaligned LDAR access below is only guaranteed to generate an + * alignment fault on cores not implementing FEAT_LSE2. To avoid false + * negatives, check this condition before we exectute LDAR. + */ + asm ("mrs %0, "ID_AA64MMFR2_EL1"\n" : "=r" (reg)); + if (reg & GENMASK(35, 32)) { + printf("unaligned access check only supported on pre-v8.4 cores\n"); + return CMD_RET_FAILURE; + } + + /* + * The load acquire instruction requires the data source to be + * naturally aligned, and will fault even if strict alignment fault + * checking is disabled (but only without FEAT_LSE2). + * --- ARMv8 ARM (ARM DDI 0487G.a B2.5.2: "Alignment of data accesses") + */ + asm volatile ( + "mov x1, sp\n\t" + "orr x1, x1, #3\n\t" + "ldar x0, [x1]\n" + ::: "x0", "x1" ); + + return CMD_RET_FAILURE; +} + +static int do_breakpoint(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + asm volatile ("brk #123\n"); + return CMD_RET_FAILURE; } static struct cmd_tbl cmd_sub[] = { + U_BOOT_CMD_MKENT(breakpoint, CONFIG_SYS_MAXARGS, 1, do_breakpoint, + "", ""), + U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned, + "", ""), U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined, "", ""), }; @@ -27,7 +81,9 @@ static struct cmd_tbl cmd_sub[] = { static char exception_help_text[] = "<ex>\n" " The following exceptions are available:\n" - " undefined - undefined instruction\n" + " breakpoint - breakpoint instruction exception\n" + " unaligned - unaligned LDAR data abort\n" + " undefined - undefined instruction exception\n" ; #include <exception.h> diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c index c56b3f4..37cd8a5 100644 --- a/cmd/bdinfo.c +++ b/cmd/bdinfo.c @@ -117,7 +117,7 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) bdinfo_print_num_l("fdt_size", (ulong)gd->fdt_size); if (IS_ENABLED(CONFIG_DM_VIDEO)) show_video_info(); -#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) +#if defined(CONFIG_LCD) bdinfo_print_num_l("FB base ", gd->fb_base); #endif #if CONFIG_IS_ENABLED(MULTI_DTB_FIT) @@ -268,10 +268,8 @@ int bmp_display(ulong addr, int x, int y) } #elif defined(CONFIG_LCD) ret = lcd_display_bitmap(addr, x, y); -#elif defined(CONFIG_VIDEO) - ret = video_display_bitmap(addr, x, y); #else -# error bmp_display() requires CONFIG_LCD or CONFIG_VIDEO +# error bmp_display() requires CONFIG_LCD #endif if (bmp_alloc_addr) diff --git a/cmd/bootm.c b/cmd/bootm.c index e8b7066..1f70ee9 100644 --- a/cmd/bootm.c +++ b/cmd/bootm.c @@ -44,6 +44,9 @@ static int do_imls(struct cmd_tbl *cmdtp, int flag, int argc, static struct cmd_tbl cmd_bootm_sub[] = { U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, "", ""), U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, "", ""), +#ifdef CONFIG_CMD_BOOTM_PRE_LOAD + U_BOOT_CMD_MKENT(preload, 0, 1, (void *)BOOTM_STATE_PRE_LOAD, "", ""), +#endif #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH U_BOOT_CMD_MKENT(ramdisk, 0, 1, (void *)BOOTM_STATE_RAMDISK, "", ""), #endif @@ -57,6 +60,20 @@ static struct cmd_tbl cmd_bootm_sub[] = { U_BOOT_CMD_MKENT(go, 0, 1, (void *)BOOTM_STATE_OS_GO, "", ""), }; +#if defined(CONFIG_CMD_BOOTM_PRE_LOAD) +static ulong bootm_get_addr(int argc, char *const argv[]) +{ + ulong addr; + + if (argc > 0) + addr = hextoul(argv[0], NULL); + else + addr = image_load_addr; + + return addr; +} +#endif + static int do_bootm_subcommand(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { @@ -70,7 +87,12 @@ static int do_bootm_subcommand(struct cmd_tbl *cmdtp, int flag, int argc, if (c) { state = (long)c->cmd; if (state == BOOTM_STATE_START) - state |= BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER; + state |= BOOTM_STATE_PRE_LOAD | BOOTM_STATE_FINDOS | + BOOTM_STATE_FINDOTHER; +#if defined(CONFIG_CMD_BOOTM_PRE_LOAD) + if (state == BOOTM_STATE_PRE_LOAD) + state |= BOOTM_STATE_START; +#endif } else { /* Unrecognized command */ return CMD_RET_USAGE; @@ -84,6 +106,12 @@ static int do_bootm_subcommand(struct cmd_tbl *cmdtp, int flag, int argc, ret = do_bootm_states(cmdtp, flag, argc, argv, state, &images, 0); +#if defined(CONFIG_CMD_BOOTM_PRE_LOAD) + if (!ret && (state & BOOTM_STATE_PRE_LOAD)) + env_set_hex("loadaddr_verified", + bootm_get_addr(argc, argv) + image_load_offset); +#endif + return ret; } @@ -126,7 +154,7 @@ int do_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) } return do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START | - BOOTM_STATE_FINDOS | BOOTM_STATE_FINDOTHER | + BOOTM_STATE_FINDOS | BOOTM_STATE_PRE_LOAD | BOOTM_STATE_FINDOTHER | BOOTM_STATE_LOADOS | #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH BOOTM_STATE_RAMDISK | @@ -176,6 +204,9 @@ static char bootm_help_text[] = "must be\n" "issued in the order below (it's ok to not issue all sub-commands):\n" "\tstart [addr [arg ...]]\n" +#if defined(CONFIG_CMD_BOOTM_PRE_LOAD) + "\tpreload [addr [arg ..]] - run only the preload stage\n" +#endif "\tloados - load OS image\n" #if defined(CONFIG_SYS_BOOT_RAMDISK_HIGH) "\tramdisk - relocate initrd, set env initrd_start/initrd_end\n" @@ -28,8 +28,6 @@ static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc, if (video_clear(dev)) return CMD_RET_FAILURE; #endif -#elif defined(CONFIG_CFB_CONSOLE) - video_clear(); #elif defined(CONFIG_LCD) lcd_clear(); #else diff --git a/cmd/erofs.c b/cmd/erofs.c new file mode 100644 index 0000000..add80b8 --- /dev/null +++ b/cmd/erofs.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Huang Jianan <jnhuang95@gmail.com> + * + * Author: Huang Jianan <jnhuang95@gmail.com> + * + * erofs.c: implements EROFS related commands + */ + +#include <command.h> +#include <fs.h> +#include <erofs.h> + +static int do_erofs_ls(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) +{ + return do_ls(cmdtp, flag, argc, argv, FS_TYPE_EROFS); +} + +U_BOOT_CMD(erofsls, 4, 1, do_erofs_ls, + "List files in directory. Default: root (/).", + "<interface> [<dev[:part]>] [directory]\n" + " - list files from 'dev' on 'interface' in 'directory'\n" +); + +static int do_erofs_load(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]) +{ + return do_load(cmdtp, flag, argc, argv, FS_TYPE_EROFS); +} + +U_BOOT_CMD(erofsload, 7, 0, do_erofs_load, + "load binary file from a EROFS filesystem", + "<interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]\n" + " - Load binary file 'filename' from 'dev' on 'interface'\n" + " to address 'addr' from EROFS filesystem.\n" + " 'pos' gives the file position to start loading from.\n" + " If 'pos' is omitted, 0 is used. 'pos' requires 'bytes'.\n" + " 'bytes' gives the size to load. If 'bytes' is 0 or omitted,\n" + " the load stops on end of file.\n" + " If either 'pos' or 'bytes' are not aligned to\n" + " ARCH_DMA_MINALIGN then a misaligned buffer warning will\n" + " be printed and performance will suffer for the load." +); diff --git a/cmd/event.c b/cmd/event.c new file mode 100644 index 0000000..9cac202 --- /dev/null +++ b/cmd/event.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Command-line access to events + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <command.h> +#include <event.h> + +static int do_event_list(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + event_show_spy_list(); + + return 0; +} + +#ifdef CONFIG_SYS_LONGHELP +static char event_help_text[] = + "event list - list event spies"; +#endif + +U_BOOT_CMD_WITH_SUBCMDS(event, "Events", event_help_text, + U_BOOT_SUBCMD_MKENT(list, 1, 1, do_event_list)); @@ -638,7 +638,7 @@ static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) if (argc == 4) { initrd_start = hextoul(argv[2], NULL); - initrd_end = hextoul(argv[3], NULL); + initrd_end = initrd_start + hextoul(argv[3], NULL) - 1; } fdt_chosen(working_fdt); @@ -1083,8 +1083,8 @@ static char fdt_help_text[] = "fdt rsvmem print - Show current mem reserves\n" "fdt rsvmem add <addr> <size> - Add a mem reserve\n" "fdt rsvmem delete <index> - Delete a mem reserves\n" - "fdt chosen [<start> <end>] - Add/update the /chosen branch in the tree\n" - " <start>/<end> - initrd start/end addr\n" + "fdt chosen [<start> <size>] - Add/update the /chosen branch in the tree\n" + " <start>/<size> - initrd start addr/size\n" #if defined(CONFIG_FIT_SIGNATURE) "fdt checksign [<addr>] - check FIT signature\n" " <start> - addr of key blob\n" diff --git a/common/Kconfig b/common/Kconfig index 82cd864..8f8a906 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -492,6 +492,37 @@ config DISPLAY_BOARDINFO_LATE menu "Start-up hooks" +config EVENT + bool "General-purpose event-handling mechanism" + default y if SANDBOX + help + This enables sending and processing of events, to allow interested + parties to be alerted when something happens. This is an attempt to + step the flow of weak functions, hooks, functions in board_f.c + and board_r.c and the Kconfig options below. + + See doc/develop/event.rst for more information. + +if EVENT + +config EVENT_DYNAMIC + bool "Support event registration at runtime" + default y if SANDBOX + help + Enable this to support adding an event spy at runtime, without adding + it to the EVENT_SPy() linker list. This increases code size slightly + but provides more flexibility for boards and subsystems that need it. + +config EVENT_DEBUG + bool "Enable event debugging assistance" + default y if SANDBOX + help + Enable this get usefui features for seeing what is happening with + events, such as event-type names. This adds to the code size of + U-Boot so can be turned off for production builds. + +endif # EVENT + config ARCH_EARLY_INIT_R bool "Call arch-specific init soon after relocation" help @@ -524,6 +555,12 @@ config BOARD_EARLY_INIT_R relocation. With this option, U-Boot calls board_early_init_r() in the post-relocation init sequence. +config BOARD_POSTCLK_INIT + bool "Call board_postclk_init" + help + Some boards need this to initialize select items, after clocks / + timebase and before env / serial. + config BOARD_LATE_INIT bool "Execute Board late init" help @@ -534,6 +571,10 @@ config BOARD_LATE_INIT So this config enable the late init code with the help of board_late_init function which should defined on respective boards. +config CLOCKS + bool "Call set_cpu_clk_info" + depends on ARM + config SYS_FSL_CLK bool depends on ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 || \ @@ -552,12 +593,6 @@ config LAST_STAGE_INIT U-Boot calls last_stage_init() before the command-line interpreter is started. -config MISC_INIT_F - bool "Execute pre-relocation misc init" - help - Enabling this option calls the 'misc_init_f' function in the init - sequence just before DRAM is inited. - config MISC_INIT_R bool "Execute Misc Init" default y if ARCH_KEYSTONE || ARCH_SUNXI || MPC85xx @@ -580,6 +615,12 @@ config PCI_INIT_R case of DM PCI-based Ethernet devices, which will not be detected without having the enumeration performed earlier. +config RESET_PHY_R + bool "Reset ethernet PHY during init" + help + Implement reset_phy() in board code if required to reset the ethernet + PHY. + endmenu endmenu # Init options diff --git a/common/Makefile b/common/Makefile index 3eff719..cc2ba30 100644 --- a/common/Makefile +++ b/common/Makefile @@ -89,6 +89,8 @@ obj-y += malloc_simple.o endif endif +obj-$(CONFIG_$(SPL_TPL_)EVENT) += event.o + obj-$(CONFIG_$(SPL_TPL_)HASH) += hash.o obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o diff --git a/common/board_f.c b/common/board_f.c index a687600..5b655ad 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -19,6 +19,7 @@ #include <dm.h> #include <env.h> #include <env_internal.h> +#include <event.h> #include <fdtdec.h> #include <fs.h> #include <hang.h> @@ -802,19 +803,19 @@ __weak int reserve_arch(void) return 0; } -__weak int arch_cpu_init_dm(void) +__weak int checkcpu(void) { return 0; } -__weak int checkcpu(void) +__weak int clear_bss(void) { return 0; } -__weak int clear_bss(void) +static int misc_init_f(void) { - return 0; + return event_notify_null(EVT_MISC_INIT_F); } static const init_fnc_t init_sequence_f[] = { @@ -828,6 +829,7 @@ static const init_fnc_t init_sequence_f[] = { initf_malloc, log_init, initf_bootstage, /* uses its own timer, so does not need DM */ + event_init, #ifdef CONFIG_BLOBLIST bloblist_init, #endif @@ -841,7 +843,6 @@ static const init_fnc_t init_sequence_f[] = { arch_cpu_init, /* basic arch cpu dependent setup */ mach_cpu_init, /* SoC/machine dependent CPU setup */ initf_dm, - arch_cpu_init_dm, #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, #endif @@ -875,9 +876,7 @@ static const init_fnc_t init_sequence_f[] = { show_board_info, #endif INIT_FUNC_WATCHDOG_INIT -#if defined(CONFIG_MISC_INIT_F) misc_init_f, -#endif INIT_FUNC_WATCHDOG_RESET #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) init_func_i2c, diff --git a/common/board_r.c b/common/board_r.c index c24d9b4..b92c1bb 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -594,6 +594,7 @@ static int run_main_loop(void) static init_fnc_t init_sequence_r[] = { initr_trace, initr_reloc, + event_init, /* TODO: could x86/PPC have this also perhaps? */ #if defined(CONFIG_ARM) || defined(CONFIG_RISCV) initr_caches, diff --git a/common/event.c b/common/event.c new file mode 100644 index 0000000..9d67a06 --- /dev/null +++ b/common/event.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Events provide a general-purpose way to react to / subscribe to changes + * within U-Boot + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#define LOG_CATEGORY LOGC_EVENT + +#include <common.h> +#include <event.h> +#include <event_internal.h> +#include <log.h> +#include <linker_lists.h> +#include <malloc.h> +#include <asm/global_data.h> +#include <linux/list.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if CONFIG_IS_ENABLED(EVENT_DEBUG) +const char *const type_name[] = { + "none", + "test", + + /* Events related to driver model */ + "dm_post_init", + "dm_pre_probe", + "dm_post_probe", + "dm_pre_remove", + "dm_post_remove", + + /* init hooks */ + "misc_init_f", +}; + +_Static_assert(ARRAY_SIZE(type_name) == EVT_COUNT, "event type_name size"); +#endif + +static const char *event_type_name(enum event_t type) +{ +#if CONFIG_IS_ENABLED(EVENT_DEBUG) + return type_name[type]; +#else + return "(unknown)"; +#endif +} + +static int notify_static(struct event *ev) +{ + struct evspy_info *start = + ll_entry_start(struct evspy_info, evspy_info); + const int n_ents = ll_entry_count(struct evspy_info, evspy_info); + struct evspy_info *spy; + + for (spy = start; spy != start + n_ents; spy++) { + if (spy->type == ev->type) { + int ret; + + log_debug("Sending event %x/%s to spy '%s'\n", ev->type, + event_type_name(ev->type), event_spy_id(spy)); + ret = spy->func(NULL, ev); + + /* + * TODO: Handle various return codes to + * + * - claim an event (no others will see it) + * - return an error from the event + */ + if (ret) + return log_msg_ret("spy", ret); + } + } + + return 0; +} + +static int notify_dynamic(struct event *ev) +{ + struct event_state *state = gd_event_state(); + struct event_spy *spy, *next; + + list_for_each_entry_safe(spy, next, &state->spy_head, sibling_node) { + if (spy->type == ev->type) { + int ret; + + log_debug("Sending event %x/%s to spy '%s'\n", ev->type, + event_type_name(ev->type), spy->id); + ret = spy->func(spy->ctx, ev); + + /* + * TODO: Handle various return codes to + * + * - claim an event (no others will see it) + * - return an error from the event + */ + if (ret) + return log_msg_ret("spy", ret); + } + } + + return 0; +} + +int event_notify(enum event_t type, void *data, int size) +{ + struct event event; + int ret; + + event.type = type; + if (size > sizeof(event.data)) + return log_msg_ret("size", -E2BIG); + memcpy(&event.data, data, size); + + ret = notify_static(&event); + if (ret) + return log_msg_ret("dyn", ret); + + if (CONFIG_IS_ENABLED(EVENT_DYNAMIC)) { + ret = notify_dynamic(&event); + if (ret) + return log_msg_ret("dyn", ret); + } + + return 0; +} + +int event_notify_null(enum event_t type) +{ + return event_notify(type, NULL, 0); +} + +void event_show_spy_list(void) +{ + struct evspy_info *start = + ll_entry_start(struct evspy_info, evspy_info); + const int n_ents = ll_entry_count(struct evspy_info, evspy_info); + struct evspy_info *spy; + const int size = sizeof(ulong) * 2; + + printf("Seq %-24s %*s %s\n", "Type", size, "Function", "ID"); + for (spy = start; spy != start + n_ents; spy++) { + printf("%3x %-3x %-20s %*p %s\n", (uint)(spy - start), + spy->type, event_type_name(spy->type), size, spy->func, + event_spy_id(spy)); + } +} + +#if CONFIG_IS_ENABLED(EVENT_DYNAMIC) +static void spy_free(struct event_spy *spy) +{ + list_del(&spy->sibling_node); +} + +int event_register(const char *id, enum event_t type, event_handler_t func, void *ctx) +{ + struct event_state *state = gd_event_state(); + struct event_spy *spy; + + if (!CONFIG_IS_ENABLED(EVENT_DYNAMIC)) + return -ENOSYS; + spy = malloc(sizeof(*spy)); + if (!spy) + return log_msg_ret("alloc", -ENOMEM); + + spy->id = id; + spy->type = type; + spy->func = func; + spy->ctx = ctx; + list_add_tail(&spy->sibling_node, &state->spy_head); + + return 0; +} + +int event_uninit(void) +{ + struct event_state *state = gd_event_state(); + struct event_spy *spy, *next; + + list_for_each_entry_safe(spy, next, &state->spy_head, sibling_node) + spy_free(spy); + + return 0; +} + +int event_init(void) +{ + struct event_state *state = gd_event_state(); + + INIT_LIST_HEAD(&state->spy_head); + + return 0; +} +#endif /* EVENT_DYNAMIC */ diff --git a/common/fdt_support.c b/common/fdt_support.c index ea18ea3..8662bd2 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -1725,7 +1725,7 @@ int fdt_set_status_by_pathf(void *fdt, enum fdt_status status, const char *fmt, return fdt_set_node_status(fdt, offset, status); } -#if defined(CONFIG_VIDEO) || defined(CONFIG_LCD) +#if defined(CONFIG_LCD) int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) { int noff; diff --git a/common/lcd.c b/common/lcd.c index 16a0a7c..0898bc0 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -90,54 +90,6 @@ static void lcd_stub_puts(struct stdio_dev *dev, const char *s) lcd_puts(s); } -/* Small utility to check that you got the colours right */ -#ifdef LCD_TEST_PATTERN - -#if LCD_BPP == LCD_COLOR8 -#define N_BLK_VERT 2 -#define N_BLK_HOR 3 - -static int test_colors[N_BLK_HOR * N_BLK_VERT] = { - CONSOLE_COLOR_RED, CONSOLE_COLOR_GREEN, CONSOLE_COLOR_YELLOW, - CONSOLE_COLOR_BLUE, CONSOLE_COLOR_MAGENTA, CONSOLE_COLOR_CYAN, -}; /*LCD_BPP == LCD_COLOR8 */ - -#elif LCD_BPP == LCD_COLOR16 -#define N_BLK_VERT 2 -#define N_BLK_HOR 4 - -static int test_colors[N_BLK_HOR * N_BLK_VERT] = { - CONSOLE_COLOR_RED, CONSOLE_COLOR_GREEN, CONSOLE_COLOR_YELLOW, CONSOLE_COLOR_BLUE, - CONSOLE_COLOR_MAGENTA, CONSOLE_COLOR_CYAN, CONSOLE_COLOR_GREY, CONSOLE_COLOR_WHITE, -}; -#endif /*LCD_BPP == LCD_COLOR16 */ - -static void test_pattern(void) -{ - ushort v_max = panel_info.vl_row; - ushort h_max = panel_info.vl_col; - ushort v_step = (v_max + N_BLK_VERT - 1) / N_BLK_VERT; - ushort h_step = (h_max + N_BLK_HOR - 1) / N_BLK_HOR; - ushort v, h; -#if LCD_BPP == LCD_COLOR8 - uchar *pix = (uchar *)lcd_base; -#elif LCD_BPP == LCD_COLOR16 - ushort *pix = (ushort *)lcd_base; -#endif - - printf("[LCD] Test Pattern: %d x %d [%d x %d]\n", - h_max, v_max, h_step, v_step); - - for (v = 0; v < v_max; ++v) { - uchar iy = v / v_step; - for (h = 0; h < h_max; ++h) { - uchar ix = N_BLK_HOR * iy + h / h_step; - *pix++ = test_colors[ix]; - } - } -} -#endif /* LCD_TEST_PATTERN */ - /* * With most lcd drivers the line length is set up * by calculating it from panel_info parameters. Some @@ -201,9 +153,6 @@ void lcd_clear(void) bg_color = CONSOLE_COLOR_BLACK; #endif /* CONFIG_SYS_WHITE_ON_BLACK */ -#ifdef LCD_TEST_PATTERN - test_pattern(); -#else /* set framebuffer to background color */ #if (LCD_BPP != LCD_COLOR32) memset((char *)lcd_base, bg_color, lcd_line_length * panel_info.vl_row); @@ -216,7 +165,6 @@ void lcd_clear(void) *ppix++ = bg_color; } #endif -#endif /* setup text-console */ debug("[LCD] setting up console...\n"); lcd_init_console(lcd_base, @@ -399,135 +347,6 @@ static void splash_align_axis(int *axis, unsigned long panel_size, } #endif -#ifdef CONFIG_LCD_BMP_RLE8 -#define BMP_RLE8_ESCAPE 0 -#define BMP_RLE8_EOL 0 -#define BMP_RLE8_EOBMP 1 -#define BMP_RLE8_DELTA 2 - -static void draw_unencoded_bitmap(ushort **fbp, uchar *bmap, ushort *cmap, - int cnt) -{ - while (cnt > 0) { - *(*fbp)++ = cmap[*bmap++]; - cnt--; - } -} - -static void draw_encoded_bitmap(ushort **fbp, ushort c, int cnt) -{ - ushort *fb = *fbp; - int cnt_8copy = cnt >> 3; - - cnt -= cnt_8copy << 3; - while (cnt_8copy > 0) { - *fb++ = c; - *fb++ = c; - *fb++ = c; - *fb++ = c; - *fb++ = c; - *fb++ = c; - *fb++ = c; - *fb++ = c; - cnt_8copy--; - } - while (cnt > 0) { - *fb++ = c; - cnt--; - } - *fbp = fb; -} - -/* - * Do not call this function directly, must be called from lcd_display_bitmap. - */ -static void lcd_display_rle8_bitmap(struct bmp_image *bmp, ushort *cmap, - uchar *fb, int x_off, int y_off) -{ - uchar *bmap; - ulong width, height; - ulong cnt, runlen; - int x, y; - int decode = 1; - - width = get_unaligned_le32(&bmp->header.width); - height = get_unaligned_le32(&bmp->header.height); - bmap = (uchar *)bmp + get_unaligned_le32(&bmp->header.data_offset); - - x = 0; - y = height - 1; - - while (decode) { - if (bmap[0] == BMP_RLE8_ESCAPE) { - switch (bmap[1]) { - case BMP_RLE8_EOL: - /* end of line */ - bmap += 2; - x = 0; - y--; - /* 16bpix, 2-byte per pixel, width should *2 */ - fb -= (width * 2 + lcd_line_length); - break; - case BMP_RLE8_EOBMP: - /* end of bitmap */ - decode = 0; - break; - case BMP_RLE8_DELTA: - /* delta run */ - x += bmap[2]; - y -= bmap[3]; - /* 16bpix, 2-byte per pixel, x should *2 */ - fb = (uchar *) (lcd_base + (y + y_off - 1) - * lcd_line_length + (x + x_off) * 2); - bmap += 4; - break; - default: - /* unencoded run */ - runlen = bmap[1]; - bmap += 2; - if (y < height) { - if (x < width) { - if (x + runlen > width) - cnt = width - x; - else - cnt = runlen; - draw_unencoded_bitmap( - (ushort **)&fb, - bmap, cmap, cnt); - } - x += runlen; - } - bmap += runlen; - if (runlen & 1) - bmap++; - } - } else { - /* encoded run */ - if (y < height) { - runlen = bmap[0]; - if (x < width) { - /* aggregate the same code */ - while (bmap[0] == 0xff && - bmap[2] != BMP_RLE8_ESCAPE && - bmap[1] == bmap[3]) { - runlen += bmap[2]; - bmap += 2; - } - if (x + runlen > width) - cnt = width - x; - else - cnt = runlen; - draw_encoded_bitmap((ushort **)&fb, - cmap[bmap[1]], cnt); - } - x += runlen; - } - bmap += 2; - } - } -} -#endif - __weak void fb_put_byte(uchar **fb, uchar **from) { *(*fb)++ = *(*from)++; @@ -633,19 +452,6 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y) case 1: case 8: { cmap_base = configuration_get_cmap(); -#ifdef CONFIG_LCD_BMP_RLE8 - u32 compression = get_unaligned_le32(&bmp->header.compression); - debug("compressed %d %d\n", compression, BMP_BI_RLE8); - if (compression == BMP_BI_RLE8) { - if (bpix != 16) { - /* TODO implement render code for bpix != 16 */ - printf("Error: only support 16 bpix"); - return 1; - } - lcd_display_rle8_bitmap(bmp, cmap_base, fb, x, y); - break; - } -#endif if (bpix != 16) byte_width = width; diff --git a/common/log.c b/common/log.c index f7e0c0f..7254aa7 100644 --- a/common/log.c +++ b/common/log.c @@ -28,6 +28,7 @@ static const char *const log_cat_name[] = { "devres", "acpi", "boot", + "event", }; _Static_assert(ARRAY_SIZE(log_cat_name) == LOGC_COUNT - LOGC_NONE, diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 7d4d15e..194c84e 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -366,7 +366,7 @@ int miiphy_reset(const char *devname, unsigned char addr) debug("PHY reset failed\n"); return -1; } -#ifdef CONFIG_PHY_RESET_DELAY +#if CONFIG_PHY_RESET_DELAY > 0 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ #endif /* diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 9418d37..dc319ad 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -1334,16 +1334,16 @@ config TPL_SIZE_LIMIT If this value is zero, it is ignored. config TPL_BINMAN_SYMBOLS - bool "Declare binman symbols in SPL" + bool "Declare binman symbols in TPL" depends on SPL_FRAMEWORK && BINMAN default y help - This enables use of symbols in TPL which refer to U-Boot, enabling SPL + This enables use of symbols in TPL which refer to U-Boot, enabling TPL to obtain the location of U-Boot simply by calling spl_get_image_pos() and spl_get_image_size(). For this to work, you must have a U-Boot image in the binman image, so - binman can update SPL with the location of it. + binman can update TPL with the location of it. config TPL_FRAMEWORK bool "Support TPL based upon the common SPL framework" diff --git a/common/spl/Makefile b/common/spl/Makefile index db8fd36..e71e7be 100644 --- a/common/spl/Makefile +++ b/common/spl/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_$(SPL_TPL_)USB_STORAGE) += spl_usb.o obj-$(CONFIG_$(SPL_TPL_)FS_FAT) += spl_fat.o obj-$(CONFIG_$(SPL_TPL_)FS_EXT4) += spl_ext.o obj-$(CONFIG_$(SPL_TPL_)SATA) += spl_sata.o +obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += spl_semihosting.o obj-$(CONFIG_$(SPL_TPL_)DFU) += spl_dfu.o obj-$(CONFIG_$(SPL_TPL_)SPI_LOAD) += spl_spi.o obj-$(CONFIG_$(SPL_TPL_)RAM_SUPPORT) += spl_ram.o diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c index 3f7f7ac..8296459 100644 --- a/common/spl/spl_ram.c +++ b/common/spl/spl_ram.c @@ -24,9 +24,17 @@ static ulong spl_ram_load_read(struct spl_load_info *load, ulong sector, ulong count, void *buf) { + ulong addr; + debug("%s: sector %lx, count %lx, buf %lx\n", __func__, sector, count, (ulong)buf); - memcpy(buf, (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + sector), count); + + addr = (ulong)CONFIG_SPL_LOAD_FIT_ADDRESS + sector; + if (CONFIG_IS_ENABLED(IMAGE_PRE_LOAD)) + addr += image_load_offset; + + memcpy(buf, (void *)addr, count); + return count; } @@ -37,6 +45,17 @@ static int spl_ram_load_image(struct spl_image_info *spl_image, header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS; + if (CONFIG_IS_ENABLED(IMAGE_PRE_LOAD)) { + unsigned long addr = (unsigned long)header; + int ret = image_pre_load(addr); + + if (ret) + return ret; + + addr += image_load_offset; + header = (struct image_header *)addr; + } + #if CONFIG_IS_ENABLED(DFU) if (bootdev->boot_device == BOOT_DEVICE_DFU) spl_dfu_cmd(0, "dfu_alt_info_ram", "ram", "0"); diff --git a/common/spl/spl_semihosting.c b/common/spl/spl_semihosting.c new file mode 100644 index 0000000..df6aeb2 --- /dev/null +++ b/common/spl/spl_semihosting.c @@ -0,0 +1,71 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com> + */ + +#include <common.h> +#include <image.h> +#include <log.h> +#include <semihosting.h> +#include <spl.h> + +static int smh_read_full(long fd, void *memp, size_t len) +{ + long read; + + read = smh_read(fd, memp, len); + if (read < 0) + return read; + if (read != len) + return -EIO; + return 0; +} + +static int spl_smh_load_image(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) +{ + const char *filename = CONFIG_SPL_FS_LOAD_PAYLOAD_NAME; + int ret; + long fd, len; + struct image_header *header = + spl_get_load_buffer(-sizeof(*header), sizeof(*header)); + + fd = smh_open(filename, MODE_READ | MODE_BINARY); + if (fd < 0) { + log_debug("could not open %s: %ld\n", filename, fd); + return fd; + } + + ret = smh_flen(fd); + if (ret < 0) { + log_debug("could not get length of image: %d\n", ret); + goto out; + } + len = ret; + + ret = smh_read_full(fd, header, sizeof(struct image_header)); + if (ret) { + log_debug("could not read image header: %d\n", ret); + goto out; + } + + ret = spl_parse_image_header(spl_image, bootdev, header); + if (ret) { + log_debug("failed to parse image header: %d\n", ret); + goto out; + } + + ret = smh_seek(fd, 0); + if (ret) { + log_debug("could not seek to start of image: %d\n", ret); + goto out; + } + + ret = smh_read_full(fd, (void *)spl_image->load_addr, len); + if (ret) + log_debug("could not read %s: %d\n", filename, ret); +out: + smh_close(fd); + return ret; +} +SPL_LOAD_IMAGE_METHOD("SEMIHOSTING", 0, BOOT_DEVICE_SMH, spl_smh_load_image); diff --git a/common/stdio.c b/common/stdio.c index 063c659..92161a0 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -367,9 +367,7 @@ int stdio_add_devices(void) } else { if (IS_ENABLED(CONFIG_LCD)) drv_lcd_init(); - if (IS_ENABLED(CONFIG_VIDEO) || - IS_ENABLED(CONFIG_CFB_CONSOLE) || - IS_ENABLED(CONFIG_VIDEO_VCXK)) + if (IS_ENABLED(CONFIG_VIDEO_VCXK)) drv_video_init(); } diff --git a/configs/10m50_defconfig b/configs/10m50_defconfig index 7f5ca9a..5a4290a 100644 --- a/configs/10m50_defconfig +++ b/configs/10m50_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="10m50_devboard" CONFIG_SYS_LOAD_ADDR=0xcc000000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0xCFF80000 # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -18,6 +19,7 @@ CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -26,6 +28,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xF4080000 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=0 CONFIG_ALTERA_PIO=y CONFIG_MISC=y CONFIG_ALTERA_SYSID=y diff --git a/configs/3c120_defconfig b/configs/3c120_defconfig index e7911f0..651640e 100644 --- a/configs/3c120_defconfig +++ b/configs/3c120_defconfig @@ -8,6 +8,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="3c120_devboard" CONFIG_SYS_LOAD_ADDR=0xd4000000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0xD7F80000 # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -18,6 +19,7 @@ CONFIG_CMD_CPU=y CONFIG_CMD_GPIO=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -26,6 +28,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xE2880000 CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=0 CONFIG_ALTERA_PIO=y CONFIG_MISC=y CONFIG_ALTERA_SYSID=y diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 8917af3..a66aef0 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -9,6 +9,7 @@ CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH23" CONFIG_USB2_VBUS_PIN="PH23" +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index b50bae9..9815348 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -4,4 +4,5 @@ CONFIG_DEFAULT_DEVICE_TREE="sun8i-v3s-licheepi-zero" CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set # CONFIG_NETDEVICES is not set diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig index e79791c..c94dab0 100644 --- a/configs/M5208EVBE_defconfig +++ b/configs/M5208EVBE_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE" CONFIG_TARGET_M5208EVBE=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x40010000 +CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -14,12 +16,15 @@ CONFIG_SYS_PROMPT="-> " CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x2000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x58000 diff --git a/configs/M5235EVB_Flash32_defconfig b/configs/M5235EVB_Flash32_defconfig index abac898..7383978 100644 --- a/configs/M5235EVB_Flash32_defconfig +++ b/configs/M5235EVB_Flash32_defconfig @@ -5,8 +5,10 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5235EVB_Flash32" CONFIG_TARGET_M5235EVB=y +CONFIG_NORFLASH_PS32BIT=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 -CONFIG_SYS_EXTRA_OPTIONS="NORFLASH_PS32BIT" +CONFIG_SYS_MONITOR_BASE=0xFFC00400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -18,12 +20,18 @@ CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="u-boot.bin" +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig index 8a12e4b..cbb74ec 100644 --- a/configs/M5235EVB_defconfig +++ b/configs/M5235EVB_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5235EVB" CONFIG_TARGET_M5235EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 +CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -18,12 +20,18 @@ CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="u-boot.bin" +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/M5249EVB_defconfig b/configs/M5249EVB_defconfig index 77eedd6..9e77119 100644 --- a/configs/M5249EVB_defconfig +++ b/configs/M5249EVB_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5249EVB" CONFIG_TARGET_M5249EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x200000 +CONFIG_SYS_MONITOR_BASE=0xFFE00400 # CONFIG_AUTOBOOT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_SYS_DEVICE_NULLDEV=y diff --git a/configs/M5253DEMO_defconfig b/configs/M5253DEMO_defconfig index 348f525..d5a02cd 100644 --- a/configs/M5253DEMO_defconfig +++ b/configs/M5253DEMO_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO" CONFIG_TARGET_M5253DEMO=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x100000 +CONFIG_SYS_MONITOR_BASE=0xFF800400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig index e46b097..11d4e56 100644 --- a/configs/M5272C3_defconfig +++ b/configs/M5272C3_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5272C3" CONFIG_TARGET_M5272C3=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 +CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -15,11 +17,15 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFFE00201 CONFIG_SYS_OR0_PRELIM=0xFFE00014 diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig index 3cb77b7..fe80671 100644 --- a/configs/M5275EVB_defconfig +++ b/configs/M5275EVB_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5275EVB" CONFIG_TARGET_M5275EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x800000 +CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="bootm ffe40000" @@ -19,11 +21,15 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig index 0d17cf5..66f4511 100644 --- a/configs/M5282EVB_defconfig +++ b/configs/M5282EVB_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5282EVB" CONFIG_TARGET_M5282EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 +CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -15,11 +17,15 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index b8292fd..21f3dc2 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="M53017EVB" CONFIG_TARGET_M53017EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x40010000 +CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock3 rw rootfstype=jffs2" @@ -16,12 +18,15 @@ CONFIG_SYS_PROMPT="-> " CONFIG_CMD_IMLS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x40000 +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x58000 @@ -35,4 +40,6 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y CONFIG_MII=y +CONFIG_MCFRTC=y +CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index a689665..a05f527 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -5,8 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE" CONFIG_TARGET_M5329EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x40010000 -CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=0" +CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -14,15 +15,17 @@ CONFIG_BOOTDELAY=1 CONFIG_SYS_PROMPT="-> " CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y -CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0x4000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x58000 @@ -33,8 +36,9 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y CONFIG_MII=y +CONFIG_MCFRTC=y +CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index c640a3c..d3b9575 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -5,8 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE" CONFIG_TARGET_M5329EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x40010000 -CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" +CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -17,12 +18,15 @@ CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0x4000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x58000 @@ -37,4 +41,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y CONFIG_MII=y +CONFIG_MCFRTC=y +CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index c5aa3fd..b7f3d3b 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -5,8 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="M5373EVB" CONFIG_TARGET_M5373EVB=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x40010000 -CONFIG_SYS_EXTRA_OPTIONS="NANDFLASH_SIZE=16" +CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -17,12 +18,15 @@ CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0x4000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_UDP_CHECKSUM=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x58000 @@ -37,4 +41,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y CONFIG_MII=y +CONFIG_MCFRTC=y +CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig index 04fe756..1c74e4a 100644 --- a/configs/MCR3000_defconfig +++ b/configs/MCR3000_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_SCCR_MASK=0x60000000 CONFIG_SYS_DER=0x2002000F CONFIG_SYS_LOAD_ADDR=0x200000 CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_MONITOR_BASE=0x04000000 CONFIG_BOOTDELAY=5 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="\nEnter password - autoboot in %d sec...\n" @@ -42,6 +43,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_OF_CONTROL=y diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig index eac5b74..32604fc 100644 --- a/configs/MPC837XERDB_defconfig +++ b/configs/MPC837XERDB_defconfig @@ -147,7 +147,6 @@ CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_CLKDIV_8=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="PCIE" CONFIG_BOOTDELAY=6 CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y @@ -160,6 +159,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SATA=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_DATE=y @@ -168,6 +168,10 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFE080000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="TSEC0" CONFIG_DM=y CONFIG_FSL_SATA=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 240c6be..703815e 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -24,13 +24,19 @@ CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFFF60000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="8548cds/uImage.uboot" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC0" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 434ab09..187b213 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -23,13 +23,19 @@ CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFFF60000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="8548cds/uImage.uboot" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC0" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index eb8233d..22aa9b2 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -9,9 +9,9 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_TARGET_MPC8548CDS_LEGACY=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LEGACY" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y @@ -23,13 +23,19 @@ CONFIG_CMD_IMLS=y CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_CMD_I2C=y CONFIG_CMD_PCI=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y # CONFIG_CMD_HASH is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0xFFF60000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="8548cds/uImage.uboot" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC0" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 314d73a..d92b3ea 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -54,10 +55,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index ebfb9c4..6cbc6a8 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -36,10 +36,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index ca149b0..516198b 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -19,7 +19,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -48,10 +47,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 0d1f156..a545cff 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -21,7 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -50,10 +50,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index fde12ea..28d6cb6 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -53,10 +54,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index eeda2dd..0f01049 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -35,10 +35,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 0032f27..160f4a0 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -18,7 +18,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -47,10 +46,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index e40cd4f..cf61ca3 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -49,10 +49,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index f6dfc16..e9c8c56 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -55,10 +56,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index acaba85..fcc6e63 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -37,10 +37,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 6a346fb..2774a5c 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -19,7 +19,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -49,10 +48,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 5e31d18..240aa3a 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -21,7 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -51,10 +51,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index be614b8..dc74102 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -20,6 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xD0001000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -54,10 +55,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_TPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 261ca79..11852da 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -36,10 +36,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index e102207..4ad9633 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -18,7 +18,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -48,10 +47,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 52dfbba..9b05f48 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr" @@ -50,10 +50,15 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index a8bc420..ae15002 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -54,8 +55,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index e9ee3cf..4407a02 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -49,8 +49,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 3f5a7ce..ee0fdd6 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -22,7 +22,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -51,8 +52,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 6b3685b..35b6b86 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -38,8 +38,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 3a41738..f8d0f98 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -53,8 +54,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 395f0b2..feb00ea 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -48,8 +48,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 5269c39..f18f4b2 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -21,7 +21,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -50,8 +51,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index dbe90e7..3ccd124 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -37,8 +37,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index bc277c6..0f09a4a 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -56,8 +57,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8796 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index ed6b339..b50dfcb 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -51,8 +51,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 7cad6ce..6649f5b 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -21,7 +21,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -53,8 +54,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index ccf2514..71dbb54 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -40,8 +40,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 3f3d30f..5b84455 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -22,6 +22,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -58,8 +59,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 3acb251..1e15552 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -20,7 +20,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -53,8 +53,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index e545c29..cf0ae5d 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -22,7 +22,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -55,8 +56,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 4c120e5..1638a18 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -42,8 +42,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 73e8a5c..f184ea0 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -21,6 +21,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_TPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -57,8 +58,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 614ff52..540999b 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -19,7 +19,7 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -52,8 +52,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 325a238..0881e35 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -21,7 +21,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" +CONFIG_SPL_SYS_MONITOR_BASE=0xF8F81000 +CONFIG_SPIFLASH=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" @@ -54,8 +55,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 15f2a97..f85c1e0 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -41,8 +41,13 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 01d6192..9c94522 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -39,6 +39,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index dc56c79..30145cc 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" @@ -40,6 +39,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 78a2450..1deb8e0 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -13,9 +13,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p2041rdb.cfg" CONFIG_BOOTDELAY=10 @@ -41,6 +41,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index f6bf4da..53868b1 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -36,6 +36,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index ec58500..f8fcc1e 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -37,6 +37,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 58a3eae..fd81751 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" @@ -38,6 +37,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index c48976b..29e7ec4 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -13,9 +13,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p3041ds.cfg" CONFIG_BOOTDELAY=10 @@ -39,6 +39,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index fcc7361..63a7aef 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -34,6 +34,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 25f7861..174bc62 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" @@ -38,6 +37,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index c32c394..f14c6c8 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -13,9 +13,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p4080ds.cfg" CONFIG_BOOTDELAY=10 @@ -39,6 +39,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index e3c41c3..713183e 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -34,6 +34,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_ECC=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 279976c..0e04aca 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -38,6 +38,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 34ebc51..cb3b534 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" @@ -38,6 +37,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index ea8b673..e4e5021 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -13,9 +13,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/corenet_ds/pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/corenet_ds/rcw_p5040ds.cfg" CONFIG_BOOTDELAY=10 @@ -39,6 +39,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index e9bf7ff..a7ada44 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -34,6 +34,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index 77f44f6..1a7f6cf 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index b84e3bd..baa4b95 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -18,6 +18,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 20ded48..29bfb31 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -3,8 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" @@ -14,6 +12,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_MP=y @@ -61,6 +61,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 8a82082..0650272 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -3,8 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" @@ -15,12 +13,13 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_sd_rcw.cfg" @@ -60,6 +59,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 87d4083..fd1da7f 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -3,8 +3,6 @@ CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,13 +15,15 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t102xrdb/t1024_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t102xrdb/t1024_spi_rcw.cfg" CONFIG_BOOTDELAY=10 @@ -62,6 +62,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index de34ba7..985fcb8 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -1,14 +1,14 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 CONFIG_SYS_MALLOC_LEN=0xa00000 -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -45,6 +45,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index a755d9c..8225e6e 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -52,9 +52,14 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index efb46b3..d3b55ea 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -17,7 +17,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg" @@ -51,9 +50,14 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 1568c79..9474e20 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -19,8 +19,8 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t104xrdb/t1042d4_spi_rcw.cfg" CONFIG_BOOTDELAY=10 @@ -53,9 +53,14 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 3abd079..21e1c3d 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -36,9 +36,14 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC4" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_DM_I2C=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 1b6ef8a..66883c7 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -55,6 +55,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 8ab1c5d..3a01904 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -22,7 +22,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" @@ -54,6 +53,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index a84b7ad..a7e6217 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -39,6 +39,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_DYNAMIC_DDR_CLK_FREQ=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 8fd0248..9a7acf1 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -24,9 +24,9 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xqds/t208x_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xqds/t2080_spi_rcw.cfg" CONFIG_BOOTDELAY=10 @@ -56,6 +56,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index f9dbc84..af8e73a 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -10,12 +10,12 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTCOMMAND=y @@ -36,6 +36,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_REMOTE=y CONFIG_ENV_ADDR=0xFFE20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 424b3f2..3967269 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -39,6 +39,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 1c55d30..fd6afa9 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" @@ -17,6 +15,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_MP=y @@ -59,6 +59,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index ea9c479..48f7e0c 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" @@ -18,12 +16,13 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg" @@ -58,6 +57,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 5e08b82..bb9d86c 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -20,13 +18,15 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg" CONFIG_BOOTDELAY=10 @@ -60,6 +60,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 1c1fea6..218419b 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -1,7 +1,5 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" @@ -12,6 +10,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -43,6 +43,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index ae924b1..71669d6 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" @@ -18,6 +16,8 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_T2080RDB_REV_D=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_SYS_CUSTOM_LDSCRIPT=y CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" CONFIG_MP=y @@ -60,6 +60,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index fef0893..f38943a 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" @@ -19,12 +17,13 @@ CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_T2080RDB_REV_D=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_sd_rcw.cfg" @@ -59,6 +58,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 0b7e715..aaebb4f 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x00201000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -21,13 +19,15 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_T2080RDB_REV_D=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_RAMBOOT_PBL=y +CONFIG_SPIFLASH=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/t208xrdb/t2080_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/t208xrdb/t2080_spi_rcw.cfg" CONFIG_BOOTDELAY=10 @@ -61,6 +61,10 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9 CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index c78b21d..1612806 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -1,7 +1,5 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SYS_MEMTEST_START=0x00200000 -CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" @@ -13,6 +11,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y CONFIG_T2080RDB_REV_D=y +CONFIG_SYS_MEMTEST_START=0x00200000 +CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -44,6 +44,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index ea6a528..06e4ae6 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -21,7 +21,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="$(SRCTREE)/board/freescale/t4rdb/t4_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="$(SRCTREE)/board/freescale/t4rdb/t4_sd_rcw.cfg" @@ -50,6 +49,10 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index e17e8b1..784a45f 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -35,6 +35,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xEFF20000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig index 9f7b268..c353b84 100644 --- a/configs/adp-ae3xx_defconfig +++ b/configs/adp-ae3xx_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_CLK_FREQ=39062500 CONFIG_TARGET_ADP_AE3XX=y CONFIG_SYS_LOAD_ADDR=0x300000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="NDS32 # " diff --git a/configs/adp-ag101p_defconfig b/configs/adp-ag101p_defconfig index 49108ec..b8cb832 100644 --- a/configs/adp-ag101p_defconfig +++ b/configs/adp-ag101p_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_CLK_FREQ=39062500 CONFIG_TARGET_ADP_AG101P=y CONFIG_SYS_LOAD_ADDR=0x300000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0x80000000 CONFIG_BOOTDELAY=3 # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PROMPT="NDS32 # " diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 0324f1e..df926b4 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -8,6 +8,7 @@ CONFIG_TARGET_AX25_AE350=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 2484d19..2924c89 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -12,6 +12,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 9f21084..91e88a3 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -14,6 +14,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index d69a585..f84294e 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -9,6 +9,7 @@ CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index c30763a..22c0726 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -9,6 +9,7 @@ CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 8ef8e91..27ea0b7 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -13,6 +13,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 2bf3dd6..1c1bda6 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -15,6 +15,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index e8dc447..3a6b52f 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -10,6 +10,7 @@ CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y +CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PROMPT="RISC-V # " diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 0930645..432f29c 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -76,6 +76,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 90612e6..5ad078f 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -49,6 +49,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index c79ffde..3e12969 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -6,13 +6,13 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_AM33XX=y +CONFIG_CLOCK_SYNTHESIZER=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_DISTRO_DEFAULTS=y CONFIG_TIMESTAMP=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y -CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" @@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y # CONFIG_SPL_BLK is not set CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 33d0fb8..fa97ec1 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -4,6 +4,10 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y +CONFIG_CLOCK_SYNTHESIZER=y +CONFIG_AM335X_USB0=y +CONFIG_AM335X_USB0_PERIPHERAL=y +CONFIG_AM335X_USB1=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_TIMESTAMP=y @@ -47,6 +51,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_CLK=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index f8acb7e..abcc3e6 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y +CONFIG_CLOCK_SYNTHESIZER=y # CONFIG_SPL_MMC is not set CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -43,6 +44,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_CLK=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 8b3bd48..28ebe00 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -3,13 +3,14 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x81000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_GUARDIAN=y +CONFIG_AM335X_USB0=y +CONFIG_AM335X_USB0_PERIPHERAL=y +CONFIG_AM335X_USB1=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 @@ -17,6 +18,8 @@ CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_ENV_OFFSET_REDUND=0x540000 CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x81000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=0 @@ -68,6 +71,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_SPL_ENV_IS_NOWHERE=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y CONFIG_REGMAP=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 993fbbc..b6fd86f 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -6,6 +6,7 @@ CONFIG_ISW_ENTRY_ADDR=0x40300350 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y +CONFIG_CLOCK_SYNTHESIZER=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y CONFIG_TIMESTAMP=y @@ -42,6 +43,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_CLK=y diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index ecb0526..1548317 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -6,6 +6,7 @@ CONFIG_ISW_ENTRY_ADDR=0x40301950 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_AM33XX=y +CONFIG_CLOCK_SYNTHESIZER=y # CONFIG_SPL_MMC is not set CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set @@ -44,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_CLK=y diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 39d354f..3101cf4 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -68,6 +68,7 @@ CONFIG_ENV_UBI_VOLUME_REDUND="config_r" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index a5b251b..5953193 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -23,6 +23,9 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=30 +CONFIG_RESET_TO_RETRY=y CONFIG_BOOTCOMMAND="if mmc dev 1; mmc rescan; then run emmc_setup; else echo ERROR: eMMC device not detected!; panic; fi; if run loaduimage; then run mmcboot; else echo ERROR Unable to load uImage from eMMC!; echo Performing Rollback!; setenv _active_ ${active_root}; setenv _inactive_ ${inactive_root}; setenv active_root ${_inactive_}; setenv inactive_root ${_active_}; saveenv; reset; fi; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -53,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index 19294a9..00442d8 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index e1c8e31..37899df 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -24,6 +24,9 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=30 +CONFIG_RESET_TO_RETRY=y CONFIG_BOOTCOMMAND="run fusecmd; if run netboot; then echo Booting from network; else echo ERROR: Cannot boot from network!; panic; fi; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -54,6 +57,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index d0e1f96..c33c94f 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -24,6 +24,9 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter 'shc' to enter prompt (times out) %d \nEnter 'noautoboot' to enter prompt without timeout\n" CONFIG_AUTOBOOT_DELAY_STR="shc" CONFIG_AUTOBOOT_STOP_STR="noautoboot" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=30 +CONFIG_RESET_TO_RETRY=y CONFIG_BOOTCOMMAND="if mmc dev 0; mmc rescan; then run sd_setup; else echo ERROR: SD/MMC-Card not detected!; panic; fi; if run loaduimage; then echo Bootable SD/MMC-Card inserted, booting from it!; run mmcboot; else echo ERROR: Unable to load uImage from SD/MMC-Card!; panic; fi; " CONFIG_DEFAULT_FDT_FILE="am335x-shc" CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -53,6 +56,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 21c67bd..c71741c 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -16,7 +16,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_TIMESTAMP=y -CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" CONFIG_AUTOBOOT_DELAY_STR="d" @@ -59,6 +58,7 @@ CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index e287e8e..52c2a67 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -52,7 +52,10 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y # CONFIG_ENV_IS_IN_FAT is not set CONFIG_ENV_IS_IN_NAND=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y CONFIG_DM_PCA953X=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 716cf3f..ef604e4 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -46,7 +46,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 31b564b..59d16b0 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -11,7 +11,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_AM43XX=y CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="QSPI" CONFIG_QSPI_BOOT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -38,7 +37,9 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_DM=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index a15a171..8d3461f 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -40,7 +40,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_DM=y CONFIG_DFU_MMC=y CONFIG_DFU_RAM=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index fd0bd25..be56573 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -52,7 +52,9 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index d4bebd2..7acc60e 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -50,7 +50,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SPL_REGMAP=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 693766b..0732aa1 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 7d9e254..cdfd437 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -59,6 +59,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 10106ab..4277c96 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -66,6 +66,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/amcore_defconfig b/configs/amcore_defconfig index afb3a77..b104795 100644 --- a/configs/amcore_defconfig +++ b/configs/amcore_defconfig @@ -6,7 +6,9 @@ CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="amcore" CONFIG_TARGET_AMCORE=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 +CONFIG_SYS_MONITOR_BASE=0xFFC00400 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="bootm ffc20000" diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 3af41e8..ffbd19f 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80100000 -CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,6 +11,8 @@ CONFIG_DEBUG_UART_BASE=0xb8020000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80100000 +CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 17aeda4..237a868 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x800 -CONFIG_SYS_MEMTEST_START=0x80100000 -CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -14,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP143=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80100000 +CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index 3aa0ea5..8ddba4f 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x800 -CONFIG_SYS_MEMTEST_START=0x80100000 -CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -14,6 +12,8 @@ CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_ARCH_ATH79=y CONFIG_TARGET_AP152=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80100000 +CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 43215fa..f963dcd 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=3 -CONFIG_SYS_MEMTEST_START=0x88000000 -CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qm-apalis" CONFIG_TARGET_APALIS_IMX8=y +CONFIG_SYS_MEMTEST_START=0x88000000 +CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x80280000 diff --git a/configs/apalis-imx8x_defconfig b/configs/apalis-imx8x_defconfig index 25da027..11f7a58 100644 --- a/configs/apalis-imx8x_defconfig +++ b/configs/apalis-imx8x_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=3 -CONFIG_SYS_MEMTEST_START=0x88000000 -CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-apalis" CONFIG_TARGET_APALIS_IMX8X=y +CONFIG_SYS_MEMTEST_START=0x88000000 +CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x89000000 @@ -39,6 +39,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index bd71e4c..3fa1bb5 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6Q=y @@ -24,6 +22,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index eba3ea8..7a86698 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -62,7 +62,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_APPEND=y CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_VERSION_VARIABLE=y +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_APBH_DMA=y CONFIG_APBH_DMA_BURST=y diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index 72a106a..9019c82 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -62,7 +62,10 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_APPEND=y CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_VERSION_VARIABLE=y +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_APBH_DMA=y CONFIG_APBH_DMA_BURST=y diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig index 2f5c115..d0e457f 100644 --- a/configs/armadillo-800eva_defconfig +++ b/configs/armadillo-800eva_defconfig @@ -13,6 +13,7 @@ CONFIG_R8A7740=y CONFIG_TARGET_ARMADILLO_800EVA=y CONFIG_SYS_CLK_FREQ=50000000 CONFIG_SYS_LOAD_ADDR=0x44000000 +CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_BOOTDELAY=3 # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set @@ -41,6 +42,7 @@ CONFIG_ENV_ADDR=0x40000 CONFIG_VERSION_VARIABLE=y # CONFIG_MMC is not set CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_SMSC=y CONFIG_SH_ETHER=y CONFIG_SCIF_CONSOLE=y diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig index a97c4ff..729750c 100644 --- a/configs/astro_mcf5373l_defconfig +++ b/configs/astro_mcf5373l_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_SECT_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="astro_mcf5373l" CONFIG_TARGET_ASTRO_MCF5373L=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 +CONFIG_SYS_MONITOR_BASE=0x00000400 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS=" console=ttyS2,115200 rootfstype=romfs loaderversion=$loaderversion" @@ -39,5 +41,7 @@ CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_MCFRTC=y +CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 CONFIG_MCFUART=y CONFIG_WATCHDOG=y diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig index ebcf14d..2193c07 100644 --- a/configs/at91sam9260ek_dataflash_cs0_defconfig +++ b/configs/at91sam9260ek_dataflash_cs0_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -33,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig index 7b9e0a4..25fc63d 100644 --- a/configs/at91sam9260ek_dataflash_cs1_defconfig +++ b/configs/at91sam9260ek_dataflash_cs1_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -33,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9260ek_nandflash_defconfig b/configs/at91sam9260ek_nandflash_defconfig index 6e7da85..644a950 100644 --- a/configs/at91sam9260ek_nandflash_defconfig +++ b/configs/at91sam9260ek_nandflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" @@ -15,7 +17,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -31,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -43,7 +46,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig index 5ec1e61..76e9314 100644 --- a/configs/at91sam9261ek_dataflash_cs0_defconfig +++ b/configs/at91sam9261ek_dataflash_cs0_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9261EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -16,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -24,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -32,12 +34,14 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y @@ -59,3 +63,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig index 94c2834..2bdac9c 100644 --- a/configs/at91sam9261ek_dataflash_cs3_defconfig +++ b/configs/at91sam9261ek_dataflash_cs3_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9261EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -16,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -24,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:3; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -32,12 +34,14 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y @@ -59,3 +63,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9261ek_nandflash_defconfig b/configs/at91sam9261ek_nandflash_defconfig index ed2b04b..20909d8 100644 --- a/configs/at91sam9261ek_nandflash_defconfig +++ b/configs/at91sam9261ek_nandflash_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9261EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" @@ -14,7 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -22,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -30,19 +33,20 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y @@ -57,3 +61,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig index 29b3923..2250402 100644 --- a/configs/at91sam9263ek_dataflash_cs0_defconfig +++ b/configs/at91sam9263ek_dataflash_cs0_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9263EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -36,6 +37,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -65,3 +67,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig index 29b3923..2250402 100644 --- a/configs/at91sam9263ek_dataflash_defconfig +++ b/configs/at91sam9263ek_dataflash_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9263EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -25,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -36,6 +37,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -65,3 +67,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_nandflash_defconfig b/configs/at91sam9263ek_nandflash_defconfig index 4551cfd..3ddadc4 100644 --- a/configs/at91sam9263ek_nandflash_defconfig +++ b/configs/at91sam9263ek_nandflash_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9263EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" @@ -15,7 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -23,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -34,6 +36,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -46,7 +49,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y @@ -63,3 +65,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_norflash_boot_defconfig b/configs/at91sam9263ek_norflash_boot_defconfig index ae69c54..382ca52 100644 --- a/configs/at91sam9263ek_norflash_boot_defconfig +++ b/configs/at91sam9263ek_norflash_boot_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x0000000 CONFIG_SYS_MALLOC_LEN=0x50000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9263EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_SYS_USE_NORFLASH=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -15,10 +17,11 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_BOOT_NORFLASH" +CONFIG_SYS_MONITOR_BASE=0x10000000 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -30,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -63,3 +67,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9263ek_norflash_defconfig b/configs/at91sam9263ek_norflash_defconfig index 21ed22a..fbdf01f 100644 --- a/configs/at91sam9263ek_norflash_defconfig +++ b/configs/at91sam9263ek_norflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x50000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9263EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_SYS_USE_NORFLASH=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -16,10 +18,11 @@ CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NORFLASH" +CONFIG_SYS_MONITOR_BASE=0x10000000 CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -31,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -64,3 +68,4 @@ CONFIG_DM_SPI=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y CONFIG_USB=y +CONFIG_ATMEL_LCD_BGR555=y diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig index f4d5dba..0f767f2 100644 --- a/configs/at91sam9g10ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9G10=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -16,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -24,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -32,12 +34,14 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig index 72228b5..6a12b05 100644 --- a/configs/at91sam9g10ek_dataflash_cs3_defconfig +++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9G10=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -16,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_DATAFLASH_CS3" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -24,6 +25,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="sf probe 0:3; sf read 0x22000000 0x84000 0x294000; bootm 0x22000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -32,12 +34,14 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y diff --git a/configs/at91sam9g10ek_nandflash_defconfig b/configs/at91sam9g10ek_nandflash_defconfig index 293683c..9b3274e 100644 --- a/configs/at91sam9g10ek_nandflash_defconfig +++ b/configs/at91sam9g10ek_nandflash_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9261EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9G10=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" @@ -14,7 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G10,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -22,6 +24,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x22000000 0x200000 0x300000; bootm" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -30,19 +33,20 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9g20ek_2mmc_defconfig b/configs/at91sam9g20ek_2mmc_defconfig index 97057b5..c341b36 100644 --- a/configs/at91sam9g20ek_2mmc_defconfig +++ b/configs/at91sam9g20ek_2mmc_defconfig @@ -6,6 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x23000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y +CONFIG_AT91SAM9G20EK_2MMC=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x2000 @@ -16,7 +19,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_MMC" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait" @@ -33,6 +36,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_2mmc_nandflash_defconfig b/configs/at91sam9g20ek_2mmc_nandflash_defconfig index cb381e2..e8bdae1 100644 --- a/configs/at91sam9g20ek_2mmc_nandflash_defconfig +++ b/configs/at91sam9g20ek_2mmc_nandflash_defconfig @@ -6,6 +6,9 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y +CONFIG_AT91SAM9G20EK_2MMC=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek_2mmc" @@ -15,7 +18,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,AT91SAM9G20EK_2MMC,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -32,6 +35,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -44,7 +48,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig index cff3b1a..4b508cb 100644 --- a/configs/at91sam9g20ek_dataflash_cs0_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -33,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig index 350faaf..17aefe4 100644 --- a/configs/at91sam9g20ek_dataflash_cs1_defconfig +++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -33,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9g20ek_nandflash_defconfig b/configs/at91sam9g20ek_nandflash_defconfig index ef37695..e73af99 100644 --- a/configs/at91sam9g20ek_nandflash_defconfig +++ b/configs/at91sam9g20ek_nandflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20ek" @@ -15,7 +17,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -31,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -43,7 +46,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 21ad962..1f17336 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_SYS_MALLOC_LEN=0x2c000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9M10G45EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y @@ -22,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fatload mmc 0:1 0x71000000 dtb; fatload mmc 0:1 0x72000000 zImage; bootz 0x72000000 - 0x71000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -34,6 +36,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 695b4c5..c595b9e 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9M10G45EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" @@ -22,6 +23,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -34,6 +36,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 998bacf..b84f924 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index 90a832a..b5964de 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index e704ee0..852d635 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig index 9943b86..796bf5c 100644 --- a/configs/at91sam9rlek_dataflash_defconfig +++ b/configs/at91sam9rlek_dataflash_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9RLEK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" diff --git a/configs/at91sam9rlek_mmc_defconfig b/configs/at91sam9rlek_mmc_defconfig index 9fd2042..69d97ac 100644 --- a/configs/at91sam9rlek_mmc_defconfig +++ b/configs/at91sam9rlek_mmc_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x2c000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9RLEK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y @@ -15,7 +16,7 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_MMC" +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mmcblk0p2 rw rootwait" diff --git a/configs/at91sam9rlek_nandflash_defconfig b/configs/at91sam9rlek_nandflash_defconfig index a922780..1547275 100644 --- a/configs/at91sam9rlek_nandflash_defconfig +++ b/configs/at91sam9rlek_nandflash_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x21F00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9RLEK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9rlek" @@ -15,7 +16,7 @@ CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9RL,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256K(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs" @@ -45,7 +46,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index f00f3c8..7aaf211 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +18,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs rw" @@ -36,6 +36,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 1b89828..5922f6c 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y @@ -32,6 +33,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 124c58d..91a654d 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" @@ -34,6 +35,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 4eecdf3..59b010d 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9X5EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 @@ -36,6 +37,7 @@ CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig index 28479b9..2193c07 100644 --- a/configs/at91sam9xeek_dataflash_cs0_defconfig +++ b/configs/at91sam9xeek_dataflash_cs0_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS0" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -33,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig index 5072a9b..25fc63d 100644 --- a/configs/at91sam9xeek_dataflash_cs1_defconfig +++ b/configs/at91sam9xeek_dataflash_cs1_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x2d000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 @@ -17,7 +19,6 @@ CONFIG_DEBUG_UART_BASE=0xfffff200 CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_DATAFLASH_CS1" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -33,6 +34,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/at91sam9xeek_nandflash_defconfig b/configs/at91sam9xeek_nandflash_defconfig index fa7f052..644a950 100644 --- a/configs/at91sam9xeek_nandflash_defconfig +++ b/configs/at91sam9xeek_nandflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_AT91SAM9260EK=y +CONFIG_ATMEL_LEGACY=y +CONFIG_AT91SAM9260EK=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260ek" @@ -15,7 +17,7 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -31,6 +33,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y @@ -43,7 +46,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig index f89b713..a7a7922 100644 --- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig +++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="avnet-ultrazedev-cc-v1.0-ultrazedev-som-v1.0" CONFIG_SPL=y @@ -16,6 +14,8 @@ CONFIG_ZYNQ_MAC_IN_EEPROM=y CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0xfa CONFIG_ZYNQMP_PSU_INIT_ENABLED=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -25,18 +25,22 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 CONFIG_BOOTDELAY=0 # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_CLOCKS=y CONFIG_SPL_OS_BOOT=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_FPGA_LOADBP=y CONFIG_CMD_FPGA_LOADP=y CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_CMD_EXT4_WRITE=y CONFIG_SPL_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_CLK_ZYNQMP=y CONFIG_FPGA_XILINX=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 518e6d4..910c98a 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -12,6 +12,8 @@ CONFIG_SYS_TEXT_BASE=0x21000000 CONFIG_SYS_MALLOC_LEN=0x460000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_TAURUS=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -28,7 +30,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run flash_self" @@ -70,7 +72,6 @@ CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 @@ -82,6 +83,7 @@ CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_SPECIFY_CONSOLE_INDEX=y diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 5dd323d..ff2e5e4 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -32,6 +32,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_HSDK_CREG_GPIO=y CONFIG_MMC=y diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 698dbda..82bac62 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -32,6 +32,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_HSDK_CREG_GPIO=y CONFIG_MMC=y diff --git a/configs/bananapi_m2_berry_defconfig b/configs/bananapi_m2_berry_defconfig index 2d65d0f..a35fcdb 100644 --- a/configs/bananapi_m2_berry_defconfig +++ b/configs/bananapi_m2_berry_defconfig @@ -6,6 +6,7 @@ CONFIG_MACH_SUN8I_R40=y CONFIG_DRAM_CLK=576 CONFIG_MMC0_CD_PIN="PH13" CONFIG_USB1_VBUS_PIN="PH23" +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 1f72c53..667240b 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -48,6 +49,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/bcm96753ref_ram_defconfig b/configs/bcm96753ref_ram_defconfig new file mode 100644 index 0000000..2c44083 --- /dev/null +++ b/configs/bcm96753ref_ram_defconfig @@ -0,0 +1,82 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SKIP_LOWLEVEL_INIT_ONLY=y +CONFIG_SYS_ARCH_TIMER=y +CONFIG_ARCH_BCM6753=y +CONFIG_SYS_TEXT_BASE=0x1000000 +CONFIG_SYS_MALLOC_F_LEN=0x1000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="bcm96753ref" +CONFIG_ARMV7_LPAE=y +CONFIG_TARGET_BCM96753REF=y +CONFIG_ENV_VARS_UBOOT_CONFIG=y +CONFIG_SYS_LOAD_ADDR=0x1000000 +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_CIPHER=y +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +# CONFIG_AUTOBOOT is not set +CONFIG_SYS_CONSOLE_IS_IN_ENV=y +CONFIG_HUSH_PARSER=y +# CONFIG_CMD_BOOTD is not set +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_PLAN9 is not set +# CONFIG_BOOTM_RTEMS is not set +# CONFIG_BOOTM_VXWORKS is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_CLK=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MTD=y +CONFIG_CMD_NAND=y +CONFIG_CMD_SPI=y +CONFIG_CMD_WDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_CACHE=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +# CONFIG_CMD_UBIFS is not set +# CONFIG_NET is not set +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_BUTTON=y +CONFIG_BUTTON_GPIO=y +CONFIG_CLK=y +CONFIG_BCM6345_GPIO=y +# CONFIG_INPUT is not set +CONFIG_LED=y +CONFIG_LED_BCM6753=y +CONFIG_LED_BLINK=y +CONFIG_LED_GPIO=y +CONFIG_MISC=y +# CONFIG_MMC is not set +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_MTD_RAW_NAND=y +CONFIG_NAND_BRCMNAND=y +CONFIG_NAND_BRCMNAND_6753=y +CONFIG_PINCTRL=y +CONFIG_PINCONF=y +CONFIG_SPECIFY_CONSOLE_INDEX=y +CONFIG_DM_SERIAL=y +CONFIG_PL01X_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_SPI_MEM=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_WATCHDOG=y +CONFIG_WDT_BCM6345=y +CONFIG_REGEX=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index 7eb23bd..95cce92 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -49,6 +49,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_BRCMNAND=y CONFIG_NAND_BRCMNAND_6838=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y CONFIG_PINCTRL=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 7b42b7a..9775ee1 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -26,6 +26,7 @@ CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="antminer> " @@ -43,6 +44,7 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_PART=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -58,6 +60,7 @@ CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTP_SERVERIP=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig index 1cee130..d41a19c 100644 --- a/configs/bk4r1_defconfig +++ b/configs/bk4r1_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_SYS_MALLOC_LEN=0x402000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80010000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x200000 CONFIG_DM_GPIO=y @@ -17,6 +15,8 @@ CONFIG_SYS_BOOTCOUNT_ADDR=0x4006e02c CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x220000 CONFIG_TARGET_BK4R1=y +CONFIG_SYS_MEMTEST_START=0x80010000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -49,6 +49,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=500 CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 1e117c9..82d54de 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -53,6 +53,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 4594557..10b60c4 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -10,6 +8,8 @@ CONFIG_TARGET_BOSTON=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x88000000 CONFIG_FIT=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index 20ba015..91e0d2d 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -11,6 +9,8 @@ CONFIG_SYS_LITTLE_ENDIAN=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x88000000 CONFIG_FIT=y diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig index f2fe854..3e1d573 100644 --- a/configs/boston32r6_defconfig +++ b/configs/boston32r6_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -11,6 +9,8 @@ CONFIG_CPU_MIPS32_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x88000000 CONFIG_FIT=y diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig index 9118596..7f7933e 100644 --- a/configs/boston32r6el_defconfig +++ b/configs/boston32r6el_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -12,6 +10,8 @@ CONFIG_CPU_MIPS32_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x88000000 CONFIG_FIT=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index 6794eb8..1c06dbe 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -11,6 +9,8 @@ CONFIG_CPU_MIPS64_R2=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xffffffff88000000 CONFIG_FIT=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index 7804884..eb6e4bf 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -12,6 +10,8 @@ CONFIG_CPU_MIPS64_R2=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xffffffff88000000 CONFIG_FIT=y diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig index 35d0440..d141b2c 100644 --- a/configs/boston64r6_defconfig +++ b/configs/boston64r6_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -11,6 +9,8 @@ CONFIG_CPU_MIPS64_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xffffffff88000000 CONFIG_FIT=y diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig index 99004d8..60c5a62 100644 --- a/configs/boston64r6el_defconfig +++ b/configs/boston64r6el_defconfig @@ -1,8 +1,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xFFFFFFFF9FC00000 CONFIG_SYS_MALLOC_LEN=0x40000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="img,boston" @@ -12,6 +10,8 @@ CONFIG_CPU_MIPS64_R6=y # CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xffffffff88000000 CONFIG_FIT=y diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 6e96ed5..ac0fbd5 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -53,6 +53,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -74,6 +75,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/brppt1_nand_defconfig b/configs/brppt1_nand_defconfig index 551eda8..9df5121 100644 --- a/configs/brppt1_nand_defconfig +++ b/configs/brppt1_nand_defconfig @@ -54,6 +54,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -75,6 +76,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig index ad6cc44..11d7d7b 100644 --- a/configs/brppt1_spi_defconfig +++ b/configs/brppt1_spi_defconfig @@ -62,6 +62,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -81,6 +82,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig index ddcf8ee..38eedb4 100644 --- a/configs/brppt2_defconfig +++ b/configs/brppt2_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_CACHE=y @@ -65,6 +66,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_ARP_TIMEOUT=1500 +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 343d75a..771a42f 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -65,6 +65,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -81,6 +82,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index a30c1b8..35b2b65 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_ITEST is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_MAY_FAIL=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -73,6 +74,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig index 7bfbcf6..38302dd 100644 --- a/configs/cherryhill_defconfig +++ b/configs/cherryhill_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -37,6 +38,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index a50e732..ae101da 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -46,6 +46,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index 0cd8f39..4e438ca 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -22,6 +22,7 @@ CONFIG_X86_OFFSET_U_BOOT=0xffd00000 CONFIG_X86_OFFSET_SPL=0xffe80000 CONFIG_INTEL_ACPIGEN=y CONFIG_INTEL_GENERIC_WIFI=y +CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_CHROMEOS=y CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y @@ -59,6 +60,7 @@ CONFIG_CMD_READ=y CONFIG_CMD_SATA=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TIME=y CONFIG_CMD_SOUND=y CONFIG_CMD_BOOTSTAGE=y @@ -77,6 +79,8 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_SPL_REMOVE_PROPS="clocks clock-names interrupt-parent interrupts linux-name acpi,name acpi,path u-boot,acpi-dsdt-order u-boot,acpi-ssdt-order" CONFIG_ENV_OVERWRITE=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index a575437..b29c5cc 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -61,6 +62,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 4bb52b6..9186621 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -52,6 +53,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig index fc1292b..93f1d40 100644 --- a/configs/chromebook_samus_defconfig +++ b/configs/chromebook_samus_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -54,6 +55,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig index 6839d8c..3687118 100644 --- a/configs/chromebook_samus_tpl_defconfig +++ b/configs/chromebook_samus_tpl_defconfig @@ -20,6 +20,7 @@ CONFIG_HAVE_REFCODE=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_X86_OFFSET_U_BOOT=0xffee0000 +CONFIG_SYS_MONITOR_BASE=0xFFED0000 CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y @@ -71,6 +72,8 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" # CONFIG_NET is not set CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 748a0e7..363b5f3 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -46,6 +47,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig index 3de5284..7c70825 100644 --- a/configs/cl-som-imx7_defconfig +++ b/configs/cl-som-imx7_defconfig @@ -61,6 +61,8 @@ CONFIG_ENV_OVERWRITE=y # CONFIG_ENV_IS_IN_MMC is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_CMD_PCA953X=y @@ -82,6 +84,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_POWER_LEGACY=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 335adc9..5a97ef5 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -42,6 +42,8 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_MVEBU=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 6dcd70f..f5c960b 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -41,6 +41,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y CONFIG_DM_I2C=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 6106794..cfa3281 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -65,6 +65,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC0" +CONFIG_ARP_TIMEOUT=200 CONFIG_SPL_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig index 7a65683..0b4912b 100644 --- a/configs/cm_t335_defconfig +++ b/configs/cm_t335_defconfig @@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_CMD_PCA953X=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index d8aab58..46c3eb6 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -63,6 +63,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y +CONFIG_SYS_RX_ETH_BUFFER=64 CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/cobra5272_defconfig b/configs/cobra5272_defconfig index 4fc3b0a..54a1a8f6 100644 --- a/configs/cobra5272_defconfig +++ b/configs/cobra5272_defconfig @@ -5,7 +5,9 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="cobra5272" CONFIG_TARGET_COBRA5272=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 +CONFIG_SYS_MONITOR_BASE=0xFFE00400 CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set # CONFIG_CMDLINE_EDITING is not set @@ -15,9 +17,12 @@ CONFIG_CMD_IMLS=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_ENV_ADDR=0xFFE04000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFFE00201 CONFIG_SYS_OR0_PRELIM=0xFFE00014 diff --git a/configs/colibri-imx6ull-emmc_defconfig b/configs/colibri-imx6ull-emmc_defconfig index e7dba8e..4781366 100644 --- a/configs/colibri-imx6ull-emmc_defconfig +++ b/configs/colibri-imx6ull-emmc_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6ULL=y @@ -11,6 +9,8 @@ CONFIG_TARGET_COLIBRI_IMX6ULL=y CONFIG_DM_GPIO=y CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri-emmc" +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig index 2b9d318..c601e96 100644 --- a/configs/colibri-imx6ull_defconfig +++ b/configs/colibri-imx6ull_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x380000 CONFIG_MX6ULL=y @@ -12,6 +10,8 @@ CONFIG_TARGET_COLIBRI_IMX6ULL=y CONFIG_DM_GPIO=y CONFIG_TARGET_COLIBRI_IMX6ULL_NAND=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri" +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 04f7f5b..1f6456e 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=3 -CONFIG_SYS_MEMTEST_START=0x88000000 -CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-imx8qxp-colibri" CONFIG_TARGET_COLIBRI_IMX8X=y +CONFIG_SYS_MEMTEST_START=0x88000000 +CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x80280000 diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 43c3b04..04b73a8 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_MX6DL=y @@ -23,6 +21,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_CMD_HDMIDETECT=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig index 5251812..1ccc716 100644 --- a/configs/colibri_imx7_defconfig +++ b/configs/colibri_imx7_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x380000 CONFIG_DM_GPIO=y @@ -12,6 +10,8 @@ CONFIG_TARGET_COLIBRI_IMX7=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run ubiboot ; echo ; echo ubiboot failed ; run distro_bootcmd;" diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig index e22278a..dcac585 100644 --- a/configs/colibri_imx7_emmc_defconfig +++ b/configs/colibri_imx7_emmc_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2000000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y @@ -13,6 +11,8 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x8c000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=1 diff --git a/configs/colibri_pxa270_defconfig b/configs/colibri_pxa270_defconfig index 0116cfa..c2c0a2b 100644 --- a/configs/colibri_pxa270_defconfig +++ b/configs/colibri_pxa270_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0xa0000000 CONFIG_TIMESTAMP=y +CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=tty0 console=ttyS0,115200" CONFIG_USE_BOOTCOMMAND=y @@ -31,6 +32,7 @@ CONFIG_CMD_DM=y CONFIG_CMD_MMC=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y @@ -38,6 +40,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x80000 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_DM=y CONFIG_PXA_MMC_GENERIC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig index 8cf8a31..ce6b331 100644 --- a/configs/colibri_vf_defconfig +++ b/configs/colibri_vf_defconfig @@ -6,13 +6,13 @@ CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_SYS_MALLOC_LEN=0x0220000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80010000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x180000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vf610-colibri" CONFIG_TARGET_COLIBRI_VF=y +CONFIG_SYS_MEMTEST_START=0x80010000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x80008000 CONFIG_BOOTDELAY=1 @@ -101,7 +101,6 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set -CONFIG_VIDEO_FSL_DCU_FB=y CONFIG_SPLASH_SCREEN_ALIGN=y CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_FDT_FIXUP_PARTITIONS=y diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index ed25099..9268aea 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_LED=y @@ -49,6 +50,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index ea7d7b9..9d2fc0c 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_LED=y @@ -49,6 +50,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index 71b4d89..ddb1250 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_BCM6345_GPIO=y @@ -50,6 +51,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 151c623..b2973fa 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_LED=y @@ -51,6 +52,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_BRCMNAND=y CONFIG_NAND_BRCMNAND_6368=y CONFIG_SYS_NAND_ONFI_DETECTION=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index 722b719..5ad85b1 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_BCM6345_GPIO=y @@ -49,6 +50,7 @@ CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_BCM6368_ETH=y diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig index c1cf8cc..1c5efec 100644 --- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig +++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -55,6 +56,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig index 5cad4d7..5aba0e2 100644 --- a/configs/conga-qeval20-qa3-e3845_defconfig +++ b/configs/conga-qeval20-qa3-e3845_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -51,6 +52,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index fa41c5e..953364f 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -57,6 +57,10 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="ccdc.img" +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_SCSI_AHCI=y CONFIG_DM_PCA953X=y @@ -69,6 +73,7 @@ CONFIG_MMC_SDHCI_MV=y CONFIG_SF_DEFAULT_BUS=1 CONFIG_SPI_FLASH_STMICRO=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_MVNETA=y diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index 933bea6..3427848 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -10,6 +10,7 @@ CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_MONITOR_BASE=0x01120000 CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" @@ -26,6 +27,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -43,6 +45,8 @@ CONFIG_EFI_PARTITION=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index dcf8ab3..b09f3f0 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -8,6 +8,7 @@ CONFIG_VENDOR_COREBOOT=y CONFIG_TARGET_COREBOOT=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro" @@ -24,6 +25,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -38,6 +40,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index cbabdab..00ea238 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -20,6 +20,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_WDT=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index d448113..c0ae60f 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_TEXT_BASE=0x72000000 CONFIG_SYS_MALLOC_LEN=0x460000 CONFIG_SYS_MALLOC_F_LEN=0x800 CONFIG_TARGET_CORVUS=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -20,7 +22,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x70000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9M10G45,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -46,6 +48,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y CONFIG_DOS_PARTITION=y @@ -53,6 +56,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_DFU_NAND=y @@ -60,7 +64,6 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y @@ -71,6 +74,7 @@ CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_MACB=y +CONFIG_RMII=y CONFIG_ATMEL_USART=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig index 073807b..9226c78 100644 --- a/configs/cougarcanyon2_defconfig +++ b/configs/cougarcanyon2_defconfig @@ -28,6 +28,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -41,6 +42,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index f7dc932..590fee9 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -31,6 +31,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -45,6 +46,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index ff8f413..a5f0a21 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index a71b642..b75c9f2 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -33,6 +33,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index c0746be..98a23d2 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 344f1b0..adaa1fc 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index edfd0a4..7ec902e 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index d6f9353..18e3082 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_BLK=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 5e2122a..3f0546e 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="d2v2> " CONFIG_CMD_EEPROM=y @@ -45,6 +46,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 0c27677..13e7f93 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -23,7 +23,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 -CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -32,6 +31,7 @@ CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y @@ -61,7 +61,10 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 694e17c..b71cc42 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -24,6 +24,7 @@ CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " @@ -47,7 +48,10 @@ CONFIG_CMD_DIAG=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60100000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_DA8XX_GPIO=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index aeb9c35..e647e1a 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -21,7 +21,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_LTO=y CONFIG_SYS_LOAD_ADDR=0xc0700000 -CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -30,6 +29,7 @@ CONFIG_DEFAULT_FDT_FILE="da850-evm.dtb" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CLOCKS=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set @@ -58,7 +58,10 @@ CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index 2e8f4c0..3636745 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -43,6 +43,8 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index 9c54e7f..000e7f0 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -47,6 +47,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y # CONFIG_SPL_BLK is not set # CONFIG_BLOCK_CACHE is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 90fd8e8..e7fd1a2 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -46,6 +46,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_MVEBU=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index c42bda2..594555c 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -47,6 +47,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 3c0b045..b64ecc1 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -4,14 +4,14 @@ CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/Marvell/db-xc3-24g4xg/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x00800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x00800000 -CONFIG_SYS_MEMTEST_END=0x00ffffff CONFIG_TARGET_DB_XC3_24G4XG=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-db-xc3-24g4xg" CONFIG_BUILD_TARGET="u-boot.kwb" +CONFIG_SYS_MEMTEST_START=0x00800000 +CONFIG_SYS_MEMTEST_END=0x00ffffff CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,6 +39,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y # CONFIG_MMC is not set diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index 3f6d90e..adf4755 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -69,6 +69,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index af17900..df8d0d1 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -41,7 +41,10 @@ CONFIG_CMD_FAT=y CONFIG_CMD_JFFS2=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DMA_LPC32XX=y CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y @@ -67,6 +70,7 @@ CONFIG_PHYLIB=y CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR=31 CONFIG_PHY_SMSC=y +CONFIG_RMII=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_CONS_INDEX=5 CONFIG_SYS_NS16550=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 6f03714..e009f21 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -26,7 +26,9 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_LOCK_UNLOCK=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_BOOTP_DNS2=y +CONFIG_BOOTP_NISDOMAIN=y CONFIG_BOOTP_NTPSERVER=y CONFIG_CMD_JFFS2=y CONFIG_JFFS2_DEV="nand0" @@ -39,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig index 60077ed..0dfb7bb 100644 --- a/configs/dfi-bt700-q7x-151_defconfig +++ b/configs/dfi-bt700-q7x-151_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -49,6 +50,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index d62bd96..c45561a 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -27,6 +25,8 @@ CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -59,6 +59,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_DWC_AHSATA=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 1d6a24a..b8dec68 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="if test -n ${bootenv} && usb start; then if run loadbootenv; CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y @@ -40,6 +41,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index cbc2bf6..683c7a5 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -40,6 +40,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index fdc9826..1aee9d7 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -64,6 +64,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index db8716e..728515d 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -65,6 +65,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 169b570..9ebe454 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -61,6 +61,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 16d2c6c..096224f 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -28,6 +28,9 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=60 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -71,6 +74,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index a6a0c66..ce90b7f 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_ENV_IS_IN_MMC=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index 7a9771e..b780a32 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_MEMINFO=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIMER=y CONFIG_CMD_PMIC=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 72ab695..962a166 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -39,6 +39,7 @@ CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_ENV_ADDR=0x100000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 130a927..8152964 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -21,6 +21,7 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv ethact egiga0; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y @@ -38,6 +39,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_ENV_ADDR=0x3D0000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index d332467..41fa2cd 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -53,6 +53,8 @@ CONFIG_ISO_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/eb_cpu5282_defconfig b/configs/eb_cpu5282_defconfig index f695429..0effe0a 100644 --- a/configs/eb_cpu5282_defconfig +++ b/configs/eb_cpu5282_defconfig @@ -4,9 +4,13 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282" CONFIG_TARGET_EB_CPU5282=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 -CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xFF000400" +CONFIG_SYS_MONITOR_BASE=0xFF000400 CONFIG_BOOTDELAY=5 +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set @@ -18,9 +22,13 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0xFF040000 +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/eb_cpu5282_internal_defconfig b/configs/eb_cpu5282_internal_defconfig index 0c00ead..bb7854d 100644 --- a/configs/eb_cpu5282_internal_defconfig +++ b/configs/eb_cpu5282_internal_defconfig @@ -4,9 +4,13 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal" CONFIG_TARGET_EB_CPU5282=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x20000 -CONFIG_SYS_EXTRA_OPTIONS="SYS_MONITOR_BASE=0xF0000418" +CONFIG_SYS_MONITOR_BASE=0xF0000418 CONFIG_BOOTDELAY=5 +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="printenv" # CONFIG_DISPLAY_BOARDINFO is not set @@ -17,9 +21,13 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADB is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y +CONFIG_MII_INIT=y CONFIG_CMD_DATE=y CONFIG_ENV_ADDR=0xFF040000 +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_FSL=y CONFIG_SYS_FSL_I2C_OFFSET=0x300 diff --git a/configs/edison_defconfig b/configs/edison_defconfig index be19832..3af97d8 100644 --- a/configs/edison_defconfig +++ b/configs/edison_defconfig @@ -10,6 +10,7 @@ CONFIG_VENDOR_INTEL=y CONFIG_TARGET_EDISON=y CONFIG_SMP=y CONFIG_SYS_LOAD_ADDR=0x100000 +CONFIG_SYS_MONITOR_BASE=0x01101000 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 1108d7c..bbc7b41 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_MISC_INIT=y +CONFIG_RESET_PHY_R=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_HUSH_PARSER=y @@ -33,6 +34,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xFFF84000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SYS_IDE_MAXBUS=1 CONFIG_SYS_IDE_MAXDEVICE=1 CONFIG_SYS_ATA_BASE_ADDR=0xf1080000 diff --git a/configs/efi-x86_app32_defconfig b/configs/efi-x86_app32_defconfig index bb4c405..228643a 100644 --- a/configs/efi-x86_app32_defconfig +++ b/configs/efi-x86_app32_defconfig @@ -32,6 +32,8 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_REGEX is not set diff --git a/configs/efi-x86_app64_defconfig b/configs/efi-x86_app64_defconfig index 3a2e789..1ed2f13 100644 --- a/configs/efi-x86_app64_defconfig +++ b/configs/efi-x86_app64_defconfig @@ -32,6 +32,8 @@ CONFIG_EFI_PARTITION=y CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_REGMAP=y CONFIG_SYSCON=y # CONFIG_REGEX is not set diff --git a/configs/efi-x86_payload32_defconfig b/configs/efi-x86_payload32_defconfig index 04573fc..ceadd82 100644 --- a/configs/efi-x86_payload32_defconfig +++ b/configs/efi-x86_payload32_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -36,6 +37,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/efi-x86_payload64_defconfig b/configs/efi-x86_payload64_defconfig index df904c8..b5d1cf1 100644 --- a/configs/efi-x86_payload64_defconfig +++ b/configs/efi-x86_payload64_defconfig @@ -23,6 +23,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -36,6 +37,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 75a3d93..28fce77 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -22,6 +22,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="app.bin" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_MMC=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index 15a43e7..8bb4ce0 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -29,6 +29,9 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=60 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -72,6 +75,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 658fbfe..4a52228 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -14,7 +14,6 @@ CONFIG_ENV_SECT_SIZE=0x21000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ethernut5" CONFIG_SYS_LOAD_ADDR=0x020000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock0 mtdparts=atmel_nand:-(root) rw rootfstype=jffs2" @@ -35,6 +34,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_SAVES=y CONFIG_CMD_SPI=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_RARP=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set @@ -57,6 +57,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y @@ -74,6 +75,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_RTC_PCF8563=y diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index ea00185..53fe777 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_EVB_AST2500=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x20000 +CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb" CONFIG_PRE_CON_BUF_ADDR=0x1e720000 CONFIG_SYS_LOAD_ADDR=0x83000000 @@ -18,9 +19,11 @@ CONFIG_PRE_CONSOLE_BUFFER=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_ENV_OVERWRITE=y @@ -28,6 +31,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_REGMAP=y CONFIG_CLK=y +CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_ASPEED=y CONFIG_MMC_SDHCI=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 172b08e..f541c69 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x10000 +CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x83000000 @@ -39,9 +40,11 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_SPL_OF_CONTROL=y @@ -57,6 +60,7 @@ CONFIG_SPL_CLK=y CONFIG_DM_HASH=y CONFIG_HASH_ASPEED=y CONFIG_ASPEED_ACRY=y +CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_SPL_MISC=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 0a4c207..58c8bb9 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -40,6 +41,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 97ed6709..450ff86 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_TEXT_BASE=0x22900000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_GARDENA_SMART_GATEWAY_AT91SAM=y +CONFIG_ATMEL_LEGACY=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 199afb4..726d788 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -2,8 +2,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFE000000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x600 -CONFIG_SYS_MEMTEST_START=0x00001000 -CONFIG_SYS_MEMTEST_END=0x07e00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y @@ -111,6 +109,8 @@ CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_CLKDIV_2=y CONFIG_SYS_FPGA_FLAVOR_GAZERBEAM=y CONFIG_CMD_IOLOOP=y +CONFIG_SYS_MEMTEST_START=0x00001000 +CONFIG_SYS_MEMTEST_END=0x07e00000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -152,6 +152,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFE080000 CONFIG_ENV_ADDR_REDUND=0xFE090000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_DM=y CONFIG_REGMAP=y CONFIG_AXI=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 6c180b0..1abe768 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -69,6 +69,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 8d4cd24..a1bbe17 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -43,6 +43,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/gose_defconfig b/configs/gose_defconfig index a24a8ac..1200f72 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -74,6 +74,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index 678dbd3..d37b48d 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -44,6 +44,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_DM_ETH=y CONFIG_SH_ETHER=y CONFIG_PINCTRL=y diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig index 05e9d18..20be0e3 100644 --- a/configs/gurnard_defconfig +++ b/configs/gurnard_defconfig @@ -4,16 +4,18 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_TARGET_GURNARD=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-gurnard" CONFIG_SYS_LOAD_ADDR=0x23000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G45" CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -27,6 +29,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y @@ -36,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 +CONFIG_TFTP_PORT=y CONFIG_TFTP_TSIZE=y CONFIG_AT91_GPIO=y CONFIG_GENERIC_ATMEL_MCI=y @@ -45,6 +50,7 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ATMEL=y CONFIG_ATMEL_NAND_HWECC=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y @@ -53,4 +59,6 @@ CONFIG_USB_EHCI_HCD=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_LOGO is not set # CONFIG_VIDEO_BPP32 is not set +CONFIG_ATMEL_LCD=y +CONFIG_LCD=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index e304675..7116c77 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -18,6 +18,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set @@ -42,6 +43,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index 822b0e1..62965a4 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -42,6 +42,8 @@ CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_MVEBU=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 61a25c2..f8cf18e 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -17,6 +17,9 @@ CONFIG_OF_BOARD_SETUP=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds...\nPress <s> to stop or <d> to delay\n" CONFIG_AUTOBOOT_KEYED_CTRLC=y +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_RESET_TO_RETRY=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/hihope_rzg2_defconfig b/configs/hihope_rzg2_defconfig index 109c1d6..03534a0 100644 --- a/configs/hihope_rzg2_defconfig +++ b/configs/hihope_rzg2_defconfig @@ -62,6 +62,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 9f1ce4e..3bf235d 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -20,6 +20,7 @@ CONFIG_MISC_INIT_R=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index 792cc1a..d78261f 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -36,6 +36,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK_HSDK=y CONFIG_HSDK_CREG_GPIO=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index c72ad9f..cd9f697 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK_HSDK=y CONFIG_HSDK_CREG_GPIO=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index 9201a00..261e1bf 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_BCM6345_GPIO=y @@ -50,6 +51,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_PHY=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 2655124..40be266 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -41,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 336fae2..1849732 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -42,6 +42,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig index 246cc3d..e2785cb 100644 --- a/configs/ids8313_defconfig +++ b/configs/ids8313_defconfig @@ -127,6 +127,10 @@ CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter password - autoboot in %d seconds...\n" CONFIG_AUTOBOOT_DELAY_STR="ids" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=900 +CONFIG_BOOT_RETRY_MIN=30 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run boot_cramfs" CONFIG_USE_PREBOOT=y @@ -142,6 +146,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_SNTP=y @@ -154,6 +159,10 @@ CONFIG_CMD_UBI=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFFFC0000 CONFIG_ENV_ADDR_REDUND=0xFFFE0000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="ids8313/uImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="TSEC1" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_I2C=y diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index 4273b4b..418bd06 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -74,6 +74,8 @@ CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/imx28_xea_sb_defconfig b/configs/imx28_xea_sb_defconfig index 332ff3f..7c777a5 100644 --- a/configs/imx28_xea_sb_defconfig +++ b/configs/imx28_xea_sb_defconfig @@ -60,6 +60,8 @@ CONFIG_SPL_OF_PLATDATA=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig index 38f859b..0d7f893 100644 --- a/configs/imx6dl_icore_nand_defconfig +++ b/configs/imx6dl_icore_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y @@ -17,6 +15,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig index ae27857..f898279 100644 --- a/configs/imx6dl_mamoj_defconfig +++ b/configs/imx6dl_mamoj_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0x2300000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y @@ -14,6 +12,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_IMX_HAB=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_SPL_OS_BOOT=y diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig index f95823b..67c5640 100644 --- a/configs/imx6q_icore_nand_defconfig +++ b/configs/imx6q_icore_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y @@ -17,6 +15,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig index bd5853c..0a8ac8f 100644 --- a/configs/imx6q_logic_defconfig +++ b/configs/imx6q_logic_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x100000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6Q=y @@ -20,6 +18,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_PAYLOAD="u-boot.img" +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 @@ -69,6 +69,9 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_OF_TRANSLATE=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 27508a2..4f7cc6c 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y @@ -22,6 +20,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index cac5caf..96f4603 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y @@ -25,6 +23,8 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index f95823b..67c5640 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6QDL=y @@ -17,6 +15,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 0c86e16..7a0f932 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6QDL=y @@ -19,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index cd11c95..4b606f6 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y @@ -19,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 7ceb1ae..b3b13db 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6UL=y @@ -17,6 +15,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index e701d06..4fff94b 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_MX6UL=y @@ -19,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index d443812..726a387 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x400000 CONFIG_MX6UL=y @@ -17,6 +15,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/imx7_cm_defconfig b/configs/imx7_cm_defconfig index a1aa680..c22c4d5 100644 --- a/configs/imx7_cm_defconfig +++ b/configs/imx7_cm_defconfig @@ -52,6 +52,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_DFU_MMC=y diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 830ab69..064cc16 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -65,6 +65,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_COMPOSITE_CCF=y diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index b72f219..98c1d42 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -66,6 +66,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_COMPOSITE_CCF=y diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 14b34e6..8c2c22e 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -64,6 +64,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_CLK_COMPOSITE_CCF=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 01395fc..b865a31 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -50,6 +50,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_SPL_DM=y CONFIG_SPL_CLK_COMPOSITE_CCF=y CONFIG_CLK_COMPOSITE_CCF=y diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 02a65c5..da063a7 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x40000000 -CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xff0000 CONFIG_DM_GPIO=y @@ -19,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 +CONFIG_SYS_MEMTEST_START=0x40000000 +CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -62,6 +62,8 @@ CONFIG_OF_LIST="imx8mm-venice imx8mm-venice-gw71xx-0x imx8mm-venice-gw72xx-0x im CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index 5e92cb5..08c968c 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -7,8 +7,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x40000000 -CONFIG_SYS_MEMTEST_END=0x44000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y @@ -21,6 +19,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_SYS_MEMTEST_START=0x40000000 +CONFIG_SYS_MEMTEST_END=0x44000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -73,6 +73,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_REGMAP=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index a69977d..5c53604 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -7,8 +7,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x40000000 -CONFIG_SYS_MEMTEST_END=0x44000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y @@ -20,6 +18,8 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_SYS_MEMTEST_START=0x40000000 +CONFIG_SYS_MEMTEST_END=0x44000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -73,6 +73,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_REGMAP=y diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 34b31d7..56c7540 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -31,6 +31,8 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SEPARATE_BSS=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -46,6 +48,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_REGMAP=y diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index 3eaad82..04a1099 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x40000000 -CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xff0000 CONFIG_DM_GPIO=y @@ -19,6 +17,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_SYS_MEMTEST_START=0x40000000 +CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -62,6 +62,8 @@ CONFIG_OF_LIST="imx8mn-venice imx8mn-venice-gw7902" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 0ff549f..9a8bd02 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -58,6 +58,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_SPL_DM=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index b9480bb..a035cbd 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -21,8 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -78,6 +80,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_REGMAP=y diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index fe60b81..e9d4fbf 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -21,8 +21,10 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -78,6 +80,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_REGMAP=y diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index b272070..04edd54 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -47,6 +47,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 CONFIG_MXC_GPIO=y diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 323a0f3..7e928c2 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -54,6 +54,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index a30617d..4adf7e4 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -60,6 +60,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 0e2a646..dafb817 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -47,6 +47,8 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_IMX_RGPIO2P=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index c45156c..1082444 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -23,6 +23,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y @@ -45,6 +46,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 420aae6..c33ef94 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -20,7 +20,9 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index 3ff47e1..a3e6b8d 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -20,7 +20,9 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 2160887..af0d73b 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -20,7 +20,9 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index b384dc6..5284691 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -20,7 +20,9 @@ CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_RX_ETH_BUFFER=8 # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index ba6450b..d0bcac9 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" CONFIG_USE_BOOTCOMMAND=y @@ -23,6 +24,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 06bfdff..7884641 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" CONFIG_USE_BOOTCOMMAND=y @@ -23,6 +24,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index 3d15887..2ea7229 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" CONFIG_USE_BOOTCOMMAND=y @@ -23,6 +24,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index 8d49ef4..ef451a6 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -8,6 +8,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_LOAD_ADDR=0x7fc0 +CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" CONFIG_USE_BOOTCOMMAND=y @@ -23,6 +24,8 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_ARMFLASH=y # CONFIG_CMD_SETEXPR is not set CONFIG_ENV_ADDR=0x24F00000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_MMC is not set CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index 431491e..14a30e3 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -27,6 +27,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="app.bin" # CONFIG_NET is not set CONFIG_MMC=y CONFIG_MMC_DW=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 045b6c9..447967a 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -27,7 +27,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 # CONFIG_USE_SPL_FIT_GENERATOR is not set -CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" +CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index 6f154ed..b468a44 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -30,7 +30,7 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y # CONFIG_USE_SPL_FIT_GENERATOR is not set -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index f4dc095..7e2bbc4 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -135,6 +135,7 @@ CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 09f832e..996efd4 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -111,6 +111,7 @@ CONFIG_CFI_FLASH=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index eb8b945..05cc3d7 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -53,6 +53,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 45b6644..c8ea0be 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 81fbf1d..440a76f 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -54,6 +54,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index c91f5c2..4137733 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -40,6 +40,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_DFU_MMC=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index dfe0291..c66c36a 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -53,6 +53,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index e1b98a6..c405e1e 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index d800ea1..d7bdf8e 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -53,6 +53,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 1776217..493fdb1 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -41,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=32 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index f4b1abf..be84683 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -12,13 +12,14 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood 128M16" +CONFIG_KM_KIRKWOOD_128M16=y CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -33,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y @@ -47,6 +49,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index eba4f09..540a5e0 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -12,13 +12,14 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" +CONFIG_KM_KIRKWOOD=y CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -33,6 +34,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y @@ -47,6 +49,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 5d19c51..8c2b5f4 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -6,20 +6,21 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_KM_FPGA_CONFIG=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood PCI" +CONFIG_KM_FPGA_CONFIG=y +CONFIG_KM_KIRKWOOD_PCI=y CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -34,6 +35,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y @@ -48,6 +50,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index cf0748c..aebe78f 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -1,8 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xebf40000 CONFIG_SYS_MALLOC_F_LEN=0x1000 -CONFIG_KM_DEF_NETDEV="eth2" -CONFIG_KM_IVM_BUS=2 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="kmcent2" @@ -11,15 +9,18 @@ CONFIG_SYS_CLK_FREQ=66666666 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_IVM_BUS=2 CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_MONITOR_BASE=0xEBF40000 +CONFIG_EVENT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y -CONFIG_MISC_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_CMD_DM=y CONFIG_CMD_I2C=y @@ -27,6 +28,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_SPI=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_ETHSW=y CONFIG_CMD_CRAMFS=y @@ -43,10 +45,13 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xebf20000 CONFIG_ENV_ADDR_REDUND=0xebf00000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="fm1-mac5" CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_FSL_DDR3=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/kmcoge5ne_defconfig b/configs/kmcoge5ne_defconfig index 53f7abc..4ca2fdc 100644 --- a/configs/kmcoge5ne_defconfig +++ b/configs/kmcoge5ne_defconfig @@ -1,6 +1,5 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 -CONFIG_KM_DEF_NETDEV="eth1" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="kmcoge5ne" @@ -157,6 +156,7 @@ CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y CONFIG_83XX_PCICLK=0x3ef1480 +CONFIG_KM_DEF_NETDEV="eth1" CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -178,6 +178,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y # CONFIG_CMD_PINMUX is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -190,6 +191,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 9124504..9d6cf1c 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -6,9 +6,6 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_256M8_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -CONFIG_KM_ENV_IS_IN_SPI_NOR=y -CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -16,13 +13,16 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids COGE5UN" +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_KM_ENV_IS_IN_SPI_NOR=y +CONFIG_KM_PIGGY4_88E6352=y CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -37,6 +37,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y @@ -51,6 +52,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/kmeter1_defconfig b/configs/kmeter1_defconfig index 228bbe6..9675658 100644 --- a/configs/kmeter1_defconfig +++ b/configs/kmeter1_defconfig @@ -1,7 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 CONFIG_SYS_MALLOC_F_LEN=0x800 -CONFIG_KM_DEF_NETDEV="eth2" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="kmeter1" @@ -127,6 +126,7 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_DBYP_PLL_BYPASSED=y CONFIG_LCRR_EADC_2=y CONFIG_LCRR_CLKDIV_4=y +CONFIG_KM_DEF_NETDEV="eth2" CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -147,6 +147,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y # CONFIG_CMD_PINMUX is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -159,6 +160,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index d81c787..6380351 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -6,9 +6,6 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_KM_FPGA_CONFIG=y -CONFIG_KM_ENV_IS_IN_SPI_NOR=y -CONFIG_KM_PIGGY4_88E6352=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -16,13 +13,17 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" +CONFIG_KM_FPGA_CONFIG=y +CONFIG_KM_ENV_IS_IN_SPI_NOR=y +CONFIG_KM_PIGGY4_88E6352=y +CONFIG_KM_NUSA=y CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -37,6 +38,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y @@ -51,6 +53,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/kmopti2_defconfig b/configs/kmopti2_defconfig index d230638..254c9fe 100644 --- a/configs/kmopti2_defconfig +++ b/configs/kmopti2_defconfig @@ -159,6 +159,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y # CONFIG_CMD_PINMUX is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -171,6 +172,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/kmsupx5_defconfig b/configs/kmsupx5_defconfig index b0b5926..c041ac0 100644 --- a/configs/kmsupx5_defconfig +++ b/configs/kmsupx5_defconfig @@ -138,6 +138,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -150,6 +151,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig index d274c95..579bf0d 100644 --- a/configs/kmsuse2_defconfig +++ b/configs/kmsuse2_defconfig @@ -6,10 +6,6 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg" CONFIG_SYS_TEXT_BASE=0x07d00000 CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_KM_FPGA_CONFIG=y -CONFIG_KM_FPGA_FORCE_CONFIG=y -CONFIG_KM_FPGA_NO_RESET=y -CONFIG_KM_ENV_IS_IN_SPI_NOR=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,13 +13,18 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_ENV_OFFSET_REDUND=0xD0000 CONFIG_IDENT_STRING="\nHitachi Power Grids Kirkwood" +CONFIG_KM_FPGA_CONFIG=y +CONFIG_KM_FPGA_FORCE_CONFIG=y +CONFIG_KM_FPGA_NO_RESET=y +CONFIG_KM_ENV_IS_IN_SPI_NOR=y +CONFIG_KM_SUSE2=y CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_SYS_EXTRA_OPTIONS="KM_SUSE2" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -38,6 +39,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 # CONFIG_CMD_FLASH is not set CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_MTDPARTS=y @@ -52,6 +54,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_RAM=y CONFIG_KIRKWOOD_GPIO=y diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig index 53aaf6c..c9cad08 100644 --- a/configs/kmtegr1_defconfig +++ b/configs/kmtegr1_defconfig @@ -1,6 +1,5 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xF0000000 -CONFIG_KM_DEF_NETDEV="eth1" CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="kmtegr1" @@ -119,10 +118,10 @@ CONFIG_ACR_PARKM_USB_I2C1_BOOT=y CONFIG_LCRR_EADC_1=y CONFIG_LCRR_CLKDIV_2=y CONFIG_83XX_PCICLK=0x3ef1480 +CONFIG_KM_DEF_NETDEV="eth1" CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="KMTEGR1" CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" CONFIG_AUTOBOOT_STOP_STR=" " @@ -139,6 +138,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -152,6 +152,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF0100000 CONFIG_ENV_ADDR_REDUND=0xF0120000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/kmtepr2_defconfig b/configs/kmtepr2_defconfig index b333769..48c1a72 100644 --- a/configs/kmtepr2_defconfig +++ b/configs/kmtepr2_defconfig @@ -158,6 +158,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -170,6 +171,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 9f9e468..145e7bb 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -74,6 +74,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 6d67475..c4f8fdb 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xF0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -18,6 +16,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6ul-kontron-n631x-s" CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y @@ -55,6 +55,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_BUS=2 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_BOOTCOUNT_LIMIT=y CONFIG_BOOTCOUNT_ENV=y CONFIG_DM_I2C=y diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 7643021..eaf8389 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -20,14 +20,18 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y CONFIG_MISC_INIT_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y CONFIG_SPL_WATCHDOG=y @@ -56,6 +60,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 CONFIG_DFU_MMC=y CONFIG_MXC_GPIO=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index cf8aedf..2ee1a17 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -59,6 +59,7 @@ CONFIG_OF_LIST="fsl-ls1028a-kontron-sl28 fsl-ls1028a-kontron-sl28-var1 fsl-ls102 CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig index d2e09ac..3ec3347 100644 --- a/configs/kp_imx53_defconfig +++ b/configs/kp_imx53_defconfig @@ -39,6 +39,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_I2C_DEFAULT_BUS_NUMBER=0x1 CONFIG_SYS_I2C_MXC=y diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig index e5504f2..9c9aac3 100644 --- a/configs/kp_imx6q_tpc_defconfig +++ b/configs/kp_imx6q_tpc_defconfig @@ -47,6 +47,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y # CONFIG_BLOCK_CACHE is not set CONFIG_SPL_CLK_IMX6Q=y diff --git a/configs/kzm9g_defconfig b/configs/kzm9g_defconfig index 867673f..e790072 100644 --- a/configs/kzm9g_defconfig +++ b/configs/kzm9g_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_IMLS=y CONFIG_CMD_I2C=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_NFS_TIMEOUT=10000 CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_FLASH=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 4cff6e8..5185169 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -76,6 +76,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 87890cd..3930903 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -19,6 +19,7 @@ CONFIG_BOOTCOMMAND="if mmc rescan; then if run loadbootscr; then run bootscript; # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y +CONFIG_CLOCKS=y CONFIG_HUSH_PARSER=y # CONFIG_BOOTM_NETBSD is not set # CONFIG_BOOTM_PLAN9 is not set @@ -36,6 +37,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_DIAG=y CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig index 041495f..bf700df 100644 --- a/configs/liteboard_defconfig +++ b/configs/liteboard_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6UL=y @@ -18,6 +16,8 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTCOMMAND=y @@ -43,6 +43,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_DM_I2C=y diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index 19387ad..ff5cfac 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -13,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-2g5rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig index 00e8b10..c2807c1 100644 --- a/configs/ls1012a2g5rdb_tfa_defconfig +++ b/configs/ls1012a2g5rdb_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -15,6 +13,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index 0b3964e..9d1d266 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1012AFRDM=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -12,6 +10,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig index 9351408..c0c9b73 100644 --- a/configs/ls1012afrdm_tfa_defconfig +++ b/configs/ls1012afrdm_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -14,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frdm" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index f25c22e..fe0c894 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -3,14 +3,14 @@ CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 343e38df..3ada93a 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1012AFRWY=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -12,6 +10,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig index 16bb10e..b790d52 100644 --- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -13,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig index 4ced1bf..39f7f4f 100644 --- a/configs/ls1012afrwy_tfa_defconfig +++ b/configs/ls1012afrwy_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -14,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index 91bfab0..e10eb7e 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1012AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -13,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig index 14eeade..69b0e21 100644 --- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -13,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-qds" CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig index 3531fa7..6c6c664 100644 --- a/configs/ls1012aqds_tfa_defconfig +++ b/configs/ls1012aqds_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -15,6 +13,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 2276689..25a9142 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -12,6 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 2337090..982d6b6e 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1012ARDB=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -13,6 +11,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig index bdd8c9a..5b974e0 100644 --- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -14,6 +12,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig index 94408c3..d974125 100644 --- a/configs/ls1012ardb_tfa_defconfig +++ b/configs/ls1012ardb_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -15,6 +13,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig index 911b4db..b6e418c 100644 --- a/configs/ls1021aiot_qspi_defconfig +++ b/configs/ls1021aiot_qspi_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" +# CONFIG_DEEP_SLEEP is not set CONFIG_AHCI=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_OF_BOARD_SETUP=y @@ -36,6 +37,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC2" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index f72f2b1..74043f6 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -13,6 +13,7 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SPL_TEXT_BASE=0x10000000 +# CONFIG_DEEP_SLEEP is not set CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y @@ -53,6 +54,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC2" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig index 925d68d..6d572c8 100644 --- a/configs/ls1021aqds_ddr4_nor_defconfig +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -15,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -49,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -65,6 +67,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig index c71c864..a3598bb 100644 --- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig +++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -15,12 +13,13 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y @@ -50,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -66,6 +67,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 @@ -85,6 +87,7 @@ CONFIG_SYS_QE_FW_ADDR=0x60940000 CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_LPUART=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index 58629be..33d37db29 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -7,8 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x140000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -22,12 +20,13 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021aqds/ls102xa_pbi.cfg" @@ -70,6 +69,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -87,6 +88,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index d252ed4..8092b47 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y @@ -15,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -48,6 +48,8 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -64,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index fb9f457..cccef5b 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -15,6 +13,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -49,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -66,6 +68,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 1d6d88f..ae329f2 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -15,12 +13,13 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-lpuart" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y @@ -50,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -67,6 +68,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 @@ -86,6 +88,7 @@ CONFIG_SYS_QE_FW_ADDR=0x60940000 CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_LPUART=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index f629080..4854f49 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -16,6 +14,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -48,6 +48,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 38b1704..2987f6e 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -7,8 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -23,6 +21,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -67,6 +67,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -84,6 +86,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index eb97c18..d1afce2 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -7,8 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -23,6 +21,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -65,6 +65,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 7bc1963..adb4a03 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -22,7 +22,6 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SPL_FSL_PBL" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atsn/ls102xa_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atsn/ls102xa_rcw_sd.cfg" @@ -32,6 +31,7 @@ CONFIG_BOOTDELAY=3 CONFIG_SILENT_CONSOLE=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_SPL_FSL_PBL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8 CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig index 2f66d83..ee41e53 100644 --- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y @@ -14,6 +12,8 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_LOAD_ADDR=0x82000000 @@ -42,6 +42,8 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -54,6 +56,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig index c1adc6e..05ccc59 100644 --- a/configs/ls1021atwr_nor_defconfig +++ b/configs/ls1021atwr_nor_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -14,6 +12,8 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -43,6 +43,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -56,6 +58,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig index 150179d..353dadb 100644 --- a/configs/ls1021atwr_nor_lpuart_defconfig +++ b/configs/ls1021atwr_nor_lpuart_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -14,13 +12,14 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-lpuart" CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" @@ -44,6 +43,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -57,6 +58,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y @@ -73,6 +75,7 @@ CONFIG_SYS_QE_FW_ADDR=0x60940000 CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_LPUART=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 016771a..d65a2c5 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1021ATWR=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -15,6 +13,8 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index a8288e9..1600702 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -7,8 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y @@ -21,6 +19,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -60,6 +60,8 @@ CONFIG_CMD_USB=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set @@ -74,6 +76,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 695505a..81f8e1f 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -7,8 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -21,6 +19,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -61,6 +61,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y @@ -74,6 +76,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_PHY_ATHEROS=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 19e7751..b95dc97 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -7,8 +7,6 @@ CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -21,6 +19,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -61,6 +61,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d10000" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig index af65bca..d2dc9b7 100644 --- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig @@ -6,8 +6,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -16,6 +14,8 @@ CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -43,6 +43,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig index bc473ae..4f0a7ae 100644 --- a/configs/ls1028aqds_tfa_defconfig +++ b/configs/ls1028aqds_tfa_defconfig @@ -6,8 +6,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 @@ -17,6 +15,8 @@ CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -48,6 +48,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig index 417c848..73caf98 100644 --- a/configs/ls1028aqds_tfa_lpuart_defconfig +++ b/configs/ls1028aqds_tfa_lpuart_defconfig @@ -5,8 +5,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 @@ -16,13 +14,14 @@ CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M" @@ -48,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y @@ -89,6 +89,7 @@ CONFIG_DM_SCSI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_LPUART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig index 8b5bb13..13890c5 100644 --- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig @@ -6,8 +6,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -16,6 +14,8 @@ CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -42,6 +42,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig index 2018d15..7618eea 100644 --- a/configs/ls1028ardb_tfa_defconfig +++ b/configs/ls1028ardb_tfa_defconfig @@ -6,8 +6,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 @@ -17,6 +15,8 @@ CONFIG_FSPI_AHB_EN_4BYTE=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -47,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_DM=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index ef1a591..4ea3712 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,6 +18,8 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 8dd6ce4..02cf652 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,12 +18,13 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -66,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y @@ -91,6 +91,7 @@ CONFIG_SYS_QE_FMAN_FW_IN_NOR=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_LPUART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_USB=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 3e54803..3cb92b0 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -26,12 +24,13 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043aqds/ls1043aqds_pbi.cfg" @@ -85,6 +84,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index 97fe2ce..ab4ec5f 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,6 +18,8 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -66,6 +66,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index dd0a726..1e4b25d 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -21,6 +19,8 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index be40f49..0c4d2cd 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -27,6 +25,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -84,6 +84,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 5820444..217a558 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -27,6 +25,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig index e196c44..7e59260 100644 --- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y @@ -22,6 +20,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig index 6a89794..b033a36 100644 --- a/configs/ls1043aqds_tfa_defconfig +++ b/configs/ls1043aqds_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 @@ -23,6 +21,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index e7c277d..6839a02 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -35,6 +35,8 @@ CONFIG_CMD_CACHE=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y @@ -47,6 +49,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 94daa1f..3fa35c5 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -37,6 +37,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x60300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set @@ -50,6 +52,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index a86138f..10293f4 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -19,7 +19,6 @@ CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg" @@ -51,6 +50,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SPL_DM=y CONFIG_MPC8XXX_GPIO=y @@ -61,6 +62,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index 19a54d1..d8eb271 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -23,7 +23,6 @@ CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="NAND_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1043ardb/ls1043ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1043ardb/ls1043ardb_rcw_nand.cfg" @@ -58,6 +57,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_MPC8XXX_GPIO=y @@ -69,6 +70,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_NAND_FSL_IFC=y diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 61e3482..4b0b5f9 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -51,6 +51,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set @@ -63,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index ef82842..6c415ac 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -57,6 +57,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_FSL_CAAM=y CONFIG_MPC8XXX_GPIO=y @@ -68,6 +70,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 6ff5614..41a285e 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -36,6 +36,8 @@ CONFIG_CMD_CACHE=y CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)" CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y @@ -48,6 +50,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 551807e..ecb5dfb 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -41,6 +41,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_ADDR=0x60500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set @@ -54,6 +56,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig index ba381bb..93d323d 100644 --- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig @@ -33,6 +33,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi:1m(rcw),15m(u-boot),48m(kernel.itb CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig index 30daa5c..f09d999 100644 --- a/configs/ls1046afrwy_tfa_defconfig +++ b/configs/ls1046afrwy_tfa_defconfig @@ -38,6 +38,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index c15302c..15c3b93 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,6 +18,8 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -62,6 +62,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index bc32611..5cff12b 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,6 +18,8 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index 52855d1..5001d8f 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,12 +18,13 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="LPUART" CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y @@ -66,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 @@ -92,6 +92,7 @@ CONFIG_SYS_QE_FMAN_FW_IN_NOR=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_FSL_LPUART=y +CONFIG_LPUART=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_FSL_DSPI=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index ab780c1..4d75d6c 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -26,6 +24,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -84,6 +84,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 8111ce6..a231d46 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -3,8 +3,6 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -21,6 +19,8 @@ CONFIG_VOL_MONITOR_INA220=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index b5b501c..ffc3517 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -27,6 +25,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -85,6 +85,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 0145193..88f72a7 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -27,6 +25,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig index 740838b..2d5132d 100644 --- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_SYS_I2C_MXC_I2C1=y @@ -22,6 +20,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -65,6 +65,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig index 11de0d4..5f33664 100644 --- a/configs/ls1046aqds_tfa_defconfig +++ b/configs/ls1046aqds_tfa_defconfig @@ -4,8 +4,6 @@ CONFIG_TFABOOT=y CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x20000 @@ -23,6 +21,8 @@ CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -74,6 +74,7 @@ CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS=2 diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index a319bf3..d6b6722 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -25,7 +25,6 @@ CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_pbi.cfg" CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1046ardb/ls1046ardb_rcw_emmc.cfg" @@ -59,6 +58,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 9276965..a4fa4ea 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -42,6 +42,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.i CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 506b32c..d4ed56a 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -45,6 +45,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40300000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 87ab8ac..49e5fb2 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -64,6 +64,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_ENV_IS_NOWHERE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index a8d0231..c6eb31e 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -55,6 +55,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.i CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index 033ccc2..d4c4a6a 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -58,6 +58,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig index f841053..4d23458 100644 --- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig @@ -38,6 +38,8 @@ CONFIG_CMD_CACHE=y CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)" CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig index 2a3f6cb..3712c5e 100644 --- a/configs/ls1046ardb_tfa_defconfig +++ b/configs/ls1046ardb_tfa_defconfig @@ -43,6 +43,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x40500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y CONFIG_SATA=y CONFIG_SATA_CEVA=y diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index 094f113..a89e250 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x30100000 CONFIG_SYS_MALLOC_LEN=0x0220000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y @@ -18,6 +16,8 @@ CONFIG_VOL_MONITOR_LTC3882_READ=y CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -31,6 +31,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="fsl_mc lazyapply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 @@ -50,6 +51,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x80300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 9b51ee9..1a81e5f 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -19,6 +17,8 @@ CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -32,6 +32,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc lazyapply dpl 0x80001000 && sf read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -46,6 +47,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 4187ff7..b1ae35a 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,6 +18,8 @@ CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="sf probe 0:0;sf read 0x80001000 0xd00000 0x100000; fsl_mc lazyapply dpl 0x80001000 && sf read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -49,6 +50,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index c594d78..aa05886 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y @@ -25,6 +23,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -37,6 +37,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply dpl 0x80001000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_RESET_PHY_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y @@ -61,6 +62,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 1e83ab4..5052d85 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y @@ -25,6 +23,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 CONFIG_BOOTCOMMAND="mmcinfo;mmc read 0x80001000 0x6800 0x800; fsl_mc lazyapply dpl 0x80001000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_RESET_PHY_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y @@ -59,6 +60,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig index 56b6da6..ac37c1a 100644 --- a/configs/ls1088aqds_tfa_defconfig +++ b/configs/ls1088aqds_tfa_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x0220000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -23,6 +21,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -35,6 +35,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -58,6 +59,8 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index f84a63b..3357af1 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1088ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -19,6 +17,8 @@ CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -48,6 +49,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 976d65b..13be902 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -4,8 +4,6 @@ CONFIG_TARGET_LS1088ARDB=y CONFIG_SYS_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,6 +18,8 @@ CONFIG_VOL_MONITOR_LTC3882_SET=y CONFIG_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -34,6 +34,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -51,6 +52,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 96a96f5..b040555 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -24,6 +22,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -38,6 +38,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y @@ -59,6 +60,8 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SPL_DM=y diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index a0c5d97..6e82875 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y @@ -25,6 +23,8 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y @@ -39,6 +39,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y @@ -61,6 +62,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig index 6f983fd..da7f89c 100644 --- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_NXP_ESBC=y CONFIG_DM_GPIO=y @@ -22,6 +20,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -34,6 +34,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -48,6 +49,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig index 4ba4507..30ed0bd 100644 --- a/configs/ls1088ardb_tfa_defconfig +++ b/configs/ls1088ardb_tfa_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x6000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x500000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -23,6 +21,8 @@ CONFIG_QSPI_AHB_INIT=y CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_MP=y @@ -35,6 +35,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21 # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_MEMINFO=y @@ -54,6 +55,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index ace5820..de86050 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -38,6 +39,8 @@ CONFIG_CMD_DATE=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index d21a136..51efbd3 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -40,6 +41,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x80300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 82cd933..2b42df0 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -27,6 +27,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" +CONFIG_RESET_PHY_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y @@ -51,6 +52,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 0ac2b83..ec07a49 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -22,6 +22,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="fsl_mc apply dpl 0x580d00000 && cp.b $kernel_start $kernel_load $kernel_size && bootm $kernel_load" +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -41,6 +42,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 42e0cb2..bde84eb 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -28,6 +28,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="mmc read 0x80200000 0x6800 0x800; fsl_mc apply dpl 0x80200000 && mmc read $kernel_load $kernel_start $kernel_size && bootm $kernel_load" +CONFIG_RESET_PHY_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 CONFIG_SPL_ENV_SUPPORT=y @@ -48,6 +49,8 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 81cd8b4..67e03b1 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -42,6 +43,8 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_DATE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index a7491cc..102d8b3 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -26,6 +26,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -44,6 +45,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0x80300000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index bc297e5..5df11e3 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="env exists mcinitcmd && env exists secureboot && esbc_validate 0x5806C0000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x580d00000;run distro_bootcmd;run nor_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y @@ -54,6 +55,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index a2a1419..7ba1836 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -29,6 +29,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_GPT=y @@ -42,6 +43,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig index c8d7e67..016e9c7 100644 --- a/configs/ls2088aqds_tfa_defconfig +++ b/configs/ls2088aqds_tfa_defconfig @@ -24,6 +24,7 @@ CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -49,6 +50,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x580500000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index 193990c..5b61301 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -27,6 +27,7 @@ CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y @@ -40,6 +41,8 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index ee85109..654bdad 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -30,6 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_BOOTCOMMAND="sf probe 0:0; sf read 0x806c0000 0x6c0000 0x40000; env exists mcinitcmd && env exists secureboot && esbc_validate 0x806C0000; sf read 0x80d00000 0xd00000 0x100000; env exists mcinitcmd && fsl_mc lazyapply dpl 0x80d00000; run distro_bootcmd;run qspi_bootcmd; env exists secureboot && esbc_halt;" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 CONFIG_CMD_DM=y @@ -46,6 +47,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20300000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig index de37147..3b693fa 100644 --- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -45,6 +46,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig index f4902a1..c0f92c6 100644 --- a/configs/ls2088ardb_tfa_defconfig +++ b/configs/ls2088ardb_tfa_defconfig @@ -30,6 +30,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0600 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_IMLS=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y @@ -51,6 +52,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x580500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index df214b3..080e583 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -15,7 +15,6 @@ CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_API=y -CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -37,6 +36,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 6ccc0e7..0de6fc5 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_KWD_CONFIG="board/buffalo/lsxl/kwbimage-lsxhl.cfg" CONFIG_SYS_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_LSXL=y +CONFIG_LSXHL=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x70000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -15,7 +16,6 @@ CONFIG_IDENT_STRING=" LS-XHL" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_API=y -CONFIG_SYS_EXTRA_OPTIONS="LSXHL" CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -37,6 +37,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig index 17e04c4..ed56bfd 100644 --- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -48,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_OF_LIST="fsl-lx2160a-qds-3-x-x fsl-lx2160a-qds-7-x-x fsl-lx2160a-qds-19-x-x fsl-lx2160a-qds-20-x-x fsl-lx2160a-qds-3-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-19-11-x fsl-lx2160a-qds-20-11-x" CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig index f12ad8f..7583bff 100644 --- a/configs/lx2160aqds_tfa_defconfig +++ b/configs/lx2160aqds_tfa_defconfig @@ -34,6 +34,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -54,6 +55,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig index 52bd909..cfefd3d 100644 --- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig @@ -32,6 +32,7 @@ CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -46,6 +47,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig index 3760fef..933312c 100644 --- a/configs/lx2160ardb_tfa_defconfig +++ b/configs/lx2160ardb_tfa_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -53,6 +54,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig index db5fda3..c62c873 100644 --- a/configs/lx2160ardb_tfa_stmm_defconfig +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y @@ -53,6 +54,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC1@xgmii" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig index 3158147..66ffb08 100644 --- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig +++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig @@ -33,6 +33,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -50,6 +51,8 @@ CONFIG_OF_CONTROL=y CONFIG_OF_LIST="fsl-lx2162a-qds-17-x fsl-lx2162a-qds-18-x fsl-lx2162a-qds-20-x" CONFIG_MULTI_DTB_FIT=y CONFIG_ENV_OVERWRITE=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig index 183769a..36780d9 100644 --- a/configs/lx2162aqds_tfa_defconfig +++ b/configs/lx2162aqds_tfa_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -56,6 +57,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig index 5d14e31..cd82cd3 100644 --- a/configs/lx2162aqds_tfa_verified_boot_defconfig +++ b/configs/lx2162aqds_tfa_verified_boot_defconfig @@ -36,6 +36,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_MISC_INIT_R=y CONFIG_ID_EEPROM=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 @@ -57,6 +58,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_ADDR=0x20500000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="DPMAC17@rgmii-id" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SATA=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index c713a44..df4907a 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -67,6 +67,10 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="boot/fitImage" +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC0" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 4b729cf..f3e8366 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -31,6 +31,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index a69c035..b9e133e 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -35,6 +35,8 @@ CONFIG_CMD_TIME=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig index cf3439a..930c998 100644 --- a/configs/meerkat96_defconfig +++ b/configs/meerkat96_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y @@ -14,6 +12,8 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_HUSH_PARSER=y # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig index 5d9f783..f1810cf 100644 --- a/configs/meesc_dataflash_defconfig +++ b/configs/meesc_dataflash_defconfig @@ -14,7 +14,6 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_SYS_LOAD_ADDR=0x20100000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y @@ -25,11 +24,13 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y @@ -40,6 +41,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig index cc7697b..40b0f13 100644 --- a/configs/meesc_defconfig +++ b/configs/meesc_defconfig @@ -12,7 +12,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_SYS_LOAD_ADDR=0x20100000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_NANDFLASH" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_F=y @@ -24,23 +24,25 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 5409ca7..98c4287 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_ASKENV=y CONFIG_CMD_GPIO=y CONFIG_CMD_SAVES=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y @@ -43,6 +44,7 @@ CONFIG_OF_EMBED=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM=y CONFIG_XILINX_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index c4d37db..c051e00 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -54,6 +55,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig index efd0668..1d51177 100644 --- a/configs/mscc_jr2_defconfig +++ b/configs/mscc_jr2_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_LEN=0x1f0000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fc00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -17,6 +15,8 @@ CONFIG_ARCH_MSCC=y CONFIG_SOC_JR2=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fc00000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig index e9c6862..0033e57 100644 --- a/configs/mscc_luton_defconfig +++ b/configs/mscc_luton_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_LEN=0x1f0000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -19,6 +17,8 @@ CONFIG_DDRTYPE_MT47H128M8HQ=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig index bf3a472..c6eb911 100644 --- a/configs/mscc_ocelot_defconfig +++ b/configs/mscc_ocelot_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_LEN=0x1f0000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fc00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -16,6 +14,8 @@ CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SYS_LITTLE_ENDIAN=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fc00000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig index ea02325..6356fdf 100644 --- a/configs/mscc_serval_defconfig +++ b/configs/mscc_serval_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_LEN=0x1f0000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -14,6 +12,8 @@ CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVAL=y CONFIG_DDRTYPE_H5TQ1G63BFA=y CONFIG_SYS_LITTLE_ENDIAN=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig index 8c87a31..bee1b27 100644 --- a/configs/mscc_servalt_defconfig +++ b/configs/mscc_servalt_defconfig @@ -2,8 +2,6 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x40000000 CONFIG_SYS_MALLOC_LEN=0x1f0000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fc00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -13,6 +11,8 @@ CONFIG_ENV_OFFSET_REDUND=0x140000 CONFIG_ARCH_MSCC=y CONFIG_SOC_SERVALT=y CONFIG_SYS_LITTLE_ENDIAN=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fc00000 CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index f1215fa..ceb53c7 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -41,6 +41,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index b600217..b443418 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -40,6 +40,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y CONFIG_CLK=y CONFIG_CLK_MVEBU=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 622d687..7548597 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -38,6 +38,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index 1789838..f9efe48 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -42,6 +42,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_AHCI_MVEBU=y CONFIG_DM_GPIO_LOOKUP_LABEL=y CONFIG_DM_I2C=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 4b8206a..9dadfc9 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -48,6 +48,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_PCI=y CONFIG_AHCI_MVEBU=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index f45ce91..0bc3d7b 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -41,6 +41,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y CONFIG_DM_I2C=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index af01e61..9b7902b 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -44,6 +44,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y CONFIG_DM_PCA953X=y diff --git a/configs/mx23_olinuxino_defconfig b/configs/mx23_olinuxino_defconfig index fc1606a..062d922 100644 --- a/configs/mx23_olinuxino_defconfig +++ b/configs/mx23_olinuxino_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_MXS_GPIO=y diff --git a/configs/mx23evk_defconfig b/configs/mx23evk_defconfig index f51398c..d48ac4c 100644 --- a/configs/mx23evk_defconfig +++ b/configs/mx23evk_defconfig @@ -36,6 +36,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index 22310f5..af9ff19 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -13,7 +13,6 @@ CONFIG_TARGET_MX28EVK=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x42000000 -CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE" CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -43,6 +42,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index b7502aa..4bd9982 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y # CONFIG_NET is not set CONFIG_DM=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 090e5fa..7ffdb81 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -44,6 +44,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 6cb21b9..1bac585 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -40,6 +40,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=gpmi-nand:3m(bootloader)ro,512k(environment),5 CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_MXS_GPIO=y CONFIG_MMC_MXS=y diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig index 7ee220a..6cf3c59 100644 --- a/configs/mx51evk_defconfig +++ b/configs/mx51evk_defconfig @@ -33,6 +33,9 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC0" +CONFIG_ARP_TIMEOUT=200 CONFIG_DM=y CONFIG_FSL_ESDHC_IMX=y CONFIG_MTD=y diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig index ef6bd0f..4798510 100644 --- a/configs/mx53cx9020_defconfig +++ b/configs/mx53cx9020_defconfig @@ -20,6 +20,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 CONFIG_FPGA_ALTERA=y CONFIG_FPGA_CYCLON2=y CONFIG_FSL_ESDHC_IMX=y diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig index 2fb44bc..e7a4797 100644 --- a/configs/mx53loco_defconfig +++ b/configs/mx53loco_defconfig @@ -37,6 +37,9 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC0" +CONFIG_ARP_TIMEOUT=200 CONFIG_DM=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig index 71db59f..e4eddef 100644 --- a/configs/mx53ppd_defconfig +++ b/configs/mx53ppd_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig index 2fed742..b218517 100644 --- a/configs/mx6memcal_defconfig +++ b/configs/mx6memcal_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_MX6QDL=y CONFIG_MX6_DDRCAL=y @@ -14,6 +12,8 @@ CONFIG_TARGET_MX6MEMCAL=y CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_SERIAL=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x20000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SPL_USB_HOST=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 2b77a46..472758a 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_IMX_CONFIG="board/boundary/nitrogen6x/nitrogen6q.cfg" @@ -19,6 +17,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabrelite" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -46,6 +46,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -62,6 +64,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 1bf86d0..6351179 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -70,6 +70,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_DFU_MMC=y CONFIG_DFU_SF=y diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 233a165..e0a5350 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -76,6 +76,7 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_ADDR=0x12000000 diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig index 48162fc..809fcce 100644 --- a/configs/mx6sllevk_defconfig +++ b/configs/mx6sllevk_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6SLL=y @@ -12,6 +10,8 @@ CONFIG_TARGET_MX6SLLEVK=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig index 7096943..1b55ad3 100644 --- a/configs/mx6sllevk_plugin_defconfig +++ b/configs/mx6sllevk_plugin_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6SLL=y @@ -13,6 +11,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6sll-evk" CONFIG_USE_IMXIMG_PLUGIN=y # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index 6d3895f..30194a8 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -36,6 +36,8 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_BOUNCE_BUFFER=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y @@ -50,6 +52,7 @@ CONFIG_SF_DEFAULT_SPEED=40000000 CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 03670c7..b5b0b37 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -40,6 +40,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_BOUNCE_BUFFER=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -52,6 +54,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PCI=y diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig index 70a40ac..1e1e799 100644 --- a/configs/mx6ul_14x14_evk_defconfig +++ b/configs/mx6ul_14x14_evk_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y @@ -21,6 +19,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" @@ -57,6 +57,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_BOUNCE_BUFFER=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_DM_74X164=y diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig index a121e96..4b90fca 100644 --- a/configs/mx6ul_9x9_evk_defconfig +++ b/configs/mx6ul_9x9_evk_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6UL=y @@ -21,6 +19,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" @@ -52,6 +52,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_BOUNCE_BUFFER=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index a053d2f..ec526b6 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -3,14 +3,14 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6ULL=y CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" @@ -35,6 +35,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_BOUNCE_BUFFER=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index 07e5e23..ec2a537 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6ULL=y @@ -12,6 +10,8 @@ CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-14x14-evk" CONFIG_USE_IMXIMG_PLUGIN=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" @@ -36,6 +36,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth1" CONFIG_BOUNCE_BUFFER=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig index 2f9c7a2..0a7002d 100644 --- a/configs/mx6ulz_14x14_evk_defconfig +++ b/configs/mx6ulz_14x14_evk_defconfig @@ -3,14 +3,14 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6ULL=y CONFIG_TARGET_MX6ULL_14X14_EVK=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6ulz-14x14-evk" +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig index af38762..28fc367 100644 --- a/configs/mx7dsabresd_defconfig +++ b/configs/mx7dsabresd_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y @@ -13,6 +11,8 @@ CONFIG_TARGET_MX7DSABRESD=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig index b896ce7..858d150 100644 --- a/configs/mx7dsabresd_qspi_defconfig +++ b/configs/mx7dsabresd_qspi_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y @@ -12,6 +10,8 @@ CONFIG_TARGET_MX7DSABRESD=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTCOMMAND="run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig index 4f64147..abe0155 100644 --- a/configs/mx7ulp_evk_defconfig +++ b/configs/mx7ulp_evk_defconfig @@ -3,13 +3,14 @@ CONFIG_ARCH_MX7ULP=y CONFIG_SYS_TEXT_BASE=0x67800000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x60000000 -CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_TARGET_MX7ULP_EVK=y +# CONFIG_HAS_ARMV7_SECURE_BASE is not set +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_SYS_LOAD_ADDR=0x60800000 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig index 0f8e9e8..2366f52 100644 --- a/configs/mx7ulp_evk_plugin_defconfig +++ b/configs/mx7ulp_evk_plugin_defconfig @@ -3,13 +3,14 @@ CONFIG_ARCH_MX7ULP=y CONFIG_SYS_TEXT_BASE=0x67800000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x60000000 -CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7ulp-evk" CONFIG_TARGET_MX7ULP_EVK=y +# CONFIG_HAS_ARMV7_SECURE_BASE is not set +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x9e000000 CONFIG_SYS_LOAD_ADDR=0x60800000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; fi; fi; fi" diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index 6c39b5e..4f99042 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6ULL=y CONFIG_TARGET_MYS_6ULX=y @@ -15,6 +13,8 @@ CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index f6a1dcb..413e342 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -17,6 +17,7 @@ CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nas220> " # CONFIG_CMD_FLASH is not set @@ -41,6 +42,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index f55ca67..f038327 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="2big2> " CONFIG_CMD_EEPROM=y @@ -46,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index b961b58..869d4c8 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -45,6 +45,7 @@ CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index 1a5492e..8649f0e 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_BCM6345_GPIO=y @@ -46,6 +47,7 @@ CONFIG_LED=y CONFIG_LED_BCM6328=y CONFIG_LED_BLINK=y CONFIG_LED_GPIO=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_BCM6368_ETH=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 53ff4e2..0e6b323 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y @@ -46,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 1195cc7..06cb00d 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y @@ -46,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 47ca1bd..f19bf08 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y @@ -44,6 +45,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 2d920ab..bdd4382 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -24,6 +24,7 @@ CONFIG_USE_PREBOOT=y CONFIG_CONSOLE_MUX=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_MISC_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ns2> " CONFIG_CMD_EEPROM=y @@ -46,6 +47,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=20000000 CONFIG_ENV_ADDR=0x70000 CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 553380e..3a0d95c 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -20,6 +18,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -53,6 +53,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -68,6 +70,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 336e3b2..f8c1cb1 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -20,6 +18,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -53,6 +53,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -68,6 +70,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index dbc1818..02b168c 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -20,6 +18,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -54,6 +54,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -70,6 +72,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index d88d071..1286ce5 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -20,6 +18,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6q-nitrogen6x" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -54,6 +54,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -70,6 +72,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 6c7b8b7..cec0060 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -20,6 +18,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -53,6 +53,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -68,6 +70,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 440c773..d6d7bac 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x2000 @@ -20,6 +18,8 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6dl-nitrogen6x" CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x10010000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -53,6 +53,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_NETCONSOLE=y CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y @@ -68,6 +70,7 @@ CONFIG_SPI_FLASH_SST=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/novena_defconfig b/configs/novena_defconfig index 664a9b2..db33d11 100644 --- a/configs/novena_defconfig +++ b/configs/novena_defconfig @@ -52,6 +52,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_NETCONSOLE=y CONFIG_DM=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index 05a6761..d003b7e 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -17,6 +17,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv bootargs ${console} ${mtdparts} ${bootargs_root}; ubi part root; ubifsmount ubi:rootfs; ubifsload 0x800000 ${kernel}; ubifsload 0x700000 ${fdt}; ubifsumount; fdt addr 0x700000; fdt resize; fdt chosen; bootz 0x800000 - 0x700000" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nsa310s => " CONFIG_CMD_BOOTZ=y @@ -41,6 +42,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 3607583..71d6fe5 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -17,6 +17,8 @@ CONFIG_SYS_PROMPT="nsim# " CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_NET is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index 2d8a3e4..954ea42 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -18,6 +18,8 @@ CONFIG_SYS_PROMPT="nsim# " CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_NET is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 51ce560..60b7a01 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -21,6 +21,8 @@ CONFIG_CMD_DHCP=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y CONFIG_DM_ETH=y diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 60e6094..bd1cdf3 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_PROMPT="nsim# " CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" # CONFIG_NET is not set CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index d29c850..de86a85 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x04000000 -CONFIG_SYS_MEMTEST_END=0x040f0000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -16,12 +14,18 @@ CONFIG_DEFAULT_DEVICE_TREE="octeontx" CONFIG_DEBUG_UART_BASE=0x87e028000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x04000000 +CONFIG_SYS_MEMTEST_END=0x040f0000 CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_BOOT_RETRY_MIN=30 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=6 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M" # CONFIG_DISPLAY_CPUINFO is not set @@ -47,6 +51,7 @@ CONFIG_CMD_PCI=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 1ce892d..0c91ce2 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -22,6 +22,10 @@ CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_BOOT_RETRY_MIN=30 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M" # CONFIG_DISPLAY_CPUINFO is not set @@ -48,6 +52,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index ddb9007..621b53c 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_TEXT_BASE=0x2800000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x2800000 -CONFIG_SYS_MEMTEST_END=0x28f0000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,12 +15,18 @@ CONFIG_DEBUG_UART_BASE=0x87e028000000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x2800000 +CONFIG_SYS_MEMTEST_END=0x28f0000 CONFIG_SYS_LOAD_ADDR=0x2800000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_BOOT_RETRY_MIN=30 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=4 rootwait rw root=/dev/sda2 coherent_pool=16M" # CONFIG_DISPLAY_CPUINFO is not set @@ -48,6 +52,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index b8ebc28..6069201 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -21,6 +21,10 @@ CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=5 +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=-1 +CONFIG_BOOT_RETRY_MIN=30 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/sda2 coherent_pool=16M" # CONFIG_DISPLAY_CPUINFO is not set @@ -46,6 +50,7 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_WDT=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_TFTPSRV=y CONFIG_CMD_RARP=y diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index 846b30a..89154cd 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_SYS_MONITOR_BASE=0x10000000 CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 206118e..c7111f4 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -83,6 +83,13 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000 CONFIG_DM_ETH=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_OMAP3_SPI=y diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index ecb3d47..c663162 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_SYS_MONITOR_BASE=0x10000000 CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv preboot;saveenv;" diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index ca1a581..73bba9f 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -29,6 +29,7 @@ CONFIG_BOOTCOMMAND="run envboot; run mmcboot; " CONFIG_LOGLEVEL=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_SEPARATE_BSS=y @@ -54,7 +55,10 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index a2fdafd..3f0de34 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -20,6 +20,7 @@ CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_boota CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y @@ -42,6 +43,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 208deb4..50f66c5 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_boota CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y @@ -43,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index d7269c4..f552234 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -21,6 +21,7 @@ CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_boota CONFIG_USE_PREBOOT=y CONFIG_LOGLEVEL=2 # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y @@ -43,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SYS_ATA_STRIDE=4 CONFIG_SYS_ATA_DATA_OFFSET=0x100 diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig index 83f7d93..ca56f93 100644 --- a/configs/pcm052_defconfig +++ b/configs/pcm052_defconfig @@ -5,14 +5,14 @@ CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80010000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vf610-pcm052" CONFIG_ENV_OFFSET_REDUND=0xC0000 CONFIG_TARGET_PCM052=y +CONFIG_SYS_MEMTEST_START=0x80010000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index f92532f..bbc5f9f 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -4,14 +4,6 @@ CONFIG_TARGET_PG_WCOM_EXPU1=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1004000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_KM_DEF_NETDEV="eth2" -CONFIG_KM_COMMON_ETH_INIT=y -CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y -CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE=y -CONFIG_PG_WCOM_UBOOT_UPDATE_TEXT_BASE=0x60240000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -21,7 +13,16 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 CONFIG_SYS_CLK_FREQ=66666666 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_COMMON_ETH_INIT=y +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y +CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE=y +CONFIG_PG_WCOM_UBOOT_UPDATE_TEXT_BASE=0x60240000 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -35,6 +36,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y +CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y @@ -45,6 +47,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -56,6 +59,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0x60060000 CONFIG_ENV_ADDR_REDUND=0x60040000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y @@ -66,6 +71,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 1020b68..69a3fc2 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -4,13 +4,6 @@ CONFIG_TARGET_PG_WCOM_EXPU1=y CONFIG_SYS_TEXT_BASE=0x60240000 CONFIG_SYS_MALLOC_LEN=0x1004000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_KM_DEF_NETDEV="eth2" -CONFIG_KM_COMMON_ETH_INIT=y -CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y -CONFIG_PG_WCOM_UBOOT_UPDATE=y -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,7 +12,15 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-expu1" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_COMMON_ETH_INIT=y +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y +CONFIG_PG_WCOM_UBOOT_UPDATE=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -33,6 +34,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y +CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y @@ -43,6 +45,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -54,6 +57,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0x60220000 CONFIG_ENV_ADDR_REDUND=0x60200000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y @@ -64,6 +69,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 1a2ba8c..7cf5a6a 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -4,14 +4,6 @@ CONFIG_TARGET_PG_WCOM_SELI8=y CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x1004000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_KM_DEF_NETDEV="eth2" -CONFIG_KM_COMMON_ETH_INIT=y -CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y -CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE=y -CONFIG_PG_WCOM_UBOOT_UPDATE_TEXT_BASE=0x60240000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -21,7 +13,16 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 CONFIG_SYS_CLK_FREQ=66666666 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_COMMON_ETH_INIT=y +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y +CONFIG_PG_WCOM_UBOOT_BOOTPACKAGE=y +CONFIG_PG_WCOM_UBOOT_UPDATE_TEXT_BASE=0x60240000 +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -35,6 +36,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y +CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y @@ -45,6 +47,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -56,6 +59,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0x60060000 CONFIG_ENV_ADDR_REDUND=0x60040000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y @@ -66,6 +71,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index 3a51d4e..dc33613 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -4,13 +4,6 @@ CONFIG_TARGET_PG_WCOM_SELI8=y CONFIG_SYS_TEXT_BASE=0x60240000 CONFIG_SYS_MALLOC_LEN=0x1004000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_KM_DEF_NETDEV="eth2" -CONFIG_KM_COMMON_ETH_INIT=y -CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 -CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y -CONFIG_PG_WCOM_UBOOT_UPDATE=y -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,7 +12,15 @@ CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DEFAULT_DEVICE_TREE="ls1021a-pg-wcom-seli8" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x70000020 +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_AHCI=y +CONFIG_KM_DEF_NETDEV="eth2" +CONFIG_KM_COMMON_ETH_INIT=y +CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3 +CONFIG_PG_WCOM_UBOOT_UPDATE_SUPPORTED=y +CONFIG_PG_WCOM_UBOOT_UPDATE=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_FIT=y @@ -33,6 +34,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0" CONFIG_SILENT_CONSOLE=y +CONFIG_EVENT=y CONFIG_LAST_STAGE_INIT=y CONFIG_MISC_INIT_R=y CONFIG_CMD_IMLS=y @@ -43,6 +45,7 @@ CONFIG_CMD_GPT=y CONFIG_CMD_I2C=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CRAMFS=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=60000000.nor,nand0=68000000.flash" @@ -54,6 +57,8 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0x60220000 CONFIG_ENV_ADDR_REDUND=0x60200000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="ethernet@2d90000" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y CONFIG_BOOTCOUNT_LIMIT=y @@ -64,6 +69,7 @@ CONFIG_SYS_I2C_LEGACY=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index e2a5731..9e35724 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -59,6 +59,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index 9459787..10b5ffd 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -59,6 +59,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig index 0a5e6c5..0a05c4b 100644 --- a/configs/phycore_pcl063_defconfig +++ b/configs/phycore_pcl063_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_MX6UL=y CONFIG_TARGET_PCL063=y @@ -15,6 +13,8 @@ CONFIG_SPL_TEXT_BASE=0x00909000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 9d5aa3a..3c2ad93 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -2,14 +2,14 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0x9D004000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x600 -CONFIG_SYS_MEMTEST_START=0x88000000 -CONFIG_SYS_MEMTEST_END=0x88080000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk" CONFIG_MACH_PIC32=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y +CONFIG_SYS_MEMTEST_START=0x88000000 +CONFIG_SYS_MEMTEST_END=0x88080000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x88500000 CONFIG_TIMESTAMP=y @@ -24,13 +24,17 @@ CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_RARP=y CONFIG_CMD_TIME=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set # CONFIG_EFI_PARTITION is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=500 +CONFIG_NET_RETRY_COUNT=20 CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=8 CONFIG_CLK=y CONFIG_MMC=y CONFIG_MMC_SDHCI=y diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig index 8d63f16..3a03081 100644 --- a/configs/pico-dwarf-imx6ul_defconfig +++ b/configs/pico-dwarf-imx6ul_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y @@ -18,6 +16,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" @@ -54,6 +54,7 @@ CONFIG_SYS_I2C_MXC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig index 1ce17e6..0c5555e 100644 --- a/configs/pico-hobbit-imx6ul_defconfig +++ b/configs/pico-hobbit-imx6ul_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y @@ -19,6 +17,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" @@ -57,6 +57,7 @@ CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index ba991e8..44d9295 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -56,6 +56,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_BOUNCE_BUFFER=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 35021ac..6a26174 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y @@ -19,6 +17,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index 0f96e41..56df161 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +17,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 6f25fd7..cd005d0 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -59,6 +59,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000 CONFIG_MXC_GPIO=y CONFIG_DM_I2C=y diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig index 5e18dcc..690c1b4 100644 --- a/configs/pico-pi-imx6ul_defconfig +++ b/configs/pico-pi-imx6ul_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6UL=y @@ -19,6 +17,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" @@ -57,6 +57,7 @@ CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_PINCTRL=y diff --git a/configs/pinecube_defconfig b/configs/pinecube_defconfig index e779663..28e347b 100644 --- a/configs/pinecube_defconfig +++ b/configs/pinecube_defconfig @@ -7,6 +7,7 @@ CONFIG_SUNXI_DRAM_DDR3_1333=y CONFIG_DRAM_CLK=504 CONFIG_DRAM_ODT_EN=y CONFIG_I2C0_ENABLE=y +# CONFIG_HAS_ARMV7_SECURE_BASE is not set CONFIG_SPL_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index eb07b42..8e5ebaa 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9261" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " @@ -61,5 +60,9 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set +CONFIG_ATMEL_LCD=y +CONFIG_ATMEL_LCD_BGR555=y CONFIG_LCD=y +CONFIG_LCD_INFO=y +CONFIG_LCD_LOGO=y CONFIG_REGEX=y diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index e8a5b4d..2f8380d 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -11,7 +11,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " @@ -28,6 +27,7 @@ CONFIG_SYS_PROMPT="u-boot-pm9263> " CONFIG_CMD_NAND=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_JFFS2=y @@ -64,5 +64,9 @@ CONFIG_DM_SPI=y CONFIG_USB=y CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP32 is not set +CONFIG_ATMEL_LCD=y +CONFIG_ATMEL_LCD_BGR555=y CONFIG_LCD=y +CONFIG_LCD_INFO=y +CONFIG_LCD_LOGO=y CONFIG_JFFS2_NAND=y diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 7fbbbab..6a347f9 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x73f00000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_PM9G45=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" @@ -21,6 +22,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="nand read 0x70000000 0x200000 0x300000;bootm 0x70000000" CONFIG_SYS_CONSOLE_IS_IN_ENV=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set @@ -33,6 +35,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 7853cc7..37397f4 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -39,6 +39,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index d05db80..8056200 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -55,6 +55,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_VERSION_VARIABLE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=1 diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig new file mode 100644 index 0000000..e10eced --- /dev/null +++ b/configs/pomelo_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_TARGET_POMELO=y +CONFIG_SYS_TEXT_BASE=0x180000 +CONFIG_SYS_MALLOC_LEN=0x101000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEFAULT_DEVICE_TREE="phytium-pomelo" +CONFIG_SYS_PCI_64BIT=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_SYS_LOAD_ADDR=0x90000000 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_LAST_STAGE_INIT=y +CONFIG_SYS_PROMPT="pomelo#" +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_ECAM_GENERIC=y +CONFIG_PCI_PHYTIUM=y +CONFIG_PL01X_SERIAL=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index ccf2b3f..b54b48e 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -74,6 +74,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 15c6bb3..5f71e26 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -27,6 +27,9 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=60 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set @@ -70,6 +73,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index d1f928d..eac2cc2 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -9,6 +9,7 @@ CONFIG_TARGET_QEMU_PPCE500=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_MONITOR_BASE=0x00F01000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdtcontroladdr" @@ -30,11 +31,14 @@ CONFIG_DOS_PARTITION=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DM=y CONFIG_SIMPLE_BUS_CORRECT_RANGE=y CONFIG_BLK=y CONFIG_HAVE_BLOCK_DEVICE=y +CONFIG_CHIP_SELECTS_PER_CTRL=0 CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_FSL=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 591b311..cc8393e 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -20,6 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y # CONFIG_USE_SPL_FIT_GENERATOR is not set +CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y @@ -44,6 +45,7 @@ CONFIG_CMD_IDE=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_TIME=y CONFIG_CMD_QFW=y @@ -51,6 +53,8 @@ CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 928fa68..6010b61 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_IDE=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_TIME=y CONFIG_CMD_QFW=y @@ -34,6 +35,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 606a7fd..62aa341 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -41,6 +41,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index febf8f2..791a26c 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -43,6 +43,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 8b5c8ff..f12c09a 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sh7751-r2dplus" CONFIG_SYS_CLK_FREQ=60000000 CONFIG_TARGET_R2DPLUS=y CONFIG_SYS_LOAD_ADDR=0x8e000000 +CONFIG_SYS_MONITOR_BASE=0xA0000000 CONFIG_BOOTDELAY=-1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttySC0,115200" diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 4ccc6f1..7e73eb3 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -58,6 +58,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 36b39c1..b5ec2e9 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -59,6 +59,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index 9470bee..94a59ad 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77990-ebisu.dtb; booti 0x48080000 - 0x48000000" @@ -68,6 +69,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y @@ -76,6 +78,7 @@ CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index ea94d5c..c4c743e 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000" @@ -62,6 +63,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_CFI=y CONFIG_RENESAS_RPC_HF=y @@ -69,6 +71,7 @@ CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 9fce6c2..c1685aa 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -57,6 +57,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index e905561..240304e 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -28,6 +28,9 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=60 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -71,6 +74,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index d4dc8ec..4c1320d 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -13,6 +13,7 @@ CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000" @@ -69,6 +70,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y @@ -77,6 +79,7 @@ CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 3a5e433..f5eff5f 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -15,6 +15,7 @@ CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y +CONFIG_SYS_MONITOR_BASE=0x00000000 CONFIG_USE_BOOTARGS=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000" @@ -70,6 +71,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_CFI_FLASH=y +CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y @@ -78,6 +80,7 @@ CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 5633270..bdfe51c 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -44,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 +CONFIG_ARP_TIMEOUT=200 CONFIG_DM=y CONFIG_BOUNCE_BUFFER=y CONFIG_SYS_I2C_LEGACY=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index 195541c..a46c68d 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -24,6 +24,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y CONFIG_DM_ETH=y @@ -41,6 +42,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index eb63fbd..a45999b 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -25,6 +25,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y CONFIG_DM_ETH=y @@ -42,6 +43,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index 4610289..5ae1bd0 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -26,6 +26,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y CONFIG_PHYLIB=y @@ -45,6 +46,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index 91b63b6..6073058 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -25,6 +25,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y CONFIG_PHYLIB=y @@ -44,6 +45,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index 528b12e..58af5de 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -25,6 +25,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y CONFIG_PHYLIB=y @@ -44,6 +45,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index 8f87a43..3eb57c4 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -29,6 +29,7 @@ CONFIG_DM_DMA=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_SYS_DFU_MAX_FILE_SIZE=0x200000 +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_BCM2835=y @@ -59,6 +60,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_ADDR_MAP=y diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index 461a765..59472d7 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -29,6 +29,7 @@ CONFIG_DM_DMA=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_SYS_DFU_MAX_FILE_SIZE=0x200000 +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_BCM2835=y @@ -59,6 +60,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 351d247..639a3a8 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -24,6 +24,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y CONFIG_DM_DMA=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_BCM2835=y @@ -51,6 +52,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 0baef3b..66c8202 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -24,6 +24,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_TFTP_TSIZE=y +CONFIG_BCM2835_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_BCM2835=y CONFIG_DM_ETH=y @@ -41,6 +42,7 @@ CONFIG_DM_VIDEO=y # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP16 is not set CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_BCM2835=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_PHYS_TO_BUS=y CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 6c6be4a..c3f8dd4 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -27,6 +27,9 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=60 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set @@ -71,6 +74,7 @@ CONFIG_OF_EMBED=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/rzg2_beacon_defconfig b/configs/rzg2_beacon_defconfig index 91b3fa2..5babd48 100644 --- a/configs/rzg2_beacon_defconfig +++ b/configs/rzg2_beacon_defconfig @@ -62,6 +62,7 @@ CONFIG_DM_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_ATHEROS=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index 0e17e75..c924fbf 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -5,8 +5,6 @@ CONFIG_ARCH_NEXELL=y CONFIG_SYS_TEXT_BASE=0x74C00000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x71000000 -CONFIG_SYS_MEMTEST_END=0xb0000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x2E0200 CONFIG_DM_GPIO=y @@ -16,6 +14,8 @@ CONFIG_S5P4418_ONEWIRE=y CONFIG_ROOT_DEV=1 CONFIG_BOOT_PART=1 CONFIG_ROOT_PART=2 +CONFIG_SYS_MEMTEST_START=0x71000000 +CONFIG_SYS_MEMTEST_END=0xb0000000 CONFIG_SYS_LOAD_ADDR=0x71080000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y @@ -27,6 +27,8 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nanopi2# " CONFIG_CMD_BOOTZ=y +# CONFIG_BOOTM_NETBSD is not set +# CONFIG_BOOTM_RTEMS is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index 35ce6ae..9ac5dba 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_BCM6345_GPIO=y @@ -48,6 +49,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_DM_RESET=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 59fc4a9..238397f 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y @@ -36,6 +37,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index 48b6a6a..0d3e9d0 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" @@ -37,6 +38,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 4e46e46..b0f74e6 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x23f00000 CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60EK=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y @@ -38,6 +39,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index 9ca984c1..7d25474 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -26,7 +26,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index afcd41a..1df7ae0 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -25,7 +25,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -44,6 +43,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 149e480..adb6580 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -26,7 +26,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -45,6 +44,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index 3fb79be..cd51425 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -26,7 +26,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -43,6 +42,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index d1dee02..43be6fb 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -24,7 +24,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -46,6 +45,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index 700aef7..574a67e 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -24,7 +24,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_QSPI_BOOT=y CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 @@ -50,6 +49,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 7761a57..ef92009 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -24,7 +24,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -47,6 +46,7 @@ CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -82,6 +82,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index 88bbbb4..4a1efe2 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x26f00000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SAMA5D2_ICP=y -CONFIG_SYS_MEMTEST_START=0x20000000 -CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" @@ -13,12 +11,13 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x20000000 +CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_BOOT_GET_CMDLINE=y CONFIG_SYS_BOOT_GET_KBD=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_QSPI_BOOT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 @@ -46,6 +45,7 @@ CONFIG_CMD_SDRAM=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_GETTIME=y CONFIG_CMD_TIMER=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 9f458e1..1c5d750 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -16,7 +16,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -37,6 +36,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index 6460ff3..690361a 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -16,7 +16,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2" CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -37,6 +36,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 844a9cd..ab54b83 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -25,7 +25,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -43,6 +42,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -90,7 +90,7 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 0de0636..17cdd46 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -26,7 +26,6 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -45,6 +44,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -92,7 +92,7 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index a6e002e..a3854a5 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -26,8 +26,8 @@ CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" CONFIG_QSPI_BOOT=y +CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwait" @@ -45,6 +45,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -91,7 +92,7 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 676385f..bd3a70c 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -49,6 +49,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y @@ -95,7 +96,7 @@ CONFIG_DM_SPI=y CONFIG_ATMEL_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y -CONFIG_ATMEL_PIT_TIMER=y +CONFIG_ATMEL_TCB_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 1967352..3732b68 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index a7cf6b2..2a26140 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index 33ce03c..df62e0e 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index 7660dbe..d89b6f3 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index 97361a0..a06f524 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 7828bfd..8bb3706 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_EXT4=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 5e2b79e..b4568cd 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -45,6 +45,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index bffcc49..03c2b20 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -48,6 +48,7 @@ CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index c664274..878f3a3 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index c6cb19e..1061762 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -42,6 +42,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 3a7da73..21e9fc3 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_HASH=y CONFIG_HASH_VERIFY=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index b0689fb..01b2a58 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index a853026..25e2b98 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -44,6 +44,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index b36f4b5..484df6a 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index 15a5c54..559a699 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -4,15 +4,15 @@ CONFIG_SYS_TEXT_BASE=0x66f00000 CONFIG_SYS_MALLOC_F_LEN=0x11000 CONFIG_TARGET_SAMA7G5EK=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x60000000 -CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" +CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_FIT=y @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 7abd5c8..94ded8a 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -4,15 +4,15 @@ CONFIG_SYS_TEXT_BASE=0x66f00000 CONFIG_SYS_MALLOC_F_LEN=0x11000 CONFIG_TARGET_SAMA7G5EK=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x60000000 -CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek" +CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek" CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_DEBUG_UART_BASE=0xe1824200 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x60000000 +CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_FIT=y @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="0:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index 7c157a2..4fbe148 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -1,14 +1,14 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x00100000 -CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox64" CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_SANDBOX64=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00100000 +CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_FIT=y @@ -23,7 +23,6 @@ CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_F=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index ab0e2de..1826cf0 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -1,17 +1,16 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x00100000 -CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_PRE_CON_BUF_ADDR=0xf0000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00100000 +CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_FIT=y -CONFIG_FIT_SIGNATURE=y CONFIG_FIT_RSASSA_PSS=y CONFIG_FIT_CIPHER=y CONFIG_FIT_VERBOSE=y @@ -27,16 +26,18 @@ CONFIG_AUTOBOOT_SHA256_FALLBACK=y CONFIG_AUTOBOOT_NEVER_TIMEOUT=y CONFIG_AUTOBOOT_STOP_STR_ENABLE=y CONFIG_AUTOBOOT_STOP_STR_CRYPT="$5$rounds=640000$HrpE65IkB8CM5nCL$BKT3QdF98Bo8fJpTr9tjZLZQyzqPASBY20xuK5Rent9" +CONFIG_IMAGE_PRE_LOAD=y +CONFIG_IMAGE_PRE_LOAD_SIG=y CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_LOG=y CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_F=y CONFIG_STACKPROTECTOR=y CONFIG_ANDROID_AB=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y +CONFIG_CMD_BOOTM_PRE_LOAD=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_HELLO=y CONFIG_CMD_ABOOTIMG=y @@ -105,6 +106,7 @@ CONFIG_CMD_TPM_TEST=y CONFIG_CMD_BTRFS=y CONFIG_CMD_CBFS=y CONFIG_CMD_CRAMFS=y +CONFIG_CMD_EROFS=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_SQUASHFS=y CONFIG_CMD_MTDPARTS=y @@ -314,7 +316,6 @@ CONFIG_ECDSA=y CONFIG_ECDSA_VERIFY=y CONFIG_TPM=y CONFIG_SHA384=y -CONFIG_LZ4=y CONFIG_ERRNO_STR=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 217b064..b6f7355 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -1,12 +1,12 @@ CONFIG_SYS_TEXT_BASE=0 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x00100000 -CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00100000 +CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_FIT=y @@ -20,7 +20,6 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_F=y CONFIG_CMD_CPU=y CONFIG_CMD_LICENSE=y CONFIG_CMD_BOOTZ=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index ec912cf..acf648f 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -4,8 +4,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x00100000 -CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_SERIAL=y @@ -15,6 +13,8 @@ CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_SANDBOX_SPL=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00100000 +CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_FIT=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 1687ccf..1196728 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -4,8 +4,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x00100000 -CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_SERIAL=y @@ -15,6 +13,8 @@ CONFIG_SPL=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_SANDBOX_SPL=y CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00100000 +CONFIG_SYS_MEMTEST_END=0x00101000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_FIT=y @@ -30,7 +30,6 @@ CONFIG_BOOTSTAGE_STASH_SIZE=0x4096 CONFIG_CONSOLE_RECORD=y CONFIG_CONSOLE_RECORD_OUT_SIZE=0x1000 CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_F=y CONFIG_HANDOFF=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig index d417a5c..4cf79c5 100644 --- a/configs/seeed_npi_imx6ull_defconfig +++ b/configs/seeed_npi_imx6ull_defconfig @@ -5,8 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3c00000 CONFIG_MX6ULL=y @@ -16,6 +14,8 @@ CONFIG_SPL_TEXT_BASE=0x908000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -42,6 +42,8 @@ CONFIG_CMD_UBI=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_FSL_USDHC=y CONFIG_MTD=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index c9c50bd..e97c1f0 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -39,6 +39,7 @@ CONFIG_CMD_PING=y # CONFIG_CMD_SLEEP is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SYS_RX_ETH_BUFFER=6 # CONFIG_DM_DEVICE_REMOVE is not set CONFIG_BCM6348_IUDMA=y CONFIG_BCM6345_GPIO=y @@ -52,6 +53,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y CONFIG_PHY_FIXED=y +CONFIG_PHY_RESET_DELAY=20 CONFIG_DM_ETH=y CONFIG_BCM6348_ETH=y CONFIG_PHY=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 0c5031b..db94187 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -19,6 +19,7 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_FLASH is not set @@ -44,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_DM=y CONFIG_SATA_MV=y CONFIG_SYS_SATA_MAX_DEVICE=2 diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 5b01f1e..0dafb70 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -57,6 +57,7 @@ CONFIG_RENESAS_SDHI=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_REALTEK=y CONFIG_DM_ETH=y CONFIG_RENESAS_RAVB=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 6ad3252..fe28514 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -76,6 +76,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig index 1597616..5988777 100644 --- a/configs/slimbootloader_defconfig +++ b/configs/slimbootloader_defconfig @@ -15,11 +15,14 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_EXT2=y CONFIG_CMD_FAT=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index 0e99c36..0f96ada 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -11,6 +11,8 @@ CONFIG_SYS_TEXT_BASE=0x23000000 CONFIG_SYS_MALLOC_LEN=0x460000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_SMARTWEB=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y @@ -22,7 +24,7 @@ CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" @@ -43,6 +45,7 @@ CONFIG_CMD_DFU=y CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_CMD_MTDPARTS=y @@ -55,6 +58,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_CLK=y CONFIG_CLK_AT91=y CONFIG_DFU_NAND=y @@ -62,7 +66,6 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 @@ -72,6 +75,7 @@ CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_MACB=y +CONFIG_RMII=y CONFIG_ATMEL_USART=y CONFIG_USB=y CONFIG_USB_GADGET=y diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 829cb4a..d5d1791 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2300000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y @@ -15,6 +13,8 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig index 4b3267e..04b3f7c 100644 --- a/configs/snapper9260_defconfig +++ b/configs/snapper9260_defconfig @@ -5,16 +5,18 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_TARGET_SNAPPER9260=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x80000 CONFIG_SYS_LOAD_ADDR=0x23000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="Snapper> " # CONFIG_CMD_BDI is not set @@ -27,6 +29,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y @@ -34,6 +37,8 @@ CONFIG_CMD_FAT=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 +CONFIG_TFTP_PORT=y CONFIG_TFTP_TSIZE=y CONFIG_AT91_GPIO=y CONFIG_CMD_PCA953X=y @@ -46,4 +51,5 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_ATMEL_USART=y diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig index 3674c8f..7eb512d 100644 --- a/configs/snapper9g20_defconfig +++ b/configs/snapper9g20_defconfig @@ -5,16 +5,18 @@ CONFIG_ARCH_AT91=y CONFIG_SYS_TEXT_BASE=0x21f00000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_TARGET_SNAPPER9260=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x80000 CONFIG_SYS_LOAD_ADDR=0x23000000 CONFIG_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ip=any" # CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_RESET_PHY_R=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_IMI is not set @@ -26,6 +28,7 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y # CONFIG_CMD_MDIO is not set CONFIG_CMD_PING=y @@ -33,6 +36,8 @@ CONFIG_CMD_FAT=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 +CONFIG_TFTP_PORT=y CONFIG_TFTP_TSIZE=y CONFIG_AT91_GPIO=y CONFIG_CMD_PCA953X=y @@ -45,4 +50,5 @@ CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_ATMEL_USART=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index f85953f..6b15bc3 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 2e116fb..3425adc 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y @@ -15,6 +13,8 @@ CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_BOOTDELAY=5 @@ -41,6 +41,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index b62f509..486c88f 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -48,6 +48,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index ad1bdbe..1be9a2d 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_FPGA=y CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 60f48db..dafeaff 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 90717b5..b09672d 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 15652a1..a8ef2e9 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y @@ -46,6 +47,8 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 09b51e1..2e5bd80 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index 28f7224..95b4ef6 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 36c411d..75e16be 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 2124a08..53e9a72 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y @@ -38,7 +39,10 @@ CONFIG_CMD_UBI=y # CONFIG_EFI_PARTITION is not set CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_VERSION_VARIABLE=y +CONFIG_ARP_TIMEOUT=500 CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index d31c3f5..07ca4bf 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y @@ -37,6 +38,8 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_DFU_MMC=y CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000 diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 31346fc..d458818 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -47,6 +47,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 7e7d1cc..57ccf70 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -39,6 +39,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index cf7bf23..91b05ca 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -48,6 +48,8 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DWAPB_GPIO=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index f7bdb90..17a84f8 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -17,6 +17,9 @@ CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_FIT=y +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=45 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ubi.fm_autoconvert=1 uio_pdrv_genirq.of_id=\"idq,regbank\"" CONFIG_BOOTCOMMAND="setenv bootcmd 'bridge enable; if test ${bootnum} = 'b'; then run _fpga_loadsafe; else if test ${bootcount} -eq 4; then echo 'Switching copy...'; setexpr x $bootnum % 2 && setexpr bootnum $x + 1; saveenv; fi; run _fpga_loaduser; fi;echo 'Booting bank $bootnum' && run userload && run userboot;' && setenv altbootcmd 'setenv bootnum b && saveenv && boot;' && saveenv && saveenv && boot;" @@ -26,6 +29,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set @@ -54,6 +58,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_VERSION_VARIABLE=y CONFIG_SPL_DM_SEQ_ALIAS=y # CONFIG_SPL_BLK is not set diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 1a301ce..e245288 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -17,6 +17,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 8195a0e..7044186 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index a7a48a0..b0be033 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -12,6 +10,8 @@ CONFIG_SPL_TEXT_BASE=0xFFFF0000 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_ENV_OFFSET_REDUND=0xF0000 +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_TIMESTAMP=y @@ -24,6 +24,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_CLOCKS=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMD_ASKENV=y diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index 60e7750..386a773 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -48,6 +48,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="kernel.itb" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 8249a12..800b200 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -4,8 +4,6 @@ CONFIG_SYS_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y @@ -15,6 +13,8 @@ CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_OPTIMIZE_INLINING=y CONFIG_SPL_OPTIMIZE_INLINING=y CONFIG_REMAKE_ELF=y @@ -45,6 +45,8 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_ALTERA_SDRAM=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 4e2c0c1..52084b8 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CLOCKS=y CONFIG_MISC_INIT_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 @@ -50,6 +51,8 @@ CONFIG_CMD_UBI=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="fitImage" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index f9815ca..c2f83a5 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -11,6 +11,7 @@ CONFIG_TARGET_SOCRATES=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y +CONFIG_SYS_MONITOR_BASE=0xFFF80000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run boot_nor" @@ -33,6 +34,7 @@ CONFIG_CMD_SDRAM=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -45,7 +47,10 @@ CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xFFF40000 CONFIG_ENV_ADDR_REDUND=0xFFF20000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="TSEC0" CONFIG_DM=y +CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFE001001 CONFIG_SYS_OR0_PRELIM=0xFE000030 diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig index 9781b10..fb630bd 100644 --- a/configs/som-db5800-som-6867_defconfig +++ b/configs/som-db5800-som-6867_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_TIME=y @@ -49,6 +50,8 @@ CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig index 956a6ca..33b1791 100644 --- a/configs/somlabs_visionsom_6ull_defconfig +++ b/configs/somlabs_visionsom_6ull_defconfig @@ -3,13 +3,13 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x87800000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_MX6ULL=y CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y CONFIG_DEFAULT_DEVICE_TREE="imx6ull-somlabs-visionsom" +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_FIT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y @@ -38,6 +38,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_FSL_USDHC=y diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 90a4ec4..e99bb1e 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -25,6 +25,8 @@ CONFIG_CMD_EXT4_WRITE=y # CONFIG_ISO_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 11a2885..f1deb1b 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 @@ -11,6 +9,8 @@ CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index 7973e0f..0c17418 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 @@ -11,6 +9,8 @@ CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 5eadd63..cbe1aad 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7" CONFIG_SPL_TEXT_BASE=0x2FFC2500 @@ -11,6 +9,8 @@ CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index 1dde46a..efc0320 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0" CONFIG_SPL_TEXT_BASE=0x2FFC2500 @@ -11,6 +9,8 @@ CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 # CONFIG_ARMV7_VIRT is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 102d10a..f218775 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SPL_DM_SPI=y @@ -18,6 +16,8 @@ CONFIG_TYPEC_STUSB160X=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 2beb88e..d081557 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" @@ -14,6 +12,8 @@ CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x4C0000 CONFIG_TYPEC_STUSB160X=y # CONFIG_ARMV7_NONSEC is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 438bba3..08b7d52 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y @@ -14,6 +12,8 @@ CONFIG_TARGET_DH_STM32MP1_PDK2=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index c6857d0..171a305 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 -CONFIG_SYS_MEMTEST_START=0xc0000000 -CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" @@ -15,6 +13,8 @@ CONFIG_CMD_STM32PROG=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 CONFIG_TYPEC_STUSB160X=y # CONFIG_ARMV7_NONSEC is not set +CONFIG_SYS_MEMTEST_START=0xc0000000 +CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_FIT=y diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig index 6ccd667..d3507de 100644 --- a/configs/stmark2_defconfig +++ b/configs/stmark2_defconfig @@ -6,9 +6,10 @@ CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="stmark2" CONFIG_TARGET_STMARK2=y +CONFIG_MCFTMR=y CONFIG_SYS_LOAD_ADDR=0x40010000 CONFIG_TIMESTAMP=y -CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000" +CONFIG_SYS_MONITOR_BASE=0x47E00400 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 rw rootfstype=ramfs rdinit=/bin/init devtmpfs.mount=1" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index f698291..0502ae5 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -74,6 +74,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_BITBANGMII=y +CONFIG_BITBANGMII_MULTI=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_DM_ETH=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index fa1ae10..e8d8509 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -5,12 +5,12 @@ CONFIG_SYS_TEXT_BASE=0x00010000 CONFIG_SYS_MALLOC_LEN=0x14000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00100000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x30000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="stv0991" +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00100000 CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y @@ -35,6 +35,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_PHY_RESET_DELAY=10000 CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_CADENCE_QSPI=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index 6dbf8c2..33ae69b 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -24,6 +24,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_USE_PREBOOT=y +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_OS_BOOT=y CONFIG_SPL_FALCON_BOOT_MMCSD=y @@ -37,11 +38,13 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_MAY_FAIL=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT4_WRITE=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_FPGA_XILINX=y CONFIG_FPGA_ZYNQPL=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index eaede09..68de985 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -13,6 +13,8 @@ CONFIG_SYS_TEXT_BASE=0x21000000 CONFIG_SYS_MALLOC_LEN=0x460000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TARGET_TAURUS=y +CONFIG_AT91_GPIO_PULLUP=y +CONFIG_ATMEL_LEGACY=y CONFIG_BOARD_TAURUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y @@ -30,7 +32,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DEBUG_UART=y CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20" +CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,256k(env),256k(env_redundant),256k(spare),512k(dtb),6M(kernel)ro,-(rootfs) root=/dev/mtdblock7 rw rootfstype=jffs2" @@ -76,7 +78,6 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100000 CONFIG_AT91_GPIO=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_RAW_NAND=y # CONFIG_SYS_NAND_USE_FLASH_BBT is not set CONFIG_NAND_ATMEL=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 @@ -88,6 +89,7 @@ CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_SPECIFY_CONSOLE_INDEX=y diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 94ed3fb..0adf050 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -16,6 +16,8 @@ CONFIG_CMD_PING=y CONFIG_OF_CONTROL=y CONFIG_OF_EMBED=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_SERIAL=y diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 8a33160..4d6ca4f 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x17800000 CONFIG_SYS_MALLOC_LEN=0x8000000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x10000000 -CONFIG_SYS_MEMTEST_END=0x2f400000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_MX6Q=y @@ -14,6 +12,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx6q-tbs2910" CONFIG_PRE_CON_BUF_ADDR=0x7c000000 CONFIG_CMD_HDMIDETECT=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x10000000 +CONFIG_SYS_MEMTEST_END=0x2f400000 CONFIG_LTO=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 diff --git a/configs/ten64_tfa_defconfig b/configs/ten64_tfa_defconfig index dbd9b04..fd38aca 100644 --- a/configs/ten64_tfa_defconfig +++ b/configs/ten64_tfa_defconfig @@ -19,7 +19,6 @@ CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256" # CONFIG_USE_BOOTCOMMAND is not set @@ -28,6 +27,7 @@ CONFIG_LOGLEVEL=7 CONFIG_DISPLAY_BOARDINFO_LATE=y # CONFIG_ID_EEPROM is not set CONFIG_PCI_INIT_R=y +CONFIG_RESET_PHY_R=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_BOOTMENU=y CONFIG_CMD_GREPENV=y diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig index 4a9bbef..25758b4 100644 --- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig @@ -35,6 +35,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_BMP=y @@ -51,6 +52,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig index 66aab79..73241ae 100644 --- a/configs/theadorable-x86-conga-qa3-e3845_defconfig +++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig @@ -34,6 +34,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_BMP=y @@ -50,6 +51,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig index 2f87c08..9dd2d4f 100644 --- a/configs/theadorable-x86-dfi-bt700_defconfig +++ b/configs/theadorable-x86-dfi-bt700_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_PART=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set CONFIG_CMD_PING=y CONFIG_CMD_BMP=y @@ -48,6 +49,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="bzImage" CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 1c3dbe4..3b841b0 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -51,6 +51,8 @@ CONFIG_EFI_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_SPI_MAX_HZ=50000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_SATA_MV=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 1e1d19e..4e22290 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -28,6 +28,9 @@ CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc><Esc>\" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" +CONFIG_BOOT_RETRY=y +CONFIG_BOOT_RETRY_TIME=60 +CONFIG_RESET_TO_RETRY=y CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set @@ -71,6 +74,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_SPL_DM=y # CONFIG_SPL_BLK is not set diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index 9631395..703f9fd 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -52,6 +52,7 @@ CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_VERSION_VARIABLE=y +CONFIG_NET_RETRY_COUNT=10 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_DM=y CONFIG_DM_I2C=y diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index 64eb766..211acc7 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -9,7 +9,6 @@ CONFIG_TIMESTAMP=y CONFIG_FIT_SIGNATURE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" -CONFIG_MISC_INIT_F=y # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 117a545..17aab86 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" @@ -16,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y @@ -24,6 +24,7 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=0 CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index ecdbbcb..4edd6ed 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" @@ -16,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y @@ -24,6 +24,7 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=0 CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index ce6e1e2..56a791a 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -5,8 +5,6 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_ENV_SIZE=0x8000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" @@ -16,6 +14,8 @@ CONFIG_DEBUG_UART_BASE=0xe0000000 CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" CONFIG_DEBUG_UART=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x18000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y @@ -24,6 +24,7 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_BOOTDELAY=0 CONFIG_BOOTCOMMAND="if mmcinfo; then if fatload mmc 0 0x1900000 ${bootscript}; then source 0x1900000; fi; fi; run $modeboot" CONFIG_USE_PREBOOT=y +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000 diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 6a37554..e1c7c45 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0xe0000000 CONFIG_SYS_MALLOC_LEN=0x3200000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_ENV_SIZE=0x2a00000 CONFIG_DEFAULT_DEVICE_TREE="total_compute" +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x90000000 diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 5de4ada..848895e 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -2,12 +2,12 @@ CONFIG_MIPS=y CONFIG_SYS_TEXT_BASE=0xA1000000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_SYS_MEMTEST_START=0x80100000 -CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_ENV_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_ARCH_ATH79=y CONFIG_BOARD_TPLINK_WDR4300=y +CONFIG_SYS_MEMTEST_START=0x80100000 +CONFIG_SYS_MEMTEST_END=0x83f00000 CONFIG_SYS_LOAD_ADDR=0xa1000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig index 3e386c2..81c30c6 100644 --- a/configs/tqma6dl_mba6_mmc_defconfig +++ b/configs/tqma6dl_mba6_mmc_defconfig @@ -36,6 +36,9 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig index 304d139..25f231c 100644 --- a/configs/tqma6dl_mba6_spi_defconfig +++ b/configs/tqma6dl_mba6_spi_defconfig @@ -40,6 +40,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index b4203da..b838858 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -36,6 +36,9 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 8d96c60..a3bca13 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -40,6 +40,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 566ecc0..b41ace3 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -36,6 +36,9 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 78b978f..b9a3fac 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -40,6 +40,9 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" +CONFIG_ARP_TIMEOUT=200 CONFIG_BOUNCE_BUFFER=y CONFIG_I2C_SET_DEFAULT_BUS_NUM=y CONFIG_SYS_I2C_MXC=y diff --git a/configs/tuge1_defconfig b/configs/tuge1_defconfig index 6078b46..e4b4afc 100644 --- a/configs/tuge1_defconfig +++ b/configs/tuge1_defconfig @@ -138,6 +138,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -150,6 +151,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 84a0b4c..27bf740 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -53,6 +53,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SCSI_AHCI=y CONFIG_AHCI_PCI=y CONFIG_BUTTON=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 5b1fdbf..17c0136 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -8,8 +8,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x00800000 -CONFIG_SYS_MEMTEST_END=0x00ffffff CONFIG_TARGET_TURRIS_OMNIA=y CONFIG_DDR_RESET_ON_TRAINING_FAILURE=y CONFIG_ENV_SIZE=0x10000 @@ -25,6 +23,8 @@ CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y +CONFIG_SYS_MEMTEST_START=0x00800000 +CONFIG_SYS_MEMTEST_END=0x00ffffff CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_FIT=y @@ -62,6 +62,8 @@ CONFIG_CMD_FS_UUID=y # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_AHCI_PCI=y CONFIG_AHCI_MVEBU=y diff --git a/configs/tuxx1_defconfig b/configs/tuxx1_defconfig index cc9bbab..0a2c36c 100644 --- a/configs/tuxx1_defconfig +++ b/configs/tuxx1_defconfig @@ -160,6 +160,7 @@ CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10 CONFIG_CMD_I2C=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_JFFS2=y @@ -172,6 +173,8 @@ CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR=0xF00C0000 CONFIG_ENV_ADDR_REDUND=0xF00E0000 +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="UEC0" CONFIG_VERSION_VARIABLE=y CONFIG_BOOTCOUNT_LIMIT=y CONFIG_DM_BOOTCOUNT=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index b5f2115..4bd5ec3 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -48,6 +48,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_AHCI_MVEBU=y CONFIG_CLK=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index 304d6a8..3c9fee3 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -38,6 +38,8 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index 87eb939..0bedfe1 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -39,6 +39,8 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_DOS_PARTITION is not set # CONFIG_SPL_EFI_PARTITION is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="zImage" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig index b9e2d9b..8269aab 100644 --- a/configs/uniphier_v8_defconfig +++ b/configs/uniphier_v8_defconfig @@ -34,6 +34,8 @@ CONFIG_MTDIDS_DEFAULT="nand0=uniphier-nand.0" CONFIG_MTDPARTS_DEFAULT="mtdparts=uniphier-nand.0:1m(firmware),-(UBI)" CONFIG_CMD_UBI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="Image" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig index 5792d78..9db7b1e 100644 --- a/configs/usb_a9263_dataflash_defconfig +++ b/configs/usb_a9263_dataflash_defconfig @@ -13,7 +13,6 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="usb_a9263" CONFIG_SYS_LOAD_ADDR=0x22000000 -CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH" CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock1 mtdparts=mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2) rw rootfstype=jffs2" @@ -30,12 +29,14 @@ CONFIG_CMD_NAND=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_PING=y CONFIG_MTDPARTS_DEFAULT="mtdparts=atmel_nand:16m(kernel)ro,120m(root1),-(root2)" CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_MAX_HZ=15000000 CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_AT91=y @@ -49,6 +50,7 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_DATAFLASH=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y CONFIG_DM_SERIAL=y diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig index 727720c..e6fc4a6 100644 --- a/configs/usbarmory_defconfig +++ b/configs/usbarmory_defconfig @@ -3,8 +3,6 @@ CONFIG_ARCH_MX5=y CONFIG_SYS_TEXT_BASE=0x77800000 CONFIG_SYS_MALLOC_LEN=0xa00000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x70000000 -CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x60000 CONFIG_TARGET_USBARMORY=y @@ -13,6 +11,8 @@ CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx53-usbarmory" # CONFIG_CMD_BMODE is not set +CONFIG_SYS_MEMTEST_START=0x70000000 +CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x72000000 CONFIG_BOOTCOMMAND="run distro_bootcmd; setenv bootargs console=${console} ${bootargs_default}; ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; bootz ${kernel_addr_r} - ${fdt_addr_r}" diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig index bcca038..187402a 100644 --- a/configs/variscite_dart6ul_defconfig +++ b/configs/variscite_dart6ul_defconfig @@ -33,6 +33,8 @@ CONFIG_CMD_CACHE=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_DM_I2C_GPIO=y CONFIG_SYS_I2C_MXC=y CONFIG_MISC=y diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index f2da12e..5b7d689 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -6,8 +6,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x10000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SYS_MEMTEST_START=0x40000000 -CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y @@ -18,6 +16,8 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y +CONFIG_SYS_MEMTEST_START=0x40000000 +CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_FIT=y @@ -64,6 +64,8 @@ CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 4c28f7f..efbda20 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -6,8 +6,6 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x40000000 -CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_SYS_I2C_MXC_I2C1=y @@ -24,7 +22,10 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 +CONFIG_SYS_MEMTEST_START=0x40000000 +CONFIG_SYS_MEMTEST_END=0x80000000 CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x43500000 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -76,6 +77,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=2 CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="eth0" CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index e02124c..374fa32 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -1,54 +1,30 @@ CONFIG_ARM=y -CONFIG_TARGET_VEXPRESS64_JUNO=y -CONFIG_SYS_TEXT_BASE=0xe0000000 -CONFIG_SYS_MALLOC_LEN=0x810000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xff000000 -CONFIG_ENV_SIZE=0x10000 -CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="juno-r2" CONFIG_IDENT_STRING=" vexpress_aemv8a" -CONFIG_DISTRO_DEFAULTS=y +CONFIG_TARGET_VEXPRESS64_JUNO=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200n8 root=/dev/sda2 rw rootwait earlycon=pl011,0x7ff80000 debug user_debug=31 androidboot.hardware=juno loglevel=9" # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " -# CONFIG_CMD_CONSOLE is not set -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y -# CONFIG_CMD_LOADS is not set CONFIG_CMD_PCI=y CONFIG_CMD_SATA=y -CONFIG_CMD_USB=y -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y -# CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xBFC0000 -CONFIG_SATA_SIL=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_SMC911X=y -CONFIG_SMC911X_32_BIT=y +CONFIG_DM_ETH=y CONFIG_PCI=y -CONFIG_PCIE_ECAM_GENERIC=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_GENERIC=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB=y diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index 448d012..eca6176 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,50 +1,27 @@ CONFIG_ARM=y # CONFIG_ARM64_CRC32 is not set -CONFIG_TARGET_VEXPRESS64_BASE_FVP=y -CONFIG_SYS_TEXT_BASE=0x88000000 -CONFIG_SYS_MALLOC_LEN=0x840000 -CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="fvp-base-revc" +CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 -CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_SECT_SIZE=0x40000 -CONFIG_IDENT_STRING=" vexpress_aemv8a" -CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y -CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9" -CONFIG_BOOTCOMMAND="if smhload ${boot_name} ${boot_addr_r}; then setenv bootargs; abootimg addr ${boot_addr_r}; abootimg get dtb --index=0 fdt_addr_r; bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r}; else; setenv fdt_high 0xffffffffffffffff; setenv initrd_high 0xffffffffffffffff; smhload ${kernel_name} ${kernel_addr_r}; smhload ${fdtfile} ${fdt_addr_r}; smhload ${ramdisk_name} ${ramdisk_addr_r} ramdisk_end; fdt addr ${fdt_addr_r}; fdt resize; fdt chosen ${ramdisk_addr_r} ${ramdisk_end}; booti $kernel_addr_r - $fdt_addr_r; fi" # CONFIG_DISPLAY_CPUINFO is not set -# CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SYS_PROMPT="VExpress64# " -# CONFIG_CMD_CONSOLE is not set CONFIG_CMD_ABOOTIMG=y -# CONFIG_CMD_XIMG is not set -# CONFIG_CMD_EDITENV is not set CONFIG_CMD_MEMTEST=y CONFIG_CMD_ARMFLASH=y -# CONFIG_CMD_LOADS is not set -# CONFIG_CMD_ITEST is not set -# CONFIG_CMD_SETEXPR is not set -# CONFIG_CMD_NFS is not set +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_CACHE=y -# CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y -# CONFIG_ISO_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0xFFC0000 -CONFIG_DM=y # CONFIG_MMC is not set CONFIG_MTD=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y -CONFIG_DM_SERIAL=y -CONFIG_OF_LIBFDT=y +CONFIG_VIRTIO_MMIO=y diff --git a/configs/vexpress_aemv8r_defconfig b/configs/vexpress_aemv8r_defconfig new file mode 100644 index 0000000..612797e --- /dev/null +++ b/configs/vexpress_aemv8r_defconfig @@ -0,0 +1,14 @@ +CONFIG_ARM=y +CONFIG_ARCH_VEXPRESS64=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_DEFAULT_DEVICE_TREE="arm_fvp" +CONFIG_IDENT_STRING=" vexpress_aemv8r64" +CONFIG_TARGET_VEXPRESS64_BASER_FVP=y +CONFIG_REMAKE_ELF=y +CONFIG_BOOTDELAY=3 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x9c090000 rootfstype=ext4 root=/dev/vda2 rw rootwait" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SYS_PROMPT="VExpress64# " +# CONFIG_MMC is not set +CONFIG_VIRTIO_MMIO=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index dfcaafb..ca7aef6 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -9,6 +9,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vexpress-v2p-ca9" CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x90000000 +CONFIG_SYS_MONITOR_BASE=0x40000000 CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -22,6 +23,7 @@ CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" CONFIG_CMD_MMC=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_BOOTFILESIZE=y # CONFIG_CMD_NFS is not set # CONFIG_CMD_SLEEP is not set CONFIG_CMD_UBI=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index 2fb69c1..787ce4d 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -5,14 +5,14 @@ CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80010000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" +CONFIG_SYS_MEMTEST_START=0x80010000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -53,6 +53,7 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_DM_SERIAL=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index 6af2839..0063575 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -5,14 +5,14 @@ CONFIG_ARCH_VF610=y CONFIG_SYS_TEXT_BASE=0x3f401000 CONFIG_SYS_MALLOC_LEN=0x0220000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80010000 -CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x180000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="vf610-twr" +CONFIG_SYS_MEMTEST_START=0x80010000 +CONFIG_SYS_MEMTEST_END=0x87c00000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -53,6 +53,7 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y CONFIG_FEC_MXC=y CONFIG_MII=y CONFIG_DM_SERIAL=y diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 52d5506..2eb2282 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -28,12 +28,14 @@ CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=20 CONFIG_AT91_GPIO=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_GENERIC_ATMEL_MCI=y @@ -43,6 +45,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_ETH_DESIGNWARE=y CONFIG_MACB=y +CONFIG_RMII=y CONFIG_ATMEL_USART=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig index 097fbc5..57fd337 100644 --- a/configs/vining_2000_defconfig +++ b/configs/vining_2000_defconfig @@ -64,6 +64,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_PART=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y +CONFIG_USE_ETHPRIME=y +CONFIG_ETHPRIME="FEC" CONFIG_BOUNCE_BUFFER=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index 8deee6d..306c7a4 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2300000 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y @@ -10,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="imx7s-warp" CONFIG_TARGET_WARP7=y CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_HAB=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index a76565e..5f4f8d0 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -2,8 +2,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_SYS_MALLOC_LEN=0x2300000 CONFIG_NR_DRAM_BANKS=1 -CONFIG_SYS_MEMTEST_START=0x80000000 -CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_DM_GPIO=y @@ -15,6 +13,8 @@ CONFIG_ARMV7_BOOT_SEC_DEFAULT=y CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y CONFIG_IMX_HAB=y +CONFIG_SYS_MEMTEST_START=0x80000000 +CONFIG_SYS_MEMTEST_END=0xa0000000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 8b21dc2..83ff910 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -45,7 +45,10 @@ CONFIG_CMD_DATE=y CONFIG_DOS_PARTITION=y CONFIG_ENV_IS_IN_NAND=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_LPC32XX_GPIO=y CONFIG_SYS_I2C_LEGACY=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index b12f492..d042134 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -50,6 +50,8 @@ CONFIG_CMD_MTDPARTS=y CONFIG_CMD_UBI=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_ADDR=0x100000 +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 CONFIG_SPL_OF_TRANSLATE=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MVTWSI=y diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 79bcbf8..2deaf0a 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -5,13 +5,13 @@ CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x2000 CONFIG_NR_DRAM_BANKS=3 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_COUNTER_FREQUENCY=100000000 # CONFIG_PSCI_RESET is not set +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -23,6 +23,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index b1a90bb..6506dfd 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 8f90db4..7d6eb7f 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index adc30a7..c9a710c 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -4,13 +4,13 @@ CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_ARCH_VERSAL=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_CMD_FRU=y CONFIG_DEFINE_TCM_OCM_MMAP=y CONFIG_COUNTER_FREQUENCY=100000000 +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -20,6 +20,7 @@ CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=5 CONFIG_USE_PREBOOT=y CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_CLOCKS=y CONFIG_SYS_PROMPT="Versal> " CONFIG_CMD_BOOTMENU=y CONFIG_CMD_NVEDIT_EFI=y @@ -35,6 +36,8 @@ CONFIG_CMD_MMC=y CONFIG_CMD_MTD=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y @@ -53,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y CONFIG_IP_DEFRAG=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_CLK_VERSAL=y CONFIG_DFU_TIMEOUT=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 9122b24..eeb2f78 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -3,8 +3,6 @@ CONFIG_SPL_SYS_DCACHE_OFF=y CONFIG_SYS_L2CACHE_OFF=y CONFIG_ARCH_ZYNQ=y CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_OFFSET=0xE00000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" @@ -12,6 +10,8 @@ CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SPL=y CONFIG_CMD_FRU=y CONFIG_CMD_ZYNQ_AES=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_CUSTOM_LDSCRIPT=y @@ -27,6 +27,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 CONFIG_LEGACY_IMAGE_FORMAT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y @@ -50,6 +51,7 @@ CONFIG_CMD_NAND_LOCK_UNLOCK=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set +CONFIG_BOOTP_MAY_FAIL=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y @@ -70,6 +72,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_DFU_TIMEOUT=y CONFIG_DFU_MMC=y diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index d96f1b3..5592d91 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -4,19 +4,20 @@ CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1a00 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_PSU_INIT_ENABLED=y # CONFIG_CMD_ZYNQMP is not set +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 847aac2..274604a 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -21,6 +21,7 @@ CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_CMD_BDI is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 64eda41..3a86024 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -21,6 +21,7 @@ CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_CMD_BDI is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 57131f6..0ccc45f 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 1e45c34..db65918 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -18,6 +18,7 @@ CONFIG_SUPPORT_RAW_INITRD=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 1a25fd2..638aa16 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_LOAD_ADDR=0x8000000 # CONFIG_AUTOBOOT is not set # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set # CONFIG_SYS_LONGHELP is not set diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 976cb02..3e6b1ec 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -4,8 +4,6 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_LEN=0x4040000 CONFIG_SYS_MALLOC_F_LEN=0x8000 -CONFIG_SYS_MEMTEST_START=0x00000000 -CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" CONFIG_SPL_STACK_R_ADDR=0x18000000 @@ -19,6 +17,8 @@ CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 CONFIG_CMD_FRU=y CONFIG_ZYNQMP_USB=y CONFIG_AHCI=y +CONFIG_SYS_MEMTEST_START=0x00000000 +CONFIG_SYS_MEMTEST_END=0x00001000 CONFIG_DISTRO_DEFAULTS=y CONFIG_REMAKE_ELF=y CONFIG_SYS_LOAD_ADDR=0x8000000 @@ -30,6 +30,7 @@ CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run scsi_init;usb start" CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_FPGA=y CONFIG_SPL_OS_BOOT=y @@ -64,6 +65,8 @@ CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_WDT=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_TFTPPUT=y CONFIG_CMD_BMP=y CONFIG_CMD_CACHE=y @@ -82,7 +85,7 @@ CONFIG_CMD_UBI=y CONFIG_PARTITION_TYPE_GUID=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_BOARD=y -CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1 zynqmp-sm-k26-revA zynqmp-smk-k26-revA zynqmp-dlc21-revA" +CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu106-rev1.0 zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA zynqmp-topic-miamimp-xilinx-xdp-v1r1 zynqmp-sm-k26-revA zynqmp-smk-k26-revA zynqmp-dlc21-revA" CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent interrupts iommus power-domains" CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_FAT=y @@ -93,6 +96,7 @@ CONFIG_ENV_FAT_DEVICE_AND_PART=":auto" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_NETCONSOLE=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SATA=y CONFIG_SCSI_AHCI=y diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index 1c8d57b..ff3f260 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_XTFPGA_KC705=y CONFIG_SYS_LOAD_ADDR=0x02000000 +CONFIG_SYS_MONITOR_BASE=0xF6000000 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_BOOTDELAY=10 @@ -24,6 +25,8 @@ CONFIG_CMD_PING=y CONFIG_CMD_DIAG=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_ADDR=0xF7FE0000 +CONFIG_USE_BOOTFILE=y +CONFIG_BOOTFILE="uImage" CONFIG_VERSION_VARIABLE=y CONFIG_DM=y # CONFIG_DM_WARN is not set diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 88e8019..358646b 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index 4e8661b..1d55d99 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -20,6 +20,7 @@ CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y # CONFIG_CMDLINE_EDITING is not set # CONFIG_AUTO_COMPLETE is not set diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 924d4b1..4482a32 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -27,6 +27,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_ARCH_EARLY_INIT_R is not set # CONFIG_BOARD_LATE_INIT is not set +CONFIG_CLOCKS=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000 diff --git a/disk/Kconfig b/disk/Kconfig index cee16a8..1370032 100644 --- a/disk/Kconfig +++ b/disk/Kconfig @@ -4,10 +4,6 @@ menu "Partition Types" config PARTITIONS bool "Enable Partition Labels (disklabels) support" default y - select SPL_SPRINTF if SPL - select TPL_SPRINTF if TPL - select SPL_STRTO if SPL - select TPL_STRTO if TPL help Partition Labels (disklabels) Supported: Zero or more of the following: @@ -23,6 +19,26 @@ config PARTITIONS you must configure support for at least one non-MTD partition type as well. +config SPL_PARTITIONS + bool "Enable Partition Labels (disklabels) support in SPL" + default y if PARTITIONS + select SPL_SPRINTF + select SPL_STRTO + help + Enable this for base partition support in SPL. The required + partition table types shold be enabled separately. This add a + small amount of size to SPL, typically 500 bytes. + +config TPL_PARTITIONS + bool "Enable Partition Labels (disklabels) support in TPL" + default y if PARTITIONS + select TPL_SPRINTF + select TPL_STRTO + help + Enable this for base partition support in SPL. The required + partition table types shold be enabled separately. This add a + small amount of size to SPL, typically 500 bytes. + config MAC_PARTITION bool "Enable Apple's MacOS partition table" depends on PARTITIONS diff --git a/disk/Makefile b/disk/Makefile index 6ce5a68..b197692 100644 --- a/disk/Makefile +++ b/disk/Makefile @@ -5,7 +5,7 @@ #ccflags-y += -DET_DEBUG -DDEBUG -obj-$(CONFIG_PARTITIONS) += part.o +obj-$(CONFIG_$(SPL_TPL_)PARTITIONS) += part.o obj-$(CONFIG_$(SPL_)MAC_PARTITION) += part_mac.o obj-$(CONFIG_$(SPL_)DOS_PARTITION) += part_dos.o obj-$(CONFIG_$(SPL_)ISO_PARTITION) += part_iso.o diff --git a/disk/part.c b/disk/part.c index 49e39a2..b95405b 100644 --- a/disk/part.c +++ b/disk/part.c @@ -455,7 +455,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, int part; struct disk_partition tmpinfo; -#ifdef CONFIG_SANDBOX +#if IS_ENABLED(CONFIG_SANDBOX) || IS_ENABLED(CONFIG_SEMIHOSTING) /* * Special-case a pseudo block device "hostfs", to allow access to the * host's own filesystem. @@ -467,7 +467,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str, info->blksz = 0; info->bootable = 0; strcpy((char *)info->type, BOOT_PART_TYPE); - strcpy((char *)info->name, "Sandbox host"); + strcpy((char *)info->name, "Host filesystem"); #if CONFIG_IS_ENABLED(PARTITION_UUIDS) info->uuid[0] = 0; #endif diff --git a/doc/README.fec_mxc b/doc/README.fec_mxc index 9ca6ac2..d17dfb6 100644 --- a/doc/README.fec_mxc +++ b/doc/README.fec_mxc @@ -7,11 +7,6 @@ CONFIG_FEC_MXC CONFIG_MII Must be defined if CONFIG_FEC_MXC is defined. -CONFIG_FEC_XCV_TYPE - Defaults to MII100 for 100 Base-tx. - RGMII selects 1000 Base-tx reduced pin count interface. - RMII selects 100 Base-tx reduced pin count interface. - CONFIG_FEC_MXC_SWAP_PACKET Forced on iff MX28. Swaps the bytes order of all words(4 byte units) in the packet. diff --git a/doc/README.semihosting b/doc/README.semihosting deleted file mode 100644 index f382d01..0000000 --- a/doc/README.semihosting +++ /dev/null @@ -1,38 +0,0 @@ -SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Broadcom Corporation. - */ - -Semihosting is ARM's way of having a real or virtual target communicate -with a host or host debugger for basic operations such as file I/O, -console I/O, etc. Please see -http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjjgij.html for more information. - -For developing on armv8 virtual fastmodel platforms, semihosting is a -valuable tool since it allows access to image/configuration files before -eMMC or other NV media are available. - -There are two main ARM virtual Fixed Virtual Platform (FVP) models, -Versatile Express (VE) FVP and BASE FVP (See -http://www.arm.com/products/tools/models/fast-models/foundation-model.php) -The initial vexpress64 u-boot board created here runs on the VE virtual -platform using the license-free Foundation_v8 simulator. Fortunately, -the Foundation_v8 simulator also supports the BASE_FVP model which -companies can purchase licenses for and contain much more functionality. -So we can, in u-boot, run either model by either using the VE FVP (default), -or turning on CONFIG_BASE_FVP for the more full featured model. - -Rather than create a new armv8 board similar to armltd/vexpress64, add -semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING -and CONFIG_BASE_FVP both set. Also reuse the existing board config file -vexpress_aemv8.h but differentiate the two models by the presence or -absence of CONFIG_BASE_FVP. This change is tested and works on both the -Foundation and Base fastmodel simulators. - -The semihosting code adds a command: - - smhload <image> <address> [env var] - -That will load an image from the host filesystem into RAM at the specified -address and optionally store the load end address in the specified -environment variable. diff --git a/doc/arch/arm64.rst b/doc/arch/arm64.rst index 80498f6..7c07135 100644 --- a/doc/arch/arm64.rst +++ b/doc/arch/arm64.rst @@ -18,7 +18,8 @@ Notes classical firmware (like initial hardware setup, CPU errata workarounds or SMP bringup). U-Boot can be entered in EL2 when its main purpose is that of a boot loader. It can drop to lower exception levels before - entering the OS. + entering the OS. For ARMv8-R it is recommened to enter at S-EL1, as for this + architecture there is no S-EL3. 2. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc use rela relocation format, a tool(tools/relocate-rela) by Scott Wood diff --git a/doc/board/armltd/vexpress64.rst b/doc/board/armltd/vexpress64.rst index d87b1c3..a7f771d 100644 --- a/doc/board/armltd/vexpress64.rst +++ b/doc/board/armltd/vexpress64.rst @@ -6,6 +6,7 @@ Arm Versatile Express The vexpress_* board configuration supports the following platforms: * FVP_Base_RevC-2xAEMvA + * FVP_BaseR_AEMv8R * Juno development board Fixed Virtual Platforms diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst index 6395628..4514b89 100644 --- a/doc/board/nxp/index.rst +++ b/doc/board/nxp/index.rst @@ -13,6 +13,7 @@ NXP Semiconductors imx8qxp_mek imxrt1020-evk imxrt1050-evk + ls1046ardb mx6sabreauto mx6sabresd mx6ul_14x14_evk diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst new file mode 100644 index 0000000..35465d0 --- /dev/null +++ b/doc/board/nxp/ls1046ardb.rst @@ -0,0 +1,193 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +LS1046ARDB +========== + +The LS1046A Reference Design Board (RDB) is a high-performance computing, +evaluation, and development platform that supports the QorIQ LS1046A +LayerScape Architecture processor. The LS1046ARDB provides SW development +platform for the Freescale LS1046A processor series, with a complete +debugging environment. The LS1046A RDB is lead-free and RoHS-compliant. + +LS1046A SoC Overview +-------------------- +Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A +SoC overview. + +LS1046ARDB board Overview +------------------------- +- SERDES1 Connections, 4 lanes supporting: + + - Lane0: 10GBase-R with x1 RJ45 connector + - Lane1: 10GBase-R Cage + - Lane2: SGMII.5 + - Lane3: SGMII.6 + +- SERDES2 Connections, 4 lanes supporting: + + - Lane0: PCIe1 with miniPCIe slot + - Lane1: PCIe2 with PCIe x2 slot + - Lane2: PCIe3 with PCIe x4 slot + - Lane3: SATA + +- DDR Controller + + - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s + +- IFC/Local Bus + + - One 512 MB NAND flash with ECC support + - CPLD connection + +- USB 3.0 + + - one Type A port, one Micro-AB port + +- SDHC: connects directly to a full SD/MMC slot +- DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz) +- 4 I2C controllers +- UART + + - Two 4-pin serial ports at up to 115.2 Kbit/s + - Two DB9 D-Type connectors supporting one Serial port each + +- ARM JTAG support + +Memory map from core's view +---------------------------- + +================== ================== ================ ===== +Start Address End Address Description Size +================== ================== ================ ===== +``0x00_0000_0000`` ``0x00_000F_FFFF`` Secure Boot ROM 1M +``0x00_0100_0000`` ``0x00_0FFF_FFFF`` CCSRBAR 240M +``0x00_1000_0000`` ``0x00_1000_FFFF`` OCRAM0 64K +``0x00_1001_0000`` ``0x00_1001_FFFF`` OCRAM1 64K +``0x00_2000_0000`` ``0x00_20FF_FFFF`` DCSR 16M +``0x00_7E80_0000`` ``0x00_7E80_FFFF`` IFC - NAND Flash 64K +``0x00_7FB0_0000`` ``0x00_7FB0_0FFF`` IFC - CPLD 4K +``0x00_8000_0000`` ``0x00_FFFF_FFFF`` DRAM1 2G +``0x05_0000_0000`` ``0x05_07FF_FFFF`` QMAN S/W Portal 128M +``0x05_0800_0000`` ``0x05_0FFF_FFFF`` BMAN S/W Portal 128M +``0x08_8000_0000`` ``0x09_FFFF_FFFF`` DRAM2 6G +``0x40_0000_0000`` ``0x47_FFFF_FFFF`` PCI Express1 32G +``0x48_0000_0000`` ``0x4F_FFFF_FFFF`` PCI Express2 32G +``0x50_0000_0000`` ``0x57_FFFF_FFFF`` PCI Express3 32G +================== ================== ================ ===== + +QSPI flash map +-------------- + +================== ================== ================== ===== +Start Address End Address Description Size +================== ================== ================== ===== +``0x00_4000_0000`` ``0x00_400F_FFFF`` RCW + PBI 1M +``0x00_4010_0000`` ``0x00_402F_FFFF`` U-Boot 2M +``0x00_4030_0000`` ``0x00_403F_FFFF`` U-Boot Env 1M +``0x00_4040_0000`` ``0x00_405F_FFFF`` PPA 2M +``0x00_4060_0000`` ``0x00_408F_FFFF`` Secure boot header 3M + + bootscript +``0x00_4090_0000`` ``0x00_4093_FFFF`` FMan ucode 256K +``0x00_4094_0000`` ``0x00_4097_FFFF`` QE/uQE firmware 256K +``0x00_4098_0000`` ``0x00_40FF_FFFF`` Reserved 6M +``0x00_4100_0000`` ``0x00_43FF_FFFF`` FIT Image 48M +================== ================== ================== ===== + +Booting Options +--------------- + +NB: The reference manual documents the RCW source with the *least-significant +bit first*. + +QSPI boot +^^^^^^^^^ + +This is the default. ``{ SW5[0:8], SW4[0] }`` should be ``0010_0010_0``. + +SD boot and eMMC boot +^^^^^^^^^^^^^^^^^^^^^ + +``{ SW5[0:8], SW4[0] }`` should be ``0010_0000_0``. eMMC is selected only if +there is no SD card in the slot. + +.. _ls1046ardb_jtag: + +JTAG boot +^^^^^^^^^ + +To recover a bricked board, or to perform initial programming, the ls1046 +supports using two hard-coded Reset Configuration Words (RCWs). Unfortunately, +this configuration disables most functionality, including the uarts and ethernet. +However, the SD/MMC and flash controllers are still functional. To get around +the lack of a serial console, we will use ARM semihosting instead. When +enabled, OpenOCD will interpret certain instructions as calls to the host +operating system. This allows U-Boot to use the console, read/write files, or +run arbitrary commands (!). + +When configuring U-Boot, ensure that ``CONFIG_SEMIHOSTING``, +``CONFIG_SPL_SEMIHOSTING``, and ``CONFIG_SEMIHOSTING_SERIAL`` are enabled. +``{ SW5[0:8], SW4[0] }`` should be ``0100_1111_0``. Additionally, ``SW4[7]`` +should be set to ``0``. Connect to the "console" USB connector on the front of +the enclosure. + +Create a new file called ``u-boot.tcl`` (or whatever you choose) with the +following contents:: + + # Load the configuration for the LS1046ARDB + source [find board/nxp_rdb-ls1046a.cfg] + # Initialize the scan chain + init + # Stop the processor + halt + # Enable semihosting + arm semihosting enable + # Load U-Boot SPL + load_image spl/u-boot-spl 0 elf + # Start executing SPL at the beginning of OCRAM + resume 0x10000000 + +Then, launch openocd like:: + + openocd -f u-boot.tcl + +You should see the U-boot SPL banner followed by the banner for U-Boot proper +in the output of openocd. The CMSIS-DAP adapter is slow, so this can take a +long time. If you don't see it, something has gone wrong. After a while, you +should see the prompt. You can load an image using semihosting by running:: + + => load hostfs - $loadaddr <name of file> + +Note that openocd's terminal is "cooked," so commands will only be sent to +U-Boot when you press enter, and all commands will be echoed twice. +Additionally, openocd will block when waiting for input, ignoring gdb, JTAG +events, and Ctrl-Cs. To make openocd process these events, just hit enter. + +Using an external JTAG adapter +"""""""""""""""""""""""""""""" + +The CMSIS-DAP adapter can be rather slow. To speed up booting, use an external +JTAG adapter. The following examples assume you are using a J-Link, though any +adapter supported by OpenOCD will do. Ensure that ``SW4[7]`` is ``1``. Attach +your jtag adapter to J22. Modify ``u-boot.tcl`` and replace the first two lines +with the following:: + + # Load the J-Link configuration (or whatever your adapter is) + source [find interface/jlink.cfg] + # Use JTAG, since the J-Link also supports SWD + transport select jtag + # The reset pin resets the whole CPU + reset_config srst_only + # Load the LS1046A config + source [find target/ls1046a.cfg] + +You can proceed as normal through the rest of the steps above. I got a speedup +of around 100x by using a J-Link. + +Debug UART +---------- + +To enable the debug UART, enable the following config options:: + + CONFIG_DEBUG_UART_NS16550=y + CONFIG_DEBUG_UART_BASE=0x21c0500 + CONFIG_DEBUG_UART_CLOCK=300000000 diff --git a/doc/develop/event.rst b/doc/develop/event.rst new file mode 100644 index 0000000..6951ec9 --- /dev/null +++ b/doc/develop/event.rst @@ -0,0 +1,66 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Events +====== + +U-Boot supports a way for various events to be handled by interested +subsystems. This provide a generic way to handle 'hooks' like setting up the +CPUs after driver model is active, or reading a partition table after a new +block device is probed. + +Rather than using weak functions and direct calls across subsystemss, it is +often easier to use an event. + +An event consists of a type (e.g. EVT_DM_POST_INIT) and some optional data, +in `union event_data`. An event spy can be creasted to watch for events of a +particular type. When the event is created, it is sent to each spy in turn. + + +Declaring a spy +--------------- + +To declare a spy, use something like this:: + + static int snow_setup_cpus(void *ctx, struct event *event) + { + /* do something */ + return 0; + } + EVENT_SPY(EVT_DM_POST_INIT, snow_setup_cpus); + +Your function is called when EVT_DM_POST_INIT is emitted, i.e. after driver +model is inited (in SPL, or in U-Boot proper before and after relocation). + + +Debugging +--------- + +To assist with debugging events, enable `CONFIG_EVENT_DEBUG` and +`CONFIG_CMD_EVENT`. The :doc:`../usage/cmd/event` command can then be used to +provide a spy list. + +It is also possible to list spy information from the U-Boot executable,, using +the `event_dump.py` script:: + + $ scripts/event_dump.py /tmp/b/sandbox/u-boot + Event type Id Source location + -------------------- ------------------------------ ------------------------------ + EVT_MISC_INIT_F f:sandbox_misc_init_f arch/sandbox/cpu/start.c:125 + +This shows each event spy in U-Boot, along with the event type, function name +(or ID) and source location. + +Note that if `CONFIG_EVENT_DEBUG` is not enabled, the event ID is missing, so +the function is shown instead (with an `f:` prefix as above). Since the ID is +generally the same as the function name, this does not matter much. + +The event type is decoded by the symbol used by U-Boot for the event linker +list. Symbols have the form:: + + _u_boot_list_2_evspy_info_2_EVT_MISC_INIT_F + +so the event type can be read from the end. To manually list spy information +in an image, use $(CROSS_COMPILE)nm:: + + nm u-boot |grep evspy |grep list + 00000000002d6300 D _u_boot_list_2_evspy_info_2_EVT_MISC_INIT_F diff --git a/doc/develop/index.rst b/doc/develop/index.rst index 93ebfa4..2e6d6c3 100644 --- a/doc/develop/index.rst +++ b/doc/develop/index.rst @@ -17,6 +17,7 @@ Implementation distro driver-model/index environment + event global_data logging makefiles diff --git a/doc/develop/python_cq.rst b/doc/develop/python_cq.rst index 3f99f1d..1e209ff 100644 --- a/doc/develop/python_cq.rst +++ b/doc/develop/python_cq.rst @@ -77,4 +77,15 @@ If the pylint version is updated in CI, this may result in needing to regenerate `scripts/pylint.base`. +Checking for errors +------------------- + +If you only want to check for pylint errors, use:: + + PYTHONPATH=/path/to/scripts/dtc/pylibfdt/ make pylint_err + +This will show only pylint errors. Note that you must set PYTHONPATH to point +to the pylibfdt directory build by U-Boot (typically the sandbox_spl board). If +you have used `make qcheck` then it sill be in `board-sandbox_spl`. + .. _`PEP 8`: https://www.python.org/dev/peps/pep-0008/ diff --git a/doc/device-tree-bindings/arm/arm,scmi.txt b/doc/device-tree-bindings/arm/arm,scmi.txt index 92572ea..0a7886d 100644 --- a/doc/device-tree-bindings/arm/arm,scmi.txt +++ b/doc/device-tree-bindings/arm/arm,scmi.txt @@ -1,234 +1,2 @@ -System Control and Management Interface (SCMI) Message Protocol ----------------------------------------------------------- - -The SCMI is intended to allow agents such as OSPM to manage various functions -that are provided by the hardware platform it is running on, including power -and performance functions. - -This binding is intended to define the interface the firmware implementing -the SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control -and Management Interface Platform Design Document")[0] provide for OSPM in -the device tree. - -Required properties: - -The scmi node with the following properties shall be under the /firmware/ node. - -- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports, - or "linaro,scmi-optee" for OP-TEE transport. -- mboxes: List of phandle and mailbox channel specifiers. It should contain - exactly one or two mailboxes, one for transmitting messages("tx") - and another optional for receiving the notifications("rx") if - supported. -- shmem : List of phandle pointing to the shared memory(SHM) area as per - generic mailbox client binding. -- #address-cells : should be '1' if the device has sub-nodes, maps to - protocol identifier for a given sub-node. -- #size-cells : should be '0' as 'reg' property doesn't have any size - associated with it. -- arm,smc-id : SMC id required when using smc or hvc transports -- linaro,optee-channel-id : Channel specifier required when using OP-TEE - transport. - -Optional properties: - -- mbox-names: shall be "tx" or "rx" depending on mboxes entries. - -See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details -about the generic mailbox controller and client driver bindings. -Mailbox doorbell is used as a mechanism to alert the presence of a -messages and/or notification. - -Each protocol supported shall have a sub-node with corresponding compatible -as described in the following sections. If the platform supports dedicated -communication channel for a particular protocol, properties shall be present -in the sub-node corresponding to that protocol. These properties are: -- mboxes, mbox-names and shmem for mailbox transport -- arm,smc-id and shmem for smc/hvc transport -- linaro,optee-channel-id and possibly shmem for OP-TEE transport - -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol ------------------------------------------------------------- - -This binding uses the common clock binding[1]. - -Required properties: -- #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. - -Power domain bindings for the power domains based on SCMI Message Protocol ------------------------------------------------------------- - -This binding for the SCMI power domain providers uses the generic power -domain binding[2]. - -Required properties: - - #power-domain-cells : Should be 1. Contains the device or the power - domain ID value used by SCMI commands. - -Regulator bindings for the SCMI Regulator based on SCMI Message Protocol ------------------------------------------------------------- -An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain, -and should be always positioned as a root regulator. -It does not support any current operation. - -SCMI Regulators are grouped under a 'regulators' node which in turn is a child -of the SCMI Voltage protocol node inside the desired SCMI instance node. - -This binding uses the common regulator binding[6]. - -Required properties: - - reg : shall identify an existent SCMI Voltage Domain. - -Sensor bindings for the sensors based on SCMI Message Protocol --------------------------------------------------------------- -SCMI provides an API to access the various sensors on the SoC. - -Required properties: -- #thermal-sensor-cells: should be set to 1. This property follows the - thermal device tree bindings[3]. - - Valid cell values are raw identifiers (Sensor ID) - as used by the firmware. Refer to platform details - for your implementation for the IDs to use. - -Reset signal bindings for the reset domains based on SCMI Message Protocol ------------------------------------------------------------- - -This binding for the SCMI reset domain providers uses the generic reset -signal binding[5]. - -Required properties: - - #reset-cells : Should be 1. Contains the reset domain ID value used - by SCMI commands. - -SRAM and Shared Memory for SCMI -------------------------------- - -A small area of SRAM is reserved for SCMI communication between application -processors and SCP. - -The properties should follow the generic mmio-sram description found in [4] - -Each sub-node represents the reserved area for SCMI. - -Required sub-node properties: -- reg : The base offset and size of the reserved area with the SRAM -- compatible : should be "arm,scmi-shmem" for Non-secure SRAM based - shared memory - -[0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/power/power-domain.yaml -[3] Documentation/devicetree/bindings/thermal/thermal.txt -[4] Documentation/devicetree/bindings/sram/sram.yaml -[5] Documentation/devicetree/bindings/reset/reset.txt -[6] Documentation/devicetree/bindings/regulator/regulator.yaml - -Example: - -sram@50000000 { - compatible = "mmio-sram"; - reg = <0x0 0x50000000 0x0 0x10000>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x50000000 0x10000>; - - cpu_scp_lpri: scp-shmem@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x200>; - }; - - cpu_scp_hpri: scp-shmem@200 { - compatible = "arm,scmi-shmem"; - reg = <0x200 0x200>; - }; -}; - -mailbox@40000000 { - .... - #mbox-cells = <1>; - reg = <0x0 0x40000000 0x0 0x10000>; -}; - -firmware { - - ... - - scmi { - compatible = "arm,scmi"; - mboxes = <&mailbox 0 &mailbox 1>; - mbox-names = "tx", "rx"; - shmem = <&cpu_scp_lpri &cpu_scp_hpri>; - #address-cells = <1>; - #size-cells = <0>; - - scmi_devpd: protocol@11 { - reg = <0x11>; - #power-domain-cells = <1>; - }; - - scmi_dvfs: protocol@13 { - reg = <0x13>; - #clock-cells = <1>; - }; - - scmi_clk: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - - scmi_sensors0: protocol@15 { - reg = <0x15>; - #thermal-sensor-cells = <1>; - }; - - scmi_reset: protocol@16 { - reg = <0x16>; - #reset-cells = <1>; - }; - - scmi_voltage: protocol@17 { - reg = <0x17>; - - regulators { - regulator_devX: regulator@0 { - reg = <0x0>; - regulator-max-microvolt = <3300000>; - }; - - regulator_devY: regulator@9 { - reg = <0x9>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <4200000>; - }; - - ... - }; - }; - }; -}; - -cpu@0 { - ... - reg = <0 0>; - clocks = <&scmi_dvfs 0>; -}; - -hdlcd@7ff60000 { - ... - reg = <0 0x7ff60000 0 0x1000>; - clocks = <&scmi_clk 4>; - power-domains = <&scmi_devpd 1>; - resets = <&scmi_reset 10>; -}; - -thermal-zones { - soc_thermal { - polling-delay-passive = <100>; - polling-delay = <1000>; - /* sensor ID */ - thermal-sensors = <&scmi_sensors0 3>; - ... - }; -}; +See Binding in Linux documentation: +Documentation/devicetree/bindings/firmware/arm,scmi.yaml diff --git a/doc/usage/cmd/bootmenu.rst b/doc/usage/cmd/bootmenu.rst index 1f094ad..1016ac8 100644 --- a/doc/usage/cmd/bootmenu.rst +++ b/doc/usage/cmd/bootmenu.rst @@ -88,8 +88,3 @@ To run the bootmenu at startup add these additional settings:: CONFIG_AUTOBOOT_KEYED=y CONFIG_BOOTDELAY=30 CONFIG_AUTOBOOT_MENU_SHOW=y - -When you intend to use the bootmenu on a color frame buffer console, -make sure to additionally define:: - - CONFIG_CFB_CONSOLE_ANSI=y diff --git a/doc/usage/cmd/event.rst b/doc/usage/cmd/event.rst new file mode 100644 index 0000000..47c900d --- /dev/null +++ b/doc/usage/cmd/event.rst @@ -0,0 +1,49 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +event command +============= + +Synopsis +-------- + +:: + + event list + +Description +----------- + +The event command provides spy list. + +This shows the following information: + +Seq + Sequence number of the spy, numbered from 0 + +Type + Type of the spy, both as a number and a label. If `CONFIG_EVENT_DEBUG` is + not enabled, the label just shows `(unknown)`. + +Function + Address of the function to call + +ID + ID string for this event, if `CONFIG_EVENT_DEBUG` is enabled. Otherwise this + just shows `?`. + + +See :doc:`../../develop/event` for more information on events. + +Example +------- + +:: + + => event list + Seq Type Function ID + 0 7 misc_init_f 55a070517c68 ? + +Configuration +------------- + +The event command is only available if CONFIG_CMD_EVENT=y. diff --git a/doc/usage/index.rst b/doc/usage/index.rst index 8a54d9c..f457bff 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -11,6 +11,7 @@ Use U-Boot netconsole partitions cmdline + semihosting Shell commands -------------- @@ -29,6 +30,7 @@ Shell commands cmd/cbsysinfo cmd/conitrace cmd/echo + cmd/event cmd/exception cmd/extension cmd/exit diff --git a/doc/usage/semihosting.rst b/doc/usage/semihosting.rst new file mode 100644 index 0000000..6a280b4 --- /dev/null +++ b/doc/usage/semihosting.rst @@ -0,0 +1,107 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright 2014 Broadcom Corporation. + +Semihosting +=========== + +Semihosting is ARM's way of having a real or virtual target communicate +with a host or host debugger for basic operations such as file I/O, +console I/O, etc. Please see `Arm's semihosting documentation +<https://developer.arm.com/documentation/100863/latest/>`_ for more +information. + +Platform Support +---------------- + +Versatile Express +^^^^^^^^^^^^^^^^^ + +For developing on armv8 virtual fastmodel platforms, semihosting is a +valuable tool since it allows access to image/configuration files before +eMMC or other NV media are available. + +There are two main ARM virtual Fixed Virtual Platform (FVP) models, +`Versatile Express (VE) FVP and BASE FVP +<http://www.arm.com/products/tools/models/fast-models/foundation-model.php>`_. +The initial vexpress64 u-boot board created here runs on the VE virtual +platform using the license-free Foundation_v8 simulator. Fortunately, +the Foundation_v8 simulator also supports the BASE_FVP model which +companies can purchase licenses for and contain much more functionality. +So we can, in U-Boot, run either model by either using the VE FVP (default), +or turning on ``CONFIG_BASE_FVP`` for the more full featured model. + +Rather than create a new armv8 board similar to ``armltd/vexpress64``, add +semihosting calls to the existing one, enabled with ``CONFIG_SEMIHOSTING`` +and ``CONFIG_BASE_FVP`` both set. Also reuse the existing board config file +vexpress_aemv8.h but differentiate the two models by the presence or +absence of ``CONFIG_BASE_FVP``. This change is tested and works on both the +Foundation and Base fastmodel simulators. + +QEMU +^^^^ + +Another ARM emulator which supports semihosting is `QEMU +<https://www.qemu.org/>`_. To enable semihosting, enable +``CONFIG_SERIAL_PROBE_ALL`` when configuring U-Boot, and use +``-semihosting`` when invoking QEMU. Adding ``-nographic`` can also be +helpful. When using a semihosted serial console, QEMU will block waiting +for input. This will cause the GUI to become unresponsive. To mitigate +this, try adding ``-nographic``. For more information about building and +running QEMU, refer to the :doc:`board documentation +<../board/emulation/qemu-arm>`. + +OpenOCD +^^^^^^^ + +Any ARM platform can use semihosting with an attached debugger. One such +debugger with good support for a variety of boards and JTAG adapters is +`OpenOCD <https://openocd.org/>`_. Semihosting is not enabled by default, +so you will need to enable it:: + + $ openocd -f <your board config> -c init -c halt -c \ + 'arm semihosting enable' -c resume + +Note that enabling semihosting can only be done after attaching to the +board with ``init``, and must be done while the CPU is halted. For a more +extended example, refer to the :ref:`LS1046ARDB docs <ls1046ardb_jtag>`. + +Loading files +------------- + +The semihosting code adds a "semihosting filesystem":: + + load hostfs - <address> <image> + +That will load an image from the host filesystem into RAM at the specified +address. If you are using U-Boot SPL, you can also use ``BOOT_DEVICE_SMH`` +which will load ``CONFIG_SPL_FS_LOAD_PAYLOAD_NAME``. + +Host console +------------ + +U-Boot can use the host's console instead of a physical serial device by +enabling ``CONFIG_SERIAL_SEMIHOSTING``. If you don't have +``CONFIG_DM_SERIAL`` enabled, make sure you disable any other serial +drivers. + +Migrating from ``smhload`` +-------------------------- + +If you were using the ``smhload`` command, you can migrate commands like:: + + smhload <file> <address> [<end var>] + +to a generic load command like:: + + load hostfs - <address> <file> + +The ``load`` command will set the ``filesize`` variable with the size of +the file. The ``fdt chosen`` command has been updated to take a size +instead of an end address. If you were adding the initramfs to your device +tree like:: + + fdt chosen <address> <end var> + +you can now run:: + + fdt chosen <address> $filesize diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c index bee1cd6..f9f05f4 100644 --- a/drivers/block/blk-uclass.c +++ b/drivers/block/blk-uclass.c @@ -712,7 +712,7 @@ int blk_unbind_all(int if_type) static int blk_post_probe(struct udevice *dev) { - if (IS_ENABLED(CONFIG_PARTITIONS) && + if (CONFIG_IS_ENABLED(PARTITIONS) && IS_ENABLED(CONFIG_HAVE_BLOCK_DEVICE)) { struct blk_desc *desc = dev_get_uclass_plat(dev); diff --git a/drivers/block/sandbox.c b/drivers/block/sandbox.c index 53925ce..1388498 100644 --- a/drivers/block/sandbox.c +++ b/drivers/block/sandbox.c @@ -125,9 +125,14 @@ int host_dev_bind(int devnum, char *filename, bool removable) fd = os_open(filename, OS_O_RDWR); if (fd == -1) { - printf("Failed to access host backing file '%s'\n", filename); - ret = -ENOENT; - goto err; + printf("Failed to access host backing file '%s', trying read-only\n", + filename); + fd = os_open(filename, OS_O_RDONLY); + if (fd == -1) { + printf("- still failed\n"); + ret = -ENOENT; + goto err; + } } ret = blk_create_device(gd->dm_root, "sandbox_host_blk", str, IF_TYPE_HOST, devnum, 512, diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 65c052f..66ce4cc 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -127,6 +127,13 @@ config DM_BOOTCOUNT_I2C_EEPROM pointing to the underlying i2c eeprom device) and an optional 'offset' property are supported. +config DM_BOOTCOUNT_PMIC_PFUZE100 + bool "Enable Bootcount driver for PMIC PFUZE100" + depends on DM_PMIC_PFUZE100 + help + Enable support for the bootcounter using PMIC PFUZE100 registers. + This works only, if the PMIC is not connected. + config DM_BOOTCOUNT_SPI_FLASH bool "Support SPI flash devices as a backing store for bootcount" depends on DM_SPI_FLASH diff --git a/drivers/bootcount/Makefile b/drivers/bootcount/Makefile index 3a784bb..b65959a 100644 --- a/drivers/bootcount/Makefile +++ b/drivers/bootcount/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_BOOTCOUNT_EXT) += bootcount_ext.o obj-$(CONFIG_BOOTCOUNT_AM33XX_NVMEM) += bootcount_nvmem.o obj-$(CONFIG_DM_BOOTCOUNT) += bootcount-uclass.o +obj-$(CONFIG_DM_BOOTCOUNT_PMIC_PFUZE100) += pmic_pfuze100.o obj-$(CONFIG_DM_BOOTCOUNT_RTC) += rtc.o obj-$(CONFIG_DM_BOOTCOUNT_I2C_EEPROM) += i2c-eeprom.o obj-$(CONFIG_DM_BOOTCOUNT_SPI_FLASH) += spi-flash.o diff --git a/drivers/bootcount/pmic_pfuze100.c b/drivers/bootcount/pmic_pfuze100.c new file mode 100644 index 0000000..ad3bc03 --- /dev/null +++ b/drivers/bootcount/pmic_pfuze100.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2018-2022 Denx Software Engineering GmbH + * Heiko Schocher <hs@denx.de> + * Philip Oberfichtner <pro@denx.de> + * + * A bootcount driver using the registers MEMA - MEMD on the PFUZE100. + * This works only, if the PMIC is not connected. + */ + +#include <common.h> +#include <bootcount.h> +#include <dm.h> +#include <power/pmic.h> +#include <power/pfuze100_pmic.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define PFUZE_BC_MAGIC 0xdead + +struct bootcount_pmic_priv { + struct udevice *pmic; +}; + +static int pfuze100_get_magic(struct udevice *dev, u32 *magic) +{ + int ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMA); + if (ret < 0) + return ret; + *magic = ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMB); + if (ret < 0) + return ret; + *magic += ret << 8; + + return 0; +} + +static int pfuze100_set_magic(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMA, PFUZE_BC_MAGIC & 0xff); + if (ret) + return ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMB, (PFUZE_BC_MAGIC >> 8) & 0xff); + return ret; +} + +static int pfuze100_get_value(struct udevice *dev, u32 *a) +{ + int ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMC); + if (ret < 0) + return ret; + *a = ret; + + ret = pmic_reg_read(dev, PFUZE100_MEMD); + if (ret < 0) + return ret; + *a += ret << 8; + + return 0; +} + +static int pfuze100_set_value(struct udevice *dev, u32 val) +{ + int ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMC, val & 0xff); + if (ret) + return ret; + + ret = pmic_reg_write(dev, PFUZE100_MEMD, (val >> 8) & 0xff); + return ret; +} + +static int bootcount_pmic_set(struct udevice *dev, const u32 a) +{ + struct bootcount_pmic_priv *priv = dev_get_priv(dev); + + if (pfuze100_set_magic(priv->pmic)) { + debug("%s: writing magic failed\n", __func__); + return -EIO; + } + + if (pfuze100_set_value(priv->pmic, a)) { + debug("%s: writing value failed\n", __func__); + return -EIO; + } + + return 0; +} + +static int bootcount_pmic_get(struct udevice *dev, u32 *a) +{ + struct bootcount_pmic_priv *priv = dev_get_priv(dev); + u32 magic; + + if (pfuze100_get_magic(priv->pmic, &magic)) { + debug("%s: reading magic failed\n", __func__); + return -EIO; + } + + if (magic != PFUZE_BC_MAGIC) { + *a = 0; + return 0; + } + + if (pfuze100_get_value(priv->pmic, a)) { + debug("%s: reading value failed\n", __func__); + return -EIO; + } + + return 0; +} + +static int bootcount_pmic_probe(struct udevice *dev) +{ + struct ofnode_phandle_args phandle_args; + struct bootcount_pmic_priv *priv = dev_get_priv(dev); + struct udevice *pmic; + + if (dev_read_phandle_with_args(dev, "pmic", NULL, 0, 0, &phandle_args)) { + debug("%s: pmic backing device not specified\n", dev->name); + return -ENOENT; + } + + if (uclass_get_device_by_ofnode(UCLASS_PMIC, phandle_args.node, &pmic)) { + debug("%s: could not get backing device\n", dev->name); + return -ENODEV; + } + + priv->pmic = pmic; + + return 0; +} + +static const struct bootcount_ops bootcount_pmic_ops = { + .get = bootcount_pmic_get, + .set = bootcount_pmic_set, +}; + +static const struct udevice_id bootcount_pmic_ids[] = { + { .compatible = "u-boot,bootcount-pmic" }, + { } +}; + +U_BOOT_DRIVER(bootcount_pmic) = { + .name = "bootcount-pmic", + .id = UCLASS_BOOTCOUNT, + .priv_auto = sizeof(struct bootcount_pmic_priv), + .probe = bootcount_pmic_probe, + .of_match = bootcount_pmic_ids, + .ops = &bootcount_pmic_ops, +}; diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index 1fa42d7..2708925 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -7,6 +7,7 @@ #include <common.h> #include <asm/io.h> #include <clk-uclass.h> +#include <linux/clk-provider.h> #include "pmc.h" static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) @@ -21,60 +22,12 @@ static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args) return 0; } -static ulong at91_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong at91_clk_set_rate(struct clk *clk, ulong rate) -{ - struct clk *c; - int ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_set_rate(c, rate); -} - -static int at91_clk_enable(struct clk *clk) -{ - struct clk *c; - int ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_enable(c); -} - -static int at91_clk_disable(struct clk *clk) -{ - struct clk *c; - int ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_disable(c); -} - const struct clk_ops at91_clk_ops = { .of_xlate = at91_clk_of_xlate, - .set_rate = at91_clk_set_rate, - .get_rate = at91_clk_get_rate, - .enable = at91_clk_enable, - .disable = at91_clk_disable, + .set_rate = ccf_clk_set_rate, + .get_rate = ccf_clk_get_rate, + .enable = ccf_clk_enable, + .disable = ccf_clk_disable, }; /** diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c index c20c928..b89c77b 100644 --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c @@ -138,14 +138,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name, int clk_get_by_index(struct udevice *dev, int index, struct clk *clk) { - struct ofnode_phandle_args args; - int ret; - - ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0, - index, &args); - - return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks", - index, clk); + return clk_get_by_index_nodev(dev_ofnode(dev), index, clk); } int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk) @@ -400,18 +393,7 @@ int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage) int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk) { - int index; - - debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk); - clk->dev = NULL; - - index = dev_read_stringlist_search(dev, "clock-names", name); - if (index < 0) { - debug("fdt_stringlist_search() failed: %d\n", index); - return index; - } - - return clk_get_by_index(dev, index, clk); + return clk_get_by_name_nodev(dev_ofnode(dev), name, clk); } #endif /* OF_REAL */ @@ -447,9 +429,7 @@ int clk_release_all(struct clk *clk, int count) if (ret && ret != -ENOSYS) return ret; - ret = clk_free(&clk[i]); - if (ret && ret != -ENOSYS) - return ret; + clk_free(&clk[i]); } return 0; @@ -472,19 +452,18 @@ int clk_request(struct udevice *dev, struct clk *clk) return ops->request(clk); } -int clk_free(struct clk *clk) +void clk_free(struct clk *clk) { const struct clk_ops *ops; debug("%s(clk=%p)\n", __func__, clk); if (!clk_valid(clk)) - return 0; + return; ops = clk_dev_ops(clk->dev); - if (!ops->rfree) - return 0; - - return ops->rfree(clk); + if (ops->rfree) + ops->rfree(clk); + return; } ulong clk_get_rate(struct clk *clk) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index eff0fa1..a5a3461 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -74,3 +74,68 @@ bool clk_dev_binded(struct clk *clk) return false; } + +/* Helper functions for clock ops */ + +ulong ccf_clk_get_rate(struct clk *clk) +{ + struct clk *c; + int err = clk_get_by_id(clk->id, &c); + + if (err) + return err; + return clk_get_rate(c); +} + +ulong ccf_clk_set_rate(struct clk *clk, unsigned long rate) +{ + struct clk *c; + int err = clk_get_by_id(clk->id, &c); + + if (err) + return err; + return clk_set_rate(c, rate); +} + +int ccf_clk_set_parent(struct clk *clk, struct clk *parent) +{ + struct clk *c, *p; + int err = clk_get_by_id(clk->id, &c); + + if (err) + return err; + + err = clk_get_by_id(parent->id, &p); + if (err) + return err; + + return clk_set_parent(c, p); +} + +static int ccf_clk_endisable(struct clk *clk, bool enable) +{ + struct clk *c; + int err = clk_get_by_id(clk->id, &c); + + if (err) + return err; + return enable ? clk_enable(c) : clk_disable(c); +} + +int ccf_clk_enable(struct clk *clk) +{ + return ccf_clk_endisable(clk, true); +} + +int ccf_clk_disable(struct clk *clk) +{ + return ccf_clk_endisable(clk, false); +} + +const struct clk_ops ccf_clk_ops = { + .set_rate = ccf_clk_set_rate, + .get_rate = ccf_clk_get_rate, + .set_parent = ccf_clk_set_parent, + .enable = ccf_clk_enable, + .disable = ccf_clk_disable, +}; diff --git a/drivers/clk/clk_sandbox.c b/drivers/clk/clk_sandbox.c index 57acf7d..636914d 100644 --- a/drivers/clk/clk_sandbox.c +++ b/drivers/clk/clk_sandbox.c @@ -101,15 +101,15 @@ static int sandbox_clk_request(struct clk *clk) return 0; } -static int sandbox_clk_free(struct clk *clk) +static void sandbox_clk_free(struct clk *clk) { struct sandbox_clk_priv *priv = dev_get_priv(clk->dev); if (clk->id >= SANDBOX_CLK_ID_COUNT) - return -EINVAL; + return; priv->requested[clk->id] = false; - return 0; + return; } static struct clk_ops sandbox_clk_ops = { diff --git a/drivers/clk/clk_sandbox_test.c b/drivers/clk/clk_sandbox_test.c index f665fd3..5807a45 100644 --- a/drivers/clk/clk_sandbox_test.c +++ b/drivers/clk/clk_sandbox_test.c @@ -137,14 +137,11 @@ int sandbox_clk_test_disable_bulk(struct udevice *dev) int sandbox_clk_test_free(struct udevice *dev) { struct sandbox_clk_test *sbct = dev_get_priv(dev); - int i, ret; + int i; devm_clk_put(dev, sbct->clkps[SANDBOX_CLK_TEST_ID_DEVM1]); - for (i = 0; i < SANDBOX_CLK_TEST_NON_DEVM_COUNT; i++) { - ret = clk_free(&sbct->clks[i]); - if (ret) - return ret; - } + for (i = 0; i < SANDBOX_CLK_TEST_NON_DEVM_COUNT; i++) + clk_free(&sbct->clks[i]); return 0; } diff --git a/drivers/clk/clk_scmi.c b/drivers/clk/clk_scmi.c index 9a0a6f6..5702268 100644 --- a/drivers/clk/clk_scmi.c +++ b/drivers/clk/clk_scmi.c @@ -11,6 +11,52 @@ #include <scmi_agent.h> #include <scmi_protocols.h> #include <asm/types.h> +#include <linux/clk-provider.h> + +static int scmi_clk_get_num_clock(struct udevice *dev, size_t *num_clocks) +{ + struct scmi_clk_protocol_attr_out out; + struct scmi_msg msg = { + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, + .message_id = SCMI_PROTOCOL_ATTRIBUTES, + .out_msg = (u8 *)&out, + .out_msg_sz = sizeof(out), + }; + int ret; + + ret = devm_scmi_process_msg(dev, &msg); + if (ret) + return ret; + + *num_clocks = out.attributes & SCMI_CLK_PROTO_ATTR_COUNT_MASK; + + return 0; +} + +static int scmi_clk_get_attibute(struct udevice *dev, int clkid, char **name) +{ + struct scmi_clk_attribute_in in = { + .clock_id = clkid, + }; + struct scmi_clk_attribute_out out; + struct scmi_msg msg = { + .protocol_id = SCMI_PROTOCOL_ID_CLOCK, + .message_id = SCMI_CLOCK_ATTRIBUTES, + .in_msg = (u8 *)&in, + .in_msg_sz = sizeof(in), + .out_msg = (u8 *)&out, + .out_msg_sz = sizeof(out), + }; + int ret; + + ret = devm_scmi_process_msg(dev, &msg); + if (ret) + return ret; + + *name = out.clock_name; + + return 0; +} static int scmi_clk_gate(struct clk *clk, int enable) { @@ -24,7 +70,7 @@ static int scmi_clk_gate(struct clk *clk, int enable) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev->parent, &msg); + ret = devm_scmi_process_msg(clk->dev, &msg); if (ret) return ret; @@ -52,7 +98,7 @@ static ulong scmi_clk_get_rate(struct clk *clk) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev->parent, &msg); + ret = devm_scmi_process_msg(clk->dev, &msg); if (ret < 0) return ret; @@ -77,7 +123,7 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) in, out); int ret; - ret = devm_scmi_process_msg(clk->dev->parent, &msg); + ret = devm_scmi_process_msg(clk->dev, &msg); if (ret < 0) return ret; @@ -88,6 +134,49 @@ static ulong scmi_clk_set_rate(struct clk *clk, ulong rate) return scmi_clk_get_rate(clk); } +static int scmi_clk_probe(struct udevice *dev) +{ + struct clk *clk; + size_t num_clocks, i; + int ret; + + if (!CONFIG_IS_ENABLED(CLK_CCF)) + return 0; + + /* register CCF children: CLK UCLASS, no probed again */ + if (device_get_uclass_id(dev->parent) == UCLASS_CLK) + return 0; + + ret = scmi_clk_get_num_clock(dev, &num_clocks); + if (ret) + return ret; + + for (i = 0; i < num_clocks; i++) { + char *name; + + if (!scmi_clk_get_attibute(dev, i, &name)) { + char *clock_name = strdup(name); + + clk = kzalloc(sizeof(*clk), GFP_KERNEL); + if (!clk || !clock_name) + ret = -ENOMEM; + else + ret = clk_register(clk, dev->driver->name, + clock_name, dev->name); + + if (ret) { + free(clk); + free(clock_name); + return ret; + } + + clk_dm(i, clk); + } + } + + return 0; +} + static const struct clk_ops scmi_clk_ops = { .enable = scmi_clk_enable, .disable = scmi_clk_disable, @@ -99,4 +188,5 @@ U_BOOT_DRIVER(scmi_clock) = { .name = "scmi_clk", .id = UCLASS_CLK, .ops = &scmi_clk_ops, + .probe = &scmi_clk_probe, }; diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c index 5343036..67825af 100644 --- a/drivers/clk/imx/clk-imx6q.c +++ b/drivers/clk/imx/clk-imx6q.c @@ -14,79 +14,22 @@ #include "clk.h" -static int imx6q_check_id(ulong id) +static int imx6q_clk_request(struct clk *clk) { - if (id < IMX6QDL_CLK_DUMMY || id >= IMX6QDL_CLK_END) { - printf("%s: Invalid clk ID #%lu\n", __func__, id); + if (clk->id < IMX6QDL_CLK_DUMMY || clk->id >= IMX6QDL_CLK_END) { + printf("%s: Invalid clk ID #%lu\n", __func__, clk->id); return -EINVAL; } return 0; } -static ulong imx6q_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - debug("%s(#%lu)\n", __func__, clk->id); - - ret = imx6q_check_id(clk->id); - if (ret) - return ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong imx6q_clk_set_rate(struct clk *clk, unsigned long rate) -{ - debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); - - return rate; -} - -static int __imx6q_clk_enable(struct clk *clk, bool enable) -{ - struct clk *c; - int ret = 0; - - debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); - - ret = imx6q_check_id(clk->id); - if (ret) - return ret; - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - if (enable) - ret = clk_enable(c); - else - ret = clk_disable(c); - - return ret; -} - -static int imx6q_clk_disable(struct clk *clk) -{ - return __imx6q_clk_enable(clk, 0); -} - -static int imx6q_clk_enable(struct clk *clk) -{ - return __imx6q_clk_enable(clk, 1); -} - static struct clk_ops imx6q_clk_ops = { - .set_rate = imx6q_clk_set_rate, - .get_rate = imx6q_clk_get_rate, - .enable = imx6q_clk_enable, - .disable = imx6q_clk_disable, + .request = imx6q_clk_request, + .set_rate = ccf_clk_set_rate, + .get_rate = ccf_clk_get_rate, + .enable = ccf_clk_enable, + .disable = ccf_clk_disable, }; static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", }; diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 3aa8c64..443bbda 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -140,92 +140,6 @@ static const char *imx8mm_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sy static const char *imx8mm_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m", "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", }; -static ulong imx8mm_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - debug("%s(#%lu)\n", __func__, clk->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong imx8mm_clk_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *c; - int ret; - - debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_set_rate(c, rate); -} - -static int __imx8mm_clk_enable(struct clk *clk, bool enable) -{ - struct clk *c; - int ret; - - debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - if (enable) - ret = clk_enable(c); - else - ret = clk_disable(c); - - return ret; -} - -static int imx8mm_clk_disable(struct clk *clk) -{ - return __imx8mm_clk_enable(clk, 0); -} - -static int imx8mm_clk_enable(struct clk *clk) -{ - return __imx8mm_clk_enable(clk, 1); -} - -static int imx8mm_clk_set_parent(struct clk *clk, struct clk *parent) -{ - struct clk *c, *cp; - int ret; - - debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - ret = clk_get_by_id(parent->id, &cp); - if (ret) - return ret; - - ret = clk_set_parent(c, cp); - c->dev->parent = cp->dev; - - return ret; -} - -static struct clk_ops imx8mm_clk_ops = { - .set_rate = imx8mm_clk_set_rate, - .get_rate = imx8mm_clk_get_rate, - .enable = imx8mm_clk_enable, - .disable = imx8mm_clk_disable, - .set_parent = imx8mm_clk_set_parent, -}; - static int imx8mm_clk_probe(struct udevice *dev) { void __iomem *base; @@ -470,7 +384,7 @@ U_BOOT_DRIVER(imx8mm_clk) = { .name = "clk_imx8mm", .id = UCLASS_CLK, .of_match = imx8mm_clk_ids, - .ops = &imx8mm_clk_ops, + .ops = &ccf_clk_ops, .probe = imx8mm_clk_probe, .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index e398d7d..bb62138 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -148,92 +148,6 @@ static const char * const imx8mn_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_10 "sys_pll2_100m", "sys_pll2_200m", "clk_ext2", "clk_ext3", "audio_pll2_out", }; -static ulong imx8mn_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - debug("%s(#%lu)\n", __func__, clk->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong imx8mn_clk_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *c; - int ret; - - debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_set_rate(c, rate); -} - -static int __imx8mn_clk_enable(struct clk *clk, bool enable) -{ - struct clk *c; - int ret; - - debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - if (enable) - ret = clk_enable(c); - else - ret = clk_disable(c); - - return ret; -} - -static int imx8mn_clk_disable(struct clk *clk) -{ - return __imx8mn_clk_enable(clk, 0); -} - -static int imx8mn_clk_enable(struct clk *clk) -{ - return __imx8mn_clk_enable(clk, 1); -} - -static int imx8mn_clk_set_parent(struct clk *clk, struct clk *parent) -{ - struct clk *c, *cp; - int ret; - - debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - ret = clk_get_by_id(parent->id, &cp); - if (ret) - return ret; - - ret = clk_set_parent(c, cp); - c->dev->parent = cp->dev; - - return ret; -} - -static struct clk_ops imx8mn_clk_ops = { - .set_rate = imx8mn_clk_set_rate, - .get_rate = imx8mn_clk_get_rate, - .enable = imx8mn_clk_enable, - .disable = imx8mn_clk_disable, - .set_parent = imx8mn_clk_set_parent, -}; - static int imx8mn_clk_probe(struct udevice *dev) { void __iomem *base; @@ -481,7 +395,7 @@ U_BOOT_DRIVER(imx8mn_clk) = { .name = "clk_imx8mn", .id = UCLASS_CLK, .of_match = imx8mn_clk_ids, - .ops = &imx8mn_clk_ops, + .ops = &ccf_clk_ops, .probe = imx8mn_clk_probe, .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index c77500b..ad84ce3 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -186,94 +186,6 @@ static const char *imx8mp_enet_phy_ref_sels[] = {"clock-osc-24m", "sys_pll2_50m" static const char *imx8mp_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", }; - -static ulong imx8mp_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - debug("%s(#%lu)\n", __func__, clk->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong imx8mp_clk_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *c; - int ret; - - debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_set_rate(c, rate); -} - -static int __imx8mp_clk_enable(struct clk *clk, bool enable) -{ - struct clk *c; - int ret; - - debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - if (enable) - ret = clk_enable(c); - else - ret = clk_disable(c); - - return ret; -} - -static int imx8mp_clk_disable(struct clk *clk) -{ - return __imx8mp_clk_enable(clk, 0); -} - -static int imx8mp_clk_enable(struct clk *clk) -{ - return __imx8mp_clk_enable(clk, 1); -} - -static int imx8mp_clk_set_parent(struct clk *clk, struct clk *parent) -{ - struct clk *c, *cp; - int ret; - - debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - ret = clk_get_by_id(parent->id, &cp); - if (ret) - return ret; - - ret = clk_set_parent(c, cp); - - c->dev->parent = cp->dev; - - return ret; -} - -static struct clk_ops imx8mp_clk_ops = { - .set_rate = imx8mp_clk_set_rate, - .get_rate = imx8mp_clk_get_rate, - .enable = imx8mp_clk_enable, - .disable = imx8mp_clk_disable, - .set_parent = imx8mp_clk_set_parent, -}; - static int imx8mp_clk_probe(struct udevice *dev) { void __iomem *base; @@ -409,7 +321,7 @@ U_BOOT_DRIVER(imx8mp_clk) = { .name = "clk_imx8mp", .id = UCLASS_CLK, .of_match = imx8mp_clk_ids, - .ops = &imx8mp_clk_ops, + .ops = &ccf_clk_ops, .probe = imx8mp_clk_probe, .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/clk/imx/clk-imxrt1020.c b/drivers/clk/imx/clk-imxrt1020.c index 840f783..3f8b4df 100644 --- a/drivers/clk/imx/clk-imxrt1020.c +++ b/drivers/clk/imx/clk-imxrt1020.c @@ -14,68 +14,11 @@ #include "clk.h" -static ulong imxrt1020_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - debug("%s(#%lu)\n", __func__, clk->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong imxrt1020_clk_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *c; - int ret; - - debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_set_rate(c, rate); -} - -static int __imxrt1020_clk_enable(struct clk *clk, bool enable) -{ - struct clk *c; - int ret; - - debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - if (enable) - ret = clk_enable(c); - else - ret = clk_disable(c); - - return ret; -} - -static int imxrt1020_clk_disable(struct clk *clk) -{ - return __imxrt1020_clk_enable(clk, 0); -} - -static int imxrt1020_clk_enable(struct clk *clk) -{ - return __imxrt1020_clk_enable(clk, 1); -} - static struct clk_ops imxrt1020_clk_ops = { - .set_rate = imxrt1020_clk_set_rate, - .get_rate = imxrt1020_clk_get_rate, - .enable = imxrt1020_clk_enable, - .disable = imxrt1020_clk_disable, + .set_rate = ccf_clk_set_rate, + .get_rate = ccf_clk_get_rate, + .enable = ccf_clk_enable, + .disable = ccf_clk_disable, }; static const char * const pll2_bypass_sels[] = {"pll2_sys", "osc", }; diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c index 3e17161..5cb5e3b 100644 --- a/drivers/clk/imx/clk-imxrt1050.c +++ b/drivers/clk/imx/clk-imxrt1050.c @@ -15,89 +15,6 @@ #include "clk.h" -static ulong imxrt1050_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int ret; - - debug("%s(#%lu)\n", __func__, clk->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_get_rate(c); -} - -static ulong imxrt1050_clk_set_rate(struct clk *clk, ulong rate) -{ - struct clk *c; - int ret; - - debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - return clk_set_rate(c, rate); -} - -static int __imxrt1050_clk_enable(struct clk *clk, bool enable) -{ - struct clk *c; - int ret; - - debug("%s(#%lu) en: %d\n", __func__, clk->id, enable); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - if (enable) - ret = clk_enable(c); - else - ret = clk_disable(c); - - return ret; -} - -static int imxrt1050_clk_disable(struct clk *clk) -{ - return __imxrt1050_clk_enable(clk, 0); -} - -static int imxrt1050_clk_enable(struct clk *clk) -{ - return __imxrt1050_clk_enable(clk, 1); -} - -static int imxrt1050_clk_set_parent(struct clk *clk, struct clk *parent) -{ - struct clk *c, *cp; - int ret; - - debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id); - - ret = clk_get_by_id(clk->id, &c); - if (ret) - return ret; - - ret = clk_get_by_id(parent->id, &cp); - if (ret) - return ret; - - return clk_set_parent(c, cp); -} - -static struct clk_ops imxrt1050_clk_ops = { - .set_rate = imxrt1050_clk_set_rate, - .get_rate = imxrt1050_clk_get_rate, - .enable = imxrt1050_clk_enable, - .disable = imxrt1050_clk_disable, - .set_parent = imxrt1050_clk_set_parent, -}; - static const char * const pll_ref_sels[] = {"osc", "dummy", }; static const char * const pll1_bypass_sels[] = {"pll1_arm", "pll1_arm_ref_sel", }; static const char * const pll2_bypass_sels[] = {"pll2_sys", "pll2_sys_ref_sel", }; @@ -317,7 +234,7 @@ U_BOOT_DRIVER(imxrt1050_clk) = { .name = "clk_imxrt1050", .id = UCLASS_CLK, .of_match = imxrt1050_clk_ids, - .ops = &imxrt1050_clk_ops, + .ops = &ccf_clk_ops, .probe = imxrt1050_clk_probe, .flags = DM_FLAG_PRE_RELOC, }; diff --git a/drivers/clk/microchip/mpfs_clk.c b/drivers/clk/microchip/mpfs_clk.c index 05d7647..67828c9 100644 --- a/drivers/clk/microchip/mpfs_clk.c +++ b/drivers/clk/microchip/mpfs_clk.c @@ -15,63 +15,6 @@ #include "mpfs_clk.h" -/* All methods are delegated to CCF clocks */ - -static ulong mpfs_clk_get_rate(struct clk *clk) -{ - struct clk *c; - int err = clk_get_by_id(clk->id, &c); - - if (err) - return err; - return clk_get_rate(c); -} - -static ulong mpfs_clk_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *c; - int err = clk_get_by_id(clk->id, &c); - - if (err) - return err; - return clk_set_rate(c, rate); -} - -static int mpfs_clk_set_parent(struct clk *clk, struct clk *parent) -{ - struct clk *c, *p; - int err = clk_get_by_id(clk->id, &c); - - if (err) - return err; - - err = clk_get_by_id(parent->id, &p); - if (err) - return err; - - return clk_set_parent(c, p); -} - -static int mpfs_clk_endisable(struct clk *clk, bool enable) -{ - struct clk *c; - int err = clk_get_by_id(clk->id, &c); - - if (err) - return err; - return enable ? clk_enable(c) : clk_disable(c); -} - -static int mpfs_clk_enable(struct clk *clk) -{ - return mpfs_clk_endisable(clk, true); -} - -static int mpfs_clk_disable(struct clk *clk) -{ - return mpfs_clk_endisable(clk, false); -} - static int mpfs_clk_probe(struct udevice *dev) { int ret; @@ -100,14 +43,6 @@ static int mpfs_clk_probe(struct udevice *dev) return ret; } -static const struct clk_ops mpfs_clk_ops = { - .set_rate = mpfs_clk_set_rate, - .get_rate = mpfs_clk_get_rate, - .set_parent = mpfs_clk_set_parent, - .enable = mpfs_clk_enable, - .disable = mpfs_clk_disable, -}; - static const struct udevice_id mpfs_of_match[] = { { .compatible = "microchip,mpfs-clkcfg" }, { } @@ -117,7 +52,7 @@ U_BOOT_DRIVER(mpfs_clk) = { .name = "mpfs_clk", .id = UCLASS_CLK, .of_match = mpfs_of_match, - .ops = &mpfs_clk_ops, + .ops = &ccf_clk_ops, .probe = mpfs_clk_probe, .priv_auto = sizeof(struct clk), .flags = DM_FLAG_PRE_RELOC, diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig index 8f7703c..5c34004 100644 --- a/drivers/core/Kconfig +++ b/drivers/core/Kconfig @@ -77,6 +77,16 @@ config DM_DEVICE_REMOVE it causes unplugged devices to linger around in the dm-tree, and it causes USB host controllers to not be stopped when booting the OS. +config DM_EVENT + bool "Support events with driver model" + depends on DM + imply EVENT + default y if SANDBOX + help + This enables support for generating events related to driver model + operations, such as prbing or removing a device. Subsystems can + register a 'spy' function that is called when the event occurs. + config SPL_DM_DEVICE_REMOVE bool "Support device removal in SPL" depends on SPL_DM diff --git a/drivers/core/device-remove.c b/drivers/core/device-remove.c index e6ec6ff..73d2e9e 100644 --- a/drivers/core/device-remove.c +++ b/drivers/core/device-remove.c @@ -207,6 +207,10 @@ int device_remove(struct udevice *dev, uint flags) if (!(dev_get_flags(dev) & DM_FLAG_ACTIVATED)) return 0; + ret = device_notify(dev, EVT_DM_PRE_REMOVE); + if (ret) + return ret; + /* * If the child returns EKEYREJECTED, continue. It just means that it * didn't match the flags. @@ -256,6 +260,10 @@ int device_remove(struct udevice *dev, uint flags) dev_bic_flags(dev, DM_FLAG_ACTIVATED); + ret = device_notify(dev, EVT_DM_POST_REMOVE); + if (ret) + goto err_remove; + return 0; err_remove: diff --git a/drivers/core/device.c b/drivers/core/device.c index 901c1e2..1b356f1 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -10,6 +10,7 @@ #include <common.h> #include <cpu_func.h> +#include <event.h> #include <log.h> #include <asm/global_data.h> #include <asm/io.h> @@ -493,6 +494,10 @@ int device_probe(struct udevice *dev) if (dev_get_flags(dev) & DM_FLAG_ACTIVATED) return 0; + ret = device_notify(dev, EVT_DM_PRE_PROBE); + if (ret) + return ret; + drv = dev->driver; assert(drv); @@ -597,6 +602,10 @@ int device_probe(struct udevice *dev) dev->name, ret, errno_str(ret)); } + ret = device_notify(dev, EVT_DM_POST_PROBE); + if (ret) + return ret; + return 0; fail_uclass: if (device_remove(dev, DM_REMOVE_NORMAL)) { diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c index 709bea2..8042847 100644 --- a/drivers/core/ofnode.c +++ b/drivers/core/ofnode.c @@ -898,6 +898,42 @@ int ofnode_read_pci_vendev(ofnode node, u16 *vendor, u16 *device) return -ENOENT; } +int ofnode_read_eth_phy_id(ofnode node, u16 *vendor, u16 *device) +{ + const char *list, *end; + int len; + + list = ofnode_get_property(node, "compatible", &len); + + if (!list) + return -ENOENT; + + end = list + len; + while (list < end) { + len = strlen(list); + + if (len >= strlen("ethernet-phy-idVVVV,DDDD")) { + char *s = strstr(list, "ethernet-phy-id"); + + /* + * check if the string is something like + * ethernet-phy-idVVVV,DDDD + */ + if (s && s[19] == '.') { + s += strlen("ethernet-phy-id"); + *vendor = simple_strtol(s, NULL, 16); + s += 5; + *device = simple_strtol(s, NULL, 16); + + return 0; + } + } + list += (len + 1); + } + + return -ENOENT; +} + int ofnode_read_addr_cells(ofnode node) { if (ofnode_is_np(node)) { diff --git a/drivers/core/root.c b/drivers/core/root.c index e3f8795..8efb425 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -404,6 +404,11 @@ int dm_init_and_scan(bool pre_reloc_only) return ret; } } + if (CONFIG_IS_ENABLED(DM_EVENT)) { + ret = event_notify_null(EVT_DM_POST_INIT); + if (ret) + return log_msg_ret("ev", ret); + } return 0; } diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index b0e6df8..2771670 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -49,6 +49,10 @@ config SYS_NUM_DDR_CTLRS ARCH_LX2162A default 1 +config CHIP_SELECTS_PER_CTRL + int "Number of chip selects per controller" + default 4 + config SYS_FSL_DDR_VER int default 50 if SYS_FSL_DDR_VER_50 diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h index 970651f..a14c766 100644 --- a/drivers/ddr/marvell/axp/ddr3_axp.h +++ b/drivers/ddr/marvell/axp/ddr3_axp.h @@ -37,7 +37,7 @@ #define ECC_SUPPORT #endif #define NEW_FABRIC_TWSI_ADDR 0x4E -#ifdef CONFIG_DB_784MP_GP +#ifdef CONFIG_TARGET_DB_MV784MP_GP #define BUS_WIDTH_ECC_TWSI_ADDR 0x4E #else #define BUS_WIDTH_ECC_TWSI_ADDR 0x4F diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h index 437a02e..ab09e726 100644 --- a/drivers/ddr/marvell/axp/ddr3_axp_config.h +++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h @@ -138,7 +138,7 @@ * Enables I2C auto detection different options */ #if defined(CONFIG_DB_88F78X60) || defined(CONFIG_DB_88F78X60_REV2) || \ - defined(CONFIG_DB_784MP_GP) + defined(CONFIG_TARGET_DB_MV784MP_GP) #define AUTO_DETECTION_SUPPORT #endif #endif diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 9cacea8..0af5460 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -68,6 +68,13 @@ config APBH_DMA help Enable APBH DMA driver. +config XILINX_DPDMA + bool "Enable ZynqMP Display Port DMA driver" + depends on DMA && ZYNQMP_POWER_DOMAIN + help + Enable support for Xilinx ZynqMP Display DMA driver. Currently + this file is used as placeholder for driver. The main reason is + to record compatible string and calling power domain driver. if APBH_DMA config APBH_DMA_BURST diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index afab324..a75572f 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -13,5 +13,6 @@ obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o obj-$(CONFIG_TI_EDMA3) += ti-edma3.o obj-$(CONFIG_DMA_LPC32XX) += lpc32xx_dma.o +obj-$(CONFIG_XILINX_DPDMA) += xilinx_dpdma.o obj-y += ti/ diff --git a/drivers/dma/bcm6348-iudma.c b/drivers/dma/bcm6348-iudma.c index c04aa55..4fc6502 100644 --- a/drivers/dma/bcm6348-iudma.c +++ b/drivers/dma/bcm6348-iudma.c @@ -596,11 +596,7 @@ static int bcm6348_iudma_probe(struct udevice *dev) return ret; } - ret = clk_free(&clk); - if (ret < 0) { - pr_err("error freeing clock %d\n", i); - return ret; - } + clk_free(&clk); } /* try to perform resets */ diff --git a/drivers/dma/xilinx_dpdma.c b/drivers/dma/xilinx_dpdma.c new file mode 100644 index 0000000..d4ee21d --- /dev/null +++ b/drivers/dma/xilinx_dpdma.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Xilinx Inc. + */ + +#include <common.h> +#include <cpu_func.h> +#include <dm.h> +#include <dma.h> +#include <dma-uclass.h> +#include <errno.h> +#include <dm/device_compat.h> + +/** + * struct zynqmp_dpdma_priv - Private structure + * @dev: Device uclass for video_ops + */ +struct zynqmp_dpdma_priv { + struct udevice *dev; +}; + +static int zynqmp_dpdma_probe(struct udevice *dev) +{ + /* Only placeholder for power domain driver */ + return 0; +} + +static const struct dma_ops zynqmp_dpdma_ops = { +}; + +static const struct udevice_id zynqmp_dpdma_ids[] = { + { .compatible = "xlnx,zynqmp-dpdma" }, + { } +}; + +U_BOOT_DRIVER(zynqmp_dpdma) = { + .name = "zynqmp_dpdma", + .id = UCLASS_DMA, + .of_match = zynqmp_dpdma_ids, + .ops = &zynqmp_dpdma_ops, + .probe = zynqmp_dpdma_probe, + .priv_auto = sizeof(struct zynqmp_dpdma_priv), +}; diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 8d8492d..8916c55 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -140,6 +140,57 @@ unsigned int zynqmp_firmware_version(void) return pm_api_version; }; +int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) +{ + int ret; + + ret = xilinx_pm_request(PM_IOCTL, node, IOCTL_SET_SD_CONFIG, + config, value, NULL); + if (ret) + printf("%s: node %d: set_sd_config %d failed\n", + __func__, node, config); + + return ret; +} + +int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id) +{ + int ret; + u32 *bit_mask; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + /* Input arguments validation */ + if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA)) + return -EINVAL; + + /* Check feature check API version */ + ret = xilinx_pm_request(PM_FEATURE_CHECK, PM_FEATURE_CHECK, 0, 0, 0, + ret_payload); + if (ret) + return ret; + + /* Check if feature check version 2 is supported or not */ + if ((ret_payload[1] & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) { + /* + * Call feature check for IOCTL/QUERY API to get IOCTL ID or + * QUERY ID feature status. + */ + + ret = xilinx_pm_request(PM_FEATURE_CHECK, api_id, 0, 0, 0, + ret_payload); + if (ret) + return ret; + + bit_mask = &ret_payload[2]; + if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0) + return -EOPNOTSUPP; + } else { + return -ENODATA; + } + + return 0; +} + /** * Send a configuration object to the PMU firmware. * diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c b/drivers/firmware/scmi/sandbox-scmi_agent.c index 4b96820..c555164 100644 --- a/drivers/firmware/scmi/sandbox-scmi_agent.c +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c @@ -19,51 +19,36 @@ * The sandbox SCMI agent driver simulates to some extend a SCMI message * processing. It simulates few of the SCMI services for some of the * SCMI protocols embedded in U-Boot. Currently: - * - SCMI clock protocol: emulate 2 agents each exposing few clocks - * - SCMI reset protocol: emulate 1 agent exposing a reset controller - * - SCMI voltage domain protocol: emulate 1 agent exposing 2 regulators + * - SCMI clock protocol emulates an agent exposing 2 clocks + * - SCMI reset protocol emulates an agent exposing a reset controller + * - SCMI voltage domain protocol emulates an agent exposing 2 regulators * - * Agent #0 simulates 2 clocks, 1 reset domain and 1 voltage domain. - * See IDs in scmi0_clk[]/scmi0_reset[] and "sandbox-scmi-agent@0" in test.dts. - * - * Agent #1 simulates 1 clock. - * See IDs in scmi1_clk[] and "sandbox-scmi-agent@1" in test.dts. + * As per DT bindings, the device node name shall be scmi. * * All clocks and regulators are default disabled and reset controller down. * - * This Driver exports sandbox_scmi_service_ctx() for the test sequence to + * This driver exports sandbox_scmi_service_ctx() for the test sequence to * get the state of the simulated services (clock state, rate, ...) and * check back-end device state reflects the request send through the * various uclass devices, as clocks and reset controllers. */ -#define SANDBOX_SCMI_AGENT_COUNT 2 - -static struct sandbox_scmi_clk scmi0_clk[] = { - { .id = 7, .rate = 1000 }, - { .id = 3, .rate = 333 }, +static struct sandbox_scmi_clk scmi_clk[] = { + { .rate = 333 }, + { .rate = 200 }, + { .rate = 1000 }, }; -static struct sandbox_scmi_reset scmi0_reset[] = { +static struct sandbox_scmi_reset scmi_reset[] = { { .id = 3 }, }; -static struct sandbox_scmi_voltd scmi0_voltd[] = { +static struct sandbox_scmi_voltd scmi_voltd[] = { { .id = 0, .voltage_uv = 3300000 }, { .id = 1, .voltage_uv = 1800000 }, }; -static struct sandbox_scmi_clk scmi1_clk[] = { - { .id = 1, .rate = 44 }, -}; - -/* The list saves to simulted end devices references for test purpose */ -struct sandbox_scmi_agent *sandbox_scmi_agent_list[SANDBOX_SCMI_AGENT_COUNT]; - -static struct sandbox_scmi_service sandbox_scmi_service_state = { - .agent = sandbox_scmi_agent_list, - .agent_count = SANDBOX_SCMI_AGENT_COUNT, -}; +static struct sandbox_scmi_service sandbox_scmi_service_state; struct sandbox_scmi_service *sandbox_scmi_service_ctx(void) { @@ -74,9 +59,8 @@ static void debug_print_agent_state(struct udevice *dev, char *str) { struct sandbox_scmi_agent *agent = dev_get_priv(dev); - dev_dbg(dev, "Dump sandbox_scmi_agent %u: %s\n", agent->idx, str); - dev_dbg(dev, " scmi%u_clk (%zu): %d/%ld, %d/%ld, %d/%ld, ...\n", - agent->idx, + dev_dbg(dev, "Dump sandbox_scmi_agent: %s\n", str); + dev_dbg(dev, " scmi_clk (%zu): %d/%ld, %d/%ld, %d/%ld, ...\n", agent->clk_count, agent->clk_count ? agent->clk[0].enabled : -1, agent->clk_count ? agent->clk[0].rate : -1, @@ -84,13 +68,11 @@ static void debug_print_agent_state(struct udevice *dev, char *str) agent->clk_count > 1 ? agent->clk[1].rate : -1, agent->clk_count > 2 ? agent->clk[2].enabled : -1, agent->clk_count > 2 ? agent->clk[2].rate : -1); - dev_dbg(dev, " scmi%u_reset (%zu): %d, %d, ...\n", - agent->idx, + dev_dbg(dev, " scmi_reset (%zu): %d, %d, ...\n", agent->reset_count, agent->reset_count ? agent->reset[0].asserted : -1, agent->reset_count > 1 ? agent->reset[1].asserted : -1); - dev_dbg(dev, " scmi%u_voltd (%zu): %u/%d, %u/%d, ...\n", - agent->idx, + dev_dbg(dev, " scmi_voltd (%zu): %u/%d, %u/%d, ...\n", agent->voltd_count, agent->voltd_count ? agent->voltd[0].enabled : -1, agent->voltd_count ? agent->voltd[0].voltage_uv : -1, @@ -98,56 +80,32 @@ static void debug_print_agent_state(struct udevice *dev, char *str) agent->voltd_count ? agent->voltd[1].voltage_uv : -1); }; -static struct sandbox_scmi_clk *get_scmi_clk_state(uint agent_id, uint clock_id) +static struct sandbox_scmi_clk *get_scmi_clk_state(uint clock_id) { - struct sandbox_scmi_clk *target = NULL; - size_t target_count = 0; - size_t n; - - switch (agent_id) { - case 0: - target = scmi0_clk; - target_count = ARRAY_SIZE(scmi0_clk); - break; - case 1: - target = scmi1_clk; - target_count = ARRAY_SIZE(scmi1_clk); - break; - default: - return NULL; - } - - for (n = 0; n < target_count; n++) - if (target[n].id == clock_id) - return target + n; + if (clock_id < ARRAY_SIZE(scmi_clk)) + return scmi_clk + clock_id; return NULL; } -static struct sandbox_scmi_reset *get_scmi_reset_state(uint agent_id, - uint reset_id) +static struct sandbox_scmi_reset *get_scmi_reset_state(uint reset_id) { size_t n; - if (agent_id == 0) { - for (n = 0; n < ARRAY_SIZE(scmi0_reset); n++) - if (scmi0_reset[n].id == reset_id) - return scmi0_reset + n; - } + for (n = 0; n < ARRAY_SIZE(scmi_reset); n++) + if (scmi_reset[n].id == reset_id) + return scmi_reset + n; return NULL; } -static struct sandbox_scmi_voltd *get_scmi_voltd_state(uint agent_id, - uint domain_id) +static struct sandbox_scmi_voltd *get_scmi_voltd_state(uint domain_id) { size_t n; - if (agent_id == 0) { - for (n = 0; n < ARRAY_SIZE(scmi0_voltd); n++) - if (scmi0_voltd[n].id == domain_id) - return scmi0_voltd + n; - } + for (n = 0; n < ARRAY_SIZE(scmi_voltd); n++) + if (scmi_voltd[n].id == domain_id) + return scmi_voltd + n; return NULL; } @@ -156,10 +114,58 @@ static struct sandbox_scmi_voltd *get_scmi_voltd_state(uint agent_id, * Sandbox SCMI agent ops */ +static int sandbox_scmi_clock_protocol_attribs(struct udevice *dev, + struct scmi_msg *msg) +{ + struct scmi_clk_protocol_attr_out *out = NULL; + + if (!msg->out_msg || msg->out_msg_sz < sizeof(*out)) + return -EINVAL; + + out = (struct scmi_clk_protocol_attr_out *)msg->out_msg; + out->attributes = ARRAY_SIZE(scmi_clk); + out->status = SCMI_SUCCESS; + + return 0; +} + +static int sandbox_scmi_clock_attribs(struct udevice *dev, struct scmi_msg *msg) +{ + struct scmi_clk_attribute_in *in = NULL; + struct scmi_clk_attribute_out *out = NULL; + struct sandbox_scmi_clk *clk_state = NULL; + int ret; + + if (!msg->in_msg || msg->in_msg_sz < sizeof(*in) || + !msg->out_msg || msg->out_msg_sz < sizeof(*out)) + return -EINVAL; + + in = (struct scmi_clk_attribute_in *)msg->in_msg; + out = (struct scmi_clk_attribute_out *)msg->out_msg; + + clk_state = get_scmi_clk_state(in->clock_id); + if (!clk_state) { + dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); + + out->status = SCMI_NOT_FOUND; + } else { + memset(out, 0, sizeof(*out)); + + if (clk_state->enabled) + out->attributes = 1; + + ret = snprintf(out->clock_name, sizeof(out->clock_name), + "clk%u", in->clock_id); + assert(ret > 0 && ret < sizeof(out->clock_name)); + + out->status = SCMI_SUCCESS; + } + + return 0; +} static int sandbox_scmi_clock_rate_set(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_clk_rate_set_in *in = NULL; struct scmi_clk_rate_set_out *out = NULL; struct sandbox_scmi_clk *clk_state = NULL; @@ -171,7 +177,7 @@ static int sandbox_scmi_clock_rate_set(struct udevice *dev, in = (struct scmi_clk_rate_set_in *)msg->in_msg; out = (struct scmi_clk_rate_set_out *)msg->out_msg; - clk_state = get_scmi_clk_state(agent->idx, in->clock_id); + clk_state = get_scmi_clk_state(in->clock_id); if (!clk_state) { dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); @@ -190,7 +196,6 @@ static int sandbox_scmi_clock_rate_set(struct udevice *dev, static int sandbox_scmi_clock_rate_get(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_clk_rate_get_in *in = NULL; struct scmi_clk_rate_get_out *out = NULL; struct sandbox_scmi_clk *clk_state = NULL; @@ -202,7 +207,7 @@ static int sandbox_scmi_clock_rate_get(struct udevice *dev, in = (struct scmi_clk_rate_get_in *)msg->in_msg; out = (struct scmi_clk_rate_get_out *)msg->out_msg; - clk_state = get_scmi_clk_state(agent->idx, in->clock_id); + clk_state = get_scmi_clk_state(in->clock_id); if (!clk_state) { dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); @@ -219,7 +224,6 @@ static int sandbox_scmi_clock_rate_get(struct udevice *dev, static int sandbox_scmi_clock_gate(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_clk_state_in *in = NULL; struct scmi_clk_state_out *out = NULL; struct sandbox_scmi_clk *clk_state = NULL; @@ -231,7 +235,7 @@ static int sandbox_scmi_clock_gate(struct udevice *dev, struct scmi_msg *msg) in = (struct scmi_clk_state_in *)msg->in_msg; out = (struct scmi_clk_state_out *)msg->out_msg; - clk_state = get_scmi_clk_state(agent->idx, in->clock_id); + clk_state = get_scmi_clk_state(in->clock_id); if (!clk_state) { dev_err(dev, "Unexpected clock ID %u\n", in->clock_id); @@ -249,7 +253,6 @@ static int sandbox_scmi_clock_gate(struct udevice *dev, struct scmi_msg *msg) static int sandbox_scmi_rd_attribs(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_rd_attr_in *in = NULL; struct scmi_rd_attr_out *out = NULL; struct sandbox_scmi_reset *reset_state = NULL; @@ -261,7 +264,7 @@ static int sandbox_scmi_rd_attribs(struct udevice *dev, struct scmi_msg *msg) in = (struct scmi_rd_attr_in *)msg->in_msg; out = (struct scmi_rd_attr_out *)msg->out_msg; - reset_state = get_scmi_reset_state(agent->idx, in->domain_id); + reset_state = get_scmi_reset_state(in->domain_id); if (!reset_state) { dev_err(dev, "Unexpected reset domain ID %u\n", in->domain_id); @@ -278,7 +281,6 @@ static int sandbox_scmi_rd_attribs(struct udevice *dev, struct scmi_msg *msg) static int sandbox_scmi_rd_reset(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_rd_reset_in *in = NULL; struct scmi_rd_reset_out *out = NULL; struct sandbox_scmi_reset *reset_state = NULL; @@ -290,7 +292,7 @@ static int sandbox_scmi_rd_reset(struct udevice *dev, struct scmi_msg *msg) in = (struct scmi_rd_reset_in *)msg->in_msg; out = (struct scmi_rd_reset_out *)msg->out_msg; - reset_state = get_scmi_reset_state(agent->idx, in->domain_id); + reset_state = get_scmi_reset_state(in->domain_id); if (!reset_state) { dev_err(dev, "Unexpected reset domain ID %u\n", in->domain_id); @@ -321,7 +323,6 @@ static int sandbox_scmi_rd_reset(struct udevice *dev, struct scmi_msg *msg) static int sandbox_scmi_voltd_attribs(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_voltd_attr_in *in = NULL; struct scmi_voltd_attr_out *out = NULL; struct sandbox_scmi_voltd *voltd_state = NULL; @@ -333,7 +334,7 @@ static int sandbox_scmi_voltd_attribs(struct udevice *dev, struct scmi_msg *msg) in = (struct scmi_voltd_attr_in *)msg->in_msg; out = (struct scmi_voltd_attr_out *)msg->out_msg; - voltd_state = get_scmi_voltd_state(agent->idx, in->domain_id); + voltd_state = get_scmi_voltd_state(in->domain_id); if (!voltd_state) { dev_err(dev, "Unexpected domain ID %u\n", in->domain_id); @@ -351,7 +352,6 @@ static int sandbox_scmi_voltd_attribs(struct udevice *dev, struct scmi_msg *msg) static int sandbox_scmi_voltd_config_set(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_voltd_config_set_in *in = NULL; struct scmi_voltd_config_set_out *out = NULL; struct sandbox_scmi_voltd *voltd_state = NULL; @@ -363,7 +363,7 @@ static int sandbox_scmi_voltd_config_set(struct udevice *dev, in = (struct scmi_voltd_config_set_in *)msg->in_msg; out = (struct scmi_voltd_config_set_out *)msg->out_msg; - voltd_state = get_scmi_voltd_state(agent->idx, in->domain_id); + voltd_state = get_scmi_voltd_state(in->domain_id); if (!voltd_state) { dev_err(dev, "Unexpected domain ID %u\n", in->domain_id); @@ -388,7 +388,6 @@ static int sandbox_scmi_voltd_config_set(struct udevice *dev, static int sandbox_scmi_voltd_config_get(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_voltd_config_get_in *in = NULL; struct scmi_voltd_config_get_out *out = NULL; struct sandbox_scmi_voltd *voltd_state = NULL; @@ -400,7 +399,7 @@ static int sandbox_scmi_voltd_config_get(struct udevice *dev, in = (struct scmi_voltd_config_get_in *)msg->in_msg; out = (struct scmi_voltd_config_get_out *)msg->out_msg; - voltd_state = get_scmi_voltd_state(agent->idx, in->domain_id); + voltd_state = get_scmi_voltd_state(in->domain_id); if (!voltd_state) { dev_err(dev, "Unexpected domain ID %u\n", in->domain_id); @@ -420,7 +419,6 @@ static int sandbox_scmi_voltd_config_get(struct udevice *dev, static int sandbox_scmi_voltd_level_set(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_voltd_level_set_in *in = NULL; struct scmi_voltd_level_set_out *out = NULL; struct sandbox_scmi_voltd *voltd_state = NULL; @@ -432,7 +430,7 @@ static int sandbox_scmi_voltd_level_set(struct udevice *dev, in = (struct scmi_voltd_level_set_in *)msg->in_msg; out = (struct scmi_voltd_level_set_out *)msg->out_msg; - voltd_state = get_scmi_voltd_state(agent->idx, in->domain_id); + voltd_state = get_scmi_voltd_state(in->domain_id); if (!voltd_state) { dev_err(dev, "Unexpected domain ID %u\n", in->domain_id); @@ -448,7 +446,6 @@ static int sandbox_scmi_voltd_level_set(struct udevice *dev, static int sandbox_scmi_voltd_level_get(struct udevice *dev, struct scmi_msg *msg) { - struct sandbox_scmi_agent *agent = dev_get_priv(dev); struct scmi_voltd_level_get_in *in = NULL; struct scmi_voltd_level_get_out *out = NULL; struct sandbox_scmi_voltd *voltd_state = NULL; @@ -460,7 +457,7 @@ static int sandbox_scmi_voltd_level_get(struct udevice *dev, in = (struct scmi_voltd_level_get_in *)msg->in_msg; out = (struct scmi_voltd_level_get_out *)msg->out_msg; - voltd_state = get_scmi_voltd_state(agent->idx, in->domain_id); + voltd_state = get_scmi_voltd_state(in->domain_id); if (!voltd_state) { dev_err(dev, "Unexpected domain ID %u\n", in->domain_id); @@ -479,6 +476,10 @@ static int sandbox_scmi_test_process_msg(struct udevice *dev, switch (msg->protocol_id) { case SCMI_PROTOCOL_ID_CLOCK: switch (msg->message_id) { + case SCMI_PROTOCOL_ATTRIBUTES: + return sandbox_scmi_clock_protocol_attribs(dev, msg); + case SCMI_CLOCK_ATTRIBUTES: + return sandbox_scmi_clock_attribs(dev, msg); case SCMI_CLOCK_RATE_SET: return sandbox_scmi_clock_rate_set(dev, msg); case SCMI_CLOCK_RATE_GET: @@ -541,52 +542,37 @@ static int sandbox_scmi_test_remove(struct udevice *dev) { struct sandbox_scmi_agent *agent = dev_get_priv(dev); + if (agent != sandbox_scmi_service_ctx()->agent) + return -EINVAL; + debug_print_agent_state(dev, "removed"); /* We only need to dereference the agent in the context */ - sandbox_scmi_service_ctx()->agent[agent->idx] = NULL; + sandbox_scmi_service_ctx()->agent = NULL; return 0; } static int sandbox_scmi_test_probe(struct udevice *dev) { - static const char basename[] = "sandbox-scmi-agent@"; struct sandbox_scmi_agent *agent = dev_get_priv(dev); - const size_t basename_size = sizeof(basename) - 1; - - if (strncmp(basename, dev->name, basename_size)) - return -ENOENT; - - switch (dev->name[basename_size]) { - case '0': - *agent = (struct sandbox_scmi_agent){ - .idx = 0, - .clk = scmi0_clk, - .clk_count = ARRAY_SIZE(scmi0_clk), - .reset = scmi0_reset, - .reset_count = ARRAY_SIZE(scmi0_reset), - .voltd = scmi0_voltd, - .voltd_count = ARRAY_SIZE(scmi0_voltd), - }; - break; - case '1': - *agent = (struct sandbox_scmi_agent){ - .idx = 1, - .clk = scmi1_clk, - .clk_count = ARRAY_SIZE(scmi1_clk), - }; - break; - default: - dev_err(dev, "%s(): Unexpected agent ID %s\n", - __func__, dev->name + basename_size); - return -ENOENT; - } + + if (sandbox_scmi_service_ctx()->agent) + return -EINVAL; + + *agent = (struct sandbox_scmi_agent){ + .clk = scmi_clk, + .clk_count = ARRAY_SIZE(scmi_clk), + .reset = scmi_reset, + .reset_count = ARRAY_SIZE(scmi_reset), + .voltd = scmi_voltd, + .voltd_count = ARRAY_SIZE(scmi_voltd), + }; debug_print_agent_state(dev, "probed"); /* Save reference for tests purpose */ - sandbox_scmi_service_ctx()->agent[agent->idx] = agent; + sandbox_scmi_service_ctx()->agent = agent; return 0; }; diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c b/drivers/firmware/scmi/sandbox-scmi_devices.c index 66a6792..9baeb46 100644 --- a/drivers/firmware/scmi/sandbox-scmi_devices.c +++ b/drivers/firmware/scmi/sandbox-scmi_devices.c @@ -23,7 +23,7 @@ * and reset controllers. */ -#define SCMI_TEST_DEVICES_CLK_COUNT 3 +#define SCMI_TEST_DEVICES_CLK_COUNT 2 #define SCMI_TEST_DEVICES_RD_COUNT 1 #define SCMI_TEST_DEVICES_VOLTD_COUNT 2 @@ -135,7 +135,7 @@ U_BOOT_DRIVER(sandbox_scmi_devices) = { .name = "sandbox-scmi_devices", .id = UCLASS_MISC, .of_match = sandbox_scmi_devices_ids, - .priv_auto = sizeof(struct sandbox_scmi_device_priv), + .priv_auto = sizeof(struct sandbox_scmi_device_priv), .remove = sandbox_scmi_devices_remove, .probe = sandbox_scmi_devices_probe, }; diff --git a/drivers/firmware/scmi/scmi_agent-uclass.c b/drivers/firmware/scmi/scmi_agent-uclass.c index 4f5870b..3819f2f 100644 --- a/drivers/firmware/scmi/scmi_agent-uclass.c +++ b/drivers/firmware/scmi/scmi_agent-uclass.c @@ -116,10 +116,23 @@ static const struct scmi_agent_ops *transport_dev_ops(struct udevice *dev) int devm_scmi_process_msg(struct udevice *dev, struct scmi_msg *msg) { - const struct scmi_agent_ops *ops = transport_dev_ops(dev); + const struct scmi_agent_ops *ops; + struct udevice *parent = dev; + + /* Find related SCMI agent device */ + do { + parent = dev_get_parent(parent); + } while (parent && device_get_uclass_id(parent) != UCLASS_SCMI_AGENT); + + if (!parent) { + dev_err(dev, "Invalid SCMI device, agent not found\n"); + return -ENODEV; + } + + ops = transport_dev_ops(parent); if (ops->process_msg) - return ops->process_msg(dev, msg); + return ops->process_msg(parent, msg); return -EPROTONOSUPPORT; } diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 522dfc1..a55e368 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -84,10 +84,15 @@ config ALTERA_PIO Select this to enable PIO for Altera devices. Please find details on the "Embedded Peripherals IP User Guide" of Altera. +config BCM2835_GPIO + bool "BCM2835 GPIO driver" + depends on DM_GPIO + config BCM6345_GPIO bool "BCM6345 GPIO driver" depends on DM_GPIO && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158) + ARCH_BCM6858 || ARCH_BCM63158 || \ + ARCH_BCM6753) help This driver supports the GPIO banks on BCM6345 SoCs. @@ -126,6 +131,13 @@ config ATMEL_PIO4 may be dedicated as a general purpose I/O or be assigned to a function of an embedded peripheral. +config ASPEED_GPIO + bool "Aspeed GPIO Driver" + help + Say yes here to support the Aspeed GPIO driver. The controller + is found in the AST2400, AST2500 and AST2600 BMC SoCs and + provides access to over 200 GPIOs on each chip. + config DA8XX_GPIO bool "DA8xx GPIO Driver" help @@ -550,4 +562,12 @@ config SL28CPLD_GPIO help Support GPIO access on Kontron sl28cpld board management controllers. +config SLG7XL45106_I2C_GPO + bool "slg7xl45106 i2c gpo expander" + depends on DM_GPIO + help + Support for slg7xl45106 i2c gpo expander. It is an i2c based + 8-bit gpo expander, all gpo lines are controlled by writing + value into data register. + endif diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 33f7d41..b39dde1 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_TPL_)DM_GPIO) += gpio-uclass.o obj-$(CONFIG_$(SPL_)DM_PCA953X) += pca953x_gpio.o +obj-$(CONFIG_ASPEED_GPIO) += gpio-aspeed.o obj-$(CONFIG_AT91_GPIO) += at91_gpio.o obj-$(CONFIG_ATMEL_PIO4) += atmel_pio4.o obj-$(CONFIG_BCM6345_GPIO) += bcm6345_gpio.o @@ -72,3 +73,4 @@ obj-$(CONFIG_NOMADIK_GPIO) += nmk_gpio.o obj-$(CONFIG_MAX7320_GPIO) += max7320_gpio.o obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o +obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c new file mode 100644 index 0000000..a8a2afc --- /dev/null +++ b/drivers/gpio/gpio-aspeed.c @@ -0,0 +1,299 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2015 IBM Corp. + * Joel Stanley <joel@jms.id.au> + * Ryan Chen <ryan_chen@aspeedtech.com> + * + * Implementation extracted from the Linux kernel and adapted for u-boot. + */ +#include <common.h> +#include <asm/io.h> +#include <asm/gpio.h> + +#include <config.h> +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <asm/io.h> +#include <linux/bug.h> +#include <linux/sizes.h> + +struct aspeed_gpio_priv { + void *regs; +}; + +struct aspeed_gpio_bank { + u16 val_regs; /* +0: Rd: read input value, Wr: set write latch + * +4: Rd/Wr: Direction (0=in, 1=out) + */ + u16 rdata_reg; /* Rd: read write latch, Wr: <none> */ + u16 irq_regs; + u16 debounce_regs; + u16 tolerance_regs; + u16 cmdsrc_regs; + const char names[4][3]; +}; + +static const struct aspeed_gpio_bank aspeed_gpio_banks[] = { + { + .val_regs = 0x0000, + .rdata_reg = 0x00c0, + .irq_regs = 0x0008, + .debounce_regs = 0x0040, + .tolerance_regs = 0x001c, + .cmdsrc_regs = 0x0060, + .names = { "A", "B", "C", "D" }, + }, + { + .val_regs = 0x0020, + .rdata_reg = 0x00c4, + .irq_regs = 0x0028, + .debounce_regs = 0x0048, + .tolerance_regs = 0x003c, + .cmdsrc_regs = 0x0068, + .names = { "E", "F", "G", "H" }, + }, + { + .val_regs = 0x0070, + .rdata_reg = 0x00c8, + .irq_regs = 0x0098, + .debounce_regs = 0x00b0, + .tolerance_regs = 0x00ac, + .cmdsrc_regs = 0x0090, + .names = { "I", "J", "K", "L" }, + }, + { + .val_regs = 0x0078, + .rdata_reg = 0x00cc, + .irq_regs = 0x00e8, + .debounce_regs = 0x0100, + .tolerance_regs = 0x00fc, + .cmdsrc_regs = 0x00e0, + .names = { "M", "N", "O", "P" }, + }, + { + .val_regs = 0x0080, + .rdata_reg = 0x00d0, + .irq_regs = 0x0118, + .debounce_regs = 0x0130, + .tolerance_regs = 0x012c, + .cmdsrc_regs = 0x0110, + .names = { "Q", "R", "S", "T" }, + }, + { + .val_regs = 0x0088, + .rdata_reg = 0x00d4, + .irq_regs = 0x0148, + .debounce_regs = 0x0160, + .tolerance_regs = 0x015c, + .cmdsrc_regs = 0x0140, + .names = { "U", "V", "W", "X" }, + }, + { + .val_regs = 0x01E0, + .rdata_reg = 0x00d8, + .irq_regs = 0x0178, + .debounce_regs = 0x0190, + .tolerance_regs = 0x018c, + .cmdsrc_regs = 0x0170, + .names = { "Y", "Z", "AA", "AB" }, + }, + { + .val_regs = 0x01e8, + .rdata_reg = 0x00dc, + .irq_regs = 0x01a8, + .debounce_regs = 0x01c0, + .tolerance_regs = 0x01bc, + .cmdsrc_regs = 0x01a0, + .names = { "AC", "", "", "" }, + }, +}; + +enum aspeed_gpio_reg { + reg_val, + reg_rdata, + reg_dir, + reg_irq_enable, + reg_irq_type0, + reg_irq_type1, + reg_irq_type2, + reg_irq_status, + reg_debounce_sel1, + reg_debounce_sel2, + reg_tolerance, + reg_cmdsrc0, + reg_cmdsrc1, +}; + +#define GPIO_VAL_VALUE 0x00 +#define GPIO_VAL_DIR 0x04 + +#define GPIO_IRQ_ENABLE 0x00 +#define GPIO_IRQ_TYPE0 0x04 +#define GPIO_IRQ_TYPE1 0x08 +#define GPIO_IRQ_TYPE2 0x0c +#define GPIO_IRQ_STATUS 0x10 + +#define GPIO_DEBOUNCE_SEL1 0x00 +#define GPIO_DEBOUNCE_SEL2 0x04 + +#define GPIO_CMDSRC_0 0x00 +#define GPIO_CMDSRC_1 0x04 +#define GPIO_CMDSRC_ARM 0 +#define GPIO_CMDSRC_LPC 1 +#define GPIO_CMDSRC_COLDFIRE 2 +#define GPIO_CMDSRC_RESERVED 3 + +/* This will be resolved at compile time */ +static inline void __iomem *bank_reg(struct aspeed_gpio_priv *gpio, + const struct aspeed_gpio_bank *bank, + const enum aspeed_gpio_reg reg) +{ + switch (reg) { + case reg_val: + return gpio->regs + bank->val_regs + GPIO_VAL_VALUE; + case reg_rdata: + return gpio->regs + bank->rdata_reg; + case reg_dir: + return gpio->regs + bank->val_regs + GPIO_VAL_DIR; + case reg_irq_enable: + return gpio->regs + bank->irq_regs + GPIO_IRQ_ENABLE; + case reg_irq_type0: + return gpio->regs + bank->irq_regs + GPIO_IRQ_TYPE0; + case reg_irq_type1: + return gpio->regs + bank->irq_regs + GPIO_IRQ_TYPE1; + case reg_irq_type2: + return gpio->regs + bank->irq_regs + GPIO_IRQ_TYPE2; + case reg_irq_status: + return gpio->regs + bank->irq_regs + GPIO_IRQ_STATUS; + case reg_debounce_sel1: + return gpio->regs + bank->debounce_regs + GPIO_DEBOUNCE_SEL1; + case reg_debounce_sel2: + return gpio->regs + bank->debounce_regs + GPIO_DEBOUNCE_SEL2; + case reg_tolerance: + return gpio->regs + bank->tolerance_regs; + case reg_cmdsrc0: + return gpio->regs + bank->cmdsrc_regs + GPIO_CMDSRC_0; + case reg_cmdsrc1: + return gpio->regs + bank->cmdsrc_regs + GPIO_CMDSRC_1; + } + BUG(); +} + +#define GPIO_BANK(x) ((x) >> 5) +#define GPIO_OFFSET(x) ((x) & 0x1f) +#define GPIO_BIT(x) BIT(GPIO_OFFSET(x)) + +static const struct aspeed_gpio_bank *to_bank(unsigned int offset) +{ + unsigned int bank = GPIO_BANK(offset); + + WARN_ON(bank >= ARRAY_SIZE(aspeed_gpio_banks)); + return &aspeed_gpio_banks[bank]; +} + +static int +aspeed_gpio_direction_input(struct udevice *dev, unsigned int offset) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + const struct aspeed_gpio_bank *bank = to_bank(offset); + u32 dir = readl(bank_reg(priv, bank, reg_dir)); + + dir &= ~GPIO_BIT(offset); + writel(dir, bank_reg(priv, bank, reg_dir)); + + return 0; +} + +static int aspeed_gpio_direction_output(struct udevice *dev, unsigned int offset, + int value) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + const struct aspeed_gpio_bank *bank = to_bank(offset); + u32 dir = readl(bank_reg(priv, bank, reg_dir)); + u32 output = readl(bank_reg(priv, bank, reg_val)); + + dir |= GPIO_BIT(offset); + writel(dir, bank_reg(priv, bank, reg_dir)); + + if (value) + output |= GPIO_BIT(offset); + else + output &= ~GPIO_BIT(offset); + + writel(output, bank_reg(priv, bank, reg_val)); + + return 0; +} + +static int aspeed_gpio_get_value(struct udevice *dev, unsigned int offset) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + const struct aspeed_gpio_bank *bank = to_bank(offset); + + return !!(readl(bank_reg(priv, bank, reg_val)) & GPIO_BIT(offset)); +} + +static int +aspeed_gpio_set_value(struct udevice *dev, unsigned int offset, int value) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + const struct aspeed_gpio_bank *bank = to_bank(offset); + u32 data = readl(bank_reg(priv, bank, reg_val)); + + if (value) + data |= GPIO_BIT(offset); + else + data &= ~GPIO_BIT(offset); + + writel(data, bank_reg(priv, bank, reg_val)); + + return 0; +} + +static int aspeed_gpio_get_function(struct udevice *dev, unsigned int offset) +{ + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + const struct aspeed_gpio_bank *bank = to_bank(offset); + + if (readl(bank_reg(priv, bank, reg_dir)) & GPIO_BIT(offset)) + return GPIOF_OUTPUT; + + return GPIOF_INPUT; +} + +static const struct dm_gpio_ops aspeed_gpio_ops = { + .direction_input = aspeed_gpio_direction_input, + .direction_output = aspeed_gpio_direction_output, + .get_value = aspeed_gpio_get_value, + .set_value = aspeed_gpio_set_value, + .get_function = aspeed_gpio_get_function, +}; + +static int aspeed_gpio_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct aspeed_gpio_priv *priv = dev_get_priv(dev); + + uc_priv->bank_name = dev->name; + ofnode_read_u32(dev_ofnode(dev), "ngpios", &uc_priv->gpio_count); + priv->regs = devfdt_get_addr_ptr(dev); + + return 0; +} + +static const struct udevice_id aspeed_gpio_ids[] = { + { .compatible = "aspeed,ast2400-gpio", }, + { .compatible = "aspeed,ast2500-gpio", }, + { .compatible = "aspeed,ast2600-gpio", }, + { } +}; + +U_BOOT_DRIVER(gpio_aspeed) = { + .name = "gpio-aspeed", + .id = UCLASS_GPIO, + .of_match = aspeed_gpio_ids, + .ops = &aspeed_gpio_ops, + .probe = aspeed_gpio_probe, + .priv_auto = sizeof(struct aspeed_gpio_priv), +}; diff --git a/drivers/gpio/gpio_slg7xl45106.c b/drivers/gpio/gpio_slg7xl45106.c new file mode 100644 index 0000000..2cbf748 --- /dev/null +++ b/drivers/gpio/gpio_slg7xl45106.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * slg7xl45106_i2c_gpo driver + * + * Copyright (C) 2021 Xilinx, Inc. + */ + +#include <common.h> +#include <errno.h> +#include <asm/io.h> +#include <asm/gpio.h> +#include <dm.h> +#include <i2c.h> +#include <asm/arch/hardware.h> + +#define SLG7XL45106_REG 0xdb + +static int slg7xl45106_i2c_gpo_direction_input(struct udevice *dev, + unsigned int offset) +{ + return 0; +} + +static int slg7xl45106_i2c_gpo_xlate(struct udevice *dev, + struct gpio_desc *desc, + struct ofnode_phandle_args *args) +{ + desc->offset = (unsigned int)args->args[0]; + + return 0; +} + +static int slg7xl45106_i2c_gpo_set_value(struct udevice *dev, + unsigned int offset, int value) +{ + int ret; + u8 val; + + ret = dm_i2c_read(dev, SLG7XL45106_REG, &val, 1); + if (ret) + return ret; + + if (value) + val |= BIT(offset); + else + val &= ~BIT(offset); + + return dm_i2c_write(dev, SLG7XL45106_REG, &val, 1); +} + +static int slg7xl45106_i2c_gpo_direction_output(struct udevice *dev, + unsigned int offset, int value) +{ + return slg7xl45106_i2c_gpo_set_value(dev, offset, value); +} + +static int slg7xl45106_i2c_gpo_get_value(struct udevice *dev, + unsigned int offset) +{ + int ret; + u8 val; + + ret = dm_i2c_read(dev, SLG7XL45106_REG, &val, 1); + if (ret) + return ret; + + return !!(val & BIT(offset)); +} + +static int slg7xl45106_i2c_gpo_get_function(struct udevice *dev, + unsigned int offset) +{ + return GPIOF_OUTPUT; +} + +static const struct dm_gpio_ops slg7xl45106_i2c_gpo_ops = { + .direction_input = slg7xl45106_i2c_gpo_direction_input, + .direction_output = slg7xl45106_i2c_gpo_direction_output, + .get_value = slg7xl45106_i2c_gpo_get_value, + .set_value = slg7xl45106_i2c_gpo_set_value, + .get_function = slg7xl45106_i2c_gpo_get_function, + .xlate = slg7xl45106_i2c_gpo_xlate, +}; + +static int slg7xl45106_i2c_gpo_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + const void *label_ptr; + + label_ptr = dev_read_prop(dev, "label", NULL); + if (label_ptr) { + uc_priv->bank_name = strdup(label_ptr); + if (!uc_priv->bank_name) + return -ENOMEM; + } else { + uc_priv->bank_name = dev->name; + } + + uc_priv->gpio_count = 8; + + return 0; +} + +static const struct udevice_id slg7xl45106_i2c_gpo_ids[] = { + { .compatible = "dlg,slg7xl45106",}, + { } +}; + +U_BOOT_DRIVER(slg7xl45106_i2c_gpo) = { + .name = "slg7xl45106_i2c_gpo", + .id = UCLASS_GPIO, + .ops = &slg7xl45106_i2c_gpo_ops, + .of_match = slg7xl45106_i2c_gpo_ids, + .probe = slg7xl45106_i2c_gpo_probe, +}; diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c index a650dd6..0da9f6f 100644 --- a/drivers/i2c/i2c-cdns.c +++ b/drivers/i2c/i2c-cdns.c @@ -251,24 +251,32 @@ static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, u8 *cur_data = data; struct cdns_i2c_regs *regs = i2c_bus->regs; u32 ret; + bool start = 1; /* Set the controller in Master transmit mode and clear FIFO */ setbits_le32(®s->control, CDNS_I2C_CONTROL_CLR_FIFO); clrbits_le32(®s->control, CDNS_I2C_CONTROL_RW); - /* Check message size against FIFO depth, and set hold bus bit - * if it is greater than FIFO depth + /* + * For sequential data load hold the bus. */ - if (len > CDNS_I2C_FIFO_DEPTH) + if (len > 1) setbits_le32(®s->control, CDNS_I2C_CONTROL_HOLD); /* Clear the interrupts in status register */ writel(CDNS_I2C_INTERRUPTS_MASK, ®s->interrupt_status); - writel(addr, ®s->address); + /* In case of Probe (i.e no data), start the transfer */ + if (!len) + writel(addr, ®s->address); while (len-- && !is_arbitration_lost(regs)) { writel(*(cur_data++), ®s->data); + /* Trigger write only after loading data */ + if (start) { + writel(addr, ®s->address); + start = 0; + } if (len && readl(®s->transfer_size) == CDNS_I2C_FIFO_DEPTH) { ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP | CDNS_I2C_INTERRUPT_ARBLOST); @@ -375,7 +383,6 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, curr_recv_count = recv_count; } } else if (recv_count && !hold_quirk && !curr_recv_count) { - writel(addr, ®s->address); if (recv_count > CDNS_I2C_TRANSFER_SIZE) { writel(CDNS_I2C_TRANSFER_SIZE, ®s->transfer_size); @@ -384,6 +391,7 @@ static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data, writel(recv_count, ®s->transfer_size); curr_recv_count = recv_count; } + writel(addr, ®s->address); } } diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig index cc87fbf..430d076 100644 --- a/drivers/led/Kconfig +++ b/drivers/led/Kconfig @@ -28,6 +28,13 @@ config LED_BCM6358 LED HW controller accessed via MMIO registers. HW has no blinking capabilities and up to 32 LEDs can be controlled. +config LED_BCM6753 + bool "LED Support for BCM6753" + depends on LED && ARCH_BCM6753 + help + This option enables support for LEDs connected to the BCM6753 + HW has blinking and fading capabilities and up to 32 LEDs can be controlled. + config LED_BCM6858 bool "LED Support for BCM6858" depends on LED && (ARCH_BCM68360 || ARCH_BCM6858 || ARCH_BCM63158) diff --git a/drivers/led/Makefile b/drivers/led/Makefile index 8e3ae7f..2aa2c21 100644 --- a/drivers/led/Makefile +++ b/drivers/led/Makefile @@ -6,6 +6,7 @@ obj-y += led-uclass.o obj-$(CONFIG_LED_BCM6328) += led_bcm6328.o obj-$(CONFIG_LED_BCM6358) += led_bcm6358.o +obj-$(CONFIG_LED_BCM6753) += led_bcm6753.o obj-$(CONFIG_LED_BCM6858) += led_bcm6858.o obj-$(CONFIG_$(SPL_)LED_GPIO) += led_gpio.o obj-$(CONFIG_LED_CORTINA) += led_cortina.o diff --git a/drivers/led/led_bcm6753.c b/drivers/led/led_bcm6753.c new file mode 100644 index 0000000..a32bd82 --- /dev/null +++ b/drivers/led/led_bcm6753.c @@ -0,0 +1,270 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com> + * + * based on: + * drivers/led/led_bcm6858.c + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <led.h> +#include <log.h> +#include <asm/io.h> +#include <dm/lists.h> +#include <linux/bitops.h> + +#define LEDS_MAX 32 +#define LEDS_WAIT 100 + +/* LED Mode register */ +#define LED_MODE_REG 0x0 +#define LED_MODE_OFF 0 +#define LED_MODE_ON 1 +#define LED_MODE_MASK 1 + +/* LED Controller Global settings register */ +#define CLED_CTRL_REG 0x00 +#define CLED_CTRL_SERIAL_LED_DATA_PPOL BIT(1) +#define CLED_CTRL_SERIAL_LED_CLK_POL BIT(2) +#define CLED_CTRL_SERIAL_LED_EN_POL BIT(3) +#define CLED_CTRL_SERIAL_LED_MSB_FIRST BIT(4) +#define CLED_CTRL_MASK 0x1E +/* LED Controller IP LED source select register */ +#define CLED_HW_LED_EN_REG 0x04 +/* Hardware LED Polarity register */ +#define CLED_HW_LED_IP_PPOL_REG 0x0c +/* Soft LED Set Register */ +#define CLED_SW_LED_IP_SET_REG 0x10 +/* Parallel LED Output Polarity Register */ +#define CLED_PLED_OP_PPOL_REG 0x18 +/* LED Channel activate register */ +#define CLED_LED_CH_ACTIVATE_REG 0x1c +/* LED 0 Config 0 reg */ +#define CLED_LED_0_CONFIG_0 0x20 +/* Soft LED Clear Register */ +#define CLED_SW_LED_IP_CLEAR_REG 0x444 +/* Soft LED Status Register */ +#define CLED_SW_LED_IP_STATUS_REG 0x448 + +/* Size of all registers used for the config of one LED */ +#define CLED_CONFIG_SIZE (4 * sizeof(u32)) + +#define CLED_CONFIG0_MODE 0 +#define CLED_CONFIG0_MODE_MASK (BIT(0) | BIT(1)) +#define CLED_CONFIG0_MODE_STEADY 0 +#define CLED_CONFIG0_MODE_FADING 1 +#define CLED_CONFIG0_MODE_PULSATING 2 + +#define CLED_CONFIG0_FLASH_CTRL_SHIFT 3 +#define CLED_CONFIG0_FLASH_CTRL_MASK (BIT(3) | BIT(4) | BIT(5)) + +struct bcm6753_led_priv { + void __iomem *regs; + u8 pin; +}; + +/* + * The value for flash rate are: + * 0 : no blinking + * 1 : rate is 25 Hz => 40 ms (period) + * 2 : rate is 12.5 Hz => 80 ms (period) + * 3 : rate is 6.25 Hz => 160 ms (period) + * 4 : rate is 3.125 Hz => 320 ms (period) + * 5 : rate is 1.5625 Hz => 640 ms (period) + * 6 : rate is 0.7815 Hz => 1280 ms (period) + * 7 : rate is 0.390625 Hz => 2560 ms (period) + */ +static const int bcm6753_flash_rate[8] = { + 0, 40, 80, 160, 320, 640, 1280, 2560 +}; + +static u32 bcm6753_flash_rate_value(int period_ms) +{ + unsigned long value = 7; + int i; + + for (i = 0; i < ARRAY_SIZE(bcm6753_flash_rate); i++) { + if (period_ms <= bcm6753_flash_rate[i]) { + value = i; + break; + } + } + + return value; +} + +static int bcm6753_led_set_period(struct udevice *dev, int period_ms) +{ + struct bcm6753_led_priv *priv = dev_get_priv(dev); + u32 offset, shift, value; + + offset = CLED_LED_0_CONFIG_0 + (CLED_CONFIG_SIZE * priv->pin); + value = bcm6753_flash_rate_value(period_ms); + shift = CLED_CONFIG0_FLASH_CTRL_SHIFT; + + /* set mode steady */ + clrbits_32(priv->regs + offset, CLED_CONFIG0_MODE_MASK); + setbits_32(priv->regs + offset, CLED_CONFIG0_MODE_STEADY); + + /* set flash rate */ + clrbits_32(priv->regs + offset, CLED_CONFIG0_FLASH_CTRL_MASK); + setbits_32(priv->regs + offset, value << shift); + + /* enable config */ + setbits_32(priv->regs + CLED_LED_CH_ACTIVATE_REG, 1 << priv->pin); + + return 0; +} + +static enum led_state_t bcm6753_led_get_state(struct udevice *dev) +{ + struct bcm6753_led_priv *priv = dev_get_priv(dev); + enum led_state_t state = LEDST_OFF; + u32 sw_led_ip_status; + + sw_led_ip_status = readl(priv->regs + CLED_SW_LED_IP_STATUS_REG); + if (sw_led_ip_status & (1 << priv->pin)) + state = LEDST_ON; + + return state; +} + +static int bcm6753_led_set_state(struct udevice *dev, enum led_state_t state) +{ + struct bcm6753_led_priv *priv = dev_get_priv(dev); + + switch (state) { + case LEDST_OFF: + setbits_32(priv->regs + CLED_SW_LED_IP_CLEAR_REG, (1 << priv->pin)); + if (IS_ENABLED(CONFIG_LED_BLINK)) + bcm6753_led_set_period(dev, 0); + break; + case LEDST_ON: + setbits_32(priv->regs + CLED_SW_LED_IP_SET_REG, (1 << priv->pin)); + if (IS_ENABLED(CONFIG_LED_BLINK)) + bcm6753_led_set_period(dev, 0); + break; + case LEDST_TOGGLE: + if (bcm6753_led_get_state(dev) == LEDST_OFF) + return bcm6753_led_set_state(dev, LEDST_ON); + else + return bcm6753_led_set_state(dev, LEDST_OFF); + break; +#ifdef CONFIG_LED_BLINK + case LEDST_BLINK: + setbits_32(priv->regs + CLED_SW_LED_IP_SET_REG, (1 << priv->pin)); + break; +#endif + default: + return -EINVAL; + } + + return 0; +} + +static const struct led_ops bcm6753_led_ops = { + .get_state = bcm6753_led_get_state, + .set_state = bcm6753_led_set_state, +#ifdef CONFIG_LED_BLINK + .set_period = bcm6753_led_set_period, +#endif +}; + +static int bcm6753_led_probe(struct udevice *dev) +{ + struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev); + + /* Top-level LED node */ + if (!uc_plat->label) { + void __iomem *regs; + u32 set_bits = 0; + + regs = dev_remap_addr(dev); + if (!regs) + return -EINVAL; + + if (dev_read_bool(dev, "brcm,serial-led-msb-first")) + set_bits |= CLED_CTRL_SERIAL_LED_MSB_FIRST; + if (dev_read_bool(dev, "brcm,serial-led-en-pol")) + set_bits |= CLED_CTRL_SERIAL_LED_EN_POL; + if (dev_read_bool(dev, "brcm,serial-led-clk-pol")) + set_bits |= CLED_CTRL_SERIAL_LED_CLK_POL; + if (dev_read_bool(dev, "brcm,serial-led-data-ppol")) + set_bits |= CLED_CTRL_SERIAL_LED_DATA_PPOL; + + clrsetbits_32(regs + CLED_CTRL_REG, CLED_CTRL_MASK, set_bits); + } else { + struct bcm6753_led_priv *priv = dev_get_priv(dev); + void __iomem *regs; + unsigned int pin; + + regs = dev_remap_addr(dev_get_parent(dev)); + if (!regs) + return -EINVAL; + + pin = dev_read_u32_default(dev, "reg", LEDS_MAX); + if (pin >= LEDS_MAX) + return -EINVAL; + + priv->regs = regs; + priv->pin = pin; + + /* this led is managed by software */ + clrbits_32(regs + CLED_HW_LED_EN_REG, 1 << pin); + + /* configure the polarity */ + if (dev_read_bool(dev, "active-low")) + clrbits_32(regs + CLED_PLED_OP_PPOL_REG, 1 << pin); + else + setbits_32(regs + CLED_PLED_OP_PPOL_REG, 1 << pin); + } + + return 0; +} + +static int bcm6753_led_bind(struct udevice *parent) +{ + ofnode node; + + dev_for_each_subnode(node, parent) { + struct led_uc_plat *uc_plat; + struct udevice *dev; + const char *label; + int ret; + + label = ofnode_read_string(node, "label"); + if (!label) { + debug("%s: node %s has no label\n", __func__, + ofnode_get_name(node)); + return -EINVAL; + } + + ret = device_bind_driver_to_node(parent, "bcm6753-led", + ofnode_get_name(node), + node, &dev); + if (ret) + return ret; + + uc_plat = dev_get_uclass_plat(dev); + uc_plat->label = label; + } + + return 0; +} + +static const struct udevice_id bcm6753_led_ids[] = { + { .compatible = "brcm,bcm6753-leds" }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm6753_led) = { + .name = "bcm6753-led", + .id = UCLASS_LED, + .of_match = bcm6753_led_ids, + .bind = bcm6753_led_bind, + .probe = bcm6753_led_probe, + .priv_auto = sizeof(struct bcm6753_led_priv), + .ops = &bcm6753_led_ops, +}; diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index 8200658..b2f4a4e 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -2019,6 +2019,7 @@ static const struct udevice_id omap_hsmmc_ids[] = { { .compatible = "ti,omap3-hsmmc" }, { .compatible = "ti,omap4-hsmmc" }, { .compatible = "ti,am33xx-hsmmc" }, + { .compatible = "ti,am335-sdhci" }, { .compatible = "ti,dra7-hsmmc", .data = (ulong)&dra7_mmc_of_data }, { } }; diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c index 5cea4c6..d96f5d5 100644 --- a/drivers/mmc/zynq_sdhci.c +++ b/drivers/mmc/zynq_sdhci.c @@ -12,9 +12,12 @@ #include <linux/delay.h> #include "mmc_private.h" #include <log.h> +#include <reset.h> #include <dm/device_compat.h> #include <linux/err.h> #include <linux/libfdt.h> +#include <asm/types.h> +#include <linux/math64.h> #include <asm/cache.h> #include <malloc.h> #include <sdhci.h> @@ -61,6 +64,7 @@ struct arasan_sdhci_priv { u8 deviceid; u8 bank; u8 no_1p8; + struct reset_ctl_bulk resets; }; /* For Versal platforms zynqmp_mmio_write() won't be available */ @@ -243,7 +247,7 @@ static int arasan_sdhci_execute_tuning(struct mmc *mmc, u8 opcode) char tuning_loop_counter = SDHCI_TUNING_LOOP_COUNT; u8 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; - debug("%s\n", __func__); + dev_dbg(mmc->dev, "%s\n", __func__); host = priv->host; @@ -703,6 +707,87 @@ static const struct sdhci_ops arasan_ops = { }; #endif +#if defined(CONFIG_ARCH_ZYNQMP) +static int sdhci_zynqmp_set_dynamic_config(struct arasan_sdhci_priv *priv, + struct udevice *dev) +{ + int ret; + u32 node_id = priv->deviceid ? NODE_SD_1 : NODE_SD_0; + struct clk clk; + unsigned long clock, mhz; + + ret = xilinx_pm_request(PM_REQUEST_NODE, node_id, ZYNQMP_PM_CAPABILITY_ACCESS, + ZYNQMP_PM_MAX_QOS, ZYNQMP_PM_REQUEST_ACK_NO, NULL); + if (ret) { + dev_err(dev, "Request node failed for %d\n", node_id); + return ret; + } + + ret = reset_get_bulk(dev, &priv->resets); + if (ret == -ENOTSUPP || ret == -ENOENT) { + dev_err(dev, "Reset not found\n"); + return 0; + } else if (ret) { + dev_err(dev, "Reset failed\n"); + return ret; + } + + ret = reset_assert_bulk(&priv->resets); + if (ret) { + dev_err(dev, "Reset assert failed\n"); + return ret; + } + + ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_FIXED, 0); + if (ret) { + dev_err(dev, "SD_CONFIG_FIXED failed\n"); + return ret; + } + + ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_EMMC_SEL, + dev_read_bool(dev, "non-removable")); + if (ret) { + dev_err(dev, "SD_CONFIG_EMMC_SEL failed\n"); + return ret; + } + + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { + dev_err(dev, "failed to get clock\n"); + return ret; + } + + clock = clk_get_rate(&clk); + if (IS_ERR_VALUE(clock)) { + dev_err(dev, "failed to get rate\n"); + return clock; + } + + mhz = DIV64_U64_ROUND_UP(clock, 1000000); + + ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_BASECLK, mhz); + if (ret) { + dev_err(dev, "SD_CONFIG_BASECLK failed\n"); + return ret; + } + + ret = zynqmp_pm_set_sd_config(node_id, SD_CONFIG_8BIT, + (dev_read_u32_default(dev, "bus-width", 1) == 8)); + if (ret) { + dev_err(dev, "SD_CONFIG_8BIT failed\n"); + return ret; + } + + ret = reset_deassert_bulk(&priv->resets); + if (ret) { + dev_err(dev, "Reset release failed\n"); + return ret; + } + + return 0; +} +#endif + static int arasan_sdhci_probe(struct udevice *dev) { struct arasan_sdhci_plat *plat = dev_get_plat(dev); @@ -715,6 +800,18 @@ static int arasan_sdhci_probe(struct udevice *dev) host = priv->host; +#if defined(CONFIG_ARCH_ZYNQMP) + if (device_is_compatible(dev, "xlnx,zynqmp-8.9a")) { + ret = zynqmp_pm_is_function_supported(PM_IOCTL, + IOCTL_SET_SD_CONFIG); + if (!ret) { + ret = sdhci_zynqmp_set_dynamic_config(priv, dev); + if (ret) + return ret; + } + } +#endif + ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) { dev_err(dev, "failed to get clock\n"); @@ -727,7 +824,7 @@ static int arasan_sdhci_probe(struct udevice *dev) return clock; } - debug("%s: CLK %ld\n", __func__, clock); + dev_dbg(dev, "%s: CLK %ld\n", __func__, clock); ret = clk_enable(&clk); if (ret) { @@ -769,12 +866,13 @@ static int arasan_sdhci_probe(struct udevice *dev) * causing sd card timeout error. Workaround this by adding a wait for * 1000msec till the card detect state gets stable. */ - if (IS_ENABLED(CONFIG_ARCH_VERSAL)) { - u32 timeout = 1000; + if (IS_ENABLED(CONFIG_ARCH_ZYNQMP) || IS_ENABLED(CONFIG_ARCH_VERSAL)) { + u32 timeout = 1000000; while (((sdhci_readl(host, SDHCI_PRESENT_STATE) & - SDHCI_CARD_STATE_STABLE) == 0) && timeout--) { - mdelay(1); + SDHCI_CARD_STATE_STABLE) == 0) && timeout) { + udelay(1); + timeout--; } if (!timeout) { dev_err(dev, "Sdhci card detect state not stable\n"); diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index bde3004..588ebe9 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -52,6 +52,13 @@ config CFI_FLASH option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> for more information on CFI. +config CFI_FLASH_USE_WEAK_ACCESSORS + bool "Allow read/write functions to be overridden" + depends on FLASH_CFI_DRIVER + help + Enable this option to allow for the flash_{read,write}{8,16,32,64} + functions to be overridden by the platform. + config SYS_FLASH_USE_BUFFER_WRITE bool "Enable buffered writes to flash" depends on FLASH_CFI_DRIVER diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 0e826c1..1eab21e 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -91,6 +91,12 @@ config NAND_BRCMNAND_6368 help Enable support for broadcom nand driver on bcm6368. +config NAND_BRCMNAND_6753 + bool "Support Broadcom NAND controller on bcm6753" + depends on NAND_BRCMNAND && ARCH_BCM6753 + help + Enable support for broadcom nand driver on bcm6753. + config NAND_BRCMNAND_68360 bool "Support Broadcom NAND controller on bcm68360" depends on NAND_BRCMNAND && ARCH_BCM68360 diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 5d9e7e3..f46a7ed 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_NAND_BRCMNAND_6368) += bcm6368_nand.o obj-$(CONFIG_NAND_BRCMNAND_63158) += bcm63158_nand.o +obj-$(CONFIG_NAND_BRCMNAND_6753) += bcm6753_nand.o obj-$(CONFIG_NAND_BRCMNAND_68360) += bcm68360_nand.o obj-$(CONFIG_NAND_BRCMNAND_6838) += bcm6838_nand.o obj-$(CONFIG_NAND_BRCMNAND_6858) += bcm6858_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c new file mode 100644 index 0000000..feae66e --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcm6753_nand.c @@ -0,0 +1,124 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include <common.h> +#include <asm/io.h> +#include <memalign.h> +#include <nand.h> +#include <linux/bitops.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/ioport.h> +#include <dm.h> + +#include "brcmnand.h" + +struct bcm6753_nand_soc { + struct brcmnand_soc soc; + void __iomem *base; +}; + +#define BCM6753_NAND_INT 0x00 +#define BCM6753_NAND_STATUS_SHIFT 0 +#define BCM6753_NAND_STATUS_MASK (0xfff << BCM6753_NAND_STATUS_SHIFT) + +#define BCM6753_NAND_INT_EN 0x04 +#define BCM6753_NAND_ENABLE_SHIFT 0 +#define BCM6753_NAND_ENABLE_MASK (0xffff << BCM6753_NAND_ENABLE_SHIFT) + +enum { + BCM6753_NP_READ = BIT(0), + BCM6753_BLOCK_ERASE = BIT(1), + BCM6753_COPY_BACK = BIT(2), + BCM6753_PAGE_PGM = BIT(3), + BCM6753_CTRL_READY = BIT(4), + BCM6753_DEV_RBPIN = BIT(5), + BCM6753_ECC_ERR_UNC = BIT(6), + BCM6753_ECC_ERR_CORR = BIT(7), +}; + +static bool bcm6753_nand_intc_ack(struct brcmnand_soc *soc) +{ + struct bcm6753_nand_soc *priv = + container_of(soc, struct bcm6753_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6753_NAND_INT; + u32 val = brcmnand_readl(mmio); + + if (val & (BCM6753_CTRL_READY << BCM6753_NAND_STATUS_SHIFT)) { + /* Ack interrupt */ + val &= ~BCM6753_NAND_STATUS_MASK; + val |= BCM6753_CTRL_READY << BCM6753_NAND_STATUS_SHIFT; + brcmnand_writel(val, mmio); + return true; + } + + return false; +} + +static void bcm6753_nand_intc_set(struct brcmnand_soc *soc, bool en) +{ + struct bcm6753_nand_soc *priv = + container_of(soc, struct bcm6753_nand_soc, soc); + void __iomem *mmio = priv->base + BCM6753_NAND_INT_EN; + u32 val = brcmnand_readl(mmio); + + /* Don't ack any interrupts */ + val &= ~BCM6753_NAND_STATUS_MASK; + + if (en) + val |= BCM6753_CTRL_READY << BCM6753_NAND_ENABLE_SHIFT; + else + val &= ~(BCM6753_CTRL_READY << BCM6753_NAND_ENABLE_SHIFT); + + brcmnand_writel(val, mmio); +} + +static int bcm6753_nand_probe(struct udevice *dev) +{ + struct udevice *pdev = dev; + struct bcm6753_nand_soc *priv = dev_get_priv(dev); + struct brcmnand_soc *soc; + struct resource res; + + soc = &priv->soc; + + dev_read_resource_byname(pdev, "nand-int-base", &res); + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + soc->ctlrdy_ack = bcm6753_nand_intc_ack; + soc->ctlrdy_set_enabled = bcm6753_nand_intc_set; + + /* Disable and ack all interrupts */ + brcmnand_writel(0, priv->base + BCM6753_NAND_INT_EN); + brcmnand_writel(0, priv->base + BCM6753_NAND_INT); + + return brcmnand_probe(pdev, soc); +} + +static const struct udevice_id bcm6753_nand_dt_ids[] = { + { + .compatible = "brcm,nand-bcm6753", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(bcm6753_nand) = { + .name = "bcm6753-nand", + .id = UCLASS_MTD, + .of_match = bcm6753_nand_dt_ids, + .probe = bcm6753_nand_probe, + .priv_auto = sizeof(struct bcm6753_nand_soc), +}; + +void board_nand_init(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_MTD, + DM_DRIVER_GET(bcm6753_nand), &dev); + if (ret && ret != -ENODEV) + pr_err("Failed to initialize %s. (error %d)\n", dev->name, + ret); +} diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c index d792528..10e9cd1 100644 --- a/drivers/mtd/nand/raw/zynq_nand.c +++ b/drivers/mtd/nand/raw/zynq_nand.c @@ -1086,10 +1086,13 @@ static int zynq_nand_probe(struct udevice *dev) int is_16bit_bw; smc->reg = (struct zynq_nand_smc_regs *)dev_read_addr(dev); - of_nand = dev_read_subnode(dev, "flash@e1000000"); + of_nand = dev_read_subnode(dev, "nand-controller@0,0"); if (!ofnode_valid(of_nand)) { - printf("Failed to find nand node in dt\n"); - return -ENODEV; + of_nand = dev_read_subnode(dev, "flash@e1000000"); + if (!ofnode_valid(of_nand)) { + printf("Failed to find nand node in dt\n"); + return -ENODEV; + } } if (!ofnode_is_available(of_nand)) { diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 71e0cba..a6171a7 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -423,6 +423,11 @@ config KSZ9477 This driver implements a DSA switch driver for the KSZ9477 family of GbE switches using the I2C interface. +config LPC32XX_ETH + bool "LPC32xx Ethernet MAC interface driver" + depends on ARCH_LPC32XX + default y + config MVGBE bool "Marvell Orion5x/Kirkwood network interface support" depends on ARCH_KIRKWOOD || ARCH_ORION5X @@ -535,6 +540,11 @@ config MII help Enable support of the Media-Independent Interface (MII) +config RMII + bool "Enable RMII" + help + Enable support of the Reduced Media-Independent Interface (MII) + config PCNET bool "AMD PCnet series Ethernet controller driver" help diff --git a/drivers/net/bcm6348-eth.c b/drivers/net/bcm6348-eth.c index aad7b61..06e0dd7 100644 --- a/drivers/net/bcm6348-eth.c +++ b/drivers/net/bcm6348-eth.c @@ -461,11 +461,7 @@ static int bcm6348_eth_probe(struct udevice *dev) return ret; } - ret = clk_free(&clk); - if (ret < 0) { - pr_err("%s: error freeing clock %d\n", __func__, i); - return ret; - } + clk_free(&clk); } /* try to perform resets */ diff --git a/drivers/net/bcm6368-eth.c b/drivers/net/bcm6368-eth.c index 29abe7f..c2a8b9f 100644 --- a/drivers/net/bcm6368-eth.c +++ b/drivers/net/bcm6368-eth.c @@ -546,11 +546,7 @@ static int bcm6368_eth_probe(struct udevice *dev) return ret; } - ret = clk_free(&clk); - if (ret < 0) { - pr_err("%s: error freeing clock %d\n", __func__, i); - return ret; - } + clk_free(&clk); } /* try to perform resets */ diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 985b038..e8ebef0 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -54,10 +54,6 @@ DECLARE_GLOBAL_DATA_PTR; #error "CONFIG_MII has to be defined!" #endif -#ifndef CONFIG_FEC_XCV_TYPE -#define CONFIG_FEC_XCV_TYPE MII100 -#endif - /* * The i.MX28 operates with packets in big endian. We need to swap them before * sending and after receiving. @@ -408,20 +404,11 @@ static int fec_get_hwaddr(int dev_id, unsigned char *mac) return !is_valid_ethaddr(mac); } -#ifdef CONFIG_DM_ETH static int fecmxc_set_hwaddr(struct udevice *dev) -#else -static int fec_set_hwaddr(struct eth_device *dev) -#endif { -#ifdef CONFIG_DM_ETH struct fec_priv *fec = dev_get_priv(dev); struct eth_pdata *pdata = dev_get_plat(dev); uchar *mac = pdata->enetaddr; -#else - uchar *mac = dev->enetaddr; - struct fec_priv *fec = (struct fec_priv *)dev->priv; -#endif writel(0, &fec->eth->iaddr1); writel(0, &fec->eth->iaddr2); @@ -468,17 +455,9 @@ static void fec_reg_setup(struct fec_priv *fec) * Start the FEC engine * @param[in] dev Our device to handle */ -#ifdef CONFIG_DM_ETH static int fec_open(struct udevice *dev) -#else -static int fec_open(struct eth_device *edev) -#endif { -#ifdef CONFIG_DM_ETH struct fec_priv *fec = dev_get_priv(dev); -#else - struct fec_priv *fec = (struct fec_priv *)edev->priv; -#endif int speed; ulong addr, size; int i; @@ -589,27 +568,15 @@ static int fec_open(struct eth_device *edev) return 0; } -#ifdef CONFIG_DM_ETH static int fecmxc_init(struct udevice *dev) -#else -static int fec_init(struct eth_device *dev, struct bd_info *bd) -#endif { -#ifdef CONFIG_DM_ETH struct fec_priv *fec = dev_get_priv(dev); -#else - struct fec_priv *fec = (struct fec_priv *)dev->priv; -#endif u8 *mib_ptr = (uint8_t *)&fec->eth->rmon_t_drop; u8 *i; ulong addr; /* Initialize MAC address */ -#ifdef CONFIG_DM_ETH fecmxc_set_hwaddr(dev); -#else - fec_set_hwaddr(dev); -#endif /* Setup transmit descriptors, there are two in total. */ fec_tbd_init(fec); @@ -661,17 +628,9 @@ static int fec_init(struct eth_device *dev, struct bd_info *bd) * Halt the FEC engine * @param[in] dev Our device to handle */ -#ifdef CONFIG_DM_ETH static void fecmxc_halt(struct udevice *dev) -#else -static void fec_halt(struct eth_device *dev) -#endif { -#ifdef CONFIG_DM_ETH struct fec_priv *fec = dev_get_priv(dev); -#else - struct fec_priv *fec = (struct fec_priv *)dev->priv; -#endif int counter = 0xffff; /* issue graceful stop command to the FEC transmitter if necessary */ @@ -705,11 +664,7 @@ static void fec_halt(struct eth_device *dev) * @param[in] length Data count in bytes * Return: 0 on success */ -#ifdef CONFIG_DM_ETH static int fecmxc_send(struct udevice *dev, void *packet, int length) -#else -static int fec_send(struct eth_device *dev, void *packet, int length) -#endif { unsigned int status; u32 size; @@ -721,11 +676,7 @@ static int fec_send(struct eth_device *dev, void *packet, int length) * This routine transmits one frame. This routine only accepts * 6-byte Ethernet addresses. */ -#ifdef CONFIG_DM_ETH struct fec_priv *fec = dev_get_priv(dev); -#else - struct fec_priv *fec = (struct fec_priv *)dev->priv; -#endif /* * Check for valid length of data. @@ -856,17 +807,9 @@ out: * @param[in] dev Our ethernet device to handle * Return: Length of packet read */ -#ifdef CONFIG_DM_ETH static int fecmxc_recv(struct udevice *dev, int flags, uchar **packetp) -#else -static int fec_recv(struct eth_device *dev) -#endif { -#ifdef CONFIG_DM_ETH struct fec_priv *fec = dev_get_priv(dev); -#else - struct fec_priv *fec = (struct fec_priv *)dev->priv; -#endif struct fec_bd *rbd = &fec->rbd_base[fec->rbd_index]; unsigned long ievent; int frame_length, len = 0; @@ -874,28 +817,19 @@ static int fec_recv(struct eth_device *dev) ulong addr, size, end; int i; -#ifdef CONFIG_DM_ETH *packetp = memalign(ARCH_DMA_MINALIGN, FEC_MAX_PKT_SIZE); if (*packetp == 0) { printf("%s: error allocating packetp\n", __func__); return -ENOMEM; } -#else - ALLOC_CACHE_ALIGN_BUFFER(uchar, buff, FEC_MAX_PKT_SIZE); -#endif /* Check if any critical events have happened */ ievent = readl(&fec->eth->ievent); writel(ievent, &fec->eth->ievent); debug("fec_recv: ievent 0x%lx\n", ievent); if (ievent & FEC_IEVENT_BABR) { -#ifdef CONFIG_DM_ETH fecmxc_halt(dev); fecmxc_init(dev); -#else - fec_halt(dev); - fec_init(dev, fec->bd); -#endif printf("some error: 0x%08lx\n", ievent); return 0; } @@ -907,18 +841,10 @@ static int fec_recv(struct eth_device *dev) if (ievent & FEC_IEVENT_GRA) { /* Graceful stop complete */ if (readl(&fec->eth->x_cntrl) & 0x00000001) { -#ifdef CONFIG_DM_ETH fecmxc_halt(dev); -#else - fec_halt(dev); -#endif writel(~0x00000001 & readl(&fec->eth->x_cntrl), &fec->eth->x_cntrl); -#ifdef CONFIG_DM_ETH fecmxc_init(dev); -#else - fec_init(dev, fec->bd); -#endif } } @@ -959,12 +885,7 @@ static int fec_recv(struct eth_device *dev) swap_packet((uint32_t *)addr, frame_length); #endif -#ifdef CONFIG_DM_ETH memcpy(*packetp, (char *)addr, frame_length); -#else - memcpy(buff, (char *)addr, frame_length); - net_process_received_packet(buff, frame_length); -#endif len = frame_length; } else { if (bd_status & FEC_RBD_ERR) @@ -1104,175 +1025,6 @@ struct mii_dev *fec_get_miibus(ulong base_addr, int dev_id) return bus; } -#ifndef CONFIG_DM_ETH -#ifdef CONFIG_PHYLIB -int fec_probe(struct bd_info *bd, int dev_id, uint32_t base_addr, - struct mii_dev *bus, struct phy_device *phydev) -#else -static int fec_probe(struct bd_info *bd, int dev_id, uint32_t base_addr, - struct mii_dev *bus, int phy_id) -#endif -{ - struct eth_device *edev; - struct fec_priv *fec; - unsigned char ethaddr[6]; - char mac[16]; - uint32_t start; - int ret = 0; - - /* create and fill edev struct */ - edev = (struct eth_device *)malloc(sizeof(struct eth_device)); - if (!edev) { - puts("fec_mxc: not enough malloc memory for eth_device\n"); - ret = -ENOMEM; - goto err1; - } - - fec = (struct fec_priv *)malloc(sizeof(struct fec_priv)); - if (!fec) { - puts("fec_mxc: not enough malloc memory for fec_priv\n"); - ret = -ENOMEM; - goto err2; - } - - memset(edev, 0, sizeof(*edev)); - memset(fec, 0, sizeof(*fec)); - - ret = fec_alloc_descs(fec); - if (ret) - goto err3; - - edev->priv = fec; - edev->init = fec_init; - edev->send = fec_send; - edev->recv = fec_recv; - edev->halt = fec_halt; - edev->write_hwaddr = fec_set_hwaddr; - - fec->eth = (struct ethernet_regs *)(ulong)base_addr; - fec->bd = bd; - - fec->xcv_type = CONFIG_FEC_XCV_TYPE; - - /* Reset chip. */ - writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_RESET, &fec->eth->ecntrl); - start = get_timer(0); - while (readl(&fec->eth->ecntrl) & FEC_ECNTRL_RESET) { - if (get_timer(start) > (CONFIG_SYS_HZ * 5)) { - printf("FEC MXC: Timeout resetting chip\n"); - goto err4; - } - udelay(10); - } - - fec_reg_setup(fec); - fec_set_dev_name(edev->name, dev_id); - fec->dev_id = (dev_id == -1) ? 0 : dev_id; - fec->bus = bus; - fec_mii_setspeed(bus->priv); -#ifdef CONFIG_PHYLIB - fec->phydev = phydev; - phy_connect_dev(phydev, edev); - /* Configure phy */ - phy_config(phydev); -#else - fec->phy_id = phy_id; -#endif - eth_register(edev); - /* only support one eth device, the index number pointed by dev_id */ - edev->index = fec->dev_id; - - if (fec_get_hwaddr(fec->dev_id, ethaddr) == 0) { - debug("got MAC%d address from fuse: %pM\n", fec->dev_id, ethaddr); - memcpy(edev->enetaddr, ethaddr, 6); - if (fec->dev_id) - sprintf(mac, "eth%daddr", fec->dev_id); - else - strcpy(mac, "ethaddr"); - if (!env_get(mac)) - eth_env_set_enetaddr(mac, ethaddr); - } - return ret; -err4: - fec_free_descs(fec); -err3: - free(fec); -err2: - free(edev); -err1: - return ret; -} - -int fecmxc_initialize_multi(struct bd_info *bd, int dev_id, int phy_id, - uint32_t addr) -{ - uint32_t base_mii; - struct mii_dev *bus = NULL; -#ifdef CONFIG_PHYLIB - struct phy_device *phydev = NULL; -#endif - int ret; - - if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) { - if (enet_fused((ulong)addr)) { - printf("SoC fuse indicates Ethernet@0x%x is unavailable.\n", addr); - return -ENODEV; - } - } - -#ifdef CONFIG_FEC_MXC_MDIO_BASE - /* - * The i.MX28 has two ethernet interfaces, but they are not equal. - * Only the first one can access the MDIO bus. - */ - base_mii = CONFIG_FEC_MXC_MDIO_BASE; -#else - base_mii = addr; -#endif - debug("eth_init: fec_probe(bd, %i, %i) @ %08x\n", dev_id, phy_id, addr); - bus = fec_get_miibus(base_mii, dev_id); - if (!bus) - return -ENOMEM; -#ifdef CONFIG_PHYLIB - phydev = phy_find_by_mask(bus, 1 << phy_id, PHY_INTERFACE_MODE_RGMII); - if (!phydev) { - mdio_unregister(bus); - free(bus); - return -ENOMEM; - } - ret = fec_probe(bd, dev_id, addr, bus, phydev); -#else - ret = fec_probe(bd, dev_id, addr, bus, phy_id); -#endif - if (ret) { -#ifdef CONFIG_PHYLIB - free(phydev); -#endif - mdio_unregister(bus); - free(bus); - } - return ret; -} - -#ifdef CONFIG_FEC_MXC_PHYADDR -int fecmxc_initialize(struct bd_info *bd) -{ - return fecmxc_initialize_multi(bd, -1, CONFIG_FEC_MXC_PHYADDR, - IMX_FEC_BASE); -} -#endif - -#ifndef CONFIG_PHYLIB -int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)) -{ - struct fec_priv *fec = (struct fec_priv *)dev->priv; - fec->mii_postcall = cb; - return 0; -} -#endif - -#else - static int fecmxc_read_rom_hwaddr(struct udevice *dev) { struct fec_priv *priv = dev_get_priv(dev); @@ -1513,9 +1265,9 @@ static int fecmxc_probe(struct udevice *dev) priv->xcv_type = RGMII; break; default: - priv->xcv_type = CONFIG_FEC_XCV_TYPE; - printf("Unsupported interface type %d defaulting to %d\n", - priv->interface, priv->xcv_type); + priv->xcv_type = MII100; + printf("Unsupported interface type %d defaulting to MII100\n", + priv->interface); break; } @@ -1626,4 +1378,3 @@ U_BOOT_DRIVER(fecmxc_gem) = { .priv_auto = sizeof(struct fec_priv), .plat_auto = sizeof(struct eth_pdata), }; -#endif diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c index ca06b35..e2c8f41 100644 --- a/drivers/net/mcfmii.c +++ b/drivers/net/mcfmii.c @@ -200,9 +200,7 @@ int mii_discover_phy(fec_info_t *info) } #endif /* CONFIG_SYS_DISCOVER_PHY */ -void mii_init(void) __attribute__((weak,alias("__mii_init"))); - -void __mii_init(void) +__weak void mii_init(void) { #ifdef CONFIG_DM_ETH struct udevice *dev; diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 4f8d33c..014a4de 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -2,6 +2,10 @@ config BITBANGMII bool "Bit-banged ethernet MII management channel support" +config BITBANGMII_MULTI + bool "Enable the multi bus support" + depends on BITBANGMII + config MV88E6352_SWITCH bool "Marvell 88E6352 switch support" @@ -307,6 +311,14 @@ config PHY_XILINX_GMII2RGMII as bridge between MAC connected over GMII and external phy that is connected over RGMII interface. +config PHY_ETHERNET_ID + bool "Read ethernet PHY id" + depends on DM_GPIO + default y if ZYNQ_GEM + help + Enable this config to read ethernet phy id from the phy node of DT + and create a phy device using id. + config PHY_FIXED bool "Fixed-Link PHY" depends on DM_ETH @@ -322,3 +334,11 @@ config PHY_NCSI depends on DM_ETH endif #PHYLIB + +config PHY_RESET_DELAY + int "Extra delay after reset before MII register access" + default 0 + help + Some PHYs need extra delay after reset before any MII register access + is possible. For such PHY, set this option to the usec delay + required. diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 77f7f60..b28440b 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_PHY_TI_DP83867) += dp83867.o obj-$(CONFIG_PHY_TI_DP83869) += dp83869.o obj-$(CONFIG_PHY_XILINX) += xilinx_phy.o obj-$(CONFIG_PHY_XILINX_GMII2RGMII) += xilinx_gmii2rgmii.o +obj-$(CONFIG_PHY_ETHERNET_ID) += ethernet_id.o obj-$(CONFIG_PHY_VITESSE) += vitesse.o obj-$(CONFIG_PHY_MSCC) += mscc.o obj-$(CONFIG_PHY_FIXED) += fixed.o diff --git a/drivers/net/phy/ethernet_id.c b/drivers/net/phy/ethernet_id.c new file mode 100644 index 0000000..5617ac3 --- /dev/null +++ b/drivers/net/phy/ethernet_id.c @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Xilinx ethernet phy reset driver + * + * Copyright (C) 2022 Xilinx, Inc. + */ + +#include <common.h> +#include <dm/device_compat.h> +#include <phy.h> +#include <linux/delay.h> +#include <asm/gpio.h> + +struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev, + phy_interface_t interface) +{ + struct phy_device *phydev; + struct ofnode_phandle_args phandle_args; + struct gpio_desc gpio; + ofnode node; + u32 id, assert, deassert; + u16 vendor, device; + int ret; + + if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0, + &phandle_args)) + return NULL; + + if (!ofnode_valid(phandle_args.node)) + return NULL; + + node = phandle_args.node; + + ret = ofnode_read_eth_phy_id(node, &vendor, &device); + if (ret) { + dev_err(dev, "Failed to read eth PHY id, err: %d\n", ret); + return NULL; + } + + ret = gpio_request_by_name_nodev(node, "reset-gpios", 0, &gpio, + GPIOD_ACTIVE_LOW); + if (!ret) { + assert = ofnode_read_u32_default(node, "reset-assert-us", 0); + deassert = ofnode_read_u32_default(node, + "reset-deassert-us", 0); + ret = dm_gpio_set_value(&gpio, 1); + if (ret) { + dev_err(dev, "Failed assert gpio, err: %d\n", ret); + return NULL; + } + + udelay(assert); + + ret = dm_gpio_set_value(&gpio, 0); + if (ret) { + dev_err(dev, "Failed deassert gpio, err: %d\n", ret); + return NULL; + } + + udelay(deassert); + } + + id = vendor << 16 | device; + phydev = phy_device_create(bus, 0, id, false, interface); + if (phydev) + phydev->node = node; + + return phydev; +} diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index c9fc208..92fff5b 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -659,9 +659,9 @@ static struct phy_driver *get_phy_driver(struct phy_device *phydev, return generic_for_interface(interface); } -static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, - u32 phy_id, bool is_c45, - phy_interface_t interface) +struct phy_device *phy_device_create(struct mii_dev *bus, int addr, + u32 phy_id, bool is_c45, + phy_interface_t interface) { struct phy_device *dev; @@ -872,7 +872,7 @@ int phy_reset(struct phy_device *phydev) return -1; } -#ifdef CONFIG_PHY_RESET_DELAY +#if CONFIG_PHY_RESET_DELAY > 0 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ #endif /* @@ -1047,6 +1047,11 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, phydev = phy_device_create(bus, 0, PHY_NCSI_ID, false, interface); #endif +#ifdef CONFIG_PHY_ETHERNET_ID + if (!phydev) + phydev = phy_connect_phy_id(bus, dev, interface); +#endif + #ifdef CONFIG_PHY_XILINX_GMII2RGMII if (!phydev) phydev = phy_connect_gmii2rgmii(bus, dev, interface); diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 4f7e61e..b0fc9ca 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -800,7 +800,7 @@ static int pcie_advk_setup_hw(struct pcie_advk *pcie) */ reg = advk_readl(pcie, ADVK_ROOT_PORT_PCI_CFG_OFF + PCI_CLASS_REVISION); reg &= ~0xffffff00; - reg |= (PCI_CLASS_BRIDGE_PCI << 8) << 8; + reg |= PCI_CLASS_BRIDGE_PCI_NORMAL << 8; advk_writel(pcie, reg, ADVK_ROOT_PORT_PCI_CFG_OFF + PCI_CLASS_REVISION); /* Enable generation and checking of ECRC on PCIe Root Port */ diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c index 34a561e..4902923 100644 --- a/drivers/pci/pci-rcar-gen3.c +++ b/drivers/pci/pci-rcar-gen3.c @@ -289,7 +289,7 @@ static int rcar_gen3_pcie_hw_init(struct udevice *dev) * class to match. Hardware takes care of propagating the IDSETR * settings, so there is no need to bother with a quirk. */ - writel(PCI_CLASS_BRIDGE_PCI << 16, priv->regs + IDSETR1); + writel(PCI_CLASS_BRIDGE_PCI_NORMAL << 8, priv->regs + IDSETR1); /* * Setup Secondary Bus Number & Subordinate Bus Number, even though diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index 1e180ee..8a81a74 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -6,7 +6,6 @@ */ #include <common.h> #include <asm/bitops.h> -#include <asm/cpm_85xx.h> #include <pci.h> #include <dm.h> #include <asm/fsl_law.h> diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c index f076693..d80f87e 100644 --- a/drivers/pci/pci_mvebu.c +++ b/drivers/pci/pci_mvebu.c @@ -440,7 +440,7 @@ static int mvebu_pcie_probe(struct udevice *dev) */ reg = readl(pcie->base + MVPCIE_ROOT_PORT_PCI_CFG_OFF + PCI_CLASS_REVISION); reg &= ~0xffffff00; - reg |= (PCI_CLASS_BRIDGE_PCI << 8) << 8; + reg |= PCI_CLASS_BRIDGE_PCI_NORMAL << 8; writel(reg, pcie->base + MVPCIE_ROOT_PORT_PCI_CFG_OFF + PCI_CLASS_REVISION); /* diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c index f8b1930..73d15e7 100644 --- a/drivers/pci/pci_rom.c +++ b/drivers/pci/pci_rom.c @@ -36,7 +36,6 @@ #include <pci_rom.h> #include <vbe.h> #include <video.h> -#include <video_fb.h> #include <acpi/acpi_s3.h> #include <asm/global_data.h> #include <linux/screen_info.h> diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c index fc05ee0..f8d66c0 100644 --- a/drivers/pci/pci_tegra.c +++ b/drivers/pci/pci_tegra.c @@ -325,8 +325,8 @@ static int pci_tegra_read_config(const struct udevice *bus, pci_dev_t bdf, /* fixup root port class */ if (PCI_BUS(bdf) == 0) { if ((offset & ~3) == PCI_CLASS_REVISION) { - value &= ~0x00ff0000; - value |= PCI_CLASS_BRIDGE_PCI << 16; + value &= ~0x00ffff00; + value |= PCI_CLASS_BRIDGE_PCI_NORMAL << 8; } } #endif diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c index 0490fd3..99891dc 100644 --- a/drivers/pci/pcie_dw_mvebu.c +++ b/drivers/pci/pcie_dw_mvebu.c @@ -539,9 +539,9 @@ static int pcie_dw_mvebu_probe(struct udevice *dev) PCIE_ATU_TYPE_MEM, pcie->mem.phys_start, pcie->mem.bus_start, pcie->mem.size); - /* Set the CLASS_REV of RC CFG header to PCI_CLASS_BRIDGE_PCI */ + /* Set the CLASS_REV of RC CFG header to PCI_CLASS_BRIDGE_PCI_NORMAL */ clrsetbits_le32(pcie->ctrl_base + PCI_CLASS_REVISION, - 0xffff << 16, PCI_CLASS_BRIDGE_PCI << 16); + 0xffffff << 8, PCI_CLASS_BRIDGE_PCI_NORMAL << 8); pcie_dw_set_host_bars(pcie->ctrl_base); diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c index cc6efdd..f5ba349 100644 --- a/drivers/pci/pcie_fsl.c +++ b/drivers/pci/pcie_fsl.c @@ -532,7 +532,7 @@ static int fsl_pcie_fixup_classcode(struct fsl_pcie *pcie) fsl_pcie_hose_read_config_dword(pcie, classcode_reg, &val); val &= 0xff; - val |= PCI_CLASS_BRIDGE_PCI << 16; + val |= PCI_CLASS_BRIDGE_PCI_NORMAL << 8; fsl_pcie_hose_write_config_dword(pcie, classcode_reg, val); if (pcie->block_rev >= PEX_IP_BLK_REV_3_0) diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index 756166f..2cec390 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -300,9 +300,9 @@ static int imx_pcie_regions_setup(struct imx_pcie_priv *priv) setbits_le32(priv->dbi_base + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - /* Set the CLASS_REV of RC CFG header to PCI_CLASS_BRIDGE_PCI */ + /* Set the CLASS_REV of RC CFG header to PCI_CLASS_BRIDGE_PCI_NORMAL */ setbits_le32(priv->dbi_base + PCI_CLASS_REVISION, - PCI_CLASS_BRIDGE_PCI << 16); + PCI_CLASS_BRIDGE_PCI_NORMAL << 8); /* Region #0 is used for Outbound CFG space access. */ writel(0, priv->dbi_base + PCIE_ATU_VIEWPORT); diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c index 85dfab5..d6d3a9e 100644 --- a/drivers/pci/pcie_iproc.c +++ b/drivers/pci/pcie_iproc.c @@ -1123,7 +1123,7 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie) PCI_BRIDGE_CTRL_REG_OFFSET, 4, &class); class &= ~PCI_BRIDGE_CTRL_REG_CLASS_MASK; - class |= (PCI_CLASS_BRIDGE_PCI << 8); + class |= PCI_CLASS_BRIDGE_PCI_NORMAL; iproc_pci_raw_config_write32(pcie, 0, PCI_BRIDGE_CTRL_REG_OFFSET, 4, class); diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c index 67039d2..72b4139 100644 --- a/drivers/pci/pcie_rockchip.c +++ b/drivers/pci/pcie_rockchip.c @@ -351,7 +351,7 @@ static int rockchip_pcie_init_port(struct udevice *dev) /* Initialize Root Complex registers. */ writel(PCIE_LM_VENDOR_ROCKCHIP, priv->apb_base + PCIE_LM_VENDOR_ID); - writel(PCI_CLASS_BRIDGE_PCI << 16, + writel(PCI_CLASS_BRIDGE_PCI_NORMAL << 8, priv->apb_base + PCIE_RC_BASE + PCI_CLASS_REVISION); writel(PCIE_LM_RCBARPIE | PCIE_LM_RCBARPIS, priv->apb_base + PCIE_LM_RCBAR); diff --git a/drivers/phy/bcm6318-usbh-phy.c b/drivers/phy/bcm6318-usbh-phy.c index 60608a5..1c10853 100644 --- a/drivers/phy/bcm6318-usbh-phy.c +++ b/drivers/phy/bcm6318-usbh-phy.c @@ -98,9 +98,7 @@ static int bcm6318_usbh_probe(struct udevice *dev) if (ret < 0) return ret; - ret = clk_free(&clk); - if (ret < 0) - return ret; + clk_free(&clk); /* enable power domain */ ret = power_domain_get(dev, &pwr_dom); diff --git a/drivers/phy/bcm6348-usbh-phy.c b/drivers/phy/bcm6348-usbh-phy.c index 1b6b5ad..ce6be3d 100644 --- a/drivers/phy/bcm6348-usbh-phy.c +++ b/drivers/phy/bcm6348-usbh-phy.c @@ -62,9 +62,7 @@ static int bcm6348_usbh_probe(struct udevice *dev) if (ret < 0) return ret; - ret = clk_free(&clk); - if (ret < 0) - return ret; + clk_free(&clk); /* perform reset */ ret = reset_get_by_index(dev, 0, &rst_ctl); diff --git a/drivers/phy/bcm6368-usbh-phy.c b/drivers/phy/bcm6368-usbh-phy.c index 4d3a63f..d057f1f 100644 --- a/drivers/phy/bcm6368-usbh-phy.c +++ b/drivers/phy/bcm6368-usbh-phy.c @@ -137,9 +137,7 @@ static int bcm6368_usbh_probe(struct udevice *dev) if (ret < 0) return ret; - ret = clk_free(&clk); - if (ret < 0) - return ret; + clk_free(&clk); #if defined(CONFIG_POWER_DOMAIN) /* enable power domain */ @@ -176,9 +174,7 @@ static int bcm6368_usbh_probe(struct udevice *dev) if (ret < 0) return ret; - ret = clk_free(&clk); - if (ret < 0) - return ret; + clk_free(&clk); } mdelay(100); diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 0394624..d7477d7 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -318,6 +318,16 @@ config PINCTRL_K210 Support pin multiplexing on the K210. The "FPIOA" can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. + +config PINCTRL_ZYNQMP + bool "Xilinx ZynqMP pin control driver" + depends on DM && PINCTRL_GENERIC && ARCH_ZYNQMP + default y + help + Support pin multiplexing control on Xilinx ZynqMP. The driver uses + Generic Pinctrl framework and is compatible with the Linux driver, + i.e. it uses the same device tree configuration. + endif source "drivers/pinctrl/broadcom/Kconfig" diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index df37c32..030c38f 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -30,3 +30,4 @@ obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o obj-$(CONFIG_$(SPL_)PINCTRL_STMFX) += pinctrl-stmfx.o obj-y += broadcom/ +obj-$(CONFIG_PINCTRL_ZYNQMP) += pinctrl-zynqmp.o diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2600.c b/drivers/pinctrl/aspeed/pinctrl_ast2600.c index 12cba83..97e8b4e 100644 --- a/drivers/pinctrl/aspeed/pinctrl_ast2600.c +++ b/drivers/pinctrl/aspeed/pinctrl_ast2600.c @@ -335,6 +335,102 @@ static struct aspeed_sig_desc pcie1rc_link[] = { { 0x500, BIT(24), 0 }, /* dedicate rc reset */ }; +static struct aspeed_sig_desc pwm0[] = { + {0x41c, BIT(16), 0}, +}; + +static struct aspeed_sig_desc pwm1[] = { + {0x41c, BIT(17), 0}, +}; + +static struct aspeed_sig_desc pwm2[] = { + {0x41c, BIT(18), 0}, +}; + +static struct aspeed_sig_desc pwm3[] = { + {0x41c, BIT(19), 0}, +}; + +static struct aspeed_sig_desc pwm4[] = { + {0x41c, BIT(20), 0}, +}; + +static struct aspeed_sig_desc pwm5[] = { + {0x41c, BIT(21), 0}, +}; + +static struct aspeed_sig_desc pwm6[] = { + {0x41c, BIT(22), 0}, +}; + +static struct aspeed_sig_desc pwm7[] = { + {0x41c, BIT(23), 0}, +}; + +static struct aspeed_sig_desc pwm8g0[] = { + {0x4B4, BIT(8), 0}, +}; + +static struct aspeed_sig_desc pwm8g1[] = { + {0x41c, BIT(24), 0}, +}; + +static struct aspeed_sig_desc pwm9g0[] = { + {0x4B4, BIT(9), 0}, +}; + +static struct aspeed_sig_desc pwm9g1[] = { + {0x41c, BIT(25), 0}, +}; + +static struct aspeed_sig_desc pwm10g0[] = { + {0x4B4, BIT(10), 0}, +}; + +static struct aspeed_sig_desc pwm10g1[] = { + {0x41c, BIT(26), 0}, +}; + +static struct aspeed_sig_desc pwm11g0[] = { + {0x4B4, BIT(11), 0}, +}; + +static struct aspeed_sig_desc pwm11g1[] = { + {0x41c, BIT(27), 0}, +}; + +static struct aspeed_sig_desc pwm12g0[] = { + {0x4B4, BIT(12), 0}, +}; + +static struct aspeed_sig_desc pwm12g1[] = { + {0x41c, BIT(28), 0}, +}; + +static struct aspeed_sig_desc pwm13g0[] = { + {0x4B4, BIT(13), 0}, +}; + +static struct aspeed_sig_desc pwm13g1[] = { + {0x41c, BIT(29), 0}, +}; + +static struct aspeed_sig_desc pwm14g0[] = { + {0x4B4, BIT(14), 0}, +}; + +static struct aspeed_sig_desc pwm14g1[] = { + {0x41c, BIT(30), 0}, +}; + +static struct aspeed_sig_desc pwm15g0[] = { + {0x4B4, BIT(15), 0}, +}; + +static struct aspeed_sig_desc pwm15g1[] = { + {0x41c, BIT(31), 0}, +}; + static const struct aspeed_group_config ast2600_groups[] = { { "MAC1LINK", ARRAY_SIZE(mac1_link), mac1_link }, { "MAC2LINK", ARRAY_SIZE(mac2_link), mac2_link }, @@ -394,6 +490,30 @@ static const struct aspeed_group_config ast2600_groups[] = { { "USB2BH", ARRAY_SIZE(usb2bh_link), usb2bh_link }, { "PCIE0RC", ARRAY_SIZE(pcie0rc_link), pcie0rc_link }, { "PCIE1RC", ARRAY_SIZE(pcie1rc_link), pcie1rc_link }, + { "PWM0", ARRAY_SIZE(pwm0), pwm0 }, + { "PWM1", ARRAY_SIZE(pwm1), pwm1 }, + { "PWM2", ARRAY_SIZE(pwm2), pwm2 }, + { "PWM3", ARRAY_SIZE(pwm3), pwm3 }, + { "PWM4", ARRAY_SIZE(pwm4), pwm4 }, + { "PWM5", ARRAY_SIZE(pwm5), pwm5 }, + { "PWM6", ARRAY_SIZE(pwm6), pwm6 }, + { "PWM7", ARRAY_SIZE(pwm7), pwm7 }, + { "PWM8G0", ARRAY_SIZE(pwm8g0), pwm8g0 }, + { "PWM8G1", ARRAY_SIZE(pwm8g1), pwm8g1 }, + { "PWM9G0", ARRAY_SIZE(pwm9g0), pwm9g0 }, + { "PWM9G1", ARRAY_SIZE(pwm9g1), pwm9g1 }, + { "PWM10G0", ARRAY_SIZE(pwm10g0), pwm10g0 }, + { "PWM10G1", ARRAY_SIZE(pwm10g1), pwm10g1 }, + { "PWM11G0", ARRAY_SIZE(pwm11g0), pwm11g0 }, + { "PWM11G1", ARRAY_SIZE(pwm11g1), pwm11g1 }, + { "PWM12G0", ARRAY_SIZE(pwm12g0), pwm12g0 }, + { "PWM12G1", ARRAY_SIZE(pwm12g1), pwm12g1 }, + { "PWM13G0", ARRAY_SIZE(pwm13g0), pwm13g0 }, + { "PWM13G1", ARRAY_SIZE(pwm13g1), pwm13g1 }, + { "PWM14G0", ARRAY_SIZE(pwm14g0), pwm14g0 }, + { "PWM14G1", ARRAY_SIZE(pwm14g1), pwm14g1 }, + { "PWM15G0", ARRAY_SIZE(pwm15g0), pwm15g0 }, + { "PWM15G1", ARRAY_SIZE(pwm15g1), pwm15g1 }, }; static int ast2600_pinctrl_get_groups_count(struct udevice *dev) diff --git a/drivers/pinctrl/pinctrl-zynqmp.c b/drivers/pinctrl/pinctrl-zynqmp.c new file mode 100644 index 0000000..7c5a02d --- /dev/null +++ b/drivers/pinctrl/pinctrl-zynqmp.c @@ -0,0 +1,644 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx pinctrl driver for ZynqMP + * + * Author(s): Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> + * Michal Simek <michal.simek@xilinx.com> + * + * Copyright (C) 2021 Xilinx, Inc. All rights reserved. + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <malloc.h> +#include <zynqmp_firmware.h> +#include <asm/arch/sys_proto.h> +#include <asm/io.h> +#include <dm/device_compat.h> +#include <dm/pinctrl.h> +#include <linux/compat.h> +#include <dt-bindings/pinctrl/pinctrl-zynqmp.h> + +#define PINCTRL_GET_FUNC_GROUPS_RESP_LEN 12 +#define PINCTRL_GET_PIN_GROUPS_RESP_LEN 12 +#define NUM_GROUPS_PER_RESP 6 +#define NA_GROUP -1 +#define RESERVED_GROUP -2 +#define MAX_GROUP_PIN 50 +#define MAX_PIN_GROUPS 50 +#define MAX_GROUP_NAME_LEN 32 +#define MAX_FUNC_NAME_LEN 16 + +#define DRIVE_STRENGTH_2MA 2 +#define DRIVE_STRENGTH_4MA 4 +#define DRIVE_STRENGTH_8MA 8 +#define DRIVE_STRENGTH_12MA 12 + +/* + * This driver works with very simple configuration that has the same name + * for group and function. This way it is compatible with the Linux Kernel + * driver. + */ +struct zynqmp_pinctrl_priv { + u32 npins; + u32 nfuncs; + u32 ngroups; + struct zynqmp_pmux_function *funcs; + struct zynqmp_pctrl_group *groups; +}; + +/** + * struct zynqmp_pinctrl_config - pinconfig parameters + * @slew: Slew rate slow or fast + * @bias: Bias enabled or disabled + * @pull_ctrl: Pull control pull up or pull down + * @input_type: CMOS or Schmitt + * @drive_strength: Drive strength 2mA/4mA/8mA/12mA + * @volt_sts: Voltage status 1.8V or 3.3V + * @tri_state: Tristate enabled or disabled + * + * This structure holds information about pin control config + * option that can be set for each pin. + */ +struct zynqmp_pinctrl_config { + u32 slew; + u32 bias; + u32 pull_ctrl; + u32 input_type; + u32 drive_strength; + u32 volt_sts; + u32 tri_state; +}; + +/** + * enum zynqmp_pin_config_param - possible pin configuration parameters + * @PIN_CONFIG_IOSTANDARD: if the pin can select an IO standard, + * the argument to this parameter (on a + * custom format) tells the driver which + * alternative IO standard to use + * @PIN_CONFIG_SCHMITTCMOS: this parameter (on a custom format) allows + * to select schmitt or cmos input for MIO pins + */ +enum zynqmp_pin_config_param { + PIN_CONFIG_IOSTANDARD = PIN_CONFIG_END + 1, + PIN_CONFIG_SCHMITTCMOS, +}; + +/** + * struct zynqmp_pmux_function - a pinmux function + * @name: Name of the pinmux function + * @groups: List of pingroups for this function + * @ngroups: Number of entries in @groups + * + * This structure holds information about pin control function + * and function group names supporting that function. + */ +struct zynqmp_pmux_function { + char name[MAX_FUNC_NAME_LEN]; + const char * const *groups; + unsigned int ngroups; +}; + +/** + * struct zynqmp_pctrl_group - Pin control group info + * @name: Group name + * @pins: Group pin numbers + * @npins: Number of pins in group + */ +struct zynqmp_pctrl_group { + const char *name; + unsigned int pins[MAX_GROUP_PIN]; + unsigned int npins; +}; + +static char pin_name[PINNAME_SIZE]; + +/** + * zynqmp_pm_query_data() - Get query data from firmware + * @qid: Value of enum pm_query_id + * @arg1: Argument 1 + * @arg2: Argument 2 + * @out: Returned output value + * + * Return: Returns status, either success or error+reason + */ +static int zynqmp_pm_query_data(enum pm_query_id qid, u32 arg1, u32 arg2, u32 *out) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + ret = xilinx_pm_request(PM_QUERY_DATA, qid, arg1, arg2, 0, ret_payload); + if (ret) + return ret; + + *out = ret_payload[1]; + + return ret; +} + +static int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param, u32 *value) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + /* Get config for the pin */ + ret = xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_GET, pin, param, 0, 0, ret_payload); + if (ret) { + printf("%s failed\n", __func__); + return ret; + } + + *value = ret_payload[1]; + + return ret; +} + +static int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param, u32 value) +{ + int ret; + + /* Request the pin first */ + ret = xilinx_pm_request(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL); + if (ret) { + printf("%s: pin request failed\n", __func__); + return ret; + } + + /* Set config for the pin */ + ret = xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, pin, param, value, 0, NULL); + if (ret) { + printf("%s failed\n", __func__); + return ret; + } + + return ret; +} + +static int zynqmp_pinctrl_get_function_groups(u32 fid, u32 index, u16 *groups) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + ret = xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_FUNCTION_GROUPS, + fid, index, 0, ret_payload); + if (ret) { + printf("%s failed\n", __func__); + return ret; + } + + memcpy(groups, &ret_payload[1], PINCTRL_GET_FUNC_GROUPS_RESP_LEN); + + return ret; +} + +static int zynqmp_pinctrl_prepare_func_groups(u32 fid, + struct zynqmp_pmux_function *func, + struct zynqmp_pctrl_group *groups) +{ + const char **fgroups; + char name[MAX_GROUP_NAME_LEN]; + u16 resp[NUM_GROUPS_PER_RESP] = {0}; + int ret, index, i; + + fgroups = kcalloc(func->ngroups, sizeof(*fgroups), GFP_KERNEL); + if (!fgroups) + return -ENOMEM; + + for (index = 0; index < func->ngroups; index += NUM_GROUPS_PER_RESP) { + ret = zynqmp_pinctrl_get_function_groups(fid, index, resp); + if (ret) + return ret; + + for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { + if (resp[i] == (u16)NA_GROUP) + goto done; + if (resp[i] == (u16)RESERVED_GROUP) + continue; + + snprintf(name, MAX_GROUP_NAME_LEN, "%s_%d_grp", + func->name, index + i); + fgroups[index + i] = strdup(name); + + snprintf(name, MAX_GROUP_NAME_LEN, "%s_%d_grp", + func->name, index + i); + groups[resp[i]].name = strdup(name); + } + } +done: + func->groups = fgroups; + + return ret; +} + +static int zynqmp_pinctrl_get_pin_groups(u32 pin, u32 index, u16 *groups) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + ret = xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_PIN_GROUPS, + pin, index, 0, ret_payload); + if (ret) { + printf("%s failed to get pin groups\n", __func__); + return ret; + } + + memcpy(groups, &ret_payload[1], PINCTRL_GET_PIN_GROUPS_RESP_LEN); + + return ret; +} + +static void zynqmp_pinctrl_group_add_pin(struct zynqmp_pctrl_group *group, + unsigned int pin) +{ + group->pins[group->npins++] = pin; +} + +static int zynqmp_pinctrl_create_pin_groups(struct zynqmp_pctrl_group *groups, + unsigned int pin) +{ + u16 resp[NUM_GROUPS_PER_RESP] = {0}; + int ret, i, index = 0; + + do { + ret = zynqmp_pinctrl_get_pin_groups(pin, index, resp); + if (ret) + return ret; + + for (i = 0; i < NUM_GROUPS_PER_RESP; i++) { + if (resp[i] == (u16)NA_GROUP) + goto done; + if (resp[i] == (u16)RESERVED_GROUP) + continue; + zynqmp_pinctrl_group_add_pin(&groups[resp[i]], pin); + } + index += NUM_GROUPS_PER_RESP; + } while (index <= MAX_PIN_GROUPS); + +done: + return ret; +} + +static int zynqmp_pinctrl_probe(struct udevice *dev) +{ + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + int ret, i; + u32 pin; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + /* Get number of pins first */ + ret = zynqmp_pm_query_data(PM_QID_PINCTRL_GET_NUM_PINS, 0, 0, &priv->npins); + if (ret) { + printf("%s failed to get no of pins\n", __func__); + return ret; + } + + /* Get number of functions available */ + ret = zynqmp_pm_query_data(PM_QID_PINCTRL_GET_NUM_FUNCTIONS, 0, 0, &priv->nfuncs); + if (ret) { + printf("%s failed to get no of functions\n", __func__); + return ret; + } + + /* Allocating structures for functions and its groups */ + priv->funcs = kzalloc(sizeof(*priv->funcs) * priv->nfuncs, GFP_KERNEL); + if (!priv->funcs) + return -ENOMEM; + + for (i = 0; i < priv->nfuncs; i++) { + /* Get function name for the function and fill */ + xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_FUNCTION_NAME, + i, 0, 0, ret_payload); + + memcpy((void *)priv->funcs[i].name, ret_payload, MAX_FUNC_NAME_LEN); + + /* And fill number of groups available for certain function */ + xilinx_pm_request(PM_QUERY_DATA, PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS, + i, 0, 0, ret_payload); + + priv->funcs[i].ngroups = ret_payload[1]; + priv->ngroups += priv->funcs[i].ngroups; + } + + /* Prepare all groups */ + priv->groups = kzalloc(sizeof(*priv->groups) * priv->ngroups, + GFP_KERNEL); + if (!priv->groups) + return -ENOMEM; + + for (i = 0; i < priv->nfuncs; i++) { + ret = zynqmp_pinctrl_prepare_func_groups(i, &priv->funcs[i], + priv->groups); + if (ret) { + printf("Failed to prepare_func_groups\n"); + return ret; + } + } + + for (pin = 0; pin < priv->npins; pin++) { + ret = zynqmp_pinctrl_create_pin_groups(priv->groups, pin); + if (ret) + return ret; + } + + return 0; +} + +static int zynqmp_pinctrl_get_functions_count(struct udevice *dev) +{ + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->nfuncs; +} + +static const char *zynqmp_pinctrl_get_function_name(struct udevice *dev, + unsigned int selector) +{ + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->funcs[selector].name; +} + +static int zynqmp_pinmux_set(struct udevice *dev, unsigned int selector, + unsigned int func_selector) +{ + int ret; + + /* Request the pin first */ + ret = xilinx_pm_request(PM_PINCTRL_REQUEST, selector, 0, 0, 0, NULL); + if (ret) { + printf("%s: pin request failed\n", __func__); + return ret; + } + + /* Set the pin function */ + ret = xilinx_pm_request(PM_PINCTRL_SET_FUNCTION, selector, func_selector, + 0, 0, NULL); + if (ret) { + printf("%s: Failed to set pinmux function\n", __func__); + return ret; + } + + return 0; +} + +static int zynqmp_pinmux_group_set(struct udevice *dev, unsigned int selector, + unsigned int func_selector) +{ + int i; + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + const struct zynqmp_pctrl_group *pgrp = &priv->groups[selector]; + + for (i = 0; i < pgrp->npins; i++) + zynqmp_pinmux_set(dev, pgrp->pins[i], func_selector); + + return 0; +} + +static int zynqmp_pinconf_set(struct udevice *dev, unsigned int pin, + unsigned int param, unsigned int arg) +{ + int ret = 0; + unsigned int value; + + switch (param) { + case PIN_CONFIG_SLEW_RATE: + param = PM_PINCTRL_CONFIG_SLEW_RATE; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case PIN_CONFIG_BIAS_PULL_UP: + param = PM_PINCTRL_CONFIG_PULL_CTRL; + arg = PM_PINCTRL_BIAS_PULL_UP; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + param = PM_PINCTRL_CONFIG_PULL_CTRL; + arg = PM_PINCTRL_BIAS_PULL_DOWN; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case PIN_CONFIG_BIAS_DISABLE: + param = PM_PINCTRL_CONFIG_BIAS_STATUS; + arg = PM_PINCTRL_BIAS_DISABLE; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case PIN_CONFIG_SCHMITTCMOS: + param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + param = PM_PINCTRL_CONFIG_SCHMITT_CMOS; + ret = zynqmp_pm_pinctrl_set_config(pin, param, arg); + break; + case PIN_CONFIG_DRIVE_STRENGTH: + switch (arg) { + case DRIVE_STRENGTH_2MA: + value = PM_PINCTRL_DRIVE_STRENGTH_2MA; + break; + case DRIVE_STRENGTH_4MA: + value = PM_PINCTRL_DRIVE_STRENGTH_4MA; + break; + case DRIVE_STRENGTH_8MA: + value = PM_PINCTRL_DRIVE_STRENGTH_8MA; + break; + case DRIVE_STRENGTH_12MA: + value = PM_PINCTRL_DRIVE_STRENGTH_12MA; + break; + default: + /* Invalid drive strength */ + dev_warn(dev, "Invalid drive strength for pin %d\n", pin); + return -EINVAL; + } + + param = PM_PINCTRL_CONFIG_DRIVE_STRENGTH; + ret = zynqmp_pm_pinctrl_set_config(pin, param, value); + break; + case PIN_CONFIG_IOSTANDARD: + param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); + if (arg != value) + dev_warn(dev, "Invalid IO Standard requested for pin %d\n", + pin); + break; + case PIN_CONFIG_POWER_SOURCE: + param = PM_PINCTRL_CONFIG_VOLTAGE_STATUS; + ret = zynqmp_pm_pinctrl_get_config(pin, param, &value); + if (arg != value) + dev_warn(dev, "Invalid IO Standard requested for pin %d\n", + pin); + break; + case PIN_CONFIG_BIAS_HIGH_IMPEDANCE: + case PIN_CONFIG_LOW_POWER_MODE: + /* + * This cases are mentioned in dts but configurable + * registers are unknown. So falling through to ignore + * boot time warnings as of now. + */ + ret = 0; + break; + default: + dev_warn(dev, "unsupported configuration parameter '%u'\n", + param); + ret = -ENOTSUPP; + break; + } + + return ret; +} + +static int zynqmp_pinconf_group_set(struct udevice *dev, + unsigned int group_selector, + unsigned int param, unsigned int arg) +{ + int i; + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + const struct zynqmp_pctrl_group *pgrp = &priv->groups[group_selector]; + + for (i = 0; i < pgrp->npins; i++) + zynqmp_pinconf_set(dev, pgrp->pins[i], param, arg); + + return 0; +} + +static int zynqmp_pinctrl_get_pins_count(struct udevice *dev) +{ + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->npins; +} + +static const char *zynqmp_pinctrl_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + snprintf(pin_name, PINNAME_SIZE, "MIO%d", selector); + + return pin_name; +} + +static int zynqmp_pinctrl_get_pin_muxing(struct udevice *dev, + unsigned int selector, + char *buf, + int size) +{ + struct zynqmp_pinctrl_config pinmux; + + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_SLEW_RATE, + &pinmux.slew); + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_BIAS_STATUS, + &pinmux.bias); + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_PULL_CTRL, + &pinmux.pull_ctrl); + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_SCHMITT_CMOS, + &pinmux.input_type); + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_DRIVE_STRENGTH, + &pinmux.drive_strength); + zynqmp_pm_pinctrl_get_config(selector, PM_PINCTRL_CONFIG_VOLTAGE_STATUS, + &pinmux.volt_sts); + + switch (pinmux.drive_strength) { + case PM_PINCTRL_DRIVE_STRENGTH_2MA: + pinmux.drive_strength = DRIVE_STRENGTH_2MA; + break; + case PM_PINCTRL_DRIVE_STRENGTH_4MA: + pinmux.drive_strength = DRIVE_STRENGTH_4MA; + break; + case PM_PINCTRL_DRIVE_STRENGTH_8MA: + pinmux.drive_strength = DRIVE_STRENGTH_8MA; + break; + case PM_PINCTRL_DRIVE_STRENGTH_12MA: + pinmux.drive_strength = DRIVE_STRENGTH_12MA; + break; + default: + /* Invalid drive strength */ + dev_warn(dev, "Invalid drive strength\n"); + return -EINVAL; + } + + snprintf(buf, size, "slew:%s\tbias:%s\tpull:%s\tinput:%s\tdrive:%dmA\tvolt:%s", + pinmux.slew ? "slow" : "fast", + pinmux.bias ? "enabled" : "disabled", + pinmux.pull_ctrl ? "up" : "down", + pinmux.input_type ? "schmitt" : "cmos", + pinmux.drive_strength, + pinmux.volt_sts ? "1.8" : "3.3"); + + return 0; +} + +static int zynqmp_pinctrl_get_groups_count(struct udevice *dev) +{ + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->ngroups; +} + +static const char *zynqmp_pinctrl_get_group_name(struct udevice *dev, + unsigned int selector) +{ + struct zynqmp_pinctrl_priv *priv = dev_get_priv(dev); + + return priv->groups[selector].name; +} + +static const struct pinconf_param zynqmp_conf_params[] = { + { "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 }, + { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, + { "bias-high-impedance", PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0 }, + { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, + { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 }, + { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, + { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 }, + { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 }, + { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 }, + { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 }, + { "drive-strength-microamp", PIN_CONFIG_DRIVE_STRENGTH_UA, 0 }, + { "input-debounce", PIN_CONFIG_INPUT_DEBOUNCE, 0 }, + { "input-disable", PIN_CONFIG_INPUT_ENABLE, 0 }, + { "input-enable", PIN_CONFIG_INPUT_ENABLE, 1 }, + { "input-schmitt", PIN_CONFIG_INPUT_SCHMITT, 0 }, + { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 }, + { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 }, + { "low-power-disable", PIN_CONFIG_LOW_POWER_MODE, 0 }, + { "low-power-enable", PIN_CONFIG_LOW_POWER_MODE, 1 }, + { "output-disable", PIN_CONFIG_OUTPUT_ENABLE, 0 }, + { "output-enable", PIN_CONFIG_OUTPUT_ENABLE, 1 }, + { "output-high", PIN_CONFIG_OUTPUT, 1, }, + { "output-low", PIN_CONFIG_OUTPUT, 0, }, + { "power-source", PIN_CONFIG_POWER_SOURCE, 0 }, + { "sleep-hardware-state", PIN_CONFIG_SLEEP_HARDWARE_STATE, 0 }, + { "slew-rate", PIN_CONFIG_SLEW_RATE, 0 }, + { "skew-delay", PIN_CONFIG_SKEW_DELAY, 0 }, + /* zynqmp specific */ + {"io-standard", PIN_CONFIG_IOSTANDARD, IO_STANDARD_LVCMOS18}, + {"schmitt-cmos", PIN_CONFIG_SCHMITTCMOS, PM_PINCTRL_INPUT_TYPE_SCHMITT}, +}; + +static struct pinctrl_ops zynqmp_pinctrl_ops = { + .get_pins_count = zynqmp_pinctrl_get_pins_count, + .get_pin_name = zynqmp_pinctrl_get_pin_name, + .get_pin_muxing = zynqmp_pinctrl_get_pin_muxing, + .set_state = pinctrl_generic_set_state, + .get_groups_count = zynqmp_pinctrl_get_groups_count, + .get_group_name = zynqmp_pinctrl_get_group_name, + .get_functions_count = zynqmp_pinctrl_get_functions_count, + .get_function_name = zynqmp_pinctrl_get_function_name, + .pinmux_group_set = zynqmp_pinmux_group_set, + .pinmux_set = zynqmp_pinmux_set, + .pinconf_params = zynqmp_conf_params, + .pinconf_group_set = zynqmp_pinconf_group_set, + .pinconf_set = zynqmp_pinconf_set, + .pinconf_num_params = ARRAY_SIZE(zynqmp_conf_params), +}; + +static const struct udevice_id zynqmp_pinctrl_ids[] = { + { .compatible = "xlnx,zynqmp-pinctrl" }, + { } +}; + +U_BOOT_DRIVER(pinctrl_zynqmp) = { + .name = "zynqmp-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = zynqmp_pinctrl_ids, + .priv_auto = sizeof(struct zynqmp_pinctrl_priv), + .ops = &zynqmp_pinctrl_ops, + .probe = zynqmp_pinctrl_probe, +}; diff --git a/drivers/power/domain/zynqmp-power-domain.c b/drivers/power/domain/zynqmp-power-domain.c index 5383d09..6943658 100644 --- a/drivers/power/domain/zynqmp-power-domain.c +++ b/drivers/power/domain/zynqmp-power-domain.c @@ -5,6 +5,7 @@ #include <common.h> #include <dm.h> +#include <dm/device_compat.h> #include <log.h> #include <malloc.h> #include <misc.h> @@ -13,25 +14,6 @@ #include <zynqmp_firmware.h> -#define NODE_ID_LOCATION 5 - -static unsigned int xpm_configobject[] = { - /* HEADER */ - 2, /* Number of remaining words in the header */ - 1, /* Number of sections included in config object */ - PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */ - /* SLAVE SECTION */ - - PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */ - 1, /* Number of slaves */ - - 0, /* Node ID which will be changed below */ - PM_SLAVE_FLAG_IS_SHAREABLE, - PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK | - PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK | - PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */ -}; - static int zynqmp_pm_request_node(const u32 node, const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack) { @@ -41,12 +23,9 @@ static int zynqmp_pm_request_node(const u32 node, const u32 capabilities, static int zynqmp_power_domain_request(struct power_domain *power_domain) { - /* Record power domain id */ - xpm_configobject[NODE_ID_LOCATION] = power_domain->id; - - zynqmp_pmufw_load_config_object(xpm_configobject, sizeof(xpm_configobject)); + dev_dbg(power_domain->dev, "Request for id: %ld\n", power_domain->id); - return 0; + return zynqmp_pmufw_node(power_domain->id); } static int zynqmp_power_domain_free(struct power_domain *power_domain) @@ -57,6 +36,8 @@ static int zynqmp_power_domain_free(struct power_domain *power_domain) static int zynqmp_power_domain_on(struct power_domain *power_domain) { + dev_dbg(power_domain->dev, "Domain ON for id: %ld\n", power_domain->id); + return zynqmp_pm_request_node(power_domain->id, ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, diff --git a/drivers/power/regulator/scmi_regulator.c b/drivers/power/regulator/scmi_regulator.c index 3ddeaf4..2966bdc 100644 --- a/drivers/power/regulator/scmi_regulator.c +++ b/drivers/power/regulator/scmi_regulator.c @@ -38,7 +38,7 @@ static int scmi_voltd_set_enable(struct udevice *dev, bool enable) in, out); int ret; - ret = devm_scmi_process_msg(dev->parent->parent, &msg); + ret = devm_scmi_process_msg(dev, &msg); if (ret) return ret; @@ -61,7 +61,7 @@ static int scmi_voltd_get_enable(struct udevice *dev) in, out); int ret; - ret = devm_scmi_process_msg(dev->parent->parent, &msg); + ret = devm_scmi_process_msg(dev, &msg); if (ret < 0) return ret; @@ -85,7 +85,7 @@ static int scmi_voltd_set_voltage_level(struct udevice *dev, int uV) in, out); int ret; - ret = devm_scmi_process_msg(dev->parent->parent, &msg); + ret = devm_scmi_process_msg(dev, &msg); if (ret < 0) return ret; @@ -104,7 +104,7 @@ static int scmi_voltd_get_voltage_level(struct udevice *dev) in, out); int ret; - ret = devm_scmi_process_msg(dev->parent->parent, &msg); + ret = devm_scmi_process_msg(dev, &msg); if (ret < 0) return ret; @@ -147,7 +147,7 @@ static int scmi_regulator_probe(struct udevice *dev) /* Check voltage domain is known from SCMI server */ in.domain_id = pdata->domain_id; - ret = devm_scmi_process_msg(dev->parent->parent, &scmi_msg); + ret = devm_scmi_process_msg(dev, &scmi_msg); if (ret) { dev_err(dev, "Failed to query voltage domain %u: %d\n", pdata->domain_id, ret); diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index 669d3fa..6be612d 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -9,6 +9,14 @@ config DM_PWM frequency/period can be controlled along with the proportion of that time that the signal is high. +config PWM_ASPEED + bool "Enable support for the Aspeed PWM" + depends on DM_PWM + help + This PWM is found on Ast2600 SoCs. It supports a programmable period + and duty cycle. It provides 16 channels which can be independently + programmed. + config PWM_AT91 bool "Enable support for PWM found on AT91 SoC's" depends on DM_PWM && ARCH_AT91 diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 55f2bc0..5d31812 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_DM_PWM) += pwm-uclass.o +obj-$(CONFIG_PWM_ASPEED) += pwm-aspeed.o obj-$(CONFIG_PWM_AT91) += pwm-at91.o obj-$(CONFIG_PWM_CROS_EC) += cros_ec_pwm.o obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o diff --git a/drivers/pwm/pwm-aspeed.c b/drivers/pwm/pwm-aspeed.c new file mode 100644 index 0000000..ba98641 --- /dev/null +++ b/drivers/pwm/pwm-aspeed.c @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Aspeed Technology Inc. + * + * PWM controller driver for Aspeed ast2600 SoCs. + * This drivers doesn't support earlier version of the IP. + * + * The formula of pwm period duration: + * period duration = ((DIV_L + 1) * (PERIOD + 1) << DIV_H) / input-clk + * + * The formula of pwm duty cycle duration: + * duty cycle duration = period duration * DUTY_CYCLE_FALLING_POINT / (PERIOD + 1) + * = ((DIV_L + 1) * DUTY_CYCLE_FALLING_POINT << DIV_H) / input-clk + * + * The software driver fixes the period to 255, which causes the high-frequency + * precision of the PWM to be coarse, in exchange for the fineness of the duty cycle. + * + * Register usage: + * PIN_ENABLE: When it is unset the pwm controller will always output low to the extern. + * Use to determine whether the PWM channel is enabled or disabled + * CLK_ENABLE: When it is unset the pwm controller will reset the duty counter to 0 and + * output low to the PIN_ENABLE mux after that the driver can still change the pwm period + * and duty and the value will apply when CLK_ENABLE be set again. + * Use to determine whether duty_cycle bigger than 0. + * PWM_ASPEED_CTRL_INVERSE: When it is toggled the output value will inverse immediately. + * PWM_ASPEED_DUTY_CYCLE_FALLING_POINT/PWM_ASPEED_DUTY_CYCLE_RISING_POINT: When these two + * values are equal it means the duty cycle = 100%. + * + * Limitations: + * - When changing both duty cycle and period, we cannot prevent in + * software that the output might produce a period with mixed + * settings. + * - Disabling the PWM doesn't complete the current period. + * + * Improvements: + * - When only changing one of duty cycle or period, our pwm controller will not + * generate the glitch, the configure will change at next cycle of pwm. + * This improvement can disable/enable through PWM_ASPEED_CTRL_DUTY_SYNC_DISABLE. + */ + +#include <common.h> +#include <div64.h> +#include <dm.h> +#include <pwm.h> +#include <clk.h> +#include <reset.h> +#include <regmap.h> +#include <syscon.h> +#include <dm/device_compat.h> +#include <linux/math64.h> +#include <linux/bitfield.h> +#include <asm/io.h> + +/* The channel number of Aspeed pwm controller */ +#define PWM_ASPEED_NR_PWMS 16 + +/* PWM Control Register */ +#define PWM_ASPEED_CTRL(ch) ((ch) * 0x10 + 0x00) +#define PWM_ASPEED_CTRL_LOAD_SEL_RISING_AS_WDT BIT(19) +#define PWM_ASPEED_CTRL_DUTY_LOAD_AS_WDT_ENABLE BIT(18) +#define PWM_ASPEED_CTRL_DUTY_SYNC_DISABLE BIT(17) +#define PWM_ASPEED_CTRL_CLK_ENABLE BIT(16) +#define PWM_ASPEED_CTRL_LEVEL_OUTPUT BIT(15) +#define PWM_ASPEED_CTRL_INVERSE BIT(14) +#define PWM_ASPEED_CTRL_OPEN_DRAIN_ENABLE BIT(13) +#define PWM_ASPEED_CTRL_PIN_ENABLE BIT(12) +#define PWM_ASPEED_CTRL_CLK_DIV_H GENMASK(11, 8) +#define PWM_ASPEED_CTRL_CLK_DIV_L GENMASK(7, 0) + +/* PWM Duty Cycle Register */ +#define PWM_ASPEED_DUTY_CYCLE(ch) ((ch) * 0x10 + 0x04) +#define PWM_ASPEED_DUTY_CYCLE_PERIOD GENMASK(31, 24) +#define PWM_ASPEED_DUTY_CYCLE_POINT_AS_WDT GENMASK(23, 16) +#define PWM_ASPEED_DUTY_CYCLE_FALLING_POINT GENMASK(15, 8) +#define PWM_ASPEED_DUTY_CYCLE_RISING_POINT GENMASK(7, 0) + +/* PWM fixed value */ +#define PWM_ASPEED_FIXED_PERIOD 0xff + +#define NSEC_PER_SEC 1000000000L + +struct aspeed_pwm_priv { + struct clk clk; + struct regmap *regmap; + struct reset_ctl reset; +}; + +static int aspeed_pwm_set_invert(struct udevice *dev, uint channel, bool polarity) +{ + struct aspeed_pwm_priv *priv = dev_get_priv(dev); + + if (channel >= PWM_ASPEED_NR_PWMS) + return -EINVAL; + + regmap_update_bits(priv->regmap, PWM_ASPEED_CTRL(channel), + PWM_ASPEED_CTRL_INVERSE, + FIELD_PREP(PWM_ASPEED_CTRL_INVERSE, + polarity)); + return 0; +} + +static int aspeed_pwm_set_enable(struct udevice *dev, uint channel, bool enable) +{ + struct aspeed_pwm_priv *priv = dev_get_priv(dev); + + if (channel >= PWM_ASPEED_NR_PWMS) + return -EINVAL; + + regmap_update_bits(priv->regmap, PWM_ASPEED_CTRL(channel), + PWM_ASPEED_CTRL_PIN_ENABLE, + enable ? PWM_ASPEED_CTRL_PIN_ENABLE : 0); + return 0; +} + +static int aspeed_pwm_set_config(struct udevice *dev, uint channel, + uint period_ns, uint duty_ns) +{ + struct aspeed_pwm_priv *priv = dev_get_priv(dev); + u32 duty_pt; + unsigned long rate; + u64 div_h, div_l, divisor; + bool clk_en; + + if (channel >= PWM_ASPEED_NR_PWMS) + return -EINVAL; + dev_dbg(dev, "expect period: %dns, duty_cycle: %dns\n", period_ns, + duty_ns); + + rate = clk_get_rate(&priv->clk); + /* + * Pick the smallest value for div_h so that div_l can be the biggest + * which results in a finer resolution near the target period value. + */ + divisor = (u64)NSEC_PER_SEC * (PWM_ASPEED_FIXED_PERIOD + 1) * + (PWM_ASPEED_CTRL_CLK_DIV_L + 1); + div_h = order_base_2(div64_u64((u64)rate * period_ns + divisor - 1, divisor)); + if (div_h > 0xf) + div_h = 0xf; + + divisor = ((u64)NSEC_PER_SEC * (PWM_ASPEED_FIXED_PERIOD + 1)) << div_h; + div_l = div64_u64((u64)rate * period_ns, divisor); + + if (div_l == 0) + return -ERANGE; + + div_l -= 1; + + if (div_l > 255) + div_l = 255; + + dev_dbg(dev, "clk source: %ld div_h %lld, div_l : %lld\n", rate, div_h, + div_l); + /* duty_pt = duty_cycle * (PERIOD + 1) / period */ + duty_pt = div64_u64(duty_ns * (u64)rate, + (u64)NSEC_PER_SEC * (div_l + 1) << div_h); + dev_dbg(dev, "duty_cycle = %d, duty_pt = %d\n", duty_ns, + duty_pt); + + if (duty_pt == 0) { + clk_en = 0; + } else { + clk_en = 1; + if (duty_pt >= (PWM_ASPEED_FIXED_PERIOD + 1)) + duty_pt = 0; + /* + * Fixed DUTY_CYCLE_PERIOD to its max value to get a + * fine-grained resolution for duty_cycle at the expense of a + * coarser period resolution. + */ + regmap_update_bits(priv->regmap, PWM_ASPEED_DUTY_CYCLE(channel), + PWM_ASPEED_DUTY_CYCLE_PERIOD | + PWM_ASPEED_DUTY_CYCLE_RISING_POINT | + PWM_ASPEED_DUTY_CYCLE_FALLING_POINT, + FIELD_PREP(PWM_ASPEED_DUTY_CYCLE_PERIOD, + PWM_ASPEED_FIXED_PERIOD) | + FIELD_PREP(PWM_ASPEED_DUTY_CYCLE_FALLING_POINT, + duty_pt)); + } + + regmap_update_bits(priv->regmap, PWM_ASPEED_CTRL(channel), + PWM_ASPEED_CTRL_CLK_DIV_H | + PWM_ASPEED_CTRL_CLK_DIV_L | + PWM_ASPEED_CTRL_CLK_ENABLE, + FIELD_PREP(PWM_ASPEED_CTRL_CLK_DIV_H, div_h) | + FIELD_PREP(PWM_ASPEED_CTRL_CLK_DIV_L, div_l) | + FIELD_PREP(PWM_ASPEED_CTRL_CLK_ENABLE, clk_en)); + return 0; +} + +static int aspeed_pwm_probe(struct udevice *dev) +{ + int ret; + struct aspeed_pwm_priv *priv = dev_get_priv(dev); + struct udevice *parent_dev = dev_get_parent(dev); + + priv->regmap = syscon_node_to_regmap(dev_ofnode(dev->parent)); + if (IS_ERR(priv->regmap)) { + dev_err(dev, "Couldn't get regmap\n"); + return PTR_ERR(priv->regmap); + } + + ret = clk_get_by_index(parent_dev, 0, &priv->clk); + if (ret < 0) { + dev_err(dev, "get clock failed\n"); + return ret; + } + + ret = reset_get_by_index(parent_dev, 0, &priv->reset); + if (ret) { + dev_err(dev, "get reset failed\n"); + return ret; + } + ret = reset_deassert(&priv->reset); + if (ret) { + dev_err(dev, "cannot deassert reset control: %pe\n", + ERR_PTR(ret)); + return ret; + } + + return 0; +} + +static int aspeed_pwm_remove(struct udevice *dev) +{ + struct aspeed_pwm_priv *priv = dev_get_priv(dev); + + reset_assert(&priv->reset); + + return 0; +} + +static const struct pwm_ops aspeed_pwm_ops = { + .set_invert = aspeed_pwm_set_invert, + .set_config = aspeed_pwm_set_config, + .set_enable = aspeed_pwm_set_enable, +}; + +static const struct udevice_id aspeed_pwm_ids[] = { + { .compatible = "aspeed,ast2600-pwm" }, + { } +}; + +U_BOOT_DRIVER(aspeed_pwm) = { + .name = "aspeed_pwm", + .id = UCLASS_PWM, + .of_match = aspeed_pwm_ids, + .ops = &aspeed_pwm_ops, + .probe = aspeed_pwm_probe, + .remove = aspeed_pwm_remove, + .priv_auto = sizeof(struct aspeed_pwm_priv), +}; diff --git a/drivers/ram/aspeed/Kconfig b/drivers/ram/aspeed/Kconfig index 576d5af..0deab86 100644 --- a/drivers/ram/aspeed/Kconfig +++ b/drivers/ram/aspeed/Kconfig @@ -1,66 +1,77 @@ -if RAM || SPL_RAM +menuconfig ASPEED_RAM + bool "ASPEED SDRAM configuration" + depends on RAM && ARCH_ASPEED + default ARCH_ASPEED + help + Configuration options for DDR SDRAM on ASPEED systems. + + RAM initialisation is always built in for the platform. This menu + allows customisation of the configuration used. + +if ASPEED_RAM config ASPEED_DDR4_DUALX8 bool "Enable Dual X8 DDR4 die" - depends on DM && OF_CONTROL && ARCH_ASPEED + depends on ASPEED_RAM + help + Say Y if dual X8 DDR4 die is used on the board. The ASPEED DDRM + SRAM controller needs to know if the memory chip mounted on the + board is dual x8 die or not, otherwise it may get the wrong + size of the memory space. + +config ASPEED_BYPASS_SELFTEST + depends on ASPEED_RAM + depends on ASPEED_AST2600 + bool "Bypass self test during initialization" + help + Say Y here to bypass DRAM self test to speed up the boot time. + +config ASPEED_ECC + bool "ASPEED SDRAM ECC" + depends on ASPEED_RAM + depends on ASPEED_AST2600 help - Say Y if dual X8 DDR4 die is used on the board. The aspeed ddr sdram - controller needs to know if the memory chip mounted on the board is dual - x8 die or not. Or it may get the wrong size of the memory space. + Enable SDRAM ECC function. This configures the SDRAM controller to + perform error detection and correction, sacrificing 1/9th of the + installed RAM to do so. -if ASPEED_AST2600 + +config ASPEED_ECC_SIZE + int "ECC size: 0=driver auto-caluated" + depends on ASPEED_ECC + default 0 + help + SDRAM size with the error correcting code enabled. The unit is + in Megabytes. Noted that only the 8/9 of the configured size + can be used by the system. The remaining 1/9 will be used by + the ECC engine. If the size is set to 0, the sdram driver will + calculate the SDRAM size and set the whole range be ECC enabled. choice - prompt "DDR4 target date rate" + prompt "AST2600 DDR4 target date rate" default ASPEED_DDR4_1600 + depends on ASPEED_RAM + depends on ASPEED_AST2600 config ASPEED_DDR4_400 - bool "DDR4 targets at 400Mbps" - depends on DM && OF_CONTROL && ARCH_ASPEED + bool "400Mbps" help select DDR4 target data rate at 400M config ASPEED_DDR4_800 - bool "DDR4 targets at 800Mbps" - depends on DM && OF_CONTROL && ARCH_ASPEED + bool "800Mbps" help select DDR4 target data rate at 800M config ASPEED_DDR4_1333 - bool "DDR4 targets at 1333Mbps" - depends on DM && OF_CONTROL && ARCH_ASPEED + bool "1333Mbps" help select DDR4 target data rate at 1333M config ASPEED_DDR4_1600 - bool "DDR4 targets at 1600Mbps" - depends on DM && OF_CONTROL && ARCH_ASPEED + bool "1600Mbps" help select DDR4 target data rate at 1600M endchoice -config ASPEED_BYPASS_SELFTEST - bool "bypass self test during DRAM initialization" - help - Say Y here to bypass DRAM self test to speed up the boot time - -config ASPEED_ECC - bool "aspeed SDRAM error correcting code" - depends on DM && OF_CONTROL && ARCH_ASPEED - help - enable SDRAM ECC function - -if ASPEED_ECC -config ASPEED_ECC_SIZE - int "ECC size: 0=driver auto-caluated" - depends on ASPEED_ECC - default 0 - help - SDRAM size with the error correcting code enabled. The unit is - in Megabytes. Noted that only the 8/9 of the configured size - can be used by the system. The remaining 1/9 will be used by - the ECC engine. If the size is set to 0, the sdram driver will - calculate the SDRAM size and set the whole range be ECC enabled. -endif # end of ASPEED_ECC -endif # end of ASPEED_AST2600 -endif # end of RAM || SPL_RAM +endif # End of ASPEED_RAM diff --git a/drivers/reset/reset-scmi.c b/drivers/reset/reset-scmi.c index ca0135a..850cb18 100644 --- a/drivers/reset/reset-scmi.c +++ b/drivers/reset/reset-scmi.c @@ -26,7 +26,7 @@ static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert) in, out); int ret; - ret = devm_scmi_process_msg(rst->dev->parent, &msg); + ret = devm_scmi_process_msg(rst->dev, &msg); if (ret) return ret; @@ -58,7 +58,7 @@ static int scmi_reset_request(struct reset_ctl *rst) * We don't really care about the attribute, just check * the reset domain exists. */ - ret = devm_scmi_process_msg(rst->dev->parent, &msg); + ret = devm_scmi_process_msg(rst->dev, &msg); if (ret) return ret; diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 71777cd..7a6c6ef 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -168,6 +168,14 @@ config RTC_MC146818 clock with a wide array of features and 50 bytes of general-purpose, battery-backed RAM. The driver supports access to the clock and RAM. +config MCFRTC + bool "Use common CF RTC driver" + depends on M68K + +config SYS_MCFRTC_BASE + hex "Base address for RTC in immap.h" + depends on MCFRTC + config RTC_M41T62 bool "Enable M41T62 driver" help diff --git a/drivers/rtc/mcfrtc.c b/drivers/rtc/mcfrtc.c index e10638e..d2ac889 100644 --- a/drivers/rtc/mcfrtc.c +++ b/drivers/rtc/mcfrtc.c @@ -13,10 +13,6 @@ #undef RTC_DEBUG -#ifndef CONFIG_SYS_MCFRTC_BASE -#error RTC_BASE is not defined! -#endif - #define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0) #define STARTOFTIME 1970 diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 345d188..76171e7 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -133,6 +133,19 @@ config SERIAL_RX_BUFFER_SIZE help The size of the RX buffer (needs to be power of 2) +config SERIAL_PUTS + bool "Enable printing strings all at once" + depends on DM_SERIAL + help + Some serial drivers are much more efficient when printing multiple + characters at once rather than printing characters individually. This + can be because they can load a fifo, or because individual print + calls have a constant overhead. With this option set, the serial + subsystem will try to provide serial drivers with as many characters + at once as possible, instead of printing characters one by one. Most + serial drivers do not need this config to print efficiently. If + unsure, say N. + config SERIAL_SEARCH_ALL bool "Search for serial devices after default one failed" depends on DM_SERIAL @@ -399,6 +412,15 @@ config DEBUG_UART_SANDBOX start up driver model. The driver will be available until the real driver model serial is running. +config DEBUG_UART_SEMIHOSTING + bool "semihosting" + depends on SEMIHOSTING_SERIAL + help + Select this to enable the debug UART using the semihosting driver. + This provides basic serial output from the console without needing to + start up driver model. The driver will be available until the real + driver model serial is running. + config DEBUG_UART_SIFIVE bool "SiFive UART" depends on SIFIVE_SERIAL @@ -647,6 +669,10 @@ config FSL_LPUART Select this to enable a Low Power UART for Freescale VF610 and QorIQ Layerscape devices. +config LPUART + bool "Use the LPUART as console" + depends on FSL_LPUART + config MVEBU_A3700_UART bool "UART support for Armada 3700" help @@ -778,6 +804,19 @@ config SCIF_CONSOLE on systems with RCar or SH SoCs, say Y to this option. If unsure, say N. +config SEMIHOSTING_SERIAL + bool "Semihosting UART support" + depends on SEMIHOSTING && !SERIAL_RX_BUFFER + help + Select this to enable a serial UART using semihosting. Special halt + instructions will be issued which an external debugger (such as a + JTAG emulator) may interpret. The debugger will display U-Boot's + console output on the host system. + + Enable this option only if you are using a debugger which supports + semihosting. If you are not using a debugger, this driver will halt + the boot. + config UNIPHIER_SERIAL bool "Support for UniPhier on-chip UART" depends on ARCH_UNIPHIER diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 52e70aa..b68b5e7 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -52,6 +52,7 @@ endif obj-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o obj-$(CONFIG_SANDBOX_SERIAL) += sandbox.o obj-$(CONFIG_SCIF_CONSOLE) += serial_sh.o +obj-$(CONFIG_SEMIHOSTING_SERIAL) += serial_semihosting.o obj-$(CONFIG_ZYNQ_SERIAL) += serial_zynq.o obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o obj-$(CONFIG_FSL_LINFLEXUART) += serial_linflexuart.o diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c index f30f352..10d6b80 100644 --- a/drivers/serial/serial-uclass.c +++ b/drivers/serial/serial-uclass.c @@ -200,8 +200,30 @@ static void _serial_putc(struct udevice *dev, char ch) static void _serial_puts(struct udevice *dev, const char *str) { - while (*str) - _serial_putc(dev, *str++); + struct dm_serial_ops *ops = serial_get_ops(dev); + + if (!CONFIG_IS_ENABLED(SERIAL_PUTS) || !ops->puts) { + while (*str) + _serial_putc(dev, *str++); + return; + } + + do { + const char *newline = strchrnul(str, '\n'); + size_t len = newline - str + !!*newline; + + do { + ssize_t written = ops->puts(dev, str, len); + + if (written < 0) + return; + str += written; + len -= written; + } while (len); + + if (*newline) + _serial_putc(dev, '\r'); + } while (*str); } static int __serial_getc(struct udevice *dev) diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index ebbd219..6cdbb89 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -126,6 +126,7 @@ serial_initfunc(mxc_serial_initialize); serial_initfunc(ns16550_serial_initialize); serial_initfunc(pl01x_serial_initialize); serial_initfunc(pxa_serial_initialize); +serial_initfunc(smh_serial_initialize); serial_initfunc(sh_serial_initialize); serial_initfunc(mtk_serial_initialize); @@ -180,6 +181,7 @@ int serial_initialize(void) ns16550_serial_initialize(); pl01x_serial_initialize(); pxa_serial_initialize(); + smh_serial_initialize(); sh_serial_initialize(); mtk_serial_initialize(); diff --git a/drivers/serial/serial_semihosting.c b/drivers/serial/serial_semihosting.c new file mode 100644 index 0000000..62b1b22 --- /dev/null +++ b/drivers/serial/serial_semihosting.c @@ -0,0 +1,156 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com> + */ + +#include <common.h> +#include <dm.h> +#include <serial.h> +#include <semihosting.h> + +/** + * struct smh_serial_priv - Semihosting serial private data + * @infd: stdin file descriptor (or error) + */ +struct smh_serial_priv { + int infd; + int outfd; +}; + +#if CONFIG_IS_ENABLED(DM_SERIAL) +static int smh_serial_getc(struct udevice *dev) +{ + char ch = 0; + struct smh_serial_priv *priv = dev_get_priv(dev); + + if (priv->infd < 0) + return smh_getc(); + + smh_read(priv->infd, &ch, sizeof(ch)); + return ch; +} + +static int smh_serial_putc(struct udevice *dev, const char ch) +{ + smh_putc(ch); + return 0; +} + +static const struct dm_serial_ops smh_serial_ops = { + .putc = smh_serial_putc, + .getc = smh_serial_getc, +}; + +static int smh_serial_bind(struct udevice *dev) +{ + if (semihosting_enabled()) + return 0; + return -ENOENT; +} + +static int smh_serial_probe(struct udevice *dev) +{ + struct smh_serial_priv *priv = dev_get_priv(dev); + + priv->infd = smh_open(":tt", MODE_READ); + return 0; +} + +U_BOOT_DRIVER(smh_serial) = { + .name = "serial_semihosting", + .id = UCLASS_SERIAL, + .bind = smh_serial_bind, + .probe = smh_serial_probe, + .priv_auto = sizeof(struct smh_serial_priv), + .ops = &smh_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +U_BOOT_DRVINFO(smh_serial) = { + .name = "serial_semihosting", +}; +#else /* DM_SERIAL */ +static int infd = -ENODEV; +static int outfd = -ENODEV; + +static int smh_serial_start(void) +{ + infd = smh_open(":tt", MODE_READ); + outfd = smh_open(":tt", MODE_WRITE); + return 0; +} + +static int smh_serial_stop(void) +{ + if (outfd >= 0) + smh_close(outfd); + return 0; +} + +static void smh_serial_setbrg(void) +{ +} + +static int smh_serial_getc(void) +{ + char ch = 0; + + if (infd < 0) + return smh_getc(); + + smh_read(infd, &ch, sizeof(ch)); + return ch; +} + +static int smh_serial_tstc(void) +{ + return 1; +} + +static void smh_serial_puts(const char *s) +{ + ulong unused; + + if (outfd < 0) + smh_puts(s); + else + smh_write(outfd, s, strlen(s), &unused); +} + +struct serial_device serial_smh_device = { + .name = "serial_smh", + .start = smh_serial_start, + .stop = smh_serial_stop, + .setbrg = smh_serial_setbrg, + .getc = smh_serial_getc, + .tstc = smh_serial_tstc, + .putc = smh_putc, + .puts = smh_serial_puts, +}; + +void smh_serial_initialize(void) +{ + if (semihosting_enabled()) + serial_register(&serial_smh_device); +} + +__weak struct serial_device *default_serial_console(void) +{ + return &serial_smh_device; +} +#endif + +#ifdef CONFIG_DEBUG_UART_SEMIHOSTING +#include <debug_uart.h> + +static inline void _debug_uart_init(void) +{ +} + +static inline void _debug_uart_putc(int c) +{ + smh_putc(c); +} + +DEBUG_UART_FUNCS +#endif diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c index 85108df..47002f8 100644 --- a/drivers/spi/bcm63xx_hsspi.c +++ b/drivers/spi/bcm63xx_hsspi.c @@ -355,9 +355,7 @@ static int bcm63xx_hsspi_probe(struct udevice *dev) if (ret < 0 && ret != -ENOSYS) return ret; - ret = clk_free(&clk); - if (ret < 0 && ret != -ENOSYS) - return ret; + clk_free(&clk); /* get clock rate */ ret = clk_get_by_name(dev, "pll", &clk); @@ -366,9 +364,7 @@ static int bcm63xx_hsspi_probe(struct udevice *dev) priv->clk_rate = clk_get_rate(&clk); - ret = clk_free(&clk); - if (ret < 0 && ret != -ENOSYS) - return ret; + clk_free(&clk); /* perform reset */ ret = reset_get_by_index(dev, 0, &rst_ctl); diff --git a/drivers/spi/bcm63xx_spi.c b/drivers/spi/bcm63xx_spi.c index dd5e62b..0600d56 100644 --- a/drivers/spi/bcm63xx_spi.c +++ b/drivers/spi/bcm63xx_spi.c @@ -391,9 +391,7 @@ static int bcm63xx_spi_probe(struct udevice *dev) if (ret < 0) return ret; - ret = clk_free(&clk); - if (ret < 0) - return ret; + clk_free(&clk); /* perform reset */ ret = reset_get_by_index(dev, 0, &rst_ctl); diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 47bea0b..1c7d0ca 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -732,7 +732,7 @@ static int dw_spi_remove(struct udevice *bus) if (ret) return ret; - ret = clk_free(&priv->clk); + clk_free(&priv->clk); if (ret) return ret; #endif diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig index 8913142..8fad59b 100644 --- a/drivers/timer/Kconfig +++ b/drivers/timer/Kconfig @@ -96,6 +96,14 @@ config ATMEL_PIT_TIMER it is designed to offer maximum accuracy and efficient management, even for systems with long response time. +config ATMEL_TCB_TIMER + bool "Atmel timer counter support" + depends on TIMER + depends on ARCH_AT91 + help + Select this to enable the use of the timer counter as a monotonic + counter. + config CADENCE_TTC_TIMER bool "Cadence TTC (Triple Timer Counter)" depends on TIMER diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile index e2bd530..58da6c1 100644 --- a/drivers/timer/Makefile +++ b/drivers/timer/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_ARC_TIMER) += arc_timer.o obj-$(CONFIG_AST_TIMER) += ast_timer.o obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o +obj-$(CONFIG_ATMEL_TCB_TIMER) += atmel_tcb_timer.o obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o diff --git a/drivers/timer/atmel_tcb_timer.c b/drivers/timer/atmel_tcb_timer.c new file mode 100644 index 0000000..8c17987 --- /dev/null +++ b/drivers/timer/atmel_tcb_timer.c @@ -0,0 +1,161 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Microchip Corporation + * + * Author: Clément Léger <clement.leger@bootlin.com> + */ + +#include <common.h> +#include <clk.h> +#include <dm.h> +#include <timer.h> +#include <asm/io.h> +#include <linux/bitops.h> + +#define TCB_CHAN(chan) ((chan) * 0x40) + +#define TCB_CCR(chan) (0x0 + TCB_CHAN(chan)) +#define TCB_CCR_CLKEN (1 << 0) + +#define TCB_CMR(chan) (0x4 + TCB_CHAN(chan)) +#define TCB_CMR_WAVE (1 << 15) +#define TCB_CMR_TIMER_CLOCK2 1 +#define TCB_CMR_XC1 6 +#define TCB_CMR_ACPA_SET (1 << 16) +#define TCB_CMR_ACPC_CLEAR (2 << 18) + +#define TCB_CV(chan) (0x10 + TCB_CHAN(chan)) + +#define TCB_RA(chan) (0x14 + TCB_CHAN(chan)) +#define TCB_RC(chan) (0x1c + TCB_CHAN(chan)) + +#define TCB_IDR(chan) (0x28 + TCB_CHAN(chan)) + +#define TCB_BCR 0xc0 +#define TCB_BCR_SYNC (1 << 0) + +#define TCB_BMR 0xc4 +#define TCB_BMR_TC1XC1S_TIOA0 (2 << 2) + +#define TCB_WPMR 0xe4 +#define TCB_WPMR_WAKEY 0x54494d + +#define TCB_CLK_DIVISOR 8 +struct atmel_tcb_plat { + void __iomem *base; +}; + +static u64 atmel_tcb_get_count(struct udevice *dev) +{ + struct atmel_tcb_plat *plat = dev_get_plat(dev); + u64 cv0 = 0; + u64 cv1 = 0; + + do { + cv1 = readl(plat->base + TCB_CV(1)); + cv0 = readl(plat->base + TCB_CV(0)); + } while (readl(plat->base + TCB_CV(1)) != cv1); + + cv0 |= cv1 << 32; + + return cv0; +} + +static void atmel_tcb_configure(void __iomem *base) +{ + /* Disable write protection */ + writel(TCB_WPMR_WAKEY, base + TCB_WPMR); + + /* Disable all irqs for both channel 0 & 1 */ + writel(0xff, base + TCB_IDR(0)); + writel(0xff, base + TCB_IDR(1)); + + /* + * In order to avoid wrapping, use a 64 bit counter by chaining + * two channels. + * Channel 0 is configured to generate a clock on TIOA0 which is cleared + * when reaching 0x80000000 and set when reaching 0. + */ + writel(TCB_CMR_TIMER_CLOCK2 | TCB_CMR_WAVE | TCB_CMR_ACPA_SET + | TCB_CMR_ACPC_CLEAR, base + TCB_CMR(0)); + writel(0x80000000, base + TCB_RC(0)); + writel(0x1, base + TCB_RA(0)); + writel(TCB_CCR_CLKEN, base + TCB_CCR(0)); + + /* Channel 1 is configured to use TIOA0 as input */ + writel(TCB_CMR_XC1 | TCB_CMR_WAVE, base + TCB_CMR(1)); + writel(TCB_CCR_CLKEN, base + TCB_CCR(1)); + + /* Set XC1 input to be TIOA0 (ie output of Channel 0) */ + writel(TCB_BMR_TC1XC1S_TIOA0, base + TCB_BMR); + + /* Sync & start all timers */ + writel(TCB_BCR_SYNC, base + TCB_BCR); +} + +static int atmel_tcb_probe(struct udevice *dev) +{ + struct atmel_tcb_plat *plat = dev_get_plat(dev); + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct clk clk; + ulong clk_rate; + int ret; + + if (!device_is_compatible(dev->parent, "atmel,sama5d2-tcb")) + return -EINVAL; + + /* Currently, we only support channel 0 and 1 to be chained */ + if (dev_read_addr_index(dev, 0) != 0 && + dev_read_addr_index(dev, 1) != 1) { + printf("Error: only chained timers 0 and 1 are supported\n"); + return -EINVAL; + } + + ret = clk_get_by_name(dev->parent, "t0_clk", &clk); + if (ret) + return -EINVAL; + + ret = clk_enable(&clk); + if (ret) + return ret; + + clk_rate = clk_get_rate(&clk); + if (!clk_rate) { + clk_disable(&clk); + return -EINVAL; + } + + uc_priv->clock_rate = clk_rate / TCB_CLK_DIVISOR; + + atmel_tcb_configure(plat->base); + + return 0; +} + +static int atmel_tcb_of_to_plat(struct udevice *dev) +{ + struct atmel_tcb_plat *plat = dev_get_plat(dev); + + plat->base = dev_read_addr_ptr(dev->parent); + + return 0; +} + +static const struct timer_ops atmel_tcb_ops = { + .get_count = atmel_tcb_get_count, +}; + +static const struct udevice_id atmel_tcb_ids[] = { + { .compatible = "atmel,tcb-timer" }, + { } +}; + +U_BOOT_DRIVER(atmel_tcb) = { + .name = "atmel_tcb", + .id = UCLASS_TIMER, + .of_match = atmel_tcb_ids, + .of_to_plat = atmel_tcb_of_to_plat, + .plat_auto = sizeof(struct atmel_tcb_plat), + .probe = atmel_tcb_probe, + .ops = &atmel_tcb_ops, +}; diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index ff8e11f..965b587 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -421,6 +421,23 @@ config VIDEO_LCD_ANX9804 from a parallel LCD interface and translate it on the fy into a DP interface for driving eDP TFT displays. It uses I2C for configuration. +config ATMEL_LCD + bool "Atmel LCD panel support" + depends on LCD && ARCH_AT91 + +config ATMEL_LCD_BGR555 + bool "Display in BGR555 mode" + help + Use the BGR555 output mode. Otherwise RGB565 is used. + +config VIDEO_BCM2835 + bool "Display support for BCM2835" + help + The graphics processor already sets up the display so this driver + simply checks the resolution and then sets up the frame buffer with + that same resolution (or as near as possible) and 32bpp depth, so + that U-Boot can access it with full colour depth. + config VIDEO_LCD_ORISETECH_OTM8009A bool "OTM8009A DSI LCD panel support" depends on DM_VIDEO @@ -601,21 +618,6 @@ config VIDEO_IVYBRIDGE_IGD a special tool which configures the VGA ROM, but the graphics resolution can be selected in U-Boot. -config VIDEO_FSL_DCU_FB - bool "Enable Freescale Display Control Unit" - depends on VIDEO || DM_VIDEO - help - This enables support for Freescale Display Control Unit (DCU4) - module found on Freescale Vybrid and QorIQ family of SoCs. - -config VIDEO_FSL_DCU_MAX_FB_SIZE_MB - int "Freescale DCU framebuffer size" - depends on VIDEO_FSL_DCU_FB - default 4194304 - help - Set maximum framebuffer size to be used for Freescale Display - Controller Unit (DCU4). - source "drivers/video/rockchip/Kconfig" config VIDEO_ARM_MALIDP @@ -680,6 +682,14 @@ config VIDEO_SEPS525 Enable support for the Syncoam PM-OLED display driver (RGB 160x128). Currently driver is supporting only SPI interface. +config VIDEO_ZYNQMP_DPSUB + bool "Enable video support for ZynqMP Display Port" + depends on DM_VIDEO && ZYNQMP_POWER_DOMAIN + help + Enable support for Xilinx ZynqMP Display Port. Currently this file + is used as placeholder for driver. The main reason is to record + compatible string and calling power domain driver. + source "drivers/video/nexell/Kconfig" config VIDEO @@ -691,89 +701,9 @@ config VIDEO model. Video drivers typically provide a colour text console and cursor. -config CFB_CONSOLE - bool "Enable colour frame buffer console" - depends on VIDEO || ARCH_OMAP2PLUS - default y if VIDEO - help - Enables the colour frame buffer driver. This supports colour - output on a bitmap display from an in-memory frame buffer. - Several colour devices are supported along with various options to - adjust the supported features. The driver is implemented in - cfb_console.c - - The following defines are needed (cf. smiLynxEM, i8042) - VIDEO_FB_LITTLE_ENDIAN graphic memory organisation - (default big endian) - VIDEO_HW_RECTFILL graphic chip supports - rectangle fill (cf. smiLynxEM) - VIDEO_HW_BITBLT graphic chip supports - bit-blit (cf. smiLynxEM) - VIDEO_VISIBLE_COLS visible pixel columns (cols=pitch) - VIDEO_VISIBLE_ROWS visible pixel rows - VIDEO_PIXEL_SIZE bytes per pixel - VIDEO_DATA_FORMAT graphic data format - (0-5, cf. cfb_console.c) - VIDEO_FB_ADRS framebuffer address - VIDEO_KBD_INIT_FCT keyboard int fct (i.e. rx51_kp_init()) - VIDEO_TSTC_FCT test char fct (i.e. rx51_kp_tstc) - VIDEO_GETC_FCT get char fct (i.e. rx51_kp_getc) - CONFIG_VIDEO_LOGO display Linux logo in upper left corner - CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of linux_logo.h - for logo. Requires CONFIG_VIDEO_LOGO - CONFIG_CONSOLE_EXTRA_INFO - additional board info beside - the logo - CONFIG_HIDE_LOGO_VERSION - do not display bootloader - version string - - When CONFIG_CFB_CONSOLE is defined, the video console is the - default console. The serial console can be forced by setting the - environment 'console=serial'. - -config CFB_CONSOLE_ANSI - bool "Support ANSI escape sequences" - depends on CFB_CONSOLE - help - This allows the colour buffer frame buffer driver to support - a limited number of ANSI escape sequences (cursor control, - erase functions and limited graphics rendition control). Normal - output from U-Boot will pass through this filter. - -config VGA_AS_SINGLE_DEVICE - bool "Set the video as an output-only device" - depends on CFB_CONSOLE - default y - help - If enable the framebuffer device will be initialized as an - output-only device. The Keyboard driver will not be set up. This - may be used if you have no keyboard device, or more than one - (USB Keyboard, AT Keyboard). - -config VIDEO_SW_CURSOR - bool "Enable a software cursor" - depends on CFB_CONSOLE - default y if CFB_CONSOLE - help - This draws a cursor after the last character. No blinking is - provided. This makes it possible to see the current cursor - position when entering text on the console. It is recommended to - enable this. - -config CONSOLE_EXTRA_INFO - bool "Display additional board information" - depends on CFB_CONSOLE - help - Display additional board information strings that normally go to - the serial port. When this option is enabled, a board-specific - function video_get_info_str() is called to get the string for - each line of the display. The function should return the string, - which can be empty if there is nothing to display for that line. - config CONSOLE_SCROLL_LINES int "Number of lines to scroll the console by" - depends on CFB_CONSOLE || DM_VIDEO || LCD + depends on DM_VIDEO || LCD default 1 help When the console need to be scrolled, this is the number of @@ -781,28 +711,6 @@ config CONSOLE_SCROLL_LINES console jump but can help speed up operation when scrolling is slow. -config SYS_CONSOLE_BG_COL - hex "Background colour" - depends on CFB_CONSOLE - default 0x00 - help - Defines the background colour for the console. The value is from - 0x00 to 0xff and the meaning depends on the graphics card. - Typically, 0x00 means black and 0xff means white. Do not set - the background and foreground to the same colour or you will see - nothing. - -config SYS_CONSOLE_FG_COL - hex "Foreground colour" - depends on CFB_CONSOLE - default 0xa0 - help - Defines the foreground colour for the console. The value is from - 0x00 to 0xff and the meaning depends on the graphics card. - Typically, 0x00 means black and 0xff means white. Do not set - the background and foreground to the same colour or you will see - nothing. - config LCD bool "Enable legacy LCD support" help @@ -811,6 +719,18 @@ config LCD CONFIG option. See the README for details. Drives which have been converted to driver model will instead used CONFIG_DM_VIDEO. +config LCD_INFO + bool "Show LCD info on-screen" + depends on LCD + +config LCD_LOGO + bool "Show a logo on screen" + depends on LCD + +config LCD_INFO_BELOW_LOGO + bool "Show LCD info below the on-screen logo" + depends on LCD_INFO && LCD_LOGO + config VIDEO_DW_HDMI bool help @@ -988,7 +908,7 @@ config VIDEO_BMP_GZIP config VIDEO_BMP_RLE8 bool "Run length encoded BMP image (RLE8) support" - depends on DM_VIDEO || CFB_CONSOLE + depends on DM_VIDEO help If this option is set, the 8-bit RLE compressed BMP images is supported. diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 4038395..2596580 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -30,9 +30,6 @@ obj-y += ti/ obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o -obj-$(CONFIG_CFB_CONSOLE) += cfb_console.o -obj-$(CONFIG_FORMIKE) += formike.o -obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o obj-$(CONFIG_IHS_VIDEO_OUT) += ihs_video_out.o obj-$(CONFIG_LD9040) += ld9040.o obj-$(CONFIG_LG4573) += lg4573.o @@ -47,11 +44,9 @@ obj-$(CONFIG_VIDEO_ARM_MALIDP) += mali_dp.o obj-$(CONFIG_VIDEO_BCM2835) += bcm2835.o obj-$(CONFIG_VIDEO_BROADWELL_IGD) += broadwell_igd.o obj-$(CONFIG_VIDEO_COREBOOT) += coreboot.o -obj-$(CONFIG_VIDEO_DA8XX) += da8xx-fb.o videomodes.o obj-$(CONFIG_VIDEO_DW_HDMI) += dw_hdmi.o obj-$(CONFIG_VIDEO_DW_MIPI_DSI) += dw_mipi_dsi.o obj-$(CONFIG_VIDEO_EFI) += efi.o -obj-$(CONFIG_VIDEO_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o obj-$(CONFIG_VIDEO_IPUV3) += imx/ obj-$(CONFIG_VIDEO_IVYBRIDGE_IGD) += ivybridge_igd.o obj-$(CONFIG_VIDEO_LCD_ANX9804) += anx9804.o @@ -74,6 +69,7 @@ obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_VIDEO_VESA) += vesa.o obj-$(CONFIG_VIDEO_SEPS525) += seps525.o +obj-$(CONFIG_VIDEO_ZYNQMP_DPSUB) += zynqmp_dpsub.o obj-y += bridge/ obj-y += sunxi/ diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c deleted file mode 100644 index 52b109f..0000000 --- a/drivers/video/cfb_console.c +++ /dev/null @@ -1,1865 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - */ - -/* - * cfb_console.c - * - * Color Framebuffer Console driver for 8/15/16/24/32 bits per pixel. - * - * At the moment only the 8x16 font is tested and the font fore- and - * background color is limited to black/white/gray colors. The Linux - * logo can be placed in the upper left corner and additional board - * information strings (that normally goes to serial port) can be drawn. - * - * The console driver can use a keyboard interface for character input - * but this is deprecated. Only rk51 uses it. - * - * Character output goes to a memory-mapped video - * framebuffer with little or big-endian organisation. - * With environment setting 'console=serial' the console i/o can be - * forced to serial port. - * - * The driver uses graphic specific defines/parameters/functions: - * - * (for SMI LynxE graphic chip) - * - * VIDEO_FB_LITTLE_ENDIAN - framebuffer organisation default: big endian - * VIDEO_HW_RECTFILL - graphic driver supports hardware rectangle fill - * VIDEO_HW_BITBLT - graphic driver supports hardware bit blt - * - * Console Parameters are set by graphic drivers global struct: - * - * VIDEO_VISIBLE_COLS - x resolution - * VIDEO_VISIBLE_ROWS - y resolution - * VIDEO_PIXEL_SIZE - storage size in byte per pixel - * VIDEO_DATA_FORMAT - graphical data format GDF - * VIDEO_FB_ADRS - start of video memory - * - * VIDEO_KBD_INIT_FCT - init function for keyboard - * VIDEO_TSTC_FCT - keyboard_tstc function - * VIDEO_GETC_FCT - keyboard_getc function - * - * CONFIG_VIDEO_BMP_LOGO - use bmp_logo instead of linux_logo - * CONFIG_CONSOLE_EXTRA_INFO - display additional board information - * strings that normaly goes to serial - * port. This define requires a board - * specific function: - * video_drawstring (VIDEO_INFO_X, - * VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT, - * info); - * that fills a info buffer at i=row. - * s.a: board/eltec/bab7xx. - * - * CONFIG_VIDEO_SW_CURSOR: - Draws a cursor after the last - * character. No blinking is provided. - * Uses the macros CURSOR_SET and - * CURSOR_OFF. - */ - -#include <common.h> -#include <command.h> -#include <cpu_func.h> -#include <env.h> -#include <fdtdec.h> -#include <gzip.h> -#include <log.h> -#include <version_string.h> -#include <malloc.h> -#include <video.h> -#include <asm/global_data.h> -#include <dm/ofnode.h> -#include <linux/compiler.h> - -/* - * Include video_fb.h after definitions of VIDEO_HW_RECTFILL etc. - */ -#include <video_fb.h> - -#include <splash.h> - -/* - * some Macros - */ -#define VIDEO_VISIBLE_COLS (pGD->winSizeX) -#define VIDEO_VISIBLE_ROWS (pGD->winSizeY) -#define VIDEO_PIXEL_SIZE (pGD->gdfBytesPP) -#define VIDEO_DATA_FORMAT (pGD->gdfIndex) -#define VIDEO_FB_ADRS (pGD->frameAdrs) - -/* - * Console device - */ - -#include <linux/types.h> -#include <stdio_dev.h> -#include <video_font.h> - -#if defined(CONFIG_CMD_DATE) -#include <rtc.h> -#endif - -#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN) -#include <watchdog.h> -#include <bmp_layout.h> -#include <splash.h> -#endif - -#if !defined(CONFIG_VIDEO_SW_CURSOR) -/* no Cursor defined */ -#define CURSOR_ON -#define CURSOR_OFF -#define CURSOR_SET -#endif - -#if defined(CONFIG_VIDEO_SW_CURSOR) -void console_cursor(int state); - -#define CURSOR_ON console_cursor(1) -#define CURSOR_OFF console_cursor(0) -#define CURSOR_SET video_set_cursor() -#endif /* CONFIG_VIDEO_SW_CURSOR */ - -#define VIDEO_COLS VIDEO_VISIBLE_COLS -#define VIDEO_ROWS VIDEO_VISIBLE_ROWS -#ifndef VIDEO_LINE_LEN -#define VIDEO_LINE_LEN (VIDEO_COLS * VIDEO_PIXEL_SIZE) -#endif -#define VIDEO_SIZE (VIDEO_ROWS * VIDEO_LINE_LEN) -#define VIDEO_BURST_LEN (VIDEO_COLS/8) - -#define CONSOLE_ROWS (VIDEO_ROWS / VIDEO_FONT_HEIGHT) - -#define CONSOLE_COLS (VIDEO_COLS / VIDEO_FONT_WIDTH) -#define CONSOLE_ROW_SIZE (VIDEO_FONT_HEIGHT * VIDEO_LINE_LEN) -#define CONSOLE_ROW_FIRST (video_console_address) -#define CONSOLE_ROW_SECOND (video_console_address + CONSOLE_ROW_SIZE) -#define CONSOLE_ROW_LAST (video_console_address + CONSOLE_SIZE - CONSOLE_ROW_SIZE) -#define CONSOLE_SIZE (CONSOLE_ROW_SIZE * CONSOLE_ROWS) - -/* By default we scroll by a single line */ -#ifndef CONFIG_CONSOLE_SCROLL_LINES -#define CONFIG_CONSOLE_SCROLL_LINES 1 -#endif - -/* Macros */ -#ifdef VIDEO_FB_LITTLE_ENDIAN -#define SWAP16(x) ((((x) & 0x00ff) << 8) | \ - ((x) >> 8) \ - ) -#define SWAP32(x) ((((x) & 0x000000ff) << 24) | \ - (((x) & 0x0000ff00) << 8) | \ - (((x) & 0x00ff0000) >> 8) | \ - (((x) & 0xff000000) >> 24) \ - ) -#define SHORTSWAP32(x) ((((x) & 0x000000ff) << 8) | \ - (((x) & 0x0000ff00) >> 8) | \ - (((x) & 0x00ff0000) << 8) | \ - (((x) & 0xff000000) >> 8) \ - ) -#else -#define SWAP16(x) (x) -#define SWAP32(x) (x) -#if defined(VIDEO_FB_16BPP_WORD_SWAP) -#define SHORTSWAP32(x) (((x) >> 16) | ((x) << 16)) -#else -#define SHORTSWAP32(x) (x) -#endif -#endif - -DECLARE_GLOBAL_DATA_PTR; - -/* Locals */ -static GraphicDevice *pGD; /* Pointer to Graphic array */ - -static void *video_fb_address; /* frame buffer address */ -static void *video_console_address; /* console buffer start address */ - -static int video_logo_height; /* not supported anymore */ - -static int __maybe_unused cursor_state; -static int __maybe_unused old_col; -static int __maybe_unused old_row; - -static int console_col; /* cursor col */ -static int console_row; /* cursor row */ - -static u32 eorx, fgx, bgx; /* color pats */ - -static int cfb_do_flush_cache; - -#ifdef CONFIG_CFB_CONSOLE_ANSI -static char ansi_buf[10]; -static int ansi_buf_size; -static int ansi_colors_need_revert; -static int ansi_cursor_hidden; -#endif - -static const int video_font_draw_table8[] = { - 0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, - 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff, - 0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff, - 0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff -}; - -static const int video_font_draw_table15[] = { - 0x00000000, 0x00007fff, 0x7fff0000, 0x7fff7fff -}; - -static const int video_font_draw_table16[] = { - 0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff -}; - -static const int video_font_draw_table24[16][3] = { - {0x00000000, 0x00000000, 0x00000000}, - {0x00000000, 0x00000000, 0x00ffffff}, - {0x00000000, 0x0000ffff, 0xff000000}, - {0x00000000, 0x0000ffff, 0xffffffff}, - {0x000000ff, 0xffff0000, 0x00000000}, - {0x000000ff, 0xffff0000, 0x00ffffff}, - {0x000000ff, 0xffffffff, 0xff000000}, - {0x000000ff, 0xffffffff, 0xffffffff}, - {0xffffff00, 0x00000000, 0x00000000}, - {0xffffff00, 0x00000000, 0x00ffffff}, - {0xffffff00, 0x0000ffff, 0xff000000}, - {0xffffff00, 0x0000ffff, 0xffffffff}, - {0xffffffff, 0xffff0000, 0x00000000}, - {0xffffffff, 0xffff0000, 0x00ffffff}, - {0xffffffff, 0xffffffff, 0xff000000}, - {0xffffffff, 0xffffffff, 0xffffffff} -}; - -static const int video_font_draw_table32[16][4] = { - {0x00000000, 0x00000000, 0x00000000, 0x00000000}, - {0x00000000, 0x00000000, 0x00000000, 0x00ffffff}, - {0x00000000, 0x00000000, 0x00ffffff, 0x00000000}, - {0x00000000, 0x00000000, 0x00ffffff, 0x00ffffff}, - {0x00000000, 0x00ffffff, 0x00000000, 0x00000000}, - {0x00000000, 0x00ffffff, 0x00000000, 0x00ffffff}, - {0x00000000, 0x00ffffff, 0x00ffffff, 0x00000000}, - {0x00000000, 0x00ffffff, 0x00ffffff, 0x00ffffff}, - {0x00ffffff, 0x00000000, 0x00000000, 0x00000000}, - {0x00ffffff, 0x00000000, 0x00000000, 0x00ffffff}, - {0x00ffffff, 0x00000000, 0x00ffffff, 0x00000000}, - {0x00ffffff, 0x00000000, 0x00ffffff, 0x00ffffff}, - {0x00ffffff, 0x00ffffff, 0x00000000, 0x00000000}, - {0x00ffffff, 0x00ffffff, 0x00000000, 0x00ffffff}, - {0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00000000}, - {0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff} -}; - -/* - * Implement a weak default function for boards that optionally - * need to skip the cfb initialization. - */ -__weak int board_cfb_skip(void) -{ - /* As default, don't skip cfb init */ - return 0; -} - -static void video_drawchars(int xx, int yy, unsigned char *s, int count) -{ - u8 *cdat, *dest, *dest0; - int rows, offset, c; - - offset = yy * VIDEO_LINE_LEN + xx * VIDEO_PIXEL_SIZE; - dest0 = video_fb_address + offset; - - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - case GDF__8BIT_332RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; dest += VIDEO_LINE_LEN) { - u8 bits = *cdat++; - - ((u32 *) dest)[0] = - (video_font_draw_table8[bits >> 4] & - eorx) ^ bgx; - - if (VIDEO_FONT_WIDTH == 4) - continue; - - ((u32 *) dest)[1] = - (video_font_draw_table8[bits & 15] & - eorx) ^ bgx; - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_15BIT_555RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; dest += VIDEO_LINE_LEN) { - u8 bits = *cdat++; - - ((u32 *) dest)[0] = - SHORTSWAP32((video_font_draw_table15 - [bits >> 6] & eorx) ^ - bgx); - ((u32 *) dest)[1] = - SHORTSWAP32((video_font_draw_table15 - [bits >> 4 & 3] & eorx) ^ - bgx); - - if (VIDEO_FONT_WIDTH == 4) - continue; - - ((u32 *) dest)[2] = - SHORTSWAP32((video_font_draw_table15 - [bits >> 2 & 3] & eorx) ^ - bgx); - ((u32 *) dest)[3] = - SHORTSWAP32((video_font_draw_table15 - [bits & 3] & eorx) ^ - bgx); - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_16BIT_565RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; dest += VIDEO_LINE_LEN) { - u8 bits = *cdat++; - - ((u32 *) dest)[0] = - SHORTSWAP32((video_font_draw_table16 - [bits >> 6] & eorx) ^ - bgx); - ((u32 *) dest)[1] = - SHORTSWAP32((video_font_draw_table16 - [bits >> 4 & 3] & eorx) ^ - bgx); - - if (VIDEO_FONT_WIDTH == 4) - continue; - - ((u32 *) dest)[2] = - SHORTSWAP32((video_font_draw_table16 - [bits >> 2 & 3] & eorx) ^ - bgx); - ((u32 *) dest)[3] = - SHORTSWAP32((video_font_draw_table16 - [bits & 3] & eorx) ^ - bgx); - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_32BIT_X888RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; dest += VIDEO_LINE_LEN) { - u8 bits = *cdat++; - - ((u32 *) dest)[0] = - SWAP32((video_font_draw_table32 - [bits >> 4][0] & eorx) ^ bgx); - ((u32 *) dest)[1] = - SWAP32((video_font_draw_table32 - [bits >> 4][1] & eorx) ^ bgx); - ((u32 *) dest)[2] = - SWAP32((video_font_draw_table32 - [bits >> 4][2] & eorx) ^ bgx); - ((u32 *) dest)[3] = - SWAP32((video_font_draw_table32 - [bits >> 4][3] & eorx) ^ bgx); - - - if (VIDEO_FONT_WIDTH == 4) - continue; - - ((u32 *) dest)[4] = - SWAP32((video_font_draw_table32 - [bits & 15][0] & eorx) ^ bgx); - ((u32 *) dest)[5] = - SWAP32((video_font_draw_table32 - [bits & 15][1] & eorx) ^ bgx); - ((u32 *) dest)[6] = - SWAP32((video_font_draw_table32 - [bits & 15][2] & eorx) ^ bgx); - ((u32 *) dest)[7] = - SWAP32((video_font_draw_table32 - [bits & 15][3] & eorx) ^ bgx); - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++; - } - break; - - case GDF_24BIT_888RGB: - while (count--) { - c = *s; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; - rows--; dest += VIDEO_LINE_LEN) { - u8 bits = *cdat++; - - ((u32 *) dest)[0] = - (video_font_draw_table24[bits >> 4][0] - & eorx) ^ bgx; - ((u32 *) dest)[1] = - (video_font_draw_table24[bits >> 4][1] - & eorx) ^ bgx; - ((u32 *) dest)[2] = - (video_font_draw_table24[bits >> 4][2] - & eorx) ^ bgx; - - if (VIDEO_FONT_WIDTH == 4) - continue; - - ((u32 *) dest)[3] = - (video_font_draw_table24[bits & 15][0] - & eorx) ^ bgx; - ((u32 *) dest)[4] = - (video_font_draw_table24[bits & 15][1] - & eorx) ^ bgx; - ((u32 *) dest)[5] = - (video_font_draw_table24[bits & 15][2] - & eorx) ^ bgx; - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++; - } - break; - } -} - -static inline void video_drawstring(int xx, int yy, unsigned char *s) -{ - video_drawchars(xx, yy, s, strlen((char *) s)); -} - -static void video_putchar(int xx, int yy, unsigned char c) -{ - video_drawchars(xx, yy + video_logo_height, &c, 1); -} - -#if defined(CONFIG_VIDEO_SW_CURSOR) -static void video_set_cursor(void) -{ - if (cursor_state) - console_cursor(0); - console_cursor(1); -} - -static void video_invertchar(int xx, int yy) -{ - int firstx = xx * VIDEO_PIXEL_SIZE; - int lastx = (xx + VIDEO_FONT_WIDTH) * VIDEO_PIXEL_SIZE; - int firsty = yy * VIDEO_LINE_LEN; - int lasty = (yy + VIDEO_FONT_HEIGHT) * VIDEO_LINE_LEN; - int x, y; - for (y = firsty; y < lasty; y += VIDEO_LINE_LEN) { - for (x = firstx; x < lastx; x++) { - u8 *dest = (u8 *)(video_fb_address) + x + y; - *dest = ~*dest; - } - } -} - -void console_cursor(int state) -{ - if (cursor_state != state) { - if (cursor_state) { - /* turn off the cursor */ - video_invertchar(old_col * VIDEO_FONT_WIDTH, - old_row * VIDEO_FONT_HEIGHT + - video_logo_height); - } else { - /* turn off the cursor and record where it is */ - video_invertchar(console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT + - video_logo_height); - old_col = console_col; - old_row = console_row; - } - cursor_state = state; - } - if (cfb_do_flush_cache) - flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE); -} -#endif - -#ifndef VIDEO_HW_RECTFILL -static void memsetl(int *p, int c, int v) -{ - while (c--) - *(p++) = v; -} -#endif - -#ifndef VIDEO_HW_BITBLT -static void memcpyl(int *d, int *s, int c) -{ - while (c--) - *(d++) = *(s++); -} -#endif - -static void console_clear_line(int line, int begin, int end) -{ -#ifdef VIDEO_HW_RECTFILL - video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */ - VIDEO_FONT_WIDTH * begin, /* dest pos x */ - video_logo_height + - VIDEO_FONT_HEIGHT * line, /* dest pos y */ - VIDEO_FONT_WIDTH * (end - begin + 1), /* fr. width */ - VIDEO_FONT_HEIGHT, /* frame height */ - bgx /* fill color */ - ); -#else - if (begin == 0 && (end + 1) == CONSOLE_COLS) { - memsetl(CONSOLE_ROW_FIRST + - CONSOLE_ROW_SIZE * line, /* offset of row */ - CONSOLE_ROW_SIZE >> 2, /* length of row */ - bgx /* fill color */ - ); - } else { - void *offset; - int i, size; - - offset = CONSOLE_ROW_FIRST + - CONSOLE_ROW_SIZE * line + /* offset of row */ - VIDEO_FONT_WIDTH * - VIDEO_PIXEL_SIZE * begin; /* offset of col */ - size = VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE * (end - begin + 1); - size >>= 2; /* length to end for memsetl() */ - /* fill at col offset of i'th line using bgx as fill color */ - for (i = 0; i < VIDEO_FONT_HEIGHT; i++) - memsetl(offset + i * VIDEO_LINE_LEN, size, bgx); - } -#endif -} - -static void console_scrollup(void) -{ - const int rows = CONFIG_CONSOLE_SCROLL_LINES; - int i; - - /* copy up rows ignoring the first one */ - -#ifdef VIDEO_HW_BITBLT - video_hw_bitblt(VIDEO_PIXEL_SIZE, /* bytes per pixel */ - 0, /* source pos x */ - video_logo_height + - VIDEO_FONT_HEIGHT * rows, /* source pos y */ - 0, /* dest pos x */ - video_logo_height, /* dest pos y */ - VIDEO_VISIBLE_COLS, /* frame width */ - VIDEO_VISIBLE_ROWS - - video_logo_height - - VIDEO_FONT_HEIGHT * rows /* frame height */ - ); -#else - memcpyl(CONSOLE_ROW_FIRST, CONSOLE_ROW_FIRST + rows * CONSOLE_ROW_SIZE, - (CONSOLE_SIZE - CONSOLE_ROW_SIZE * rows) >> 2); -#endif - /* clear the last one */ - for (i = 1; i <= rows; i++) - console_clear_line(CONSOLE_ROWS - i, 0, CONSOLE_COLS - 1); - - /* Decrement row number */ - console_row -= rows; -} - -static void console_back(void) -{ - console_col--; - - if (console_col < 0) { - console_col = CONSOLE_COLS - 1; - console_row--; - if (console_row < 0) - console_row = 0; - } -} - -#ifdef CONFIG_CFB_CONSOLE_ANSI - -static void console_clear(void) -{ -#ifdef VIDEO_HW_RECTFILL - video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */ - 0, /* dest pos x */ - video_logo_height, /* dest pos y */ - VIDEO_VISIBLE_COLS, /* frame width */ - VIDEO_VISIBLE_ROWS, /* frame height */ - bgx /* fill color */ - ); -#else - memsetl(CONSOLE_ROW_FIRST, CONSOLE_SIZE, bgx); -#endif -} - -static void console_cursor_fix(void) -{ - if (console_row < 0) - console_row = 0; - if (console_row >= CONSOLE_ROWS) - console_row = CONSOLE_ROWS - 1; - if (console_col < 0) - console_col = 0; - if (console_col >= CONSOLE_COLS) - console_col = CONSOLE_COLS - 1; -} - -static void console_cursor_up(int n) -{ - console_row -= n; - console_cursor_fix(); -} - -static void console_cursor_down(int n) -{ - console_row += n; - console_cursor_fix(); -} - -static void console_cursor_left(int n) -{ - console_col -= n; - console_cursor_fix(); -} - -static void console_cursor_right(int n) -{ - console_col += n; - console_cursor_fix(); -} - -static void console_cursor_set_position(int row, int col) -{ - if (console_row != -1) - console_row = row; - if (console_col != -1) - console_col = col; - console_cursor_fix(); -} - -static void console_previousline(int n) -{ - /* FIXME: also scroll terminal ? */ - console_row -= n; - console_cursor_fix(); -} - -static void console_swap_colors(void) -{ - eorx = fgx; - fgx = bgx; - bgx = eorx; - eorx = fgx ^ bgx; -} - -static inline int console_cursor_is_visible(void) -{ - return !ansi_cursor_hidden; -} -#else -static inline int console_cursor_is_visible(void) -{ - return 1; -} -#endif - -static void console_newline(int n) -{ - console_row += n; - console_col = 0; - - /* Check if we need to scroll the terminal */ - if (console_row >= CONSOLE_ROWS) { - /* Scroll everything up */ - console_scrollup(); - } -} - -static void console_cr(void) -{ - console_col = 0; -} - -static void parse_putc(const char c) -{ - static int nl = 1; - - if (console_cursor_is_visible()) - CURSOR_OFF; - - switch (c) { - case 13: /* back to first column */ - console_cr(); - break; - - case '\n': /* next line */ - if (console_col || nl) - console_newline(1); - nl = 1; - break; - - case 9: /* tab 8 */ - console_col |= 0x0008; - console_col &= ~0x0007; - - if (console_col >= CONSOLE_COLS) - console_newline(1); - break; - - case 8: /* backspace */ - console_back(); - break; - - case 7: /* bell */ - break; /* ignored */ - - default: /* draw the char */ - video_putchar(console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, c); - console_col++; - - /* check for newline */ - if (console_col >= CONSOLE_COLS) { - console_newline(1); - nl = 0; - } - } - - if (console_cursor_is_visible()) - CURSOR_SET; -} - -static void cfb_video_putc(struct stdio_dev *dev, const char c) -{ -#ifdef CONFIG_CFB_CONSOLE_ANSI - int i; - - if (c == 27) { - for (i = 0; i < ansi_buf_size; ++i) - parse_putc(ansi_buf[i]); - ansi_buf[0] = 27; - ansi_buf_size = 1; - return; - } - - if (ansi_buf_size > 0) { - /* - * 0 - ESC - * 1 - [ - * 2 - num1 - * 3 - .. - * 4 - ; - * 5 - num2 - * 6 - .. - * - cchar - */ - int next = 0; - - int flush = 0; - int fail = 0; - - int num1 = 0; - int num2 = 0; - int cchar = 0; - - ansi_buf[ansi_buf_size++] = c; - - if (ansi_buf_size >= sizeof(ansi_buf)) - fail = 1; - - for (i = 0; i < ansi_buf_size; ++i) { - if (fail) - break; - - switch (next) { - case 0: - if (ansi_buf[i] == 27) - next = 1; - else - fail = 1; - break; - - case 1: - if (ansi_buf[i] == '[') - next = 2; - else - fail = 1; - break; - - case 2: - if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') { - num1 = ansi_buf[i]-'0'; - next = 3; - } else if (ansi_buf[i] != '?') { - --i; - num1 = 1; - next = 4; - } - break; - - case 3: - if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') { - num1 *= 10; - num1 += ansi_buf[i]-'0'; - } else { - --i; - next = 4; - } - break; - - case 4: - if (ansi_buf[i] != ';') { - --i; - next = 7; - } else - next = 5; - break; - - case 5: - if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') { - num2 = ansi_buf[i]-'0'; - next = 6; - } else - fail = 1; - break; - - case 6: - if (ansi_buf[i] >= '0' && ansi_buf[i] <= '9') { - num2 *= 10; - num2 += ansi_buf[i]-'0'; - } else { - --i; - next = 7; - } - break; - - case 7: - if ((ansi_buf[i] >= 'A' && ansi_buf[i] <= 'H') - || ansi_buf[i] == 'J' - || ansi_buf[i] == 'K' - || ansi_buf[i] == 'h' - || ansi_buf[i] == 'l' - || ansi_buf[i] == 'm') { - cchar = ansi_buf[i]; - flush = 1; - } else - fail = 1; - break; - } - } - - if (fail) { - for (i = 0; i < ansi_buf_size; ++i) - parse_putc(ansi_buf[i]); - ansi_buf_size = 0; - return; - } - - if (flush) { - if (!ansi_cursor_hidden) - CURSOR_OFF; - ansi_buf_size = 0; - switch (cchar) { - case 'A': - /* move cursor num1 rows up */ - console_cursor_up(num1); - break; - case 'B': - /* move cursor num1 rows down */ - console_cursor_down(num1); - break; - case 'C': - /* move cursor num1 columns forward */ - console_cursor_right(num1); - break; - case 'D': - /* move cursor num1 columns back */ - console_cursor_left(num1); - break; - case 'E': - /* move cursor num1 rows up at begin of row */ - console_previousline(num1); - break; - case 'F': - /* move cursor num1 rows down at begin of row */ - console_newline(num1); - break; - case 'G': - /* move cursor to column num1 */ - console_cursor_set_position(-1, num1-1); - break; - case 'H': - /* move cursor to row num1, column num2 */ - console_cursor_set_position(num1-1, num2-1); - break; - case 'J': - /* clear console and move cursor to 0, 0 */ - console_clear(); - console_cursor_set_position(0, 0); - break; - case 'K': - /* clear line */ - if (num1 == 0) - console_clear_line(console_row, - console_col, - CONSOLE_COLS-1); - else if (num1 == 1) - console_clear_line(console_row, - 0, console_col); - else - console_clear_line(console_row, - 0, CONSOLE_COLS-1); - break; - case 'h': - ansi_cursor_hidden = 0; - break; - case 'l': - ansi_cursor_hidden = 1; - break; - case 'm': - if (num1 == 0) { /* reset swapped colors */ - if (ansi_colors_need_revert) { - console_swap_colors(); - ansi_colors_need_revert = 0; - } - } else if (num1 == 7) { /* once swap colors */ - if (!ansi_colors_need_revert) { - console_swap_colors(); - ansi_colors_need_revert = 1; - } - } - break; - } - if (!ansi_cursor_hidden) - CURSOR_SET; - } - } else { - parse_putc(c); - } -#else - parse_putc(c); -#endif - if (cfb_do_flush_cache) - flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE); -} - -static void cfb_video_puts(struct stdio_dev *dev, const char *s) -{ - int flush = cfb_do_flush_cache; - int count = strlen(s); - - /* temporarily disable cache flush */ - cfb_do_flush_cache = 0; - - while (count--) - cfb_video_putc(dev, *s++); - - if (flush) { - cfb_do_flush_cache = flush; - flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE); - } -} - -/* - * Do not enforce drivers (or board code) to provide empty - * video_set_lut() if they do not support 8 bpp format. - * Implement weak default function instead. - */ -__weak void video_set_lut(unsigned int index, unsigned char r, - unsigned char g, unsigned char b) -{ -} - -#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN) - -#define FILL_8BIT_332RGB(r,g,b) { \ - *fb = ((r>>5)<<5) | ((g>>5)<<2) | (b>>6); \ - fb ++; \ -} - -#define FILL_15BIT_555RGB(r,g,b) { \ - *(unsigned short *)fb = \ - SWAP16((unsigned short)(((r>>3)<<10) | \ - ((g>>3)<<5) | \ - (b>>3))); \ - fb += 2; \ -} - -#define FILL_16BIT_565RGB(r,g,b) { \ - *(unsigned short *)fb = \ - SWAP16((unsigned short)((((r)>>3)<<11)| \ - (((g)>>2)<<5) | \ - ((b)>>3))); \ - fb += 2; \ -} - -#define FILL_32BIT_X888RGB(r,g,b) { \ - *(u32 *)fb = \ - SWAP32((unsigned int)(((r<<16) | \ - (g<<8) | \ - b))); \ - fb += 4; \ -} - -#ifdef VIDEO_FB_LITTLE_ENDIAN -#define FILL_24BIT_888RGB(r,g,b) { \ - fb[0] = b; \ - fb[1] = g; \ - fb[2] = r; \ - fb += 3; \ -} -#else -#define FILL_24BIT_888RGB(r,g,b) { \ - fb[0] = r; \ - fb[1] = g; \ - fb[2] = b; \ - fb += 3; \ -} -#endif - -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) -static inline void fill_555rgb_pswap(uchar *fb, int x, u8 r, u8 g, u8 b) -{ - ushort *dst = (ushort *) fb; - ushort color = (ushort) (((r >> 3) << 10) | - ((g >> 3) << 5) | - (b >> 3)); - if (x & 1) - *(--dst) = color; - else - *(++dst) = color; -} -#endif - -/* - * RLE8 bitmap support - */ - -#ifdef CONFIG_VIDEO_BMP_RLE8 -/* Pre-calculated color table entry */ -struct palette { - union { - unsigned short w; /* word */ - unsigned int dw; /* double word */ - } ce; /* color entry */ -}; - -/* - * Helper to draw encoded/unencoded run. - */ -static void draw_bitmap(uchar **fb, uchar *bm, struct palette *p, - int cnt, int enc) -{ - ulong addr = (ulong) *fb; - int *off; - int enc_off = 1; - int i; - - /* - * Setup offset of the color index in the bitmap. - * Color index of encoded run is at offset 1. - */ - off = enc ? &enc_off : &i; - - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - for (i = 0; i < cnt; i++) - *(unsigned char *) addr++ = bm[*off]; - break; - case GDF_15BIT_555RGB: - case GDF_16BIT_565RGB: - /* differences handled while pre-calculating palette */ - for (i = 0; i < cnt; i++) { - *(unsigned short *) addr = p[bm[*off]].ce.w; - addr += 2; - } - break; - case GDF_32BIT_X888RGB: - for (i = 0; i < cnt; i++) { - *(u32 *) addr = p[bm[*off]].ce.dw; - addr += 4; - } - break; - } - *fb = (uchar *) addr; /* return modified address */ -} - -static int display_rle8_bitmap(struct bmp_image *img, int xoff, int yoff, - int width, int height) -{ - unsigned char *bm; - unsigned char *fbp; - unsigned int cnt, runlen; - int decode = 1; - int x, y, bpp, i, ncolors; - struct palette p[256]; - struct bmp_color_table_entry cte; - int green_shift, red_off; - int limit = (VIDEO_LINE_LEN / VIDEO_PIXEL_SIZE) * VIDEO_ROWS; - int pixels = 0; - - x = 0; - y = __le32_to_cpu(img->header.height) - 1; - ncolors = __le32_to_cpu(img->header.colors_used); - bpp = VIDEO_PIXEL_SIZE; - fbp = (unsigned char *) ((unsigned int) video_fb_address + - (y + yoff) * VIDEO_LINE_LEN + - xoff * bpp); - - bm = (uchar *) img + __le32_to_cpu(img->header.data_offset); - - /* pre-calculate and setup palette */ - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - for (i = 0; i < ncolors; i++) { - cte = img->color_table[i]; - video_set_lut(i, cte.red, cte.green, cte.blue); - } - break; - case GDF_15BIT_555RGB: - case GDF_16BIT_565RGB: - if (VIDEO_DATA_FORMAT == GDF_15BIT_555RGB) { - green_shift = 3; - red_off = 10; - } else { - green_shift = 2; - red_off = 11; - } - for (i = 0; i < ncolors; i++) { - cte = img->color_table[i]; - p[i].ce.w = SWAP16((unsigned short) - (((cte.red >> 3) << red_off) | - ((cte.green >> green_shift) << 5) | - cte.blue >> 3)); - } - break; - case GDF_32BIT_X888RGB: - for (i = 0; i < ncolors; i++) { - cte = img->color_table[i]; - p[i].ce.dw = SWAP32((cte.red << 16) | - (cte.green << 8) | - cte.blue); - } - break; - default: - printf("RLE Bitmap unsupported in video mode 0x%x\n", - VIDEO_DATA_FORMAT); - return -1; - } - - while (decode) { - switch (bm[0]) { - case 0: - switch (bm[1]) { - case 0: - /* scan line end marker */ - bm += 2; - x = 0; - y--; - fbp = (unsigned char *) - ((unsigned int) video_fb_address + - (y + yoff) * VIDEO_LINE_LEN + - xoff * bpp); - continue; - case 1: - /* end of bitmap data marker */ - decode = 0; - break; - case 2: - /* run offset marker */ - x += bm[2]; - y -= bm[3]; - fbp = (unsigned char *) - ((unsigned int) video_fb_address + - (y + yoff) * VIDEO_LINE_LEN + - xoff * bpp); - bm += 4; - break; - default: - /* unencoded run */ - cnt = bm[1]; - runlen = cnt; - pixels += cnt; - if (pixels > limit) - goto error; - - bm += 2; - if (y < height) { - if (x >= width) { - x += runlen; - goto next_run; - } - if (x + runlen > width) - cnt = width - x; - draw_bitmap(&fbp, bm, p, cnt, 0); - x += runlen; - } -next_run: - bm += runlen; - if (runlen & 1) - bm++; /* 0 padding if length is odd */ - } - break; - default: - /* encoded run */ - cnt = bm[0]; - runlen = cnt; - pixels += cnt; - if (pixels > limit) - goto error; - - if (y < height) { /* only draw into visible area */ - if (x >= width) { - x += runlen; - bm += 2; - continue; - } - if (x + runlen > width) - cnt = width - x; - draw_bitmap(&fbp, bm, p, cnt, 1); - x += runlen; - } - bm += 2; - break; - } - } - - if (cfb_do_flush_cache) - flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE); - - return 0; -error: - printf("Error: Too much encoded pixel data, validate your bitmap\n"); - return -1; -} -#endif - -/* - * Display the BMP file located at address bmp_image. - */ -int video_display_bitmap(ulong bmp_image, int x, int y) -{ - ushort xcount, ycount; - uchar *fb; - struct bmp_image *bmp = (struct bmp_image *)bmp_image; - uchar *bmap; - ushort padded_line; - unsigned long width, height, bpp; - unsigned colors; - unsigned long compression; - struct bmp_color_table_entry cte; - -#ifdef CONFIG_VIDEO_BMP_GZIP - unsigned char *dst = NULL; - ulong len; -#endif - - WATCHDOG_RESET(); - - if (!((bmp->header.signature[0] == 'B') && - (bmp->header.signature[1] == 'M'))) { - -#ifdef CONFIG_VIDEO_BMP_GZIP - /* - * Could be a gzipped bmp image, try to decrompress... - */ - len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE; - dst = malloc(CONFIG_SYS_VIDEO_LOGO_MAX_SIZE); - if (dst == NULL) { - printf("Error: malloc in gunzip failed!\n"); - return 1; - } - /* - * NB: we need to force offset of +2 - * See doc/README.displaying-bmps - */ - if (gunzip(dst+2, CONFIG_SYS_VIDEO_LOGO_MAX_SIZE-2, - (uchar *) bmp_image, - &len) != 0) { - printf("Error: no valid bmp or bmp.gz image at %lx\n", - bmp_image); - free(dst); - return 1; - } - if (len == CONFIG_SYS_VIDEO_LOGO_MAX_SIZE) { - printf("Image could be truncated " - "(increase CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)!\n"); - } - - /* - * Set addr to decompressed image - */ - bmp = (struct bmp_image *)(dst+2); - - if (!((bmp->header.signature[0] == 'B') && - (bmp->header.signature[1] == 'M'))) { - printf("Error: no valid bmp.gz image at %lx\n", - bmp_image); - free(dst); - return 1; - } -#else - printf("Error: no valid bmp image at %lx\n", bmp_image); - return 1; -#endif /* CONFIG_VIDEO_BMP_GZIP */ - } - - width = le32_to_cpu(bmp->header.width); - height = le32_to_cpu(bmp->header.height); - bpp = le16_to_cpu(bmp->header.bit_count); - colors = le32_to_cpu(bmp->header.colors_used); - compression = le32_to_cpu(bmp->header.compression); - - debug("Display-bmp: %ld x %ld with %d colors\n", - width, height, colors); - - if (compression != BMP_BI_RGB -#ifdef CONFIG_VIDEO_BMP_RLE8 - && compression != BMP_BI_RLE8 -#endif - ) { - printf("Error: compression type %ld not supported\n", - compression); -#ifdef CONFIG_VIDEO_BMP_GZIP - if (dst) - free(dst); -#endif - return 1; - } - - padded_line = (((width * bpp + 7) / 8) + 3) & ~0x3; - -#ifdef CONFIG_SPLASH_SCREEN_ALIGN - if (x == BMP_ALIGN_CENTER) - x = max(0, (int)(VIDEO_VISIBLE_COLS - width) / 2); - else if (x < 0) - x = max(0, (int)(VIDEO_VISIBLE_COLS - width + x + 1)); - - if (y == BMP_ALIGN_CENTER) - y = max(0, (int)(VIDEO_VISIBLE_ROWS - height) / 2); - else if (y < 0) - y = max(0, (int)(VIDEO_VISIBLE_ROWS - height + y + 1)); -#endif /* CONFIG_SPLASH_SCREEN_ALIGN */ - - /* - * Just ignore elements which are completely beyond screen - * dimensions. - */ - if ((x >= VIDEO_VISIBLE_COLS) || (y >= VIDEO_VISIBLE_ROWS)) - return 0; - - if ((x + width) > VIDEO_VISIBLE_COLS) - width = VIDEO_VISIBLE_COLS - x; - if ((y + height) > VIDEO_VISIBLE_ROWS) - height = VIDEO_VISIBLE_ROWS - y; - - bmap = (uchar *) bmp + le32_to_cpu(bmp->header.data_offset); - fb = (uchar *) (video_fb_address + - ((y + height - 1) * VIDEO_LINE_LEN) + - x * VIDEO_PIXEL_SIZE); - -#ifdef CONFIG_VIDEO_BMP_RLE8 - if (compression == BMP_BI_RLE8) { - return display_rle8_bitmap(bmp, x, y, width, height); - } -#endif - - /* We handle only 4, 8, or 24 bpp bitmaps */ - switch (le16_to_cpu(bmp->header.bit_count)) { - case 4: - padded_line -= width / 2; - ycount = height; - - switch (VIDEO_DATA_FORMAT) { - case GDF_32BIT_X888RGB: - while (ycount--) { - WATCHDOG_RESET(); - /* - * Don't assume that 'width' is an - * even number - */ - for (xcount = 0; xcount < width; xcount++) { - uchar idx; - - if (xcount & 1) { - idx = *bmap & 0xF; - bmap++; - } else - idx = *bmap >> 4; - cte = bmp->color_table[idx]; - FILL_32BIT_X888RGB(cte.red, cte.green, - cte.blue); - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - default: - puts("4bpp bitmap unsupported with current " - "video mode\n"); - break; - } - break; - - case 8: - padded_line -= width; - if (VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) { - /* Copy colormap */ - for (xcount = 0; xcount < colors; ++xcount) { - cte = bmp->color_table[xcount]; - video_set_lut(xcount, cte.red, cte.green, - cte.blue); - } - } - ycount = height; - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - *fb++ = *bmap++; - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF__8BIT_332RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_8BIT_332RGB(cte.red, cte.green, - cte.blue); - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_15BIT_555RGB: - while (ycount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - int xpos = x; -#endif - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - fill_555rgb_pswap(fb, xpos++, cte.red, - cte.green, - cte.blue); - fb += 2; -#else - FILL_15BIT_555RGB(cte.red, cte.green, - cte.blue); -#endif - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_16BIT_565RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_16BIT_565RGB(cte.red, cte.green, - cte.blue); - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_32BIT_X888RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_32BIT_X888RGB(cte.red, cte.green, - cte.blue); - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_24BIT_888RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - cte = bmp->color_table[*bmap++]; - FILL_24BIT_888RGB(cte.red, cte.green, - cte.blue); - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - } - break; - case 24: - padded_line -= 3 * width; - ycount = height; - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_332RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - FILL_8BIT_332RGB(bmap[2], bmap[1], - bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_15BIT_555RGB: - while (ycount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - int xpos = x; -#endif - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { -#if defined(VIDEO_FB_16BPP_PIXEL_SWAP) - fill_555rgb_pswap(fb, xpos++, bmap[2], - bmap[1], bmap[0]); - fb += 2; -#else - FILL_15BIT_555RGB(bmap[2], bmap[1], - bmap[0]); -#endif - bmap += 3; - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_16BIT_565RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - FILL_16BIT_565RGB(bmap[2], bmap[1], - bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_32BIT_X888RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - FILL_32BIT_X888RGB(bmap[2], bmap[1], - bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - case GDF_24BIT_888RGB: - while (ycount--) { - WATCHDOG_RESET(); - xcount = width; - while (xcount--) { - FILL_24BIT_888RGB(bmap[2], bmap[1], - bmap[0]); - bmap += 3; - } - bmap += padded_line; - fb -= VIDEO_LINE_LEN + width * - VIDEO_PIXEL_SIZE; - } - break; - default: - printf("Error: 24 bits/pixel bitmap incompatible " - "with current video mode\n"); - break; - } - break; - default: - printf("Error: %d bit/pixel bitmaps not supported by U-Boot\n", - le16_to_cpu(bmp->header.bit_count)); - break; - } - -#ifdef CONFIG_VIDEO_BMP_GZIP - if (dst) { - free(dst); - } -#endif - - if (cfb_do_flush_cache) - flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE); - return (0); -} -#endif - -static int cfb_fb_is_in_dram(void) -{ - struct bd_info *bd = gd->bd; - ulong start, end; - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) { - start = bd->bi_dram[i].start; - end = bd->bi_dram[i].start + bd->bi_dram[i].size - 1; - if ((ulong)video_fb_address >= start && - (ulong)video_fb_address < end) - return 1; - } - - return 0; -} - -void video_clear(void) -{ - if (!video_fb_address) - return; -#ifdef VIDEO_HW_RECTFILL - video_hw_rectfill(VIDEO_PIXEL_SIZE, /* bytes per pixel */ - 0, /* dest pos x */ - 0, /* dest pos y */ - VIDEO_VISIBLE_COLS, /* frame width */ - VIDEO_VISIBLE_ROWS, /* frame height */ - bgx /* fill color */ - ); -#else - memsetl(video_fb_address, - (VIDEO_VISIBLE_ROWS * VIDEO_LINE_LEN) / sizeof(int), bgx); -#endif -} - -static int cfg_video_init(void) -{ - unsigned char color8; - - pGD = video_hw_init(); - if (pGD == NULL) - return -1; - - video_fb_address = (void *) VIDEO_FB_ADRS; - - cfb_do_flush_cache = cfb_fb_is_in_dram() && dcache_status(); - - /* Init drawing pats */ - switch (VIDEO_DATA_FORMAT) { - case GDF__8BIT_INDEX: - video_set_lut(0x01, CONFIG_SYS_CONSOLE_FG_COL, - CONFIG_SYS_CONSOLE_FG_COL, - CONFIG_SYS_CONSOLE_FG_COL); - video_set_lut(0x00, CONFIG_SYS_CONSOLE_BG_COL, - CONFIG_SYS_CONSOLE_BG_COL, - CONFIG_SYS_CONSOLE_BG_COL); - fgx = 0x01010101; - bgx = 0x00000000; - break; - case GDF__8BIT_332RGB: - color8 = ((CONFIG_SYS_CONSOLE_FG_COL & 0xe0) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) & 0x1c) | - CONFIG_SYS_CONSOLE_FG_COL >> 6); - fgx = (color8 << 24) | (color8 << 16) | (color8 << 8) | - color8; - color8 = ((CONFIG_SYS_CONSOLE_BG_COL & 0xe0) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) & 0x1c) | - CONFIG_SYS_CONSOLE_BG_COL >> 6); - bgx = (color8 << 24) | (color8 << 16) | (color8 << 8) | - color8; - break; - case GDF_15BIT_555RGB: - fgx = (((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 26) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 21) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 16) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 10) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 5) | - (CONFIG_SYS_CONSOLE_FG_COL >> 3)); - bgx = (((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 26) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 21) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 16) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 10) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 5) | - (CONFIG_SYS_CONSOLE_BG_COL >> 3)); - break; - case GDF_16BIT_565RGB: - fgx = (((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 27) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 2) << 21) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 16) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 3) << 11) | - ((CONFIG_SYS_CONSOLE_FG_COL >> 2) << 5) | - (CONFIG_SYS_CONSOLE_FG_COL >> 3)); - bgx = (((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 27) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 2) << 21) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 16) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 3) << 11) | - ((CONFIG_SYS_CONSOLE_BG_COL >> 2) << 5) | - (CONFIG_SYS_CONSOLE_BG_COL >> 3)); - break; - case GDF_32BIT_X888RGB: - fgx = (CONFIG_SYS_CONSOLE_FG_COL << 16) | - (CONFIG_SYS_CONSOLE_FG_COL << 8) | - CONFIG_SYS_CONSOLE_FG_COL; - bgx = (CONFIG_SYS_CONSOLE_BG_COL << 16) | - (CONFIG_SYS_CONSOLE_BG_COL << 8) | - CONFIG_SYS_CONSOLE_BG_COL; - break; - case GDF_24BIT_888RGB: - fgx = (CONFIG_SYS_CONSOLE_FG_COL << 24) | - (CONFIG_SYS_CONSOLE_FG_COL << 16) | - (CONFIG_SYS_CONSOLE_FG_COL << 8) | - CONFIG_SYS_CONSOLE_FG_COL; - bgx = (CONFIG_SYS_CONSOLE_BG_COL << 24) | - (CONFIG_SYS_CONSOLE_BG_COL << 16) | - (CONFIG_SYS_CONSOLE_BG_COL << 8) | - CONFIG_SYS_CONSOLE_BG_COL; - break; - } - eorx = fgx ^ bgx; - - if (!CONFIG_IS_ENABLED(NO_FB_CLEAR)) - video_clear(); - -#ifdef CONFIG_VIDEO_LOGO - /* Plot the logo and get start point of console */ - debug("Video: Drawing the logo ...\n"); - video_console_address = video_logo(); -#else - video_console_address = video_fb_address; -#endif - - /* Initialize the console */ - console_col = 0; - console_row = 0; - - if (cfb_do_flush_cache) - flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE); - - return 0; -} - -/* - * Implement a weak default function for boards that optionally - * need to skip the video initialization. - */ -__weak int board_video_skip(void) -{ - /* As default, don't skip test */ - return 0; -} - -int drv_video_init(void) -{ - struct stdio_dev console_dev; - bool have_keyboard; - bool __maybe_unused keyboard_ok = false; - - /* Check if video initialization should be skipped */ - if (board_video_skip()) - return 0; - - /* Init video chip - returns with framebuffer cleared */ - if (cfg_video_init() == -1) - return 0; - - if (board_cfb_skip()) - return 0; - -#if defined(CONFIG_VGA_AS_SINGLE_DEVICE) - have_keyboard = false; -#elif defined(CONFIG_OF_CONTROL) - have_keyboard = !ofnode_conf_read_bool("u-boot,no-keyboard"); -#else - have_keyboard = true; -#endif - if (have_keyboard) { - debug("KBD: Keyboard init ...\n"); -#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE) - keyboard_ok = !(VIDEO_KBD_INIT_FCT == -1); -#endif - } - - /* Init vga device */ - memset(&console_dev, 0, sizeof(console_dev)); - strcpy(console_dev.name, "vga"); - console_dev.flags = DEV_FLAGS_OUTPUT; - console_dev.putc = cfb_video_putc; /* 'putc' function */ - console_dev.puts = cfb_video_puts; /* 'puts' function */ - -#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE) - if (have_keyboard && keyboard_ok) { - /* Also init console device */ - console_dev.flags |= DEV_FLAGS_INPUT; - console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */ - console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */ - } -#endif - - if (stdio_register(&console_dev) != 0) - return 0; - - /* Return success */ - return 1; -} - -void video_position_cursor(unsigned col, unsigned row) -{ - console_col = min(col, CONSOLE_COLS - 1); - console_row = min(row, CONSOLE_ROWS - 1); -} - -int video_get_pixel_width(void) -{ - return VIDEO_VISIBLE_COLS; -} - -int video_get_pixel_height(void) -{ - return VIDEO_VISIBLE_ROWS; -} - -int video_get_screen_rows(void) -{ - return CONSOLE_ROWS; -} - -int video_get_screen_columns(void) -{ - return CONSOLE_COLS; -} diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c deleted file mode 100644 index 462c318..0000000 --- a/drivers/video/da8xx-fb.c +++ /dev/null @@ -1,1048 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Porting to u-boot: - * - * (C) Copyright 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright (C) 2008-2009 MontaVista Software Inc. - * Copyright (C) 2008-2009 Texas Instruments Inc - * - * Based on the LCD driver for TI Avalanche processors written by - * Ajay Singh and Shalom Hai. - */ - -#include <common.h> -#include <log.h> -#include <malloc.h> -#include <memalign.h> -#include <video_fb.h> -#include <asm/global_data.h> -#include <linux/delay.h> -#include <linux/list.h> -#include <linux/fb.h> - -#include <linux/errno.h> -#include <asm/io.h> -#include <asm/arch/hardware.h> - -#include "videomodes.h" -#include "da8xx-fb.h" - -#if !defined(DA8XX_LCD_CNTL_BASE) -#define DA8XX_LCD_CNTL_BASE DAVINCI_LCD_CNTL_BASE -#endif - -#define DRIVER_NAME "da8xx_lcdc" - -#define LCD_VERSION_1 1 -#define LCD_VERSION_2 2 - -/* LCD Status Register */ -#define LCD_END_OF_FRAME1 (1 << 9) -#define LCD_END_OF_FRAME0 (1 << 8) -#define LCD_PL_LOAD_DONE (1 << 6) -#define LCD_FIFO_UNDERFLOW (1 << 5) -#define LCD_SYNC_LOST (1 << 2) - -/* LCD DMA Control Register */ -#define LCD_DMA_BURST_SIZE(x) ((x) << 4) -#define LCD_DMA_BURST_1 0x0 -#define LCD_DMA_BURST_2 0x1 -#define LCD_DMA_BURST_4 0x2 -#define LCD_DMA_BURST_8 0x3 -#define LCD_DMA_BURST_16 0x4 -#define LCD_V1_END_OF_FRAME_INT_ENA (1 << 2) -#define LCD_V2_END_OF_FRAME0_INT_ENA (1 << 8) -#define LCD_V2_END_OF_FRAME1_INT_ENA (1 << 9) -#define LCD_DUAL_FRAME_BUFFER_ENABLE (1 << 0) - -#define LCD_V2_TFT_24BPP_MODE (1 << 25) -#define LCD_V2_TFT_24BPP_UNPACK (1 << 26) - -/* LCD Control Register */ -#define LCD_CLK_DIVISOR(x) ((x) << 8) -#define LCD_RASTER_MODE 0x01 - -/* LCD Raster Control Register */ -#define LCD_PALETTE_LOAD_MODE(x) ((x) << 20) -#define PALETTE_AND_DATA 0x00 -#define PALETTE_ONLY 0x01 -#define DATA_ONLY 0x02 - -#define LCD_MONO_8BIT_MODE (1 << 9) -#define LCD_RASTER_ORDER (1 << 8) -#define LCD_TFT_MODE (1 << 7) -#define LCD_V1_UNDERFLOW_INT_ENA (1 << 6) -#define LCD_V2_UNDERFLOW_INT_ENA (1 << 5) -#define LCD_V1_PL_INT_ENA (1 << 4) -#define LCD_V2_PL_INT_ENA (1 << 6) -#define LCD_MONOCHROME_MODE (1 << 1) -#define LCD_RASTER_ENABLE (1 << 0) -#define LCD_TFT_ALT_ENABLE (1 << 23) -#define LCD_STN_565_ENABLE (1 << 24) -#define LCD_V2_DMA_CLK_EN (1 << 2) -#define LCD_V2_LIDD_CLK_EN (1 << 1) -#define LCD_V2_CORE_CLK_EN (1 << 0) -#define LCD_V2_LPP_B10 26 -#define LCD_V2_TFT_24BPP_MODE (1 << 25) -#define LCD_V2_TFT_24BPP_UNPACK (1 << 26) - -/* LCD Raster Timing 2 Register */ -#define LCD_AC_BIAS_TRANSITIONS_PER_INT(x) ((x) << 16) -#define LCD_AC_BIAS_FREQUENCY(x) ((x) << 8) -#define LCD_SYNC_CTRL (1 << 25) -#define LCD_SYNC_EDGE (1 << 24) -#define LCD_INVERT_PIXEL_CLOCK (1 << 22) -#define LCD_INVERT_LINE_CLOCK (1 << 21) -#define LCD_INVERT_FRAME_CLOCK (1 << 20) - -/* Clock registers available only on Version 2 */ -#define LCD_CLK_MAIN_RESET (1 << 3) -/* LCD Block */ -struct da8xx_lcd_regs { - u32 revid; - u32 ctrl; - u32 stat; - u32 lidd_ctrl; - u32 lidd_cs0_conf; - u32 lidd_cs0_addr; - u32 lidd_cs0_data; - u32 lidd_cs1_conf; - u32 lidd_cs1_addr; - u32 lidd_cs1_data; - u32 raster_ctrl; - u32 raster_timing_0; - u32 raster_timing_1; - u32 raster_timing_2; - u32 raster_subpanel; - u32 reserved; - u32 dma_ctrl; - u32 dma_frm_buf_base_addr_0; - u32 dma_frm_buf_ceiling_addr_0; - u32 dma_frm_buf_base_addr_1; - u32 dma_frm_buf_ceiling_addr_1; - u32 resv1; - u32 raw_stat; - u32 masked_stat; - u32 int_ena_set; - u32 int_ena_clr; - u32 end_of_int_ind; - /* Clock registers available only on Version 2 */ - u32 clk_ena; - u32 clk_reset; -}; - -#define LCD_NUM_BUFFERS 1 - -#define WSI_TIMEOUT 50 -#define PALETTE_SIZE 256 -#define LEFT_MARGIN 64 -#define RIGHT_MARGIN 64 -#define UPPER_MARGIN 32 -#define LOWER_MARGIN 32 -#define WAIT_FOR_FRAME_DONE true -#define NO_WAIT_FOR_FRAME_DONE false - -#define calc_fbsize() (panel.plnSizeX * panel.plnSizeY * panel.gdfBytesPP) - -static struct da8xx_lcd_regs *da8xx_fb_reg_base; - -DECLARE_GLOBAL_DATA_PTR; - -/* graphics setup */ -static GraphicDevice gpanel; -static const struct da8xx_panel *lcd_panel; -static struct fb_info *da8xx_fb_info; -static int bits_x_pixel; -static unsigned int lcd_revision; -const struct lcd_ctrl_config *da8xx_lcd_cfg; - -static inline unsigned int lcdc_read(u32 *addr) -{ - return (unsigned int)readl(addr); -} - -static inline void lcdc_write(unsigned int val, u32 *addr) -{ - writel(val, addr); -} - -struct da8xx_fb_par { - u32 p_palette_base; - unsigned char *v_palette_base; - dma_addr_t vram_phys; - unsigned long vram_size; - void *vram_virt; - unsigned int dma_start; - unsigned int dma_end; - struct clk *lcdc_clk; - int irq; - unsigned short pseudo_palette[16]; - unsigned int palette_sz; - unsigned int pxl_clk; - int blank; - int vsync_flag; - int vsync_timeout; -}; - - -/* Variable Screen Information */ -static struct fb_var_screeninfo da8xx_fb_var = { - .xoffset = 0, - .yoffset = 0, - .transp = {0, 0, 0}, - .nonstd = 0, - .activate = 0, - .height = -1, - .width = -1, - .pixclock = 46666, /* 46us - AUO display */ - .accel_flags = 0, - .left_margin = LEFT_MARGIN, - .right_margin = RIGHT_MARGIN, - .upper_margin = UPPER_MARGIN, - .lower_margin = LOWER_MARGIN, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_fix_screeninfo da8xx_fb_fix = { - .id = "DA8xx FB Drv", - .type = FB_TYPE_PACKED_PIXELS, - .type_aux = 0, - .visual = FB_VISUAL_PSEUDOCOLOR, - .xpanstep = 0, - .ypanstep = 1, - .ywrapstep = 0, - .accel = FB_ACCEL_NONE -}; - -/* Enable the Raster Engine of the LCD Controller */ -static inline void lcd_enable_raster(void) -{ - u32 reg; - - /* Put LCDC in reset for several cycles */ - if (lcd_revision == LCD_VERSION_2) - lcdc_write(LCD_CLK_MAIN_RESET, - &da8xx_fb_reg_base->clk_reset); - - udelay(1000); - /* Bring LCDC out of reset */ - if (lcd_revision == LCD_VERSION_2) - lcdc_write(0, - &da8xx_fb_reg_base->clk_reset); - - udelay(1000); - - reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl); - if (!(reg & LCD_RASTER_ENABLE)) - lcdc_write(reg | LCD_RASTER_ENABLE, - &da8xx_fb_reg_base->raster_ctrl); -} - -/* Disable the Raster Engine of the LCD Controller */ -static inline void lcd_disable_raster(bool wait_for_frame_done) -{ - u32 reg; - u32 loop_cnt = 0; - u32 stat; - u32 i = 0; - - if (wait_for_frame_done) - loop_cnt = 5000; - - reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl); - if (reg & LCD_RASTER_ENABLE) - lcdc_write(reg & ~LCD_RASTER_ENABLE, - &da8xx_fb_reg_base->raster_ctrl); - - /* Wait for the current frame to complete */ - do { - if (lcd_revision == LCD_VERSION_1) - stat = lcdc_read(&da8xx_fb_reg_base->stat); - else - stat = lcdc_read(&da8xx_fb_reg_base->raw_stat); - - mdelay(1); - } while (!(stat & 0x01) && (i++ < loop_cnt)); - - if (lcd_revision == LCD_VERSION_1) - lcdc_write(stat, &da8xx_fb_reg_base->stat); - else - lcdc_write(stat, &da8xx_fb_reg_base->raw_stat); - - if ((loop_cnt != 0) && (i >= loop_cnt)) { - printf("LCD Controller timed out\n"); - return; - } -} - -static void lcd_blit(int load_mode, struct da8xx_fb_par *par) -{ - u32 start; - u32 end; - u32 reg_ras; - u32 reg_dma; - u32 reg_int; - - /* init reg to clear PLM (loading mode) fields */ - reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl); - reg_ras &= ~(3 << 20); - - reg_dma = lcdc_read(&da8xx_fb_reg_base->dma_ctrl); - - if (load_mode == LOAD_DATA) { - start = par->dma_start; - end = par->dma_end; - - reg_ras |= LCD_PALETTE_LOAD_MODE(DATA_ONLY); - if (lcd_revision == LCD_VERSION_1) { - reg_dma |= LCD_V1_END_OF_FRAME_INT_ENA; - } else { - reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) | - LCD_V2_END_OF_FRAME0_INT_ENA | - LCD_V2_END_OF_FRAME1_INT_ENA | - LCD_V2_UNDERFLOW_INT_ENA | LCD_SYNC_LOST; - lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set); - } - -#if (LCD_NUM_BUFFERS == 2) - reg_dma |= LCD_DUAL_FRAME_BUFFER_ENABLE; - lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); - lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0); - lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_1); - lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1); -#else - reg_dma &= ~LCD_DUAL_FRAME_BUFFER_ENABLE; - lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); - lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0); - lcdc_write(0, &da8xx_fb_reg_base->dma_frm_buf_base_addr_1); - lcdc_write(0, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1); -#endif - - } else if (load_mode == LOAD_PALETTE) { - start = par->p_palette_base; - end = start + par->palette_sz - 1; - - reg_ras |= LCD_PALETTE_LOAD_MODE(PALETTE_ONLY); - if (lcd_revision == LCD_VERSION_1) { - reg_ras |= LCD_V1_PL_INT_ENA; - } else { - reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) | - LCD_V2_PL_INT_ENA; - lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set); - } - - lcdc_write(start, &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); - lcdc_write(end, &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0); - } - - lcdc_write(reg_dma, &da8xx_fb_reg_base->dma_ctrl); - lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl); - - /* - * The Raster enable bit must be set after all other control fields are - * set. - */ - lcd_enable_raster(); -} - -/* Configure the Burst Size of DMA */ -static int lcd_cfg_dma(int burst_size) -{ - u32 reg; - - reg = lcdc_read(&da8xx_fb_reg_base->dma_ctrl) & 0x00000001; - switch (burst_size) { - case 1: - reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_1); - break; - case 2: - reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_2); - break; - case 4: - reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_4); - break; - case 8: - reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_8); - break; - case 16: - reg |= LCD_DMA_BURST_SIZE(LCD_DMA_BURST_16); - break; - default: - return -EINVAL; - } - lcdc_write(reg, &da8xx_fb_reg_base->dma_ctrl); - - return 0; -} - -static void lcd_cfg_ac_bias(int period, int transitions_per_int) -{ - u32 reg; - - /* Set the AC Bias Period and Number of Transitions per Interrupt */ - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & 0xFFF00000; - reg |= LCD_AC_BIAS_FREQUENCY(period) | - LCD_AC_BIAS_TRANSITIONS_PER_INT(transitions_per_int); - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2); -} - -static void lcd_cfg_horizontal_sync(int back_porch, int pulse_width, - int front_porch) -{ - u32 reg; - - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_0) & 0xf; - reg |= ((back_porch & 0xff) << 24) - | ((front_porch & 0xff) << 16) - | ((pulse_width & 0x3f) << 10); - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0); -} - -static void lcd_cfg_vertical_sync(int back_porch, int pulse_width, - int front_porch) -{ - u32 reg; - - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_1) & 0x3ff; - reg |= ((back_porch & 0xff) << 24) - | ((front_porch & 0xff) << 16) - | ((pulse_width & 0x3f) << 10); - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1); -} - -static int lcd_cfg_display(const struct lcd_ctrl_config *cfg) -{ - u32 reg; - u32 reg_int; - - reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & ~(LCD_TFT_MODE | - LCD_MONO_8BIT_MODE | - LCD_MONOCHROME_MODE); - - switch (cfg->p_disp_panel->panel_shade) { - case MONOCHROME: - reg |= LCD_MONOCHROME_MODE; - if (cfg->mono_8bit_mode) - reg |= LCD_MONO_8BIT_MODE; - break; - case COLOR_ACTIVE: - reg |= LCD_TFT_MODE; - if (cfg->tft_alt_mode) - reg |= LCD_TFT_ALT_ENABLE; - break; - - case COLOR_PASSIVE: - if (cfg->stn_565_mode) - reg |= LCD_STN_565_ENABLE; - break; - - default: - return -EINVAL; - } - - /* enable additional interrupts here */ - if (lcd_revision == LCD_VERSION_1) { - reg |= LCD_V1_UNDERFLOW_INT_ENA; - } else { - reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_set) | - LCD_V2_UNDERFLOW_INT_ENA; - lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_set); - } - - lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl); - - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2); - - if (cfg->sync_ctrl) - reg |= LCD_SYNC_CTRL; - else - reg &= ~LCD_SYNC_CTRL; - - if (cfg->sync_edge) - reg |= LCD_SYNC_EDGE; - else - reg &= ~LCD_SYNC_EDGE; - - if (cfg->invert_line_clock) - reg |= LCD_INVERT_LINE_CLOCK; - else - reg &= ~LCD_INVERT_LINE_CLOCK; - - if (cfg->invert_frm_clock) - reg |= LCD_INVERT_FRAME_CLOCK; - else - reg &= ~LCD_INVERT_FRAME_CLOCK; - - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2); - - return 0; -} - -static int lcd_cfg_frame_buffer(struct da8xx_fb_par *par, u32 width, u32 height, - u32 bpp, u32 raster_order) -{ - u32 reg; - - /* Set the Panel Width */ - /* Pixels per line = (PPL + 1)*16 */ - if (lcd_revision == LCD_VERSION_1) { - /* - * 0x3F in bits 4..9 gives max horizontal resolution = 1024 - * pixels - */ - width &= 0x3f0; - } else { - /* - * 0x7F in bits 4..10 gives max horizontal resolution = 2048 - * pixels. - */ - width &= 0x7f0; - } - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_0); - reg &= 0xfffffc00; - if (lcd_revision == LCD_VERSION_1) { - reg |= ((width >> 4) - 1) << 4; - } else { - width = (width >> 4) - 1; - reg |= ((width & 0x3f) << 4) | ((width & 0x40) >> 3); - } - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_0); - - /* Set the Panel Height */ - /* Set bits 9:0 of Lines Per Pixel */ - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_1); - reg = ((height - 1) & 0x3ff) | (reg & 0xfffffc00); - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_1); - - /* Set bit 10 of Lines Per Pixel */ - if (lcd_revision == LCD_VERSION_2) { - reg = lcdc_read(&da8xx_fb_reg_base->raster_timing_2); - reg |= ((height - 1) & 0x400) << 16; - lcdc_write(reg, &da8xx_fb_reg_base->raster_timing_2); - } - - /* Set the Raster Order of the Frame Buffer */ - reg = lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & ~(1 << 8); - if (raster_order) - reg |= LCD_RASTER_ORDER; - - if (bpp == 24) - reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE); - else if (bpp == 32) - reg |= (LCD_TFT_MODE | LCD_V2_TFT_24BPP_MODE - | LCD_V2_TFT_24BPP_UNPACK); - - lcdc_write(reg, &da8xx_fb_reg_base->raster_ctrl); - - switch (bpp) { - case 1: - case 2: - case 4: - case 16: - case 24: - case 32: - par->palette_sz = 16 * 2; - break; - - case 8: - par->palette_sz = 256 * 2; - break; - - default: - return -EINVAL; - } - - return 0; -} - -static int fb_setcolreg(unsigned regno, unsigned red, unsigned green, - unsigned blue, unsigned transp, - struct fb_info *info) -{ - struct da8xx_fb_par *par = info->par; - unsigned short *palette = (unsigned short *) par->v_palette_base; - u_short pal; - int update_hw = 0; - - if (regno > 255) - return 1; - - if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) - return 1; - - if (info->var.bits_per_pixel == 8) { - red >>= 4; - green >>= 8; - blue >>= 12; - - pal = (red & 0x0f00); - pal |= (green & 0x00f0); - pal |= (blue & 0x000f); - - if (palette[regno] != pal) { - update_hw = 1; - palette[regno] = pal; - } - } else if ((info->var.bits_per_pixel == 16) && regno < 16) { - red >>= (16 - info->var.red.length); - red <<= info->var.red.offset; - - green >>= (16 - info->var.green.length); - green <<= info->var.green.offset; - - blue >>= (16 - info->var.blue.length); - blue <<= info->var.blue.offset; - - par->pseudo_palette[regno] = red | green | blue; - - if (palette[0] != 0x4000) { - update_hw = 1; - palette[0] = 0x4000; - } - } else if (((info->var.bits_per_pixel == 32) && regno < 32) || - ((info->var.bits_per_pixel == 24) && regno < 24)) { - red >>= (24 - info->var.red.length); - red <<= info->var.red.offset; - - green >>= (24 - info->var.green.length); - green <<= info->var.green.offset; - - blue >>= (24 - info->var.blue.length); - blue <<= info->var.blue.offset; - - par->pseudo_palette[regno] = red | green | blue; - - if (palette[0] != 0x4000) { - update_hw = 1; - palette[0] = 0x4000; - } - } - - /* Update the palette in the h/w as needed. */ - if (update_hw) - lcd_blit(LOAD_PALETTE, par); - - return 0; -} - -static void lcd_reset(struct da8xx_fb_par *par) -{ - /* Disable the Raster if previously Enabled */ - lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); - - /* DMA has to be disabled */ - lcdc_write(0, &da8xx_fb_reg_base->dma_ctrl); - lcdc_write(0, &da8xx_fb_reg_base->raster_ctrl); - - if (lcd_revision == LCD_VERSION_2) { - lcdc_write(0, &da8xx_fb_reg_base->int_ena_set); - /* Write 1 to reset */ - lcdc_write(LCD_CLK_MAIN_RESET, &da8xx_fb_reg_base->clk_reset); - lcdc_write(0, &da8xx_fb_reg_base->clk_reset); - } -} - -static void lcd_calc_clk_divider(struct da8xx_fb_par *par) -{ - unsigned int lcd_clk, div; - - /* Get clock from sysclk2 */ - lcd_clk = clk_get(2); - - div = lcd_clk / par->pxl_clk; - debug("LCD Clock: %d Divider: %d PixClk: %d\n", - lcd_clk, div, par->pxl_clk); - - /* Configure the LCD clock divisor. */ - lcdc_write(LCD_CLK_DIVISOR(div) | - (LCD_RASTER_MODE & 0x1), &da8xx_fb_reg_base->ctrl); - - if (lcd_revision == LCD_VERSION_2) - lcdc_write(LCD_V2_DMA_CLK_EN | LCD_V2_LIDD_CLK_EN | - LCD_V2_CORE_CLK_EN, - &da8xx_fb_reg_base->clk_ena); -} - -static int lcd_init(struct da8xx_fb_par *par, const struct lcd_ctrl_config *cfg, - const struct da8xx_panel *panel) -{ - u32 bpp; - int ret = 0; - - lcd_reset(par); - - /* Calculate the divider */ - lcd_calc_clk_divider(par); - - if (panel->invert_pxl_clk) - lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_timing_2) | - LCD_INVERT_PIXEL_CLOCK), - &da8xx_fb_reg_base->raster_timing_2); - else - lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_timing_2) & - ~LCD_INVERT_PIXEL_CLOCK), - &da8xx_fb_reg_base->raster_timing_2); - - /* Configure the DMA burst size. */ - ret = lcd_cfg_dma(cfg->dma_burst_sz); - if (ret < 0) - return ret; - - /* Configure the AC bias properties. */ - lcd_cfg_ac_bias(cfg->ac_bias, cfg->ac_bias_intrpt); - - /* Configure the vertical and horizontal sync properties. */ - lcd_cfg_vertical_sync(panel->vbp, panel->vsw, panel->vfp); - lcd_cfg_horizontal_sync(panel->hbp, panel->hsw, panel->hfp); - - /* Configure for display */ - ret = lcd_cfg_display(cfg); - if (ret < 0) - return ret; - - if ((QVGA != cfg->p_disp_panel->panel_type) && - (WVGA != cfg->p_disp_panel->panel_type)) - return -EINVAL; - - if (cfg->bpp <= cfg->p_disp_panel->max_bpp && - cfg->bpp >= cfg->p_disp_panel->min_bpp) - bpp = cfg->bpp; - else - bpp = cfg->p_disp_panel->max_bpp; - if (bpp == 12) - bpp = 16; - ret = lcd_cfg_frame_buffer(par, (unsigned int)panel->width, - (unsigned int)panel->height, bpp, - cfg->raster_order); - if (ret < 0) - return ret; - - /* Configure FDD */ - lcdc_write((lcdc_read(&da8xx_fb_reg_base->raster_ctrl) & 0xfff00fff) | - (cfg->fdd << 12), &da8xx_fb_reg_base->raster_ctrl); - - return 0; -} - -static void lcdc_dma_start(void) -{ - struct da8xx_fb_par *par = da8xx_fb_info->par; - lcdc_write(par->dma_start, - &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); - lcdc_write(par->dma_end, - &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0); - lcdc_write(0, - &da8xx_fb_reg_base->dma_frm_buf_base_addr_1); - lcdc_write(0, - &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_1); -} - -static u32 lcdc_irq_handler_rev01(void) -{ - struct da8xx_fb_par *par = da8xx_fb_info->par; - u32 stat = lcdc_read(&da8xx_fb_reg_base->stat); - u32 reg_ras; - - if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { - debug("LCD_SYNC_LOST\n"); - lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); - lcdc_write(stat, &da8xx_fb_reg_base->stat); - lcd_enable_raster(); - return LCD_SYNC_LOST; - } else if (stat & LCD_PL_LOAD_DONE) { - debug("LCD_PL_LOAD_DONE\n"); - /* - * Must disable raster before changing state of any control bit. - * And also must be disabled before clearing the PL loading - * interrupt via the following write to the status register. If - * this is done after then one gets multiple PL done interrupts. - */ - lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); - - lcdc_write(stat, &da8xx_fb_reg_base->stat); - - /* Disable PL completion interrupt */ - reg_ras = lcdc_read(&da8xx_fb_reg_base->raster_ctrl); - reg_ras &= ~LCD_V1_PL_INT_ENA; - lcdc_write(reg_ras, &da8xx_fb_reg_base->raster_ctrl); - - /* Setup and start data loading mode */ - lcd_blit(LOAD_DATA, par); - return LCD_PL_LOAD_DONE; - } else { - lcdc_write(stat, &da8xx_fb_reg_base->stat); - - if (stat & LCD_END_OF_FRAME0) - debug("LCD_END_OF_FRAME0\n"); - - lcdc_write(par->dma_start, - &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); - lcdc_write(par->dma_end, - &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0); - par->vsync_flag = 1; - return LCD_END_OF_FRAME0; - } - return stat; -} - -static u32 lcdc_irq_handler_rev02(void) -{ - struct da8xx_fb_par *par = da8xx_fb_info->par; - u32 stat = lcdc_read(&da8xx_fb_reg_base->masked_stat); - u32 reg_int; - - if ((stat & LCD_SYNC_LOST) && (stat & LCD_FIFO_UNDERFLOW)) { - debug("LCD_SYNC_LOST\n"); - lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); - lcdc_write(stat, &da8xx_fb_reg_base->masked_stat); - lcd_enable_raster(); - lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind); - return LCD_SYNC_LOST; - } else if (stat & LCD_PL_LOAD_DONE) { - debug("LCD_PL_LOAD_DONE\n"); - /* - * Must disable raster before changing state of any control bit. - * And also must be disabled before clearing the PL loading - * interrupt via the following write to the status register. If - * this is done after then one gets multiple PL done interrupts. - */ - lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); - - lcdc_write(stat, &da8xx_fb_reg_base->masked_stat); - - /* Disable PL completion interrupt */ - reg_int = lcdc_read(&da8xx_fb_reg_base->int_ena_clr) | - (LCD_V2_PL_INT_ENA); - lcdc_write(reg_int, &da8xx_fb_reg_base->int_ena_clr); - - /* Setup and start data loading mode */ - lcd_blit(LOAD_DATA, par); - lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind); - return LCD_PL_LOAD_DONE; - } else { - lcdc_write(stat, &da8xx_fb_reg_base->masked_stat); - - if (stat & LCD_END_OF_FRAME0) - debug("LCD_END_OF_FRAME0\n"); - - lcdc_write(par->dma_start, - &da8xx_fb_reg_base->dma_frm_buf_base_addr_0); - lcdc_write(par->dma_end, - &da8xx_fb_reg_base->dma_frm_buf_ceiling_addr_0); - par->vsync_flag = 1; - lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind); - return LCD_END_OF_FRAME0; - } - lcdc_write(0, &da8xx_fb_reg_base->end_of_int_ind); - return stat; -} - -static u32 lcdc_irq_handler(void) -{ - if (lcd_revision == LCD_VERSION_1) - return lcdc_irq_handler_rev01(); - else - return lcdc_irq_handler_rev02(); -} - -static u32 wait_for_event(u32 event) -{ - u32 timeout = 50000; - u32 ret; - - do { - ret = lcdc_irq_handler(); - udelay(1000); - --timeout; - } while (!(ret & event) && timeout); - - if (!(ret & event)) { - printf("%s: event %d not hit\n", __func__, event); - return -1; - } - - return 0; - -} - -void *video_hw_init(void) -{ - struct da8xx_fb_par *par; - u32 size; - u32 rev; - char *p; - - if (!lcd_panel) { - printf("Display not initialized\n"); - return NULL; - } - gpanel.winSizeX = lcd_panel->width; - gpanel.winSizeY = lcd_panel->height; - gpanel.plnSizeX = lcd_panel->width; - gpanel.plnSizeY = lcd_panel->height; - - switch (bits_x_pixel) { - case 32: - gpanel.gdfBytesPP = 4; - gpanel.gdfIndex = GDF_32BIT_X888RGB; - break; - case 24: - gpanel.gdfBytesPP = 4; - gpanel.gdfIndex = GDF_32BIT_X888RGB; - break; - case 16: - gpanel.gdfBytesPP = 2; - gpanel.gdfIndex = GDF_16BIT_565RGB; - break; - default: - gpanel.gdfBytesPP = 1; - gpanel.gdfIndex = GDF__8BIT_INDEX; - break; - } - - da8xx_fb_reg_base = (struct da8xx_lcd_regs *)DA8XX_LCD_CNTL_BASE; - - /* Determine LCD IP Version */ - rev = lcdc_read(&da8xx_fb_reg_base->revid); - switch (rev) { - case 0x4C100102: - lcd_revision = LCD_VERSION_1; - break; - case 0x4F200800: - case 0x4F201000: - lcd_revision = LCD_VERSION_2; - break; - default: - printf("Unknown PID Reg value 0x%x, defaulting to LCD revision 1\n", - rev); - lcd_revision = LCD_VERSION_1; - break; - } - - debug("rev: 0x%x Resolution: %dx%d %d\n", rev, - gpanel.winSizeX, - gpanel.winSizeY, - da8xx_lcd_cfg->bpp); - - size = sizeof(struct fb_info) + sizeof(struct da8xx_fb_par); - da8xx_fb_info = malloc_cache_aligned(size); - debug("da8xx_fb_info at %x\n", (unsigned int)da8xx_fb_info); - - if (!da8xx_fb_info) { - printf("Memory allocation failed for fb_info\n"); - return NULL; - } - memset(da8xx_fb_info, 0, size); - p = (char *)da8xx_fb_info; - da8xx_fb_info->par = p + sizeof(struct fb_info); - debug("da8xx_par at %x\n", (unsigned int)da8xx_fb_info->par); - - par = da8xx_fb_info->par; - par->pxl_clk = lcd_panel->pxl_clk; - - if (lcd_init(par, da8xx_lcd_cfg, lcd_panel) < 0) { - printf("lcd_init failed\n"); - goto err_release_fb; - } - - /* allocate frame buffer */ - par->vram_size = lcd_panel->width * lcd_panel->height * - da8xx_lcd_cfg->bpp; - par->vram_size = par->vram_size * LCD_NUM_BUFFERS / 8; - - par->vram_virt = malloc_cache_aligned(par->vram_size); - - par->vram_phys = (dma_addr_t) par->vram_virt; - debug("Requesting 0x%x bytes for framebuffer at 0x%x\n", - (unsigned int)par->vram_size, - (unsigned int)par->vram_virt); - if (!par->vram_virt) { - printf("GLCD: malloc for frame buffer failed\n"); - goto err_release_fb; - } - gd->fb_base = (int)par->vram_virt; - - gpanel.frameAdrs = (unsigned int)par->vram_virt; - da8xx_fb_info->screen_base = (char *) par->vram_virt; - da8xx_fb_fix.smem_start = gpanel.frameAdrs; - da8xx_fb_fix.smem_len = par->vram_size; - da8xx_fb_fix.line_length = (lcd_panel->width * da8xx_lcd_cfg->bpp) / 8; - - par->dma_start = par->vram_phys; - par->dma_end = par->dma_start + lcd_panel->height * - da8xx_fb_fix.line_length - 1; - - /* allocate palette buffer */ - par->v_palette_base = malloc_cache_aligned(PALETTE_SIZE); - if (!par->v_palette_base) { - printf("GLCD: malloc for palette buffer failed\n"); - goto err_release_fb_mem; - } - memset(par->v_palette_base, 0, PALETTE_SIZE); - par->p_palette_base = (unsigned int)par->v_palette_base; - - /* Initialize par */ - da8xx_fb_info->var.bits_per_pixel = da8xx_lcd_cfg->bpp; - - da8xx_fb_var.xres = lcd_panel->width; - da8xx_fb_var.xres_virtual = lcd_panel->width; - - da8xx_fb_var.yres = lcd_panel->height; - da8xx_fb_var.yres_virtual = lcd_panel->height * LCD_NUM_BUFFERS; - - da8xx_fb_var.grayscale = - da8xx_lcd_cfg->p_disp_panel->panel_shade == MONOCHROME ? 1 : 0; - da8xx_fb_var.bits_per_pixel = da8xx_lcd_cfg->bpp; - - da8xx_fb_var.hsync_len = lcd_panel->hsw; - da8xx_fb_var.vsync_len = lcd_panel->vsw; - - /* Initialize fbinfo */ - da8xx_fb_info->flags = FBINFO_FLAG_DEFAULT; - da8xx_fb_info->fix = da8xx_fb_fix; - da8xx_fb_info->var = da8xx_fb_var; - da8xx_fb_info->pseudo_palette = par->pseudo_palette; - da8xx_fb_info->fix.visual = (da8xx_fb_info->var.bits_per_pixel <= 8) ? - FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; - - /* Clear interrupt */ - memset((void *)par->vram_virt, 0, par->vram_size); - lcd_disable_raster(NO_WAIT_FOR_FRAME_DONE); - if (lcd_revision == LCD_VERSION_1) - lcdc_write(0xFFFF, &da8xx_fb_reg_base->stat); - else - lcdc_write(0xFFFF, &da8xx_fb_reg_base->masked_stat); - debug("Palette at 0x%x size %d\n", par->p_palette_base, - par->palette_sz); - lcdc_dma_start(); - - /* Load a default palette */ - fb_setcolreg(0, 0, 0, 0, 0xffff, da8xx_fb_info); - - /* Check that the palette is loaded */ - wait_for_event(LCD_PL_LOAD_DONE); - - /* Wait until DMA is working */ - wait_for_event(LCD_END_OF_FRAME0); - - return (void *)&gpanel; - -err_release_fb_mem: - free(par->vram_virt); - -err_release_fb: - free(da8xx_fb_info); - - return NULL; -} - -void da8xx_video_init(const struct da8xx_panel *panel, - const struct lcd_ctrl_config *lcd_cfg, int bits_pixel) -{ - lcd_panel = panel; - da8xx_lcd_cfg = lcd_cfg; - bits_x_pixel = bits_pixel; -} diff --git a/drivers/video/da8xx-fb.h b/drivers/video/da8xx-fb.h deleted file mode 100644 index 9b30d98..0000000 --- a/drivers/video/da8xx-fb.h +++ /dev/null @@ -1,115 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Porting to u-boot: - * - * (C) Copyright 2011 - * Stefano Babic, DENX Software Engineering, sbabic@denx.de. - * - * Copyright (C) 2008-2009 MontaVista Software Inc. - * Copyright (C) 2008-2009 Texas Instruments Inc - * - * Based on the LCD driver for TI Avalanche processors written by - * Ajay Singh and Shalom Hai. - */ - -#ifndef DA8XX_FB_H -#define DA8XX_FB_H - -enum panel_type { - QVGA = 0, - WVGA -}; - -enum panel_shade { - MONOCHROME = 0, - COLOR_ACTIVE, - COLOR_PASSIVE, -}; - -enum raster_load_mode { - LOAD_DATA = 1, - LOAD_PALETTE, -}; - -struct display_panel { - enum panel_type panel_type; /* QVGA */ - int max_bpp; - int min_bpp; - enum panel_shade panel_shade; -}; - -struct da8xx_panel { - const char name[25]; /* Full name <vendor>_<model> */ - unsigned short width; - unsigned short height; - int hfp; /* Horizontal front porch */ - int hbp; /* Horizontal back porch */ - int hsw; /* Horizontal Sync Pulse Width */ - int vfp; /* Vertical front porch */ - int vbp; /* Vertical back porch */ - int vsw; /* Vertical Sync Pulse Width */ - unsigned int pxl_clk; /* Pixel clock */ - unsigned char invert_pxl_clk; /* Invert Pixel clock */ -}; - -struct da8xx_lcdc_platform_data { - const char manu_name[10]; - void *controller_data; - const char type[25]; - void (*panel_power_ctrl)(int); -}; - -struct lcd_ctrl_config { - const struct display_panel *p_disp_panel; - - /* AC Bias Pin Frequency */ - int ac_bias; - - /* AC Bias Pin Transitions per Interrupt */ - int ac_bias_intrpt; - - /* DMA burst size */ - int dma_burst_sz; - - /* Bits per pixel */ - int bpp; - - /* FIFO DMA Request Delay */ - int fdd; - - /* TFT Alternative Signal Mapping (Only for active) */ - unsigned char tft_alt_mode; - - /* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */ - unsigned char stn_565_mode; - - /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */ - unsigned char mono_8bit_mode; - - /* Invert line clock */ - unsigned char invert_line_clock; - - /* Invert frame clock */ - unsigned char invert_frm_clock; - - /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */ - unsigned char sync_edge; - - /* Horizontal and Vertical Sync: Control: 0=ignore */ - unsigned char sync_ctrl; - - /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */ - unsigned char raster_order; -}; - -struct lcd_sync_arg { - int back_porch; - int front_porch; - int pulse_width; -}; - -void da8xx_video_init(const struct da8xx_panel *panel, - const struct lcd_ctrl_config *lcd_cfg, - int bits_pixel); - -#endif /* ifndef DA8XX_FB_H */ diff --git a/drivers/video/formike.c b/drivers/video/formike.c deleted file mode 100644 index 5cbe50d..0000000 --- a/drivers/video/formike.c +++ /dev/null @@ -1,513 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * LCD: Formike, TFT 4.3", 480x800, RGB24, KWH043ST20-F01, DriverIC NT35510-16 - * LCD initialization via SPI - * Based on: - * - */ -#include <common.h> -#include <errno.h> -#include <log.h> -#include <spi.h> -#include <linux/delay.h> - -#define TAG_READ 0x80 -#define TAG_WRITE 0x00 - -#define TAG_DATA 0x40 -#define TAG_COMMAND 0x00 - -#define TAG_ADDR_H 0x20 -#define TAG_ADDR_L 0x00 - -static int spi_write_tag_val(struct spi_slave *spi, unsigned char tag, - unsigned char val) -{ - unsigned long flags = SPI_XFER_BEGIN; - u8 buf[2]; - int ret; - - buf[0] = tag; - ret = spi_xfer(spi, 8, buf, NULL, flags); - buf[0] = val; - flags = SPI_XFER_END; - ret = spi_xfer(spi, 8, buf, NULL, flags); - -#ifdef KWH043ST20_F01_SPI_DEBUG - printf("spi_write_tag_val: tag=%02X, val=%02X ret: %d\n", - tag, val, ret); -#endif /* KWH043ST20_F01_SPI_DEBUG */ - if (ret) - debug("%s: Failed to send: %d\n", __func__, ret); - - return ret; -} - -static void spi_write_dat(struct spi_slave *spi, unsigned int val) -{ - spi_write_tag_val(spi, TAG_WRITE|TAG_DATA, val); -} - -static void spi_write_com(struct spi_slave *spi, unsigned int addr) -{ - spi_write_tag_val(spi, TAG_WRITE|TAG_COMMAND|TAG_ADDR_H, - (addr & 0xff00) >> 8); - spi_write_tag_val(spi, TAG_WRITE|TAG_COMMAND|TAG_ADDR_L, - (addr & 0x00ff) >> 0); -} - -int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode) -{ - struct spi_slave *spi; - int ret; - - spi = spi_setup_slave(bus, cs, max_hz, spi_mode); - if (!spi) { - debug("%s: Failed to set up slave\n", __func__); - return -1; - } - - ret = spi_claim_bus(spi); - if (ret) { - debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); - goto err_claim_bus; - } - - - /* LV2 Page 1 enable */ - spi_write_com(spi, 0xF000); spi_write_dat(spi, 0x55); - spi_write_com(spi, 0xF001); spi_write_dat(spi, 0xAA); - spi_write_com(spi, 0xF002); spi_write_dat(spi, 0x52); - spi_write_com(spi, 0xF003); spi_write_dat(spi, 0x08); - spi_write_com(spi, 0xF004); spi_write_dat(spi, 0x01); - - /* AVDD Set AVDD 5.2V */ - spi_write_com(spi, 0xB000); spi_write_dat(spi, 0x0D); - spi_write_com(spi, 0xB001); spi_write_dat(spi, 0x0D); - spi_write_com(spi, 0xB002); spi_write_dat(spi, 0x0D); - - /* AVDD ratio */ - spi_write_com(spi, 0xB600); spi_write_dat(spi, 0x34); - spi_write_com(spi, 0xB601); spi_write_dat(spi, 0x34); - spi_write_com(spi, 0xB602); spi_write_dat(spi, 0x34); - - /* AVEE -5.2V */ - spi_write_com(spi, 0xB100); spi_write_dat(spi, 0x0D); - spi_write_com(spi, 0xB101); spi_write_dat(spi, 0x0D); - spi_write_com(spi, 0xB102); spi_write_dat(spi, 0x0D); - - /* AVEE ratio */ - spi_write_com(spi, 0xB700); spi_write_dat(spi, 0x35); - spi_write_com(spi, 0xB701); spi_write_dat(spi, 0x35); - spi_write_com(spi, 0xB702); spi_write_dat(spi, 0x35); - - /* VCL -2.5V */ - spi_write_com(spi, 0xB200); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xB201); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xB202); spi_write_dat(spi, 0x00); - - /* VCL ratio */ - spi_write_com(spi, 0xB800); spi_write_dat(spi, 0x24); - spi_write_com(spi, 0xB801); spi_write_dat(spi, 0x24); - spi_write_com(spi, 0xB802); spi_write_dat(spi, 0x24); - - /* VGH 15V */ - spi_write_com(spi, 0xBF00); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xB300); spi_write_dat(spi, 0x08); - spi_write_com(spi, 0xB301); spi_write_dat(spi, 0x08); - spi_write_com(spi, 0xB302); spi_write_dat(spi, 0x08); - - /* VGH ratio */ - spi_write_com(spi, 0xB900); spi_write_dat(spi, 0x34); - spi_write_com(spi, 0xB901); spi_write_dat(spi, 0x34); - spi_write_com(spi, 0xB902); spi_write_dat(spi, 0x34); - - /* VGLX ratio */ - spi_write_com(spi, 0xBA00); spi_write_dat(spi, 0x24); - spi_write_com(spi, 0xBA01); spi_write_dat(spi, 0x24); - spi_write_com(spi, 0xBA02); spi_write_dat(spi, 0x24); - - /* VGMP/VGSP 4.7V/0V */ - spi_write_com(spi, 0xBC00); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xBC01); spi_write_dat(spi, 0x88); - spi_write_com(spi, 0xBC02); spi_write_dat(spi, 0x00); - - /* VGMN/VGSN -4.7V/0V */ - spi_write_com(spi, 0xBD00); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xBD01); spi_write_dat(spi, 0x88); - spi_write_com(spi, 0xBD02); spi_write_dat(spi, 0x00); - - /* VCOM 1.525V */ - spi_write_com(spi, 0xBE00); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xBE01); spi_write_dat(spi, 0x7A); - - /* Gamma Setting */ - spi_write_com(spi, 0xD100); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD101); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xD102); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD103); spi_write_dat(spi, 0x15); - spi_write_com(spi, 0xD104); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD105); spi_write_dat(spi, 0x30); - spi_write_com(spi, 0xD106); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD107); spi_write_dat(spi, 0x47); - spi_write_com(spi, 0xD108); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD109); spi_write_dat(spi, 0x5B); - spi_write_com(spi, 0xD10A); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD10B); spi_write_dat(spi, 0x7D); - spi_write_com(spi, 0xD10C); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD10D); spi_write_dat(spi, 0x9D); - spi_write_com(spi, 0xD10E); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD10F); spi_write_dat(spi, 0xCC); - spi_write_com(spi, 0xD110); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD111); spi_write_dat(spi, 0xF3); - spi_write_com(spi, 0xD112); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD113); spi_write_dat(spi, 0x32); - spi_write_com(spi, 0xD114); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD115); spi_write_dat(spi, 0x63); - spi_write_com(spi, 0xD116); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD117); spi_write_dat(spi, 0xB1); - spi_write_com(spi, 0xD118); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD119); spi_write_dat(spi, 0xF0); - spi_write_com(spi, 0xD11A); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD11B); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD11C); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD11D); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD11E); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD11F); spi_write_dat(spi, 0x67); - spi_write_com(spi, 0xD120); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD121); spi_write_dat(spi, 0x90); - spi_write_com(spi, 0xD122); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD123); spi_write_dat(spi, 0xCB); - spi_write_com(spi, 0xD124); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD125); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD126); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD127); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD128); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD129); spi_write_dat(spi, 0x51); - spi_write_com(spi, 0xD12A); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD12B); spi_write_dat(spi, 0x80); - spi_write_com(spi, 0xD12C); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD12D); spi_write_dat(spi, 0x9F); - spi_write_com(spi, 0xD12E); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD12F); spi_write_dat(spi, 0xBE); - spi_write_com(spi, 0xD130); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD131); spi_write_dat(spi, 0xF9); - spi_write_com(spi, 0xD132); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD133); spi_write_dat(spi, 0xFF); - - spi_write_com(spi, 0xD200); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD201); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xD202); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD203); spi_write_dat(spi, 0x15); - spi_write_com(spi, 0xD204); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD205); spi_write_dat(spi, 0x30); - spi_write_com(spi, 0xD206); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD207); spi_write_dat(spi, 0x47); - spi_write_com(spi, 0xD208); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD209); spi_write_dat(spi, 0x5B); - spi_write_com(spi, 0xD20A); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD20B); spi_write_dat(spi, 0x7D); - spi_write_com(spi, 0xD20C); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD20D); spi_write_dat(spi, 0x9D); - spi_write_com(spi, 0xD20E); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD20F); spi_write_dat(spi, 0xCC); - spi_write_com(spi, 0xD210); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD211); spi_write_dat(spi, 0xF3); - spi_write_com(spi, 0xD212); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD213); spi_write_dat(spi, 0x32); - spi_write_com(spi, 0xD214); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD215); spi_write_dat(spi, 0x63); - spi_write_com(spi, 0xD216); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD217); spi_write_dat(spi, 0xB1); - spi_write_com(spi, 0xD218); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD219); spi_write_dat(spi, 0xF0); - spi_write_com(spi, 0xD21A); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD21B); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD21C); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD21D); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD21E); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD21F); spi_write_dat(spi, 0x67); - spi_write_com(spi, 0xD220); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD221); spi_write_dat(spi, 0x90); - spi_write_com(spi, 0xD222); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD223); spi_write_dat(spi, 0xCB); - spi_write_com(spi, 0xD224); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD225); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD226); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD227); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD228); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD229); spi_write_dat(spi, 0x51); - spi_write_com(spi, 0xD22A); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD22B); spi_write_dat(spi, 0x80); - spi_write_com(spi, 0xD22C); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD22D); spi_write_dat(spi, 0x9F); - spi_write_com(spi, 0xD22E); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD22F); spi_write_dat(spi, 0xBE); - spi_write_com(spi, 0xD230); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD231); spi_write_dat(spi, 0xF9); - spi_write_com(spi, 0xD232); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD233); spi_write_dat(spi, 0xFF); - - spi_write_com(spi, 0xD300); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD301); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xD302); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD303); spi_write_dat(spi, 0x15); - spi_write_com(spi, 0xD304); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD305); spi_write_dat(spi, 0x30); - spi_write_com(spi, 0xD306); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD307); spi_write_dat(spi, 0x47); - spi_write_com(spi, 0xD308); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD309); spi_write_dat(spi, 0x5B); - spi_write_com(spi, 0xD30A); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD30B); spi_write_dat(spi, 0x7D); - spi_write_com(spi, 0xD30C); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD30D); spi_write_dat(spi, 0x9D); - spi_write_com(spi, 0xD30E); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD30F); spi_write_dat(spi, 0xCC); - spi_write_com(spi, 0xD310); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD311); spi_write_dat(spi, 0xF3); - spi_write_com(spi, 0xD312); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD313); spi_write_dat(spi, 0x32); - spi_write_com(spi, 0xD314); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD315); spi_write_dat(spi, 0x63); - spi_write_com(spi, 0xD316); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD317); spi_write_dat(spi, 0xB1); - spi_write_com(spi, 0xD318); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD319); spi_write_dat(spi, 0xF0); - spi_write_com(spi, 0xD31A); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD31B); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD31C); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD31D); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD31E); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD31F); spi_write_dat(spi, 0x67); - spi_write_com(spi, 0xD320); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD321); spi_write_dat(spi, 0x90); - spi_write_com(spi, 0xD322); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD323); spi_write_dat(spi, 0xCB); - spi_write_com(spi, 0xD324); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD325); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD326); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD327); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD328); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD329); spi_write_dat(spi, 0x51); - spi_write_com(spi, 0xD32A); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD32B); spi_write_dat(spi, 0x80); - spi_write_com(spi, 0xD32C); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD32D); spi_write_dat(spi, 0x9F); - spi_write_com(spi, 0xD32E); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD32F); spi_write_dat(spi, 0xBE); - spi_write_com(spi, 0xD330); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD331); spi_write_dat(spi, 0xF9); - spi_write_com(spi, 0xD332); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD333); spi_write_dat(spi, 0xFF); - - spi_write_com(spi, 0xD400); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD401); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xD402); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD403); spi_write_dat(spi, 0x15); - spi_write_com(spi, 0xD404); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD405); spi_write_dat(spi, 0x30); - spi_write_com(spi, 0xD406); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD407); spi_write_dat(spi, 0x47); - spi_write_com(spi, 0xD408); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD409); spi_write_dat(spi, 0x5B); - spi_write_com(spi, 0xD40A); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD40B); spi_write_dat(spi, 0x7D); - spi_write_com(spi, 0xD40C); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD40D); spi_write_dat(spi, 0x9D); - spi_write_com(spi, 0xD40E); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD40F); spi_write_dat(spi, 0xCC); - spi_write_com(spi, 0xD410); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD411); spi_write_dat(spi, 0xF3); - spi_write_com(spi, 0xD412); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD413); spi_write_dat(spi, 0x32); - spi_write_com(spi, 0xD414); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD415); spi_write_dat(spi, 0x63); - spi_write_com(spi, 0xD416); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD417); spi_write_dat(spi, 0xB1); - spi_write_com(spi, 0xD418); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD419); spi_write_dat(spi, 0xF0); - spi_write_com(spi, 0xD41A); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD41B); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD41C); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD41D); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD41E); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD41F); spi_write_dat(spi, 0x67); - spi_write_com(spi, 0xD420); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD421); spi_write_dat(spi, 0x90); - spi_write_com(spi, 0xD422); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD423); spi_write_dat(spi, 0xCB); - spi_write_com(spi, 0xD424); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD425); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD426); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD427); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD428); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD429); spi_write_dat(spi, 0x51); - spi_write_com(spi, 0xD42A); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD42B); spi_write_dat(spi, 0x80); - spi_write_com(spi, 0xD42C); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD42D); spi_write_dat(spi, 0x9F); - spi_write_com(spi, 0xD42E); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD42F); spi_write_dat(spi, 0xBE); - spi_write_com(spi, 0xD430); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD431); spi_write_dat(spi, 0xF9); - spi_write_com(spi, 0xD432); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD433); spi_write_dat(spi, 0xFF); - - spi_write_com(spi, 0xD500); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD501); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xD502); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD503); spi_write_dat(spi, 0x15); - spi_write_com(spi, 0xD504); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD505); spi_write_dat(spi, 0x30); - spi_write_com(spi, 0xD506); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD507); spi_write_dat(spi, 0x47); - spi_write_com(spi, 0xD508); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD509); spi_write_dat(spi, 0x5B); - spi_write_com(spi, 0xD50A); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD50B); spi_write_dat(spi, 0x7D); - spi_write_com(spi, 0xD50C); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD50D); spi_write_dat(spi, 0x9D); - spi_write_com(spi, 0xD50E); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD50F); spi_write_dat(spi, 0xCC); - spi_write_com(spi, 0xD510); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD511); spi_write_dat(spi, 0xF3); - spi_write_com(spi, 0xD512); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD513); spi_write_dat(spi, 0x32); - spi_write_com(spi, 0xD514); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD515); spi_write_dat(spi, 0x63); - spi_write_com(spi, 0xD516); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD517); spi_write_dat(spi, 0xB1); - spi_write_com(spi, 0xD518); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD519); spi_write_dat(spi, 0xF0); - spi_write_com(spi, 0xD51A); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD51B); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD51C); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD51D); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD51E); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD51F); spi_write_dat(spi, 0x67); - spi_write_com(spi, 0xD520); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD521); spi_write_dat(spi, 0x90); - spi_write_com(spi, 0xD522); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD523); spi_write_dat(spi, 0xCB); - spi_write_com(spi, 0xD524); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD525); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD526); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD527); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD528); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD529); spi_write_dat(spi, 0x51); - spi_write_com(spi, 0xD52A); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD52B); spi_write_dat(spi, 0x80); - spi_write_com(spi, 0xD52C); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD52D); spi_write_dat(spi, 0x9F); - spi_write_com(spi, 0xD52E); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD52F); spi_write_dat(spi, 0xBE); - spi_write_com(spi, 0xD530); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD531); spi_write_dat(spi, 0xF9); - spi_write_com(spi, 0xD532); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD533); spi_write_dat(spi, 0xFF); - - spi_write_com(spi, 0xD600); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD601); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xD602); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD603); spi_write_dat(spi, 0x15); - spi_write_com(spi, 0xD604); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD605); spi_write_dat(spi, 0x30); - spi_write_com(spi, 0xD606); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD607); spi_write_dat(spi, 0x47); - spi_write_com(spi, 0xD608); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD609); spi_write_dat(spi, 0x5B); - spi_write_com(spi, 0xD60A); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD60B); spi_write_dat(spi, 0x7D); - spi_write_com(spi, 0xD60C); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD60D); spi_write_dat(spi, 0x9D); - spi_write_com(spi, 0xD60E); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD60F); spi_write_dat(spi, 0xCC); - spi_write_com(spi, 0xD610); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xD611); spi_write_dat(spi, 0xF3); - spi_write_com(spi, 0xD612); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD613); spi_write_dat(spi, 0x32); - spi_write_com(spi, 0xD614); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD615); spi_write_dat(spi, 0x63); - spi_write_com(spi, 0xD616); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD617); spi_write_dat(spi, 0xB1); - spi_write_com(spi, 0xD618); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD619); spi_write_dat(spi, 0xF0); - spi_write_com(spi, 0xD61A); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xD61B); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD61C); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD61D); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD61E); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD61F); spi_write_dat(spi, 0x67); - spi_write_com(spi, 0xD620); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD621); spi_write_dat(spi, 0x90); - spi_write_com(spi, 0xD622); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD623); spi_write_dat(spi, 0xCB); - spi_write_com(spi, 0xD624); spi_write_dat(spi, 0x02); - spi_write_com(spi, 0xD625); spi_write_dat(spi, 0xF2); - spi_write_com(spi, 0xD626); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD627); spi_write_dat(spi, 0x2A); - spi_write_com(spi, 0xD628); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD629); spi_write_dat(spi, 0x51); - spi_write_com(spi, 0xD62A); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD62B); spi_write_dat(spi, 0x80); - spi_write_com(spi, 0xD62C); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD62D); spi_write_dat(spi, 0x9F); - spi_write_com(spi, 0xD62E); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD62F); spi_write_dat(spi, 0xBE); - spi_write_com(spi, 0xD630); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD631); spi_write_dat(spi, 0xF9); - spi_write_com(spi, 0xD632); spi_write_dat(spi, 0x03); - spi_write_com(spi, 0xD633); spi_write_dat(spi, 0xFF); - - /* LV2 Page 0 enable */ - spi_write_com(spi, 0xF000); spi_write_dat(spi, 0x55); - spi_write_com(spi, 0xF001); spi_write_dat(spi, 0xAA); - spi_write_com(spi, 0xF002); spi_write_dat(spi, 0x52); - spi_write_com(spi, 0xF003); spi_write_dat(spi, 0x08); - spi_write_com(spi, 0xF004); spi_write_dat(spi, 0x00); - - /* Display control */ - spi_write_com(spi, 0xB100); spi_write_dat(spi, 0xFC); - spi_write_com(spi, 0xB101); spi_write_dat(spi, 0x00); - - /* Source hold time */ - spi_write_com(spi, 0xB600); spi_write_dat(spi, 0x05); - - /* Gate EQ control */ - spi_write_com(spi, 0xB700); spi_write_dat(spi, 0x70); - spi_write_com(spi, 0xB701); spi_write_dat(spi, 0x70); - - /* Source EQ control (Mode 2) */ - spi_write_com(spi, 0xB800); spi_write_dat(spi, 0x01); - spi_write_com(spi, 0xB801); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xB802); spi_write_dat(spi, 0x05); - spi_write_com(spi, 0xB803); spi_write_dat(spi, 0x05); - - /* Inversion mode (Column) */ - spi_write_com(spi, 0xBC00); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xBC01); spi_write_dat(spi, 0x00); - spi_write_com(spi, 0xBC02); spi_write_dat(spi, 0x00); - - /* Timing control 8phase dual side/4H/4delay/RST_EN */ - spi_write_com(spi, 0xC900); spi_write_dat(spi, 0xD0); - spi_write_com(spi, 0xC901); spi_write_dat(spi, 0x82); - spi_write_com(spi, 0xC902); spi_write_dat(spi, 0x50); - spi_write_com(spi, 0xC903); spi_write_dat(spi, 0x50); - spi_write_com(spi, 0xC904); spi_write_dat(spi, 0x50); - - spi_write_com(spi, 0x3A00); spi_write_dat(spi, 0x55); - mdelay(120); - spi_write_com(spi, 0x1100); - mdelay(120); - spi_write_com(spi, 0x2900); - mdelay(120); - /* spi_write_com(spi, 0x2100); spi_write_dat(spi, 0x00); */ - spi_write_com(spi, 0x2C00); - - return 0; -err_claim_bus: - spi_free_slave(spi); - return -1; -} diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c deleted file mode 100644 index dc5b24c..0000000 --- a/drivers/video/fsl_dcu_fb.c +++ /dev/null @@ -1,549 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * Copyright 2019 Toradex AG - * - * FSL DCU Framebuffer driver - */ - -#include <init.h> -#include <asm/cache.h> -#include <asm/global_data.h> -#include <asm/io.h> -#include <common.h> -#include <dm.h> -#include <fdt_support.h> -#include <fsl_dcu_fb.h> -#include <linux/fb.h> -#include <malloc.h> -#include <video.h> -#include <video_fb.h> -#include "videomodes.h" - -/* Convert the X,Y resolution pair into a single number */ -#define RESOLUTION(x, y) (((u32)(x) << 16) | (y)) - -#ifdef CONFIG_SYS_FSL_DCU_LE -#define dcu_read32 in_le32 -#define dcu_write32 out_le32 -#elif defined(CONFIG_SYS_FSL_DCU_BE) -#define dcu_read32 in_be32 -#define dcu_write32 out_be32 -#endif - -#define DCU_MODE_BLEND_ITER(x) ((x) << 20) -#define DCU_MODE_RASTER_EN (1 << 14) -#define DCU_MODE_NORMAL 1 -#define DCU_MODE_COLORBAR 3 -#define DCU_BGND_R(x) ((x) << 16) -#define DCU_BGND_G(x) ((x) << 8) -#define DCU_BGND_B(x) (x) -#define DCU_DISP_SIZE_DELTA_Y(x) ((x) << 16) -#define DCU_DISP_SIZE_DELTA_X(x) (x) -#define DCU_HSYN_PARA_BP(x) ((x) << 22) -#define DCU_HSYN_PARA_PW(x) ((x) << 11) -#define DCU_HSYN_PARA_FP(x) (x) -#define DCU_VSYN_PARA_BP(x) ((x) << 22) -#define DCU_VSYN_PARA_PW(x) ((x) << 11) -#define DCU_VSYN_PARA_FP(x) (x) -#define DCU_SYN_POL_INV_PXCK_FALL (1 << 6) -#define DCU_SYN_POL_NEG_REMAIN (0 << 5) -#define DCU_SYN_POL_INV_VS_LOW (1 << 1) -#define DCU_SYN_POL_INV_HS_LOW (1) -#define DCU_THRESHOLD_LS_BF_VS(x) ((x) << 16) -#define DCU_THRESHOLD_OUT_BUF_HIGH(x) ((x) << 8) -#define DCU_THRESHOLD_OUT_BUF_LOW(x) (x) -#define DCU_UPDATE_MODE_MODE (1 << 31) -#define DCU_UPDATE_MODE_READREG (1 << 30) - -#define DCU_CTRLDESCLN_1_HEIGHT(x) ((x) << 16) -#define DCU_CTRLDESCLN_1_WIDTH(x) (x) -#define DCU_CTRLDESCLN_2_POSY(x) ((x) << 16) -#define DCU_CTRLDESCLN_2_POSX(x) (x) -#define DCU_CTRLDESCLN_4_EN (1 << 31) -#define DCU_CTRLDESCLN_4_TILE_EN (1 << 30) -#define DCU_CTRLDESCLN_4_DATA_SEL_CLUT (1 << 29) -#define DCU_CTRLDESCLN_4_SAFETY_EN (1 << 28) -#define DCU_CTRLDESCLN_4_TRANS(x) ((x) << 20) -#define DCU_CTRLDESCLN_4_BPP(x) ((x) << 16) -#define DCU_CTRLDESCLN_4_RLE_EN (1 << 15) -#define DCU_CTRLDESCLN_4_LUOFFS(x) ((x) << 4) -#define DCU_CTRLDESCLN_4_BB_ON (1 << 2) -#define DCU_CTRLDESCLN_4_AB(x) (x) -#define DCU_CTRLDESCLN_5_CKMAX_R(x) ((x) << 16) -#define DCU_CTRLDESCLN_5_CKMAX_G(x) ((x) << 8) -#define DCU_CTRLDESCLN_5_CKMAX_B(x) (x) -#define DCU_CTRLDESCLN_6_CKMIN_R(x) ((x) << 16) -#define DCU_CTRLDESCLN_6_CKMIN_G(x) ((x) << 8) -#define DCU_CTRLDESCLN_6_CKMIN_B(x) (x) -#define DCU_CTRLDESCLN_7_TILE_VER(x) ((x) << 16) -#define DCU_CTRLDESCLN_7_TILE_HOR(x) (x) -#define DCU_CTRLDESCLN_8_FG_FCOLOR(x) (x) -#define DCU_CTRLDESCLN_9_BG_BCOLOR(x) (x) - -#define BPP_16_RGB565 4 -#define BPP_24_RGB888 5 -#define BPP_32_ARGB8888 6 - -DECLARE_GLOBAL_DATA_PTR; - -/* - * This setting is used for the TWR_LCD_RGB card - */ -static struct fb_videomode fsl_dcu_mode_480_272 = { - .name = "480x272-60", - .refresh = 60, - .xres = 480, - .yres = 272, - .pixclock = 91996, - .left_margin = 2, - .right_margin = 2, - .upper_margin = 1, - .lower_margin = 1, - .hsync_len = 41, - .vsync_len = 2, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * This setting is used for Siliconimage SiI9022A HDMI - */ -static struct fb_videomode fsl_dcu_cea_mode_640_480 = { - .name = "640x480-60", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 39722, - .left_margin = 48, - .right_margin = 16, - .upper_margin = 33, - .lower_margin = 10, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static struct fb_videomode fsl_dcu_mode_640_480 = { - .name = "640x480-60", - .refresh = 60, - .xres = 640, - .yres = 480, - .pixclock = 25175, - .left_margin = 40, - .right_margin = 24, - .upper_margin = 32, - .lower_margin = 11, - .hsync_len = 96, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static struct fb_videomode fsl_dcu_mode_800_480 = { - .name = "800x480-60", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 33260, - .left_margin = 216, - .right_margin = 40, - .upper_margin = 35, - .lower_margin = 10, - .hsync_len = 128, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, -}; - -static struct fb_videomode fsl_dcu_mode_1024_600 = { - .name = "1024x600-60", - .refresh = 60, - .xres = 1024, - .yres = 600, - .pixclock = 48000, - .left_margin = 104, - .right_margin = 43, - .upper_margin = 24, - .lower_margin = 20, - .hsync_len = 5, - .vsync_len = 5, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED, -}; - -/* - * DCU register map - */ -struct dcu_reg { - u32 desc_cursor[4]; - u32 mode; - u32 bgnd; - u32 disp_size; - u32 hsyn_para; - u32 vsyn_para; - u32 synpol; - u32 threshold; - u32 int_status; - u32 int_mask; - u32 colbar[8]; - u32 div_ratio; - u32 sign_calc[2]; - u32 crc_val; - u8 res_064[0x6c-0x64]; - u32 parr_err_status1; - u8 res_070[0x7c-0x70]; - u32 parr_err_status3; - u32 mparr_err_status1; - u8 res_084[0x90-0x84]; - u32 mparr_err_status3; - u32 threshold_inp_buf[2]; - u8 res_09c[0xa0-0x9c]; - u32 luma_comp; - u32 chroma_red; - u32 chroma_green; - u32 chroma_blue; - u32 crc_pos; - u32 lyr_intpol_en; - u32 lyr_luma_comp; - u32 lyr_chrm_red; - u32 lyr_chrm_grn; - u32 lyr_chrm_blue; - u8 res_0c4[0xcc-0xc8]; - u32 update_mode; - u32 underrun; - u8 res_0d4[0x100-0xd4]; - u32 gpr; - u32 slr_l[2]; - u32 slr_disp_size; - u32 slr_hvsync_para; - u32 slr_pol; - u32 slr_l_transp[2]; - u8 res_120[0x200-0x120]; - u32 ctrldescl[DCU_LAYER_MAX_NUM][16]; -}; - -static void reset_total_layers(void) -{ - struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; - int i; - - for (i = 0; i < DCU_LAYER_MAX_NUM; i++) { - dcu_write32(®s->ctrldescl[i][0], 0); - dcu_write32(®s->ctrldescl[i][1], 0); - dcu_write32(®s->ctrldescl[i][2], 0); - dcu_write32(®s->ctrldescl[i][3], 0); - dcu_write32(®s->ctrldescl[i][4], 0); - dcu_write32(®s->ctrldescl[i][5], 0); - dcu_write32(®s->ctrldescl[i][6], 0); - dcu_write32(®s->ctrldescl[i][7], 0); - dcu_write32(®s->ctrldescl[i][8], 0); - dcu_write32(®s->ctrldescl[i][9], 0); - dcu_write32(®s->ctrldescl[i][10], 0); - } -} - -static int layer_ctrldesc_init(struct fb_info fbinfo, - int index, u32 pixel_format) -{ - struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; - unsigned int bpp = BPP_24_RGB888; - - dcu_write32(®s->ctrldescl[index][0], - DCU_CTRLDESCLN_1_HEIGHT(fbinfo.var.yres) | - DCU_CTRLDESCLN_1_WIDTH(fbinfo.var.xres)); - - dcu_write32(®s->ctrldescl[index][1], - DCU_CTRLDESCLN_2_POSY(0) | - DCU_CTRLDESCLN_2_POSX(0)); - - dcu_write32(®s->ctrldescl[index][2], - (unsigned int)fbinfo.screen_base); - - switch (pixel_format) { - case 16: - bpp = BPP_16_RGB565; - break; - case 24: - bpp = BPP_24_RGB888; - break; - case 32: - bpp = BPP_32_ARGB8888; - break; - default: - printf("unsupported color depth: %u\n", pixel_format); - } - - dcu_write32(®s->ctrldescl[index][3], - DCU_CTRLDESCLN_4_EN | - DCU_CTRLDESCLN_4_TRANS(0xff) | - DCU_CTRLDESCLN_4_BPP(bpp) | - DCU_CTRLDESCLN_4_AB(0)); - - dcu_write32(®s->ctrldescl[index][4], - DCU_CTRLDESCLN_5_CKMAX_R(0xff) | - DCU_CTRLDESCLN_5_CKMAX_G(0xff) | - DCU_CTRLDESCLN_5_CKMAX_B(0xff)); - dcu_write32(®s->ctrldescl[index][5], - DCU_CTRLDESCLN_6_CKMIN_R(0) | - DCU_CTRLDESCLN_6_CKMIN_G(0) | - DCU_CTRLDESCLN_6_CKMIN_B(0)); - - dcu_write32(®s->ctrldescl[index][6], - DCU_CTRLDESCLN_7_TILE_VER(0) | - DCU_CTRLDESCLN_7_TILE_HOR(0)); - - dcu_write32(®s->ctrldescl[index][7], DCU_CTRLDESCLN_8_FG_FCOLOR(0)); - dcu_write32(®s->ctrldescl[index][8], DCU_CTRLDESCLN_9_BG_BCOLOR(0)); - - return 0; -} - -int fsl_dcu_init(struct fb_info *fbinfo, unsigned int xres, - unsigned int yres, unsigned int pixel_format) -{ - struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; - unsigned int div, mode; -/* - * When DM_VIDEO is enabled reservation of framebuffer is done - * in advance during bind() call. - */ -#if !CONFIG_IS_ENABLED(DM_VIDEO) - fbinfo->screen_size = fbinfo->var.xres * fbinfo->var.yres * - (fbinfo->var.bits_per_pixel / 8); - - if (fbinfo->screen_size > CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB) { - fbinfo->screen_size = 0; - return -ENOMEM; - } - /* Reserve framebuffer at the end of memory */ - gd->fb_base = gd->bd->bi_dram[0].start + - gd->bd->bi_dram[0].size - fbinfo->screen_size; - fbinfo->screen_base = (char *)gd->fb_base; - - memset(fbinfo->screen_base, 0, fbinfo->screen_size); -#endif - - reset_total_layers(); - - dcu_write32(®s->disp_size, - DCU_DISP_SIZE_DELTA_Y(fbinfo->var.yres) | - DCU_DISP_SIZE_DELTA_X(fbinfo->var.xres / 16)); - - dcu_write32(®s->hsyn_para, - DCU_HSYN_PARA_BP(fbinfo->var.left_margin) | - DCU_HSYN_PARA_PW(fbinfo->var.hsync_len) | - DCU_HSYN_PARA_FP(fbinfo->var.right_margin)); - - dcu_write32(®s->vsyn_para, - DCU_VSYN_PARA_BP(fbinfo->var.upper_margin) | - DCU_VSYN_PARA_PW(fbinfo->var.vsync_len) | - DCU_VSYN_PARA_FP(fbinfo->var.lower_margin)); - - dcu_write32(®s->synpol, - DCU_SYN_POL_INV_PXCK_FALL | - DCU_SYN_POL_NEG_REMAIN | - DCU_SYN_POL_INV_VS_LOW | - DCU_SYN_POL_INV_HS_LOW); - - dcu_write32(®s->bgnd, - DCU_BGND_R(0) | DCU_BGND_G(0) | DCU_BGND_B(0)); - - dcu_write32(®s->mode, - DCU_MODE_BLEND_ITER(2) | - DCU_MODE_RASTER_EN); - - dcu_write32(®s->threshold, - DCU_THRESHOLD_LS_BF_VS(0x3) | - DCU_THRESHOLD_OUT_BUF_HIGH(0x78) | - DCU_THRESHOLD_OUT_BUF_LOW(0)); - - mode = dcu_read32(®s->mode); - dcu_write32(®s->mode, mode | DCU_MODE_NORMAL); - - layer_ctrldesc_init(*fbinfo, 0, pixel_format); - - div = dcu_set_pixel_clock(fbinfo->var.pixclock); - dcu_write32(®s->div_ratio, (div - 1)); - - dcu_write32(®s->update_mode, DCU_UPDATE_MODE_READREG); - - return 0; -} - -ulong board_get_usable_ram_top(ulong total_size) -{ - return gd->ram_top - CONFIG_VIDEO_FSL_DCU_MAX_FB_SIZE_MB; -} - -int fsl_probe_common(struct fb_info *fbinfo, unsigned int *win_x, - unsigned int *win_y) -{ - const char *options; - unsigned int depth = 0, freq = 0; - - struct fb_videomode *fsl_dcu_mode_db = &fsl_dcu_mode_480_272; - - if (!video_get_video_mode(win_x, win_y, &depth, &freq, - &options)) - return -EINVAL; - - /* Find the monitor port, which is a required option */ - if (!options) - return -EINVAL; - - if (strncmp(options, "monitor=", 8) != 0) - return -EINVAL; - - switch (RESOLUTION(*win_x, *win_y)) { - case RESOLUTION(480, 272): - fsl_dcu_mode_db = &fsl_dcu_mode_480_272; - break; - case RESOLUTION(640, 480): - if (!strncmp(options, "monitor=hdmi", 12)) - fsl_dcu_mode_db = &fsl_dcu_cea_mode_640_480; - else - fsl_dcu_mode_db = &fsl_dcu_mode_640_480; - break; - case RESOLUTION(800, 480): - fsl_dcu_mode_db = &fsl_dcu_mode_800_480; - break; - case RESOLUTION(1024, 600): - fsl_dcu_mode_db = &fsl_dcu_mode_1024_600; - break; - default: - printf("unsupported resolution %ux%u\n", - *win_x, *win_y); - } - - fbinfo->var.xres = fsl_dcu_mode_db->xres; - fbinfo->var.yres = fsl_dcu_mode_db->yres; - fbinfo->var.bits_per_pixel = 32; - fbinfo->var.pixclock = fsl_dcu_mode_db->pixclock; - fbinfo->var.left_margin = fsl_dcu_mode_db->left_margin; - fbinfo->var.right_margin = fsl_dcu_mode_db->right_margin; - fbinfo->var.upper_margin = fsl_dcu_mode_db->upper_margin; - fbinfo->var.lower_margin = fsl_dcu_mode_db->lower_margin; - fbinfo->var.hsync_len = fsl_dcu_mode_db->hsync_len; - fbinfo->var.vsync_len = fsl_dcu_mode_db->vsync_len; - fbinfo->var.sync = fsl_dcu_mode_db->sync; - fbinfo->var.vmode = fsl_dcu_mode_db->vmode; - fbinfo->fix.line_length = fbinfo->var.xres * - fbinfo->var.bits_per_pixel / 8; - - return platform_dcu_init(fbinfo, *win_x, *win_y, - options + 8, fsl_dcu_mode_db); -} - -#ifndef CONFIG_DM_VIDEO -static struct fb_info info; - -#if defined(CONFIG_OF_BOARD_SETUP) -int fsl_dcu_fixedfb_setup(void *blob) -{ - u64 start, size; - int ret; - - start = gd->bd->bi_dram[0].start; - size = gd->bd->bi_dram[0].size - info.screen_size; - - /* - * Align size on section size (1 MiB). - */ - size &= 0xfff00000; - ret = fdt_fixup_memory_banks(blob, &start, &size, 1); - if (ret) { - eprintf("Cannot setup fb: Error reserving memory\n"); - return ret; - } - - return 0; -} -#endif - -void *video_hw_init(void) -{ - static GraphicDevice ctfb; - - if (fsl_probe_common(&info, &ctfb.winSizeX, &ctfb.winSizeY) < 0) - return NULL; - - ctfb.frameAdrs = (unsigned int)info.screen_base; - ctfb.plnSizeX = ctfb.winSizeX; - ctfb.plnSizeY = ctfb.winSizeY; - - ctfb.gdfBytesPP = 4; - ctfb.gdfIndex = GDF_32BIT_X888RGB; - - ctfb.memSize = info.screen_size; - - return &ctfb; -} - -#else /* ifndef CONFIG_DM_VIDEO */ - -static int fsl_dcu_video_probe(struct udevice *dev) -{ - struct video_uc_plat *plat = dev_get_uclass_plat(dev); - struct video_priv *uc_priv = dev_get_uclass_priv(dev); - struct fb_info fbinfo = { 0 }; - unsigned int win_x; - unsigned int win_y; - u32 fb_start, fb_end; - int ret = 0; - - fb_start = plat->base & ~(MMU_SECTION_SIZE - 1); - fb_end = plat->base + plat->size; - fb_end = ALIGN(fb_end, 1 << MMU_SECTION_SHIFT); - - fbinfo.screen_base = (char *)fb_start; - fbinfo.screen_size = plat->size; - - ret = fsl_probe_common(&fbinfo, &win_x, &win_y); - if (ret < 0) - return ret; - - uc_priv->bpix = VIDEO_BPP32; - uc_priv->xsize = win_x; - uc_priv->ysize = win_y; - - /* Enable dcache for the frame buffer */ - mmu_set_region_dcache_behaviour(fb_start, fb_end - fb_start, - DCACHE_WRITEBACK); - video_set_flush_dcache(dev, true); - return ret; -} - -static int fsl_dcu_video_bind(struct udevice *dev) -{ - struct video_uc_plat *plat = dev_get_uclass_plat(dev); - unsigned int win_x; - unsigned int win_y; - unsigned int depth = 0, freq = 0; - const char *options; - int ret = 0; - - ret = video_get_video_mode(&win_x, &win_y, &depth, &freq, &options); - if (ret < 0) - return ret; - - plat->size = win_x * win_y * 32; - - return 0; -} - -static const struct udevice_id fsl_dcu_video_ids[] = { - { .compatible = "fsl,vf610-dcu" }, - { /* sentinel */ } -}; - -U_BOOT_DRIVER(fsl_dcu_video) = { - .name = "fsl_dcu_video", - .id = UCLASS_VIDEO, - .of_match = fsl_dcu_video_ids, - .bind = fsl_dcu_video_bind, - .probe = fsl_dcu_video_probe, - .flags = DM_FLAG_PRE_RELOC, -}; -#endif /* ifndef CONFIG_DM_VIDEO */ diff --git a/drivers/video/fsl_diu_fb.c b/drivers/video/fsl_diu_fb.c deleted file mode 100644 index 2c21e29..0000000 --- a/drivers/video/fsl_diu_fb.c +++ /dev/null @@ -1,416 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc. - * Authors: York Sun <yorksun@freescale.com> - * Timur Tabi <timur@freescale.com> - * - * FSL DIU Framebuffer driver - */ - -#include <common.h> -#include <malloc.h> -#include <asm/io.h> - -#include "videomodes.h" -#include <video_fb.h> -#include <fsl_diu_fb.h> -#include <linux/list.h> -#include <linux/fb.h> - -/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */ -static struct fb_videomode fsl_diu_mode_800_480 = { - .name = "800x480-60", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 31250, - .left_margin = 86, - .right_margin = 42, - .upper_margin = 33, - .lower_margin = 10, - .hsync_len = 128, - .vsync_len = 2, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* For the SHARP LQ084S3LG01, used on the P1022DS board */ -static struct fb_videomode fsl_diu_mode_800_600 = { - .name = "800x600-60", - .refresh = 60, - .xres = 800, - .yres = 600, - .pixclock = 25000, - .left_margin = 88, - .right_margin = 40, - .upper_margin = 23, - .lower_margin = 1, - .hsync_len = 128, - .vsync_len = 4, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * These parameters give default parameters - * for video output 1024x768, - * FIXME - change timing to proper amounts - * hsync 31.5kHz, vsync 60Hz - */ -static struct fb_videomode fsl_diu_mode_1024_768 = { - .name = "1024x768-60", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 160, - .right_margin = 24, - .upper_margin = 29, - .lower_margin = 3, - .hsync_len = 136, - .vsync_len = 6, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode fsl_diu_mode_1280_1024 = { - .name = "1280x1024-60", - .refresh = 60, - .xres = 1280, - .yres = 1024, - .pixclock = 9375, - .left_margin = 38, - .right_margin = 128, - .upper_margin = 2, - .lower_margin = 7, - .hsync_len = 216, - .vsync_len = 37, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode fsl_diu_mode_1280_720 = { - .name = "1280x720-60", - .refresh = 60, - .xres = 1280, - .yres = 720, - .pixclock = 13426, - .left_margin = 192, - .right_margin = 64, - .upper_margin = 22, - .lower_margin = 1, - .hsync_len = 136, - .vsync_len = 3, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -static struct fb_videomode fsl_diu_mode_1920_1080 = { - .name = "1920x1080-60", - .refresh = 60, - .xres = 1920, - .yres = 1080, - .pixclock = 5787, - .left_margin = 328, - .right_margin = 120, - .upper_margin = 34, - .lower_margin = 1, - .hsync_len = 208, - .vsync_len = 3, - .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, - .vmode = FB_VMODE_NONINTERLACED -}; - -/* - * These are the fields of area descriptor(in DDR memory) for every plane - */ -struct diu_ad { - /* Word 0(32-bit) in DDR memory */ - __le32 pix_fmt; /* hard coding pixel format */ - /* Word 1(32-bit) in DDR memory */ - __le32 addr; - /* Word 2(32-bit) in DDR memory */ - __le32 src_size_g_alpha; - /* Word 3(32-bit) in DDR memory */ - __le32 aoi_size; - /* Word 4(32-bit) in DDR memory */ - __le32 offset_xyi; - /* Word 5(32-bit) in DDR memory */ - __le32 offset_xyd; - /* Word 6(32-bit) in DDR memory */ - __le32 ckmax_r:8; - __le32 ckmax_g:8; - __le32 ckmax_b:8; - __le32 res9:8; - /* Word 7(32-bit) in DDR memory */ - __le32 ckmin_r:8; - __le32 ckmin_g:8; - __le32 ckmin_b:8; - __le32 res10:8; - /* Word 8(32-bit) in DDR memory */ - __le32 next_ad; - /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */ - __le32 res[3]; -} __attribute__ ((packed)); - -/* - * DIU register map - */ -struct diu { - __be32 desc[3]; - __be32 gamma; - __be32 pallete; - __be32 cursor; - __be32 curs_pos; - __be32 diu_mode; - __be32 bgnd; - __be32 bgnd_wb; - __be32 disp_size; - __be32 wb_size; - __be32 wb_mem_addr; - __be32 hsyn_para; - __be32 vsyn_para; - __be32 syn_pol; - __be32 thresholds; - __be32 int_status; - __be32 int_mask; - __be32 colorbar[8]; - __be32 filling; - __be32 plut; -} __attribute__ ((packed)); - -struct diu_addr { - void *vaddr; /* Virtual address */ - u32 paddr; /* 32-bit physical address */ - unsigned int offset; /* Alignment offset */ -}; - -static struct fb_info info; - -/* - * Align to 64-bit(8-byte), 32-byte, etc. - */ -static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align) -{ - u32 offset, ssize; - u32 mask; - - ssize = size + bytes_align; - buf->vaddr = malloc(ssize); - if (!buf->vaddr) - return -1; - - memset(buf->vaddr, 0, ssize); - mask = bytes_align - 1; - offset = (u32)buf->vaddr & mask; - if (offset) { - buf->offset = bytes_align - offset; - buf->vaddr += offset; - } else - buf->offset = 0; - - buf->paddr = virt_to_phys(buf->vaddr); - return 0; -} - -/* - * Allocate a framebuffer and an Area Descriptor that points to it. Both - * are created in the same memory block. The Area Descriptor is updated to - * point to the framebuffer memory. Memory is aligned as needed. - */ -static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres, - unsigned int depth, char **fb) -{ - unsigned long size = xres * yres * depth; - struct diu_addr addr; - struct diu_ad *ad; - size_t ad_size = roundup(sizeof(struct diu_ad), 32); - - /* - * Allocate a memory block that holds the Area Descriptor and the - * frame buffer right behind it. To keep the code simple, everything - * is aligned on a 32-byte address. - */ - if (allocate_buf(&addr, ad_size + size, 32) < 0) - return NULL; - - ad = addr.vaddr; - ad->addr = cpu_to_le32(addr.paddr + ad_size); - ad->aoi_size = cpu_to_le32((yres << 16) | xres); - ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres); - ad->offset_xyi = 0; - ad->offset_xyd = 0; - - if (fb) - *fb = addr.vaddr + ad_size; - - return ad; -} - -int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix) -{ - struct fb_videomode *fsl_diu_mode_db; - struct diu_ad *ad; - struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR; - u8 *gamma_table_base; - unsigned int i, j; - struct diu_addr gamma; - struct diu_addr cursor; - -/* Convert the X,Y resolution pair into a single number */ -#define RESOLUTION(x, y) (((u32)(x) << 16) | (y)) - - switch (RESOLUTION(xres, yres)) { - case RESOLUTION(800, 480): - fsl_diu_mode_db = &fsl_diu_mode_800_480; - break; - case RESOLUTION(800, 600): - fsl_diu_mode_db = &fsl_diu_mode_800_600; - break; - case RESOLUTION(1024, 768): - fsl_diu_mode_db = &fsl_diu_mode_1024_768; - break; - case RESOLUTION(1280, 1024): - fsl_diu_mode_db = &fsl_diu_mode_1280_1024; - break; - case RESOLUTION(1280, 720): - fsl_diu_mode_db = &fsl_diu_mode_1280_720; - break; - case RESOLUTION(1920, 1080): - fsl_diu_mode_db = &fsl_diu_mode_1920_1080; - break; - default: - printf("DIU: Unsupported resolution %ux%u\n", xres, yres); - return -1; - } - - /* read mode info */ - info.var.xres = fsl_diu_mode_db->xres; - info.var.yres = fsl_diu_mode_db->yres; - info.var.bits_per_pixel = 32; - info.var.pixclock = fsl_diu_mode_db->pixclock; - info.var.left_margin = fsl_diu_mode_db->left_margin; - info.var.right_margin = fsl_diu_mode_db->right_margin; - info.var.upper_margin = fsl_diu_mode_db->upper_margin; - info.var.lower_margin = fsl_diu_mode_db->lower_margin; - info.var.hsync_len = fsl_diu_mode_db->hsync_len; - info.var.vsync_len = fsl_diu_mode_db->vsync_len; - info.var.sync = fsl_diu_mode_db->sync; - info.var.vmode = fsl_diu_mode_db->vmode; - info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8; - - /* Memory allocation for framebuffer */ - info.screen_size = - info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); - ad = allocate_fb(info.var.xres, info.var.yres, - info.var.bits_per_pixel / 8, &info.screen_base); - if (!ad) { - printf("DIU: Out of memory\n"); - return -1; - } - - ad->pix_fmt = pixel_format; - - /* Disable chroma keying function */ - ad->ckmax_r = 0; - ad->ckmax_g = 0; - ad->ckmax_b = 0; - - ad->ckmin_r = 255; - ad->ckmin_g = 255; - ad->ckmin_b = 255; - - /* Initialize the gamma table */ - if (allocate_buf(&gamma, 256 * 3, 32) < 0) { - printf("DIU: Out of memory\n"); - return -1; - } - gamma_table_base = gamma.vaddr; - for (i = 0; i <= 2; i++) - for (j = 0; j < 256; j++) - *gamma_table_base++ = j; - - if (gamma_fix == 1) { /* fix the gamma */ - gamma_table_base = gamma.vaddr; - for (i = 0; i < 256 * 3; i++) { - gamma_table_base[i] = (gamma_table_base[i] << 2) - | ((gamma_table_base[i] >> 6) & 0x03); - } - } - - /* Initialize the cursor */ - if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) { - printf("DIU: Can't alloc cursor data\n"); - return -1; - } - - /* Program DIU registers */ - out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */ - - out_be32(&hw->gamma, gamma.paddr); - out_be32(&hw->cursor, cursor.paddr); - out_be32(&hw->bgnd, 0x007F7F7F); - out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres); - out_be32(&hw->hsyn_para, info.var.left_margin << 22 | - info.var.hsync_len << 11 | - info.var.right_margin); - - out_be32(&hw->vsyn_para, info.var.upper_margin << 22 | - info.var.vsync_len << 11 | - info.var.lower_margin); - - /* Pixel Clock configuration */ - diu_set_pixel_clock(info.var.pixclock); - - /* Set the frame buffers */ - out_be32(&hw->desc[0], virt_to_phys(ad)); - out_be32(&hw->desc[1], 0); - out_be32(&hw->desc[2], 0); - - /* Enable the DIU, set display to all three planes */ - out_be32(&hw->diu_mode, 1); - - return 0; -} - -void *video_hw_init(void) -{ - static GraphicDevice ctfb; - const char *options; - unsigned int depth = 0, freq = 0; - - if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq, - &options)) - return NULL; - - /* Find the monitor port, which is a required option */ - if (!options) - return NULL; - if (strncmp(options, "monitor=", 8) != 0) - return NULL; - - if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0) - return NULL; - - /* fill in Graphic device struct */ - sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz", - ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq); - - ctfb.frameAdrs = (unsigned int)info.screen_base; - ctfb.plnSizeX = ctfb.winSizeX; - ctfb.plnSizeY = ctfb.winSizeY; - - ctfb.gdfBytesPP = 4; - ctfb.gdfIndex = GDF_32BIT_X888RGB; - - ctfb.isaBase = 0; - ctfb.pciBase = 0; - ctfb.memSize = info.screen_size; - - /* Cursor Start Address */ - ctfb.dprBase = 0; - ctfb.vprBase = 0; - ctfb.cprBase = 0; - - return &ctfb; -} diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c index 98228f2..49bbeef 100644 --- a/drivers/video/imx/mxc_ipuv3_fb.c +++ b/drivers/video/imx/mxc_ipuv3_fb.c @@ -22,7 +22,6 @@ #include <asm/io.h> #include <asm/mach-imx/video.h> #include <malloc.h> -#include <video_fb.h> #include "../videomodes.h" #include "ipu.h" #include "mxcfb.h" diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 5f85c0c..1043394 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -15,7 +15,6 @@ #include <linux/errno.h> #include <malloc.h> #include <video.h> -#include <video_fb.h> #include <asm/arch/clock.h> #include <asm/arch/imx-regs.h> @@ -253,94 +252,6 @@ static int mxs_remove_common(u32 fb) return 0; } -#ifndef CONFIG_DM_VIDEO - -static GraphicDevice panel; - -void lcdif_power_down(void) -{ - mxs_remove_common(panel.frameAdrs); -} - -void *video_hw_init(void) -{ - int bpp = -1; - int ret = 0; - char *penv; - void *fb = NULL; - struct ctfb_res_modes mode; - struct display_timing timings; - - puts("Video: "); - - /* Suck display configuration from "videomode" variable */ - penv = env_get("videomode"); - if (!penv) { - puts("MXSFB: 'videomode' variable not set!\n"); - return NULL; - } - - bpp = video_get_params(&mode, penv); - - /* fill in Graphic device struct */ - sprintf(panel.modeIdent, "%dx%dx%d", mode.xres, mode.yres, bpp); - - panel.winSizeX = mode.xres; - panel.winSizeY = mode.yres; - panel.plnSizeX = mode.xres; - panel.plnSizeY = mode.yres; - - switch (bpp) { - case 24: - case 18: - panel.gdfBytesPP = 4; - panel.gdfIndex = GDF_32BIT_X888RGB; - break; - case 16: - panel.gdfBytesPP = 2; - panel.gdfIndex = GDF_16BIT_565RGB; - break; - case 8: - panel.gdfBytesPP = 1; - panel.gdfIndex = GDF__8BIT_INDEX; - break; - default: - printf("MXSFB: Invalid BPP specified! (bpp = %i)\n", bpp); - return NULL; - } - - panel.memSize = mode.xres * mode.yres * panel.gdfBytesPP; - - /* Allocate framebuffer */ - fb = memalign(ARCH_DMA_MINALIGN, - roundup(panel.memSize, ARCH_DMA_MINALIGN)); - if (!fb) { - printf("MXSFB: Error allocating framebuffer!\n"); - return NULL; - } - - /* Wipe framebuffer */ - memset(fb, 0, panel.memSize); - - panel.frameAdrs = (u32)fb; - - printf("%s\n", panel.modeIdent); - - video_ctfb_mode_to_display_timing(&mode, &timings); - - ret = mxs_probe_common(NULL, &timings, bpp, (u32)fb); - if (ret) - goto dealloc_fb; - - return (void *)&panel; - -dealloc_fb: - free(fb); - - return NULL; -} -#else /* ifndef CONFIG_DM_VIDEO */ - static int mxs_of_get_timings(struct udevice *dev, struct display_timing *timings, u32 *bpp) @@ -490,4 +401,3 @@ U_BOOT_DRIVER(mxs_video) = { .remove = mxs_video_remove, .flags = DM_FLAG_PRE_RELOC | DM_FLAG_OS_PREPARE, }; -#endif /* ifndef CONFIG_DM_VIDEO */ diff --git a/drivers/video/nexell_display.c b/drivers/video/nexell_display.c index c7621ef..090fd6e 100644 --- a/drivers/video/nexell_display.c +++ b/drivers/video/nexell_display.c @@ -16,7 +16,6 @@ #include <linux/compat.h> #include <linux/err.h> #include <video.h> /* For struct video_uc_plat */ -#include <video_fb.h> #include <lcd.h> #include <asm/global_data.h> #include <asm/io.h> @@ -537,7 +536,6 @@ static int nx_display_probe(struct udevice *dev) struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev); struct video_priv *uc_priv = dev_get_uclass_priv(dev); struct nx_display_plat *plat = dev_get_plat(dev); - static GraphicDevice *graphic_device; char addr[64]; debug("%s()\n", __func__); @@ -564,7 +562,6 @@ static int nx_display_probe(struct udevice *dev) } struct nx_display_dev *dp; - unsigned int pp_index = 0; dp = nx_display_setup(); if (!dp) { @@ -575,7 +572,6 @@ static int nx_display_probe(struct udevice *dev) switch (dp->depth) { case 2: - pp_index = GDF_16BIT_565RGB; uc_priv->bpix = VIDEO_BPP16; break; case 3: @@ -583,7 +579,6 @@ static int nx_display_probe(struct udevice *dev) * type video_log2_bpp */ case 4: - pp_index = GDF_32BIT_X888RGB; uc_priv->bpix = VIDEO_BPP32; break; default: @@ -596,19 +591,9 @@ static int nx_display_probe(struct udevice *dev) uc_priv->ysize = dp->fb_plane->height; uc_priv->rot = 0; - graphic_device = &dp->graphic_device; - graphic_device->frameAdrs = dp->fb_addr; - graphic_device->gdfIndex = pp_index; - graphic_device->gdfBytesPP = dp->depth; - graphic_device->winSizeX = dp->fb_plane->width; - graphic_device->winSizeY = dp->fb_plane->height; - graphic_device->plnSizeX = - graphic_device->winSizeX * graphic_device->gdfBytesPP; - /* * set environment variable "fb_addr" (frame buffer address), required - * for splash image. Because drv_video_init() in common/stdio.c is only - * called when CONFIG_VIDEO is set (and not if CONFIG_DM_VIDEO is set). + * for splash image, which is not set if CONFIG_DM_VIDEO is enabled). */ sprintf(addr, "0x%x", dp->fb_addr); debug("%s(): env_set(\"fb_addr\", %s) ...\n", __func__, addr); diff --git a/drivers/video/omap3_dss.c b/drivers/video/omap3_dss.c index 6efba12..432b16b 100644 --- a/drivers/video/omap3_dss.c +++ b/drivers/video/omap3_dss.c @@ -28,7 +28,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/dss.h> -#include <video_fb.h> /* Configure VENC for a given Mode (NTSC / PAL) */ void omap3_dss_venc_config(const struct venc_regs *venc_cfg, @@ -137,31 +136,3 @@ void omap3_dss_enable(void) l |= LCD_ENABLE | GO_LCD | DIG_ENABLE | GO_DIG | GP_OUT0 | GP_OUT1; writel(l, &dispc->control); } - -#ifdef CONFIG_CFB_CONSOLE -int __board_video_init(void) -{ - return -1; -} - -int board_video_init(void) - __attribute__((weak, alias("__board_video_init"))); - -void *video_hw_init(void) -{ - static GraphicDevice dssfb; - GraphicDevice *pGD = &dssfb; - struct dispc_regs *dispc = (struct dispc_regs *) OMAP3_DISPC_BASE; - - if (board_video_init() || !readl(&dispc->gfx_ba0)) - return NULL; - - pGD->winSizeX = (readl(&dispc->size_lcd) & 0x7FF) + 1; - pGD->winSizeY = ((readl(&dispc->size_lcd) >> 16) & 0x7FF) + 1; - pGD->gdfBytesPP = 4; - pGD->gdfIndex = GDF_32BIT_X888RGB; - pGD->frameAdrs = readl(&dispc->gfx_ba0); - - return pGD; -} -#endif diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c index 5a21f7a..2ee6212 100644 --- a/drivers/video/sunxi/sunxi_display.c +++ b/drivers/video/sunxi/sunxi_display.c @@ -30,7 +30,6 @@ #include <i2c.h> #include <malloc.h> #include <video.h> -#include <video_fb.h> #include <dm/uclass-internal.h> #include "../videomodes.h" #include "../anx9804.h" diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index f9c2c40..01e8af5 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -209,7 +209,7 @@ int video_sync(struct udevice *vid, bool force) struct video_priv *priv = dev_get_uclass_priv(vid); static ulong last_sync; - if (force || get_timer(last_sync) > 10) { + if (force || get_timer(last_sync) > 100) { sandbox_sdl_sync(priv->fb); last_sync = get_timer(0); } diff --git a/drivers/video/zynqmp_dpsub.c b/drivers/video/zynqmp_dpsub.c new file mode 100644 index 0000000..4ead663 --- /dev/null +++ b/drivers/video/zynqmp_dpsub.c @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Xilinx Inc. + */ + +#include <common.h> +#include <cpu_func.h> +#include <dm.h> +#include <errno.h> +#include <video.h> +#include <dm/device_compat.h> + +#define WIDTH 640 +#define HEIGHT 480 + +/** + * struct zynqmp_dpsub_priv - Private structure + * @dev: Device uclass for video_ops + */ +struct zynqmp_dpsub_priv { + struct udevice *dev; +}; + +static int zynqmp_dpsub_probe(struct udevice *dev) +{ + struct video_priv *uc_priv = dev_get_uclass_priv(dev); + struct zynqmp_dpsub_priv *priv = dev_get_priv(dev); + + uc_priv->bpix = VIDEO_BPP16; + uc_priv->xsize = WIDTH; + uc_priv->ysize = HEIGHT; + uc_priv->rot = 0; + + priv->dev = dev; + + /* Only placeholder for power domain driver */ + return 0; +} + +static int zynqmp_dpsub_bind(struct udevice *dev) +{ + struct video_uc_plat *plat = dev_get_uclass_plat(dev); + + plat->size = WIDTH * HEIGHT * 16; + + return 0; +} + +static const struct video_ops zynqmp_dpsub_ops = { +}; + +static const struct udevice_id zynqmp_dpsub_ids[] = { + { .compatible = "xlnx,zynqmp-dpsub-1.7" }, + { } +}; + +U_BOOT_DRIVER(zynqmp_dpsub_video) = { + .name = "zynqmp_dpsub_video", + .id = UCLASS_VIDEO, + .of_match = zynqmp_dpsub_ids, + .ops = &zynqmp_dpsub_ops, + .plat_auto = sizeof(struct video_uc_plat), + .bind = zynqmp_dpsub_bind, + .probe = zynqmp_dpsub_probe, + .priv_auto = sizeof(struct zynqmp_dpsub_priv), +}; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index f90f0ca..5b614cf 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -129,7 +129,8 @@ config WDT_AT91 config WDT_BCM6345 bool "BCM6345 watchdog timer support" depends on WDT && (ARCH_BMIPS || ARCH_BCM68360 || \ - ARCH_BCM6858 || ARCH_BCM63158) + ARCH_BCM6858 || ARCH_BCM63158 || \ + ARCH_BCM6753) help Select this to enable watchdog timer for BCM6345 SoCs. The watchdog timer is stopped when initialized. diff --git a/env/Kconfig b/env/Kconfig index b9d0472..2f625b2 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -822,6 +822,31 @@ config TPL_ENV_IS_IN_FLASH endif +config USE_BOOTFILE + bool "Add a 'bootfile' environment variable" + help + The "bootfile" variable is used in some cases to allow for + controlling what file U-Boot will attempt to load and boot. To set + this, enable this option and set the value in the next question. + +config BOOTFILE + string "'bootfile' environment variable value" + depends on USE_BOOTFILE + help + The value to set the "bootfile" variable to. + +config USE_ETHPRIME + bool "Add an 'ethprime' environment variable" + help + The "ethprime" variable is used in some cases to control which + network interface is used first. + +config ETHPRIME + string "'ethprime' environment variable value" + depends on USE_ETHPRIME + help + The value to set the "ethprime" variable to. + config VERSION_VARIABLE bool "Add a 'ver' environment variable with the U-Boot version" help @@ -24,4 +24,6 @@ source "fs/yaffs2/Kconfig" source "fs/squashfs/Kconfig" +source "fs/erofs/Kconfig" + endmenu diff --git a/fs/Makefile b/fs/Makefile index 937cbcf..4bed2ff 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -21,9 +21,11 @@ obj-$(CONFIG_FS_FAT) += fat/ obj-$(CONFIG_FS_JFFS2) += jffs2/ obj-$(CONFIG_CMD_REISER) += reiserfs/ obj-$(CONFIG_SANDBOX) += sandbox/ +obj-$(CONFIG_SEMIHOSTING) += semihostingfs.o obj-$(CONFIG_CMD_UBIFS) += ubifs/ obj-$(CONFIG_YAFFS2) += yaffs2/ obj-$(CONFIG_CMD_ZFS) += zfs/ obj-$(CONFIG_FS_SQUASHFS) += squashfs/ +obj-$(CONFIG_FS_EROFS) += erofs/ endif obj-y += fs_internal.o diff --git a/fs/erofs/Kconfig b/fs/erofs/Kconfig new file mode 100644 index 0000000..ee4e777 --- /dev/null +++ b/fs/erofs/Kconfig @@ -0,0 +1,21 @@ +config FS_EROFS + bool "Enable EROFS filesystem support" + help + This provides support for reading images from EROFS filesystem. + EROFS (Enhanced Read-Only File System) is a lightweight read-only + file system for scenarios which need high-performance read-only + requirements. + + It also provides fixed-sized output compression support, which + improves storage density, keeps relatively higher compression + ratios, which is more useful to achieve high performance for + embedded devices with limited memory. + +config FS_EROFS_ZIP + bool "EROFS Data Compression Support" + depends on FS_EROFS + select LZ4 + default y + help + Enable fixed-sized output compression for EROFS. + If you don't want to enable compression feature, say N. diff --git a/fs/erofs/Makefile b/fs/erofs/Makefile new file mode 100644 index 0000000..58af6a6 --- /dev/null +++ b/fs/erofs/Makefile @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-$(CONFIG_$(SPL_)FS_EROFS) = fs.o \ + super.o \ + namei.o \ + data.o \ + decompress.o \ + zmap.o diff --git a/fs/erofs/data.c b/fs/erofs/data.c new file mode 100644 index 0000000..7618960 --- /dev/null +++ b/fs/erofs/data.c @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include "internal.h" +#include "decompress.h" + +static int erofs_map_blocks_flatmode(struct erofs_inode *inode, + struct erofs_map_blocks *map, + int flags) +{ + int err = 0; + erofs_blk_t nblocks, lastblk; + u64 offset = map->m_la; + struct erofs_inode *vi = inode; + bool tailendpacking = (vi->datalayout == EROFS_INODE_FLAT_INLINE); + + nblocks = DIV_ROUND_UP(inode->i_size, EROFS_BLKSIZ); + lastblk = nblocks - tailendpacking; + + /* there is no hole in flatmode */ + map->m_flags = EROFS_MAP_MAPPED; + + if (offset < blknr_to_addr(lastblk)) { + map->m_pa = blknr_to_addr(vi->u.i_blkaddr) + map->m_la; + map->m_plen = blknr_to_addr(lastblk) - offset; + } else if (tailendpacking) { + /* 2 - inode inline B: inode, [xattrs], inline last blk... */ + map->m_pa = iloc(vi->nid) + vi->inode_isize + + vi->xattr_isize + erofs_blkoff(map->m_la); + map->m_plen = inode->i_size - offset; + + /* inline data should be located in one meta block */ + if (erofs_blkoff(map->m_pa) + map->m_plen > PAGE_SIZE) { + erofs_err("inline data cross block boundary @ nid %" PRIu64, + vi->nid); + DBG_BUGON(1); + err = -EFSCORRUPTED; + goto err_out; + } + + map->m_flags |= EROFS_MAP_META; + } else { + erofs_err("internal error @ nid: %" PRIu64 " (size %llu), m_la 0x%" PRIx64, + vi->nid, (unsigned long long)inode->i_size, map->m_la); + DBG_BUGON(1); + err = -EIO; + goto err_out; + } + + map->m_llen = map->m_plen; +err_out: + return err; +} + +int erofs_map_blocks(struct erofs_inode *inode, + struct erofs_map_blocks *map, int flags) +{ + struct erofs_inode *vi = inode; + struct erofs_inode_chunk_index *idx; + u8 buf[EROFS_BLKSIZ]; + u64 chunknr; + unsigned int unit; + erofs_off_t pos; + int err = 0; + + map->m_deviceid = 0; + if (map->m_la >= inode->i_size) { + /* leave out-of-bound access unmapped */ + map->m_flags = 0; + map->m_plen = 0; + goto out; + } + + if (vi->datalayout != EROFS_INODE_CHUNK_BASED) + return erofs_map_blocks_flatmode(inode, map, flags); + + if (vi->u.chunkformat & EROFS_CHUNK_FORMAT_INDEXES) + unit = sizeof(*idx); /* chunk index */ + else + unit = EROFS_BLOCK_MAP_ENTRY_SIZE; /* block map */ + + chunknr = map->m_la >> vi->u.chunkbits; + pos = roundup(iloc(vi->nid) + vi->inode_isize + + vi->xattr_isize, unit) + unit * chunknr; + + err = erofs_blk_read(buf, erofs_blknr(pos), 1); + if (err < 0) + return -EIO; + + map->m_la = chunknr << vi->u.chunkbits; + map->m_plen = min_t(erofs_off_t, 1UL << vi->u.chunkbits, + roundup(inode->i_size - map->m_la, EROFS_BLKSIZ)); + + /* handle block map */ + if (!(vi->u.chunkformat & EROFS_CHUNK_FORMAT_INDEXES)) { + __le32 *blkaddr = (void *)buf + erofs_blkoff(pos); + + if (le32_to_cpu(*blkaddr) == EROFS_NULL_ADDR) { + map->m_flags = 0; + } else { + map->m_pa = blknr_to_addr(le32_to_cpu(*blkaddr)); + map->m_flags = EROFS_MAP_MAPPED; + } + goto out; + } + /* parse chunk indexes */ + idx = (void *)buf + erofs_blkoff(pos); + switch (le32_to_cpu(idx->blkaddr)) { + case EROFS_NULL_ADDR: + map->m_flags = 0; + break; + default: + map->m_deviceid = le16_to_cpu(idx->device_id) & + sbi.device_id_mask; + map->m_pa = blknr_to_addr(le32_to_cpu(idx->blkaddr)); + map->m_flags = EROFS_MAP_MAPPED; + break; + } +out: + map->m_llen = map->m_plen; + return err; +} + +int erofs_map_dev(struct erofs_sb_info *sbi, struct erofs_map_dev *map) +{ + struct erofs_device_info *dif; + int id; + + if (map->m_deviceid) { + if (sbi->extra_devices < map->m_deviceid) + return -ENODEV; + } else if (sbi->extra_devices) { + for (id = 0; id < sbi->extra_devices; ++id) { + erofs_off_t startoff, length; + + dif = sbi->devs + id; + if (!dif->mapped_blkaddr) + continue; + startoff = blknr_to_addr(dif->mapped_blkaddr); + length = blknr_to_addr(dif->blocks); + + if (map->m_pa >= startoff && + map->m_pa < startoff + length) { + map->m_pa -= startoff; + break; + } + } + } + return 0; +} + +static int erofs_read_raw_data(struct erofs_inode *inode, char *buffer, + erofs_off_t size, erofs_off_t offset) +{ + struct erofs_map_blocks map = { + .index = UINT_MAX, + }; + struct erofs_map_dev mdev; + int ret; + erofs_off_t ptr = offset; + + while (ptr < offset + size) { + char *const estart = buffer + ptr - offset; + erofs_off_t eend; + + map.m_la = ptr; + ret = erofs_map_blocks(inode, &map, 0); + if (ret) + return ret; + + DBG_BUGON(map.m_plen != map.m_llen); + + mdev = (struct erofs_map_dev) { + .m_deviceid = map.m_deviceid, + .m_pa = map.m_pa, + }; + ret = erofs_map_dev(&sbi, &mdev); + if (ret) + return ret; + + /* trim extent */ + eend = min(offset + size, map.m_la + map.m_llen); + DBG_BUGON(ptr < map.m_la); + + if (!(map.m_flags & EROFS_MAP_MAPPED)) { + if (!map.m_llen) { + /* reached EOF */ + memset(estart, 0, offset + size - ptr); + ptr = offset + size; + continue; + } + memset(estart, 0, eend - ptr); + ptr = eend; + continue; + } + + if (ptr > map.m_la) { + mdev.m_pa += ptr - map.m_la; + map.m_la = ptr; + } + + ret = erofs_dev_read(mdev.m_deviceid, estart, mdev.m_pa, + eend - map.m_la); + if (ret < 0) + return -EIO; + ptr = eend; + } + return 0; +} + +static int z_erofs_read_data(struct erofs_inode *inode, char *buffer, + erofs_off_t size, erofs_off_t offset) +{ + erofs_off_t end, length, skip; + struct erofs_map_blocks map = { + .index = UINT_MAX, + }; + struct erofs_map_dev mdev; + bool partial; + unsigned int bufsize = 0; + char *raw = NULL; + int ret = 0; + + end = offset + size; + while (end > offset) { + map.m_la = end - 1; + + ret = z_erofs_map_blocks_iter(inode, &map, 0); + if (ret) + break; + + /* no device id here, thus it will always succeed */ + mdev = (struct erofs_map_dev) { + .m_pa = map.m_pa, + }; + ret = erofs_map_dev(&sbi, &mdev); + if (ret) { + DBG_BUGON(1); + break; + } + + /* + * trim to the needed size if the returned extent is quite + * larger than requested, and set up partial flag as well. + */ + if (end < map.m_la + map.m_llen) { + length = end - map.m_la; + partial = true; + } else { + DBG_BUGON(end != map.m_la + map.m_llen); + length = map.m_llen; + partial = !(map.m_flags & EROFS_MAP_FULL_MAPPED); + } + + if (map.m_la < offset) { + skip = offset - map.m_la; + end = offset; + } else { + skip = 0; + end = map.m_la; + } + + if (!(map.m_flags & EROFS_MAP_MAPPED)) { + memset(buffer + end - offset, 0, length); + end = map.m_la; + continue; + } + + if (map.m_plen > bufsize) { + bufsize = map.m_plen; + raw = realloc(raw, bufsize); + if (!raw) { + ret = -ENOMEM; + break; + } + } + ret = erofs_dev_read(mdev.m_deviceid, raw, mdev.m_pa, map.m_plen); + if (ret < 0) + break; + + ret = z_erofs_decompress(&(struct z_erofs_decompress_req) { + .in = raw, + .out = buffer + end - offset, + .decodedskip = skip, + .inputsize = map.m_plen, + .decodedlength = length, + .alg = map.m_algorithmformat, + .partial_decoding = partial + }); + if (ret < 0) + break; + } + if (raw) + free(raw); + return ret < 0 ? ret : 0; +} + +int erofs_pread(struct erofs_inode *inode, char *buf, + erofs_off_t count, erofs_off_t offset) +{ + switch (inode->datalayout) { + case EROFS_INODE_FLAT_PLAIN: + case EROFS_INODE_FLAT_INLINE: + case EROFS_INODE_CHUNK_BASED: + return erofs_read_raw_data(inode, buf, count, offset); + case EROFS_INODE_FLAT_COMPRESSION_LEGACY: + case EROFS_INODE_FLAT_COMPRESSION: + return z_erofs_read_data(inode, buf, count, offset); + default: + break; + } + return -EINVAL; +} diff --git a/fs/erofs/decompress.c b/fs/erofs/decompress.c new file mode 100644 index 0000000..2be3b84 --- /dev/null +++ b/fs/erofs/decompress.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include "decompress.h" + +#if IS_ENABLED(CONFIG_LZ4) +#include <u-boot/lz4.h> +static int z_erofs_decompress_lz4(struct z_erofs_decompress_req *rq) +{ + int ret = 0; + char *dest = rq->out; + char *src = rq->in; + char *buff = NULL; + bool support_0padding = false; + unsigned int inputmargin = 0; + + if (erofs_sb_has_lz4_0padding()) { + support_0padding = true; + + while (!src[inputmargin & ~PAGE_MASK]) + if (!(++inputmargin & ~PAGE_MASK)) + break; + + if (inputmargin >= rq->inputsize) + return -EIO; + } + + if (rq->decodedskip) { + buff = malloc(rq->decodedlength); + if (!buff) + return -ENOMEM; + dest = buff; + } + + if (rq->partial_decoding || !support_0padding) + ret = LZ4_decompress_safe_partial(src + inputmargin, dest, + rq->inputsize - inputmargin, + rq->decodedlength, rq->decodedlength); + else + ret = LZ4_decompress_safe(src + inputmargin, dest, + rq->inputsize - inputmargin, + rq->decodedlength); + + if (ret != (int)rq->decodedlength) { + ret = -EIO; + goto out; + } + + if (rq->decodedskip) + memcpy(rq->out, dest + rq->decodedskip, + rq->decodedlength - rq->decodedskip); + +out: + if (buff) + free(buff); + + return ret; +} +#endif + +int z_erofs_decompress(struct z_erofs_decompress_req *rq) +{ + if (rq->alg == Z_EROFS_COMPRESSION_SHIFTED) { + if (rq->inputsize != EROFS_BLKSIZ) + return -EFSCORRUPTED; + + DBG_BUGON(rq->decodedlength > EROFS_BLKSIZ); + DBG_BUGON(rq->decodedlength < rq->decodedskip); + + memcpy(rq->out, rq->in + rq->decodedskip, + rq->decodedlength - rq->decodedskip); + return 0; + } + +#if IS_ENABLED(CONFIG_LZ4) + if (rq->alg == Z_EROFS_COMPRESSION_LZ4) + return z_erofs_decompress_lz4(rq); +#endif + return -EOPNOTSUPP; +} diff --git a/fs/erofs/decompress.h b/fs/erofs/decompress.h new file mode 100644 index 0000000..81d5fb8 --- /dev/null +++ b/fs/erofs/decompress.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __EROFS_DECOMPRESS_H +#define __EROFS_DECOMPRESS_H + +#include "internal.h" + +struct z_erofs_decompress_req { + char *in, *out; + + /* + * initial decompressed bytes that need to be skipped + * when finally copying to output buffer + */ + unsigned int decodedskip; + unsigned int inputsize, decodedlength; + + /* indicate the algorithm will be used for decompression */ + unsigned int alg; + bool partial_decoding; +}; + +int z_erofs_decompress(struct z_erofs_decompress_req *rq); + +#endif diff --git a/fs/erofs/erofs_fs.h b/fs/erofs/erofs_fs.h new file mode 100644 index 0000000..6b62c7a --- /dev/null +++ b/fs/erofs/erofs_fs.h @@ -0,0 +1,436 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR Apache-2.0 */ +/* + * EROFS (Enhanced ROM File System) on-disk format definition + * + * Copyright (C) 2017-2018 HUAWEI, Inc. + * http://www.huawei.com/ + * Copyright (C) 2021, Alibaba Cloud + */ +#ifndef __EROFS_FS_H +#define __EROFS_FS_H + +#include <asm/unaligned.h> +#include <fs.h> +#include <part.h> +#include <stdint.h> +#include <compiler.h> + +#define EROFS_SUPER_MAGIC_V1 0xE0F5E1E2 +#define EROFS_SUPER_OFFSET 1024 + +#define EROFS_FEATURE_COMPAT_SB_CHKSUM 0x00000001 + +/* + * Any bits that aren't in EROFS_ALL_FEATURE_INCOMPAT should + * be incompatible with this kernel version. + */ +#define EROFS_FEATURE_INCOMPAT_LZ4_0PADDING 0x00000001 +#define EROFS_FEATURE_INCOMPAT_COMPR_CFGS 0x00000002 +#define EROFS_FEATURE_INCOMPAT_BIG_PCLUSTER 0x00000002 +#define EROFS_FEATURE_INCOMPAT_CHUNKED_FILE 0x00000004 +#define EROFS_FEATURE_INCOMPAT_DEVICE_TABLE 0x00000008 +#define EROFS_ALL_FEATURE_INCOMPAT \ + (EROFS_FEATURE_INCOMPAT_LZ4_0PADDING | \ + EROFS_FEATURE_INCOMPAT_COMPR_CFGS | \ + EROFS_FEATURE_INCOMPAT_BIG_PCLUSTER | \ + EROFS_FEATURE_INCOMPAT_CHUNKED_FILE | \ + EROFS_FEATURE_INCOMPAT_DEVICE_TABLE) + +#define EROFS_SB_EXTSLOT_SIZE 16 + +struct erofs_deviceslot { + union { + u8 uuid[16]; /* used for device manager later */ + u8 userdata[64]; /* digest(sha256), etc. */ + } u; + __le32 blocks; /* total fs blocks of this device */ + __le32 mapped_blkaddr; /* map starting at mapped_blkaddr */ + u8 reserved[56]; +}; + +#define EROFS_DEVT_SLOT_SIZE sizeof(struct erofs_deviceslot) + +/* erofs on-disk super block (currently 128 bytes) */ +struct erofs_super_block { + __le32 magic; /* file system magic number */ + __le32 checksum; /* crc32c(super_block) */ + __le32 feature_compat; + __u8 blkszbits; /* support block_size == PAGE_SIZE only */ + __u8 sb_extslots; /* superblock size = 128 + sb_extslots * 16 */ + + __le16 root_nid; /* nid of root directory */ + __le64 inos; /* total valid ino # (== f_files - f_favail) */ + + __le64 build_time; /* inode v1 time derivation */ + __le32 build_time_nsec; /* inode v1 time derivation in nano scale */ + __le32 blocks; /* used for statfs */ + __le32 meta_blkaddr; /* start block address of metadata area */ + __le32 xattr_blkaddr; /* start block address of shared xattr area */ + __u8 uuid[16]; /* 128-bit uuid for volume */ + __u8 volume_name[16]; /* volume name */ + __le32 feature_incompat; + union { + /* bitmap for available compression algorithms */ + __le16 available_compr_algs; + /* customized sliding window size instead of 64k by default */ + __le16 lz4_max_distance; + } __packed u1; + __le16 extra_devices; /* # of devices besides the primary device */ + __le16 devt_slotoff; /* startoff = devt_slotoff * devt_slotsize */ + __u8 reserved2[38]; +}; + +/* + * erofs inode datalayout (i_format in on-disk inode): + * 0 - inode plain without inline data A: + * inode, [xattrs], ... | ... | no-holed data + * 1 - inode VLE compression B (legacy): + * inode, [xattrs], extents ... | ... + * 2 - inode plain with inline data C: + * inode, [xattrs], last_inline_data, ... | ... | no-holed data + * 3 - inode compression D: + * inode, [xattrs], map_header, extents ... | ... + * 4 - inode chunk-based E: + * inode, [xattrs], chunk indexes ... | ... + * 5~7 - reserved + */ +enum { + EROFS_INODE_FLAT_PLAIN = 0, + EROFS_INODE_FLAT_COMPRESSION_LEGACY = 1, + EROFS_INODE_FLAT_INLINE = 2, + EROFS_INODE_FLAT_COMPRESSION = 3, + EROFS_INODE_CHUNK_BASED = 4, + EROFS_INODE_DATALAYOUT_MAX +}; + +static inline bool erofs_inode_is_data_compressed(unsigned int datamode) +{ + return datamode == EROFS_INODE_FLAT_COMPRESSION || + datamode == EROFS_INODE_FLAT_COMPRESSION_LEGACY; +} + +/* bit definitions of inode i_advise */ +#define EROFS_I_VERSION_BITS 1 +#define EROFS_I_DATALAYOUT_BITS 3 + +#define EROFS_I_VERSION_BIT 0 +#define EROFS_I_DATALAYOUT_BIT 1 + +#define EROFS_I_ALL \ + ((1 << (EROFS_I_DATALAYOUT_BIT + EROFS_I_DATALAYOUT_BITS)) - 1) + +/* indicate chunk blkbits, thus 'chunksize = blocksize << chunk blkbits' */ +#define EROFS_CHUNK_FORMAT_BLKBITS_MASK 0x001F +/* with chunk indexes or just a 4-byte blkaddr array */ +#define EROFS_CHUNK_FORMAT_INDEXES 0x0020 + +#define EROFS_CHUNK_FORMAT_ALL \ + (EROFS_CHUNK_FORMAT_BLKBITS_MASK | EROFS_CHUNK_FORMAT_INDEXES) + +struct erofs_inode_chunk_info { + __le16 format; /* chunk blkbits, etc. */ + __le16 reserved; +}; + +/* 32-byte reduced form of an ondisk inode */ +struct erofs_inode_compact { + __le16 i_format; /* inode format hints */ + +/* 1 header + n-1 * 4 bytes inline xattr to keep continuity */ + __le16 i_xattr_icount; + __le16 i_mode; + __le16 i_nlink; + __le32 i_size; + __le32 i_reserved; + union { + /* file total compressed blocks for data mapping 1 */ + __le32 compressed_blocks; + __le32 raw_blkaddr; + + /* for device files, used to indicate old/new device # */ + __le32 rdev; + + /* for chunk-based files, it contains the summary info */ + struct erofs_inode_chunk_info c; + } i_u; + __le32 i_ino; /* only used for 32-bit stat compatibility */ + __le16 i_uid; + __le16 i_gid; + __le32 i_reserved2; +}; + +/* 32 bytes on-disk inode */ +#define EROFS_INODE_LAYOUT_COMPACT 0 +/* 64 bytes on-disk inode */ +#define EROFS_INODE_LAYOUT_EXTENDED 1 + +/* 64-byte complete form of an ondisk inode */ +struct erofs_inode_extended { + __le16 i_format; /* inode format hints */ + +/* 1 header + n-1 * 4 bytes inline xattr to keep continuity */ + __le16 i_xattr_icount; + __le16 i_mode; + __le16 i_reserved; + __le64 i_size; + union { + /* file total compressed blocks for data mapping 1 */ + __le32 compressed_blocks; + __le32 raw_blkaddr; + + /* for device files, used to indicate old/new device # */ + __le32 rdev; + + /* for chunk-based files, it contains the summary info */ + struct erofs_inode_chunk_info c; + } i_u; + + /* only used for 32-bit stat compatibility */ + __le32 i_ino; + + __le32 i_uid; + __le32 i_gid; + __le64 i_ctime; + __le32 i_ctime_nsec; + __le32 i_nlink; + __u8 i_reserved2[16]; +}; + +#define EROFS_MAX_SHARED_XATTRS (128) +/* h_shared_count between 129 ... 255 are special # */ +#define EROFS_SHARED_XATTR_EXTENT (255) + +/* + * inline xattrs (n == i_xattr_icount): + * erofs_xattr_ibody_header(1) + (n - 1) * 4 bytes + * 12 bytes / \ + * / \ + * /-----------------------\ + * | erofs_xattr_entries+ | + * +-----------------------+ + * inline xattrs must starts in erofs_xattr_ibody_header, + * for read-only fs, no need to introduce h_refcount + */ +struct erofs_xattr_ibody_header { + __le32 h_reserved; + __u8 h_shared_count; + __u8 h_reserved2[7]; + __le32 h_shared_xattrs[0]; /* shared xattr id array */ +}; + +/* Name indexes */ +#define EROFS_XATTR_INDEX_USER 1 +#define EROFS_XATTR_INDEX_POSIX_ACL_ACCESS 2 +#define EROFS_XATTR_INDEX_POSIX_ACL_DEFAULT 3 +#define EROFS_XATTR_INDEX_TRUSTED 4 +#define EROFS_XATTR_INDEX_LUSTRE 5 +#define EROFS_XATTR_INDEX_SECURITY 6 + +/* xattr entry (for both inline & shared xattrs) */ +struct erofs_xattr_entry { + __u8 e_name_len; /* length of name */ + __u8 e_name_index; /* attribute name index */ + __le16 e_value_size; /* size of attribute value */ + /* followed by e_name and e_value */ + char e_name[0]; /* attribute name */ +}; + +static inline unsigned int erofs_xattr_ibody_size(__le16 i_xattr_icount) +{ + if (!i_xattr_icount) + return 0; + + return sizeof(struct erofs_xattr_ibody_header) + + sizeof(__u32) * (le16_to_cpu(i_xattr_icount) - 1); +} + +#define EROFS_XATTR_ALIGN(size) round_up(size, sizeof(struct erofs_xattr_entry)) + +static inline unsigned int erofs_xattr_entry_size(struct erofs_xattr_entry *e) +{ + return EROFS_XATTR_ALIGN(sizeof(struct erofs_xattr_entry) + + e->e_name_len + le16_to_cpu(e->e_value_size)); +} + +/* represent a zeroed chunk (hole) */ +#define EROFS_NULL_ADDR -1 + +/* 4-byte block address array */ +#define EROFS_BLOCK_MAP_ENTRY_SIZE sizeof(__le32) + +/* 8-byte inode chunk indexes */ +struct erofs_inode_chunk_index { + __le16 advise; /* always 0, don't care for now */ + __le16 device_id; /* back-end storage id (with bits masked) */ + __le32 blkaddr; /* start block address of this inode chunk */ +}; + +/* maximum supported size of a physical compression cluster */ +#define Z_EROFS_PCLUSTER_MAX_SIZE (1024 * 1024) + +/* available compression algorithm types (for h_algorithmtype) */ +enum { + Z_EROFS_COMPRESSION_LZ4 = 0, + Z_EROFS_COMPRESSION_LZMA = 1, + Z_EROFS_COMPRESSION_MAX +}; + +#define Z_EROFS_ALL_COMPR_ALGS (1 << (Z_EROFS_COMPRESSION_MAX - 1)) + +/* 14 bytes (+ length field = 16 bytes) */ +struct z_erofs_lz4_cfgs { + __le16 max_distance; + __le16 max_pclusterblks; + u8 reserved[10]; +} __packed; + +/* 14 bytes (+ length field = 16 bytes) */ +struct z_erofs_lzma_cfgs { + __le32 dict_size; + __le16 format; + u8 reserved[8]; +} __packed; +#define Z_EROFS_LZMA_MAX_DICT_SIZE (8 * Z_EROFS_PCLUSTER_MAX_SIZE) + +/* + * bit 0 : COMPACTED_2B indexes (0 - off; 1 - on) + * e.g. for 4k logical cluster size, 4B if compacted 2B is off; + * (4B) + 2B + (4B) if compacted 2B is on. + * bit 1 : HEAD1 big pcluster (0 - off; 1 - on) + * bit 2 : HEAD2 big pcluster (0 - off; 1 - on) + */ +#define Z_EROFS_ADVISE_COMPACTED_2B 0x0001 +#define Z_EROFS_ADVISE_BIG_PCLUSTER_1 0x0002 +#define Z_EROFS_ADVISE_BIG_PCLUSTER_2 0x0004 + +struct z_erofs_map_header { + __le32 h_reserved1; + __le16 h_advise; + /* + * bit 0-3 : algorithm type of head 1 (logical cluster type 01); + * bit 4-7 : algorithm type of head 2 (logical cluster type 11). + */ + __u8 h_algorithmtype; + /* + * bit 0-2 : logical cluster bits - 12, e.g. 0 for 4096; + * bit 3-7 : reserved. + */ + __u8 h_clusterbits; +}; + +#define Z_EROFS_VLE_LEGACY_HEADER_PADDING 8 + +/* + * Fixed-sized output compression ondisk Logical Extent cluster type: + * 0 - literal (uncompressed) cluster + * 1 - compressed cluster (for the head logical cluster) + * 2 - compressed cluster (for the other logical clusters) + * + * In detail, + * 0 - literal (uncompressed) cluster, + * di_advise = 0 + * di_clusterofs = the literal data offset of the cluster + * di_blkaddr = the blkaddr of the literal cluster + * + * 1 - compressed cluster (for the head logical cluster) + * di_advise = 1 + * di_clusterofs = the decompressed data offset of the cluster + * di_blkaddr = the blkaddr of the compressed cluster + * + * 2 - compressed cluster (for the other logical clusters) + * di_advise = 2 + * di_clusterofs = + * the decompressed data offset in its own head cluster + * di_u.delta[0] = distance to its corresponding head cluster + * di_u.delta[1] = distance to its corresponding tail cluster + * (di_advise could be 0, 1 or 2) + */ +enum { + Z_EROFS_VLE_CLUSTER_TYPE_PLAIN = 0, + Z_EROFS_VLE_CLUSTER_TYPE_HEAD = 1, + Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD = 2, + Z_EROFS_VLE_CLUSTER_TYPE_RESERVED = 3, + Z_EROFS_VLE_CLUSTER_TYPE_MAX +}; + +#define Z_EROFS_VLE_DI_CLUSTER_TYPE_BITS 2 +#define Z_EROFS_VLE_DI_CLUSTER_TYPE_BIT 0 + +/* + * D0_CBLKCNT will be marked _only_ at the 1st non-head lcluster to store the + * compressed block count of a compressed extent (in logical clusters, aka. + * block count of a pcluster). + */ +#define Z_EROFS_VLE_DI_D0_CBLKCNT (1 << 11) + +struct z_erofs_vle_decompressed_index { + __le16 di_advise; + /* where to decompress in the head cluster */ + __le16 di_clusterofs; + + union { + /* for the head cluster */ + __le32 blkaddr; + /* + * for the rest clusters + * eg. for 4k page-sized cluster, maximum 4K*64k = 256M) + * [0] - pointing to the head cluster + * [1] - pointing to the tail cluster + */ + __le16 delta[2]; + } di_u; +}; + +#define Z_EROFS_VLE_LEGACY_INDEX_ALIGN(size) \ + (round_up(size, sizeof(struct z_erofs_vle_decompressed_index)) + \ + sizeof(struct z_erofs_map_header) + Z_EROFS_VLE_LEGACY_HEADER_PADDING) + +#define Z_EROFS_VLE_EXTENT_ALIGN(size) round_up(size, \ + sizeof(struct z_erofs_vle_decompressed_index)) + +/* dirent sorts in alphabet order, thus we can do binary search */ +struct erofs_dirent { + __le64 nid; /* node number */ + __le16 nameoff; /* start offset of file name */ + __u8 file_type; /* file type */ + __u8 reserved; /* reserved */ +} __packed; + +/* file types used in inode_info->flags */ +enum { + EROFS_FT_UNKNOWN, + EROFS_FT_REG_FILE, + EROFS_FT_DIR, + EROFS_FT_CHRDEV, + EROFS_FT_BLKDEV, + EROFS_FT_FIFO, + EROFS_FT_SOCK, + EROFS_FT_SYMLINK, + EROFS_FT_MAX +}; + +#define EROFS_NAME_LEN 255 + +/* check the EROFS on-disk layout strictly at compile time */ +static inline void erofs_check_ondisk_layout_definitions(void) +{ + BUILD_BUG_ON(sizeof(struct erofs_super_block) != 128); + BUILD_BUG_ON(sizeof(struct erofs_inode_compact) != 32); + BUILD_BUG_ON(sizeof(struct erofs_inode_extended) != 64); + BUILD_BUG_ON(sizeof(struct erofs_xattr_ibody_header) != 12); + BUILD_BUG_ON(sizeof(struct erofs_xattr_entry) != 4); + BUILD_BUG_ON(sizeof(struct erofs_inode_chunk_info) != 4); + BUILD_BUG_ON(sizeof(struct erofs_inode_chunk_index) != 8); + BUILD_BUG_ON(sizeof(struct z_erofs_map_header) != 8); + BUILD_BUG_ON(sizeof(struct z_erofs_vle_decompressed_index) != 8); + BUILD_BUG_ON(sizeof(struct erofs_dirent) != 12); + /* keep in sync between 2 index structures for better extendibility */ + BUILD_BUG_ON(sizeof(struct erofs_inode_chunk_index) != + sizeof(struct z_erofs_vle_decompressed_index)); + BUILD_BUG_ON(sizeof(struct erofs_deviceslot) != 128); + + BUILD_BUG_ON(BIT(Z_EROFS_VLE_DI_CLUSTER_TYPE_BITS) < + Z_EROFS_VLE_CLUSTER_TYPE_MAX - 1); +} + +#endif diff --git a/fs/erofs/fs.c b/fs/erofs/fs.c new file mode 100644 index 0000000..8926975 --- /dev/null +++ b/fs/erofs/fs.c @@ -0,0 +1,267 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include "internal.h" +#include <fs_internal.h> + +struct erofs_sb_info sbi; + +static struct erofs_ctxt { + struct disk_partition cur_part_info; + struct blk_desc *cur_dev; +} ctxt; + +int erofs_dev_read(int device_id, void *buf, u64 offset, size_t len) +{ + lbaint_t sect = offset >> ctxt.cur_dev->log2blksz; + int off = offset & (ctxt.cur_dev->blksz - 1); + + if (!ctxt.cur_dev) + return -EIO; + + if (fs_devread(ctxt.cur_dev, &ctxt.cur_part_info, sect, + off, len, buf)) + return 0; + return -EIO; +} + +int erofs_blk_read(void *buf, erofs_blk_t start, u32 nblocks) +{ + return erofs_dev_read(0, buf, blknr_to_addr(start), + blknr_to_addr(nblocks)); +} + +int erofs_probe(struct blk_desc *fs_dev_desc, + struct disk_partition *fs_partition) +{ + int ret; + + ctxt.cur_dev = fs_dev_desc; + ctxt.cur_part_info = *fs_partition; + + ret = erofs_read_superblock(); + if (ret) + goto error; + + return 0; +error: + ctxt.cur_dev = NULL; + return ret; +} + +struct erofs_dir_stream { + struct fs_dir_stream fs_dirs; + struct fs_dirent dirent; + + struct erofs_inode inode; + char dblk[EROFS_BLKSIZ]; + unsigned int maxsize, de_end; + erofs_off_t pos; +}; + +static int erofs_readlink(struct erofs_inode *vi) +{ + size_t len = vi->i_size; + char *target; + int err; + + target = malloc(len + 1); + if (!target) + return -ENOMEM; + target[len] = '\0'; + + err = erofs_pread(vi, target, len, 0); + if (err) + goto err_out; + + err = erofs_ilookup(target, vi); + if (err) + goto err_out; + +err_out: + free(target); + return err; +} + +int erofs_opendir(const char *filename, struct fs_dir_stream **dirsp) +{ + struct erofs_dir_stream *dirs; + int err; + + dirs = calloc(1, sizeof(*dirs)); + if (!dirs) + return -ENOMEM; + + err = erofs_ilookup(filename, &dirs->inode); + if (err) + goto err_out; + + if (S_ISLNK(dirs->inode.i_mode)) { + err = erofs_readlink(&dirs->inode); + if (err) + goto err_out; + } + + if (!S_ISDIR(dirs->inode.i_mode)) { + err = -ENOTDIR; + goto err_out; + } + *dirsp = (struct fs_dir_stream *)dirs; + return 0; +err_out: + free(dirs); + return err; +} + +int erofs_readdir(struct fs_dir_stream *fs_dirs, struct fs_dirent **dentp) +{ + struct erofs_dir_stream *dirs = (struct erofs_dir_stream *)fs_dirs; + struct fs_dirent *dent = &dirs->dirent; + erofs_off_t pos = dirs->pos; + unsigned int nameoff, de_namelen; + struct erofs_dirent *de; + char *de_name; + int err; + + if (pos >= dirs->inode.i_size) + return 1; + + if (!dirs->maxsize) { + dirs->maxsize = min_t(unsigned int, EROFS_BLKSIZ, + dirs->inode.i_size - pos); + + err = erofs_pread(&dirs->inode, dirs->dblk, + dirs->maxsize, pos); + if (err) + return err; + + de = (struct erofs_dirent *)dirs->dblk; + dirs->de_end = le16_to_cpu(de->nameoff); + if (dirs->de_end < sizeof(struct erofs_dirent) || + dirs->de_end >= EROFS_BLKSIZ) { + erofs_err("invalid de[0].nameoff %u @ nid %llu", + dirs->de_end, de->nid | 0ULL); + return -EFSCORRUPTED; + } + } + + de = (struct erofs_dirent *)(dirs->dblk + erofs_blkoff(pos)); + nameoff = le16_to_cpu(de->nameoff); + de_name = (char *)dirs->dblk + nameoff; + + /* the last dirent in the block? */ + if (de + 1 >= (struct erofs_dirent *)(dirs->dblk + dirs->de_end)) + de_namelen = strnlen(de_name, dirs->maxsize - nameoff); + else + de_namelen = le16_to_cpu(de[1].nameoff) - nameoff; + + /* a corrupted entry is found */ + if (nameoff + de_namelen > dirs->maxsize || + de_namelen > EROFS_NAME_LEN) { + erofs_err("bogus dirent @ nid %llu", de->nid | 0ULL); + DBG_BUGON(1); + return -EFSCORRUPTED; + } + + memcpy(dent->name, de_name, de_namelen); + dent->name[de_namelen] = '\0'; + + if (de->file_type == EROFS_FT_DIR) { + dent->type = FS_DT_DIR; + } else if (de->file_type == EROFS_FT_SYMLINK) { + dent->type = FS_DT_LNK; + } else { + struct erofs_inode vi; + + dent->type = FS_DT_REG; + vi.nid = de->nid; + + err = erofs_read_inode_from_disk(&vi); + if (err) + return err; + dent->size = vi.i_size; + } + *dentp = dent; + + pos += sizeof(*de); + if (erofs_blkoff(pos) >= dirs->de_end) { + pos = blknr_to_addr(erofs_blknr(pos) + 1); + dirs->maxsize = 0; + } + dirs->pos = pos; + return 0; +} + +void erofs_closedir(struct fs_dir_stream *fs_dirs) +{ + free(fs_dirs); +} + +int erofs_exists(const char *filename) +{ + struct erofs_inode vi; + int err; + + err = erofs_ilookup(filename, &vi); + return err == 0; +} + +int erofs_size(const char *filename, loff_t *size) +{ + struct erofs_inode vi; + int err; + + err = erofs_ilookup(filename, &vi); + if (err) + return err; + *size = vi.i_size; + return 0; +} + +int erofs_read(const char *filename, void *buf, loff_t offset, loff_t len, + loff_t *actread) +{ + struct erofs_inode vi; + int err; + + err = erofs_ilookup(filename, &vi); + if (err) + return err; + + if (S_ISLNK(vi.i_mode)) { + err = erofs_readlink(&vi); + if (err) + return err; + } + + if (!len) + len = vi.i_size; + + err = erofs_pread(&vi, buf, len, offset); + if (err) { + *actread = 0; + return err; + } + + if (offset >= vi.i_size) + *actread = 0; + else if (offset + len > vi.i_size) + *actread = vi.i_size - offset; + else + *actread = len; + return 0; +} + +void erofs_close(void) +{ + ctxt.cur_dev = NULL; +} + +int erofs_uuid(char *uuid_str) +{ + if (IS_ENABLED(CONFIG_LIB_UUID)) { + if (ctxt.cur_dev) + uuid_bin_to_str(sbi.uuid, uuid_str, + UUID_STR_FORMAT_STD); + return 0; + } + return -ENOSYS; +} diff --git a/fs/erofs/internal.h b/fs/erofs/internal.h new file mode 100644 index 0000000..4af7c91 --- /dev/null +++ b/fs/erofs/internal.h @@ -0,0 +1,313 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __EROFS_INTERNAL_H +#define __EROFS_INTERNAL_H + +#define __packed __attribute__((__packed__)) + +#include <linux/stat.h> +#include <linux/bug.h> +#include <linux/err.h> +#include <linux/printk.h> +#include <linux/log2.h> +#include <inttypes.h> +#include "erofs_fs.h" + +#define erofs_err(fmt, ...) \ + pr_err(fmt "\n", ##__VA_ARGS__) + +#define erofs_info(fmt, ...) \ + pr_info(fmt "\n", ##__VA_ARGS__) + +#define erofs_dbg(fmt, ...) \ + pr_debug(fmt "\n", ##__VA_ARGS__) + +#define DBG_BUGON(condition) BUG_ON(condition) + +/* no obvious reason to support explicit PAGE_SIZE != 4096 for now */ +#if PAGE_SIZE != 4096 +#error incompatible PAGE_SIZE is already defined +#endif + +#define PAGE_MASK (~(PAGE_SIZE - 1)) + +#define LOG_BLOCK_SIZE (12) +#define EROFS_BLKSIZ (1U << LOG_BLOCK_SIZE) + +#define EROFS_ISLOTBITS 5 +#define EROFS_SLOTSIZE (1U << EROFS_ISLOTBITS) + +typedef u64 erofs_off_t; +typedef u64 erofs_nid_t; +/* data type for filesystem-wide blocks number */ +typedef u32 erofs_blk_t; + +#define NULL_ADDR ((unsigned int)-1) +#define NULL_ADDR_UL ((unsigned long)-1) + +#define erofs_blknr(addr) ((addr) / EROFS_BLKSIZ) +#define erofs_blkoff(addr) ((addr) % EROFS_BLKSIZ) +#define blknr_to_addr(nr) ((erofs_off_t)(nr) * EROFS_BLKSIZ) + +#define BLK_ROUND_UP(addr) DIV_ROUND_UP(addr, EROFS_BLKSIZ) + +struct erofs_buffer_head; + +struct erofs_device_info { + u32 blocks; + u32 mapped_blkaddr; +}; + +struct erofs_sb_info { + struct erofs_device_info *devs; + + u64 total_blocks; + u64 primarydevice_blocks; + + erofs_blk_t meta_blkaddr; + erofs_blk_t xattr_blkaddr; + + u32 feature_compat; + u32 feature_incompat; + u64 build_time; + u32 build_time_nsec; + + unsigned char islotbits; + + /* what we really care is nid, rather than ino.. */ + erofs_nid_t root_nid; + /* used for statfs, f_files - f_favail */ + u64 inos; + + u8 uuid[16]; + + u16 available_compr_algs; + u16 lz4_max_distance; + u32 checksum; + u16 extra_devices; + union { + u16 devt_slotoff; /* used for mkfs */ + u16 device_id_mask; /* used for others */ + }; +}; + +/* global sbi */ +extern struct erofs_sb_info sbi; + +static inline erofs_off_t iloc(erofs_nid_t nid) +{ + return blknr_to_addr(sbi.meta_blkaddr) + (nid << sbi.islotbits); +} + +#define EROFS_FEATURE_FUNCS(name, compat, feature) \ +static inline bool erofs_sb_has_##name(void) \ +{ \ + return sbi.feature_##compat & EROFS_FEATURE_##feature; \ +} \ +static inline void erofs_sb_set_##name(void) \ +{ \ + sbi.feature_##compat |= EROFS_FEATURE_##feature; \ +} \ +static inline void erofs_sb_clear_##name(void) \ +{ \ + sbi.feature_##compat &= ~EROFS_FEATURE_##feature; \ +} + +EROFS_FEATURE_FUNCS(lz4_0padding, incompat, INCOMPAT_LZ4_0PADDING) +EROFS_FEATURE_FUNCS(compr_cfgs, incompat, INCOMPAT_COMPR_CFGS) +EROFS_FEATURE_FUNCS(big_pcluster, incompat, INCOMPAT_BIG_PCLUSTER) +EROFS_FEATURE_FUNCS(chunked_file, incompat, INCOMPAT_CHUNKED_FILE) +EROFS_FEATURE_FUNCS(device_table, incompat, INCOMPAT_DEVICE_TABLE) +EROFS_FEATURE_FUNCS(sb_chksum, compat, COMPAT_SB_CHKSUM) + +#define EROFS_I_EA_INITED (1 << 0) +#define EROFS_I_Z_INITED (1 << 1) + +struct erofs_inode { + struct list_head i_hash, i_subdirs, i_xattrs; + + union { + /* (erofsfuse) runtime flags */ + unsigned int flags; + /* (mkfs.erofs) device ID containing source file */ + u32 dev; + }; + unsigned int i_count; + struct erofs_inode *i_parent; + + umode_t i_mode; + erofs_off_t i_size; + + u64 i_ino[2]; + u32 i_uid; + u32 i_gid; + u64 i_ctime; + u32 i_ctime_nsec; + u32 i_nlink; + + union { + u32 i_blkaddr; + u32 i_blocks; + u32 i_rdev; + struct { + unsigned short chunkformat; + unsigned char chunkbits; + }; + } u; + + unsigned char datalayout; + unsigned char inode_isize; + /* inline tail-end packing size */ + unsigned short idata_size; + + unsigned int xattr_isize; + unsigned int extent_isize; + + erofs_nid_t nid; + struct erofs_buffer_head *bh; + struct erofs_buffer_head *bh_inline, *bh_data; + + void *idata; + + union { + void *compressmeta; + void *chunkindexes; + struct { + uint16_t z_advise; + uint8_t z_algorithmtype[2]; + uint8_t z_logical_clusterbits; + uint8_t z_physical_clusterblks; + }; + }; +}; + +static inline bool is_inode_layout_compression(struct erofs_inode *inode) +{ + return erofs_inode_is_data_compressed(inode->datalayout); +} + +static inline unsigned int erofs_bitrange(unsigned int value, unsigned int bit, + unsigned int bits) +{ + return (value >> bit) & ((1 << bits) - 1); +} + +static inline unsigned int erofs_inode_version(unsigned int value) +{ + return erofs_bitrange(value, EROFS_I_VERSION_BIT, + EROFS_I_VERSION_BITS); +} + +static inline unsigned int erofs_inode_datalayout(unsigned int value) +{ + return erofs_bitrange(value, EROFS_I_DATALAYOUT_BIT, + EROFS_I_DATALAYOUT_BITS); +} + +#define IS_ROOT(x) ((x) == (x)->i_parent) + +struct erofs_dentry { + struct list_head d_child; /* child of parent list */ + + unsigned int type; + char name[EROFS_NAME_LEN]; + union { + struct erofs_inode *inode; + erofs_nid_t nid; + }; +}; + +static inline bool is_dot_dotdot(const char *name) +{ + if (name[0] != '.') + return false; + + return name[1] == '\0' || (name[1] == '.' && name[2] == '\0'); +} + +enum { + BH_Meta, + BH_Mapped, + BH_Encoded, + BH_FullMapped, +}; + +/* Has a disk mapping */ +#define EROFS_MAP_MAPPED (1 << BH_Mapped) +/* Located in metadata (could be copied from bd_inode) */ +#define EROFS_MAP_META (1 << BH_Meta) +/* The extent is encoded */ +#define EROFS_MAP_ENCODED (1 << BH_Encoded) +/* The length of extent is full */ +#define EROFS_MAP_FULL_MAPPED (1 << BH_FullMapped) + +struct erofs_map_blocks { + char mpage[EROFS_BLKSIZ]; + + erofs_off_t m_pa, m_la; + u64 m_plen, m_llen; + + unsigned short m_deviceid; + char m_algorithmformat; + unsigned int m_flags; + erofs_blk_t index; +}; + +/* + * Used to get the exact decompressed length, e.g. fiemap (consider lookback + * approach instead if possible since it's more metadata lightweight.) + */ +#define EROFS_GET_BLOCKS_FIEMAP 0x0002 + +enum { + Z_EROFS_COMPRESSION_SHIFTED = Z_EROFS_COMPRESSION_MAX, + Z_EROFS_COMPRESSION_RUNTIME_MAX +}; + +struct erofs_map_dev { + erofs_off_t m_pa; + unsigned int m_deviceid; +}; + +/* fs.c */ +int erofs_blk_read(void *buf, erofs_blk_t start, u32 nblocks); +int erofs_dev_read(int device_id, void *buf, u64 offset, size_t len); + +/* super.c */ +int erofs_read_superblock(void); + +/* namei.c */ +int erofs_read_inode_from_disk(struct erofs_inode *vi); +int erofs_ilookup(const char *path, struct erofs_inode *vi); +int erofs_read_inode_from_disk(struct erofs_inode *vi); + +/* data.c */ +int erofs_pread(struct erofs_inode *inode, char *buf, + erofs_off_t count, erofs_off_t offset); +int erofs_map_blocks(struct erofs_inode *inode, + struct erofs_map_blocks *map, int flags); +int erofs_map_dev(struct erofs_sb_info *sbi, struct erofs_map_dev *map); +/* zmap.c */ +int z_erofs_fill_inode(struct erofs_inode *vi); +int z_erofs_map_blocks_iter(struct erofs_inode *vi, + struct erofs_map_blocks *map, int flags); + +#ifdef EUCLEAN +#define EFSCORRUPTED EUCLEAN /* Filesystem is corrupted */ +#else +#define EFSCORRUPTED EIO +#endif + +#define CRC32C_POLY_LE 0x82F63B78 +static inline u32 erofs_crc32c(u32 crc, const u8 *in, size_t len) +{ + int i; + + while (len--) { + crc ^= *in++; + for (i = 0; i < 8; i++) + crc = (crc >> 1) ^ ((crc & 1) ? CRC32C_POLY_LE : 0); + } + return crc; +} + +#endif diff --git a/fs/erofs/namei.c b/fs/erofs/namei.c new file mode 100644 index 0000000..d1d4757 --- /dev/null +++ b/fs/erofs/namei.c @@ -0,0 +1,252 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include "internal.h" + +int erofs_read_inode_from_disk(struct erofs_inode *vi) +{ + int ret, ifmt; + char buf[sizeof(struct erofs_inode_extended)]; + struct erofs_inode_compact *dic; + struct erofs_inode_extended *die; + const erofs_off_t inode_loc = iloc(vi->nid); + + ret = erofs_dev_read(0, buf, inode_loc, sizeof(*dic)); + if (ret < 0) + return -EIO; + + dic = (struct erofs_inode_compact *)buf; + ifmt = le16_to_cpu(dic->i_format); + + vi->datalayout = erofs_inode_datalayout(ifmt); + if (vi->datalayout >= EROFS_INODE_DATALAYOUT_MAX) { + erofs_err("unsupported datalayout %u of nid %llu", + vi->datalayout, vi->nid | 0ULL); + return -EOPNOTSUPP; + } + switch (erofs_inode_version(ifmt)) { + case EROFS_INODE_LAYOUT_EXTENDED: + vi->inode_isize = sizeof(struct erofs_inode_extended); + + ret = erofs_dev_read(0, buf + sizeof(*dic), inode_loc + sizeof(*dic), + sizeof(*die) - sizeof(*dic)); + if (ret < 0) + return -EIO; + + die = (struct erofs_inode_extended *)buf; + vi->xattr_isize = erofs_xattr_ibody_size(die->i_xattr_icount); + vi->i_mode = le16_to_cpu(die->i_mode); + + switch (vi->i_mode & S_IFMT) { + case S_IFREG: + case S_IFDIR: + case S_IFLNK: + vi->u.i_blkaddr = le32_to_cpu(die->i_u.raw_blkaddr); + break; + case S_IFCHR: + case S_IFBLK: + vi->u.i_rdev = 0; + break; + case S_IFIFO: + case S_IFSOCK: + vi->u.i_rdev = 0; + break; + default: + goto bogusimode; + } + + vi->i_uid = le32_to_cpu(die->i_uid); + vi->i_gid = le32_to_cpu(die->i_gid); + vi->i_nlink = le32_to_cpu(die->i_nlink); + + vi->i_ctime = le64_to_cpu(die->i_ctime); + vi->i_ctime_nsec = le64_to_cpu(die->i_ctime_nsec); + vi->i_size = le64_to_cpu(die->i_size); + if (vi->datalayout == EROFS_INODE_CHUNK_BASED) + /* fill chunked inode summary info */ + vi->u.chunkformat = le16_to_cpu(die->i_u.c.format); + break; + case EROFS_INODE_LAYOUT_COMPACT: + vi->inode_isize = sizeof(struct erofs_inode_compact); + vi->xattr_isize = erofs_xattr_ibody_size(dic->i_xattr_icount); + vi->i_mode = le16_to_cpu(dic->i_mode); + + switch (vi->i_mode & S_IFMT) { + case S_IFREG: + case S_IFDIR: + case S_IFLNK: + vi->u.i_blkaddr = le32_to_cpu(dic->i_u.raw_blkaddr); + break; + case S_IFCHR: + case S_IFBLK: + vi->u.i_rdev = 0; + break; + case S_IFIFO: + case S_IFSOCK: + vi->u.i_rdev = 0; + break; + default: + goto bogusimode; + } + + vi->i_uid = le16_to_cpu(dic->i_uid); + vi->i_gid = le16_to_cpu(dic->i_gid); + vi->i_nlink = le16_to_cpu(dic->i_nlink); + + vi->i_ctime = sbi.build_time; + vi->i_ctime_nsec = sbi.build_time_nsec; + + vi->i_size = le32_to_cpu(dic->i_size); + if (vi->datalayout == EROFS_INODE_CHUNK_BASED) + vi->u.chunkformat = le16_to_cpu(dic->i_u.c.format); + break; + default: + erofs_err("unsupported on-disk inode version %u of nid %llu", + erofs_inode_version(ifmt), vi->nid | 0ULL); + return -EOPNOTSUPP; + } + + vi->flags = 0; + if (vi->datalayout == EROFS_INODE_CHUNK_BASED) { + if (vi->u.chunkformat & ~EROFS_CHUNK_FORMAT_ALL) { + erofs_err("unsupported chunk format %x of nid %llu", + vi->u.chunkformat, vi->nid | 0ULL); + return -EOPNOTSUPP; + } + vi->u.chunkbits = LOG_BLOCK_SIZE + + (vi->u.chunkformat & EROFS_CHUNK_FORMAT_BLKBITS_MASK); + } else if (erofs_inode_is_data_compressed(vi->datalayout)) + z_erofs_fill_inode(vi); + return 0; +bogusimode: + erofs_err("bogus i_mode (%o) @ nid %llu", vi->i_mode, vi->nid | 0ULL); + return -EFSCORRUPTED; +} + +struct erofs_dirent *find_target_dirent(erofs_nid_t pnid, + void *dentry_blk, + const char *name, unsigned int len, + unsigned int nameoff, + unsigned int maxsize) +{ + struct erofs_dirent *de = dentry_blk; + const struct erofs_dirent *end = dentry_blk + nameoff; + + while (de < end) { + const char *de_name; + unsigned int de_namelen; + + nameoff = le16_to_cpu(de->nameoff); + de_name = (char *)dentry_blk + nameoff; + + /* the last dirent in the block? */ + if (de + 1 >= end) + de_namelen = strnlen(de_name, maxsize - nameoff); + else + de_namelen = le16_to_cpu(de[1].nameoff) - nameoff; + + /* a corrupted entry is found */ + if (nameoff + de_namelen > maxsize || + de_namelen > EROFS_NAME_LEN) { + erofs_err("bogus dirent @ nid %llu", pnid | 0ULL); + DBG_BUGON(1); + return ERR_PTR(-EFSCORRUPTED); + } + + if (len == de_namelen && !memcmp(de_name, name, de_namelen)) + return de; + ++de; + } + return NULL; +} + +struct nameidata { + erofs_nid_t nid; + unsigned int ftype; +}; + +int erofs_namei(struct nameidata *nd, + const char *name, unsigned int len) +{ + erofs_nid_t nid = nd->nid; + int ret; + char buf[EROFS_BLKSIZ]; + struct erofs_inode vi = { .nid = nid }; + erofs_off_t offset; + + ret = erofs_read_inode_from_disk(&vi); + if (ret) + return ret; + + offset = 0; + while (offset < vi.i_size) { + erofs_off_t maxsize = min_t(erofs_off_t, + vi.i_size - offset, EROFS_BLKSIZ); + struct erofs_dirent *de = (void *)buf; + unsigned int nameoff; + + ret = erofs_pread(&vi, buf, maxsize, offset); + if (ret) + return ret; + + nameoff = le16_to_cpu(de->nameoff); + if (nameoff < sizeof(struct erofs_dirent) || + nameoff >= PAGE_SIZE) { + erofs_err("invalid de[0].nameoff %u @ nid %llu", + nameoff, nid | 0ULL); + return -EFSCORRUPTED; + } + + de = find_target_dirent(nid, buf, name, len, + nameoff, maxsize); + if (IS_ERR(de)) + return PTR_ERR(de); + + if (de) { + nd->nid = le64_to_cpu(de->nid); + return 0; + } + offset += maxsize; + } + return -ENOENT; +} + +static int link_path_walk(const char *name, struct nameidata *nd) +{ + nd->nid = sbi.root_nid; + + while (*name == '/') + name++; + + /* At this point we know we have a real path component. */ + while (*name != '\0') { + const char *p = name; + int ret; + + do { + ++p; + } while (*p != '\0' && *p != '/'); + + DBG_BUGON(p <= name); + ret = erofs_namei(nd, name, p - name); + if (ret) + return ret; + + name = p; + /* Skip until no more slashes. */ + for (name = p; *name == '/'; ++name) + ; + } + return 0; +} + +int erofs_ilookup(const char *path, struct erofs_inode *vi) +{ + int ret; + struct nameidata nd; + + ret = link_path_walk(path, &nd); + if (ret) + return ret; + + vi->nid = nd.nid; + return erofs_read_inode_from_disk(vi); +} diff --git a/fs/erofs/super.c b/fs/erofs/super.c new file mode 100644 index 0000000..4cca322 --- /dev/null +++ b/fs/erofs/super.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include "internal.h" + +static bool check_layout_compatibility(struct erofs_sb_info *sbi, + struct erofs_super_block *dsb) +{ + const unsigned int feature = le32_to_cpu(dsb->feature_incompat); + + sbi->feature_incompat = feature; + + /* check if current kernel meets all mandatory requirements */ + if (feature & (~EROFS_ALL_FEATURE_INCOMPAT)) { + erofs_err("unidentified incompatible feature %x, please upgrade kernel version", + feature & ~EROFS_ALL_FEATURE_INCOMPAT); + return false; + } + return true; +} + +static int erofs_init_devices(struct erofs_sb_info *sbi, + struct erofs_super_block *dsb) +{ + unsigned int ondisk_extradevs, i; + erofs_off_t pos; + + sbi->total_blocks = sbi->primarydevice_blocks; + + if (!erofs_sb_has_device_table()) + ondisk_extradevs = 0; + else + ondisk_extradevs = le16_to_cpu(dsb->extra_devices); + + if (ondisk_extradevs != sbi->extra_devices) { + erofs_err("extra devices don't match (ondisk %u, given %u)", + ondisk_extradevs, sbi->extra_devices); + return -EINVAL; + } + if (!ondisk_extradevs) + return 0; + + sbi->device_id_mask = roundup_pow_of_two(ondisk_extradevs + 1) - 1; + sbi->devs = calloc(ondisk_extradevs, sizeof(*sbi->devs)); + pos = le16_to_cpu(dsb->devt_slotoff) * EROFS_DEVT_SLOT_SIZE; + for (i = 0; i < ondisk_extradevs; ++i) { + struct erofs_deviceslot dis; + int ret; + + ret = erofs_dev_read(0, &dis, pos, sizeof(dis)); + if (ret < 0) + return ret; + + sbi->devs[i].mapped_blkaddr = dis.mapped_blkaddr; + sbi->total_blocks += dis.blocks; + pos += EROFS_DEVT_SLOT_SIZE; + } + return 0; +} + +int erofs_read_superblock(void) +{ + char data[EROFS_BLKSIZ]; + struct erofs_super_block *dsb; + unsigned int blkszbits; + int ret; + + ret = erofs_blk_read(data, 0, 1); + if (ret < 0) { + erofs_err("cannot read erofs superblock: %d", ret); + return -EIO; + } + dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET); + + ret = -EINVAL; + if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) { + erofs_err("cannot find valid erofs superblock"); + return ret; + } + + sbi.feature_compat = le32_to_cpu(dsb->feature_compat); + + blkszbits = dsb->blkszbits; + /* 9(512 bytes) + LOG_SECTORS_PER_BLOCK == LOG_BLOCK_SIZE */ + if (blkszbits != LOG_BLOCK_SIZE) { + erofs_err("blksize %u isn't supported on this platform", + 1 << blkszbits); + return ret; + } + + if (!check_layout_compatibility(&sbi, dsb)) + return ret; + + sbi.primarydevice_blocks = le32_to_cpu(dsb->blocks); + sbi.meta_blkaddr = le32_to_cpu(dsb->meta_blkaddr); + sbi.xattr_blkaddr = le32_to_cpu(dsb->xattr_blkaddr); + sbi.islotbits = EROFS_ISLOTBITS; + sbi.root_nid = le16_to_cpu(dsb->root_nid); + sbi.inos = le64_to_cpu(dsb->inos); + sbi.checksum = le32_to_cpu(dsb->checksum); + + sbi.build_time = le64_to_cpu(dsb->build_time); + sbi.build_time_nsec = le32_to_cpu(dsb->build_time_nsec); + + memcpy(&sbi.uuid, dsb->uuid, sizeof(dsb->uuid)); + return erofs_init_devices(&sbi, dsb); +} diff --git a/fs/erofs/zmap.c b/fs/erofs/zmap.c new file mode 100644 index 0000000..be2599a --- /dev/null +++ b/fs/erofs/zmap.c @@ -0,0 +1,601 @@ +// SPDX-License-Identifier: GPL-2.0+ +#include "internal.h" + +int z_erofs_fill_inode(struct erofs_inode *vi) +{ + if (!erofs_sb_has_big_pcluster() && + vi->datalayout == EROFS_INODE_FLAT_COMPRESSION_LEGACY) { + vi->z_advise = 0; + vi->z_algorithmtype[0] = 0; + vi->z_algorithmtype[1] = 0; + vi->z_logical_clusterbits = LOG_BLOCK_SIZE; + + vi->flags |= EROFS_I_Z_INITED; + } + return 0; +} + +static int z_erofs_fill_inode_lazy(struct erofs_inode *vi) +{ + int ret; + erofs_off_t pos; + struct z_erofs_map_header *h; + char buf[sizeof(struct z_erofs_map_header)]; + + if (vi->flags & EROFS_I_Z_INITED) + return 0; + + DBG_BUGON(!erofs_sb_has_big_pcluster() && + vi->datalayout == EROFS_INODE_FLAT_COMPRESSION_LEGACY); + pos = round_up(iloc(vi->nid) + vi->inode_isize + vi->xattr_isize, 8); + + ret = erofs_dev_read(0, buf, pos, sizeof(buf)); + if (ret < 0) + return -EIO; + + h = (struct z_erofs_map_header *)buf; + vi->z_advise = le16_to_cpu(h->h_advise); + vi->z_algorithmtype[0] = h->h_algorithmtype & 15; + vi->z_algorithmtype[1] = h->h_algorithmtype >> 4; + + if (vi->z_algorithmtype[0] >= Z_EROFS_COMPRESSION_MAX) { + erofs_err("unknown compression format %u for nid %llu", + vi->z_algorithmtype[0], (unsigned long long)vi->nid); + return -EOPNOTSUPP; + } + + vi->z_logical_clusterbits = LOG_BLOCK_SIZE + (h->h_clusterbits & 7); + if (vi->datalayout == EROFS_INODE_FLAT_COMPRESSION && + !(vi->z_advise & Z_EROFS_ADVISE_BIG_PCLUSTER_1) ^ + !(vi->z_advise & Z_EROFS_ADVISE_BIG_PCLUSTER_2)) { + erofs_err("big pcluster head1/2 of compact indexes should be consistent for nid %llu", + vi->nid * 1ULL); + return -EFSCORRUPTED; + } + vi->flags |= EROFS_I_Z_INITED; + return 0; +} + +struct z_erofs_maprecorder { + struct erofs_inode *inode; + struct erofs_map_blocks *map; + void *kaddr; + + unsigned long lcn; + /* compression extent information gathered */ + u8 type, headtype; + u16 clusterofs; + u16 delta[2]; + erofs_blk_t pblk, compressedlcs; +}; + +static int z_erofs_reload_indexes(struct z_erofs_maprecorder *m, + erofs_blk_t eblk) +{ + int ret; + struct erofs_map_blocks *const map = m->map; + char *mpage = map->mpage; + + if (map->index == eblk) + return 0; + + ret = erofs_blk_read(mpage, eblk, 1); + if (ret < 0) + return -EIO; + + map->index = eblk; + + return 0; +} + +static int legacy_load_cluster_from_disk(struct z_erofs_maprecorder *m, + unsigned long lcn) +{ + struct erofs_inode *const vi = m->inode; + const erofs_off_t ibase = iloc(vi->nid); + const erofs_off_t pos = + Z_EROFS_VLE_LEGACY_INDEX_ALIGN(ibase + vi->inode_isize + + vi->xattr_isize) + + lcn * sizeof(struct z_erofs_vle_decompressed_index); + struct z_erofs_vle_decompressed_index *di; + unsigned int advise, type; + int err; + + err = z_erofs_reload_indexes(m, erofs_blknr(pos)); + if (err) + return err; + + m->lcn = lcn; + di = m->kaddr + erofs_blkoff(pos); + + advise = le16_to_cpu(di->di_advise); + type = (advise >> Z_EROFS_VLE_DI_CLUSTER_TYPE_BIT) & + ((1 << Z_EROFS_VLE_DI_CLUSTER_TYPE_BITS) - 1); + switch (type) { + case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: + m->clusterofs = 1 << vi->z_logical_clusterbits; + m->delta[0] = le16_to_cpu(di->di_u.delta[0]); + if (m->delta[0] & Z_EROFS_VLE_DI_D0_CBLKCNT) { + if (!(vi->z_advise & Z_EROFS_ADVISE_BIG_PCLUSTER_1)) { + DBG_BUGON(1); + return -EFSCORRUPTED; + } + m->compressedlcs = m->delta[0] & + ~Z_EROFS_VLE_DI_D0_CBLKCNT; + m->delta[0] = 1; + } + m->delta[1] = le16_to_cpu(di->di_u.delta[1]); + break; + case Z_EROFS_VLE_CLUSTER_TYPE_PLAIN: + case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: + m->clusterofs = le16_to_cpu(di->di_clusterofs); + m->pblk = le32_to_cpu(di->di_u.blkaddr); + break; + default: + DBG_BUGON(1); + return -EOPNOTSUPP; + } + m->type = type; + return 0; +} + +static unsigned int decode_compactedbits(unsigned int lobits, + unsigned int lomask, + u8 *in, unsigned int pos, u8 *type) +{ + const unsigned int v = get_unaligned_le32(in + pos / 8) >> (pos & 7); + const unsigned int lo = v & lomask; + + *type = (v >> lobits) & 3; + return lo; +} + +static int get_compacted_la_distance(unsigned int lclusterbits, + unsigned int encodebits, + unsigned int vcnt, u8 *in, int i) +{ + const unsigned int lomask = (1 << lclusterbits) - 1; + unsigned int lo, d1 = 0; + u8 type; + + DBG_BUGON(i >= vcnt); + + do { + lo = decode_compactedbits(lclusterbits, lomask, + in, encodebits * i, &type); + + if (type != Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) + return d1; + ++d1; + } while (++i < vcnt); + + /* vcnt - 1 (Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) item */ + if (!(lo & Z_EROFS_VLE_DI_D0_CBLKCNT)) + d1 += lo - 1; + return d1; +} + +static int unpack_compacted_index(struct z_erofs_maprecorder *m, + unsigned int amortizedshift, + unsigned int eofs, bool lookahead) +{ + struct erofs_inode *const vi = m->inode; + const unsigned int lclusterbits = vi->z_logical_clusterbits; + const unsigned int lomask = (1 << lclusterbits) - 1; + unsigned int vcnt, base, lo, encodebits, nblk; + int i; + u8 *in, type; + bool big_pcluster; + + if (1 << amortizedshift == 4) + vcnt = 2; + else if (1 << amortizedshift == 2 && lclusterbits == 12) + vcnt = 16; + else + return -EOPNOTSUPP; + + big_pcluster = vi->z_advise & Z_EROFS_ADVISE_BIG_PCLUSTER_1; + encodebits = ((vcnt << amortizedshift) - sizeof(__le32)) * 8 / vcnt; + base = round_down(eofs, vcnt << amortizedshift); + in = m->kaddr + base; + + i = (eofs - base) >> amortizedshift; + + lo = decode_compactedbits(lclusterbits, lomask, + in, encodebits * i, &type); + m->type = type; + if (type == Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) { + m->clusterofs = 1 << lclusterbits; + + /* figure out lookahead_distance: delta[1] if needed */ + if (lookahead) + m->delta[1] = get_compacted_la_distance(lclusterbits, + encodebits, + vcnt, in, i); + if (lo & Z_EROFS_VLE_DI_D0_CBLKCNT) { + if (!big_pcluster) { + DBG_BUGON(1); + return -EFSCORRUPTED; + } + m->compressedlcs = lo & ~Z_EROFS_VLE_DI_D0_CBLKCNT; + m->delta[0] = 1; + return 0; + } else if (i + 1 != (int)vcnt) { + m->delta[0] = lo; + return 0; + } + /* + * since the last lcluster in the pack is special, + * of which lo saves delta[1] rather than delta[0]. + * Hence, get delta[0] by the previous lcluster indirectly. + */ + lo = decode_compactedbits(lclusterbits, lomask, + in, encodebits * (i - 1), &type); + if (type != Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) + lo = 0; + else if (lo & Z_EROFS_VLE_DI_D0_CBLKCNT) + lo = 1; + m->delta[0] = lo + 1; + return 0; + } + m->clusterofs = lo; + m->delta[0] = 0; + /* figout out blkaddr (pblk) for HEAD lclusters */ + if (!big_pcluster) { + nblk = 1; + while (i > 0) { + --i; + lo = decode_compactedbits(lclusterbits, lomask, + in, encodebits * i, &type); + if (type == Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) + i -= lo; + + if (i >= 0) + ++nblk; + } + } else { + nblk = 0; + while (i > 0) { + --i; + lo = decode_compactedbits(lclusterbits, lomask, + in, encodebits * i, &type); + if (type == Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) { + if (lo & Z_EROFS_VLE_DI_D0_CBLKCNT) { + --i; + nblk += lo & ~Z_EROFS_VLE_DI_D0_CBLKCNT; + continue; + } + if (lo == 1) { + DBG_BUGON(1); + /* --i; ++nblk; continue; */ + return -EFSCORRUPTED; + } + i -= lo - 2; + continue; + } + ++nblk; + } + } + in += (vcnt << amortizedshift) - sizeof(__le32); + m->pblk = le32_to_cpu(*(__le32 *)in) + nblk; + return 0; +} + +static int compacted_load_cluster_from_disk(struct z_erofs_maprecorder *m, + unsigned long lcn, bool lookahead) +{ + struct erofs_inode *const vi = m->inode; + const unsigned int lclusterbits = vi->z_logical_clusterbits; + const erofs_off_t ebase = round_up(iloc(vi->nid) + vi->inode_isize + + vi->xattr_isize, 8) + + sizeof(struct z_erofs_map_header); + const unsigned int totalidx = DIV_ROUND_UP(vi->i_size, EROFS_BLKSIZ); + unsigned int compacted_4b_initial, compacted_2b; + unsigned int amortizedshift; + erofs_off_t pos; + int err; + + if (lclusterbits != 12) + return -EOPNOTSUPP; + + if (lcn >= totalidx) + return -EINVAL; + + m->lcn = lcn; + /* used to align to 32-byte (compacted_2b) alignment */ + compacted_4b_initial = (32 - ebase % 32) / 4; + if (compacted_4b_initial == 32 / 4) + compacted_4b_initial = 0; + + if (vi->z_advise & Z_EROFS_ADVISE_COMPACTED_2B) + compacted_2b = rounddown(totalidx - compacted_4b_initial, 16); + else + compacted_2b = 0; + + pos = ebase; + if (lcn < compacted_4b_initial) { + amortizedshift = 2; + goto out; + } + pos += compacted_4b_initial * 4; + lcn -= compacted_4b_initial; + + if (lcn < compacted_2b) { + amortizedshift = 1; + goto out; + } + pos += compacted_2b * 2; + lcn -= compacted_2b; + amortizedshift = 2; +out: + pos += lcn * (1 << amortizedshift); + err = z_erofs_reload_indexes(m, erofs_blknr(pos)); + if (err) + return err; + return unpack_compacted_index(m, amortizedshift, erofs_blkoff(pos), + lookahead); +} + +static int z_erofs_load_cluster_from_disk(struct z_erofs_maprecorder *m, + unsigned int lcn, bool lookahead) +{ + const unsigned int datamode = m->inode->datalayout; + + if (datamode == EROFS_INODE_FLAT_COMPRESSION_LEGACY) + return legacy_load_cluster_from_disk(m, lcn); + + if (datamode == EROFS_INODE_FLAT_COMPRESSION) + return compacted_load_cluster_from_disk(m, lcn, lookahead); + + return -EINVAL; +} + +static int z_erofs_extent_lookback(struct z_erofs_maprecorder *m, + unsigned int lookback_distance) +{ + struct erofs_inode *const vi = m->inode; + struct erofs_map_blocks *const map = m->map; + const unsigned int lclusterbits = vi->z_logical_clusterbits; + unsigned long lcn = m->lcn; + int err; + + if (lcn < lookback_distance) { + erofs_err("bogus lookback distance @ nid %llu", + (unsigned long long)vi->nid); + DBG_BUGON(1); + return -EFSCORRUPTED; + } + + /* load extent head logical cluster if needed */ + lcn -= lookback_distance; + err = z_erofs_load_cluster_from_disk(m, lcn, false); + if (err) + return err; + + switch (m->type) { + case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: + if (!m->delta[0]) { + erofs_err("invalid lookback distance 0 @ nid %llu", + (unsigned long long)vi->nid); + DBG_BUGON(1); + return -EFSCORRUPTED; + } + return z_erofs_extent_lookback(m, m->delta[0]); + case Z_EROFS_VLE_CLUSTER_TYPE_PLAIN: + case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: + m->headtype = m->type; + map->m_la = (lcn << lclusterbits) | m->clusterofs; + break; + default: + erofs_err("unknown type %u @ lcn %lu of nid %llu", + m->type, lcn, (unsigned long long)vi->nid); + DBG_BUGON(1); + return -EOPNOTSUPP; + } + return 0; +} + +static int z_erofs_get_extent_compressedlen(struct z_erofs_maprecorder *m, + unsigned int initial_lcn) +{ + struct erofs_inode *const vi = m->inode; + struct erofs_map_blocks *const map = m->map; + const unsigned int lclusterbits = vi->z_logical_clusterbits; + unsigned long lcn; + int err; + + DBG_BUGON(m->type != Z_EROFS_VLE_CLUSTER_TYPE_PLAIN && + m->type != Z_EROFS_VLE_CLUSTER_TYPE_HEAD); + if (m->headtype == Z_EROFS_VLE_CLUSTER_TYPE_PLAIN || + !(vi->z_advise & Z_EROFS_ADVISE_BIG_PCLUSTER_1)) { + map->m_plen = 1 << lclusterbits; + return 0; + } + + lcn = m->lcn + 1; + if (m->compressedlcs) + goto out; + + err = z_erofs_load_cluster_from_disk(m, lcn, false); + if (err) + return err; + + /* + * If the 1st NONHEAD lcluster has already been handled initially w/o + * valid compressedlcs, which means at least it mustn't be CBLKCNT, or + * an internal implemenatation error is detected. + * + * The following code can also handle it properly anyway, but let's + * BUG_ON in the debugging mode only for developers to notice that. + */ + DBG_BUGON(lcn == initial_lcn && + m->type == Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD); + + switch (m->type) { + case Z_EROFS_VLE_CLUSTER_TYPE_PLAIN: + case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: + /* + * if the 1st NONHEAD lcluster is actually PLAIN or HEAD type + * rather than CBLKCNT, it's a 1 lcluster-sized pcluster. + */ + m->compressedlcs = 1; + break; + case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: + if (m->delta[0] != 1) + goto err_bonus_cblkcnt; + if (m->compressedlcs) + break; + /* fallthrough */ + default: + erofs_err("cannot found CBLKCNT @ lcn %lu of nid %llu", + lcn, vi->nid | 0ULL); + DBG_BUGON(1); + return -EFSCORRUPTED; + } +out: + map->m_plen = m->compressedlcs << lclusterbits; + return 0; +err_bonus_cblkcnt: + erofs_err("bogus CBLKCNT @ lcn %lu of nid %llu", + lcn, vi->nid | 0ULL); + DBG_BUGON(1); + return -EFSCORRUPTED; +} + +static int z_erofs_get_extent_decompressedlen(struct z_erofs_maprecorder *m) +{ + struct erofs_inode *const vi = m->inode; + struct erofs_map_blocks *map = m->map; + unsigned int lclusterbits = vi->z_logical_clusterbits; + u64 lcn = m->lcn, headlcn = map->m_la >> lclusterbits; + int err; + + do { + /* handle the last EOF pcluster (no next HEAD lcluster) */ + if ((lcn << lclusterbits) >= vi->i_size) { + map->m_llen = vi->i_size - map->m_la; + return 0; + } + + err = z_erofs_load_cluster_from_disk(m, lcn, true); + if (err) + return err; + + if (m->type == Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD) { + DBG_BUGON(!m->delta[1] && + m->clusterofs != 1 << lclusterbits); + } else if (m->type == Z_EROFS_VLE_CLUSTER_TYPE_PLAIN || + m->type == Z_EROFS_VLE_CLUSTER_TYPE_HEAD) { + /* go on until the next HEAD lcluster */ + if (lcn != headlcn) + break; + m->delta[1] = 1; + } else { + erofs_err("unknown type %u @ lcn %llu of nid %llu", + m->type, lcn | 0ULL, + (unsigned long long)vi->nid); + DBG_BUGON(1); + return -EOPNOTSUPP; + } + lcn += m->delta[1]; + } while (m->delta[1]); + + map->m_llen = (lcn << lclusterbits) + m->clusterofs - map->m_la; + return 0; +} + +int z_erofs_map_blocks_iter(struct erofs_inode *vi, + struct erofs_map_blocks *map, + int flags) +{ + struct z_erofs_maprecorder m = { + .inode = vi, + .map = map, + .kaddr = map->mpage, + }; + int err = 0; + unsigned int lclusterbits, endoff; + unsigned long initial_lcn; + unsigned long long ofs, end; + + /* when trying to read beyond EOF, leave it unmapped */ + if (map->m_la >= vi->i_size) { + map->m_llen = map->m_la + 1 - vi->i_size; + map->m_la = vi->i_size; + map->m_flags = 0; + goto out; + } + + err = z_erofs_fill_inode_lazy(vi); + if (err) + goto out; + + lclusterbits = vi->z_logical_clusterbits; + ofs = map->m_la; + initial_lcn = ofs >> lclusterbits; + endoff = ofs & ((1 << lclusterbits) - 1); + + err = z_erofs_load_cluster_from_disk(&m, initial_lcn, false); + if (err) + goto out; + + map->m_flags = EROFS_MAP_MAPPED | EROFS_MAP_ENCODED; + end = (m.lcn + 1ULL) << lclusterbits; + switch (m.type) { + case Z_EROFS_VLE_CLUSTER_TYPE_PLAIN: + case Z_EROFS_VLE_CLUSTER_TYPE_HEAD: + if (endoff >= m.clusterofs) { + m.headtype = m.type; + map->m_la = (m.lcn << lclusterbits) | m.clusterofs; + break; + } + /* m.lcn should be >= 1 if endoff < m.clusterofs */ + if (!m.lcn) { + erofs_err("invalid logical cluster 0 at nid %llu", + (unsigned long long)vi->nid); + err = -EFSCORRUPTED; + goto out; + } + end = (m.lcn << lclusterbits) | m.clusterofs; + map->m_flags |= EROFS_MAP_FULL_MAPPED; + m.delta[0] = 1; + /* fallthrough */ + case Z_EROFS_VLE_CLUSTER_TYPE_NONHEAD: + /* get the correspoinding first chunk */ + err = z_erofs_extent_lookback(&m, m.delta[0]); + if (err) + goto out; + break; + default: + erofs_err("unknown type %u @ offset %llu of nid %llu", + m.type, ofs, (unsigned long long)vi->nid); + err = -EOPNOTSUPP; + goto out; + } + + map->m_llen = end - map->m_la; + map->m_pa = blknr_to_addr(m.pblk); + + err = z_erofs_get_extent_compressedlen(&m, initial_lcn); + if (err) + goto out; + + if (m.headtype == Z_EROFS_VLE_CLUSTER_TYPE_PLAIN) + map->m_algorithmformat = Z_EROFS_COMPRESSION_SHIFTED; + else + map->m_algorithmformat = vi->z_algorithmtype[0]; + + if (flags & EROFS_GET_BLOCKS_FIEMAP) { + err = z_erofs_get_extent_decompressedlen(&m); + if (!err) + map->m_flags |= EROFS_MAP_FULL_MAPPED; + } + +out: + erofs_dbg("m_la %" PRIu64 " m_pa %" PRIu64 " m_llen %" PRIu64 " m_plen %" PRIu64 " m_flags 0%o", + map->m_la, map->m_pa, + map->m_llen, map->m_plen, map->m_flags); + + DBG_BUGON(err < 0 && err != -ENOMEM); + return err; +} @@ -18,6 +18,7 @@ #include <fat.h> #include <fs.h> #include <sandboxfs.h> +#include <semihostingfs.h> #include <ubifs_uboot.h> #include <btrfs.h> #include <asm/global_data.h> @@ -26,6 +27,7 @@ #include <linux/math64.h> #include <efi_loader.h> #include <squashfs.h> +#include <erofs.h> DECLARE_GLOBAL_DATA_PTR; @@ -246,6 +248,25 @@ static struct fstype_info fstypes[] = { .ln = fs_ln_unsupported, }, #endif +#ifdef CONFIG_SEMIHOSTING + { + .fstype = FS_TYPE_SEMIHOSTING, + .name = "semihosting", + .null_dev_desc_ok = true, + .probe = smh_fs_set_blk_dev, + .close = fs_close_unsupported, + .ls = fs_ls_unsupported, + .exists = fs_exists_unsupported, + .size = smh_fs_size, + .read = smh_fs_read, + .write = smh_fs_write, + .uuid = fs_uuid_unsupported, + .opendir = fs_opendir_unsupported, + .unlink = fs_unlink_unsupported, + .mkdir = fs_mkdir_unsupported, + .ln = fs_ln_unsupported, + }, +#endif #ifdef CONFIG_CMD_UBIFS { .fstype = FS_TYPE_UBIFS, @@ -305,6 +326,27 @@ static struct fstype_info fstypes[] = { .mkdir = fs_mkdir_unsupported, }, #endif +#if IS_ENABLED(CONFIG_FS_EROFS) + { + .fstype = FS_TYPE_EROFS, + .name = "erofs", + .null_dev_desc_ok = false, + .probe = erofs_probe, + .opendir = erofs_opendir, + .readdir = erofs_readdir, + .ls = fs_ls_generic, + .read = erofs_read, + .size = erofs_size, + .close = erofs_close, + .closedir = erofs_closedir, + .exists = erofs_exists, + .uuid = fs_uuid_unsupported, + .write = fs_write_unsupported, + .ln = fs_ln_unsupported, + .unlink = fs_unlink_unsupported, + .mkdir = fs_mkdir_unsupported, + }, +#endif { .fstype = FS_TYPE_ANY, .name = "unsupported", diff --git a/fs/semihostingfs.c b/fs/semihostingfs.c new file mode 100644 index 0000000..96eb334 --- /dev/null +++ b/fs/semihostingfs.c @@ -0,0 +1,115 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022, Sean Anderson <sean.anderson@seco.com> + * Copyright (c) 2012, Google Inc. + */ + +#include <common.h> +#include <fs.h> +#include <malloc.h> +#include <os.h> +#include <semihosting.h> +#include <semihostingfs.h> + +int smh_fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info) +{ + /* + * Only accept a NULL struct blk_desc for the semihosting, which is when + * hostfs interface is used + */ + return !!rbdd; +} + +static int smh_fs_read_at(const char *filename, loff_t pos, void *buffer, + loff_t maxsize, loff_t *actread) +{ + long fd, size, ret; + + fd = smh_open(filename, MODE_READ | MODE_BINARY); + if (fd < 0) + return fd; + ret = smh_seek(fd, pos); + if (ret < 0) { + smh_close(fd); + return ret; + } + if (!maxsize) { + size = smh_flen(fd); + if (ret < 0) { + smh_close(fd); + return size; + } + + maxsize = size; + } + + size = smh_read(fd, buffer, maxsize); + smh_close(fd); + if (size < 0) + return size; + + *actread = size; + return 0; +} + +static int smh_fs_write_at(const char *filename, loff_t pos, void *buffer, + loff_t towrite, loff_t *actwrite) +{ + long fd, size, ret; + + fd = smh_open(filename, MODE_READ | MODE_BINARY | MODE_PLUS); + if (fd < 0) + return fd; + ret = smh_seek(fd, pos); + if (ret < 0) { + smh_close(fd); + return ret; + } + + ret = smh_write(fd, buffer, towrite, &size); + smh_close(fd); + *actwrite = size; + return ret; +} + +int smh_fs_size(const char *filename, loff_t *result) +{ + long fd, size; + + fd = smh_open(filename, MODE_READ | MODE_BINARY); + if (fd < 0) + return fd; + + size = smh_flen(fd); + smh_close(fd); + + if (size < 0) + return size; + + *result = size; + return 0; +} + +int smh_fs_read(const char *filename, void *buf, loff_t offset, loff_t len, + loff_t *actread) +{ + int ret; + + ret = smh_fs_read_at(filename, offset, buf, len, actread); + if (ret) + printf("** Unable to read file %s **\n", filename); + + return ret; +} + +int smh_fs_write(const char *filename, void *buf, loff_t offset, + loff_t len, loff_t *actwrite) +{ + int ret; + + ret = smh_fs_write_at(filename, offset, buf, len, actwrite); + if (ret) + printf("** Unable to write file %s **\n", filename); + + return ret; +} diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index c2f8fad..beb8bb9 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -20,6 +20,7 @@ */ #ifndef __ASSEMBLY__ +#include <event_internal.h> #include <fdtdec.h> #include <membuff.h> #include <linux/list.h> @@ -66,7 +67,7 @@ struct global_data { * @mem_clk: memory clock rate in Hz */ unsigned long mem_clk; -#if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) || defined(CONFIG_DM_VIDEO) +#if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO) /** * @fb_base: base address of frame buffer memory */ @@ -467,6 +468,12 @@ struct global_data { */ char *smbios_version; #endif +#if CONFIG_IS_ENABLED(EVENT) + /** + * @event_state: Points to the current state of events + */ + struct event_state event_state; +#endif }; #ifndef DO_DEPS_ONLY static_assert(sizeof(struct global_data) == GD_SIZE); @@ -532,6 +539,12 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #define gd_set_multi_dtb_fit(_dtb) #endif +#if CONFIG_IS_ENABLED(EVENT_DYNAMIC) +#define gd_event_state() ((struct event_state *)&gd->event_state) +#else +#define gd_event_state() NULL +#endif + /** * enum gd_flags - global data flags * diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h index 637de0c..1becc66 100644 --- a/include/asm-generic/u-boot.h +++ b/include/asm-generic/u-boot.h @@ -52,12 +52,6 @@ struct bd_info { unsigned short bi_ethspeed; /* Ethernet speed in Mbps */ unsigned long bi_intfreq; /* Internal Freq, in MHz */ unsigned long bi_busfreq; /* Bus Freq, in MHz */ -#if defined(CONFIG_CPM2) - unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */ - unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */ - unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */ - unsigned long bi_vco; /* VCO Out from PLL, in MHz */ -#endif #if defined(CONFIG_M68K) unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */ #endif diff --git a/include/clk-uclass.h b/include/clk-uclass.h index e44f1ca..65ebff9 100644 --- a/include/clk-uclass.h +++ b/include/clk-uclass.h @@ -32,7 +32,7 @@ struct clk_ops { int (*of_xlate)(struct clk *clock, struct ofnode_phandle_args *args); int (*request)(struct clk *clock); - int (*rfree)(struct clk *clock); + void (*rfree)(struct clk *clock); ulong (*round_rate)(struct clk *clk, ulong rate); ulong (*get_rate)(struct clk *clk); ulong (*set_rate)(struct clk *clk, ulong rate); @@ -81,11 +81,9 @@ int request(struct clk *clock); * rfree() - Free a previously requested clock. * @clock: The clock to free. * - * This is the implementation of the client clk_free() API. - * - * Return: 0 if OK, or a negative error code. + * Free any resources allocated in request(). */ -int rfree(struct clk *clock); +void rfree(struct clk *clock); /** * round_rate() - Adjust a rate to the exact rate a clock can provide. diff --git a/include/clk.h b/include/clk.h index 23e4d4e..76bb64b 100644 --- a/include/clk.h +++ b/include/clk.h @@ -414,9 +414,9 @@ int clk_request(struct udevice *dev, struct clk *clk); * @clk: A clock struct that was previously successfully requested by * clk_request/get_by_*(). * - * Return: 0 if OK, or a negative error code. + * Free resources allocated by clk_request() (or any clk_get_* function). */ -int clk_free(struct clk *clk); +void clk_free(struct clk *clk); /** * clk_get_rate() - Get current clock rate. @@ -562,9 +562,9 @@ static inline int clk_request(struct udevice *dev, struct clk *clk) return -ENOSYS; } -static inline int clk_free(struct clk *clk) +static inline void clk_free(struct clk *clk) { - return 0; + return; } static inline ulong clk_get_rate(struct clk *clk) diff --git a/include/config_uncmd_spl.h b/include/config_uncmd_spl.h index af7e3e4..a59b9bb 100644 --- a/include/config_uncmd_spl.h +++ b/include/config_uncmd_spl.h @@ -13,7 +13,6 @@ #ifndef CONFIG_SPL_DM #undef CONFIG_DM_SERIAL #undef CONFIG_DM_I2C -#undef CONFIG_DM_SPI #endif #undef CONFIG_DM_STDIO diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h index 3b4d1fd..9b4f5fc 100644 --- a/include/configs/10m50_devboard.h +++ b/include/configs/10m50_devboard.h @@ -23,15 +23,8 @@ #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* - * NET options - */ -#define CONFIG_SYS_RX_ETH_BUFFER 0 -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -/* * BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * MEMORY ORGANIZATION @@ -43,8 +36,5 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM #define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_SDRAM_SIZE - \ - CONFIG_SYS_MONITOR_LEN) #endif /* __CONFIG_H */ diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h index 763cb8d..9db0f0e 100644 --- a/include/configs/3c120_devboard.h +++ b/include/configs/3c120_devboard.h @@ -23,17 +23,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* - * NET options - */ -#define CONFIG_SYS_RX_ETH_BUFFER 0 -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * MEMORY ORGANIZATION * -Monitor at top of sdram. * -The heap is placed below the monitor @@ -43,8 +32,5 @@ #define CONFIG_SYS_SDRAM_SIZE 0x08000000 #define CONFIG_MONITOR_IS_IN_RAM #define CONFIG_SYS_MONITOR_LEN 0x80000 /* Reserve 512k */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_SDRAM_SIZE - \ - CONFIG_SYS_MONITOR_LEN) #endif /* __CONFIG_H */ diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index e6f4255..275fb56 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -18,25 +18,14 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_HAS_ETH1 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -/* Timer */ -#define CONFIG_MCFTMR - /* I2C */ #ifdef CONFIG_MCFFEC @@ -92,7 +81,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x80010000 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index 9f4c3af..13743da 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -22,37 +22,21 @@ #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -/* Timer */ -#define CONFIG_MCFTMR - /* I2C */ #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) #define CONFIG_SYS_I2C_PINMUX_SET (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA) /* this must be included AFTER the definition of CONFIG COMMANDS (if any) */ -#define CONFIG_BOOTFILE "u-boot.bin" #ifdef CONFIG_MCFFEC # define CONFIG_IPADDR 192.162.1.2 # define CONFIG_NETMASK 255.255.255.0 @@ -102,7 +86,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 @@ -121,7 +104,7 @@ */ #ifdef CONFIG_SYS_FLASH_CFI # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */ -#ifdef NORFLASH_PS32BIT +#ifdef CONFIG_NORFLASH_PS32BIT # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT #else # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT @@ -168,7 +151,7 @@ * CS6 - Available * CS7 - Available */ -#ifdef NORFLASH_PS32BIT +#ifdef CONFIG_NORFLASH_PS32BIT # define CONFIG_SYS_CS0_BASE 0xFFC00000 # define CONFIG_SYS_CS0_MASK 0x003f0001 # define CONFIG_SYS_CS0_CTRL 0x00001D00 diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index 3267149..f68eb97 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -17,18 +17,12 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCFTMR #define CONFIG_SYS_UART_PORT (0) #undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */ /* - * BOOTP options - */ -#undef CONFIG_BOOTP_BOOTFILESIZE - -/* * Clock configuration: enable only one of the following options */ @@ -70,8 +64,6 @@ #define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */ #endif -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) - #define CONFIG_SYS_MONITOR_LEN 0x20000 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index c27f0a5..b7fdd71 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -8,8 +8,6 @@ #include <linux/stringify.h> -#define CONFIG_MCFTMR - #define CONFIG_SYS_UART_PORT (0) @@ -93,12 +91,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -#ifdef CONFIG_MONITOR_IS_IN_RAM -# define CONFIG_SYS_MONITOR_BASE 0x20000 -#else -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif - #define CONFIG_SYS_MONITOR_LEN 0x40000 #define CONFIG_SYS_BOOTPARAMS_LEN (64*1024) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index df89a0f..b891868 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -16,7 +16,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCFTMR #define CONFIG_SYS_UART_PORT (0) @@ -32,24 +31,12 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif @@ -101,12 +88,6 @@ #define CONFIG_SYS_SDRAM_SIZE 4 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 -#ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_BASE 0x20000 -#else -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif - #define CONFIG_SYS_MONITOR_LEN 0x20000 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index 7926ed4..68e3c89 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -21,8 +21,6 @@ * (easy to change) */ -#define CONFIG_MCFTMR - #define CONFIG_SYS_UART_PORT (0) /* Configuration for environment @@ -33,27 +31,14 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Available command configuration */ #ifdef CONFIG_MCFFEC -#define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY -#define CONFIG_SYS_RX_ETH_BUFFER 8 -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_HAS_ETH1 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ #ifndef CONFIG_SYS_DISCOVER_PHY #define FECDUPLEX FULL #define FECSPEED _100BASET -#else -#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#endif #endif #endif @@ -63,7 +48,6 @@ #define CONFIG_SYS_I2C_PINMUX_SET (0x000F) #ifdef CONFIG_MCFFEC -# define CONFIG_NET_RETRY_COUNT 5 # define CONFIG_OVERWRITE_ETHADDR_ONCE #endif /* FEC_ENET */ @@ -106,12 +90,6 @@ #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -#ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_BASE 0x20000 -#else -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif - #define CONFIG_SYS_MONITOR_LEN 0x20000 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index df95eea..b6e569d 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -16,7 +16,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_MCFTMR #define CONFIG_SYS_UART_PORT (0) @@ -30,24 +29,12 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text*); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif @@ -104,14 +91,6 @@ #define CONFIG_SYS_INT_FLASH_BASE 0xf0000000 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 -/* If M5282 port is fully implemented the monitor base will be behind - * the vector table. */ -#if (CONFIG_SYS_TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE) -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#else -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */ -#endif - #define CONFIG_SYS_MONITOR_LEN 0x20000 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index ec70186..34b5ceb 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -25,33 +25,20 @@ #define CONFIG_SYS_UNIFY_CACHE #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 # define CONFIG_SYS_TX_ETH_BUFFER 8 # define CONFIG_SYS_FEC_BUF_USE_SRAM -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_HAS_ETH1 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -#define CONFIG_MCFRTC -#undef RTC_DEBUG #define CONFIG_SYS_RTC_CNT (0x8000) #define CONFIG_SYS_RTC_SETUP (RTC_OCEN_OSCBYP | RTC_OCEN_CLKEN) -/* Timer */ -#define CONFIG_MCFTMR - /* I2C */ #ifdef CONFIG_MCFFEC @@ -108,7 +95,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x80010000 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000 -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 865d23c..673b0dc 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -25,27 +25,14 @@ #define CONFIG_SYS_UNIFY_CACHE #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -#define CONFIG_MCFRTC -#undef RTC_DEBUG - -/* Timer */ -#define CONFIG_MCFTMR - /* I2C */ #ifdef CONFIG_MCFFEC @@ -104,7 +91,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x40010000 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 @@ -126,7 +112,7 @@ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif -#ifdef CONFIG_NANDFLASH_SIZE +#ifdef CONFIG_CMD_NAND # define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 @@ -178,9 +164,9 @@ #define CONFIG_SYS_CS1_MASK 0x001f0001 #define CONFIG_SYS_CS1_CTRL 0x002A3780 -#ifdef CONFIG_NANDFLASH_SIZE +#ifdef CONFIG_CMD_NAND #define CONFIG_SYS_CS2_BASE 0x20000000 -#define CONFIG_SYS_CS2_MASK ((CONFIG_NANDFLASH_SIZE << 20) | 1) +#define CONFIG_SYS_CS2_MASK (16 << 20) #define CONFIG_SYS_CS2_CTRL 0x00001f60 #endif diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index ca13c8c..4c9fc43 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -27,27 +27,14 @@ #define CONFIG_SYS_UNIFY_CACHE #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif -#define CONFIG_MCFRTC -#undef RTC_DEBUG - -/* Timer */ -#define CONFIG_MCFTMR - /* I2C */ #ifdef CONFIG_MCFFEC @@ -106,7 +93,6 @@ #define CONFIG_SYS_SDRAM_EMOD 0x40010000 #define CONFIG_SYS_SDRAM_MODE 0x018D0000 -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 @@ -128,13 +114,11 @@ # define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ #endif -#ifdef CONFIG_NANDFLASH_SIZE # define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_BASE CONFIG_SYS_CS2_BASE # define CONFIG_SYS_NAND_SIZE 1 # define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } # define NAND_ALLOW_ERASE_ALL 1 -#endif #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE @@ -180,10 +164,8 @@ #define CONFIG_SYS_CS1_MASK 0x001f0001 #define CONFIG_SYS_CS1_CTRL 0x002A3780 -#ifdef CONFIG_NANDFLASH_SIZE #define CONFIG_SYS_CS2_BASE 0x20000000 -#define CONFIG_SYS_CS2_MASK ((CONFIG_NANDFLASH_SIZE << 20) | 1) +#define CONFIG_SYS_CS2_MASK (16 << 20) #define CONFIG_SYS_CS2_CTRL 0x00001f60 -#endif #endif /* _M5373EVB_H */ diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h index 4a26ae8..01b33c7 100644 --- a/include/configs/MCR3000.h +++ b/include/configs/MCR3000.h @@ -80,7 +80,6 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) #define CONFIG_SYS_MONITOR_LEN (320 << 10) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Environment Configuration */ @@ -88,7 +87,6 @@ /* Ethernet configuration part */ #define CONFIG_SYS_DISCOVER_PHY 1 -#define CONFIG_MII_INIT 1 /* NAND configuration part */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 538d9c2..4c4d2c0 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -13,7 +13,6 @@ /* * High Level Configuration Options */ -#define CONFIG_E300 1 /* E300 family */ #define CONFIG_HWCONFIG @@ -127,7 +126,6 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_RAMBOOT @@ -250,7 +248,6 @@ #define CONFIG_TSEC1 #ifdef CONFIG_TSEC1 -#define CONFIG_HAS_ETH0 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_SYS_TSEC1_OFFSET 0x24000 #define TSEC1_PHY_ADDR 2 @@ -259,17 +256,12 @@ #endif #ifdef CONFIG_TSEC2 -#define CONFIG_HAS_ETH1 #define CONFIG_TSEC2_NAME "TSEC1" #define CONFIG_SYS_TSEC2_OFFSET 0x25000 #define TSEC2_PHY_ADDR 0x1c #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) #define TSEC2_PHYIDX 0 #endif - -/* Options are: TSEC[0-1] */ -#define CONFIG_ETHPRIME "TSEC0" - #endif /* @@ -295,11 +287,6 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR @@ -329,7 +316,6 @@ #define CONFIG_HOSTNAME "mpc837x_rdb" #define CONFIG_ROOTPATH "/nfsroot" #define CONFIG_RAMDISKFILE "rootfs.ext2.gz.uboot" -#define CONFIG_BOOTFILE "uImage" /* U-Boot image on TFTP server */ #define CONFIG_UBOOTPATH "u-boot.bin" #define CONFIG_FDTFILE "mpc8379_rdb.dtb" diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h deleted file mode 100644 index 57097b1..0000000 --- a/include/configs/MPC8540ADS.h +++ /dev/null @@ -1,303 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2004, 2011 Freescale Semiconductor. - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <X.Xiao@motorola.com> - */ - -/* - * mpc8540ads board configuration file - * - * Please refer to doc/README.mpc85xx for more info. - * - * Make sure you change the MAC address and other network params first, - * search for CONFIG_SERVERIP, etc in this file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * default CCARBAR is at 0xff700000 - * assume U-Boot is less than 0.5MB - */ - -#ifndef CONFIG_HAS_FEC -#define CONFIG_HAS_FEC 1 /* 8540 has FEC */ -#endif - -/* - * sysclk for MPC85xx - * - * Two valid values are: - * 33000000 - * 66000000 - * - * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz - * is likely the desired value here, so that is now the default. - * The board, however, can run at 66MHz. In any event, this value - * must match the settings of some switches. Details can be found - * in the README.mpc85xxads. - * - * XXX -- Can't we run at 66 MHz, anyway? PCI should drop to - * 33MHz to accommodate, based on a PCI pin. - * Note that PCI-X won't work at 33MHz. - */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 128 /* DDR is 128MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002 -#define CONFIG_SYS_DDR_TIMING_1 0x37344321 -#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ -#define CONFIG_SYS_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */ -#define CONFIG_SYS_DDR_INTERVAL 0x05200100 /* autocharge,no open page */ - -/* - * SDRAM on the Local Bus - */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ - -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* - * Local Bus Definitions - */ - -/* - * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. - * - * For BR2, need: - * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 - * port-size = 32-bits = BR2[19:20] = 11 - * no parity checking = BR2[21:22] = 00 - * SDRAM for MSEL = BR2[24:26] = 011 - * Valid = BR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. - */ - -/* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. - * - * For OR2, need: - * 64MB mask for AM, OR2[0:7] = 1111 1100 - * XAM, OR2[17:18] = 11 - * 9 columns OR2[19-21] = 010 - * 13 rows OR2[23-25] = 100 - * EAD set for extra time OR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 - */ - -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ - -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \ - | LSDMR_RFCR5 \ - | LSDMR_PRETOACT3 \ - | LSDMR_ACTTORW3 \ - | LSDMR_BL8 \ - | LSDMR_WRC2 \ - | LSDMR_CL3 \ - | LSDMR_RFEN \ - ) - -/* - * SDRAM Controller configuration sequence. - */ -#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL) -#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) -#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) - -/* - * 32KB, 8-bit wide for ADS config reg - */ -#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ - -/* Serial Port */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK get_bus_freq(0) - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) - -/* - * I2C - */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 -#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ - -#if defined(CONFIG_PCI) - -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ -#endif - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -#endif /* CONFIG_PCI */ - -#if defined(CONFIG_TSEC_ENET) - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -#if CONFIG_HAS_FEC -#define CONFIG_MPC85XX_FEC 1 -#define CONFIG_MPC85XX_FEC_NAME "FEC" -#define FEC_PHY_ADDR 3 -#define FEC_PHYIDX 0 -#define FEC_FLAGS 0 -#endif - -/* Options are: TSEC[0-1], FEC */ -#define CONFIG_ETHPRIME "TSEC0" - -#endif /* CONFIG_TSEC_ENET */ - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* - * Miscellaneous configurable options - */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* - * Environment Configuration - */ - -/* The mac addresses for all ethernet interface */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#endif - -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "your.uImage" - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyS0\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=your.fdt.dtb\0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index e16d870..3467a51 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -30,7 +30,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ /* * Only possible on E500 Version 2 or newer cores. @@ -49,7 +48,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ @@ -138,8 +136,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_HWCONFIG /* enable hwconfig */ @@ -326,14 +322,6 @@ #endif #define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */ -#ifdef CONFIG_LEGACY -#define BRIDGE_ID 17 -#define VIA_ID 2 -#else -#define BRIDGE_ID 28 -#define VIA_ID 4 -#endif - #if defined(CONFIG_PCI) #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ #endif /* CONFIG_PCI */ @@ -363,9 +351,6 @@ #define TSEC2_FLAGS TSEC_GIGABIT #define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) #define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) - -/* Options are: eTSEC[0-3] */ -#define CONFIG_ETHPRIME "eTSEC0" #endif /* CONFIG_TSEC_ENET */ /* @@ -376,11 +361,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * Miscellaneous configurable options */ @@ -395,18 +375,11 @@ /* * Environment Configuration */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#define CONFIG_HAS_ETH3 -#endif #define CONFIG_IPADDR 192.168.1.253 #define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "8548cds/uImage.uboot" #define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */ #define CONFIG_SERVERIP 192.168.1.1 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h deleted file mode 100644 index d23cf0e..0000000 --- a/include/configs/MPC8560ADS.h +++ /dev/null @@ -1,292 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2004, 2011 Freescale Semiconductor. - * (C) Copyright 2002,2003 Motorola,Inc. - * Xianghua Xiao <X.Xiao@motorola.com> - */ - -/* - * mpc8560ads board configuration file - * - * Please refer to doc/README.mpc85xx for more info. - * - * Make sure you change the MAC address and other network params first, - * search for CONFIG_SERVERIP, etc. in this file. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include <linux/delay.h> - -/* High Level Configuration Options */ -#define CONFIG_CPM2 1 /* has CPM2 */ - -/* - * default CCARBAR is at 0xff700000 - * assume U-Boot is less than 0.5MB - */ - -#define CONFIG_RESET_PHY_R 1 /* Call reset_phy() */ - -/* - * sysclk for MPC85xx - * - * Two valid values are: - * 33000000 - * 66000000 - * - * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz - * is likely the desired value here, so that is now the default. - * The board, however, can run at 66MHz. In any event, this value - * must match the settings of some switches. Details can be found - * in the README.mpc85xxads. - */ - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ - -#define CONFIG_SYS_CCSRBAR 0xe0000000 -#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR - -/* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ - -#define CONFIG_MEM_INIT_VALUE 0xDeadBeef - -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) - -/* I2C addresses of SPD EEPROMs */ -#define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ - -/* These are used when DDR doesn't use SPD. */ -#define CONFIG_SYS_SDRAM_SIZE 128 /* DDR is 128MB */ -#define CONFIG_SYS_DDR_CS0_BNDS 0x00000007 /* 0-128MB */ -#define CONFIG_SYS_DDR_CS0_CONFIG 0x80000002 -#define CONFIG_SYS_DDR_TIMING_1 0x37344321 -#define CONFIG_SYS_DDR_TIMING_2 0x00000800 /* P9-45,may need tuning */ -#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ -#define CONFIG_SYS_DDR_MODE 0x00000062 /* DLL,normal,seq,4/2.5 */ -#define CONFIG_SYS_DDR_INTERVAL 0x05200100 /* autocharge,no open page */ - -/* - * SDRAM on the Local Bus - */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ - -#define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH 16M */ - -#define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ -#undef CONFIG_SYS_FLASH_CHECKSUM -#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - -#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) -#define CONFIG_SYS_RAMBOOT -#else -#undef CONFIG_SYS_RAMBOOT -#endif - -#define CONFIG_SYS_FLASH_EMPTY_INFO - -/* - * Local Bus Definitions - */ - -/* - * Base Register 2 and Option Register 2 configure SDRAM. - * The SDRAM base address, CONFIG_SYS_LBC_SDRAM_BASE, is 0xf0000000. - * - * For BR2, need: - * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0 - * port-size = 32-bits = BR2[19:20] = 11 - * no parity checking = BR2[21:22] = 00 - * SDRAM for MSEL = BR2[24:26] = 011 - * Valid = BR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. - */ - -/* - * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. - * - * For OR2, need: - * 64MB mask for AM, OR2[0:7] = 1111 1100 - * XAM, OR2[17:18] = 11 - * 9 columns OR2[19-21] = 010 - * 13 rows OR2[23-25] = 100 - * EAD set for extra time OR[31] = 1 - * - * 0 4 8 12 16 20 24 28 - * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901 - */ - -#define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ -#define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ -#define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ -#define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer prescal*/ - -#define CONFIG_SYS_LBC_LSDMR_COMMON ( LSDMR_BSMA1516 \ - | LSDMR_RFCR5 \ - | LSDMR_PRETOACT3 \ - | LSDMR_ACTTORW3 \ - | LSDMR_BL8 \ - | LSDMR_WRC2 \ - | LSDMR_CL3 \ - | LSDMR_RFEN \ - ) - -/* - * SDRAM Controller configuration sequence. - */ -#define CONFIG_SYS_LBC_LSDMR_1 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_PCHALL) -#define CONFIG_SYS_LBC_LSDMR_2 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_3 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_ARFRSH) -#define CONFIG_SYS_LBC_LSDMR_4 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_MRW) -#define CONFIG_SYS_LBC_LSDMR_5 (CONFIG_SYS_LBC_LSDMR_COMMON | LSDMR_OP_NORMAL) - -/* - * 32KB, 8-bit wide for ADS config reg - */ -#define CONFIG_SYS_BCSR (CONFIG_SYS_BR4_PRELIM & 0xffff8000) - -#define CONFIG_SYS_INIT_RAM_LOCK 1 -#define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in RAM */ - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */ - -/* Serial Port */ -#define CONFIG_CONS_ON_SCC /* define if console on SCC */ - -#define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} - -/* - * I2C - */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } - -/* RapidIO MMU */ -#define CONFIG_SYS_RIO_MEM_VIRT 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_BUS 0xc0000000 /* base address */ -#define CONFIG_SYS_RIO_MEM_PHYS 0xc0000000 -#define CONFIG_SYS_RIO_MEM_SIZE 0x20000000 /* 128M */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ -#define CONFIG_SYS_PCI1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCI1_MEM_BUS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_PHYS 0x80000000 -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCI1_IO_VIRT 0xe2000000 -#define CONFIG_SYS_PCI1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCI1_IO_PHYS 0xe2000000 -#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ - -#if defined(CONFIG_PCI) - -#if !defined(CONFIG_PCI_PNP) - #define PCI_ENET0_IOADDR 0xe0000000 - #define PCI_ENET0_MEMADDR 0xe0000000 - #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */ -#endif - -#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_TSEC_ENET - -#define CONFIG_TSEC1 1 -#define CONFIG_TSEC1_NAME "TSEC0" -#define CONFIG_TSEC2 1 -#define CONFIG_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 -#define TSEC2_PHY_ADDR 1 -#define TSEC1_PHYIDX 0 -#define TSEC2_PHYIDX 0 -#define TSEC1_FLAGS TSEC_GIGABIT -#define TSEC2_FLAGS TSEC_GIGABIT - -/* Options are: TSEC[0-1] */ -#define CONFIG_ETHPRIME "TSEC0" - -#endif /* CONFIG_TSEC_ENET */ - -/* - * Environment - */ - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* - * Miscellaneous configurable options - */ - -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -/* - * Environment Configuration - */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#define CONFIG_HAS_ETH3 -#endif - -#define CONFIG_IPADDR 192.168.1.253 - -#define CONFIG_HOSTNAME "unknown" -#define CONFIG_ROOTPATH "/nfsroot" -#define CONFIG_BOOTFILE "your.uImage" - -#define CONFIG_SERVERIP 192.168.1.1 -#define CONFIG_GATEWAYIP 192.168.1.1 -#define CONFIG_NETMASK 255.255.255.0 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "consoledev=ttyCPM\0" \ - "ramdiskaddr=1000000\0" \ - "ramdiskfile=your.ramdisk.u-boot\0" \ - "fdtaddr=400000\0" \ - "fdtfile=mpc8560ads.dtb\0" - -#endif /* __CONFIG_H */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 106d1e6..3826f41 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -97,14 +97,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MONITOR_BASE 0xD0001000 -#elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - /* High Level Configuration Options */ #if defined(CONFIG_PCI) @@ -151,7 +143,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -171,7 +162,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* DDR3 Controller Settings */ #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f @@ -413,12 +403,6 @@ extern unsigned long get_sdram_size(void); #undef CONFIG_SYS_RAMBOOT #endif -#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 -#if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) -#define CONFIG_A003399_NOR_WORKAROUND -#endif -#endif - #define CONFIG_SYS_INIT_RAM_LOCK #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* stack in RAM */ #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* End of used area in RAM */ @@ -528,8 +512,6 @@ extern unsigned long get_sdram_size(void); #define TSEC2_PHYIDX 0 #define TSEC3_PHYIDX 0 -#define CONFIG_ETHPRIME "eTSEC1" - /* TBI PHY configuration for SGMII mode */ #define CONFIG_TSEC_TBICR_SETTINGS ( \ TBICR_PHY_RESET \ @@ -606,14 +588,7 @@ extern unsigned long get_sdram_size(void); * Environment Configuration */ -#if defined(CONFIG_TSEC_ENET) -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 -#endif - #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin/* U-Boot image on TFTP server */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -643,10 +618,10 @@ extern unsigned long get_sdram_size(void); "ext2load usb 0:4 $fdtaddr $fdtfile;" \ "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;" \ "bootm $loadaddr $ramdiskaddr $fdtaddr\0" \ - CONFIG_BOOTMODE + BOOTMODE #if defined(CONFIG_TARGET_P1010RDB_PA) -#define CONFIG_BOOTMODE \ +#define BOOTMODE \ "boot_bank0=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \ "mw.b ffb00011 0; mw.b ffb00009 0; reset\0" \ "boot_bank1=i2c dev 0; i2c mw 18 1 f1; i2c mw 18 3 f0;" \ @@ -655,7 +630,7 @@ extern unsigned long get_sdram_size(void); "mw.b ffb00011 0; mw.b ffb00017 1; reset\0" #elif defined(CONFIG_TARGET_P1010RDB_PB) -#define CONFIG_BOOTMODE \ +#define BOOTMODE \ "boot_bank0=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \ "i2c mw 19 1 2; i2c mw 19 3 e1; reset\0" \ "boot_bank1=i2c dev 0; i2c mw 18 1 fe; i2c mw 18 3 0;" \ diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index e6d5321..adc2be8 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -56,9 +56,7 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -94,7 +92,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 @@ -146,8 +143,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #if defined(CONFIG_RAMBOOT_PBL) #define CONFIG_SYS_RAMBOOT #endif @@ -374,7 +369,6 @@ #define CONFIG_SYS_FM1_10GEC1_PHY_ADDR 0 #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_ETHPRIME "FM1@DTSEC1" #endif /* @@ -414,7 +408,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin #define __USB_PHY_TYPE utmi diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h index dbaffc6..8114373 100644 --- a/include/configs/SBx81LIFKW.h +++ b/include/configs/SBx81LIFKW.h @@ -46,7 +46,6 @@ #include <asm/arch/config.h> /* There is no PHY directly connected so don't ask it for link status */ -#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* * Ethernet Driver configuration diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h index bbd3ccc..b70829c 100644 --- a/include/configs/SBx81LIFXCAT.h +++ b/include/configs/SBx81LIFXCAT.h @@ -51,7 +51,6 @@ #include <asm/arch/config.h> /* There is no PHY directly connected so don't ask it for link status */ -#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* * Ethernet Driver configuration diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index d24cfce..2e7bb67 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -20,11 +20,6 @@ #define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -/* support deep sleep */ -#ifdef CONFIG_ARCH_T1024 -#define CONFIG_DEEP_SLEEP -#endif - #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_PAD_TO 0x40000 @@ -119,9 +114,7 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -153,7 +146,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -319,12 +311,6 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#endif - #if defined(CONFIG_RAMBOOT_PBL) #define CONFIG_SYS_RAMBOOT #endif @@ -368,19 +354,6 @@ #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -/* Video */ -#undef CONFIG_FSL_DIU_FB /* RDB doesn't support DIU */ -#ifdef CONFIG_FSL_DIU_FB -#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -/* - * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so - * disable empty flash sector detection, which is I/O-intensive. - */ -#undef CONFIG_SYS_FLASH_EMPTY_INFO -#endif - /* I2C */ #define I2C_PCA6408_BUS_NUM 1 @@ -505,10 +478,6 @@ #endif #endif -#ifdef CONFIG_FMAN_ENET -#define CONFIG_ETHPRIME "FM1@DTSEC4" -#endif - /* * Dynamic MTD Partition support with mtdparts */ @@ -535,25 +504,25 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi #ifdef CONFIG_ARCH_T1024 -#define CONFIG_BOARDNAME t1024rdb -#define BANK_INTLV cs0_cs1 +#define ARCH_EXTRA_ENV_SETTINGS \ + "bank_intlv=cs0_cs1\0" \ + "ramdiskfile=t1024rdb/ramdisk.uboot\0" \ + "fdtfile=t1024rdb/t1024rdb.dtb\0" #else -#define CONFIG_BOARDNAME t1023rdb -#define BANK_INTLV null +#define ARCH_EXTRA_ENV_SETTINGS \ + "bank_intlv=null\0" \ + "ramdiskfile=t1023rdb/ramdisk.uboot\0" \ + "fdtfile=t1023rdb/t1023rdb.dtb\0" #endif #define CONFIG_EXTRA_ENV_SETTINGS \ + ARCH_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ - "bank_intlv=" __stringify(BANK_INTLV) "\0" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ - "ramdiskfile=" __stringify(CONFIG_BOARDNAME) "/ramdisk.uboot\0" \ - "fdtfile=" __stringify(CONFIG_BOARDNAME) "/" \ - __stringify(CONFIG_BOARDNAME) ".dtb\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ "bootargs=root=/dev/ram rw console=ttyS0,115200\0" \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 9433f14..57a7875 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -70,9 +70,6 @@ /* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -/* support deep sleep */ -#define CONFIG_DEEP_SLEEP - #ifndef CONFIG_RESET_VECTOR_ADDRESS #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif @@ -96,9 +93,7 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -133,7 +128,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 @@ -302,22 +296,10 @@ #define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - #if defined(CONFIG_RAMBOOT_PBL) #define CONFIG_SYS_RAMBOOT #endif -#ifdef CONFIG_SYS_FSL_ERRATUM_A008044 -#if defined(CONFIG_MTD_RAW_NAND) -#define CONFIG_A008044_WORKAROUND -#endif -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -354,19 +336,6 @@ #define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) #define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) -#if defined(CONFIG_TARGET_T1042RDB_PI) || defined(CONFIG_TARGET_T1042D4RDB) -/* Video */ -#define CONFIG_FSL_DIU_FB - -#ifdef CONFIG_FSL_DIU_FB -#define CONFIG_FSL_DIU_CH7301 -#define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x180000) -#define CONFIG_VIDEO_BMP_LOGO -#endif -#endif - -/* I2C */ - /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 #define I2C_MUX_CH_DEFAULT 0x8 @@ -523,8 +492,6 @@ #define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR 0x0c #endif #endif - -#define CONFIG_ETHPRIME "FM1@DTSEC4" #endif /* @@ -553,7 +520,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define __USB_PHY_TYPE utmi @@ -571,18 +537,11 @@ #define FDTFILE "t1042rdb/t1042d4rdb.dtb" #endif -#ifdef CONFIG_FSL_DIU_FB -#define DIU_ENVIRONMENT "video-mode=fslfb:1024x768-32@60,monitor=dvi" -#else -#define DIU_ENVIRONMENT -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:bank_intlv=cs0_cs1;" \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ "usb2:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ - "video-mode=" __stringify(DIU_ENVIRONMENT) "\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ "tftpflash=tftpboot $loadaddr $uboot && " \ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a41f9f0..1ff2a61 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -88,7 +88,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -118,7 +117,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -298,12 +296,6 @@ #define CONFIG_SYS_RAMBOOT #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -480,10 +472,6 @@ #define SGMII_CARD_PORT4_PHY_ADDR 0x1F #endif -#ifdef CONFIG_FMAN_ENET -#define CONFIG_ETHPRIME "FM1@DTSEC3" -#endif - /* * SATA */ @@ -539,7 +527,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 7165ba0..5cd987b 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -83,7 +83,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -113,7 +112,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 @@ -256,12 +254,6 @@ #define CONFIG_SYS_RAMBOOT #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -435,10 +427,6 @@ #define AQR113C_PHY_ADDR2 0x08 #endif -#ifdef CONFIG_FMAN_ENET -#define CONFIG_ETHPRIME "FM1@DTSEC3" -#endif - /* * SATA */ @@ -492,7 +480,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server */ #define __USB_PHY_TYPE utmi diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index daccd81..610e36e 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -65,7 +65,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -94,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 /* * IFC Definitions @@ -102,12 +100,6 @@ #define CONFIG_SYS_FLASH_BASE 0xe0000000 #define CONFIG_SYS_FLASH_BASE_PHYS (0xf00000000ull | CONFIG_SYS_FLASH_BASE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#endif - #define CONFIG_HWCONFIG /* define to use L1 as initial stack */ @@ -190,10 +182,6 @@ #define CONFIG_LBA48 #endif -#ifdef CONFIG_FMAN_ENET -#define CONFIG_ETHPRIME "FM1@DTSEC1" -#endif - /* * Environment */ @@ -216,7 +204,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #define HVBOOT \ @@ -475,10 +462,6 @@ #define CONFIG_LBA48 #endif -#ifdef CONFIG_FMAN_ENET -#define CONFIG_ETHPRIME "FM1@DTSEC1" -#endif - /* * USB */ diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h index cac7847..7dd2dc4 100644 --- a/include/configs/adp-ae3xx.h +++ b/include/configs/adp-ae3xx.h @@ -17,12 +17,6 @@ #define CONFIG_SKIP_TRUNOFF_WATCHDOG -#ifdef CONFIG_SKIP_LOWLEVEL_INIT -#ifdef CONFIG_OF_CONTROL -#undef CONFIG_OF_SEPARATE -#endif -#endif - /* * Timer */ @@ -158,7 +152,6 @@ #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index d05a4d0..3766081 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -19,12 +19,6 @@ #define CONFIG_MEM_REMAP #endif -#ifdef CONFIG_SKIP_LOWLEVEL_INIT -#ifdef CONFIG_OF_CONTROL -#undef CONFIG_OF_SEPARATE -#endif -#endif - /* * Timer */ @@ -274,7 +268,6 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ diff --git a/include/configs/alt.h b/include/configs/alt.h index 37b5800..acc416d 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -31,7 +31,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 9070845..748cbe3 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -196,38 +196,6 @@ #endif #endif /* !CONFIG_MTD_RAW_NAND */ -/* - * For NOR boot, we must set this to the start of where NOR is mapped - * in memory. - */ - -/* - * USB configuration. We enable MUSB support, both for host and for - * gadget. We set USB0 as peripheral and USB1 as host, based on the - * board schematic and physical port wired to each. Then for host we - * add mass storage support and for gadget we add both RNDIS ethernet - * and DFU. - */ -#define CONFIG_AM335X_USB0 -#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_HOST - -/* - * Disable MMC DM for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_MMC -#undef CONFIG_TIMER -#endif - -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USB_ETHER) -/* Remove other SPL modes. */ -/* disable host part of MUSB in SPL */ -/* disable EFI partitions and partition UUID support */ -#endif - /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD #define DFUARGS \ @@ -272,12 +240,6 @@ #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE 0x01000000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #endif /* NOR support */ -#ifdef CONFIG_DRIVER_TI_CPSW -#define CONFIG_CLOCK_SYNTHESIZER -#define CLK_SYNTHESIZER_I2C_ADDR 0x65 -#endif - #endif /* ! __CONFIG_AM335X_EVM_H */ diff --git a/include/configs/am335x_guardian.h b/include/configs/am335x_guardian.h index 10a95a1..608a22d 100644 --- a/include/configs/am335x_guardian.h +++ b/include/configs/am335x_guardian.h @@ -129,9 +129,4 @@ #endif /* CONFIG_MTD_RAW_NAND */ -#define CONFIG_AM335X_USB0 -#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_HOST - #endif /* ! __CONFIG_AM335X_GUARDIAN_H */ diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h index 5ed4eb3..4c8df57 100644 --- a/include/configs/am335x_shc.h +++ b/include/configs/am335x_shc.h @@ -24,16 +24,6 @@ #define CONFIG_HSMMC2_8BIT -#ifndef CONFIG_SHC_ICT -/* - * In builds other than ICT, reset to retry after timeout - * Define a timeout after which a stopped bootloader continues autoboot - * (only works with CONFIG_RESET_TO_RETRY) - */ -# define CONFIG_BOOT_RETRY_TIME 30 -# define CONFIG_RESET_TO_RETRY -#endif - #ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x80200000\0" \ @@ -158,16 +148,4 @@ /* PMIC support */ #define CONFIG_POWER_TPS65217 -/* SPL */ - -/* - * Disable MMC DM for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_MMC -#undef CONFIG_TIMER -#endif - -#define CONFIG_NET_RETRY_COUNT 10 #endif /* ! __CONFIG_AM335X_SHC_H */ diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 63805d3..b872ade 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -14,9 +14,6 @@ #include <configs/ti_omap3_common.h> -/* Ethernet */ -#define CONFIG_NET_RETRY_COUNT 10 - /* Board NAND Info. */ #ifdef CONFIG_MTD_RAW_NAND #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \ @@ -44,9 +41,6 @@ #endif /* CONFIG_MTD_RAW_NAND */ /* Environment information */ - -#define CONFIG_BOOTFILE "uImage" - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyS2,115200n8\0" \ @@ -117,9 +111,6 @@ #define CONFIG_SYS_FLASH_BASE NAND_BASE #endif -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ /* Defines for SPL */ diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 7bea61e..5057441 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -56,28 +56,6 @@ #define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 #endif -#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_GADGET) -#undef CONFIG_USB_DWC3_PHY_OMAP -#undef CONFIG_USB_DWC3_OMAP -#undef CONFIG_USB_DWC3 -#undef CONFIG_USB_DWC3_GADGET - -#undef CONFIG_USB_GADGET_DOWNLOAD -#undef CONFIG_USB_GADGET_VBUS_DRAW -#undef CONFIG_USB_GADGET_MANUFACTURER -#undef CONFIG_USB_GADGET_VENDOR_NUM -#undef CONFIG_USB_GADGET_PRODUCT_NUM -#undef CONFIG_USB_GADGET_DUALSPEED -#endif - -/* - * Disable MMC DM for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_TIMER -#endif - #ifndef CONFIG_SPL_BUILD /* USB Device Firmware Update support */ #define DFUARGS \ @@ -145,15 +123,8 @@ #endif -#ifndef CONFIG_SPL_BUILD -/* CPSW Ethernet */ -#define CONFIG_NET_RETRY_COUNT 10 -#endif - #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ -#define CONFIG_SYS_RX_ETH_BUFFER 64 - /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND /* NAND: device related configs */ diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index ff0498a..c36311e 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -45,7 +45,6 @@ #define CONFIG_HSMMC2_8BIT /* CPSW Ethernet */ -#define CONFIG_NET_RETRY_COUNT 10 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ /* diff --git a/include/configs/amcore.h b/include/configs/amcore.h index ae8aa35..898978e 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -10,7 +10,6 @@ #define CONFIG_HOSTNAME "AMCORE" -#define CONFIG_MCFTMR #define CONFIG_SYS_UART_PORT 0 #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -46,7 +45,6 @@ /* amcore design has flash data bytes wired swapped */ #define CONFIG_SYS_WRITE_SWAPPED_DATA /* reserve 128-4KB */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) #define CONFIG_SYS_MONITOR_LEN ((128 - 4) * 1024) #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) diff --git a/include/configs/ap121.h b/include/configs/ap121.h index 70cd2ee..e1c2e06 100644 --- a/include/configs/ap121.h +++ b/include/configs/ap121.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 200 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/ap143.h b/include/configs/ap143.h index 167cc47..37fc196 100644 --- a/include/configs/ap143.h +++ b/include/configs/ap143.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 325 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/ap152.h b/include/configs/ap152.h index 5bfca42..9f47633 100644 --- a/include/configs/ap152.h +++ b/include/configs/ap152.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 375 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h index 8a6f294..71a80f3 100644 --- a/include/configs/apalis-imx8x.h +++ b/include/configs/apalis-imx8x.h @@ -122,8 +122,6 @@ #define CONFIG_FEC_ENET_DEV 0 #define IMX_FEC_BASE 0x5b040000 #define CONFIG_FEC_MXC_PHYADDR 0x4 -#define CONFIG_ETHPRIME "eth0" -#define CONFIG_FEC_XCV_TYPE RGMII #define PHY_ANEG_TIMEOUT 20000 #endif /* __APALIS_IMX8X_H */ diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 5719264..da935f7 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -114,8 +114,4 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -/* Reserve top 1M for secure RAM */ -#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 -#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index bbdcab2..ea5711d 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -45,7 +45,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index e639737..611b6d7 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -21,8 +21,6 @@ #define CONSOLE_DEV "ttymxc0" #endif -#define CONFIG_FEC_XCV_TYPE RGMII - /* Framebuffer */ #define CONFIG_SYS_LDB_CLOCK 28341000 @@ -34,7 +32,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN @@ -415,8 +412,6 @@ HAB_EXTRA_SETTINGS \ EXTRA_ENV_BOARD_SETTINGS -#define CONFIG_ARP_TIMEOUT 200UL - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -443,7 +438,6 @@ /* Framebuffer */ /* check this console not needed, after test remove it */ #define CONFIG_IMX_VIDEO_SKIP -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX6_PWM_PER_CLK 66000000 diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h index d24ba2f..18e1e40 100644 --- a/include/configs/armadillo-800eva.h +++ b/include/configs/armadillo-800eva.h @@ -45,7 +45,6 @@ #define CONFIG_SYS_SDRAM_BASE (ARMADILLO_800EVA_SDRAM_BASE) #define CONFIG_SYS_SDRAM_SIZE (ARMADILLO_800EVA_SDRAM_SIZE) -#define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) @@ -68,7 +67,6 @@ #define CONFIG_SH_ETHER_BASE_ADDR 0xe9a00000 #define CONFIG_SH_ETHER_SH7734_MII (0x01) #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ #define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk() diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 96526e1..0954bc0 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -33,9 +33,4 @@ * NS16550 Configuration */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #endif /* __AST_COMMON_CONFIG_H */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 4f6fb41..9d1203f 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -51,12 +51,6 @@ #define ENABLE_JFFS 1 #endif -#define CONFIG_MCFRTC -#undef RTC_DEBUG - -/* Timer */ -#define CONFIG_MCFTMR - /* I2C */ /* @@ -207,12 +201,6 @@ #define CONFIG_SYS_FLASH_BASE 0x00000000 -#ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#else -/* This is mainly used during relocation in start.S */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h index b93c67b..669a8ec 100644 --- a/include/configs/at91-sama5_common.h +++ b/include/configs/at91-sama5_common.h @@ -15,11 +15,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_SD_BOOT #else diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index c9344e8..f5cc0b2 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -27,23 +27,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ -/* Define actual evaluation board type from used processor type */ -#ifdef CONFIG_AT91SAM9G20 -# define CONFIG_AT91SAM9G20EK /* It's an Atmel AT91SAM9G20 EK */ -#else -# define CONFIG_AT91SAM9260EK /* It's an Atmel AT91SAM9260 EK */ -#endif - -/* Misc CPU related */ - -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 - /* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. @@ -84,16 +67,4 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#ifdef CONFIG_SYS_USE_DATAFLASH_CS0 - -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ -#elif defined(CONFIG_SYS_USE_NANDFLASH) - -/* bootstrap + u-boot + env + linux in nandflash */ - -#else /* CONFIG_SYS_USE_MMC */ -/* bootstrap + u-boot + env + linux in mmc */ -/* For FAT system, most cases it should be in the reserved sector */ -#endif - #endif diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 7fce98f..55ddb38 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -14,35 +14,14 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ -#ifdef CONFIG_AT91SAM9G10 -#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/ -#else -#define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/ -#endif - #include <asm/hardware.h> -#define CONFIG_ATMEL_LEGACY - /* * Hardware drivers */ /* LCD */ #define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_LCD -#ifdef CONFIG_AT91SAM9261EK -#define CONFIG_ATMEL_LCD_BGR555 -#endif - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 @@ -71,8 +50,6 @@ #define DM9000_DATA (CONFIG_DM9000_BASE + 4) #define CONFIG_DM9000_USE_16BIT #define CONFIG_DM9000_NO_SROM -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R /* USB */ #define CONFIG_USB_ATMEL @@ -87,17 +64,4 @@ #endif #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#ifdef CONFIG_SYS_USE_DATAFLASH_CS0 - -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ - -#elif CONFIG_SYS_USE_DATAFLASH_CS3 - -/* bootstrap + u-boot + env + linux in dataflash on CS3 */ - -#else /* CONFIG_SYS_USE_NANDFLASH */ - -/* bootstrap + u-boot + env + linux in nandflash */ -#endif - #endif diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 485211c..b63cd4b 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -22,29 +22,12 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 -#ifndef CONFIG_SYS_USE_BOOT_NORFLASH -#else -#define CONFIG_SYS_USE_NORFLASH -#endif - /* * Hardware drivers */ -#define CONFIG_ATMEL_LEGACY /* LCD */ #define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO 1 -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO 1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_BGR555 1 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 @@ -60,7 +43,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MONITOR_SEC 1:0-3 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Address and size of Primary Environment Sector */ @@ -190,10 +172,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 #endif -/* Ethernet */ -#define CONFIG_RESET_PHY_R 1 -#define CONFIG_AT91_WANTS_COMMON_PHY - /* USB */ #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_PLLB @@ -203,13 +181,4 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#ifdef CONFIG_SYS_USE_DATAFLASH - -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ - -#elif CONFIG_SYS_USE_NANDFLASH - -/* bootstrap + u-boot + env + linux in nandflash */ -#endif - #endif diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 973e889..014a7c9 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -10,32 +10,14 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -#define CONFIG_AT91SAM9M10G45EK - /* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ /* LCD */ #define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_LCD -#define CONFIG_ATMEL_LCD_RGB565 -/* board specific(not enough SRAM) */ -#define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x70000000 @@ -58,10 +40,6 @@ #endif -/* Ethernet */ -#define CONFIG_RESET_PHY_R -#define CONFIG_AT91_WANTS_COMMON_PHY - #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ #elif CONFIG_SD_BOOT @@ -94,7 +72,6 @@ 56, 57, 58, 59, 60, 61, 62, 63, } #endif -#define CONFIG_SPL_ATMEL_SIZE #define CONFIG_SYS_MASTER_CLOCK 132096000 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 #define CONFIG_SYS_MCKR 0x1301 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index f102dbe..cd7c271 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -18,15 +18,6 @@ /* LCD */ #define LCD_BPP LCD_COLOR16 #define LCD_OUTPUT_BPP 24 -#define CONFIG_LCD_LOGO -#define CONFIG_LCD_INFO -#define CONFIG_LCD_INFO_BELOW_LOGO -#define CONFIG_ATMEL_LCD_RGB565 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 5bc47d6..e0aeae8 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -16,20 +16,12 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ -#define CONFIG_ATMEL_LEGACY - /* * Hardware drivers */ /* LCD */ #define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO 1 -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO 1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_RGB565 1 /* Let board_init_f handle the framebuffer allocation */ #undef CONFIG_FB_ADDR @@ -54,18 +46,4 @@ #endif -/* Ethernet - not present */ - -#ifdef CONFIG_SYS_USE_DATAFLASH - -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ - -#elif CONFIG_SYS_USE_NANDFLASH - -/* bootstrap + u-boot + env + linux in nandflash */ - -#else /* CONFIG_SYS_USE_MMC */ - -/* bootstrap + u-boot + env + linux in mmc */ -#endif #endif diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index e6d5b99..013c7cf 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -13,12 +13,6 @@ #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ /* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) @@ -60,14 +54,6 @@ #endif #endif -#ifdef CONFIG_NAND_BOOT -/* bootstrap + u-boot + env + linux in nandflash */ -#elif defined(CONFIG_SPI_BOOT) -/* bootstrap + u-boot + env + linux in spi flash */ -#elif defined(CONFIG_SYS_USE_DATAFLASH) -/* bootstrap + u-boot + env + linux in data flash */ -#endif - /* SPL */ #define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h index 3903dcf..ba31402 100644 --- a/include/configs/ax25-ae350.h +++ b/include/configs/ax25-ae350.h @@ -82,7 +82,6 @@ #define PHYS_FLASH_1 0x88000000 /* BANK 0 */ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* TO for Flash Erase (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* TO for Flash Write (ms) */ diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h index c02d25c..cb400be 100644 --- a/include/configs/axs10x.h +++ b/include/configs/axs10x.h @@ -18,7 +18,6 @@ /* * Memory configuration */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -58,11 +57,6 @@ "; fi\0" /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/baltos.h b/include/configs/baltos.h index f4ab664..b881d8c 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -214,18 +214,6 @@ #endif #endif -/* - * USB configuration. We enable MUSB support, both for host and for - * gadget. We set USB0 as peripheral and USB1 as host, based on the - * board schematic and physical port wired to each. Then for host we - * add mass storage support and for gadget we add both RNDIS ethernet - * and DFU. - */ -#define CONFIG_AM335X_USB0 -#define CONFIG_AM335X_USB0_MODE MUSB_HOST -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_OTG - /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND #define GPMC_NAND_ECC_LP_x8_LAYOUT 1 diff --git a/include/configs/beacon-rzg2m.h b/include/configs/beacon-rzg2m.h index 7eaafb0..2713b15 100644 --- a/include/configs/beacon-rzg2m.h +++ b/include/configs/beacon-rzg2m.h @@ -8,9 +8,6 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h index e0508b0..762d198 100644 --- a/include/configs/bk4r1.h +++ b/include/configs/bk4r1.h @@ -34,12 +34,6 @@ /* Enable PREBOOT variable */ -/* Set ARP_TIMEOUT to 500ms */ -#define CONFIG_ARP_TIMEOUT 500UL - -/* Set ARP_TIMEOUT_COUNT to 3 repetitions */ -#define CONFIG_NET_RETRY_COUNT 5 - /* BK4r1 net init sets GPIO122/PTE17 to enable Ethernet */ #define BK4_NET_INIT "run set_gpio122;" diff --git a/include/configs/blanche.h b/include/configs/blanche.h index 2135ba7..4f8da59 100644 --- a/include/configs/blanche.h +++ b/include/configs/blanche.h @@ -29,7 +29,6 @@ #define CONFIG_SH_QSPI_BASE 0xE6B10000 #else #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BASE 0x00000000 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h index 0f63239..899a538 100644 --- a/include/configs/bmips_common.h +++ b/include/configs/bmips_common.h @@ -8,10 +8,6 @@ #include <linux/sizes.h> -/* ETH */ -#define CONFIG_PHY_RESET_DELAY 20 -#define CONFIG_SYS_RX_ETH_BUFFER 6 - /* UART */ #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ 230400, 500000, 1500000 } @@ -21,7 +17,4 @@ #define CONFIG_SYS_BOOTPARAMS_LEN SZ_128K #define CONFIG_SYS_CBSIZE SZ_512 -/* U-Boot */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #endif /* __CONFIG_BMIPS_COMMON_H */ diff --git a/include/configs/boston.h b/include/configs/boston.h index 347b178..3bf85b6 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -31,8 +31,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /* * Console */ diff --git a/include/configs/broadcom_bcm96753ref.h b/include/configs/broadcom_bcm96753ref.h new file mode 100644 index 0000000..c002985 --- /dev/null +++ b/include/configs/broadcom_bcm96753ref.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com> + */ + +#include <linux/sizes.h> + +/* + * common + */ + +/* UART */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ + 230400, 500000, 1500000 } +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 24 + +/* + * 6853 + */ + +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +/* U-Boot */ +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_16M) + +#ifdef CONFIG_MTD_RAW_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#endif /* CONFIG_MTD_RAW_NAND */ + +/* + * 96753ref + */ diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h index 7ab7f55..92f69ba 100644 --- a/include/configs/brppt2.h +++ b/include/configs/brppt2.h @@ -17,7 +17,6 @@ #define CONFIG_SYS_PL310_BASE L2_PL310_BASE #endif /* !CONFIG_SYS_L2CACHE_OFF */ -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK /* MMC */ @@ -88,9 +87,7 @@ BUR_COMMON_ENV \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) /* Ethernet */ -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_FIXED_SPEED _1000BASET -#define CONFIG_ARP_TIMEOUT 1500UL /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/bur_cfg_common.h b/include/configs/bur_cfg_common.h index 05915b4..6985011 100644 --- a/include/configs/bur_cfg_common.h +++ b/include/configs/bur_cfg_common.h @@ -23,11 +23,7 @@ "setcurs 1 10;lcdputs serverip; setcurs 10 10; lcdputs ${serverip};" \ "setenv stdout nc;setenv stdin nc;setenv stderr nc\0" -/* Network defines */ -#define CONFIG_NET_RETRY_COUNT 10 - /* Network console */ -#define CONFIG_BOOTP_MAY_FAIL /* if we don't have DHCP environment */ /* As stated above, the following choices are optional. */ diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h index 70689a6..58d7a3a 100644 --- a/include/configs/capricorn-common.h +++ b/include/configs/capricorn-common.h @@ -32,13 +32,9 @@ #define CONFIG_FACTORYSET -/* ENET Config */ -#define CONFIG_FEC_XCV_TYPE RMII - /* ENET1 connects to base board and MUX with ESAI */ #define CONFIG_FEC_ENET_DEV 1 #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_ETHPRIME "eth1" /* I2C Configuration */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/cei-tk1-som.h b/include/configs/cei-tk1-som.h index 2c406d3..1cc8609 100644 --- a/include/configs/cei-tk1-som.h +++ b/include/configs/cei-tk1-som.h @@ -28,8 +28,4 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -/* Reserve top 1M for secure RAM */ -#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 -#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index ce36b2e..bd5c072 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -136,7 +136,6 @@ /* Networking */ #define CONFIG_FEC_MXC_PHYADDR -1 -#define CONFIG_FEC_XCV_TYPE RGMII #define FEC_QUIRK_ENET_MAC #endif /* __CGTQMX8_H */ diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index fe49627..ad1cd86 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -125,20 +125,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 14 -/* NAND: SPL related configs */ - -/* USB configuration */ -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_HOST - -/* - * Disable MMC DM for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_MMC -#undef CONFIG_TIMER -#endif #if defined(CONFIG_ENV_IS_IN_NAND) #define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index 9d5a63c..e29be3f 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -15,9 +15,6 @@ #include <configs/x86-common.h> #include <configs/x86-chromebook.h> -/* We can rely on running natively, and this saves code size */ -#undef CONFIG_BIOSEMU - #undef CONFIG_STD_DEVICES_SETTINGS #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \ "stdout=vidconsole,serial\0" \ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 17954fe..ea9440d 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -20,8 +20,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* cached (KSEG0) address */ #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /* NS16550-ish UARTs */ #define CONFIG_SYS_NS16550_CLK 48000000 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index a5bf6cc..8af80f5 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -13,8 +13,6 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* Network */ -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 /* ENET1 */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index c19aaac..f836f92 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -147,11 +147,7 @@ /* Ethernet */ #define CONFIG_FEC_MXC_PHYADDR 0 -#define CONFIG_FEC_XCV_TYPE RGMII #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_ETHPRIME "FEC0" -#define CONFIG_ARP_TIMEOUT 200UL -#define CONFIG_NET_RETRY_COUNT 5 /* USB */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -175,8 +171,6 @@ /* Display */ #define CONFIG_IMX_HDMI -#define CONFIG_VIDEO_BMP_LOGO - /* EEPROM */ #endif /* __CONFIG_CM_FX6_H */ diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 2d09a6f..eb015e1 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -32,9 +32,6 @@ 42, 43, 44, 45, 46, 47, 48, 49, \ 50, 51, 52, 53, 54, 55, 56, 57, } -/* CPSW Ethernet support */ -#define CONFIG_SYS_RX_ETH_BUFFER 64 - /* Power */ #define CONFIG_POWER_TPS65218 diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 81315f6..1822ce5 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -32,9 +32,6 @@ #define CONFIG_SYS_CLK 66000000 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */ -/* Enable Dma Timer */ -#define CONFIG_MCFTMR - /* --- * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud @@ -88,24 +85,12 @@ . = DEFINED(env_offset) ? env_offset : .; \ env/embedded.o(.text); -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 # define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ # ifndef CONFIG_SYS_DISCOVER_PHY # define FECDUPLEX FULL # define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif # endif /* CONFIG_SYS_DISCOVER_PHY */ #endif @@ -204,12 +189,6 @@ enter a valid image address in flash */ #define CONFIG_SYS_FLASH_BASE 0xffe00000 -#ifdef CONFIG_MONITOR_IS_IN_RAM -#define CONFIG_SYS_MONITOR_BASE 0x20000 -#else -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif - #define CONFIG_SYS_MONITOR_LEN 0x20000 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 91f0f95..53bfab4 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -165,7 +165,6 @@ #if defined(CONFIG_DM_VIDEO) #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR -#define CONFIG_VIDEO_BMP_LOGO #endif #endif /* __COLIBRI_IMX6ULL_CONFIG_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 1dbc77d..0d1a1bc 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -35,7 +35,6 @@ #define CONFIG_USBD_HS /* Framebuffer and LCD */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 92e24ea..0382724 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -201,8 +201,4 @@ #define CONFIG_USBD_HS -#if defined(CONFIG_DM_VIDEO) -#define CONFIG_VIDEO_BMP_LOGO -#endif - #endif diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h index 975f745..99645f3 100644 --- a/include/configs/colibri_pxa270.h +++ b/include/configs/colibri_pxa270.h @@ -38,7 +38,6 @@ #ifdef CONFIG_LCD #define CONFIG_PXA_LCD #define CONFIG_PXA_VGA -#define CONFIG_LCD_LOGO #endif /* @@ -50,9 +49,6 @@ #define CONFIG_DM9000_BASE 0x08000000 #define DM9000_IO (CONFIG_DM9000_BASE) #define DM9000_DATA (CONFIG_DM9000_BASE + 4) -#define CONFIG_NET_RETRY_COUNT 10 - -#define CONFIG_BOOTP_BOOTFILESIZE #endif /* @@ -90,7 +86,6 @@ #define CONFIG_SYS_FLASH_UNLOCK_TOUT (25 * CONFIG_SYS_HZ) #endif -#define CONFIG_SYS_MONITOR_BASE 0x0 #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Skip factory configuration block */ diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index c377187..c45016a 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -15,9 +15,6 @@ #define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* LCD support */ -#define CONFIG_LCD_LOGO - /* NAND support */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h index 62f8518..2e7b640 100644 --- a/include/configs/colibri_vf.h +++ b/include/configs/colibri_vf.h @@ -14,14 +14,6 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#ifdef CONFIG_VIDEO_FSL_DCU_FB -#define CONFIG_VIDEO_BMP_LOGO -#define CONFIG_SYS_FSL_DCU_LE - -#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR -#define DCU_LAYER_MAX_NUM 64 -#endif - /* NAND support */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/condor.h b/include/configs/condor.h index 822ef71..213e68f 100644 --- a/include/configs/condor.h +++ b/include/configs/condor.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Environment compatibility */ /* SH Ether */ @@ -23,7 +20,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ /* XTAL_CLK : 33.33MHz */ diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 7fb96e8..a7d922c 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -27,11 +27,6 @@ #define CONFIG_PCI_SCAN_SHOW #endif -/* - * Software (bit-bang) MII driver configuration - */ -#define CONFIG_BITBANGMII_MULTI - /* SPL */ /* * Select the boot device here @@ -76,7 +71,6 @@ #define CONFIG_HOSTNAME "ccdc" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "ccdc.img" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth1\0" \ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index bd26412..3a939b0 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -57,9 +57,7 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif @@ -97,7 +95,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 @@ -144,8 +141,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #if defined(CONFIG_RAMBOOT_PBL) #define CONFIG_SYS_RAMBOOT #endif @@ -371,7 +366,6 @@ #define CONFIG_SYS_FM2_10GEC1_PHY_ADDR 0 #define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_ETHPRIME "FM1@DTSEC1" #endif /* @@ -411,7 +405,6 @@ * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #ifdef CONFIG_TARGET_P4080DS diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 27284f7..bb73201 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -23,31 +23,18 @@ * hex number here! */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - /* ARM asynchronous clock */ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ - /* serial console */ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS /* LED */ -#define CONFIG_AT91_LED #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */ #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 @@ -68,11 +55,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 #endif -/* Ethernet */ -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_AT91_WANTS_COMMON_PHY - /* DFU class support */ #define DFU_MANIFEST_POLL_TIMEOUT 25000 @@ -97,7 +79,6 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } -#define CONFIG_SPL_ATMEL_SIZE #define CONFIG_SYS_MASTER_CLOCK 132096000 #define AT91_PLL_LOCK_TIMEOUT 1000000 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 956a965..855711e 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -137,13 +137,6 @@ #define CONFIG_SYS_NAND_ECCBYTES 10 #endif -/* - * Network & Ethernet Configuration - */ -#ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_NET_RETRY_COUNT 10 -#endif - #ifdef CONFIG_MTD_NOR_FLASH #define CONFIG_SYS_FLASH_SECT_SZ (128 << 10) /* 128KB */ #define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE @@ -155,7 +148,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ @@ -184,10 +176,6 @@ "console=ttyS2,115200n8\0" \ "hwconfig=dsp:wake=yes" -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - /* USB Configs */ #define CONFIG_USB_OHCI_NEW #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index fcdf7e9..ad28fa0 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -22,11 +22,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_ENET_DEV 0 -#if (CONFIG_FEC_ENET_DEV == 0) -#define CONFIG_ETHPRIME "eth0" -#elif (CONFIG_FEC_ENET_DEV == 1) -#define CONFIG_ETHPRIME "eth1" -#endif #endif /* Environment settings */ diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 7baae3b..d6850bd 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -7,11 +7,6 @@ #define _CONFIG_DB_MV7846MP_GP_H /* - * High Level Configuration Options (easy to change) - */ -#define CONFIG_DB_784MP_GP /* Board target name for DDR training */ - -/* * TEXT_BASE needs to be below 16MiB, since this area is scrubbed * for DDR ECC byte filling in the SPL before loading the main * U-Boot into it. @@ -72,6 +67,5 @@ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SPD_EEPROM 0x4e -#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index f30958f..bc5282a 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -30,13 +30,6 @@ */ /* - * Ethernet - */ -#define CONFIG_RMII -#define CONFIG_LPC32XX_ETH -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN - -/* * NOR Flash */ #define CONFIG_SYS_MAX_FLASH_SECT 71 @@ -94,8 +87,6 @@ * U-Boot Commands */ -#define CONFIG_BOOTFILE "uImage" - /* * SPL specific defines */ diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 3059bc0..16b3650 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -35,7 +35,6 @@ /* Hardware drivers */ /* DM9000 */ -#define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x2c000000 #define DM9000_IO CONFIG_DM9000_BASE @@ -47,10 +46,6 @@ /* TWL4030 */ /* BOOTP/DHCP options */ -#define CONFIG_BOOTP_NISDOMAIN -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_TIMEOFFSET -#undef CONFIG_BOOTP_VENDOREX /* Environment information */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 72843c9..3d3fab5 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -32,10 +32,7 @@ /* FEC ethernet */ #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 7 -#define CONFIG_ARP_TIMEOUT 200UL /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 diff --git a/include/configs/display5.h b/include/configs/display5.h index 72526d9..7bd6533 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -33,12 +33,6 @@ * 0x1F00000 - 0x2000000 : SPI.factory (1MiB) */ -/* SPI Flash Configs */ -#if defined(CONFIG_SPL_BUILD) -#undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH -#endif - /* Below values are "dummy" - only to avoid build break */ #define CONFIG_SYS_SPI_KERNEL_OFFS 0x150000 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index 736c724..381a189 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -35,8 +35,5 @@ */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#ifdef CONFIG_RESET_PHY_R -#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ -#endif #endif /* _CONFIG_DOCKSTAR_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 711e37c..e16af88 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -55,9 +55,6 @@ /* Enhance our eMMC support / experience. */ #define CONFIG_HSMMC2_8BIT -/* CPSW Ethernet */ -#define CONFIG_NET_RETRY_COUNT 10 - /* * Default to using SPI for environment, etc. * 0x000000 - 0x040000 : QSPI.SPL (256KiB) @@ -101,7 +98,6 @@ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ #define CONFIG_SYS_FLASH_BASE (0x08000000) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Reduce SPL size by removing unlikey targets */ #endif /* NOR support */ diff --git a/include/configs/draak.h b/include/configs/draak.h index e3e2b6a..5bd8740 100644 --- a/include/configs/draak.h +++ b/include/configs/draak.h @@ -11,15 +11,11 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index 9f765fa..43a179f 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -30,9 +30,6 @@ * it has to be done after each HCD reset */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(MMC, mmc, 1) \ diff --git a/include/configs/dragonboard820c.h b/include/configs/dragonboard820c.h index e71dd24..229e1a3 100644 --- a/include/configs/dragonboard820c.h +++ b/include/configs/dragonboard820c.h @@ -26,9 +26,6 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 19000000 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifndef CONFIG_SPL_BUILD #include <config_distro_bootcmd.h> #endif diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index fd12a39..07e2b87 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -29,9 +29,6 @@ */ #define CONFIG_MVGBE_PORTS {1, 1} /* enable both ports */ #define CONFIG_PHY_BASE_ADR 0 -#ifdef CONFIG_RESET_PHY_R -#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ -#endif /* * SATA Driver configuration diff --git a/include/configs/eagle.h b/include/configs/eagle.h index b8a7b5a..42fe057 100644 --- a/include/configs/eagle.h +++ b/include/configs/eagle.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Environment compatibility */ /* Board Clock */ diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index 6ad8722..28bf35c 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -22,9 +22,6 @@ * Options * *----------------------------------------------------------------------*/ -#define CONFIG_BOOT_RETRY_TIME -1 -#define CONFIG_RESET_TO_RETRY - #define STATUS_LED_ACTIVE 0 /*----------------------------------------------------------------------* @@ -32,13 +29,6 @@ * Environment is in the second sector of the first 256k of flash * *----------------------------------------------------------------------*/ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -#define CONFIG_MCFTMR - #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE @@ -60,10 +50,7 @@ *----------------------------------------------------------------------*/ #ifdef CONFIG_MCFFEC -#define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY -#define CONFIG_SYS_RX_ETH_BUFFER 8 -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN #define CONFIG_OVERWRITE_ETHADDR_ONCE #endif diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h index 178b050..ce31a46 100644 --- a/include/configs/ebisu.h +++ b/include/configs/ebisu.h @@ -13,15 +13,11 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/edison.h b/include/configs/edison.h index 02f33f3..70cccc6 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -16,7 +16,6 @@ #define CONFIG_SYS_STACK_SIZE (32 * 1024) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* RTC */ diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index a599722..8e2c245 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -100,8 +100,6 @@ #define CONFIG_MVGBE_PORTS {1} /* enable port 0 only */ #define CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION /* don't randomize MAC */ #define CONFIG_PHY_BASE_ADR 0x8 -#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */ -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ #endif /* diff --git a/include/configs/efi-x86_app.h b/include/configs/efi-x86_app.h index 33afb7c..6061a6d 100644 --- a/include/configs/efi-x86_app.h +++ b/include/configs/efi-x86_app.h @@ -10,33 +10,8 @@ #undef CONFIG_TPM_TIS_BASE_ADDRESS -/* - * Select the output device: Put an 'x' prefix before one of these to disable it - */ - -/* - * Video output - can normally continue after exit_boot_services has been - * called, since output to the display does not require EFI services at that - * point. U-Boot sets up the console memory and does its own drawing. - */ #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ "stdout=vidconsole\0" \ "stderr=vidconsole\0" -/* - * Serial output with no console. Run qemu with: - * - * -display none -serial mon:stdio - * - * This will hang or fail to output on the console after exit_boot_services is - * called. - */ -#define xCONFIG_STD_DEVICES_SETTINGS "stdin=serial\0" \ - "stdout=serial\0" \ - "stderr=serial\0" - -#undef CONFIG_BOOTCOMMAND - -#define CONFIG_BOOTCOMMAND "part list efi 0; fatls efi 0:1" - #endif diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 279d712..bcd7b84 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -10,8 +10,6 @@ #include <linux/stringify.h> -#define CONFIG_BOARD_NAME EL6Q - #include "mx6_common.h" #ifdef CONFIG_SPL @@ -30,10 +28,8 @@ #define CONFIG_MXC_UART_BASE UART2_BASE -#define CONFIG_BOARD_NAME EL6Q - #define CONFIG_EXTRA_ENV_SETTINGS \ - "board="__stringify(CONFIG_BOARD_NAME)"\0" \ + "board=EL6Q\0" \ "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \ "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \ "console=" CONSOLE_DEV "\0" \ @@ -55,8 +51,6 @@ #include <config_distro_bootcmd.h> -#define CONFIG_ARP_TIMEOUT 200UL - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 8ac92e4..1bf564c 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -25,8 +25,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_ARP_TIMEOUT 200UL - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -52,7 +50,6 @@ #endif /* Framebuffer */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/emsdp.h b/include/configs/emsdp.h index 2ceefed..a560673 100644 --- a/include/configs/emsdp.h +++ b/include/configs/emsdp.h @@ -8,8 +8,6 @@ #include <linux/sizes.h> -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_SDRAM_BASE 0x10000000 #define CONFIG_SYS_SDRAM_SIZE SZ_16M @@ -18,7 +16,6 @@ /* * Environment */ -#define CONFIG_BOOTFILE "app.bin" #define CONFIG_EXTRA_ENV_SETTINGS \ "upgrade_image=u-boot.bin\0" \ diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 2495db9..d936b7f 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,8 +10,6 @@ #include <configs/exynos7420-common.h> -#define CONFIG_BOARD_COMMON - #define CONFIG_ESPRESSO7420 #define CONFIG_SYS_SDRAM_BASE 0x40000000 diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index d88c14a..3231f3c 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -54,8 +54,6 @@ /* JFFS2 */ /* Ethernet */ -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RMII #define CONFIG_PHY_ID 0 #define CONFIG_MACB_SEARCH_PHY @@ -105,7 +103,6 @@ /* DHCP/BOOTP options */ #ifdef CONFIG_CMD_DHCP -#define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_SYS_AUTOLOAD "n" #endif diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 52dcf7a..4202c62 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -12,8 +12,6 @@ #include "exynos-common.h" -#define CONFIG_BOARD_COMMON - /* SD/MMC configuration */ #define CONFIG_MMC_DEFAULT_DEV 0 diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 90d095d..7ab821d 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -56,32 +56,6 @@ #define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE)) #define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - -#define CONFIG_SECURE_BL1_ONLY - -/* Secure FW size configuration */ -#ifdef CONFIG_SECURE_BL1_ONLY -#define CONFIG_SEC_FW_SIZE (8 << 10) /* 8KB */ -#else -#define CONFIG_SEC_FW_SIZE 0 -#endif - -/* Configuration of BL1, BL2, ENV Blocks on mmc */ -#define CONFIG_RES_BLOCK_SIZE (512) -#define CONFIG_BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ -#define CONFIG_BL2_SIZE (512UL << 10UL) /* 512 KB */ - -#define CONFIG_BL1_OFFSET (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE) -#define CONFIG_BL2_OFFSET (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE) - -/* U-Boot copy size from boot Media to DRAM.*/ -#define BL2_START_OFFSET (CONFIG_BL2_OFFSET/512) -#define BL2_SIZE_BLOC_COUNT (CONFIG_BL2_SIZE/512) - -#define EXYNOS_COPY_SPI_FNPTR_ADDR 0x02020058 -#define SPI_FLASH_UBOOT_POS (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE) - /* SPI */ /* Ethernet Controllor Driver */ diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index 00b6778..bcbdfa7 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -21,8 +21,6 @@ #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING -#define CONFIG_BOARD_COMMON - /* Display */ #ifdef CONFIG_LCD #define CONFIG_EXYNOS_FB diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 7762c77..51f9f22 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -18,9 +18,6 @@ #define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024) -#define CONFIG_DEVICE_TREE_LIST "exynos5800-peach-pi" \ - "exynos5420-peach-pit exynos5420-smdk5420" - #define CONFIG_PHY_IRAM_BASE 0x02020000 /* Address for relocating helper code (Last 4 KB of IRAM) */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index 464f927..fcb238f 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -27,9 +27,6 @@ /* Timer input clock frequency */ #define COUNTER_FREQUENCY 24000000 -/* Device Tree */ -#define CONFIG_DEVICE_TREE_LIST "exynos7420-espresso7420" - /* IRAM Layout */ #define CONFIG_IRAM_BASE 0x02100000 #define CONFIG_IRAM_SIZE 0x58000 diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 8d3449f..53396aa 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -28,16 +28,11 @@ /* Timer input clock frequency */ #define COUNTER_FREQUENCY 26000000 -/* Device Tree */ -#define CONFIG_DEVICE_TREE_LIST "EXYNOS78x0-a5y17lte" - #define CPU_RELEASE_ADDR secondary_boot_addr #define CONFIG_SYS_BAUDRATE_TABLE \ {9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600} -#define CONFIG_BOARD_COMMON - #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - GENERATED_GBL_DATA_SIZE) /* DRAM Memory Banks */ diff --git a/include/configs/falcon.h b/include/configs/falcon.h index 1d6a9b9..52dcf19 100644 --- a/include/configs/falcon.h +++ b/include/configs/falcon.h @@ -21,9 +21,6 @@ #define GICD_BASE 0xF1000000 #define GICR_BASE 0xF1060000 -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Board Clock */ /* XTAL_CLK : 16.66MHz */ diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index 9d96dfc..5e6a8ee 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -17,9 +17,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */ diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h index d287942..8b80841 100644 --- a/include/configs/gardena-smart-gateway-mt7688.h +++ b/include/configs/gardena-smart-gateway-mt7688.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 -/* U-Boot */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /* Environment settings */ /* diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h index 7e13464..6b910d5 100644 --- a/include/configs/gazerbeam.h +++ b/include/configs/gazerbeam.h @@ -24,7 +24,6 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ @@ -77,13 +76,9 @@ * Environment Configuration */ -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 - /* TODO: Turn into string option and migrate to Kconfig */ #define CONFIG_HOSTNAME "gazerbeam" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 402c5bf..8d467e4 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -14,8 +14,6 @@ #include <asm/arch/imx-regs.h> #include <asm/mach-imx/gpio.h> -#define CONFIG_BOARD_NAME "General Electric Bx50v3" - #include "mx6_common.h" #include <linux/sizes.h> diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index 51e671a..832441a 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -43,9 +43,6 @@ */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#ifdef CONFIG_RESET_PHY_R -#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ -#endif /* SATA driver configuration */ #define CONFIG_LBA48 diff --git a/include/configs/gose.h b/include/configs/gose.h index 01657d7..dfa139d 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -27,7 +27,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h index fb01c56..347845f 100644 --- a/include/configs/grpeach.h +++ b/include/configs/grpeach.h @@ -28,6 +28,5 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI #endif /* __GRPEACH_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 668d00c..8158222 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -72,7 +72,6 @@ /* Framebuffer and LCD */ #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_HIDE_LOGO_VERSION /* Custom config to hide U-boot version */ /* Miscellaneous configurable options */ diff --git a/include/configs/highbank.h b/include/configs/highbank.h index 55c874b..0ff70fd 100644 --- a/include/configs/highbank.h +++ b/include/configs/highbank.h @@ -16,9 +16,6 @@ #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ -#define CONFIG_BOOT_RETRY_TIME -1 -#define CONFIG_RESET_TO_RETRY - /* * Miscellaneous configurable options */ diff --git a/include/configs/hihope-rzg2.h b/include/configs/hihope-rzg2.h index 68a5117..e46eb07 100644 --- a/include/configs/hihope-rzg2.h +++ b/include/configs/hihope-rzg2.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index c5f9bce..29a0d94 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -41,9 +41,6 @@ #define CONFIG_HIKEY_GPIO -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Initial environment variables */ /* diff --git a/include/configs/hsdk-4xd.h b/include/configs/hsdk-4xd.h index 21a984a..d3d8896 100644 --- a/include/configs/hsdk-4xd.h +++ b/include/configs/hsdk-4xd.h @@ -20,7 +20,6 @@ /* * Memory configuration */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -104,7 +103,6 @@ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" /* * Environment configuration */ -#define CONFIG_BOOTFILE "uImage" /* Cli configuration */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/hsdk.h b/include/configs/hsdk.h index c8c28bb..64dce52 100644 --- a/include/configs/hsdk.h +++ b/include/configs/hsdk.h @@ -19,7 +19,6 @@ /* * Memory configuration */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -100,11 +99,6 @@ setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; \ setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; \ setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;\0" -/* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - /* Cli configuration */ #define CONFIG_SYS_CBSIZE SZ_2K diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index 2598dea..aff948c 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -32,7 +32,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#undef CONFIG_RESET_PHY_R #endif /* CONFIG_CMD_NET */ /* diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index 44a4b44..cb4cf9b 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -26,9 +26,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 11 -#ifdef CONFIG_RESET_PHY_R -#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ -#endif #endif /* CONFIG_CMD_NET */ #endif /* _CONFIG_ICONNECT_H */ diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h index 8de89a4..356bf6c 100644 --- a/include/configs/ids8313.h +++ b/include/configs/ids8313.h @@ -16,9 +16,6 @@ /* * High Level Configuration Options */ -#define CONFIG_BOOT_RETRY_TIME 900 -#define CONFIG_BOOT_RETRY_MIN 30 -#define CONFIG_RESET_TO_RETRY #define CONFIG_SYS_SICRH 0x00000000 #define CONFIG_SYS_SICRL (SICRL_LBC | SICRL_SPI_D) @@ -163,7 +160,6 @@ * Ethernet setup */ #ifdef CONFIG_TSEC1 -#define CONFIG_HAS_ETH0 #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_SYS_TSEC1_OFFSET 0x24000 #define TSEC1_PHY_ADDR 0x1 @@ -172,14 +168,12 @@ #endif #ifdef CONFIG_TSEC2 -#define CONFIG_HAS_ETH1 #define CONFIG_TSEC2_NAME "TSEC1" #define CONFIG_SYS_TSEC2_OFFSET 0x25000 #define TSEC2_PHY_ADDR 0x3 #define TSEC2_FLAGS TSEC_GIGABIT #define TSEC2_PHYIDX 0 #endif -#define CONFIG_ETHPRIME "TSEC1" /* * Serial Port @@ -199,12 +193,10 @@ /* * U-Boot environment setup */ -#define CONFIG_BOOTP_BOOTFILESIZE /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (768 * 1024) /* @@ -214,7 +206,6 @@ #define CONFIG_NETDEV eth1 #define CONFIG_HOSTNAME "ids8313" #define CONFIG_ROOTPATH "/opt/eldk-4.2/ppc_6xx" -#define CONFIG_BOOTFILE "ids8313/uImage" #define CONFIG_UBOOTPATH "ids8313/u-boot.bin" #define CONFIG_FDTFILE "ids8313/ids8313.dtb" #define CONFIG_ENV_FLAGS_LIST_STATIC "ethaddr:mo,eth1addr:mo" diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h index 19d65f5..edd24a4 100644 --- a/include/configs/imgtec_xilfpga.h +++ b/include/configs/imgtec_xilfpga.h @@ -28,8 +28,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /*---------------------------------------------------------------------- * Commands */ diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h index 641e403..bb53a33 100644 --- a/include/configs/imx27lite-common.h +++ b/include/configs/imx27lite-common.h @@ -83,7 +83,6 @@ #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 #define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE / \ CONFIG_SYS_FLASH_SECT_SZ) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_MONITOR_LEN 0x40000 /* Reserve 256KiB */ /* Address and size of Redundant Environment Sector */ diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index ff774ec..26d7a88 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -152,8 +152,6 @@ /* Framebuffer */ #ifdef CONFIG_VIDEO_IPUV3 # define CONFIG_IMX_VIDEO_SKIP - -# define CONFIG_VIDEO_BMP_LOGO #endif /* SPL */ diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index 5a149f8..65f8944 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -23,8 +23,6 @@ /* Ethernet Configs */ -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -109,8 +107,6 @@ "fi; " \ "else run netboot; fi" -#define CONFIG_ARP_TIMEOUT 200UL - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index 261ed90..46ca1c5 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -12,8 +12,6 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR -#define CONFIG_ETHPRIME "FEC" - #undef CONFIG_SYS_AUTOLOAD #undef CONFIG_EXTRA_ENV_SETTINGS diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 7e6be60..cd1eafd 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -151,9 +151,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 77f0624..e480595 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -105,8 +105,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 /* FEC*/ -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC #define IMX_FEC_BASE 0x30BE0000 diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index c7022ef..32c937a 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -83,9 +83,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index d75fcf7..f521add 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -33,7 +33,6 @@ func(MMC, mmc, 2) \ func(MMC, mmc, 0) #include <config_distro_bootcmd.h> -#undef CONFIG_ISO_PARTITION #else #define BOOTENV #endif diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index 455a8d0..1952bde 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -41,7 +41,6 @@ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#undef CONFIG_ISO_PARTITION #else #define BOOTENV #endif @@ -101,8 +100,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 /* FEC */ -#define CONFIG_ETHPRIME "eth0" -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h index e2e322b..7fed9a3 100644 --- a/include/configs/imx8mn_beacon.h +++ b/include/configs/imx8mn_beacon.h @@ -122,8 +122,6 @@ /* ENET Config */ #if defined(CONFIG_FEC_MXC) -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC #define IMX_FEC_BASE 0x30BE0000 diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index 1e800f0..318289b 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -14,8 +14,6 @@ #define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #define CONFIG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) @@ -34,12 +32,6 @@ #include <config_distro_bootcmd.h> -/* ENET */ -#if defined(CONFIG_FEC_MXC) -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_XCV_TYPE RGMII -#endif /* CONFIG_FEC_MXC */ - #define MEM_LAYOUT_ENV_SETTINGS \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ @@ -84,7 +76,4 @@ /* USDHC */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -/* I2C */ -#define CONFIG_SYS_I2C_SPEED 400000 - #endif /* __IMX8MN_VAR_SOM_H */ diff --git a/include/configs/imx8mn_venice.h b/include/configs/imx8mn_venice.h index 401084c..d954e8e 100644 --- a/include/configs/imx8mn_venice.h +++ b/include/configs/imx8mn_venice.h @@ -38,7 +38,6 @@ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#undef CONFIG_ISO_PARTITION #else #define BOOTENV #endif @@ -97,8 +96,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 /* FEC */ -#define CONFIG_ETHPRIME "eth0" -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h index b810a55..5b185cf 100644 --- a/include/configs/imx8mp_evk.h +++ b/include/configs/imx8mp_evk.h @@ -26,16 +26,11 @@ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE -#undef CONFIG_DM_MMC - #define CONFIG_POWER_PCA9450 #endif #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "eth1" /* Set eqos to primary since we use its MDIO */ - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 1 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index ac4a7d0..62e06d2 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -12,17 +12,13 @@ #include <asm/arch/imx-regs.h> #include <config_distro_bootcmd.h> -#define CONFIG_HAS_ETH1 - #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) #define CONFIG_SPL_MAX_SIZE (152 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098FC00 #define CONFIG_SPL_BSS_MAX_SIZE 0x400 /* 1 KB */ @@ -37,32 +33,14 @@ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE #if defined(CONFIG_NAND_BOOT) -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_DMA #define CONFIG_SPL_NAND_MXS -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_IDENT -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x4000000 /* Put the FIT out of \ - * first 64MB boot area \ - */ - -/* Set a redundant offset in nand FIT mtdpart. The new uuu will burn full - * boot image (not only FIT part) to the mtdpart, so we check both two offsets - */ -#define CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND \ - (CONFIG_SYS_NAND_U_BOOT_OFFS + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512 - 0x8400) - #endif #endif -#define CONFIG_REMAKE_ELF /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "eth1" /* Set eqos to primary since we use its MDIO */ - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 4 #define FEC_QUIRK_ENET_MAC @@ -186,15 +164,12 @@ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR /* Monitor Command Prompt */ -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_IMX_BOOTAUX - #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -213,11 +188,6 @@ /* NAND stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x20000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_SYS_NAND_USE_FLASH_BBT #endif /* CONFIG_NAND_MXS */ -#define CONFIG_SYS_I2C_SPEED 100000 - #endif /* __IMX8MP_RSB3720_H */ diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index d3cf7ab..a3bb3c9 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -32,9 +32,6 @@ /* ENET Config */ /* ENET1 */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "FEC" -#endif #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 4aaed3a..7389d75 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -29,8 +29,6 @@ /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE -#undef CONFIG_DM_MMC - #define CONFIG_POWER_PFUZE100 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif @@ -38,9 +36,6 @@ /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index 16a2c2c..f40caca 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -25,16 +25,11 @@ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE - -#undef CONFIG_DM_MMC #endif /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h index c12f383..0fe38e6 100644 --- a/include/configs/imx8qm_mek.h +++ b/include/configs/imx8qm_mek.h @@ -133,7 +133,4 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 8000000 /* 8MHz */ -/* Networking */ -#define CONFIG_FEC_XCV_TYPE RGMII - #endif /* __IMX8QM_MEK_H */ diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 5fcc963..7532c6e 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -127,8 +127,5 @@ /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 8000000 /* 8MHz */ -/* Networking */ -#define CONFIG_FEC_XCV_TYPE RGMII - #include <linux/stringify.h> #endif /* __IMX8QM_ROM7720_H */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index b1c51e7..beb35c9 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -136,9 +136,6 @@ #define CONFIG_PCA953X #endif -/* Networking */ -#define CONFIG_FEC_XCV_TYPE RGMII - /* Misc configuration */ #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h index 7da6802..ddb3d44 100644 --- a/include/configs/imx8ulp_evk.h +++ b/include/configs/imx8ulp_evk.h @@ -29,10 +29,8 @@ /* ENET Config */ #if defined(CONFIG_FEC_MXC) -#define CONFIG_ETHPRIME "FEC" #define PHY_ANEG_TIMEOUT 20000 -#define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 1 #define IMX_FEC_BASE 0x29950000 diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h index b507895..5c2f975 100644 --- a/include/configs/imxrt1050-evk.h +++ b/include/configs/imxrt1050-evk.h @@ -21,8 +21,6 @@ DMAMEM_SZ_ALL) #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_BMP_LOGO - #define CONFIG_EXTRA_ENV_SETTINGS \ "stdin=serial\0" \ "stdout=serial,vidconsole\0" \ diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index 6d7d798..f15a4d5 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -19,11 +19,6 @@ /* Integrator/AP-specific configuration */ #define CONFIG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Flash settings */ #define CONFIG_SYS_FLASH_SIZE 0x02000000 /* 32 MiB */ #define CONFIG_SYS_MAX_FLASH_SECT 128 @@ -32,8 +27,6 @@ * PCI definitions */ -#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ - /*----------------------------------------------------------------------- * There are various dependencies on the core module (CM) fitted * Users should refer to their CM user guide diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index 3ff7bb9..288014c 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -29,7 +29,6 @@ #define CONFIG_SERVERIP 192.168.1.100 #define CONFIG_IPADDR 192.168.1.104 -#define CONFIG_BOOTFILE "uImage" /* * Miscellaneous configurable options @@ -38,26 +37,4 @@ #define CONFIG_SYS_MAX_FLASH_SECT 64 #define CONFIG_SYS_MONITOR_LEN 0x00100000 -/* - * Move up the U-Boot & monitor area if more flash is fitted. - * If this U-Boot is to be run on Integrators with varying flash sizes, - * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG - * register and dynamically assign CONFIG_ENV_ADDR & CONFIG_SYS_MONITOR_BASE - * - CONFIG_SYS_MONITOR_BASE is set to indicate that the environment is not - * embedded in the boot monitor(s) area - */ -#if ( PHYS_FLASH_SIZE == 0x04000000 ) - -#define CONFIG_SYS_MONITOR_BASE 0x27F40000 - -#elif (PHYS_FLASH_SIZE == 0x02000000 ) - -#define CONFIG_SYS_MONITOR_BASE 0x25F40000 - -#else - -#define CONFIG_SYS_MONITOR_BASE 0x27F40000 - -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/iot_devkit.h b/include/configs/iot_devkit.h index a1b8c06..56a67f2 100644 --- a/include/configs/iot_devkit.h +++ b/include/configs/iot_devkit.h @@ -44,8 +44,6 @@ * - Reading data from weird addresses */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define SRAM_BASE 0x30000000 #define SRAM_SIZE SZ_128K @@ -68,10 +66,4 @@ CONFIG_SYS_SDRAM_BASE) - \ CONFIG_SYS_MALLOC_LEN - \ CONFIG_ENV_SIZE - -/* - * Environment - */ -#define CONFIG_BOOTFILE "app.bin" - #endif /* _CONFIG_IOT_DEVKIT_H_ */ diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h index e4b167d..5aaa31e 100644 --- a/include/configs/j721e_evm.h +++ b/include/configs/j721e_evm.h @@ -122,9 +122,8 @@ "partitions=" PARTS_DEFAULT /* Set the default list of remote processors to boot */ -#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM) +#if defined(CONFIG_TARGET_J7200_A72_EVM) #define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ - "dorprocboot=1\0" \ "do_main_cpsw0_qsgmii_phyinit=1\0" \ "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ "gpio clear gpio@22_16\0" \ @@ -136,6 +135,22 @@ #ifdef DEFAULT_RPROCS #undef DEFAULT_RPROCS #endif +#elif defined(CONFIG_TARGET_J721E_A72_EVM) +#define EXTRA_ENV_CONFIG_MAIN_CPSW0_QSGMII_PHY \ + "init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;" \ + "gpio clear gpio@22_16\0" \ + "main_cpsw0_qsgmii_phyinit=" \ + "if test $board_name = J721EX-PM1-SOM || test $board_name = J721EX-PM2-SOM " \ + "|| test $board_name = j721e; then " \ + "do_main_cpsw0_qsgmii_phyinit=1; else " \ + "do_main_cpsw0_qsgmii_phyinit=0; fi;" \ + "if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && " \ + "test ${boot} = mmc; then " \ + "run init_main_cpsw0_qsgmii_phy;" \ + "fi;\0" +#ifdef DEFAULT_RPROCS +#undef DEFAULT_RPROCS +#endif #endif #ifdef CONFIG_TARGET_J721E_A72_EVM diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h index 6fd098c..8788464 100644 --- a/include/configs/j721s2_evm.h +++ b/include/configs/j721s2_evm.h @@ -60,9 +60,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_64M #define CONFIG_CQSPI_REF_CLK 133333333 -/* HyperFlash related configuration */ -#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 - /* U-Boot general configuration */ #define EXTRA_ENV_J721S2_BOARD_SETTINGS \ "default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index a3c385b..b4c42fd 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -26,8 +26,4 @@ #include "tegra-common-usb-gadget.h" #include "tegra-common-post.h" -/* Reserve top 1M for secure RAM */ -#define CONFIG_ARMV7_SECURE_BASE 0xfff00000 -#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000 - #endif /* __CONFIG_H */ diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h index d321ebd..85cf516 100644 --- a/include/configs/km/keymile-common.h +++ b/include/configs/km/keymile-common.h @@ -27,11 +27,6 @@ #define CONFIG_LOADS_ECHO #define CONFIG_SYS_LOADS_BAUD_CHANGE -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - #ifndef CONFIG_KM_DEF_ENV_BOOTPARAMS #define CONFIG_KM_DEF_ENV_BOOTPARAMS \ "actual_bank=0\0" diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h index 98204bd..af35e8e 100644 --- a/include/configs/km/km-mpc8309.h +++ b/include/configs/km/km-mpc8309.h @@ -1,7 +1,6 @@ /* * High Level Configuration Options */ -#define CONFIG_E300 1 /* E300 family */ #define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" @@ -115,7 +114,6 @@ /* EEprom support */ /* ethernet port connected to piggy (UEC2) */ -#define CONFIG_HAS_ETH1 #define CONFIG_UEC_ETH2 #define CONFIG_SYS_UEC2_UCC_NUM 2 /* UCC3 */ #define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE /* not used in RMII Mode */ diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h index 7c979c5..e1c1615 100644 --- a/include/configs/km/km-mpc83xx.h +++ b/include/configs/km/km-mpc83xx.h @@ -23,7 +23,6 @@ /* * The reserved memory */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_FLASH_BASE 0xF0000000 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -108,12 +107,7 @@ "unlock=yes\0" \ "" -#if defined(CONFIG_UEC_ETH) -#define CONFIG_HAS_ETH0 -#endif - /* * QE UEC ethernet configuration */ #define CONFIG_UEC_ETH -#define CONFIG_ETHPRIME "UEC0" diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 8453be8..3285ae5 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 @@ -75,7 +74,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT @@ -178,13 +176,6 @@ {1, {I2C_NULL_HOP} }, \ } -/* - * eTSEC - */ -#ifdef CONFIG_TSEC_ENET -#define CONFIG_ETHPRIME "ethernet@2d90000" -#endif - #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_SMP_PEN_ADDR 0x01ee0200 #define COUNTER_FREQUENCY 8333333 @@ -204,7 +195,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */ #define CONFIG_SYS_BOOTCOUNT_BE @@ -274,6 +264,4 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Increase map for Linux */ -#define CONFIG_MISC_INIT_F - #endif diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index ca0cb31..dd247ed 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -150,9 +150,7 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_ENABLE_36BIT_PHYS @@ -176,7 +174,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 @@ -348,7 +345,6 @@ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ #define CONFIG_SYS_MONITOR_LEN 0xc0000 /* 768k */ /* @@ -410,7 +406,6 @@ int get_scl(void); /* Qman / Bman */ /* RGMII (FM1@DTESC5) is local managemant interface */ #define CONFIG_SYS_RGMII2_PHY_ADDR 0x11 -#define CONFIG_ETHPRIME "fm1-mac5" /* * Hardware Watchdog diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index eca8998..84603e3 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -27,7 +27,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 2bac000..7bc402d 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -32,7 +32,6 @@ /* Board and environment settings */ #define CONFIG_MXC_UART_BASE UART4_BASE #define CONFIG_HOSTNAME "kontron-mx6ul" -#define CONFIG_ETHPRIME "eth0" #ifdef CONFIG_USB_EHCI_HCD #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 0f96b90..2c0ad96 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -11,11 +11,8 @@ #define CONFIG_SPL_MAX_SIZE (124 * SZ_1K) #define CONFIG_SYS_MONITOR_LEN (512 * SZ_1K) -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_STACK 0x187FF0 #define CONFIG_SPL_BSS_START_ADDR 0x00180000 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K @@ -33,13 +30,8 @@ #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 #endif -#define CONFIG_REMAKE_ELF - /* ENET1 Config */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 0 #define FEC_QUIRK_ENET_MAC @@ -92,6 +84,4 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_OF_SYSTEM_SETUP - #endif diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 448749a..77ea132 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -19,7 +19,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_VERY_BIG_RAM -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 @@ -44,9 +43,6 @@ #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) -/* ethernet */ -#define CONFIG_SYS_RX_ETH_BUFFER 8 - /* SPL */ #define CONFIG_SPL_BSS_START_ADDR 0x80100000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 0983d40..534263f 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -60,8 +60,6 @@ #include <config_distro_bootcmd.h> -#define CONFIG_ARP_TIMEOUT 200UL - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/kp_imx6q_tpc.h b/include/configs/kp_imx6q_tpc.h index c538085..7d87947 100644 --- a/include/configs/kp_imx6q_tpc.h +++ b/include/configs/kp_imx6q_tpc.h @@ -18,7 +18,6 @@ /* Miscellaneous configurable options */ /* FEC ethernet */ -#define CONFIG_ARP_TIMEOUT 200UL /* USB Configs */ #ifdef CONFIG_CMD_USB diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h index 022858f..c20ef5f 100644 --- a/include/configs/kzm9g.h +++ b/include/configs/kzm9g.h @@ -41,7 +41,6 @@ #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) -#define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 @@ -71,6 +70,4 @@ #define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk() #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ -#define CONFIG_NFS_TIMEOUT 10000UL - #endif /* __KZM9G_H */ diff --git a/include/configs/lager.h b/include/configs/lager.h index 4c291aa..8cabad2 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -28,7 +28,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index b912db1..4c132c6 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -50,7 +50,6 @@ /* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ @@ -94,10 +93,6 @@ "loadbootscr=fatload mmc 0 ${bootscraddr} boot.scr\0" \ "bootscript=source ${bootscraddr}\0" -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - /* additions for new relocation code, must added to all boards */ #define CONFIG_SYS_SDRAM_BASE 0xc0000000 diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h index aa2542f..4a19fb8 100644 --- a/include/configs/linkit-smart-7688.h +++ b/include/configs/linkit-smart-7688.h @@ -45,9 +45,6 @@ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 -/* U-Boot */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /* Environment settings */ /* diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index 3a8dd47..d0960bc 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -115,8 +115,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" #endif #endif diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 0263bb8..8191c85 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -10,7 +10,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index ef57cf6..7735a00 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -10,9 +10,7 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index c61865c..7d8d6ee 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -14,10 +14,8 @@ #define BOARD_REV_MASK 0x001A0000 /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define SYS_SDRAM_SIZE_512 0x20000000 #define SYS_SDRAM_SIZE_1024 0x40000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* ENV */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index cbcb3f7..d57f28e 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c9a152e..c51c4f2 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 2e5b804..9746081 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -7,8 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE @@ -59,8 +57,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * Serial Port */ @@ -108,12 +104,6 @@ #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 - -#define CONFIG_ETHPRIME "eTSEC2" - -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 #endif /* PCIe */ @@ -152,13 +142,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -/* start of monitor */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#endif - #include <asm/fsl_secure_boot.h> #endif diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 8c4cb7b..16c1741 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -7,10 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - -#define CONFIG_DEEP_SLEEP - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE @@ -54,7 +50,6 @@ #define CONFIG_SYS_DDR_RAW_TIMING #endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -99,7 +94,6 @@ #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ @@ -272,9 +266,7 @@ /* * Serial Port */ -#ifdef CONFIG_LPUART -#define CONFIG_LPUART_32B_REG -#else +#ifndef CONFIG_LPUART #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -304,18 +296,6 @@ */ /* - * Video - */ -#ifdef CONFIG_VIDEO_FSL_DCU_FB -#define CONFIG_VIDEO_BMP_LOGO - -#define CONFIG_FSL_DIU_CH7301 -#define CONFIG_SYS_I2C_DVI_BUS_NUM 0 -#define CONFIG_SYS_I2C_QIXIS_ADDR 0x66 -#define CONFIG_SYS_I2C_DVI_ADDR 0x75 -#endif - -/* * eTSEC */ @@ -340,12 +320,6 @@ #define TSEC2_PHYIDX 0 #define TSEC3_PHYIDX 0 -#define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 - #define CONFIG_FSL_SGMII_RISER 1 #define SGMII_RISER_PHY_OFFSET 0x1b @@ -397,12 +371,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - /* * Environment */ diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 5f6c2a0..bc2a265 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -6,10 +6,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - -#define CONFIG_DEEP_SLEEP - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE @@ -77,8 +73,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL @@ -197,12 +191,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - /* Environment */ #define CONFIG_SYS_BOOTM_LEN 0x8000000 /* 128 MB */ diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index dcee79d..6b1ab87 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -7,10 +7,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR - -#define CONFIG_DEEP_SLEEP - #define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE @@ -79,8 +75,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * IFC Definitions */ @@ -121,7 +115,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA #endif @@ -170,9 +163,7 @@ /* * Serial Port */ -#ifdef CONFIG_LPUART -#define CONFIG_LPUART_32B_REG -#else +#ifndef CONFIG_LPUART #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 @@ -190,29 +181,6 @@ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 1 -/* - * MMC - */ - -/* - * Video - */ -#ifdef CONFIG_VIDEO_FSL_DCU_FB -#define CONFIG_VIDEO_BMP_LOGO - -#define CONFIG_FSL_DCU_SII9022A -#define CONFIG_SYS_I2C_DVI_BUS_NUM 1 -#define CONFIG_SYS_I2C_DVI_ADDR 0x39 -#endif - -/* - * eTSEC - */ - -#ifdef CONFIG_TSEC_ENET -#define CONFIG_ETHPRIME "ethernet@2d10000" -#endif - /* PCIe */ #define CONFIG_PCIE1 /* PCIE controller 1 */ #define CONFIG_PCIE2 /* PCIE controller 2 */ @@ -378,12 +346,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - /* * Environment */ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index a517346..7bb6d41 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -40,7 +40,6 @@ /* Miscellaneous configurable options */ /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 @@ -75,8 +74,6 @@ #define OCRAM_NONSECURE_SIZE 0x00010000 #define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ #define I2C_MUX_CH_DEFAULT 0x8 @@ -92,8 +89,4 @@ #include <asm/fsl_secure_boot.h> #endif -/* Ethernet */ -/* smallest ENETC BD ring has 8 entries */ -#define CONFIG_SYS_RX_ETH_BUFFER 8 - #endif /* __L1028A_COMMON_H */ diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h index 1b4d181..8d60727 100644 --- a/include/configs/ls1028aqds.h +++ b/include/configs/ls1028aqds.h @@ -58,15 +58,8 @@ /* Store environment at top of flash */ -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#endif - /* LPUART */ #ifdef CONFIG_LPUART -#define CONFIG_LPUART_32B_REG #define CFG_LPUART_MUX_MASK 0xf0 #define CFG_LPUART_EN 0xf0 #endif diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h index 0770f4e..7de186a 100644 --- a/include/configs/ls1028ardb.h +++ b/include/configs/ls1028ardb.h @@ -16,8 +16,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_QIXIS_I2C_ACCESS /* diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index ea6831b..3ffc4bf 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -40,11 +39,6 @@ #define QSGMII_CARD_PORT4_PHY_ADDR_S2 0xB #endif -/* LPUART */ -#ifdef CONFIG_LPUART -#define CONFIG_LPUART_32B_REG -#endif - /* SATA */ /* EEPROM */ @@ -92,7 +86,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* @@ -328,12 +321,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif - /* * Environment */ diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 31b578a..cc15462 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -62,7 +61,6 @@ #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* @@ -227,8 +225,6 @@ #define QSGMII_PORT4_PHY_ADDR 0x7 #define FM1_10GEC1_PHY_ADDR 0x1 - -#define CONFIG_ETHPRIME "FM1@DTSEC3" #endif #endif diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 14ad84a..d803fb7 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -11,7 +11,6 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_UBOOT_BASE 0x40100000 @@ -101,8 +100,6 @@ #define FDT_SEQ_MACADDR_FROM_ENV -#define CONFIG_ETHPRIME "FM1@DTSEC3" - #endif #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \ diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 3d72c67..434a5e1 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -55,7 +54,6 @@ /* LPUART */ #ifdef CONFIG_LPUART -#define CONFIG_LPUART_32B_REG #define CFG_UART_MUX_MASK 0x6 #define CFG_UART_MUX_SHIFT 1 #define CFG_LPUART_EN 0x2 @@ -105,7 +103,6 @@ #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_SYS_WRITE_SWAPPED_DATA /* @@ -342,8 +339,6 @@ #define CONFIG_SYS_INIT_SP_OFFSET \ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - /* * Environment */ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 8ed1dce..df699bc 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -13,7 +13,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 @@ -128,8 +127,6 @@ #define FM1_10GEC1_PHY_ADDR 0x0 #define FDT_SEQ_MACADDR_FROM_ENV - -#define CONFIG_ETHPRIME "FM1@DTSEC3" #endif #endif @@ -143,6 +140,8 @@ #endif #endif +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" + #include <asm/fsl_secure_boot.h> #endif /* __LS1046ARDB_H__ */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 33b70c8..0c73a9e 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -17,7 +17,6 @@ #define SPL_NO_SATA #define SPL_NO_QSPI #define SPL_NO_IFC -#undef CONFIG_DISPLAY_CPUINFO #endif #include <asm/arch/stream_id_lsch3.h> @@ -108,11 +107,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 -/* Define phy_reset function to boot the MC based on mcinitcmd. - * This happens late enough to properly fixup u-boot env MAC addresses. - */ -#define CONFIG_RESET_PHY_R - /* * Carve out a DDR region which will not be used by u-boot/Linux * @@ -132,13 +126,10 @@ unsigned long long get_qixis_addr(void); #endif /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 -/* #define CONFIG_DISPLAY_CPUINFO */ - #ifndef SPL_NO_ENV /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index 2d33ab0..9e4db33 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -311,12 +311,6 @@ #endif #endif -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#endif - #define CONFIG_FSL_MEMAC /* MMC */ @@ -516,8 +510,6 @@ #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf -#define CONFIG_ETHPRIME "DPMAC1@xgmii" - #endif #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index 4cb5d75..0a1a48b 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -222,12 +222,6 @@ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#endif - #define CONFIG_FSL_MEMAC #ifndef SPL_NO_ENV @@ -455,8 +449,6 @@ #define QSGMII2_PORT2_PHY_ADDR 0x1d #define QSGMII2_PORT3_PHY_ADDR 0x1e #define QSGMII2_PORT4_PHY_ADDR 0x1f - -#define CONFIG_ETHPRIME "DPMAC1@xgmii" #endif #endif diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f2725af..9027bd0 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -120,11 +120,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH 0x200000 #define CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET 0x07000000 -/* Define phy_reset function to boot the MC based on mcinitcmd. - * This happens late enough to properly fixup u-boot env MAC addresses. - */ -#define CONFIG_RESET_PHY_R - /* * Carve out a DDR region which will not be used by u-boot/Linux * @@ -139,7 +134,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ /* fixme: these need to be checked against the board */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 7554de1..68ccc27 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -27,7 +27,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif @@ -444,8 +443,6 @@ #define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe #define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf -#define CONFIG_ETHPRIME "DPMAC1@xgmii" - #endif #include <asm/fsl_secure_boot.h> diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 1c05b08..1e90f94 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -37,7 +37,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif @@ -505,7 +504,6 @@ #define AQ_PHY_ADDR3 0x02 #define AQ_PHY_ADDR4 0x03 #define AQR405_IRQ_MASK 0x36 -#define CONFIG_ETHPRIME "DPMAC1@xgmii" #include <asm/fsl_secure_boot.h> diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 7fa4f00..19fd702 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -92,7 +92,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {0, 1} /* enable port 1 only */ #define CONFIG_PHY_BASE_ADR 7 -#undef CONFIG_RESET_PHY_R #endif /* CONFIG_CMD_NET */ #ifdef CONFIG_SATA diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 4f4b571..38c4c31 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -34,7 +34,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ @@ -69,11 +68,6 @@ #define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0x00F20000 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000 -/* Define phy_reset function to boot the MC based on mcinitcmd. - * This happens late enough to properly fixup u-boot env MAC addresses. - */ -#define CONFIG_RESET_PHY_R - /* * Carve out a DDR region which will not be used by u-boot/Linux * diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h index a07ebeb..e7aec6b 100644 --- a/include/configs/lx2160aqds.h +++ b/include/configs/lx2160aqds.h @@ -22,9 +22,6 @@ u8 qixis_esdhc_detect_quirk(void); #endif /* MAC/PHY configuration */ -#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" -#endif /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h index a8a9f82..5c4ea27 100644 --- a/include/configs/lx2160ardb.h +++ b/include/configs/lx2160ardb.h @@ -11,11 +11,6 @@ /* RTC */ #define CONFIG_SYS_RTC_BUS_NUM 4 -/* MAC/PHY configuration */ -#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_ETHPRIME "DPMAC1@xgmii" -#endif - /* EMC2305 */ #define I2C_MUX_CH_EMC2305 0x09 #define I2C_EMC2305_ADDR 0x4D diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h index c2fa579..126d226 100644 --- a/include/configs/lx2162aqds.h +++ b/include/configs/lx2162aqds.h @@ -25,11 +25,6 @@ u8 qixis_esdhc_detect_quirk(void); #define CONFIG_ESDHC_DETECT_QUIRK qixis_esdhc_detect_quirk() #endif -/* MAC/PHY configuration */ -#if defined(CONFIG_FSL_MC_ENET) -#define CONFIG_ETHPRIME "DPMAC17@rgmii-id" -#endif - /* EEPROM */ #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 8486cf8..dd803e7 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -72,8 +72,6 @@ #define IMX_FEC_BASE FEC_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 #define CONFIG_DISCOVER_PHY -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC0" #endif #define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */ @@ -119,11 +117,6 @@ /* Watchdog */ /* - * Boot Linux - */ -#define CONFIG_BOOTFILE "boot/fitImage" - -/* * NAND SPL */ #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" diff --git a/include/configs/malta.h b/include/configs/malta.h index 6d150fd..84e5f98 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -27,7 +27,6 @@ /* * Memory map */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #ifdef CONFIG_64BIT # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 073c5a5..e4df9d8 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -64,6 +64,5 @@ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ #define CONFIG_SYS_SDRAM_SIZE SZ_1G -#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 55f64b5..6b6c90e 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -38,11 +38,6 @@ */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. */ @@ -71,24 +66,9 @@ # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif -/* Ethernet */ -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#undef CONFIG_RESET_PHY_R - /* hw-controller addresses */ #define CONFIG_ET1100_BASE 0x70000000 -#ifdef CONFIG_SYS_USE_DATAFLASH - -/* bootstrap + u-boot + env in dataflash on CS0 */ - -#elif CONFIG_SYS_USE_NANDFLASH - -/* bootstrap + u-boot + env + linux in nandflash */ - -#endif - #define CONFIG_SYS_CBSIZE 512 #endif diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index fd5a9cf..744e20e 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -37,11 +37,6 @@ #define XILINX_DCACHE_BYTE_SIZE 32768 #endif -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* size of console buffer */ #define CONFIG_SYS_CBSIZE 512 /* max number of command args */ @@ -124,10 +119,6 @@ BOOTENV #endif -#if defined(CONFIG_XILINX_AXIEMAC) -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 -#endif - /* SPL part */ #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/mt7620.h b/include/configs/mt7620.h index 5a88627..703efcd 100644 --- a/include/configs/mt7620.h +++ b/include/configs/mt7620.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/mt7628.h b/include/configs/mt7628.h index 8c4455b..1008aaa 100644 --- a/include/configs/mt7628.h +++ b/include/configs/mt7628.h @@ -10,8 +10,6 @@ #define CONFIG_SYS_MIPS_TIMER_FREQ 290000000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h index fd9ce34..06882fb 100644 --- a/include/configs/mvebu_armada-37xx.h +++ b/include/configs/mvebu_armada-37xx.h @@ -40,12 +40,6 @@ */ #define DEFAULT_ENV_IS_RW /* required for configuring default fdtfile= */ -/* - * Ethernet Driver configuration - */ -#define CONFIG_ARP_TIMEOUT 200 -#define CONFIG_NET_RETRY_COUNT 50 - #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) /* diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h index 44bba65..8e325e8 100644 --- a/include/configs/mvebu_armada-8k.h +++ b/include/configs/mvebu_armada-8k.h @@ -33,12 +33,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* - * Ethernet Driver configuration - */ -#define CONFIG_ARP_TIMEOUT 200 -#define CONFIG_NET_RETRY_COUNT 50 - #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3) /* USB ethernet */ diff --git a/include/configs/mx23_olinuxino.h b/include/configs/mx23_olinuxino.h index 370f000..ab466b6 100644 --- a/include/configs/mx23_olinuxino.h +++ b/include/configs/mx23_olinuxino.h @@ -22,9 +22,6 @@ /* Ethernet */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/mx23evk.h b/include/configs/mx23evk.h index 552bf5a..3fb0003 100644 --- a/include/configs/mx23evk.h +++ b/include/configs/mx23evk.h @@ -30,9 +30,6 @@ #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif -/* Boot Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environments */ #define CONFIG_EXTRA_ENV_SETTINGS \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index caad95b..fe096d4 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -44,9 +44,6 @@ #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (512 << 10) #endif -/* Boot Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_EXTRA_ENV_SETTINGS \ "ubifs_file=filesystem.ubifs\0" \ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index dc5891e..f299cc0 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -44,8 +44,6 @@ /* Framebuffer and LCD */ -#define CONFIG_ETHPRIME "FEC0" - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -105,8 +103,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_ARP_TIMEOUT 200UL - /* * Miscellaneous configurable options */ diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 16c2241..fafc5f1 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -54,8 +54,6 @@ "fdtfile=imx53-cx9020.dtb\0" \ BOOTENV -#define CONFIG_ARP_TIMEOUT 200UL - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 01ed221..43455aa 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -23,7 +23,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* PMIC Controller */ -#define CONFIG_DIALOG_POWER #define CONFIG_POWER_FSL #define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 @@ -31,9 +30,6 @@ /* Command definition */ - -#define CONFIG_ETHPRIME "FEC0" - #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ @@ -91,8 +87,6 @@ "bootz; " \ "fi;\0" -#define CONFIG_ARP_TIMEOUT 200UL - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index 8f8dfe9..572261b 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -85,8 +85,6 @@ "video-mode=" \ "lcd:800x480-24@60,monitor=lcd\0" \ -#define CONFIG_ARP_TIMEOUT 200UL - /* Miscellaneous configurable options */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 5ff931e..a0e4817 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -18,7 +18,6 @@ #endif #endif -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_MXC_GPT_HCLK #define CONFIG_SYS_BOOTM_LEN 0x1000000 diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index 1c25857..832f73f 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -24,7 +24,6 @@ #endif /* Framebuffer */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index c1c012b..d7408e0 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -136,8 +136,6 @@ "echo WARNING: Could not determine dtb to use; fi; " \ "fi;\0" \ -#define CONFIG_ARP_TIMEOUT 200UL - /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -153,7 +151,6 @@ /* Environment organization */ /* Framebuffer */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 953f071..372cf8d 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -101,9 +101,6 @@ #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" - #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 8bc8674..b679d13 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -129,9 +129,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" - #ifdef CONFIG_CMD_USB #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) @@ -148,7 +145,6 @@ #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR #endif #endif diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index c24578a..17e7ae0 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -137,19 +137,14 @@ #if (CONFIG_FEC_ENET_DEV == 0) #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x2 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "eth0" #elif (CONFIG_FEC_ENET_DEV == 1) #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "eth1" #endif #endif #ifndef CONFIG_SPL_BUILD #if defined(CONFIG_DM_VIDEO) -#define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif #endif diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 6bcca11..dfcdc00 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -124,11 +124,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_FEC_ENET_DEV 1 -#if (CONFIG_FEC_ENET_DEV == 0) -#define CONFIG_ETHPRIME "eth0" -#elif (CONFIG_FEC_ENET_DEV == 1) -#define CONFIG_ETHPRIME "eth1" -#endif #endif #endif diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index 2e976df..76c374a 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -31,8 +31,6 @@ /* MMC */ -#define CONFIG_ARMV7_SECURE_BASE 0x00900000 - /* * If we have defined the OPTEE ram size and not OPTEE it means that we were * launched by OPTEE, because of that we shall skip all the low level diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index d5b38fd..d411b1a 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -122,8 +122,4 @@ #define CONFIG_USBD_HS -#ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_BMP_LOGO -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h index 75f5cf0..d3ba144 100644 --- a/include/configs/mx7ulp_com.h +++ b/include/configs/mx7ulp_com.h @@ -15,7 +15,6 @@ #include "imx7ulp_spl.h" #endif -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 /* @@ -71,7 +70,5 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -#define CONFIG_ARMV7_SECURE_BASE 0x2F000000 - #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* __CONFIG_H */ diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index 8f2cbc6..e80d748 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -11,7 +11,6 @@ #include <linux/sizes.h> #include <asm/arch/imx-regs.h> -#define CONFIG_BOARD_POSTCLK_INIT #define CONFIG_SYS_BOOTM_LEN 0x1000000 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 591c572..8dcc45c 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -94,16 +94,6 @@ #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } /* Default baudrate can be overridden by board! */ -/* FEC Ethernet on SoC */ -#ifdef CONFIG_FEC_MXC -#ifndef CONFIG_ETHPRIME -#define CONFIG_ETHPRIME "FEC0" -#endif -#ifndef CONFIG_FEC_XCV_TYPE -#define CONFIG_FEC_XCV_TYPE RMII -#endif -#endif - /* NAND */ #ifdef CONFIG_CMD_NAND #define CONFIG_SYS_MAX_NAND_DEVICE 1 diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index 678b433..afa4ca5 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -29,8 +29,6 @@ #endif #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 /* USB Configs */ diff --git a/include/configs/novena.h b/include/configs/novena.h index 1ce2f4e..dbde7a0 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -25,7 +25,6 @@ */ /* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" #define CONFIG_HOSTNAME "novena" /* Physical Memory Map */ @@ -43,11 +42,6 @@ /* SPL */ #include "imx6_spl.h" /* common IMX6 SPL configuration */ -/* Ethernet Configuration */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_ETH -#endif - /* I2C */ #define CONFIG_I2C_MULTI_BUS #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index eb32d83..1e40fad 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -48,8 +48,6 @@ #ifdef CONFIG_CMD_NET #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "eth0" #endif #define CONFIG_FEC_ENET_DEV 1 diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h index ccf4519..485a3fe 100644 --- a/include/configs/nsa310s.h +++ b/include/configs/nsa310s.h @@ -27,7 +27,6 @@ #ifdef CONFIG_CMD_NET #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 1 -#define CONFIG_RESET_PHY_R #endif /* CONFIG_CMD_NET */ /* SATA driver configuration */ diff --git a/include/configs/nsim.h b/include/configs/nsim.h index 62169af..de07b6b 100644 --- a/include/configs/nsim.h +++ b/include/configs/nsim.h @@ -11,7 +11,6 @@ /* * Memory configuration */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -23,11 +22,6 @@ #define CONFIG_SYS_BOOTM_LEN SZ_32M /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/o4-imx6ull-nano.h b/include/configs/o4-imx6ull-nano.h index 72515a3..7777935 100644 --- a/include/configs/o4-imx6ull-nano.h +++ b/include/configs/o4-imx6ull-nano.h @@ -17,10 +17,6 @@ # define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #endif /* CONFIG_CMD_USB */ -#if IS_ENABLED(CONFIG_FEC_MXC) -# define CONFIG_FEC_XCV_TYPE RMII -#endif /* CONFIG_FEC_MXC */ - #define CONFIG_EXTRA_ENV_SETTINGS \ "mmcdev=0\0" \ "mmcpart=2\0" \ diff --git a/include/configs/octeon_common.h b/include/configs/octeon_common.h index 23bb4f6..2e4bfd0 100644 --- a/include/configs/octeon_common.h +++ b/include/configs/octeon_common.h @@ -15,7 +15,6 @@ #endif #define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h index 536dff2..6ec2d3e 100644 --- a/include/configs/octeontx2_common.h +++ b/include/configs/octeontx2_common.h @@ -16,14 +16,6 @@ /** Stack starting address */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0) -/* Autoboot options */ -#define CONFIG_RESET_TO_RETRY -#define CONFIG_BOOT_RETRY_TIME -1 -#define CONFIG_BOOT_RETRY_MIN 30 - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /** Extra environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=20080000\0" \ diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h index 8185f4b..bcf8b41 100644 --- a/include/configs/octeontx_common.h +++ b/include/configs/octeontx_common.h @@ -45,14 +45,6 @@ /** Heap size for U-Boot */ -/* Autoboot options */ -#define CONFIG_RESET_TO_RETRY -#define CONFIG_BOOT_RETRY_TIME -1 -#define CONFIG_BOOT_RETRY_MIN 30 - -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* AHCI support Definitions */ #ifdef CONFIG_DM_SCSI /** Enable 48-bit SATA addressing */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h index ed9b41d..42031bb 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -30,8 +30,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - /* Partitions name */ #define PARTS_BOOT "boot" #define PARTS_ROOT "platform" diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index a482598..616f25e 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -10,8 +10,6 @@ #include <configs/exynos5420-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define TZPC_BASE_OFFSET 0x10000 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 4719184..d3839eb 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -157,9 +157,6 @@ #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_FLASH_SIZE 0x4000000 -/* Monitor at start of flash */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE - #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ /* Defines for SPL */ diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 45297b9..0d69316 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -137,16 +137,8 @@ #endif /* - * Network & Ethernet Configuration - */ -#ifdef CONFIG_DRIVER_TI_EMAC -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -/* * U-Boot general configuration */ -#define CONFIG_BOOTFILE "zImage" /* Boot file name */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */ @@ -179,10 +171,6 @@ "boot_fit=0\0" \ "console=ttyS2,115200n8\0" -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - /* SD/MMC */ /* defines for SPL */ diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index ac8eb05..1f28871 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -12,10 +12,6 @@ #ifdef CONFIG_SPL #include "imx6_spl.h" - -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_REGULATOR -#endif #endif /* Miscellaneous configurable options */ @@ -41,7 +37,6 @@ /* LCD */ #ifndef CONFIG_SPL_BUILD #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif #endif @@ -49,18 +44,17 @@ /* Environment is stored in the eMMC boot partition */ #define CONFIG_ENV_VERSION 100 -#define CONFIG_BOARD_NAME opos6ul #define ACFG_CONSOLE_DEV ttymxc0 #define CONFIG_SYS_AUTOLOAD "no" -#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root" +#define CONFIG_ROOTPATH "/tftpboot/opos6ul-root" #define CONFIG_EXTRA_ENV_SETTINGS \ "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \ "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \ - "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \ + "board_name=opos6ul\0" \ "fdt_addr=0x88000000\0" \ "fdt_high=0xffffffff\0" \ - "fdt_name=" __stringify(CONFIG_BOARD_NAME) "dev\0" \ + "fdt_name=opos6uldev\0" \ "initrd_high=0xffffffff\0" \ "ip_dyn=yes\0" \ "stdin=serial\0" \ @@ -70,7 +64,7 @@ "mmcpart=2\0" \ "mmcroot=/dev/mmcblk0p2 ro\0" \ "mmcrootfstype=ext4 rootwait\0" \ - "kernelimg=" __stringify(CONFIG_BOARD_NAME) "-linux.bin\0" \ + "kernelimg=opos6ul-linux.bin\0" \ "splashpos=0,0\0" \ "splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "videomode=video=ctfb:x:800,y:480,depth:18,pclk:33033,le:96,ri:96,up:20,lo:21,hs:64,vs:4,sync:0,vmode:0\0" \ diff --git a/include/configs/origen.h b/include/configs/origen.h index 1caeed6..278c204 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -21,8 +21,6 @@ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - /* Power Down Modes */ #define S5P_CHECK_SLEEP 0x00000BAD #define S5P_CHECK_DIDLE 0xBAD00000 @@ -46,8 +44,6 @@ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" -#define CONFIG_CLK_1000_400_200 - /* MIU (Memory Interleaving Unit) */ #define CONFIG_MIU_2BIT_21_7_INTERLEAVED @@ -58,9 +54,4 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 -/* U-Boot copy size from boot Media to DRAM.*/ -#define COPY_BL2_SIZE 0x80000 -#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) -#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) - #endif /* __CONFIG_H */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 92008cd..c2fc3b0 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -13,7 +13,6 @@ #include <linux/stringify.h> #if defined(CONFIG_TARGET_P1020RDB_PC) -#define CONFIG_BOARDNAME "P1020RDB-PC" #define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 @@ -39,7 +38,6 @@ * 011101 800 800 400 667 PCIe-2 Core0 boot; Core1 hold-off */ #if defined(CONFIG_TARGET_P1020RDB_PD) -#define CONFIG_BOARDNAME "P1020RDB-PD" #define CONFIG_VSC7385_ENET #define CONFIG_SLIC #define __SW_BOOT_MASK 0x03 @@ -55,7 +53,6 @@ #endif #if defined(CONFIG_TARGET_P2020RDB) -#define CONFIG_BOARDNAME "P2020RDB-PC" #define CONFIG_VSC7385_ENET #define __SW_BOOT_MASK 0x03 #define __SW_BOOT_NOR 0xc8 @@ -125,16 +122,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc #endif -#ifndef CONFIG_SYS_MONITOR_BASE -#ifdef CONFIG_TPL_BUILD -#define CONFIG_SYS_MONITOR_BASE 0xf8f81000 -#elif defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE -#else -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ -#endif -#endif - #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ @@ -145,7 +132,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE -#define CONFIG_BTB #define CONFIG_ENABLE_36BIT_PHYS @@ -165,10 +151,8 @@ #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 #else #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #endif #define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 @@ -327,9 +311,6 @@ #define CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE #endif /* CPLD config size: 1Mb */ -#define CONFIG_CPLD_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) | \ - BR_PS_8 | BR_V) -#define CONFIG_CPLD_OR_PRELIM (0xfff009f7) #define CONFIG_SYS_PMC_BASE 0xff980000 #define CONFIG_SYS_PMC_BASE_PHYS CONFIG_SYS_PMC_BASE @@ -488,12 +469,6 @@ #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 #define TSEC3_PHYIDX 0 - -#define CONFIG_ETHPRIME "eTSEC1" - -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 -#define CONFIG_HAS_ETH2 #endif /* CONFIG_TSEC_ENET */ /* @@ -549,7 +524,6 @@ */ #define CONFIG_HOSTNAME "unknown" #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ #ifdef __SW_BOOT_NOR diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h index bcc0781..ef3b0f7 100644 --- a/include/configs/pic32mzdask.h +++ b/include/configs/pic32mzdask.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_SDRAM_BASE 0x88000000 #define CONFIG_SYS_BOOTPARAMS_LEN (4 << 10) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Memory Test */ @@ -44,18 +43,6 @@ */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -/*----------------------------------------------------------------------- - * Networking Configuration - */ -#define CONFIG_SYS_RX_ETH_BUFFER 8 -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_ARP_TIMEOUT 500 /* millisec */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /*-------------------------------------------------- * USB Configuration */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index 4700fff..536e07b 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -130,12 +130,9 @@ /* Ethernet Configuration */ #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1 /* Framebuffer */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index d87bcf4..2646f19 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -29,7 +29,6 @@ #define IMX_FEC_BASE ENET2_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR @@ -130,7 +129,6 @@ #define CONFIG_BOARD_SIZE_LIMIT 715776 #ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_BMP_LOGO #define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR #endif diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index eb87073..a90befc 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -119,10 +119,6 @@ #define CONFIG_POWER_PFUZE3000 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 -#ifdef CONFIG_DM_VIDEO -#define CONFIG_VIDEO_BMP_LOGO -#endif - /* FLASH and environment organization */ /* Environment starts at 768k = 768 * 1024 = 786432 */ diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 7bfa790..a7ad4f3 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -25,16 +25,11 @@ #define CONFIG_MALLOC_F_ADDR 0x182000 /* For RAW image gives a error info not panic */ #define CONFIG_SPL_ABORT_ON_RAW_IMAGE - -#undef CONFIG_DM_MMC #endif /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "FEC" - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 1 #define FEC_QUIRK_ENET_MAC diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index f3196ee..1db8279 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -130,17 +130,6 @@ /* LCD */ #define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO 1 -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO 1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_BGR555 1 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 /* SDRAM */ #define PHYS_SDRAM 0x20000000 @@ -171,35 +160,13 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#undef CONFIG_SYS_USE_DATAFLASH_CS0 -#undef CONFIG_SYS_USE_NANDFLASH -#define CONFIG_SYS_USE_FLASH 1 - -#ifdef CONFIG_SYS_USE_DATAFLASH_CS0 - -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ - -#elif defined(CONFIG_SYS_USE_NANDFLASH) /* CONFIG_SYS_USE_NANDFLASH */ - -/* bootstrap + u-boot + env + linux in nandflash */ - -#elif defined (CONFIG_SYS_USE_FLASH) -/* JFFS Partition offset set */ -#define CONFIG_SYS_JFFS2_FIRST_BANK 0 -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - -/* 512k reserved for u-boot */ -#define CONFIG_SYS_JFFS2_FIRST_SECTOR 11 - -#define CONFIG_CON_ROT "fbcon=rotate:3 " - #define CONFIG_EXTRA_ENV_SETTINGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ - CONFIG_CON_ROT \ + "fbcon=rotate:3 " \ "nfsroot=$(serverip):$(rootpath) $(mtdparts)\0" \ "addip=setenv bootargs $(bootargs) " \ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"\ @@ -210,9 +177,6 @@ "run nfsargs;run addip;bootm 22000000\0" \ "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ "" -#else -#error "Undefined memory device" -#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 4856f61..143e9f5 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -141,19 +141,6 @@ */ /* LCD */ #define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO 1 -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO 1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_BGR555 1 - -#define CONFIG_LCD_IN_PSRAM 1 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 /* SDRAM */ #define PHYS_SDRAM 0x20000000 @@ -196,37 +183,13 @@ #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_SYS_USE_FLASH 1 -#undef CONFIG_SYS_USE_DATAFLASH -#undef CONFIG_SYS_USE_NANDFLASH - -#ifdef CONFIG_SYS_USE_DATAFLASH - -/* bootstrap + u-boot + env + linux in dataflash on CS0 */ - -#elif defined(CONFIG_SYS_USE_NANDFLASH) /* CFG_USE_NANDFLASH */ - -/* bootstrap + u-boot + env + linux in nandflash */ - -#elif defined(CONFIG_SYS_USE_FLASH) /* CFG_USE_FLASH */ -/* JFFS Partition offset set */ -#define CONFIG_SYS_JFFS2_FIRST_BANK 0 -#define CONFIG_SYS_JFFS2_NUM_BANKS 1 - -/* 512k reserved for u-boot */ -#define CONFIG_SYS_JFFS2_FIRST_SECTOR 11 - -#define CONFIG_ROOTPATH "/ronetix/rootfs" - -#define CONFIG_CON_ROT "fbcon=rotate:3 " - #define CONFIG_EXTRA_ENV_SETTINGS \ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "partition=nand0,0\0" \ "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ - CONFIG_CON_ROT \ + "fbcon=rotate:3 " \ "nfsroot=$(serverip):$(rootpath) $(mtdparts)\0" \ "addip=setenv bootargs $(bootargs) " \ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"\ @@ -238,10 +201,6 @@ "flashboot=run ramargs;run addip;bootm 0x10050000\0" \ "" -#else -#error "Undefined memory device" -#endif - #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - \ GENERATED_GBL_DATA_SIZE) diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index b205391..b858aaa 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -19,14 +19,6 @@ #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE 0x70000000 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 @@ -47,10 +39,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD3 #endif -/* Ethernet */ -#define CONFIG_RESET_PHY_R -#define CONFIG_AT91_WANTS_COMMON_PHY - #ifdef CONFIG_NAND_BOOT /* bootstrap + u-boot + env in nandflash */ #elif CONFIG_SD_BOOT @@ -83,7 +71,6 @@ 56, 57, 58, 59, 60, 61, 62, 63, } #endif -#define CONFIG_SPL_ATMEL_SIZE #define CONFIG_SYS_MASTER_CLOCK 132096000 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 #define CONFIG_SYS_MCKR 0x1301 diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 51c802f..cb22150 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -31,8 +31,5 @@ */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#ifdef CONFIG_RESET_PHY_R -#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ -#endif #endif /* _CONFIG_POGO_E02_H */ diff --git a/include/configs/pogo_v4.h b/include/configs/pogo_v4.h index f8555f6..3365ebe 100644 --- a/include/configs/pogo_v4.h +++ b/include/configs/pogo_v4.h @@ -38,9 +38,6 @@ */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0 -#ifdef CONFIG_RESET_PHY_R -#undef CONFIG_RESET_PHY_R /* remove legacy reset_phy() */ -#endif /* * Support large disk for SATA and USB diff --git a/include/configs/pomelo.h b/include/configs/pomelo.h new file mode 100644 index 0000000..cdd6cdb --- /dev/null +++ b/include/configs/pomelo.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2021 + * lixinde <lixinde@phytium.com.cn> + * weichangzheng <weichangzheng@phytium.com.cn> + */ + +#ifndef __POMELO_CONFIG_H__ +#define __POMELO_CONFIG_H__ + +/* SDRAM Bank #1 start address */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + +/* SIZE of malloc pool */ +#define CONFIG_SYS_INIT_SP_ADDR (0x29800000 + 0x1a000) + +/*BOOT*/ +#define CONFIG_SYS_BOOTM_LEN 0x3c00000 + +#ifndef CONFIG_SPL_BUILD +#define BOOT_TARGET_DEVICES(func) \ + func(SCSI, scsi, 0) \ + +#include <config_distro_bootcmd.h> +#endif + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "image=Image\0" \ + BOOTENV \ + "scriptaddr=0x90100000\0" \ + "kernel_addr_r=0x90200000\0" \ + "fdt_addr_r=0x95000000\0" \ + "boot_fit=no\0" \ + "fdtfile=phytium-pomelo.dtb\0" \ + +#endif + diff --git a/include/configs/porter.h b/include/configs/porter.h index 867dada..661b7ea 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -32,7 +32,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index 30185b1..3295d43 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -36,9 +36,6 @@ #define CONFIG_SYS_SERIAL0 PER_UART0_CFG #define CONFIG_SYS_SERIAL1 PER_UART1_CFG -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* SDRAM Bank #1 */ #define DDR_BASE 0x00000000 #define PHYS_SDRAM_1 DDR_BASE diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h index 753fc14..7272470 100644 --- a/include/configs/pxm2.h +++ b/include/configs/pxm2.h @@ -74,12 +74,4 @@ #endif #endif /* CONFIG_SPL_BUILD */ -#if defined(CONFIG_VIDEO) -#define CONFIG_VIDEO_DA8XX -#define CONFIG_VIDEO_BMP_LOGO -#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE -#define PWM_TICKS 0x1388 -#define PWM_DUTY 0x200 -#endif - #endif /* ! __CONFIG_PXM2_H */ diff --git a/include/configs/qemu-arm.h b/include/configs/qemu-arm.h index d45f606..4f042e5 100644 --- a/include/configs/qemu-arm.h +++ b/include/configs/qemu-arm.h @@ -65,8 +65,6 @@ #define CONFIG_SYS_CBSIZE 512 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MAX_FLASH_SECT 256 /* Sector: 256K, Bank: 64M */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #endif /* __CONFIG_H */ diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index e257c0e..136a2df 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -43,12 +43,8 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 0 - #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_HWCONFIG #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000 @@ -93,7 +89,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); * Environment Configuration */ #define CONFIG_ROOTPATH "/opt/nfsroot" -#define CONFIG_BOOTFILE "uImage" #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ #endif /* __QEMU_PPCE500_H */ diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 04b3481..869f9f5 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -13,7 +13,6 @@ #define CONFIG_SYS_PBSIZE 256 /* Address of u-boot image in Flash */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) #define CONFIG_SYS_MONITOR_LEN (256 * 1024) #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h index f1f5d07..9bc2443 100644 --- a/include/configs/rcar-gen2-common.h +++ b/include/configs/rcar-gen2-common.h @@ -25,19 +25,8 @@ #define CONFIG_SYS_SDRAM_BASE (RCAR_GEN2_SDRAM_BASE) #define CONFIG_SYS_SDRAM_SIZE (RCAR_GEN2_UBOOT_SDRAM_SIZE) -#define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) -/* ENV setting */ - -/* Common ENV setting */ - -/* SF MTD */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH -#endif - /* Timer */ #define CONFIG_TMU_TIMER #define CONFIG_SYS_TIMER_COUNTS_DOWN diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 07a30d0..2422f03 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -41,7 +41,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE) -#define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (1 * 1024 * 1024) #define CONFIG_SYS_BOOTM_LEN (64 << 20) diff --git a/include/configs/rpi.h b/include/configs/rpi.h index d5e064f..7a5f085 100644 --- a/include/configs/rpi.h +++ b/include/configs/rpi.h @@ -41,10 +41,7 @@ #endif /* Devices */ -/* GPIO */ -#define CONFIG_BCM2835_GPIO /* LCD */ -#define CONFIG_VIDEO_BCM2835 /* DFU over USB/UDC */ #ifdef CONFIG_CMD_DFU diff --git a/include/configs/rut.h b/include/configs/rut.h index 02d330e..b30b12a 100644 --- a/include/configs/rut.h +++ b/include/configs/rut.h @@ -67,14 +67,4 @@ #endif /* CONFIG_SPL_BUILD */ -#if defined(CONFIG_VIDEO) -#define CONFIG_VIDEO_DA8XX -#define CONFIG_VIDEO_BMP_LOGO -#define DA8XX_LCD_CNTL_BASE LCD_CNTL_BASE - -#define BOARD_LCD_RESET 115 /* Bank 3 pin 19 */ -#define CONFIG_FORMIKE -#define DISPL_PLL_SPREAD_SPECTRUM -#endif - #endif /* ! __CONFIG_RUT_H */ diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 632fc0c..882d19a 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -19,7 +19,6 @@ * System memory Configuration */ #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MEM_SIZE 0x40000000 #define CONFIG_SYS_SDRAM_BASE 0x71000000 @@ -89,12 +88,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /*----------------------------------------------------------------------- - * Etc Command definition - */ -#undef CONFIG_BOOTM_NETBSD -#undef CONFIG_BOOTM_RTEMS - -/*----------------------------------------------------------------------- * serial console configuration */ #define CONFIG_PL011_CLOCK 50000000 diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index e3b091a..0ec60ca 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -134,7 +134,6 @@ #define PHYS_SDRAM_3 0x50000000 /* mDDR DMC2 Bank #2 */ #define PHYS_SDRAM_3_SIZE (128 << 20) /* 128 MB in Bank #2 */ -#define CONFIG_SYS_MONITOR_BASE 0x00000000 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ /* FLASH and environment organization */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index 29adab3..8cbdbc7 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -26,8 +26,6 @@ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ #define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h index 9542b0d..764bc1b 100644 --- a/include/configs/salvator-x.h +++ b/include/configs/salvator-x.h @@ -11,15 +11,11 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/sam9x60ek.h b/include/configs/sam9x60ek.h index eb96e50..772805d 100644 --- a/include/configs/sam9x60ek.h +++ b/include/configs/sam9x60ek.h @@ -17,14 +17,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID 0 /* ignored in arm */ -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* * define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0) * NB: in this case, USB 1.1 devices won't be recognized. diff --git a/include/configs/sama7g5ek.h b/include/configs/sama7g5ek.h index 2aec9ff..bca7166 100644 --- a/include/configs/sama7g5ek.h +++ b/include/configs/sama7g5ek.h @@ -24,7 +24,4 @@ GENERATED_GBL_DATA_SIZE) #endif -#define CONFIG_ARP_TIMEOUT 200 -#define CONFIG_NET_RETRY_COUNT 50 - #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 75efbf3..71b4799 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -20,7 +20,6 @@ #define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_SDRAM_SIZE \ (SB_TO_UL(CONFIG_SANDBOX_RAM_SIZE_MB) << 20) -#define CONFIG_SYS_MONITOR_BASE 0 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 115200} diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index 615458c..bfadf4a 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -104,13 +104,6 @@ */ #ifndef CONFIG_SPL_BUILD -/* - * USB configuration - */ -#define CONFIG_AM335X_USB0 -#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL -#define CONFIG_AM335X_USB1 -#define CONFIG_AM335X_USB1_MODE MUSB_HOST /* USB DRACO ID as default */ #define CONFIG_USBD_HS @@ -133,8 +126,6 @@ * 0x442000 - 0x800000 : Userland */ -#define CONFIG_NET_RETRY_COUNT 10 - /* NAND support */ #ifdef CONFIG_MTD_RAW_NAND /* UBI Support */ @@ -414,8 +405,4 @@ #endif #endif -/* Reboot after 60 sec if bootcmd fails */ -#define CONFIG_RESET_TO_RETRY -#define CONFIG_BOOT_RETRY_TIME 60 - #endif /* ! __CONFIG_SIEMENS_AM33X_COMMON_H */ diff --git a/include/configs/silinux-ek874.h b/include/configs/silinux-ek874.h index 25c0cd2..a99babb 100644 --- a/include/configs/silinux-ek874.h +++ b/include/configs/silinux-ek874.h @@ -11,9 +11,6 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ diff --git a/include/configs/silk.h b/include/configs/silk.h index 29350a6..fa195c6 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -32,7 +32,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 8bfd1fc..aca7870 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -46,7 +46,6 @@ /* setting board specific options */ #define CONFIG_SYS_AUTOLOAD "yes" -#define CONFIG_RESET_TO_RETRY /* The LED PINs */ #define CONFIG_RED_LED AT91_PIN_PA9 @@ -73,25 +72,10 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ - /* serial console */ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS -/* - * Ethernet configuration - * - */ -#define CONFIG_RMII /* use reduced MII inteface */ -#define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */ -#define CONFIG_AT91_WANTS_COMMON_PHY - -/* BOOTP and DHCP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - #if !defined(CONFIG_SPL_BUILD) /* USB configuration */ #define CONFIG_USB_ATMEL @@ -150,7 +134,6 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) -#define CONFIG_SYS_USE_NANDFLASH 1 #define CONFIG_SPL_NAND_RAW_ONLY #define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K @@ -164,7 +147,6 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } -#define CONFIG_SPL_ATMEL_SIZE #define CONFIG_SYS_MASTER_CLOCK (198656000/2) #define AT91_PLL_LOCK_TIMEOUT 1000000 #define CONFIG_SYS_AT91_PLLA 0x2060bf09 diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index d7e86f2..1ea3b65 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -15,6 +15,4 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 38691b6..f26995d 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -15,8 +15,6 @@ #undef CONFIG_EXYNOS_FB #undef CONFIG_EXYNOS_DP -#define CONFIG_BOARD_COMMON - #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ #define CONFIG_SYS_SDRAM_BASE 0x20000000 diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 28ff48b..4401094 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -97,8 +97,6 @@ #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE (128 << 20) /* 0x8000000, 128 MB Bank #1 */ -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - /*----------------------------------------------------------------------- * FLASH and environment organization */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index f113fa4..9ff05fc 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -10,7 +10,6 @@ #include "exynos4-common.h" -#undef CONFIG_BOARD_COMMON #undef CONFIG_USB_GADGET_DWC2_OTG_PHY /* High Level Configuration Options */ @@ -39,8 +38,6 @@ /* FLASH and environment organization */ -#define CONFIG_CLK_1000_400_200 - /* MIU (Memory Interleaving Unit) */ #define CONFIG_MIU_2BIT_INTERLEAVED @@ -51,11 +48,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 -/* U-Boot copy size from boot Media to DRAM.*/ -#define COPY_BL2_SIZE 0x80000 -#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) -#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) - /* Ethernet Controllor Driver */ #ifdef CONFIG_CMD_NET #define CONFIG_ENV_SROM_BANK 1 diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 10f8fde..f7ee9db 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -37,13 +37,6 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -/* Ethernet */ -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R -#define CONFIG_AT91_WANTS_COMMON_PHY -#define CONFIG_TFTP_PORT - /* USB */ #define CONFIG_USB_ATMEL #define CONFIG_USB_ATMEL_CLK_SEL_PLLB @@ -54,8 +47,6 @@ #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 /* GPIOs and IO expander */ -#define CONFIG_ATMEL_LEGACY -#define CONFIG_AT91_GPIO_PULLUP 1 #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_ADDR 0x28 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x28, 16} } @@ -91,8 +82,6 @@ /* Boot options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Environment settings */ /* Console settings */ diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h index 3889a88..0e3567f 100644 --- a/include/configs/snapper9g45.h +++ b/include/configs/snapper9g45.h @@ -38,27 +38,10 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 -/* Ethernet */ -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R -#define CONFIG_AT91_WANTS_COMMON_PHY -#define CONFIG_TFTP_PORT - -/* LCD */ -#define CONFIG_ATMEL_LCD -#define CONFIG_GURNARD_SPLASH - -/* GPIOs and IO expander */ -#define CONFIG_ATMEL_LEGACY -#define CONFIG_AT91_GPIO_PULLUP 1 - /* UARTs/Serial console */ /* Boot options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Environment settings */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/snow.h b/include/configs/snow.h index c082b2d8..00d9b4d 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -15,6 +15,4 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SNOW_H */ diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h index 0935eae..88fd8ae 100644 --- a/include/configs/socfpga_arria5_secu1.h +++ b/include/configs/socfpga_arria5_secu1.h @@ -24,23 +24,11 @@ */ #define CONFIG_SYS_I2C_RTC_ADDR 0x68 -/* Booting Linux */ -#define CONFIG_BOOTFILE "zImage" - #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Environment settings */ /* - * Autoboot - * - * After 45s of inactivity in the prompt, the board will reset. - * Set 'bootretry' in the environment to -1 to disable this behavior - */ -#define CONFIG_BOOT_RETRY_TIME 45 -#define CONFIG_RESET_TO_RETRY - -/* * FPGA Remote Update related environment * * Note that since those commands access the FPGA, the HPS-to-FPGA diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 5294494..e094bef 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -8,11 +8,6 @@ #include <linux/stringify.h> /* - * High level configuration - */ -#define CONFIG_CLOCKS - -/* * Memory configurations */ #define PHYS_SDRAM_1 0x0 diff --git a/include/configs/socfpga_dbm_soc1.h b/include/configs/socfpga_dbm_soc1.h index 8acddbe..8f1c2de 100644 --- a/include/configs/socfpga_dbm_soc1.h +++ b/include/configs/socfpga_dbm_soc1.h @@ -10,9 +10,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" - /* Environment is in MMC */ /* Extra Environment */ diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index 06337d4..468a35d 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -11,13 +11,7 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x10000000 -/* Booting Linux */ -#define CONFIG_BOOTFILE "zImage" - /* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_ARP_TIMEOUT 500UL -#endif /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_mcvevk.h b/include/configs/socfpga_mcvevk.h index 3aa231c..e76438e 100644 --- a/include/configs/socfpga_mcvevk.h +++ b/include/configs/socfpga_mcvevk.h @@ -10,9 +10,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on MCV */ -/* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" - /* Environment is in MMC */ /* Extra Environment */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index 51dc2e4..b810567 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -14,7 +14,6 @@ /* * U-Boot general configurations */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* sysmgr.boot_scratch_cold4 & 5 (64bit) will be used for PSCI_CPU_ON call */ #define CPU_RELEASE_ADDR 0xFFD12210 @@ -72,13 +71,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * Environment variable */ - -#ifdef CONFIG_FIT -#define CONFIG_BOOTFILE "kernel.itb" -#else -#define CONFIG_BOOTFILE "Image" -#endif - #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "bootfile=" CONFIG_BOOTFILE "\0" \ @@ -144,9 +136,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* * L4 Watchdog */ -#ifndef CONFIG_SPL_BUILD -#undef CONFIG_DESIGNWARE_WATCHDOG -#endif #define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 #ifndef __ASSEMBLY__ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 2905e0e..8469b15 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -11,7 +11,6 @@ #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */ /* Booting Linux */ -#define CONFIG_BOOTFILE "fitImage" #define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MiB */ /* Extra Environment */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index a51a162..687e3a8 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -42,7 +42,6 @@ * These can be toggled for performance analysis, otherwise use default. */ #define CONFIG_L2_CACHE /* toggle L2 cache */ -#define CONFIG_BTB /* toggle branch predition */ #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ @@ -61,7 +60,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ @@ -98,8 +96,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ - #define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ #define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ @@ -157,10 +153,6 @@ #define TSEC3_FLAGS TSEC_GIGABIT /* Options are: TSEC[0,1] */ -#define CONFIG_ETHPRIME "TSEC0" - -#define CONFIG_HAS_ETH0 -#define CONFIG_HAS_ETH1 /* * Environment @@ -170,11 +162,6 @@ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ /* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* * Miscellaneous configurable options */ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index 768e33d..9946fe9 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -80,8 +80,6 @@ #ifdef CONFIG_CMD_NET #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x1 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "eth0" #endif #endif diff --git a/include/configs/spring.h b/include/configs/spring.h index 0b05245..2f0a580 100644 --- a/include/configs/spring.h +++ b/include/configs/spring.h @@ -10,6 +10,4 @@ #include <configs/exynos5-dt-common.h> #include <configs/exynos5-common.h> -#define CONFIG_BOARD_COMMON - #endif /* __CONFIG_SPRING_H */ diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 4c464cf..3e6feae 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -31,7 +31,6 @@ func(USB, usb, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#define CONFIG_BOOTFILE "uImage" #define CONFIG_EXTRA_ENV_SETTINGS \ "kernel_addr_r=0x40000000\0" \ "fdtfile=stih410-b2260.dtb\0" \ diff --git a/include/configs/stm32mp15_common.h b/include/configs/stm32mp15_common.h index 175d546..6b40cdb 100644 --- a/include/configs/stm32mp15_common.h +++ b/include/configs/stm32mp15_common.h @@ -10,12 +10,6 @@ #include <linux/sizes.h> #include <asm/arch/stm32.h> -#ifdef CONFIG_ARMV7_PSCI -/* PSCI support */ -#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE -#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE -#endif - /* * Configuration of the external SRAM memory used by U-Boot */ diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index 9d9ac03..72f07e1 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -35,17 +35,9 @@ "" /* Realtime clock */ -#undef CONFIG_MCFRTC #define CONFIG_RTC_MCFRRTC #define CONFIG_SYS_MCFRRTC_BASE 0xFC0A8000 -/* Timer */ -#define CONFIG_MCFTMR - -/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI -#define CONFIG_SERIAL_FLASH - #define CONFIG_SYS_SBFHDR_SIZE 0x7 /* Input, PCI, Flexbus, and VCO */ @@ -89,12 +81,6 @@ #define CONFIG_SERIAL_BOOT #endif -#if defined(CONFIG_SERIAL_BOOT) -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) -#else -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif - #define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) /* Reserve 256 kB for Monitor */ #define CONFIG_SYS_MONITOR_LEN (256 << 10) @@ -132,18 +118,11 @@ CONFIG_SYS_INIT_RAM_SIZE - 12) #ifdef CONFIG_MCFFEC -#define CONFIG_MII_INIT 1 #define CONFIG_SYS_DISCOVER_PHY -#define CONFIG_SYS_RX_ETH_BUFFER 8 -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ #ifndef CONFIG_SYS_DISCOVER_PHY #define FECDUPLEX FULL #define FECSPEED _100BASET -#else -#ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -#endif #endif /* CONFIG_SYS_DISCOVER_PHY */ #endif #endif /* __STMARK2_CONFIG_H */ diff --git a/include/configs/stout.h b/include/configs/stout.h index df2d967..f9574be 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -36,7 +36,6 @@ #define CONFIG_SH_ETHER_CACHE_WRITEBACK #define CONFIG_SH_ETHER_CACHE_INVALIDATE #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 -#define CONFIG_BITBANGMII_MULTI /* Board Clock */ diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index dd94216..feec869 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -29,9 +29,6 @@ #define CONFIG_DW_ALTDESCRIPTOR -/* Command support defines */ -#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ - /* Misc configuration */ /* diff --git a/include/configs/sun6i.h b/include/configs/sun6i.h index 1e490da..0b1fedd 100644 --- a/include/configs/sun6i.h +++ b/include/configs/sun6i.h @@ -11,13 +11,6 @@ #define __CONFIG_H /* - * A31 specific configuration - */ - -#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE -#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ - -/* * Include common sunxi configuration where most the settings are */ #include <configs/sunxi-common.h> diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 803a751..bc2779f 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -9,13 +9,6 @@ #define __CONFIG_H /* - * A20 specific configuration - */ - -#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE -#define CONFIG_ARMV7_SECURE_MAX_SIZE (64 * 1024) /* 64 KB */ - -/* * Include common sunxi configuration where most the settings are */ #include <configs/sunxi-common.h> diff --git a/include/configs/sun8i.h b/include/configs/sun8i.h index 5636356..106139d 100644 --- a/include/configs/sun8i.h +++ b/include/configs/sun8i.h @@ -14,16 +14,6 @@ #include <asm/arch/cpu.h> -#ifdef SUNXI_SRAM_A2_SIZE -/* - * If the SoC has enough SRAM A2, use that for the secure monitor. - * Skip the first 16 KiB of SRAM A2, which is not usable, as only certain bytes - * are writable. Reserve the last 17 KiB for the resume shim and SCP firmware. - */ -#define CONFIG_ARMV7_SECURE_BASE (SUNXI_SRAM_A2_BASE + 16 * 1024) -#define CONFIG_ARMV7_SECURE_MAX_SIZE (SUNXI_SRAM_A2_SIZE - 33 * 1024) -#endif - /* * Include common sunxi configuration where most the settings are */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 4bab917..c467e9b 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -50,26 +50,15 @@ #ifdef CONFIG_MACH_SUN9I #define SDRAM_OFFSET(x) 0x2##x #define CONFIG_SYS_SDRAM_BASE 0x20000000 -/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here - * since it needs to fit in with the other values. By also #defining it - * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000 #elif defined(CONFIG_MACH_SUNIV) #define SDRAM_OFFSET(x) 0x8##x #define CONFIG_SYS_SDRAM_BASE 0x80000000 -/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here - * since it needs to fit in with the other values. By also #defining it - * we get warnings if the Kconfig value mismatches. - */ -#define CONFIG_SPL_STACK_R_ADDR 0x81e00000 #define CONFIG_SPL_BSS_START_ADDR 0x81f80000 #else #define SDRAM_OFFSET(x) 0x4##x #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* V3s do not have enough memory to place code at 0x4a000000 */ -/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here - * since it needs to fit in with the other values. By also #defining it - * we get warnings if the Kconfig value mismatches. */ #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000 #endif diff --git a/include/configs/taurus.h b/include/configs/taurus.h index e4609b5..77d80bf 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -34,10 +34,6 @@ /* Misc CPU related */ -/* general purpose I/O */ -#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ -#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ - #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS @@ -67,10 +63,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 #endif -/* Ethernet */ -#define CONFIG_RMII -#define CONFIG_AT91_WANTS_COMMON_PHY - /* USB */ #if defined(CONFIG_BOARD_TAURUS) #define CONFIG_USB_ATMEL @@ -160,7 +152,6 @@ #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) -#define CONFIG_SYS_USE_NANDFLASH 1 #define CONFIG_SPL_NAND_RAW_ONLY #define CONFIG_SPL_NAND_SOFTECC #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K @@ -174,7 +165,6 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63, } -#define CONFIG_SPL_ATMEL_SIZE #define CONFIG_SYS_MASTER_CLOCK 132096000 #define AT91_PLL_LOCK_TIMEOUT 1000000 #define CONFIG_SYS_AT91_PLLA 0x202A3F01 diff --git a/include/configs/tb100.h b/include/configs/tb100.h index 6e31bd5..09766fe 100644 --- a/include/configs/tb100.h +++ b/include/configs/tb100.h @@ -11,7 +11,6 @@ /* * Memory configuration */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE @@ -46,11 +45,6 @@ #define ETH1_BASE_ADDRESS 0xFE110000 /* - * Environment configuration - */ -#define CONFIG_BOOTFILE "uImage" - -/* * Console configuration */ diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 7cb8d64..d9d89b6 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -95,14 +95,4 @@ #define CONFIG_TEGRA_SPI #endif -/* overrides for SPL build here */ -#ifdef CONFIG_SPL_BUILD - -/* remove USB */ -#ifdef CONFIG_USB_EHCI_TEGRA -#undef CONFIG_USB_EHCI_TEGRA -#endif - -#endif /* CONFIG_SPL_BUILD */ - #endif /* __TEGRA_COMMON_POST_H */ diff --git a/include/configs/ten64.h b/include/configs/ten64.h index 54e65f2..1a62ddf 100644 --- a/include/configs/ten64.h +++ b/include/configs/ten64.h @@ -9,7 +9,6 @@ #include "ls1088a_common.h" -#define CONFIG_SYS_CLK_FREQ 100000000 #define COUNTER_FREQUENCY 25000000 /* 25MHz */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 3d770f8..d07a8fe 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_SERIAL0 0x87e024000000 #define CONFIG_SYS_SERIAL1 0x87e025000000 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ /* Physical Memory Map */ diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 0f786ab..95434aa 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -114,7 +114,6 @@ */ /* Ethernet */ -#define CONFIG_NET_RETRY_COUNT 10 #define CONFIG_PHY_ET1011C_TX_CLK_FIX #endif /* ! __CONFIG_TI814X_EVM_H */ diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index 533673b..c2dfdeb 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -68,18 +68,4 @@ #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) -#define CONFIG_NET_RETRY_COUNT 10 - -/* Since SPL did pll and ddr initialization for us, - * we don't need to do it twice. - */ - -/* - * Disable MMC DM for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_DM_MMC -#undef CONFIG_TIMER -#endif #endif diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 10da123..f8bd555 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -25,11 +25,6 @@ #endif #define CONFIG_SYS_NS16550_CLK 48000000 -#ifndef CONFIG_SPL_BUILD -/* Network defines. */ -#define CONFIG_NET_RETRY_COUNT 10 -#endif - /* * SPL related defines. The Public RAM memory map the ROM defines the * area between 0x402F0400 and 0x4030B800 as a download area and diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 0243016..57f013c 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -63,7 +63,6 @@ #define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6) /* Network Configuration */ -#define CONFIG_NET_RETRY_COUNT 32 #define CONFIG_SYS_SGMII_REFCLK_MHZ 312 #define CONFIG_SYS_SGMII_LINERATE_MHZ 1250 #define CONFIG_SYS_SGMII_RATESCALE 2 diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 270ef95..714a1c5 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -307,8 +307,5 @@ #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_TIMER -#endif #endif /* __CONFIG_TI_OMAP5_COMMON_H */ diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h index ba6c3f0..f859656 100644 --- a/include/configs/topic_miami.h +++ b/include/configs/topic_miami.h @@ -17,18 +17,10 @@ /* Fixup settings */ /* SPL settings */ -#undef CONFIG_SPL_ETH #undef CONFIG_SPL_MAX_FOOTPRINT #define CONFIG_SPL_MAX_FOOTPRINT CONFIG_SYS_SPI_U_BOOT_OFFS #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" -/* FPGA commands that we don't use */ - -/* Extras */ - -/* Faster flash, ours may run at 108 MHz */ -#undef CONFIG_SPI_FLASH_WINBOND - /* Setup proper boot sequences for Miami boards */ #if defined(CONFIG_USB_HOST) diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h index 4d5b470..21c351a 100644 --- a/include/configs/tplink_wdr4300.h +++ b/include/configs/tplink_wdr4300.h @@ -9,8 +9,6 @@ #define CONFIG_SYS_MHZ 280 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 #define CONFIG_SYS_SDRAM_BASE 0xa0000000 diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 633b100..c11e5c1 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -57,8 +57,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_ARP_TIMEOUT 200UL - #if defined(CONFIG_TQMA6X_MMC_BOOT) #define TQMA6_UBOOT_OFFSET SZ_1K diff --git a/include/configs/tqma6_mba6.h b/include/configs/tqma6_mba6.h index a19ea35..899c218 100644 --- a/include/configs/tqma6_mba6.h +++ b/include/configs/tqma6_mba6.h @@ -9,9 +9,6 @@ #ifndef __CONFIG_TQMA6_MBA6_H #define __CONFIG_TQMA6_MBA6_H -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" - #define CONFIG_FEC_MXC_PHYADDR 0x03 #define CONFIG_MXC_UART_BASE UART2_BASE diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h index e68e96d..90db965 100644 --- a/include/configs/tqma6_wru4.h +++ b/include/configs/tqma6_wru4.h @@ -7,8 +7,6 @@ #define __CONFIG_TQMA6_WRU4_H /* Ethernet */ -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 0x01 /* UART */ diff --git a/include/configs/trats.h b/include/configs/trats.h index 5217400..41ac609 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -30,8 +30,6 @@ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - /* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOT "boot" diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 8d4b782..a980e6c 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -29,8 +29,6 @@ #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ -#define CONFIG_SYS_MONITOR_BASE 0x00000000 - /* Tizen - partitions definitions */ #define PARTS_CSA "csa-mmc" #define PARTS_BOOT "boot" diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h index 3cfad7c..dc2fdcc 100644 --- a/include/configs/turris_mox.h +++ b/include/configs/turris_mox.h @@ -21,9 +21,6 @@ 4000000, 4500000, 5000000, 5500000, \ 6000000 } -#define CONFIG_ARP_TIMEOUT 200 -#define CONFIG_NET_RETRY_COUNT 50 - #define CONFIG_USB_MAX_CONTROLLER_COUNT 6 #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h index ca79b03..c991bff 100644 --- a/include/configs/ulcb.h +++ b/include/configs/ulcb.h @@ -11,15 +11,11 @@ #include "rcar-gen3-common.h" -/* Ethernet RAVB */ -#define CONFIG_BITBANGMII_MULTI - /* Generic Timer Definitions (use in assembler source) */ #define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ /* Environment in eMMC, at the end of 2nd "boot sector" */ -#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS #define CONFIG_FLASH_SHOW_PROGRESS 45 #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index c9d3c2d..f813f88c 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -39,7 +39,6 @@ #define BOOTENV #endif -#define CONFIG_SYS_MONITOR_BASE 0 #define CONFIG_SYS_MONITOR_LEN 0x00200000 /* 2MB */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ @@ -79,7 +78,6 @@ #define CONFIG_ROOTPATH "/nfs/root/path" #ifdef CONFIG_FIT -#define CONFIG_BOOTFILE "fitImage" #define KERNEL_ADDR_R_OFFSET "0x05100000" #define LINUXBOOT_ENV_SETTINGS \ "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ @@ -87,11 +85,9 @@ "__nfsboot=run tftpboot\0" #else #ifdef CONFIG_ARM64 -#define CONFIG_BOOTFILE "Image" #define LINUXBOOT_CMD "booti" #define KERNEL_ADDR_R_OFFSET "0x02080000" #else -#define CONFIG_BOOTFILE "zImage" #define LINUXBOOT_CMD "bootz" #define KERNEL_ADDR_R_OFFSET "0x00208000" #endif diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index ffa6900..2b6078a 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -23,10 +23,6 @@ /* * Hardware drivers */ -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE /* SDRAM */ #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 @@ -47,11 +43,6 @@ #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif -/* Ethernet */ -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_AT91_WANTS_COMMON_PHY - /* USB */ #ifdef CONFIG_CMD_USB #define CONFIG_USB_ATMEL diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h index 3b86309..88c3061 100644 --- a/include/configs/vcoreiii.h +++ b/include/configs/vcoreiii.h @@ -32,8 +32,6 @@ #error Unknown DDR size - please add! #endif -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - #if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) #define VCOREIII_DEFAULT_MTD_ENV \ "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 17583c0..9fe6231 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -42,7 +42,6 @@ func(MMC, mmc, 0) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#undef CONFIG_ISO_PARTITION #else #define BOOTENV #endif @@ -103,8 +102,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 /* ENET */ -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 7 #define FEC_QUIRK_ENET_MAC #define IMX_FEC_BASE 0x30BE0000 diff --git a/include/configs/verdin-imx8mp.h b/include/configs/verdin-imx8mp.h index f8b4bf2..9e29dc1 100644 --- a/include/configs/verdin-imx8mp.h +++ b/include/configs/verdin-imx8mp.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SPL_BUILD /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/ -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" #define CONFIG_SPL_STACK 0x960000 #define CONFIG_SPL_BSS_START_ADDR 0x0098fc00 #define CONFIG_SPL_BSS_MAX_SIZE SZ_1K @@ -31,17 +30,11 @@ #define CONFIG_POWER_PCA9450 #define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_SPEED 100000 #endif /* CONFIG_SPL_BUILD */ -#define CONFIG_REMAKE_ELF - /* ENET Config */ /* ENET1 */ #if defined(CONFIG_CMD_NET) -#define CONFIG_ETHPRIME "eth0" /* eqos is aliased on-module Ethernet interface */ - -#define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_FEC_MXC_PHYADDR 7 #define FEC_QUIRK_ENET_MAC @@ -61,7 +54,6 @@ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include <config_distro_bootcmd.h> -#undef CONFIG_ISO_PARTITION #else #define BOOTENV #endif diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index f0c5ceb..4f0ff23 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -20,8 +20,13 @@ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ /* CS register bases for the original memory map. */ -#define V2M_BASE 0x80000000 +#ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP +#define V2M_DRAM_BASE 0x00000000 +#define V2M_PA_BASE 0x80000000 +#else +#define V2M_DRAM_BASE 0x80000000 #define V2M_PA_BASE 0x00000000 +#endif #define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000) #define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000) @@ -99,13 +104,8 @@ #define CONFIG_PL011_CLOCK 24000000 #endif -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* Miscellaneous configurable options */ - /* Physical Memory Map */ -#define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1 (V2M_DRAM_BASE) /* SDRAM Bank #1 */ /* Top 16MB reserved for secure world use */ #define DRAM_SEC_SIZE 0x01000000 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE @@ -119,11 +119,7 @@ #define PHYS_SDRAM_2_SIZE 0x80000000 #endif -/* Enable memtest */ - -/* Initial environment variables */ -#ifdef CONFIG_TARGET_VEXPRESS64_JUNO -/* Copy the kernel and FDT to DRAM memory and boot */ +/* Copy the kernel, initrd and FDT from NOR flash to DRAM memory and boot. */ #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \ "bootcmd_afs=" \ "afs load ${kernel_name} ${kernel_addr_r} ;"\ @@ -146,6 +142,54 @@ "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0" #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs " +/* Boot by executing a U-Boot script pre-loaded into DRAM. */ +#define BOOTENV_DEV_MEM(devtypeu, devtypel, instance) \ + "bootcmd_mem= " \ + "source ${scriptaddr}; " \ + "if test $? -eq 1; then " \ + " env import -t ${scriptaddr}; " \ + " if test -n $uenvcmd; then " \ + " echo Running uenvcmd ...; " \ + " run uenvcmd; " \ + " fi; " \ + "fi\0" +#define BOOTENV_DEV_NAME_MEM(devtypeu, devtypel, instance) "mem " + +#ifdef CONFIG_CMD_VIRTIO +#define FUNC_VIRTIO(func) func(VIRTIO, virtio, 0) +#else +#define FUNC_VIRTIO(func) +#endif + +/* + * Boot by loading an Android image, or kernel, initrd and FDT through + * semihosting into DRAM. + */ +#define BOOTENV_DEV_SMH(devtypeu, devtypel, instance) \ + "bootcmd_smh= " \ + "if load hostfs - ${boot_addr_r} ${boot_name}; then" \ + " setenv bootargs;" \ + " abootimg addr ${boot_addr_r};" \ + " abootimg get dtb --index=0 fdt_addr_r;" \ + " bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r};" \ + "else" \ + " if load hostfs - ${kernel_addr_r} ${kernel_name}; then" \ + " setenv fdt_high 0xffffffffffffffff;" \ + " setenv initrd_high 0xffffffffffffffff;" \ + " load hostfs - ${fdt_addr_r} ${fdtfile};" \ + " load hostfs - ${ramdisk_addr_r} ${ramdisk_name};" \ + " fdt addr ${fdt_addr_r};" \ + " fdt resize;" \ + " fdt chosen ${ramdisk_addr_r} ${filesize};" \ + " booti $kernel_addr_r - $fdt_addr_r;" \ + " fi;" \ + "fi\0" +#define BOOTENV_DEV_NAME_SMH(devtypeu, devtypel, instance) "smh " + +/* Boot sources for distro boot and load addresses, per board */ + +#ifdef CONFIG_TARGET_VEXPRESS64_JUNO /* Arm Juno board */ + #define BOOT_TARGET_DEVICES(func) \ func(USB, usb, 0) \ func(SATA, sata, 0) \ @@ -154,42 +198,74 @@ func(DHCP, dhcp, na) \ func(AFS, afs, na) -#include <config_distro_bootcmd.h> +#define VEXPRESS_KERNEL_ADDR 0x80080000 +#define VEXPRESS_PXEFILE_ADDR 0x8fb00000 +#define VEXPRESS_FDT_ADDR 0x8fc00000 +#define VEXPRESS_SCRIPT_ADDR 0x8fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 -/* - * Defines where the kernel and FDT exist in NOR flash and where it will - * be copied into DRAM - */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_name=norkern\0" \ - "kernel_alt_name=Image\0" \ - "kernel_addr_r=0x80080000\0" \ - "ramdisk_name=ramdisk.img\0" \ - "ramdisk_addr_r=0x88000000\0" \ - "fdtfile=board.dtb\0" \ - "fdt_alt_name=juno\0" \ - "fdt_addr_r=0x80000000\0" \ - BOOTENV - -#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP - -#define VEXPRESS_KERNEL_ADDR 0x80080000 -#define VEXPRESS_FDT_ADDR 0x8fc00000 -#define VEXPRESS_BOOT_ADDR 0x8fd00000 -#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 +#define EXTRA_ENV_NAMES \ + "kernel_name=norkern\0" \ + "kernel_alt_name=Image\0" \ + "ramdisk_name=ramdisk.img\0" \ + "fdtfile=board.dtb\0" \ + "fdt_alt_name=juno\0" -#define CONFIG_EXTRA_ENV_SETTINGS \ - "kernel_name=Image\0" \ - "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ - "ramdisk_name=ramdisk.img\0" \ - "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ - "fdtfile=devtree.dtb\0" \ - "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ - "boot_name=boot.img\0" \ - "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" +#elif CONFIG_TARGET_VEXPRESS64_BASE_FVP /* ARMv8-A base model */ + +#define BOOT_TARGET_DEVICES(func) \ + func(SMH, smh, na) \ + func(MEM, mem, na) \ + FUNC_VIRTIO(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#define VEXPRESS_KERNEL_ADDR 0x80080000 +#define VEXPRESS_PXEFILE_ADDR 0x8fa00000 +#define VEXPRESS_SCRIPT_ADDR 0x8fb00000 +#define VEXPRESS_FDT_ADDR 0x8fc00000 +#define VEXPRESS_BOOT_ADDR 0x8fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x8fe00000 + +#define EXTRA_ENV_NAMES \ + "kernel_name=Image\0" \ + "ramdisk_name=ramdisk.img\0" \ + "fdtfile=devtree.dtb\0" \ + "boot_name=boot.img\0" \ + "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0" +#elif CONFIG_TARGET_VEXPRESS64_BASER_FVP /* ARMv8-R base model */ + +#define BOOT_TARGET_DEVICES(func) \ + func(MEM, mem, na) \ + FUNC_VIRTIO(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#define VEXPRESS_KERNEL_ADDR 0x00200000 +#define VEXPRESS_PXEFILE_ADDR 0x0fb00000 +#define VEXPRESS_FDT_ADDR 0x0fc00000 +#define VEXPRESS_SCRIPT_ADDR 0x0fd00000 +#define VEXPRESS_RAMDISK_ADDR 0x0fe00000 + +#define EXTRA_ENV_NAMES \ + "kernel_name=Image\0" \ + "ramdisk_name=ramdisk.img\0" \ + "fdtfile=board.dtb\0" #endif +#include <config_distro_bootcmd.h> + +/* Default load addresses and names for the different payloads. */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \ + "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \ + "pxefile_addr_r=" __stringify(VEXPRESS_PXEFILE_ADDR) "\0" \ + "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \ + "scriptaddr=" __stringify(VEXPRESS_SCRIPT_ADDR) "\0" \ + EXTRA_ENV_NAMES \ + BOOTENV + /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ #define CONFIG_SYS_MAXARGS 64 /* max command args */ diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h index 5f119ae..599caac 100644 --- a/include/configs/vexpress_common.h +++ b/include/configs/vexpress_common.h @@ -126,9 +126,6 @@ #define CONFIG_SYS_MMC_MAX_BLK_COUNT 127 -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Miscellaneous configurable options */ #define LINUX_BOOT_PARAM_ADDR (V2M_BASE + 0x2000) @@ -178,7 +175,6 @@ #define CONFIG_SYS_FLASH_SIZE 0x04000000 #define CONFIG_SYS_FLASH_BASE0 V2M_NOR0 #define CONFIG_SYS_FLASH_BASE1 V2M_NOR1 -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE0 /* Timeout values in ticks */ #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index d90c2fa..ebae822 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -24,7 +24,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 1 #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RMII #define CONFIG_FEC_MXC_PHYADDR 0 /* I2C Configs */ diff --git a/include/configs/vinco.h b/include/configs/vinco.h index 7bd4882..74eccfa 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -30,12 +30,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) -/* SerialFlash */ - -#ifdef CONFIG_CMD_SF -#define CONFIG_ATMEL_SPI0 -#endif - /* MMC */ #ifdef CONFIG_CMD_MMC @@ -49,8 +43,6 @@ /* USB device */ /* Ethernet Hardware */ -#define CONFIG_RMII -#define CONFIG_NET_RETRY_COUNT 20 #define CONFIG_MACB_SEARCH_PHY #ifdef CONFIG_SPI_BOOT diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index dcdaffc..e101739 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -47,9 +47,6 @@ #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" - #define CONFIG_EHCI_HCD_INIT_AFTER_RESET #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h index c60da8a..7e3d589 100644 --- a/include/configs/vocore2.h +++ b/include/configs/vocore2.h @@ -38,9 +38,6 @@ #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) #define CONFIG_SYS_CBSIZE 512 -/* U-Boot */ -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE - /* Environment settings */ #endif //__VOCORE2_CONFIG_H__ diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 80e8fe1..d44b4a0 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -31,7 +31,6 @@ #define CONFIG_MXC_USB_FLAGS 0 /* Framebuffer */ -#define CONFIG_VIDEO_BMP_LOGO #define CONFIG_IMX_HDMI #define CONFIG_IMX_VIDEO_SKIP diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index a43fd81..3324537 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -22,14 +22,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ - GENERATED_GBL_DATA_SIZE) -/* - * Ethernet Driver - */ - -#define CONFIG_LPC32XX_ETH -#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -/* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */ - #define CONFIG_RTC_DS1374 /* @@ -68,12 +60,6 @@ */ /* - * Boot Linux - */ - -#define CONFIG_BOOTFILE "uImage" - -/* * SPL */ diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h index 0efc715..b45d2bb 100644 --- a/include/configs/x86-chromebook.h +++ b/include/configs/x86-chromebook.h @@ -24,7 +24,6 @@ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0xefff -#define CONFIG_BIOSEMU #define VIDEO_IO_OFFSET 0 #define CONFIG_X86EMU_RAW_IO diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 394978b..a22f970 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -47,7 +47,6 @@ */ #define CONFIG_SYS_STACK_SIZE (32 * 1024) -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /*----------------------------------------------------------------------- * Environment configuration @@ -62,12 +61,9 @@ * USB configuration */ -#define CONFIG_BOOTP_BOOTFILESIZE - /* Default environment */ #define CONFIG_ROOTPATH "/opt/nfsroot" #define CONFIG_HOSTNAME "x86" -#define CONFIG_BOOTFILE "bzImage" #define CONFIG_RAMDISK_ADDR 0x4000000 #if defined(CONFIG_GENERATE_ACPI_TABLE) || defined(CONFIG_EFI_STUB) #define CONFIG_OTHBOOTARGS "othbootargs=\0" diff --git a/include/configs/xea.h b/include/configs/xea.h index acaf81d..01942ea 100644 --- a/include/configs/xea.h +++ b/include/configs/xea.h @@ -31,11 +31,6 @@ #define PHYS_SDRAM_1_SIZE 0x10000000 /* Max 256 MB RAM */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -/* Environment */ - -/* Booting Linux */ -#define CONFIG_BOOTFILE "uImage" - /* Extra Environment */ #define CONFIG_HOSTNAME "xea" diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h index bc72f5f..60df795 100644 --- a/include/configs/xilinx_versal.h +++ b/include/configs/xilinx_versal.h @@ -10,8 +10,6 @@ #ifndef __XILINX_VERSAL_H #define __XILINX_VERSAL_H -/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ - /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xF9000000 #define GICR_BASE 0xF9080000 @@ -27,10 +25,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - /* Miscellaneous configurable options */ /* Monitor Command Prompt */ @@ -46,14 +40,11 @@ /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define PHY_ANEG_TIMEOUT 20000 #endif #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) -#define CONFIG_CLOCKS - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h index 00c9718..a94ab1f 100644 --- a/include/configs/xilinx_versal_mini.h +++ b/include/configs/xilinx_versal_mini.h @@ -17,10 +17,6 @@ /* Undef unneeded configs */ #undef CONFIG_EXTRA_ENV_SETTINGS -/* BOOTP options */ -#undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_MAY_FAIL - #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index e51d92f..a063c01 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -10,8 +10,6 @@ #ifndef __XILINX_ZYNQMP_H #define __XILINX_ZYNQMP_H -/* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ - /* Generic Interrupt Controller Definitions */ #define GICD_BASE 0xF9010000 #define GICC_BASE 0xF9020000 @@ -27,10 +25,6 @@ #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - #ifdef CONFIG_NAND_ARASAN # define CONFIG_SYS_MAX_NAND_DEVICE 1 #endif @@ -61,14 +55,11 @@ /* Ethernet driver */ #if defined(CONFIG_ZYNQ_GEM) -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define PHY_ANEG_TIMEOUT 20000 #endif #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) -#define CONFIG_CLOCKS - #define ENV_MEM_LAYOUT_SETTINGS \ "fdt_addr_r=0x40000000\0" \ "fdt_size_r=0x400000\0" \ diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index c3c8b4c..baef561 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -18,9 +18,6 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_INIT_SP_ADDR -/* BOOTP options */ -#undef CONFIG_BOOTP_BOOTFILESIZE -#undef CONFIG_BOOTP_MAY_FAIL #undef CONFIG_SYS_CBSIZE #define CONFIG_SYS_CBSIZE 1024 diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 6d621f2..13cfa2c 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -45,8 +45,6 @@ #define CONFIG_FEC_ENET_DEV 0 #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0x0 -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_UBOOT_SECTOR_START 0x2 #define CONFIG_UBOOT_SECTOR_COUNT 0x3fe diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 8c2cdb5..92e5b43 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -97,9 +97,6 @@ /* U-Boot general configuration */ /*==============================*/ -#define CONFIG_BOARD_POSTCLK_INIT - -#define CONFIG_BOOTFILE "uImage" /* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 1024 /* Boot Argument Buffer Size */ @@ -186,19 +183,16 @@ # define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */ # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */ # define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000) -# define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #elif defined(CONFIG_XTFPGA_KC705) # define CONFIG_SYS_FLASH_SIZE 0x8000000 /* 128MB */ # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */ # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */ # define CONFIG_SYS_FLASH_BASE IOADDR(0x00000000) -# define CONFIG_SYS_MONITOR_BASE IOADDR(0x06000000) #else # define CONFIG_SYS_FLASH_SIZE 0x1000000 /* 16MB */ # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */ # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x8000 /* param size 32KB */ # define CONFIG_SYS_FLASH_BASE IOADDR(0x08000000) -# define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE #endif #define CONFIG_SYS_MAX_FLASH_SECT \ (CONFIG_SYS_FLASH_SECT_SZ/CONFIG_SYS_FLASH_PARMSECT_SZ + \ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 780952c..c92f796 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -26,10 +26,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Ethernet driver */ -#if defined(CONFIG_ZYNQ_GEM) -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_BOOTP_MAY_FAIL -#endif /* NOR */ #ifdef CONFIG_MTD_NOR_FLASH @@ -194,7 +190,6 @@ /* Miscellaneous configurable options */ -#define CONFIG_CLOCKS #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ #define CONFIG_SYS_CBSIZE 2048 /* Console I/O Buffer Size */ diff --git a/include/dm/device-internal.h b/include/dm/device-internal.h index 02002ac..c420726 100644 --- a/include/dm/device-internal.h +++ b/include/dm/device-internal.h @@ -10,6 +10,7 @@ #ifndef _DM_DEVICE_INTERNAL_H #define _DM_DEVICE_INTERNAL_H +#include <event.h> #include <linker_lists.h> #include <dm/ofnode.h> @@ -426,4 +427,13 @@ static inline void devres_release_all(struct udevice *dev) } #endif /* ! CONFIG_DEVRES */ + +static inline int device_notify(const struct udevice *dev, enum event_t type) +{ +#if CONFIG_IS_ENABLED(DM_EVENT) + return event_notify(type, &dev, sizeof(dev)); +#else + return 0; +#endif +} #endif diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index 0cb324c..744dffe 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -895,6 +895,19 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space type, int ofnode_read_pci_vendev(ofnode node, u16 *vendor, u16 *device); /** + * ofnode_read_eth_phy_id() - look up eth phy vendor and device id + * + * Look at the compatible property of a device node that represents a eth phy + * device and extract phy vendor id and device id from it. + * + * @param node node to examine + * @param vendor vendor id of the eth phy device + * @param device device id of the eth phy device + * @return 0 if ok, negative on error + */ +int ofnode_read_eth_phy_id(ofnode node, u16 *vendor, u16 *device); + +/** * ofnode_read_addr_cells() - Get the number of address cells for a node * * This walks back up the tree to find the closest #address-cells property diff --git a/include/dm/pinctrl.h b/include/dm/pinctrl.h index 8b869c4..a09b242 100644 --- a/include/dm/pinctrl.h +++ b/include/dm/pinctrl.h @@ -7,7 +7,7 @@ #define __PINCTRL_H #define PINNAME_SIZE 10 -#define PINMUX_SIZE 40 +#define PINMUX_SIZE 80 /** * struct pinconf_param - pin config parameters @@ -453,30 +453,30 @@ struct pinctrl_ops { * presented using the packed format. */ enum pin_config_param { - PIN_CONFIG_BIAS_BUS_HOLD, - PIN_CONFIG_BIAS_DISABLE, - PIN_CONFIG_BIAS_HIGH_IMPEDANCE, - PIN_CONFIG_BIAS_PULL_DOWN, - PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, - PIN_CONFIG_BIAS_PULL_UP, - PIN_CONFIG_DRIVE_OPEN_DRAIN, - PIN_CONFIG_DRIVE_OPEN_SOURCE, - PIN_CONFIG_DRIVE_PUSH_PULL, - PIN_CONFIG_DRIVE_STRENGTH, - PIN_CONFIG_DRIVE_STRENGTH_UA, - PIN_CONFIG_INPUT_DEBOUNCE, - PIN_CONFIG_INPUT_ENABLE, - PIN_CONFIG_INPUT_SCHMITT, - PIN_CONFIG_INPUT_SCHMITT_ENABLE, - PIN_CONFIG_LOW_POWER_MODE, - PIN_CONFIG_OUTPUT_ENABLE, - PIN_CONFIG_OUTPUT, - PIN_CONFIG_POWER_SOURCE, - PIN_CONFIG_SLEEP_HARDWARE_STATE, - PIN_CONFIG_SLEW_RATE, - PIN_CONFIG_SKEW_DELAY, - PIN_CONFIG_END = 0x7F, - PIN_CONFIG_MAX = 0xFF, + PIN_CONFIG_BIAS_BUS_HOLD = 0, + PIN_CONFIG_BIAS_DISABLE = 1, + PIN_CONFIG_BIAS_HIGH_IMPEDANCE = 2, + PIN_CONFIG_BIAS_PULL_DOWN = 3, + PIN_CONFIG_BIAS_PULL_PIN_DEFAULT = 4, + PIN_CONFIG_BIAS_PULL_UP = 5, + PIN_CONFIG_DRIVE_OPEN_DRAIN = 6, + PIN_CONFIG_DRIVE_OPEN_SOURCE = 7, + PIN_CONFIG_DRIVE_PUSH_PULL = 8, + PIN_CONFIG_DRIVE_STRENGTH = 9, + PIN_CONFIG_DRIVE_STRENGTH_UA = 10, + PIN_CONFIG_INPUT_DEBOUNCE = 11, + PIN_CONFIG_INPUT_ENABLE = 12, + PIN_CONFIG_INPUT_SCHMITT = 13, + PIN_CONFIG_INPUT_SCHMITT_ENABLE = 14, + PIN_CONFIG_LOW_POWER_MODE = 15, + PIN_CONFIG_OUTPUT_ENABLE = 16, + PIN_CONFIG_OUTPUT = 17, + PIN_CONFIG_POWER_SOURCE = 18, + PIN_CONFIG_SLEEP_HARDWARE_STATE = 19, + PIN_CONFIG_SLEW_RATE = 20, + PIN_CONFIG_SKEW_DELAY = 21, + PIN_CONFIG_END = 127, /* 0x7F */ + PIN_CONFIG_MAX = 255, /* 0xFF */ }; #if CONFIG_IS_ENABLED(PINCTRL_GENERIC) diff --git a/include/env_default.h b/include/env_default.h index 21afd7f..7004a6f 100644 --- a/include/env_default.h +++ b/include/env_default.h @@ -77,7 +77,7 @@ const char default_environment[] = { #ifdef CONFIG_HOSTNAME "hostname=" CONFIG_HOSTNAME "\0" #endif -#ifdef CONFIG_BOOTFILE +#ifdef CONFIG_USE_BOOTFILE "bootfile=" CONFIG_BOOTFILE "\0" #endif #ifdef CONFIG_SYS_LOAD_ADDR diff --git a/include/erofs.h b/include/erofs.h new file mode 100644 index 0000000..1fbe82b --- /dev/null +++ b/include/erofs.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _EROFS_H_ +#define _EROFS_H_ + +struct disk_partition; + +int erofs_opendir(const char *filename, struct fs_dir_stream **dirsp); +int erofs_readdir(struct fs_dir_stream *dirs, struct fs_dirent **dentp); +int erofs_probe(struct blk_desc *fs_dev_desc, + struct disk_partition *fs_partition); +int erofs_read(const char *filename, void *buf, loff_t offset, + loff_t len, loff_t *actread); +int erofs_size(const char *filename, loff_t *size); +int erofs_exists(const char *filename); +void erofs_close(void); +void erofs_closedir(struct fs_dir_stream *dirs); +int erofs_uuid(char *uuid_str); + +#endif /* _EROFS_H */ diff --git a/include/event.h b/include/event.h new file mode 100644 index 0000000..62e72a7 --- /dev/null +++ b/include/event.h @@ -0,0 +1,210 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Events provide a general-purpose way to react to / subscribe to changes + * within U-Boot + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __event_h +#define __event_h + +/** + * enum event_t - Types of events supported by U-Boot + * + * @EVT_DM_PRE_PROBE: Device is about to be probed + */ +enum event_t { + EVT_NONE, + EVT_TEST, + + /* Events related to driver model */ + EVT_DM_POST_INIT, + EVT_DM_PRE_PROBE, + EVT_DM_POST_PROBE, + EVT_DM_PRE_REMOVE, + EVT_DM_POST_REMOVE, + + /* Init hooks */ + EVT_MISC_INIT_F, + + EVT_COUNT +}; + +union event_data { + /** + * struct event_data_test - test data + * + * @signal: A value to update the state with + */ + struct event_data_test { + int signal; + } test; + + /** + * struct event_dm - driver model event + * + * @dev: Device this event relates to + */ + struct event_dm { + struct udevice *dev; + } dm; +}; + +/** + * struct event - an event that can be sent and received + * + * @type: Event type + * @data: Data for this particular event + */ +struct event { + enum event_t type; + union event_data data; +}; + +/** Function type for event handlers */ +typedef int (*event_handler_t)(void *ctx, struct event *event); + +/** + * struct evspy_info - information about an event spy + * + * @func: Function to call when the event is activated (must be first) + * @type: Event type + * @id: Event id string + */ +struct evspy_info { + event_handler_t func; + enum event_t type; +#if CONFIG_IS_ENABLED(EVENT_DEBUG) + const char *id; +#endif +}; + +/* Declare a new event spy */ +#if CONFIG_IS_ENABLED(EVENT_DEBUG) +#define _ESPY_REC(_type, _func) { _func, _type, #_func, } +#else +#define _ESPY_REC(_type, _func) { _func, _type, } +#endif + +static inline const char *event_spy_id(struct evspy_info *spy) +{ +#if CONFIG_IS_ENABLED(EVENT_DEBUG) + return spy->id; +#else + return "?"; +#endif +} + +/* + * It seems that LTO will drop list entries if it decides they are not used, + * although the conditions that cause this are unclear. + * + * The example found is the following: + * + * static int sandbox_misc_init_f(void *ctx, struct event *event) + * { + * return sandbox_early_getopt_check(); + * } + * EVENT_SPY(EVT_MISC_INIT_F, sandbox_misc_init_f); + * + * where EVENT_SPY uses ll_entry_declare() + * + * In this case, LTO decides to drop the sandbox_misc_init_f() function + * (which is fine) but then drops the linker-list entry too. This means + * that the code no longer works, in this case sandbox no-longer checks its + * command-line arguments properly. + * + * Without LTO, the KEEP() command in the .lds file is enough to keep the + * entry around. But with LTO it seems that the entry has already been + * dropped before the link script is considered. + * + * The only solution I can think of is to mark linker-list entries as 'used' + * using an attribute. This should be safe, since we don't actually want to drop + * any of these. However this does slightly limit LTO's optimisation choices. + */ +#define EVENT_SPY(_type, _func) \ + static __attribute__((used)) ll_entry_declare(struct evspy_info, \ + _type, evspy_info) = \ + _ESPY_REC(_type, _func) + +/** + * event_register - register a new spy + * + * @id: Spy ID + * @type: Event type to subscribe to + * @func: Function to call when the event is sent + * @ctx: Context to pass to the function + * @return 0 if OK, -ve on error + */ +int event_register(const char *id, enum event_t type, event_handler_t func, + void *ctx); + +/** event_show_spy_list( - Show a list of event spies */ +void event_show_spy_list(void); + +#if CONFIG_IS_ENABLED(EVENT) +/** + * event_notify() - notify spies about an event + * + * It is possible to pass in union event_data here but that may not be + * convenient if the data is elsewhere, or is one of the members of the union. + * So this uses a void * for @data, with a separate @size. + * + * @type: Event type + * @data: Event data to be sent (e.g. union_event_data) + * @size: Size of data in bytes + * @return 0 if OK, -ve on error + */ +int event_notify(enum event_t type, void *data, int size); + +/** + * event_notify_null() - notify spies about an event + * + * Data is NULL and the size is 0 + * + * @type: Event type + * @return 0 if OK, -ve on error + */ +int event_notify_null(enum event_t type); +#else +static inline int event_notify(enum event_t type, void *data, int size) +{ + return 0; +} + +static inline int event_notify_null(enum event_t type) +{ + return 0; +} +#endif + +#if CONFIG_IS_ENABLED(EVENT_DYNAMIC) +/** + * event_uninit() - Clean up dynamic events + * + * This removes all dynamic event handlers + */ +int event_uninit(void); + +/** + * event_uninit() - Set up dynamic events + * + * Init a list of dynamic event handlers, so that these can be added as + * needed + */ +int event_init(void); +#else +static inline int event_uninit(void) +{ + return 0; +} + +static inline int event_init(void) +{ + return 0; +} +#endif + +#endif diff --git a/include/event_internal.h b/include/event_internal.h new file mode 100644 index 0000000..8432c6f --- /dev/null +++ b/include/event_internal.h @@ -0,0 +1,35 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Internal definitions for events + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#ifndef __event_internal_h +#define __event_internal_h + +#include <event.h> +#include <linux/list.h> + +/** + * struct event_spy - a spy that watches for an event of a particular type + * + * @id: Spy ID + * @type: Event type to subscribe to + * @func: Function to call when the event is sent + * @ctx: Context to pass to the function + */ +struct event_spy { + struct list_head sibling_node; + const char *id; + enum event_t type; + event_handler_t func; + void *ctx; +}; + +struct event_state { + struct list_head spy_head; +}; + +#endif diff --git a/include/fs.h b/include/fs.h index c8df388..e2beba3 100644 --- a/include/fs.h +++ b/include/fs.h @@ -17,6 +17,8 @@ struct cmd_tbl; #define FS_TYPE_UBIFS 4 #define FS_TYPE_BTRFS 5 #define FS_TYPE_SQUASHFS 6 +#define FS_TYPE_EROFS 7 +#define FS_TYPE_SEMIHOSTING 8 struct blk_desc; diff --git a/include/fsl_dcu_fb.h b/include/fsl_dcu_fb.h deleted file mode 100644 index 7a5347a..0000000 --- a/include/fsl_dcu_fb.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2014 Freescale Semiconductor, Inc. - * - * FSL DCU Framebuffer driver - */ -#include <linux/fb.h> - -int fsl_dcu_init(struct fb_info *fbinfo, - unsigned int xres, - unsigned int yres, - unsigned int pixel_format); - -int fsl_dcu_fixedfb_setup(void *blob); - -/* Prototypes for external board-specific functions */ -int platform_dcu_init(struct fb_info *fbinfo, - unsigned int xres, - unsigned int yres, - const char *port, - struct fb_videomode *dcu_fb_videomode); -unsigned int dcu_set_pixel_clock(unsigned int pixclock); diff --git a/include/fsl_diu_fb.h b/include/fsl_diu_fb.h deleted file mode 100644 index 139851b..0000000 --- a/include/fsl_diu_fb.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright 2007, 2011 Freescale Semiconductor, Inc. - * Authors: York Sun <yorksun@freescale.com> - * Timur Tabi <timur@freescale.com> - * - * FSL DIU Framebuffer driver - */ - -int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix); - -/* Prototypes for external board-specific functions */ -int platform_diu_init(unsigned int xres, unsigned int yres, const char *port); -void diu_set_pixel_clock(unsigned int pixclock); diff --git a/include/image.h b/include/image.h index 97e5f2e..498eb7f 100644 --- a/include/image.h +++ b/include/image.h @@ -48,6 +48,7 @@ struct fdt_region; extern ulong image_load_addr; /* Default Load Address */ extern ulong image_save_addr; /* Default Save Address */ extern ulong image_save_size; /* Default Save Size */ +extern ulong image_load_offset; /* Default Load Address Offset */ /* An invalid size, meaning that the image size is not known */ #define IMAGE_SIZE_INVAL (-1UL) @@ -350,6 +351,7 @@ typedef struct bootm_headers { #define BOOTM_STATE_OS_PREP (0x00000100) #define BOOTM_STATE_OS_FAKE_GO (0x00000200) /* 'Almost' run the OS */ #define BOOTM_STATE_OS_GO (0x00000400) +#define BOOTM_STATE_PRE_LOAD 0x00000800 int state; #if defined(CONFIG_LMB) && !defined(USE_HOSTCC) @@ -1017,6 +1019,21 @@ int fit_image_hash_get_value(const void *fit, int noffset, uint8_t **value, int fit_set_timestamp(void *fit, int noffset, time_t timestamp); +/** + * fit_pre_load_data() - add public key to fdt blob + * + * Adds public key to the node pre load. + * + * @keydir: Directory containing keys + * @keydest: FDT blob to write public key + * @fit: Pointer to the FIT format image header + * + * returns: + * 0, on success + * < 0, on failure + */ +int fit_pre_load_data(const char *keydir, void *keydest, void *fit); + int fit_cipher_data(const char *keydir, void *keydest, void *fit, const char *comment, int require_keys, const char *engine_id, const char *cmdname); @@ -1324,6 +1341,19 @@ struct crypto_algo *image_get_crypto_algo(const char *full_name); struct padding_algo *image_get_padding_algo(const char *name); /** + * image_pre_load() - Manage pre load header + * + * Manage the pre-load header before launching the image. + * It checks the signature of the image. It also set the + * variable image_load_offset to skip this header before + * launching the image. + * + * @param addr Address of the image + * @return: 0 on success, -ve on error + */ +int image_pre_load(ulong addr); + +/** * fit_image_verify_required_sigs() - Verify signatures marked as 'required' * * @fit: FIT to check diff --git a/include/init.h b/include/init.h index 20c3976..7449650 100644 --- a/include/init.h +++ b/include/init.h @@ -46,17 +46,6 @@ void board_init_f(ulong dummy); int arch_cpu_init(void); /** - * arch_cpu_init_dm() - init CPU after driver model is available - * - * This is called immediately after driver model is available before - * relocation. This is similar to arch_cpu_init() but is able to reference - * devices - * - * Return: 0 if OK, -ve on error - */ -int arch_cpu_init_dm(void); - -/** * mach_cpu_init() - SoC/machine dependent CPU setup * * This is called after arch_cpu_init(). It should handle any @@ -217,7 +206,6 @@ int init_cache_f_r(void); int print_cpuinfo(void); #endif int timer_init(void); -int misc_init_f(void); #if defined(CONFIG_DTB_RESELECT) int embedded_dtb_select(void); diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 9a61166..2d04882 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -254,4 +254,12 @@ const char *clk_hw_get_name(const struct clk *hw); ulong clk_generic_get_rate(struct clk *clk); struct clk *dev_get_clk_ptr(struct udevice *dev); + +ulong ccf_clk_get_rate(struct clk *clk); +ulong ccf_clk_set_rate(struct clk *clk, unsigned long rate); +int ccf_clk_set_parent(struct clk *clk, struct clk *parent); +int ccf_clk_enable(struct clk *clk); +int ccf_clk_disable(struct clk *clk); +extern const struct clk_ops ccf_clk_ops; + #endif /* __LINUX_CLK_PROVIDER_H */ diff --git a/include/linux/math64.h b/include/linux/math64.h index 08584c8..eaa9fd5 100644 --- a/include/linux/math64.h +++ b/include/linux/math64.h @@ -48,6 +48,9 @@ static inline u64 div64_u64(u64 dividend, u64 divisor) return dividend / divisor; } +#define DIV64_U64_ROUND_UP(ll, d) \ + ({ u64 _tmp = (d); div64_u64((ll) + _tmp - 1, _tmp); }) + /** * div64_s64 - signed 64bit divide with 64bit divisor */ diff --git a/include/log.h b/include/log.h index ce48d51..8f35c10 100644 --- a/include/log.h +++ b/include/log.h @@ -98,6 +98,8 @@ enum log_category_t { LOGC_ACPI, /** @LOGC_BOOT: Related to boot process / boot image processing */ LOGC_BOOT, + /** @LOGC_EVENT: Related to event and event handling */ + LOGC_EVENT, /** @LOGC_COUNT: Number of log categories */ LOGC_COUNT, /** @LOGC_END: Sentinel value for lists of log categories */ diff --git a/include/net.h b/include/net.h index b02e4f6..675bf41 100644 --- a/include/net.h +++ b/include/net.h @@ -35,13 +35,7 @@ struct udevice; * alignment in memory. * */ - -#ifdef CONFIG_SYS_RX_ETH_BUFFER -# define PKTBUFSRX CONFIG_SYS_RX_ETH_BUFFER -#else -# define PKTBUFSRX 4 -#endif - +#define PKTBUFSRX CONFIG_SYS_RX_ETH_BUFFER #define PKTALIGN ARCH_DMA_MINALIGN /* Number of packets processed together */ diff --git a/include/pci.h b/include/pci.h index 673c95c..5dbdcb0 100644 --- a/include/pci.h +++ b/include/pci.h @@ -55,130 +55,7 @@ #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */ #define PCI_CLASS_DEVICE 0x0a /* Device class */ #define PCI_CLASS_CODE 0x0b /* Device class code */ -#define PCI_CLASS_CODE_TOO_OLD 0x00 -#define PCI_CLASS_CODE_STORAGE 0x01 -#define PCI_CLASS_CODE_NETWORK 0x02 -#define PCI_CLASS_CODE_DISPLAY 0x03 -#define PCI_CLASS_CODE_MULTIMEDIA 0x04 -#define PCI_CLASS_CODE_MEMORY 0x05 -#define PCI_CLASS_CODE_BRIDGE 0x06 -#define PCI_CLASS_CODE_COMM 0x07 -#define PCI_CLASS_CODE_PERIPHERAL 0x08 -#define PCI_CLASS_CODE_INPUT 0x09 -#define PCI_CLASS_CODE_DOCKING 0x0A -#define PCI_CLASS_CODE_PROCESSOR 0x0B -#define PCI_CLASS_CODE_SERIAL 0x0C -#define PCI_CLASS_CODE_WIRELESS 0x0D -#define PCI_CLASS_CODE_I2O 0x0E -#define PCI_CLASS_CODE_SATELLITE 0x0F -#define PCI_CLASS_CODE_CRYPTO 0x10 -#define PCI_CLASS_CODE_DATA 0x11 -/* Base Class 0x12 - 0xFE is reserved */ -#define PCI_CLASS_CODE_OTHER 0xFF - #define PCI_CLASS_SUB_CODE 0x0a /* Device sub-class code */ -#define PCI_CLASS_SUB_CODE_TOO_OLD_NOTVGA 0x00 -#define PCI_CLASS_SUB_CODE_TOO_OLD_VGA 0x01 -#define PCI_CLASS_SUB_CODE_STORAGE_SCSI 0x00 -#define PCI_CLASS_SUB_CODE_STORAGE_IDE 0x01 -#define PCI_CLASS_SUB_CODE_STORAGE_FLOPPY 0x02 -#define PCI_CLASS_SUB_CODE_STORAGE_IPIBUS 0x03 -#define PCI_CLASS_SUB_CODE_STORAGE_RAID 0x04 -#define PCI_CLASS_SUB_CODE_STORAGE_ATA 0x05 -#define PCI_CLASS_SUB_CODE_STORAGE_SATA 0x06 -#define PCI_CLASS_SUB_CODE_STORAGE_SAS 0x07 -#define PCI_CLASS_SUB_CODE_STORAGE_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_NETWORK_ETHERNET 0x00 -#define PCI_CLASS_SUB_CODE_NETWORK_TOKENRING 0x01 -#define PCI_CLASS_SUB_CODE_NETWORK_FDDI 0x02 -#define PCI_CLASS_SUB_CODE_NETWORK_ATM 0x03 -#define PCI_CLASS_SUB_CODE_NETWORK_ISDN 0x04 -#define PCI_CLASS_SUB_CODE_NETWORK_WORLDFIP 0x05 -#define PCI_CLASS_SUB_CODE_NETWORK_PICMG 0x06 -#define PCI_CLASS_SUB_CODE_NETWORK_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_DISPLAY_VGA 0x00 -#define PCI_CLASS_SUB_CODE_DISPLAY_XGA 0x01 -#define PCI_CLASS_SUB_CODE_DISPLAY_3D 0x02 -#define PCI_CLASS_SUB_CODE_DISPLAY_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_MULTIMEDIA_VIDEO 0x00 -#define PCI_CLASS_SUB_CODE_MULTIMEDIA_AUDIO 0x01 -#define PCI_CLASS_SUB_CODE_MULTIMEDIA_PHONE 0x02 -#define PCI_CLASS_SUB_CODE_MULTIMEDIA_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_MEMORY_RAM 0x00 -#define PCI_CLASS_SUB_CODE_MEMORY_FLASH 0x01 -#define PCI_CLASS_SUB_CODE_MEMORY_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_BRIDGE_HOST 0x00 -#define PCI_CLASS_SUB_CODE_BRIDGE_ISA 0x01 -#define PCI_CLASS_SUB_CODE_BRIDGE_EISA 0x02 -#define PCI_CLASS_SUB_CODE_BRIDGE_MCA 0x03 -#define PCI_CLASS_SUB_CODE_BRIDGE_PCI 0x04 -#define PCI_CLASS_SUB_CODE_BRIDGE_PCMCIA 0x05 -#define PCI_CLASS_SUB_CODE_BRIDGE_NUBUS 0x06 -#define PCI_CLASS_SUB_CODE_BRIDGE_CARDBUS 0x07 -#define PCI_CLASS_SUB_CODE_BRIDGE_RACEWAY 0x08 -#define PCI_CLASS_SUB_CODE_BRIDGE_SEMI_PCI 0x09 -#define PCI_CLASS_SUB_CODE_BRIDGE_INFINIBAND 0x0A -#define PCI_CLASS_SUB_CODE_BRIDGE_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_COMM_SERIAL 0x00 -#define PCI_CLASS_SUB_CODE_COMM_PARALLEL 0x01 -#define PCI_CLASS_SUB_CODE_COMM_MULTIPORT 0x02 -#define PCI_CLASS_SUB_CODE_COMM_MODEM 0x03 -#define PCI_CLASS_SUB_CODE_COMM_GPIB 0x04 -#define PCI_CLASS_SUB_CODE_COMM_SMARTCARD 0x05 -#define PCI_CLASS_SUB_CODE_COMM_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_PIC 0x00 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_DMA 0x01 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_TIMER 0x02 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_RTC 0x03 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_HOTPLUG 0x04 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_SD 0x05 -#define PCI_CLASS_SUB_CODE_PERIPHERAL_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_INPUT_KEYBOARD 0x00 -#define PCI_CLASS_SUB_CODE_INPUT_DIGITIZER 0x01 -#define PCI_CLASS_SUB_CODE_INPUT_MOUSE 0x02 -#define PCI_CLASS_SUB_CODE_INPUT_SCANNER 0x03 -#define PCI_CLASS_SUB_CODE_INPUT_GAMEPORT 0x04 -#define PCI_CLASS_SUB_CODE_INPUT_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_DOCKING_GENERIC 0x00 -#define PCI_CLASS_SUB_CODE_DOCKING_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_PROCESSOR_386 0x00 -#define PCI_CLASS_SUB_CODE_PROCESSOR_486 0x01 -#define PCI_CLASS_SUB_CODE_PROCESSOR_PENTIUM 0x02 -#define PCI_CLASS_SUB_CODE_PROCESSOR_ALPHA 0x10 -#define PCI_CLASS_SUB_CODE_PROCESSOR_POWERPC 0x20 -#define PCI_CLASS_SUB_CODE_PROCESSOR_MIPS 0x30 -#define PCI_CLASS_SUB_CODE_PROCESSOR_COPROC 0x40 -#define PCI_CLASS_SUB_CODE_SERIAL_1394 0x00 -#define PCI_CLASS_SUB_CODE_SERIAL_ACCESSBUS 0x01 -#define PCI_CLASS_SUB_CODE_SERIAL_SSA 0x02 -#define PCI_CLASS_SUB_CODE_SERIAL_USB 0x03 -#define PCI_CLASS_SUB_CODE_SERIAL_FIBRECHAN 0x04 -#define PCI_CLASS_SUB_CODE_SERIAL_SMBUS 0x05 -#define PCI_CLASS_SUB_CODE_SERIAL_INFINIBAND 0x06 -#define PCI_CLASS_SUB_CODE_SERIAL_IPMI 0x07 -#define PCI_CLASS_SUB_CODE_SERIAL_SERCOS 0x08 -#define PCI_CLASS_SUB_CODE_SERIAL_CANBUS 0x09 -#define PCI_CLASS_SUB_CODE_WIRELESS_IRDA 0x00 -#define PCI_CLASS_SUB_CODE_WIRELESS_IR 0x01 -#define PCI_CLASS_SUB_CODE_WIRELESS_RF 0x10 -#define PCI_CLASS_SUB_CODE_WIRELESS_BLUETOOTH 0x11 -#define PCI_CLASS_SUB_CODE_WIRELESS_BROADBAND 0x12 -#define PCI_CLASS_SUB_CODE_WIRELESS_80211A 0x20 -#define PCI_CLASS_SUB_CODE_WIRELESS_80211B 0x21 -#define PCI_CLASS_SUB_CODE_WIRELESS_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_I2O_V1_0 0x00 -#define PCI_CLASS_SUB_CODE_SATELLITE_TV 0x01 -#define PCI_CLASS_SUB_CODE_SATELLITE_AUDIO 0x02 -#define PCI_CLASS_SUB_CODE_SATELLITE_VOICE 0x03 -#define PCI_CLASS_SUB_CODE_SATELLITE_DATA 0x04 -#define PCI_CLASS_SUB_CODE_CRYPTO_NETWORK 0x00 -#define PCI_CLASS_SUB_CODE_CRYPTO_ENTERTAINMENT 0x10 -#define PCI_CLASS_SUB_CODE_CRYPTO_OTHER 0x80 -#define PCI_CLASS_SUB_CODE_DATA_DPIO 0x00 -#define PCI_CLASS_SUB_CODE_DATA_PERFCNTR 0x01 -#define PCI_CLASS_SUB_CODE_DATA_COMMSYNC 0x10 -#define PCI_CLASS_SUB_CODE_DATA_MGMT 0x20 -#define PCI_CLASS_SUB_CODE_DATA_OTHER 0x80 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */ #define PCI_LATENCY_TIMER 0x0d /* 8 bits */ diff --git a/include/pci_ids.h b/include/pci_ids.h index 3c5434c..88b0a64 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -55,6 +55,8 @@ #define PCI_CLASS_BRIDGE_EISA 0x0602 #define PCI_CLASS_BRIDGE_MC 0x0603 #define PCI_CLASS_BRIDGE_PCI 0x0604 +#define PCI_CLASS_BRIDGE_PCI_NORMAL 0x060400 +#define PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE 0x060401 #define PCI_CLASS_BRIDGE_PCMCIA 0x0605 #define PCI_CLASS_BRIDGE_NUBUS 0x0606 #define PCI_CLASS_BRIDGE_CARDBUS 0x0607 diff --git a/include/phy.h b/include/phy.h index c66fd43..9ea4bd4 100644 --- a/include/phy.h +++ b/include/phy.h @@ -454,6 +454,32 @@ void phy_connect_dev(struct phy_device *phydev, struct udevice *dev); struct phy_device *phy_connect(struct mii_dev *bus, int addr, struct udevice *dev, phy_interface_t interface); +/** + * phy_device_create() - Create a PHY device + * + * @bus: MII/MDIO bus that hosts the PHY + * @addr: PHY address on MDIO bus + * @phy_id: where to store the ID retrieved + * @is_c45: Device Identifiers if is_c45 + * @interface: interface between the MAC and PHY + * @return: pointer to phy_device if a PHY is found, or NULL otherwise + */ +struct phy_device *phy_device_create(struct mii_dev *bus, int addr, + u32 phy_id, bool is_c45, + phy_interface_t interface); + +/** + * phy_connect_phy_id() - Connect to phy device by reading PHY id + * from phy node. + * + * @bus: MII/MDIO bus that hosts the PHY + * @dev: Ethernet device to associate to the PHY + * @interface: Interface between the MAC and PHY + * @return: pointer to phy_device if a PHY is found, + * or NULL otherwise + */ +struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev, + phy_interface_t interface); static inline ofnode phy_get_ofnode(struct phy_device *phydev) { diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index f4383ed..278f254 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -18,6 +18,11 @@ enum { PFUZE100_REVID = 0x03, PFUZE100_FABID = 0x04, + PFUZE100_MEMA = 0x1c, + PFUZE100_MEMB = 0x1d, + PFUZE100_MEMC = 0x1e, + PFUZE100_MEMD = 0x1f, + PFUZE100_SW1ABVOL = 0x20, PFUZE100_SW1ABSTBY = 0x21, PFUZE100_SW1ABOFF = 0x22, diff --git a/include/scmi_agent.h b/include/scmi_agent.h index 5015c06..18bcd48 100644 --- a/include/scmi_agent.h +++ b/include/scmi_agent.h @@ -51,7 +51,7 @@ struct scmi_msg { * Caller sets scmi_msg::out_msg_sz to the output message buffer size. * On return, scmi_msg::out_msg_sz stores the response payload size. * - * @dev: SCMI agent device + * @dev: SCMI device * @msg: Message structure reference * Return: 0 on success and a negative errno on failure */ diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h index ef26e72..a220cb2 100644 --- a/include/scmi_protocols.h +++ b/include/scmi_protocols.h @@ -41,21 +41,64 @@ enum scmi_status_code { }; /* + * Generic message IDs + */ +enum scmi_discovery_id { + SCMI_PROTOCOL_VERSION = 0x0, + SCMI_PROTOCOL_ATTRIBUTES = 0x1, + SCMI_PROTOCOL_MESSAGE_ATTRIBUTES = 0x2, +}; + +/* * SCMI Clock Protocol */ enum scmi_clock_message_id { + SCMI_CLOCK_ATTRIBUTES = 0x3, SCMI_CLOCK_RATE_SET = 0x5, SCMI_CLOCK_RATE_GET = 0x6, SCMI_CLOCK_CONFIG_SET = 0x7, }; +#define SCMI_CLK_PROTO_ATTR_COUNT_MASK GENMASK(15, 0) #define SCMI_CLK_RATE_ASYNC_NOTIFY BIT(0) #define SCMI_CLK_RATE_ASYNC_NORESP (BIT(0) | BIT(1)) #define SCMI_CLK_RATE_ROUND_DOWN 0 #define SCMI_CLK_RATE_ROUND_UP BIT(2) #define SCMI_CLK_RATE_ROUND_CLOSEST BIT(3) +#define SCMI_CLOCK_NAME_LENGTH_MAX 16 + +/** + * struct scmi_clk_get_nb_out - Response for SCMI_PROTOCOL_ATTRIBUTES command + * @status: SCMI command status + * @attributes: Attributes of the clock protocol, mainly number of clocks exposed + */ +struct scmi_clk_protocol_attr_out { + s32 status; + u32 attributes; +}; + +/** + * struct scmi_clk_attribute_in - Message payload for SCMI_CLOCK_ATTRIBUTES command + * @clock_id: SCMI clock ID + */ +struct scmi_clk_attribute_in { + u32 clock_id; +}; + +/** + * struct scmi_clk_get_nb_out - Response payload for SCMI_CLOCK_ATTRIBUTES command + * @status: SCMI command status + * @attributes: clock attributes + * @clock_name: name of the clock + */ +struct scmi_clk_attribute_out { + s32 status; + u32 attributes; + char clock_name[SCMI_CLOCK_NAME_LENGTH_MAX]; +}; + /** * struct scmi_clk_state_in - Message payload for CLOCK_CONFIG_SET command * @clock_id: SCMI clock ID diff --git a/include/semihosting.h b/include/semihosting.h new file mode 100644 index 0000000..f1f7346 --- /dev/null +++ b/include/semihosting.h @@ -0,0 +1,149 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Sean Anderson <sean.anderson@seco.com> + */ + +#ifndef _SEMIHOSTING_H +#define _SEMIHOSTING_H + +/* + * These are the encoded instructions used to indicate a semihosting trap. They + * are named like SMH_ISA_INSN, where ISA is the instruction set (e.g. + * AArch64), and INSN is the mneumonic for the instruction. + */ +#define SMH_A64_HLT 0xD45E0000 +#define SMH_A32_SVC 0xEF123456 +#define SMH_A32_HLT 0xE10F0070 +#define SMH_T32_SVC 0xDFAB +#define SMH_T32_HLT 0xBABC + +#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) +/** + * semihosting_enabled() - Determine whether semihosting is supported + * + * Semihosting-based drivers should call this function before making other + * semihosting calls. + * + * Return: %true if a debugger is attached which supports semihosting, %false + * otherwise + */ +bool semihosting_enabled(void); + +/** + * disable_semihosting() - Cause semihosting_enabled() to return false + * + * If U-Boot ever receives an unhandled exception caused by a semihosting trap, + * the trap handler should call this function. + */ +void disable_semihosting(void); +#else +static inline bool semihosting_enabled(void) +{ + return CONFIG_IS_ENABLED(SEMIHOSTING); +} + +static inline void disable_semihosting(void) +{ +} +#endif + +/** + * enum smh_open_mode - Numeric file modes for use with smh_open() + * MODE_READ: 'r' + * MODE_BINARY: 'b' + * MODE_PLUS: '+' + * MODE_WRITE: 'w' + * MODE_APPEND: 'a' + * + * These modes represent the mode string used by fopen(3) in a form which can + * be passed to smh_open(). These do NOT correspond directly to %O_RDONLY, + * %O_CREAT, etc; see fopen(3) for details. In particular, @MODE_PLUS + * effectively results in adding %O_RDWR, and @MODE_WRITE will add %O_TRUNC. + * For compatibility, @MODE_BINARY should be added when opening non-text files + * (such as images). + */ +enum smh_open_mode { + MODE_READ = 0x0, + MODE_BINARY = 0x1, + MODE_PLUS = 0x2, + MODE_WRITE = 0x4, + MODE_APPEND = 0x8, +}; + +/** + * smh_open() - Open a file on the host + * @fname: The name of the file to open + * @mode: The mode to use when opening the file + * + * Return: Either a file descriptor or a negative error on failure + */ +long smh_open(const char *fname, enum smh_open_mode mode); + +/** + * smh_read() - Read data from a file + * @fd: A file descriptor returned from smh_open() + * @memp: Pointer to a buffer of memory of at least @len bytes + * @len: The number of bytes to read + * + * Return: + * * The number of bytes read on success, with 0 indicating %EOF + * * A negative error on failure + */ +long smh_read(long fd, void *memp, size_t len); + +/** + * smh_write() - Write data to a file + * @fd: A file descriptor returned from smh_open() + * @memp: Pointer to a buffer of memory of at least @len bytes + * @len: The number of bytes to read + * @written: Pointer which will be updated with the actual bytes written + * + * Return: 0 on success or negative error on failure + */ +long smh_write(long fd, const void *memp, size_t len, ulong *written); + +/** + * smh_close() - Close an open file + * @fd: A file descriptor returned from smh_open() + * + * Return: 0 on success or negative error on failure + */ +long smh_close(long fd); + +/** + * smh_flen() - Get the length of a file + * @fd: A file descriptor returned from smh_open() + * + * Return: The length of the file, in bytes, or a negative error on failure + */ +long smh_flen(long fd); + +/** + * smh_seek() - Seek to a position in a file + * @fd: A file descriptor returned from smh_open() + * @pos: The offset (in bytes) to seek to + * + * Return: 0 on success or negative error on failure + */ +long smh_seek(long fd, long pos); + +/** + * smh_getc() - Read a character from stdin + * + * Return: The character read, or a negative error on failure + */ +int smh_getc(void); + +/** + * smh_putc() - Print a character on stdout + * @ch: The character to print + */ +void smh_putc(char ch); + +/** + * smh_write0() - Print a nul-terminated string on stdout + * @s: The string to print + */ +void smh_puts(const char *s); + +#endif /* _SEMIHOSTING_H */ diff --git a/include/semihostingfs.h b/include/semihostingfs.h new file mode 100644 index 0000000..25ebdbb --- /dev/null +++ b/include/semihostingfs.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022, Sean Anderson <sean.anderson@seco.com> + * Copyright (c) 2012, Google Inc. + */ + +#ifndef __SEMIHOSTING_FS__ +#define __SEMIHOSTING_FS__ + +struct blk_desc; +struct disk_partition; + +int smh_fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info); +void smh_fs_close(void); +int smh_fs_size(const char *filename, loff_t *size); +int smh_fs_read(const char *filename, void *buf, loff_t offset, loff_t len, + loff_t *actread); +int smh_fs_write(const char *filename, void *buf, loff_t offset, + loff_t len, loff_t *actwrite); + +#endif diff --git a/include/serial.h b/include/serial.h index 19a8c0c..8c2e7ad 100644 --- a/include/serial.h +++ b/include/serial.h @@ -23,6 +23,7 @@ struct serial_device { void default_serial_puts(const char *s); extern struct serial_device serial_smc_device; +extern struct serial_device serial_smh_device; extern struct serial_device serial_scc_device; extern struct serial_device *default_serial_console(void); @@ -195,6 +196,24 @@ struct dm_serial_ops { */ int (*putc)(struct udevice *dev, const char ch); /** + * puts() - Write a string + * + * This writes a string. This function should be implemented only if + * writing multiple characters at once is more performant than just + * calling putc() in a loop. + * + * If the whole string cannot be written at once, then this function + * should return the number of characters written. Returning a negative + * error code implies that no characters were written. If this function + * returns 0, then it will be called again with the same arguments. + * + * @dev: Device pointer + * @s: The string to write + * @len: The length of the string to write. + * @return The number of characters written on success, or -ve on error + */ + ssize_t (*puts)(struct udevice *dev, const char *s, size_t len); + /** * pending() - Check if input/output characters are waiting * * This can be used to return an indication of the number of waiting diff --git a/include/u-boot/lz4.h b/include/u-boot/lz4.h index e18b39a..655adbf 100644 --- a/include/u-boot/lz4.h +++ b/include/u-boot/lz4.h @@ -21,4 +21,53 @@ */ int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn); +/** + * LZ4_decompress_safe() - Decompression protected against buffer overflow + * @source: source address of the compressed data + * @dest: output buffer address of the uncompressed data + * which must be already allocated + * @compressedSize: is the precise full size of the compressed block + * @maxDecompressedSize: is the size of 'dest' buffer + * + * Decompresses data from 'source' into 'dest'. + * If the source stream is detected malformed, the function will + * stop decoding and return a negative result. + * This function is protected against buffer overflow exploits, + * including malicious data packets. It never writes outside output buffer, + * nor reads outside input buffer. + * + * Return: number of bytes decompressed into destination buffer + * (necessarily <= maxDecompressedSize) + * or a negative result in case of error + */ +int LZ4_decompress_safe(const char *source, char *dest, + int compressedSize, int maxDecompressedSize); + +/** + * LZ4_decompress_safe_partial() - Decompress a block of size 'compressedSize' + * at position 'source' into buffer 'dest' + * @source: source address of the compressed data + * @dest: output buffer address of the decompressed data which must be + * already allocated + * @compressedSize: is the precise full size of the compressed block. + * @targetOutputSize: the decompression operation will try + * to stop as soon as 'targetOutputSize' has been reached + * @maxDecompressedSize: is the size of destination buffer + * + * This function decompresses a compressed block of size 'compressedSize' + * at position 'source' into destination buffer 'dest' + * of size 'maxDecompressedSize'. + * The function tries to stop decompressing operation as soon as + * 'targetOutputSize' has been reached, reducing decompression time. + * This function never writes outside of output buffer, + * and never reads outside of input buffer. + * It is therefore protected against malicious data packets. + * + * Return: the number of bytes decoded in the destination buffer + * (necessarily <= maxDecompressedSize) + * or a negative result in case of error + * + */ +int LZ4_decompress_safe_partial(const char *src, char *dst, + int compressedSize, int targetOutputSize, int dstCapacity); #endif diff --git a/include/video.h b/include/video.h index 48a71dc..43e2c89 100644 --- a/include/video.h +++ b/include/video.h @@ -1,13 +1,7 @@ /* - * Video uclass and legacy implementation + * Video uclass to support displays (see also vidconsole for text) * * Copyright (c) 2015 Google, Inc - * - * MPC823 Video Controller - * ======================= - * (C) 2000 by Paolo Scaffardi (arsenio@tin.it) - * AIRVENT SAM s.p.a - RIMINI(ITALY) - * */ #ifndef _VIDEO_H_ @@ -155,7 +149,6 @@ struct video_ops { */ int video_reserve(ulong *addrp); -#ifdef CONFIG_DM_VIDEO /** * video_clear() - Clear a device's frame buffer to background color. * @@ -163,7 +156,6 @@ int video_reserve(ulong *addrp); * Return: 0 */ int video_clear(struct udevice *dev); -#endif /* CONFIG_DM_VIDEO */ /** * video_sync() - Sync a device's frame buffer with its hardware @@ -283,78 +275,4 @@ static inline int video_sync_copy_all(struct udevice *dev) */ bool video_is_active(void); -#ifndef CONFIG_DM_VIDEO - -/* Video functions */ - -/** - * Display a BMP format bitmap on the screen - * - * @param bmp_image Address of BMP image - * @param x X position to draw image - * @param y Y position to draw image - */ -int video_display_bitmap(ulong bmp_image, int x, int y); - -/** - * Get the width of the screen in pixels - * - * Return: width of screen in pixels - */ -int video_get_pixel_width(void); - -/** - * Get the height of the screen in pixels - * - * Return: height of screen in pixels - */ -int video_get_pixel_height(void); - -/** - * Get the number of text lines/rows on the screen - * - * Return: number of rows - */ -int video_get_screen_rows(void); - -/** - * Get the number of text columns on the screen - * - * Return: number of columns - */ -int video_get_screen_columns(void); - -/** - * Set the position of the text cursor - * - * @param col Column to place cursor (0 = left side) - * @param row Row to place cursor (0 = top line) - */ -void video_position_cursor(unsigned col, unsigned row); - -/* Clear the display */ -void video_clear(void); - -#if defined(CONFIG_FORMIKE) -int kwh043st20_f01_spi_startup(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode); -#endif -#if defined(CONFIG_LG4573) -int lg4573_spi_startup(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode); -#endif - -/* - * video_get_info_str() - obtain a board string: type, speed, etc. - * - * This is called if CONFIG_CONSOLE_EXTRA_INFO is enabled. - * - * line_number: location to place info string beside logo - * info: buffer for info string (empty if nothing to display on this - * line) - */ -void video_get_info_str(int line_number, char *info); - -#endif /* !CONFIG_DM_VIDEO */ - #endif diff --git a/include/video_fb.h b/include/video_fb.h deleted file mode 100644 index e410226..0000000 --- a/include/video_fb.h +++ /dev/null @@ -1,91 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 1997-2002 ELTEC Elektronik AG - * Frank Gottschling <fgottschling@eltec.de> - */ - -/* - * smiLynxEM.h - * Silicon Motion graphic interface for sm810/sm710/sm712 accelerator - * - * - * modification history - * -------------------- - * 04-18-2002 Rewritten for U-Boot <fgottschling@eltec.de>. - */ - -#ifndef _VIDEO_FB_H_ -#define _VIDEO_FB_H_ - -/* - * Graphic Data Format (GDF) bits for VIDEO_DATA_FORMAT - */ -#define GDF__8BIT_INDEX 0 -#define GDF_15BIT_555RGB 1 -#define GDF_16BIT_565RGB 2 -#define GDF_32BIT_X888RGB 3 -#define GDF_24BIT_888RGB 4 -#define GDF__8BIT_332RGB 5 - -/******************************************************************************/ -/* Export Graphic Driver Control */ -/******************************************************************************/ - -typedef struct graphic_device { - unsigned int isaBase; - unsigned int pciBase; - unsigned int dprBase; - unsigned int vprBase; - unsigned int cprBase; - unsigned int frameAdrs; - unsigned int memSize; - unsigned int mode; - unsigned int gdfIndex; - unsigned int gdfBytesPP; - unsigned int fg; - unsigned int bg; - unsigned int plnSizeX; - unsigned int plnSizeY; - unsigned int winSizeX; - unsigned int winSizeY; - char modeIdent[80]; -} GraphicDevice; - - -/******************************************************************************/ -/* Export Graphic Functions */ -/******************************************************************************/ - -void *video_hw_init (void); /* returns GraphicDevice struct or NULL */ - -#ifdef VIDEO_HW_BITBLT -void video_hw_bitblt ( - unsigned int bpp, /* bytes per pixel */ - unsigned int src_x, /* source pos x */ - unsigned int src_y, /* source pos y */ - unsigned int dst_x, /* dest pos x */ - unsigned int dst_y, /* dest pos y */ - unsigned int dim_x, /* frame width */ - unsigned int dim_y /* frame height */ - ); -#endif - -#ifdef VIDEO_HW_RECTFILL -void video_hw_rectfill ( - unsigned int bpp, /* bytes per pixel */ - unsigned int dst_x, /* dest pos x */ - unsigned int dst_y, /* dest pos y */ - unsigned int dim_x, /* frame width */ - unsigned int dim_y, /* frame height */ - unsigned int color /* fill color */ - ); -#endif - -void video_set_lut ( - unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ); - -#endif /*_VIDEO_FB_H_ */ diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 50bf4ef..f577008 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -177,6 +177,49 @@ enum pm_query_id { PM_QID_CLOCK_GET_MAX_DIVISOR = 13, }; +enum pm_pinctrl_config_param { + PM_PINCTRL_CONFIG_SLEW_RATE = 0, + PM_PINCTRL_CONFIG_BIAS_STATUS = 1, + PM_PINCTRL_CONFIG_PULL_CTRL = 2, + PM_PINCTRL_CONFIG_SCHMITT_CMOS = 3, + PM_PINCTRL_CONFIG_DRIVE_STRENGTH = 4, + PM_PINCTRL_CONFIG_VOLTAGE_STATUS = 5, + PM_PINCTRL_CONFIG_TRI_STATE = 6, + PM_PINCTRL_CONFIG_MAX = 7, +}; + +enum pm_pinctrl_slew_rate { + PM_PINCTRL_SLEW_RATE_FAST = 0, + PM_PINCTRL_SLEW_RATE_SLOW = 1, +}; + +enum pm_pinctrl_bias_status { + PM_PINCTRL_BIAS_DISABLE = 0, + PM_PINCTRL_BIAS_ENABLE = 1, +}; + +enum pm_pinctrl_pull_ctrl { + PM_PINCTRL_BIAS_PULL_DOWN = 0, + PM_PINCTRL_BIAS_PULL_UP = 1, +}; + +enum pm_pinctrl_schmitt_cmos { + PM_PINCTRL_INPUT_TYPE_CMOS = 0, + PM_PINCTRL_INPUT_TYPE_SCHMITT = 1, +}; + +enum pm_pinctrl_drive_strength { + PM_PINCTRL_DRIVE_STRENGTH_2MA = 0, + PM_PINCTRL_DRIVE_STRENGTH_4MA = 1, + PM_PINCTRL_DRIVE_STRENGTH_8MA = 2, + PM_PINCTRL_DRIVE_STRENGTH_12MA = 3, +}; + +enum pm_pinctrl_tri_state { + PM_PINCTRL_TRI_STATE_DISABLE = 0, + PM_PINCTRL_TRI_STATE_ENABLE = 1, +}; + enum zynqmp_pm_reset_action { PM_RESET_ACTION_RELEASE = 0, PM_RESET_ACTION_ASSERT = 1, @@ -340,6 +383,29 @@ enum pm_ioctl_id { IOCTL_GET_LAST_RESET_REASON = 23, /* AIE ISR Clear */ IOCTL_AIE_ISR_CLEAR = 24, + /* Register SGI to ATF */ + IOCTL_REGISTER_SGI = 25, + /* Runtime feature configuration */ + IOCTL_SET_FEATURE_CONFIG = 26, + IOCTL_GET_FEATURE_CONFIG = 27, + /* IOCTL for Secure Read/Write Interface */ + IOCTL_READ_REG = 28, + IOCTL_MASK_WRITE_REG = 29, + /* Dynamic SD/GEM/USB configuration */ + IOCTL_SET_SD_CONFIG = 30, + IOCTL_SET_GEM_CONFIG = 31, + IOCTL_SET_USB_CONFIG = 32, + /* AIE/AIEML Operations */ + IOCTL_AIE_OPS = 33, + /* IOCTL to get default/current QoS */ + IOCTL_GET_QOS = 34, +}; + +enum pm_sd_config_type { + SD_CONFIG_EMMC_SEL = 1, /* To set SD_EMMC_SEL in CTRL_REG_SD */ + SD_CONFIG_BASECLK = 2, /* To set SD_BASECLK in SD_CONFIG_REG1 */ + SD_CONFIG_8BIT = 3, /* To set SD_8BIT in SD_CONFIG_REG2 */ + SD_CONFIG_FIXED = 4, /* To set fixed config registers */ }; #define PM_SIP_SVC 0xc2000000 @@ -372,6 +438,8 @@ int zynqmp_pmufw_config_close(void); void zynqmp_pmufw_load_config_object(const void *cfg_obj, size_t size); int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); +int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value); +int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id); /* Type of Config Object */ #define PM_CONFIG_OBJECT_TYPE_BASE 0x1U @@ -403,5 +471,9 @@ enum zynqmp_pm_request_ack { #define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U #define ZYNQMP_PM_MAX_QOS 100U +/* Firmware feature check version mask */ +#define FIRMWARE_VERSION_MASK GENMASK(15, 0) +/* PM API versions */ +#define PM_API_VERSION_2 2 #endif /* _ZYNQMP_FIRMWARE_H_ */ diff --git a/lib/Kconfig b/lib/Kconfig index 3c6fa99..effe735 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -791,17 +791,52 @@ endmenu config ASN1_COMPILER bool + help + ASN.1 (Abstract Syntax Notation One) is a standard interface + description language for defining data structures that can be + serialized and deserialized in a cross-platform way. It is + broadly used in telecommunications and computer networking, + and especially in cryptography (https://en.wikipedia.org/wiki/ASN.1). + This option enables the support of the asn1 compiler. config ASN1_DECODER bool help - Enable asn1 decoder library. + ASN.1 (Abstract Syntax Notation One) is a standard interface + description language for defining data structures that can be + serialized and deserialized in a cross-platform way. It is + broadly used in telecommunications and computer networking, + and especially in cryptography (https://en.wikipedia.org/wiki/ASN.1). + This option enables the support of the asn1 decoder. + +config SPL_ASN1_DECODER + bool + help + ASN.1 (Abstract Syntax Notation One) is a standard interface + description language for defining data structures that can be + serialized and deserialized in a cross-platform way. It is + broadly used in telecommunications and computer networking, + and especially in cryptography (https://en.wikipedia.org/wiki/ASN.1). + This option enables the support of the asn1 decoder in the SPL. config OID_REGISTRY bool help + In computing, object identifiers or OIDs are an identifier mechanism + standardized by the International Telecommunication Union (ITU) and + ISO/IEC for naming any object, concept, or "thing" with a globally + unambiguous persistent name (https://en.wikipedia.org/wiki/Object_identifier). Enable fast lookup object identifier registry. +config SPL_OID_REGISTRY + bool + help + In computing, object identifiers or OIDs are an identifier mechanism + standardized by the International Telecommunication Union (ITU) and + ISO/IEC for naming any object, concept, or "thing" with a globally + unambiguous persistent name (https://en.wikipedia.org/wiki/Object_identifier). + Enable fast lookup object identifier registry in the SPL. + config SMBIOS_PARSER bool "SMBIOS parser" help diff --git a/lib/Makefile b/lib/Makefile index 11b03d1..13fe5fb 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -17,8 +17,6 @@ obj-$(CONFIG_OF_LIVE) += of_live.o obj-$(CONFIG_CMD_DHRYSTONE) += dhry/ obj-$(CONFIG_ARCH_AT91) += at91/ obj-$(CONFIG_OPTEE_LIB) += optee/ -obj-$(CONFIG_ASN1_DECODER) += asn1_decoder.o -obj-y += crypto/ obj-$(CONFIG_AES) += aes.o obj-$(CONFIG_AES) += aes/ @@ -64,6 +62,8 @@ obj-$(CONFIG_TPM_V1) += tpm-v1.o obj-$(CONFIG_TPM_V2) += tpm-v2.o endif +obj-y += crypto/ + obj-$(CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE) += acpi/ obj-$(CONFIG_$(SPL_)MD5) += md5.o obj-$(CONFIG_ECDSA) += ecdsa/ @@ -74,6 +74,7 @@ obj-$(CONFIG_SHA1) += sha1.o obj-$(CONFIG_SHA256) += sha256.o obj-$(CONFIG_SHA512) += sha512.o obj-$(CONFIG_CRYPT_PW) += crypt/ +obj-$(CONFIG_$(SPL_)ASN1_DECODER) += asn1_decoder.o obj-$(CONFIG_$(SPL_)ZLIB) += zlib/ obj-$(CONFIG_$(SPL_)ZSTD) += zstd/ @@ -135,9 +136,9 @@ obj-$(CONFIG_$(SPL_TPL_)STRTO) += strto.o else # Main U-Boot always uses the full printf support obj-y += vsprintf.o strto.o -obj-$(CONFIG_OID_REGISTRY) += oid_registry.o obj-$(CONFIG_SSCANF) += sscanf.o endif +obj-$(CONFIG_$(SPL_)OID_REGISTRY) += oid_registry.o obj-y += abuf.o obj-y += date.o diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig index 6369baf..509bc28 100644 --- a/lib/crypto/Kconfig +++ b/lib/crypto/Kconfig @@ -8,6 +8,15 @@ menuconfig ASYMMETRIC_KEY_TYPE if ASYMMETRIC_KEY_TYPE +config SPL_ASYMMETRIC_KEY_TYPE + bool "Asymmetric (public-key cryptographic) key Support within SPL" + depends on SPL + help + This option provides support for a key type that holds the data for + the asymmetric keys used for public key cryptographic operations such + as encryption, decryption, signature generation and signature + verification in the SPL. + config ASYMMETRIC_PUBLIC_KEY_SUBTYPE bool "Asymmetric public-key crypto algorithm subtype" help @@ -16,6 +25,15 @@ config ASYMMETRIC_PUBLIC_KEY_SUBTYPE appropriate hash algorithms (such as SHA-1) must be available. ENOPKG will be reported if the requisite algorithm is unavailable. +config SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE + bool "Asymmetric public-key crypto algorithm subtype within SPL" + depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE + help + This option provides support for asymmetric public key type handling in the SPL. + If signature generation and/or verification are to be used, + appropriate hash algorithms (such as SHA-1) must be available. + ENOPKG will be reported if the requisite algorithm is unavailable. + config RSA_PUBLIC_KEY_PARSER bool "RSA public key parser" depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE @@ -27,6 +45,17 @@ config RSA_PUBLIC_KEY_PARSER public key data and provides the ability to instantiate a public key. +config SPL_RSA_PUBLIC_KEY_PARSER + bool "RSA public key parser within SPL" + depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE + select SPL_ASN1_DECODER + select ASN1_COMPILER + select SPL_OID_REGISTRY + help + This option provides support for parsing a blob containing RSA + public key data and provides the ability to instantiate a public + key in the SPL. + config X509_CERTIFICATE_PARSER bool "X.509 certificate parser" depends on ASYMMETRIC_PUBLIC_KEY_SUBTYPE diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile index f3a4145..6792b1d 100644 --- a/lib/crypto/Makefile +++ b/lib/crypto/Makefile @@ -3,27 +3,34 @@ # Makefile for asymmetric cryptographic keys # -obj-$(CONFIG_ASYMMETRIC_KEY_TYPE) += asymmetric_keys.o +obj-$(CONFIG_$(SPL_)ASYMMETRIC_KEY_TYPE) += asymmetric_keys.o asymmetric_keys-y := asymmetric_type.o -obj-$(CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o +obj-$(CONFIG_$(SPL_)ASYMMETRIC_PUBLIC_KEY_SUBTYPE) += public_key.o # # RSA public key parser # -obj-$(CONFIG_RSA_PUBLIC_KEY_PARSER) += rsa_public_key.o +obj-$(CONFIG_$(SPL_)RSA_PUBLIC_KEY_PARSER) += rsa_public_key.o rsa_public_key-y := \ rsapubkey.asn1.o \ rsa_helper.o $(obj)/rsapubkey.asn1.o: $(obj)/rsapubkey.asn1.c $(obj)/rsapubkey.asn1.h +ifdef CONFIG_SPL_BUILD +CFLAGS_rsapubkey.asn1.o += -I$(obj) +endif + $(obj)/rsa_helper.o: $(obj)/rsapubkey.asn1.h +ifdef CONFIG_SPL_BUILD +CFLAGS_rsa_helper.o += -I$(obj) +endif # # X.509 Certificate handling # -obj-$(CONFIG_X509_CERTIFICATE_PARSER) += x509_key_parser.o +obj-$(CONFIG_$(SPL_)X509_CERTIFICATE_PARSER) += x509_key_parser.o x509_key_parser-y := \ x509.asn1.o \ x509_akid.asn1.o \ @@ -40,11 +47,11 @@ $(obj)/x509_akid.asn1.o: $(obj)/x509_akid.asn1.c $(obj)/x509_akid.asn1.h # # PKCS#7 message handling # -obj-$(CONFIG_PKCS7_MESSAGE_PARSER) += pkcs7_message.o +obj-$(CONFIG_$(SPL_)PKCS7_MESSAGE_PARSER) += pkcs7_message.o pkcs7_message-y := \ pkcs7.asn1.o \ pkcs7_parser.o -obj-$(CONFIG_PKCS7_VERIFY) += pkcs7_verify.o +obj-$(CONFIG_$(SPL_)PKCS7_VERIFY) += pkcs7_verify.o $(obj)/pkcs7_parser.o: $(obj)/pkcs7.asn1.h $(obj)/pkcs7.asn1.o: $(obj)/pkcs7.asn1.c $(obj)/pkcs7.asn1.h diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index e5e35fe..28657f5 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -18,7 +18,6 @@ config EFI_LOADER select PARTITION_UUIDS select HAVE_BLOCK_DEVICE select REGEX - imply CFB_CONSOLE_ANSI imply FAT imply FAT_WRITE imply USB_KEYBOARD_FN_KEYS @@ -1,13 +1,63 @@ -// SPDX-License-Identifier: BSD-2-Clause +// SPDX-License-Identifier: GPL 2.0+ OR BSD-2-Clause /* - LZ4 - Fast LZ compression algorithm - Copyright (C) 2011-2015, Yann Collet. + * LZ4 - Fast LZ compression algorithm + * Copyright (C) 2011 - 2016, Yann Collet. + * BSD 2 - Clause License (http://www.opensource.org/licenses/bsd - license.php) + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following disclaimer + * in the documentation and/or other materials provided with the + * distribution. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * You can contact the author at : + * - LZ4 homepage : http://www.lz4.org + * - LZ4 source repository : https://github.com/lz4/lz4 + */ +#include <common.h> +#include <compiler.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/bug.h> +#include <asm/unaligned.h> +#include <u-boot/lz4.h> + +#define FORCE_INLINE inline __attribute__((always_inline)) + +static FORCE_INLINE u16 LZ4_readLE16(const void *src) +{ + return get_unaligned_le16(src); +} - You can contact the author at : - - LZ4 source repository : https://github.com/Cyan4973/lz4 - - LZ4 public forum : https://groups.google.com/forum/#!forum/lz4c -*/ +static FORCE_INLINE void LZ4_copy8(void *dst, const void *src) +{ + put_unaligned(get_unaligned((const u64 *)src), (u64 *)dst); +} + +typedef uint8_t BYTE; +typedef uint16_t U16; +typedef uint32_t U32; +typedef int32_t S32; +typedef uint64_t U64; +typedef uintptr_t uptrval; +static FORCE_INLINE void LZ4_write32(void *memPtr, U32 value) +{ + put_unaligned(value, (U32 *)memPtr); +} /************************************** * Reading and writing into memory @@ -28,14 +78,17 @@ static void LZ4_wildCopy(void* dstPtr, const void* srcPtr, void* dstEnd) **************************************/ #define MINMATCH 4 -#define COPYLENGTH 8 +#define WILDCOPYLENGTH 8 #define LASTLITERALS 5 -#define MFLIMIT (COPYLENGTH+MINMATCH) -static const int LZ4_minLength = (MFLIMIT+1); +#define MFLIMIT (WILDCOPYLENGTH + MINMATCH) -#define KB *(1 <<10) -#define MB *(1 <<20) -#define GB *(1U<<30) +/* + * ensure it's possible to write 2 x wildcopyLength + * without overflowing output buffer + */ +#define MATCH_SAFEGUARD_DISTANCE ((2 * WILDCOPYLENGTH) - MINMATCH) + +#define KB (1 <<10) #define MAXD_LOG 16 #define MAX_DISTANCE ((1 << MAXD_LOG) - 1) @@ -45,198 +98,438 @@ static const int LZ4_minLength = (MFLIMIT+1); #define RUN_BITS (8-ML_BITS) #define RUN_MASK ((1U<<RUN_BITS)-1) +#define LZ4_STATIC_ASSERT(c) BUILD_BUG_ON(!(c)) /************************************** * Local Structures and types **************************************/ typedef enum { noDict = 0, withPrefix64k, usingExtDict } dict_directive; typedef enum { endOnOutputSize = 0, endOnInputSize = 1 } endCondition_directive; -typedef enum { full = 0, partial = 1 } earlyEnd_directive; +typedef enum { decode_full_block = 0, partial_decode = 1 } earlyEnd_directive; +#define DEBUGLOG(l, ...) {} /* disabled */ +#ifndef assert +#define assert(condition) ((void)0) +#endif -/******************************* -* Decompression functions -*******************************/ /* - * This generic decompression function cover all use cases. - * It shall be instantiated several times, using different sets of directives - * Note that it is essential this generic function is really inlined, + * LZ4_decompress_generic() : + * This generic decompression function covers all use cases. + * It shall be instantiated several times, using different sets of directives. + * Note that it is important for performance that this function really get inlined, * in order to remove useless branches during compilation optimization. */ -FORCE_INLINE int LZ4_decompress_generic( - const char* const source, - char* const dest, - int inputSize, - int outputSize, /* If endOnInput==endOnInputSize, this value is the max size of Output Buffer. */ - - int endOnInput, /* endOnOutputSize, endOnInputSize */ - int partialDecoding, /* full, partial */ - int targetOutputSize, /* only used if partialDecoding==partial */ - int dict, /* noDict, withPrefix64k, usingExtDict */ - const BYTE* const lowPrefix, /* == dest if dict == noDict */ - const BYTE* const dictStart, /* only if dict==usingExtDict */ - const size_t dictSize /* note : = 0 if noDict */ - ) +static FORCE_INLINE int LZ4_decompress_generic( + const char * const src, + char * const dst, + int srcSize, + /* + * If endOnInput == endOnInputSize, + * this value is `dstCapacity` + */ + int outputSize, + /* endOnOutputSize, endOnInputSize */ + endCondition_directive endOnInput, + /* full, partial */ + earlyEnd_directive partialDecoding, + /* noDict, withPrefix64k, usingExtDict */ + dict_directive dict, + /* always <= dst, == dst when no prefix */ + const BYTE * const lowPrefix, + /* only if dict == usingExtDict */ + const BYTE * const dictStart, + /* note : = 0 if noDict */ + const size_t dictSize + ) { - /* Local Variables */ - const BYTE* ip = (const BYTE*) source; - const BYTE* const iend = ip + inputSize; - - BYTE* op = (BYTE*) dest; - BYTE* const oend = op + outputSize; - BYTE* cpy; - BYTE* oexit = op + targetOutputSize; - const BYTE* const lowLimit = lowPrefix - dictSize; - - const BYTE* const dictEnd = (const BYTE*)dictStart + dictSize; - const size_t dec32table[] = {4, 1, 2, 1, 4, 4, 4, 4}; - const size_t dec64table[] = {0, 0, 0, (size_t)-1, 0, 1, 2, 3}; - - const int safeDecode = (endOnInput==endOnInputSize); - const int checkOffset = ((safeDecode) && (dictSize < (int)(64 KB))); - - - /* Special cases */ - if ((partialDecoding) && (oexit> oend-MFLIMIT)) oexit = oend-MFLIMIT; /* targetOutputSize too high => decode everything */ - if ((endOnInput) && (unlikely(outputSize==0))) return ((inputSize==1) && (*ip==0)) ? 0 : -1; /* Empty output buffer */ - if ((!endOnInput) && (unlikely(outputSize==0))) return (*ip==0?1:-1); - - - /* Main Loop */ - while (1) - { - unsigned token; - size_t length; - const BYTE* match; - - /* get literal length */ - token = *ip++; - if ((length=(token>>ML_BITS)) == RUN_MASK) - { - unsigned s; - do - { - s = *ip++; - length += s; - } - while (likely((endOnInput)?ip<iend-RUN_MASK:1) && (s==255)); - if ((safeDecode) && unlikely((size_t)(op+length)<(size_t)(op))) goto _output_error; /* overflow detection */ - if ((safeDecode) && unlikely((size_t)(ip+length)<(size_t)(ip))) goto _output_error; /* overflow detection */ - } - - /* copy literals */ - cpy = op+length; - if (((endOnInput) && ((cpy>(partialDecoding?oexit:oend-MFLIMIT)) || (ip+length>iend-(2+1+LASTLITERALS))) ) - || ((!endOnInput) && (cpy>oend-COPYLENGTH))) - { - if (partialDecoding) - { - if (cpy > oend) goto _output_error; /* Error : write attempt beyond end of output buffer */ - if ((endOnInput) && (ip+length > iend)) goto _output_error; /* Error : read attempt beyond end of input buffer */ - } - else - { - if ((!endOnInput) && (cpy != oend)) goto _output_error; /* Error : block decoding must stop exactly there */ - if ((endOnInput) && ((ip+length != iend) || (cpy > oend))) goto _output_error; /* Error : input must be consumed */ - } - memcpy(op, ip, length); - ip += length; - op += length; - break; /* Necessarily EOF, due to parsing restrictions */ - } - LZ4_wildCopy(op, ip, cpy); - ip += length; op = cpy; - - /* get offset */ - match = cpy - LZ4_readLE16(ip); ip+=2; - if ((checkOffset) && (unlikely(match < lowLimit))) goto _output_error; /* Error : offset outside destination buffer */ - - /* get matchlength */ - length = token & ML_MASK; - if (length == ML_MASK) - { - unsigned s; - do - { - if ((endOnInput) && (ip > iend-LASTLITERALS)) goto _output_error; - s = *ip++; - length += s; - } while (s==255); - if ((safeDecode) && unlikely((size_t)(op+length)<(size_t)op)) goto _output_error; /* overflow detection */ - } - length += MINMATCH; - - /* check external dictionary */ - if ((dict==usingExtDict) && (match < lowPrefix)) - { - if (unlikely(op+length > oend-LASTLITERALS)) goto _output_error; /* doesn't respect parsing restriction */ - - if (length <= (size_t)(lowPrefix-match)) - { - /* match can be copied as a single segment from external dictionary */ - match = dictEnd - (lowPrefix-match); - memmove(op, match, length); op += length; - } - else - { - /* match encompass external dictionary and current segment */ - size_t copySize = (size_t)(lowPrefix-match); - memcpy(op, dictEnd - copySize, copySize); - op += copySize; - copySize = length - copySize; - if (copySize > (size_t)(op-lowPrefix)) /* overlap within current segment */ - { - BYTE* const endOfMatch = op + copySize; - const BYTE* copyFrom = lowPrefix; - while (op < endOfMatch) *op++ = *copyFrom++; - } - else - { - memcpy(op, lowPrefix, copySize); - op += copySize; - } - } - continue; - } - - /* copy repeated sequence */ - cpy = op + length; - if (unlikely((op-match)<8)) - { - const size_t dec64 = dec64table[op-match]; - op[0] = match[0]; - op[1] = match[1]; - op[2] = match[2]; - op[3] = match[3]; - match += dec32table[op-match]; - LZ4_copy4(op+4, match); - op += 8; match -= dec64; - } else { LZ4_copy8(op, match); op+=8; match+=8; } - - if (unlikely(cpy>oend-12)) - { - if (cpy > oend-LASTLITERALS) goto _output_error; /* Error : last LASTLITERALS bytes must be literals */ - if (op < oend-8) - { - LZ4_wildCopy(op, match, oend-8); - match += (oend-8) - op; - op = oend-8; - } - while (op<cpy) *op++ = *match++; - } - else - LZ4_wildCopy(op, match, cpy); - op=cpy; /* correction */ - } - - /* end of decoding */ - if (endOnInput) - return (int) (((char*)op)-dest); /* Nb of output bytes decoded */ - else - return (int) (((const char*)ip)-source); /* Nb of input bytes read */ - - /* Overflow error detected */ + const BYTE *ip = (const BYTE *) src; + const BYTE * const iend = ip + srcSize; + + BYTE *op = (BYTE *) dst; + BYTE * const oend = op + outputSize; + BYTE *cpy; + + const BYTE * const dictEnd = (const BYTE *)dictStart + dictSize; + static const unsigned int inc32table[8] = {0, 1, 2, 1, 0, 4, 4, 4}; + static const int dec64table[8] = {0, 0, 0, -1, -4, 1, 2, 3}; + + const int safeDecode = (endOnInput == endOnInputSize); + const int checkOffset = ((safeDecode) && (dictSize < (int)(64 * KB))); + + /* Set up the "end" pointers for the shortcut. */ + const BYTE *const shortiend = iend - + (endOnInput ? 14 : 8) /*maxLL*/ - 2 /*offset*/; + const BYTE *const shortoend = oend - + (endOnInput ? 14 : 8) /*maxLL*/ - 18 /*maxML*/; + + DEBUGLOG(5, "%s (srcSize:%i, dstSize:%i)", __func__, + srcSize, outputSize); + + /* Special cases */ + assert(lowPrefix <= op); + assert(src != NULL); + + /* Empty output buffer */ + if ((endOnInput) && (unlikely(outputSize == 0))) + return ((srcSize == 1) && (*ip == 0)) ? 0 : -1; + + if ((!endOnInput) && (unlikely(outputSize == 0))) + return (*ip == 0 ? 1 : -1); + + if ((endOnInput) && unlikely(srcSize == 0)) + return -1; + + /* Main Loop : decode sequences */ + while (1) { + size_t length; + const BYTE *match; + size_t offset; + + /* get literal length */ + unsigned int const token = *ip++; + length = token>>ML_BITS; + + /* ip < iend before the increment */ + assert(!endOnInput || ip <= iend); + + /* + * A two-stage shortcut for the most common case: + * 1) If the literal length is 0..14, and there is enough + * space, enter the shortcut and copy 16 bytes on behalf + * of the literals (in the fast mode, only 8 bytes can be + * safely copied this way). + * 2) Further if the match length is 4..18, copy 18 bytes + * in a similar manner; but we ensure that there's enough + * space in the output for those 18 bytes earlier, upon + * entering the shortcut (in other words, there is a + * combined check for both stages). + * + * The & in the likely() below is intentionally not && so that + * some compilers can produce better parallelized runtime code + */ + if ((endOnInput ? length != RUN_MASK : length <= 8) + /* + * strictly "less than" on input, to re-enter + * the loop with at least one byte + */ + && likely((endOnInput ? ip < shortiend : 1) & + (op <= shortoend))) { + /* Copy the literals */ + memcpy(op, ip, endOnInput ? 16 : 8); + op += length; ip += length; + + /* + * The second stage: + * prepare for match copying, decode full info. + * If it doesn't work out, the info won't be wasted. + */ + length = token & ML_MASK; /* match length */ + offset = LZ4_readLE16(ip); + ip += 2; + match = op - offset; + assert(match <= op); /* check overflow */ + + /* Do not deal with overlapping matches. */ + if ((length != ML_MASK) && + (offset >= 8) && + (dict == withPrefix64k || match >= lowPrefix)) { + /* Copy the match. */ + memcpy(op + 0, match + 0, 8); + memcpy(op + 8, match + 8, 8); + memcpy(op + 16, match + 16, 2); + op += length + MINMATCH; + /* Both stages worked, load the next token. */ + continue; + } + + /* + * The second stage didn't work out, but the info + * is ready. Propel it right to the point of match + * copying. + */ + goto _copy_match; + } + + /* decode literal length */ + if (length == RUN_MASK) { + unsigned int s; + + if (unlikely(endOnInput ? ip >= iend - RUN_MASK : 0)) { + /* overflow detection */ + goto _output_error; + } + do { + s = *ip++; + length += s; + } while (likely(endOnInput + ? ip < iend - RUN_MASK + : 1) & (s == 255)); + + if ((safeDecode) + && unlikely((uptrval)(op) + + length < (uptrval)(op))) { + /* overflow detection */ + goto _output_error; + } + if ((safeDecode) + && unlikely((uptrval)(ip) + + length < (uptrval)(ip))) { + /* overflow detection */ + goto _output_error; + } + } + + /* copy literals */ + cpy = op + length; + LZ4_STATIC_ASSERT(MFLIMIT >= WILDCOPYLENGTH); + + if (((endOnInput) && ((cpy > oend - MFLIMIT) + || (ip + length > iend - (2 + 1 + LASTLITERALS)))) + || ((!endOnInput) && (cpy > oend - WILDCOPYLENGTH))) { + if (partialDecoding) { + if (cpy > oend) { + /* + * Partial decoding : + * stop in the middle of literal segment + */ + cpy = oend; + length = oend - op; + } + if ((endOnInput) + && (ip + length > iend)) { + /* + * Error : + * read attempt beyond + * end of input buffer + */ + goto _output_error; + } + } else { + if ((!endOnInput) + && (cpy != oend)) { + /* + * Error : + * block decoding must + * stop exactly there + */ + goto _output_error; + } + if ((endOnInput) + && ((ip + length != iend) + || (cpy > oend))) { + /* + * Error : + * input must be consumed + */ + goto _output_error; + } + } + + /* + * supports overlapping memory regions; only matters + * for in-place decompression scenarios + */ + memmove(op, ip, length); + ip += length; + op += length; + + /* Necessarily EOF, due to parsing restrictions */ + if (!partialDecoding || (cpy == oend)) + break; + } else { + /* may overwrite up to WILDCOPYLENGTH beyond cpy */ + LZ4_wildCopy(op, ip, cpy); + ip += length; + op = cpy; + } + + /* get offset */ + offset = LZ4_readLE16(ip); + ip += 2; + match = op - offset; + + /* get matchlength */ + length = token & ML_MASK; + +_copy_match: + if ((checkOffset) && (unlikely(match + dictSize < lowPrefix))) { + /* Error : offset outside buffers */ + goto _output_error; + } + + /* costs ~1%; silence an msan warning when offset == 0 */ + /* + * note : when partialDecoding, there is no guarantee that + * at least 4 bytes remain available in output buffer + */ + if (!partialDecoding) { + assert(oend > op); + assert(oend - op >= 4); + + LZ4_write32(op, (U32)offset); + } + + if (length == ML_MASK) { + unsigned int s; + + do { + s = *ip++; + + if ((endOnInput) && (ip > iend - LASTLITERALS)) + goto _output_error; + + length += s; + } while (s == 255); + + if ((safeDecode) + && unlikely( + (uptrval)(op) + length < (uptrval)op)) { + /* overflow detection */ + goto _output_error; + } + } + + length += MINMATCH; + + /* match starting within external dictionary */ + if ((dict == usingExtDict) && (match < lowPrefix)) { + if (unlikely(op + length > oend - LASTLITERALS)) { + /* doesn't respect parsing restriction */ + if (!partialDecoding) + goto _output_error; + length = min(length, (size_t)(oend - op)); + } + + if (length <= (size_t)(lowPrefix - match)) { + /* + * match fits entirely within external + * dictionary : just copy + */ + memmove(op, dictEnd - (lowPrefix - match), + length); + op += length; + } else { + /* + * match stretches into both external + * dictionary and current block + */ + size_t const copySize = (size_t)(lowPrefix - match); + size_t const restSize = length - copySize; + + memcpy(op, dictEnd - copySize, copySize); + op += copySize; + if (restSize > (size_t)(op - lowPrefix)) { + /* overlap copy */ + BYTE * const endOfMatch = op + restSize; + const BYTE *copyFrom = lowPrefix; + + while (op < endOfMatch) + *op++ = *copyFrom++; + } else { + memcpy(op, lowPrefix, restSize); + op += restSize; + } + } + continue; + } + + /* copy match within block */ + cpy = op + length; + + /* + * partialDecoding : + * may not respect endBlock parsing restrictions + */ + assert(op <= oend); + if (partialDecoding && + (cpy > oend - MATCH_SAFEGUARD_DISTANCE)) { + size_t const mlen = min(length, (size_t)(oend - op)); + const BYTE * const matchEnd = match + mlen; + BYTE * const copyEnd = op + mlen; + + if (matchEnd > op) { + /* overlap copy */ + while (op < copyEnd) + *op++ = *match++; + } else { + memcpy(op, match, mlen); + } + op = copyEnd; + if (op == oend) + break; + continue; + } + + if (unlikely(offset < 8)) { + op[0] = match[0]; + op[1] = match[1]; + op[2] = match[2]; + op[3] = match[3]; + match += inc32table[offset]; + memcpy(op + 4, match, 4); + match -= dec64table[offset]; + } else { + LZ4_copy8(op, match); + match += 8; + } + + op += 8; + + if (unlikely(cpy > oend - MATCH_SAFEGUARD_DISTANCE)) { + BYTE * const oCopyLimit = oend - (WILDCOPYLENGTH - 1); + + if (cpy > oend - LASTLITERALS) { + /* + * Error : last LASTLITERALS bytes + * must be literals (uncompressed) + */ + goto _output_error; + } + + if (op < oCopyLimit) { + LZ4_wildCopy(op, match, oCopyLimit); + match += oCopyLimit - op; + op = oCopyLimit; + } + while (op < cpy) + *op++ = *match++; + } else { + LZ4_copy8(op, match); + if (length > 16) + LZ4_wildCopy(op + 8, match + 8, cpy); + } + op = cpy; /* wildcopy correction */ + } + + /* end of decoding */ + if (endOnInput) { + /* Nb of output bytes decoded */ + return (int) (((char *)op) - dst); + } else { + /* Nb of input bytes read */ + return (int) (((const char *)ip) - src); + } + + /* Overflow error detected */ _output_error: - return (int) (-(((const char*)ip)-source))-1; + return (int) (-(((const char *)ip) - src)) - 1; +} + +int LZ4_decompress_safe(const char *source, char *dest, + int compressedSize, int maxDecompressedSize) +{ + return LZ4_decompress_generic(source, dest, + compressedSize, maxDecompressedSize, + endOnInputSize, decode_full_block, + noDict, (BYTE *)dest, NULL, 0); +} + +int LZ4_decompress_safe_partial(const char *src, char *dst, + int compressedSize, int targetOutputSize, int dstCapacity) +{ + dstCapacity = min(targetOutputSize, dstCapacity); + return LZ4_decompress_generic(src, dst, compressedSize, dstCapacity, + endOnInputSize, partial_decode, + noDict, (BYTE *)dst, NULL, 0); } diff --git a/lib/lz4_wrapper.c b/lib/lz4_wrapper.c index ebcb5c0..0d2a365 100644 --- a/lib/lz4_wrapper.c +++ b/lib/lz4_wrapper.c @@ -11,27 +11,6 @@ #include <asm/unaligned.h> #include <u-boot/lz4.h> -static u16 LZ4_readLE16(const void *src) -{ - return get_unaligned_le16(src); -} -static void LZ4_copy4(void *dst, const void *src) -{ - put_unaligned(get_unaligned((const u32 *)src), (u32 *)dst); -} -static void LZ4_copy8(void *dst, const void *src) -{ - put_unaligned(get_unaligned((const u64 *)src), (u64 *)dst); -} - -typedef uint8_t BYTE; -typedef uint16_t U16; -typedef uint32_t U32; -typedef int32_t S32; -typedef uint64_t U64; - -#define FORCE_INLINE static inline __attribute__((always_inline)) - /* lz4.c is unaltered (except removing unrelated code) from github.com/Cyan4973/lz4. */ #include "lz4.c" /* #include for inlining, do not link! */ @@ -112,7 +91,7 @@ int ulz4fn(const void *src, size_t srcn, void *dst, size_t *dstn) /* constant folding essential, do not touch params! */ ret = LZ4_decompress_generic(in, out, block_size, end - out, endOnInputSize, - full, 0, noDict, out, NULL, 0); + decode_full_block, noDict, out, NULL, 0); if (ret < 0) { ret = -EPROTO; /* decompression error */ break; diff --git a/lib/rsa/Kconfig b/lib/rsa/Kconfig index be9775b..b773f17 100644 --- a/lib/rsa/Kconfig +++ b/lib/rsa/Kconfig @@ -47,6 +47,25 @@ config RSA_VERIFY_WITH_PKEY directly specified in image_sign_info, where all the necessary key properties will be calculated on the fly in verification code. +config SPL_RSA_VERIFY_WITH_PKEY + bool "Execute RSA verification without key parameters from FDT within SPL" + depends on SPL + select SPL_RSA_VERIFY + select SPL_ASYMMETRIC_KEY_TYPE + select SPL_ASYMMETRIC_PUBLIC_KEY_SUBTYPE + select SPL_RSA_PUBLIC_KEY_PARSER + help + The standard RSA-signature verification code (FIT_SIGNATURE) uses + pre-calculated key properties, that are stored in fdt blob, in + decrypting a signature. + This does not suit the use case where there is no way defined to + provide such additional key properties in standardized form, + particularly UEFI secure boot. + This options enables RSA signature verification with a public key + directly specified in image_sign_info, where all the necessary + key properties will be calculated on the fly in verification code + in the SPL. + config RSA_SOFTWARE_EXP bool "Enable driver for RSA Modular Exponentiation in software" depends on DM diff --git a/net/Kconfig b/net/Kconfig index 2ae9d6a..ef0aa16 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -8,6 +8,17 @@ menuconfig NET if NET +config ARP_TIMEOUT + int "Milliseconds before trying ARP again" + default 5000 + +config NET_RETRY_COUNT + int "Number of timeouts before giving up" + default 5 + help + This variable defines the number of retries for network operations + like ARP, RARP, TFTP, or BOOTP before giving up the operation. + config PROT_UDP bool "Enable generic udp framework" help @@ -55,6 +66,13 @@ config NET_MAXDEFRAG used for reassembly, and thus an upper bound for the size of IP datagrams that can be received. +config SYS_FAULT_ECHO_LINK_DOWN + bool "Echo the inverted Ethernet link state to the fault LED" + help + Echo the inverted Ethernet link state to the fault LED. Note, if + this option is active, then CONFIG_SYS_FAULT_MII_ADDR also needs to + be configured. + config TFTP_BLOCKSIZE int "TFTP block size" default 1468 @@ -65,6 +83,24 @@ config TFTP_BLOCKSIZE almost-MTU block sizes. You can also activate CONFIG_IP_DEFRAG to set a larger block. +config TFTP_PORT + bool "Set TFTP UDP source/destination ports via the environment" + help + If this is defined, the environment variable tftpsrcp is used to + supply the TFTP UDP source port value. If tftpsrcp isn't defined, + the normal pseudo-random port number generator is used. + + Also, the environment variable tftpdstp is used to supply the TFTP + UDP destination port value. If tftpdstp isn't defined, the normal + port 69 is used. + + The purpose for tftpsrcp is to allow a TFTP server to blindly start + the TFTP transfer using the pre-configured target IP address and UDP + port. This has the effect of "punching through" the (Windows XP) + firewall, allowing the remainder of the TFTP transfer to proceed + normally. A better solution is to properly configure the firewall, + but sometimes that is not allowed. + config TFTP_WINDOWSIZE int "TFTP window size" default 1 @@ -124,3 +160,12 @@ config BOOTP_SERVERIP bootp and tftp. endif # if NET + +config SYS_RX_ETH_BUFFER + int "Number of receive packet buffers" + default 4 + help + Defines the number of Ethernet receive buffers. On some Ethernet + controllers it is recommended to set this value to 8 or even higher, + since all buffers can be full shortly after enabling the interface on + high Ethernet traffic. @@ -17,20 +17,6 @@ #include "arp.h" -#ifndef CONFIG_ARP_TIMEOUT -/* Milliseconds before trying ARP again */ -# define ARP_TIMEOUT 5000UL -#else -# define ARP_TIMEOUT CONFIG_ARP_TIMEOUT -#endif - - -#ifndef CONFIG_NET_RETRY_COUNT -# define ARP_TIMEOUT_COUNT 5 /* # of timeouts before giving up */ -#else -# define ARP_TIMEOUT_COUNT CONFIG_NET_RETRY_COUNT -#endif - struct in_addr net_arp_wait_packet_ip; static struct in_addr net_arp_wait_reply_ip; /* MAC address of waiting packet's destination */ @@ -109,10 +95,10 @@ int arp_timeout_check(void) t = get_timer(0); /* check for arp timeout */ - if ((t - arp_wait_timer_start) > ARP_TIMEOUT) { + if ((t - arp_wait_timer_start) > CONFIG_ARP_TIMEOUT) { arp_wait_try++; - if (arp_wait_try >= ARP_TIMEOUT_COUNT) { + if (arp_wait_try >= CONFIG_NET_RETRY_COUNT) { puts("\nARP Retry count exceeded; starting again\n"); arp_wait_try = 0; net_set_state(NETLOOP_FAIL); diff --git a/net/bootp.c b/net/bootp.c index d83e4eb..a544bfc 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -31,7 +31,7 @@ /* * The timeout for the initial BOOTP/DHCP request used to be described by a - * counter of fixed-length timeout periods. TIMEOUT_COUNT represents + * counter of fixed-length timeout periods. CONFIG_NET_RETRY_COUNT represents * that counter * * Now that the timeout periods are variable (exponential backoff and retry) @@ -39,12 +39,7 @@ * execute that many retries, and keep sending retry packets until that time * is reached. */ -#ifndef CONFIG_NET_RETRY_COUNT -# define TIMEOUT_COUNT 5 /* # of timeouts before giving up */ -#else -# define TIMEOUT_COUNT (CONFIG_NET_RETRY_COUNT) -#endif -#define TIMEOUT_MS ((3 + (TIMEOUT_COUNT * 5)) * 1000) +#define TIMEOUT_MS ((3 + (CONFIG_NET_RETRY_COUNT * 5)) * 1000) #define PORT_BOOTPS 67 /* BOOTP server UDP port */ #define PORT_BOOTPC 68 /* BOOTP client UDP port */ @@ -1038,9 +1033,6 @@ static void dhcp_send_request_packet(struct bootp_hdr *bp_offer) bcast_ip.s_addr = 0xFFFFFFFFL; net_set_udp_header(iphdr, bcast_ip, PORT_BOOTPS, PORT_BOOTPC, iplen); -#ifdef CONFIG_BOOTP_DHCP_REQUEST_DELAY - udelay(CONFIG_BOOTP_DHCP_REQUEST_DELAY); -#endif /* CONFIG_BOOTP_DHCP_REQUEST_DELAY */ debug("Transmitting DHCPREQUEST packet: len = %d\n", pktlen); net_send_packet(net_tx_packet, pktlen); } @@ -40,11 +40,6 @@ #define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */ #define NFS_RETRY_COUNT 30 -#ifndef CONFIG_NFS_TIMEOUT -# define NFS_TIMEOUT 2000UL -#else -# define NFS_TIMEOUT CONFIG_NFS_TIMEOUT -#endif #define NFS_RPC_ERR 1 #define NFS_RPC_DROP 124 @@ -53,7 +48,7 @@ static int fs_mounted; static unsigned long rpc_id; static int nfs_offset = -1; static int nfs_len; -static ulong nfs_timeout = NFS_TIMEOUT; +static const ulong nfs_timeout = CONFIG_NFS_TIMEOUT; static char dirfh[NFS_FHSIZE]; /* NFSv2 / NFSv3 file handle of directory */ static char filefh[NFS3_FHSIZE]; /* NFSv2 / NFSv3 file handle */ @@ -733,7 +728,7 @@ static void nfs_timeout_handler(void) } else { puts("T "); net_set_timeout_handler(nfs_timeout + - NFS_TIMEOUT * nfs_timeout_count, + nfs_timeout * nfs_timeout_count, nfs_timeout_handler); nfs_send(); } @@ -14,11 +14,6 @@ #include "rarp.h" #define TIMEOUT 5000UL /* Milliseconds before trying BOOTP again */ -#ifndef CONFIG_NET_RETRY_COUNT -#define TIMEOUT_COUNT 5 /* # of timeouts before giving up */ -#else -#define TIMEOUT_COUNT (CONFIG_NET_RETRY_COUNT) -#endif int rarp_try; @@ -57,7 +52,7 @@ void rarp_receive(struct ip_udp_hdr *ip, unsigned len) */ static void rarp_timeout_handler(void) { - if (rarp_try >= TIMEOUT_COUNT) { + if (rarp_try >= CONFIG_NET_RETRY_COUNT) { puts("\nRetry count exceeded; starting again\n"); net_start_again(); } else { @@ -27,12 +27,6 @@ DECLARE_GLOBAL_DATA_PTR; #define WELL_KNOWN_PORT 69 /* Millisecs to timeout for lost pkt */ #define TIMEOUT 5000UL -#ifndef CONFIG_NET_RETRY_COUNT -/* # of timeouts before giving up */ -# define TIMEOUT_COUNT 10 -#else -# define TIMEOUT_COUNT (CONFIG_NET_RETRY_COUNT * 2) -#endif /* Number of "loading" hashes per line (for checking the image size) */ #define HASHES_PER_LINE 65 @@ -47,7 +41,7 @@ DECLARE_GLOBAL_DATA_PTR; #define TFTP_OACK 6 static ulong timeout_ms = TIMEOUT; -static int timeout_count_max = TIMEOUT_COUNT; +static int timeout_count_max = (CONFIG_NET_RETRY_COUNT * 2); static ulong time_start; /* Record time we started tftp */ /* @@ -60,7 +54,7 @@ static ulong time_start; /* Record time we started tftp */ * non-standard timeout behavior when initiating a TFTP transfer. */ ulong tftp_timeout_ms = TIMEOUT; -int tftp_timeout_count_max = TIMEOUT_COUNT; +int tftp_timeout_count_max = (CONFIG_NET_RETRY_COUNT * 2); enum { TFTP_ERR_UNDEFINED = 0, diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index a6bc234..e4c5f74 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1,61 +1,11 @@ -CONFIG_A003399_NOR_WORKAROUND -CONFIG_A008044_WORKAROUND -CONFIG_AM335X_USB0 -CONFIG_AM335X_USB0_MODE -CONFIG_AM335X_USB1 -CONFIG_AM335X_USB1_MODE -CONFIG_ARMV7_SECURE_BASE -CONFIG_ARMV7_SECURE_MAX_SIZE -CONFIG_ARMV7_SECURE_RESERVE_SIZE -CONFIG_ARMV8_SWITCH_TO_EL1 CONFIG_ARM_GIC_BASE_ADDRESS -CONFIG_ARP_TIMEOUT -CONFIG_AT91SAM9260EK -CONFIG_AT91SAM9261EK -CONFIG_AT91SAM9G10 -CONFIG_AT91SAM9G10EK -CONFIG_AT91SAM9G20EK -CONFIG_AT91SAM9G20EK_2MMC -CONFIG_AT91SAM9G45_LCD_BASE -CONFIG_AT91SAM9M10G45EK -CONFIG_AT91_GPIO_PULLUP -CONFIG_AT91_LED -CONFIG_AT91_WANTS_COMMON_PHY -CONFIG_ATMEL_LCD -CONFIG_ATMEL_LCD_BGR555 -CONFIG_ATMEL_LCD_RGB565 -CONFIG_ATMEL_LEGACY -CONFIG_ATMEL_SPI0 CONFIG_AUTO_ZRELADDR -CONFIG_BACKSIDE_L2_CACHE -CONFIG_BCM2835_GPIO -CONFIG_BIOSEMU -CONFIG_BITBANGMII_MULTI -CONFIG_BL1_OFFSET -CONFIG_BL1_SIZE -CONFIG_BL2_OFFSET -CONFIG_BL2_SIZE CONFIG_BOARDDIR -CONFIG_BOARDNAME -CONFIG_BOARD_COMMON -CONFIG_BOARD_ECC_SUPPORT -CONFIG_BOARD_NAME -CONFIG_BOARD_POSTCLK_INIT CONFIG_BOARD_SIZE_LIMIT -CONFIG_BOOTFILE -CONFIG_BOOTMODE -CONFIG_BOOTP_BOOTFILESIZE -CONFIG_BOOTP_MAY_FAIL -CONFIG_BOOTP_NISDOMAIN -CONFIG_BOOTP_TIMEOFFSET -CONFIG_BOOTP_VENDOREX CONFIG_BOOTROM_ERR_REG CONFIG_BOOTSCRIPT_ADDR CONFIG_BOOTSCRIPT_COPY_RAM CONFIG_BOOTSCRIPT_HDR_ADDR -CONFIG_BOOT_RETRY_MIN -CONFIG_BOOT_RETRY_TIME -CONFIG_BPTR_VIRT_ADDR CONFIG_BS_ADDR_DEVICE CONFIG_BS_ADDR_RAM CONFIG_BS_COPY_CMD @@ -64,17 +14,9 @@ CONFIG_BS_HDR_ADDR_DEVICE CONFIG_BS_HDR_ADDR_RAM CONFIG_BS_HDR_SIZE CONFIG_BS_SIZE -CONFIG_BTB -CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS -CONFIG_CF_DSPI -CONFIG_CF_SBF CONFIG_CHAIN_BOOT_CMD -CONFIG_CHIP_SELECTS_PER_CTRL CONFIG_CHROMEOS_EXTRA_ENV_SETTINGS CONFIG_CI_UDC_HAS_HOSTPC -CONFIG_CLK_1000_400_200 -CONFIG_CLOCKS -CONFIG_CLOCK_SYNTHESIZER CONFIG_CM922T_XA10 CONFIG_CMDLINE_PS_SUPPORT CONFIG_CM_INIT @@ -83,32 +25,23 @@ CONFIG_CM_REMAP CONFIG_CM_SPD_DETECT CONFIG_CM_TCRAM CONFIG_COMMON_BOOT -CONFIG_CONS_ON_SCC CONFIG_CONS_SCIF0 CONFIG_CONS_SCIF1 CONFIG_CONS_SCIF2 CONFIG_CONS_SCIF4 -CONFIG_CON_ROT -CONFIG_CPLD_BR_PRELIM -CONFIG_CPLD_OR_PRELIM -CONFIG_CPM2 CONFIG_CQSPI_REF_CLK CONFIG_CUSTOMER_BOARD_SUPPORT -CONFIG_DB_784MP_GP CONFIG_DCACHE CONFIG_DEBUG CONFIG_DEBUG_LED -CONFIG_DEEP_SLEEP CONFIG_DEFAULT CONFIG_DEFAULT_IMMR CONFIG_DESIGNWARE_ETH -CONFIG_DEVICE_TREE_LIST CONFIG_DFU_ALT CONFIG_DFU_ALT_BOOT_EMMC CONFIG_DFU_ALT_BOOT_SD CONFIG_DFU_ALT_SYSTEM CONFIG_DFU_ENV_SETTINGS -CONFIG_DIALOG_POWER CONFIG_DIMM_SLOTS_PER_CTLR CONFIG_DISCOVER_PHY CONFIG_DM9000_BASE @@ -130,8 +63,6 @@ CONFIG_DW_GMAC_DEFAULT_DMA_PBL CONFIG_DW_WDT_BASE CONFIG_DW_WDT_CLOCK_KHZ CONFIG_E1000_NO_NVM -CONFIG_E300 -CONFIG_E5500 CONFIG_EFLASH_PROTSECTORS CONFIG_EHCI_DESC_BIG_ENDIAN CONFIG_EHCI_HCD_INIT_AFTER_RESET @@ -162,7 +93,6 @@ CONFIG_ESDHC_HC_BLK_ADDR CONFIG_ESPRESSO7420 CONFIG_ET1100_BASE CONFIG_ETHBASE -CONFIG_ETHPRIME CONFIG_EXTRA_CLOCK CONFIG_EXTRA_ENV CONFIG_EXTRA_ENV_SETTINGS @@ -192,7 +122,6 @@ CONFIG_FDTFILE CONFIG_FEC_ENET_DEV CONFIG_FEC_FIXED_SPEED CONFIG_FEC_MXC_PHYADDR -CONFIG_FEC_XCV_TYPE CONFIG_FIXED_SDHCI_ALIGNED_BUFFER CONFIG_FLASH_BR_PRELIM CONFIG_FLASH_CFI_LEGACY @@ -202,16 +131,12 @@ CONFIG_FLASH_SHOW_PROGRESS CONFIG_FLASH_SPANSION_S29WS_N CONFIG_FLASH_VERIFY CONFIG_FM_PLAT_CLK_DIV -CONFIG_FORMIKE CONFIG_FPGA_COUNT CONFIG_FPGA_STRATIX_V CONFIG_FSL_CADMUS CONFIG_FSL_CORENET CONFIG_FSL_CPLD -CONFIG_FSL_DCU_SII9022A CONFIG_FSL_DEVICE_DISABLE -CONFIG_FSL_DIU_CH7301 -CONFIG_FSL_DIU_FB CONFIG_FSL_DSPI1 CONFIG_FSL_ESDHC_PIN_MUX CONFIG_FSL_FIXED_MMC_LOCATION @@ -265,16 +190,10 @@ CONFIG_GATEWAYIP CONFIG_GLOBAL_TIMER CONFIG_GMII CONFIG_GREEN_LED -CONFIG_GURNARD_SPLASH CONFIG_G_DNL_THOR_PRODUCT_NUM CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_UMS_PRODUCT_NUM CONFIG_G_DNL_UMS_VENDOR_NUM -CONFIG_HAS_ETH0 -CONFIG_HAS_ETH1 -CONFIG_HAS_ETH2 -CONFIG_HAS_ETH3 -CONFIG_HAS_FEC CONFIG_HAS_FSL_DR_USB CONFIG_HAS_FSL_MPH_USB CONFIG_HDMI_ENCODER_I2C_ADDR @@ -460,9 +379,7 @@ CONFIG_KEY_REVOCATION CONFIG_KIRKWOOD_EGIGA_INIT CONFIG_KIRKWOOD_PCIE_INIT CONFIG_KIRKWOOD_RGMII_PAD_1V8 -CONFIG_KMTEGR1 CONFIG_KM_BOARD_EXTRA_ENV -CONFIG_KM_COGE5UN CONFIG_KM_DEF_ARCH CONFIG_KM_DEF_BOOT_ARGS_CPU CONFIG_KM_DEF_ENV @@ -475,13 +392,8 @@ CONFIG_KM_DEF_ENV_FLASH_BOOT CONFIG_KM_DEV_ENV_FLASH_BOOT_UBI CONFIG_KM_DISABLE_PCIE CONFIG_KM_ECC_MODE -CONFIG_KM_KIRKWOOD -CONFIG_KM_KIRKWOOD_128M16 -CONFIG_KM_KIRKWOOD_PCI CONFIG_KM_NEW_ENV -CONFIG_KM_NUSA CONFIG_KM_ROOTFSSIZE -CONFIG_KM_SUSE2 CONFIG_KM_UBI_LINUX_MTD CONFIG_KM_UBI_PARTITION_NAME_APP CONFIG_KM_UBI_PARTITION_NAME_BOOT @@ -502,18 +414,12 @@ CONFIG_L2_CACHE CONFIG_LAYERSCAPE_NS_ACCESS CONFIG_LBA48 CONFIG_LCD_ALIGNMENT -CONFIG_LCD_INFO -CONFIG_LCD_INFO_BELOW_LOGO -CONFIG_LCD_IN_PSRAM -CONFIG_LCD_LOGO CONFIG_LCD_MENU CONFIG_LD9040 -CONFIG_LEGACY CONFIG_LEGACY_BOOTCMD_ENV CONFIG_LOADS_ECHO CONFIG_LOWPOWER_ADDR CONFIG_LOWPOWER_FLAG -CONFIG_LPC32XX_ETH CONFIG_LPC32XX_HSUART CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY CONFIG_LPC32XX_NAND_MLC_NAND_TA @@ -530,25 +436,18 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS CONFIG_LPC32XX_NAND_SLC_WHOLD CONFIG_LPC32XX_NAND_SLC_WSETUP CONFIG_LPC32XX_NAND_SLC_WWIDTH -CONFIG_LPUART -CONFIG_LPUART_32B_REG CONFIG_LS102XA_STREAM_ID -CONFIG_LSCHLV2 -CONFIG_LSXHL CONFIG_MACB_SEARCH_PHY CONFIG_MALLOC_F_ADDR CONFIG_MALTA CONFIG_MAX_DSP_CPUS CONFIG_MAX_MEM_MAPPED CONFIG_MAX_RAM_BANK_SIZE -CONFIG_MCFRTC -CONFIG_MCFTMR CONFIG_MEMSIZE_IN_BYTES CONFIG_MEM_INIT_VALUE CONFIG_MEM_REMAP CONFIG_MFG_ENV_SETTINGS CONFIG_MII_DEFAULT_TSEC -CONFIG_MII_INIT CONFIG_MISC_COMMON CONFIG_MIU_2BIT_21_7_INTERLEAVED CONFIG_MIU_2BIT_INTERLEAVED @@ -574,10 +473,7 @@ CONFIG_MXC_USB_FLAGS CONFIG_MXC_USB_PORT CONFIG_MXC_USB_PORTSC CONFIG_MXS -CONFIG_MXS_AUART -CONFIG_MXS_AUART_BASE CONFIG_MXS_OCOTP -CONFIG_NANDFLASH_SIZE CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC CONFIG_NAND_CS_INIT CONFIG_NAND_ECC_BCH @@ -588,12 +484,9 @@ CONFIG_NAND_SECBOOT CONFIG_NAND_SPL CONFIG_NETDEV CONFIG_NETMASK -CONFIG_NET_RETRY_COUNT CONFIG_NEVER_ASSERT_ODT_TO_CPU -CONFIG_NFS_TIMEOUT CONFIG_NOBQFMAN CONFIG_NORBOOT -CONFIG_NORFLASH_PS32BIT CONFIG_NS16550_MIN_FUNCTIONS CONFIG_NUM_DSP_CPUS CONFIG_ODROID_REV_AIN @@ -604,7 +497,6 @@ CONFIG_PALMAS_POWER CONFIG_PCA953X CONFIG_PCI1 CONFIG_PCI2 -CONFIG_PCIE CONFIG_PCIE1 CONFIG_PCIE2 CONFIG_PCIE3 @@ -633,7 +525,6 @@ CONFIG_PHY_ET1011C_TX_CLK_FIX CONFIG_PHY_ID CONFIG_PHY_INTERFACE_MODE CONFIG_PHY_IRAM_BASE -CONFIG_PHY_RESET_DELAY CONFIG_PL011_CLOCK CONFIG_PL01x_PORTS CONFIG_PM @@ -672,7 +563,6 @@ CONFIG_PXA_STD_I2C CONFIG_PXA_VGA CONFIG_QBMAN_CLK_DIV CONFIG_QIXIS_I2C_ACCESS -CONFIG_QSPI CONFIG_RAMBOOT_NAND CONFIG_RAMBOOT_SPIFLASH CONFIG_RAMBOOT_TEXT_BASE @@ -685,12 +575,8 @@ CONFIG_RESERVED_01_BASE CONFIG_RESERVED_02_BASE CONFIG_RESERVED_03_BASE CONFIG_RESERVED_04_BASE -CONFIG_RESET_PHY_R -CONFIG_RESET_TO_RETRY CONFIG_RESET_VECTOR_ADDRESS CONFIG_RESTORE_FLASH -CONFIG_RES_BLOCK_SIZE -CONFIG_RMII CONFIG_ROCKCHIP_CHIP_TAG CONFIG_ROCKCHIP_MAX_INIT_SIZE CONFIG_ROCKCHIP_SDHCI_MAX_FREQ @@ -724,13 +610,9 @@ CONFIG_SATA2 CONFIG_SCIF_A CONFIG_SCSI_DEV_LIST CONFIG_SC_TIMER_CLK -CONFIG_SDCARD CONFIG_SDRAM_OFFSET_FOR_RT CONFIG_SECBOOT -CONFIG_SECURE_BL1_ONLY -CONFIG_SEC_FW_SIZE CONFIG_SERIAL_BOOT -CONFIG_SERIAL_FLASH CONFIG_SERIAL_SOFTWARE_FIFO CONFIG_SERVERIP CONFIG_SETUP_INITRD_TAG @@ -763,14 +645,12 @@ CONFIG_SMSC_SIO1007 CONFIG_SOCRATES CONFIG_SOFT_I2C_READ_REPEATED_START CONFIG_SPD_EEPROM -CONFIG_SPIFLASH CONFIG_SPI_ADDR CONFIG_SPI_BOOTING CONFIG_SPI_FLASH_QUAD CONFIG_SPI_FLASH_SIZE CONFIG_SPI_HALF_DUPLEX CONFIG_SPI_N25Q256A_RESET -CONFIG_SPL_ATMEL_SIZE CONFIG_SPL_BOARD_LOAD_IMAGE CONFIG_SPL_BOOTROM_SAVE CONFIG_SPL_BOOT_DEVICE @@ -817,7 +697,6 @@ CONFIG_SRIO_PCIE_BOOT_IMAGE_MEM_PHYS CONFIG_SRIO_PCIE_BOOT_IMAGE_SIZE CONFIG_SRIO_PCIE_BOOT_MASTER CONFIG_SRIO_PCIE_BOOT_RELEASE_MASK -CONFIG_SRIO_PCIE_BOOT_SLAVE CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_BUS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_MEM_PHYS CONFIG_SRIO_PCIE_BOOT_UCODE_ENV_SIZE @@ -845,7 +724,6 @@ CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_AUXCORE_BOOTDATA CONFIG_SYS_BARGSIZE CONFIG_SYS_BAUDRATE_TABLE -CONFIG_SYS_BCSR CONFIG_SYS_BFTIC3_BASE CONFIG_SYS_BFTIC3_SIZE CONFIG_SYS_BMAN_CENA_BASE @@ -1062,7 +940,6 @@ CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS CONFIG_SYS_DIALOG_PMIC_I2C_ADDR CONFIG_SYS_DIRECT_FLASH_TFTP CONFIG_SYS_DISCOVER_PHY -CONFIG_SYS_DIU_ADDR CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME @@ -1089,7 +966,6 @@ CONFIG_SYS_ETHOC_BUFFER_ADDR CONFIG_SYS_ETVPE_CLK CONFIG_SYS_EXCEPTION_VECTORS_HIGH CONFIG_SYS_FAST_CLK -CONFIG_SYS_FAULT_ECHO_LINK_DOWN CONFIG_SYS_FDT_BASE CONFIG_SYS_FDT_PAD CONFIG_SYS_FECI2C @@ -1205,8 +1081,6 @@ CONFIG_SYS_FSL_DCSR_DDR2_ADDR CONFIG_SYS_FSL_DCSR_DDR3_ADDR CONFIG_SYS_FSL_DCSR_DDR4_ADDR CONFIG_SYS_FSL_DCSR_DDR_ADDR -CONFIG_SYS_FSL_DCU_BE -CONFIG_SYS_FSL_DCU_LE CONFIG_SYS_FSL_DDR2_ADDR CONFIG_SYS_FSL_DDR3_ADDR CONFIG_SYS_FSL_DDR_ADDR @@ -1400,7 +1274,6 @@ CONFIG_SYS_I2C_PINMUX_CLR CONFIG_SYS_I2C_PINMUX_REG CONFIG_SYS_I2C_PINMUX_SET CONFIG_SYS_I2C_PXA -CONFIG_SYS_I2C_QIXIS_ADDR CONFIG_SYS_I2C_RTC_ADDR CONFIG_SYS_I2C_TCA642X_ADDR CONFIG_SYS_I2C_TCA642X_BUS_NUM @@ -1425,7 +1298,6 @@ CONFIG_SYS_INIT_RAM_LOCK CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_INIT_SP_OFFSET -CONFIG_SYS_INPUT_CLKSRC CONFIG_SYS_INTERLAKEN CONFIG_SYS_INT_FLASH_BASE CONFIG_SYS_INT_FLASH_ENABLE @@ -1446,11 +1318,6 @@ CONFIG_SYS_LBC_CACHE_BASE CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_LBC_LBCR CONFIG_SYS_LBC_LCRR -CONFIG_SYS_LBC_LSDMR_1 -CONFIG_SYS_LBC_LSDMR_2 -CONFIG_SYS_LBC_LSDMR_3 -CONFIG_SYS_LBC_LSDMR_4 -CONFIG_SYS_LBC_LSDMR_5 CONFIG_SYS_LBC_LSDMR_COMMON CONFIG_SYS_LBC_LSRT CONFIG_SYS_LBC_MRTPR @@ -1524,7 +1391,6 @@ CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_MMC_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_SIZE CONFIG_SYS_MMC_U_BOOT_START -CONFIG_SYS_MONITOR_BASE CONFIG_SYS_MONITOR_LEN CONFIG_SYS_MONITOR_SEC CONFIG_SYS_MOR_VAL @@ -1535,8 +1401,6 @@ CONFIG_SYS_MPC83xx_ESDHC_OFFSET CONFIG_SYS_MPC83xx_USB1_ADDR CONFIG_SYS_MPC83xx_USB1_OFFSET CONFIG_SYS_MPC85XX_NO_RESETVEC -CONFIG_SYS_MPC85xx_CPM_ADDR -CONFIG_SYS_MPC85xx_CPM_OFFSET CONFIG_SYS_MPC85xx_DMA CONFIG_SYS_MPC85xx_DMA1_OFFSET CONFIG_SYS_MPC85xx_DMA2_OFFSET @@ -1825,16 +1689,11 @@ CONFIG_SYS_RCAR_I2C3_BASE CONFIG_SYS_RFD CONFIG_SYS_RGMII1_PHY_ADDR CONFIG_SYS_RGMII2_PHY_ADDR -CONFIG_SYS_RIO_MEM_BUS -CONFIG_SYS_RIO_MEM_PHYS -CONFIG_SYS_RIO_MEM_SIZE -CONFIG_SYS_RIO_MEM_VIRT CONFIG_SYS_ROM_BASE CONFIG_SYS_RSTC_RMR_VAL CONFIG_SYS_RTC_BUS_NUM CONFIG_SYS_RTC_CNT CONFIG_SYS_RTC_SETUP -CONFIG_SYS_RX_ETH_BUFFER CONFIG_SYS_SATA CONFIG_SYS_SATA1 CONFIG_SYS_SATA1_FLAGS @@ -1895,7 +1754,6 @@ CONFIG_SYS_SERIAL0 CONFIG_SYS_SERIAL1 CONFIG_SYS_SERIAL2 CONFIG_SYS_SERIAL3 -CONFIG_SYS_SERIAL_BOOT CONFIG_SYS_SFP_ADDR CONFIG_SYS_SFP_OFFSET CONFIG_SYS_SGMII1_PHY_ADDR @@ -1979,16 +1837,7 @@ CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_REGS_BASE CONFIG_SYS_USB_OHCI_SLOT_NAME -CONFIG_SYS_USE_BOOT_NORFLASH -CONFIG_SYS_USE_DATAFLASH -CONFIG_SYS_USE_DATAFLASH_CS0 -CONFIG_SYS_USE_DATAFLASH_CS1 -CONFIG_SYS_USE_DATAFLASH_CS3 -CONFIG_SYS_USE_FLASH -CONFIG_SYS_USE_MMC CONFIG_SYS_USE_NAND -CONFIG_SYS_USE_NANDFLASH -CONFIG_SYS_USE_NORFLASH CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT @@ -2031,7 +1880,6 @@ CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 CONFIG_TESTPIN_MASK CONFIG_TESTPIN_REG -CONFIG_TFTP_PORT CONFIG_THOR_RESET_OFF CONFIG_THUNDERX CONFIG_TIZEN @@ -2095,9 +1943,6 @@ CONFIG_USE_ONENAND_BOARD_INIT CONFIG_U_BOOT_HDR_SIZE CONFIG_VAR_SIZE_SPL CONFIG_VERY_BIG_RAM -CONFIG_VIDEO_BCM2835 -CONFIG_VIDEO_BMP_LOGO -CONFIG_VIDEO_DA8XX CONFIG_VSC7385_ENET CONFIG_VSC7385_IMAGE CONFIG_VSC7385_IMAGE_SIZE diff --git a/scripts/event_dump.py b/scripts/event_dump.py new file mode 100755 index 0000000..751f41b --- /dev/null +++ b/scripts/event_dump.py @@ -0,0 +1,115 @@ +#!/usr/bin/env python3 +# SPDX-License-Identifier: GPL-2.0+ + +"""Decode the evspy_info linker list in a U-Boot ELF image""" + +from argparse import ArgumentParser +import os +import re +import struct +import sys + +our_path = os.path.dirname(os.path.realpath(__file__)) +src_path = os.path.dirname(our_path) + +sys.path.insert(1, os.path.join(our_path, '../tools')) + +from binman import elf +from patman import tools + +PREFIX = '_u_boot_list_2_evspy_info_2_' +RE_EVTYPE = re.compile('%s(.*)' % PREFIX) + +def show_sym(fname, data, endian, evtype, sym): + """Show information about an evspy entry + + Args: + fname (str): Filename of ELF file + data (bytes): Data for this symbol + endian (str): Endianness to use ('little', 'big', 'auto') + evtype (str): Event type, e.g. 'MISC_INIT_F' + sym (elf.Symbol): Symbol to show + """ + def _unpack_val(sym_data, offset): + start = offset * func_size + val_data = sym_data[start:start + func_size] + fmt = '%s%s' % ('>' if endian == 'big' else '<', + 'L' if func_size == 4 else 'Q') + val = struct.unpack(fmt, val_data)[0] + return val + + # Get the data, which is a struct evspy_info + sym_data = data[sym.offset:sym.offset + sym.size] + + # Figure out the word size of the struct + func_size = 4 if sym.size < 16 else 8 + + # Read the function name for evspy_info->func + while True: + # Switch to big-endian if we see a failure + func_addr = _unpack_val(sym_data, 0) + func_name = elf.GetSymbolFromAddress(fname, func_addr) + if not func_name and endian == 'auto': + endian = 'big' + else: + break + has_id = sym.size in [12, 24] + if has_id: + # Find the address of evspy_info->id in the ELF + id_addr = _unpack_val(sym_data, 2) + + # Get the file offset for that address + id_ofs = elf.GetFileOffset(fname, id_addr) + + # Read out a nul-terminated string + id_data = data[id_ofs:id_ofs + 80] + pos = id_data.find(0) + if pos: + id_data = id_data[:pos] + id_str = id_data.decode('utf-8') + else: + id_str = None + + # Find the file/line for the function + cmd = ['addr2line', '-e', fname, '%x' % func_addr] + out = tools.run(*cmd).strip() + + # Drop the full path if it is the current directory + if out.startswith(src_path): + out = out[len(src_path) + 1:] + print('%-20s %-30s %s' % (evtype, id_str or f'f:{func_name}', out)) + +def show_event_spy_list(fname, endian): + """Show a the event-spy- list from a U-Boot image + + Args: + fname (str): Filename of ELF file + endian (str): Endianness to use ('little', 'big', 'auto') + """ + syms = elf.GetSymbolFileOffset(fname, [PREFIX]) + data = tools.read_file(fname) + print('%-20s %-30s %s' % ('Event type', 'Id', 'Source location')) + print('%-20s %-30s %s' % ('-' * 20, '-' * 30, '-' * 30)) + for name, sym in syms.items(): + m_evtype = RE_EVTYPE.search(name) + evtype = m_evtype .group(1) + show_sym(fname, data, endian, evtype, sym) + +def main(argv): + """Main program + + Args: + argv (list of str): List of program arguments, excluding arvg[0] + """ + epilog = 'Show a list of even spies in a U-Boot EFL file' + parser = ArgumentParser(epilog=epilog) + parser.add_argument('elf', type=str, help='ELF file to decode') + parser.add_argument('-e', '--endian', type=str, default='auto', + help='Big-endian image') + parser.add_argument('-t', '--test', action='store_true', + help='Big-endian image') + args = parser.parse_args(argv) + show_event_spy_list(args.elf, args.endian) + +if __name__ == "__main__": + main(sys.argv[1:]) diff --git a/test/cmd/pinmux.c b/test/cmd/pinmux.c index 8ae807b..ba338b8 100644 --- a/test/cmd/pinmux.c +++ b/test/cmd/pinmux.c @@ -16,18 +16,18 @@ static int dm_test_cmd_pinmux_status_pinname(struct unit_test_state *uts) /* Test that 'pinmux status <pinname>' displays the selected pin. */ console_record_reset(); run_command("pinmux status a5", 0); - ut_assert_nextline("a5 : gpio input . "); + ut_assert_nextlinen("a5 : gpio input ."); ut_assert_console_end(); console_record_reset(); run_command("pinmux status P7", 0); - ut_assert_nextline("P7 : GPIO2 bias-pull-down input-enable. "); + ut_assert_nextlinen("P7 : GPIO2 bias-pull-down input-enable."); ut_assert_console_end(); console_record_reset(); run_command("pinmux status P9", 0); - ut_assert_nextline("single-pinctrl pinctrl-single-no-width: missing register width"); - ut_assert_nextline("P9 not found"); + ut_assert_nextlinen("single-pinctrl pinctrl-single-no-width: missing register width"); + ut_assert_nextlinen("P9 not found"); ut_assert_console_end(); return 0; diff --git a/test/common/Makefile b/test/common/Makefile index 24c9145..9087788 100644 --- a/test/common/Makefile +++ b/test/common/Makefile @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0+ obj-y += cmd_ut_common.o obj-$(CONFIG_AUTOBOOT) += test_autoboot.o +obj-$(CONFIG_EVENT) += event.o diff --git a/test/common/event.c b/test/common/event.c new file mode 100644 index 0000000..6037ae2 --- /dev/null +++ b/test/common/event.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Unit tests for event handling + * + * Copyright 2021 Google LLC + * Written by Simon Glass <sjg@chromium.org> + */ + +#include <common.h> +#include <dm.h> +#include <event.h> +#include <test/common.h> +#include <test/test.h> +#include <test/ut.h> + +struct test_state { + struct udevice *dev; + int val; +}; + +static int h_adder(void *ctx, struct event *event) +{ + struct event_data_test *data = &event->data.test; + struct test_state *test_state = ctx; + + test_state->val += data->signal; + + return 0; +} + +static int test_event_base(struct unit_test_state *uts) +{ + struct test_state state; + int signal; + + state.val = 12; + ut_assertok(event_register("wibble", EVT_TEST, h_adder, &state)); + + signal = 17; + + /* Check that the handler is called */ + ut_assertok(event_notify(EVT_TEST, &signal, sizeof(signal))); + ut_asserteq(12 + 17, state.val); + + return 0; +} +COMMON_TEST(test_event_base, 0); + +static int h_probe(void *ctx, struct event *event) +{ + struct test_state *test_state = ctx; + + test_state->dev = event->data.dm.dev; + switch (event->type) { + case EVT_DM_PRE_PROBE: + test_state->val |= 1; + break; + case EVT_DM_POST_PROBE: + test_state->val |= 2; + break; + default: + break; + } + + return 0; +} + +static int test_event_probe(struct unit_test_state *uts) +{ + struct test_state state; + struct udevice *dev; + + state.val = 0; + ut_assertok(event_register("pre", EVT_DM_PRE_PROBE, h_probe, &state)); + ut_assertok(event_register("post", EVT_DM_POST_PROBE, h_probe, &state)); + + /* Probe a device */ + ut_assertok(uclass_first_device_err(UCLASS_TEST_FDT, &dev)); + + /* Check that the handler is called */ + ut_asserteq(3, state.val); + + return 0; +} +COMMON_TEST(test_event_probe, UT_TESTF_DM | UT_TESTF_SCAN_FDT); diff --git a/test/dm/scmi.c b/test/dm/scmi.c index c938e6d..795f207 100644 --- a/test/dm/scmi.c +++ b/test/dm/scmi.c @@ -5,7 +5,7 @@ * Tests scmi_agent uclass and the SCMI drivers implemented in other * uclass devices probe when a SCMI server exposes resources. * - * Note in test.dts the protocol@10 node in agent 1. Protocol 0x10 is not + * Note in test.dts the protocol@10 node in scmi node. Protocol 0x10 is not * implemented in U-Boot SCMI components but the implementation is exepected * to not complain on unknown protocol IDs, as long as it is not used. Note * in test.dts tests that SCMI drivers probing does not fail for such an @@ -28,8 +28,7 @@ static int ut_assert_scmi_state_preprobe(struct unit_test_state *uts) struct sandbox_scmi_service *scmi_ctx = sandbox_scmi_service_ctx(); ut_assertnonnull(scmi_ctx); - if (scmi_ctx->agent_count) - ut_asserteq(2, scmi_ctx->agent_count); + ut_assertnull(scmi_ctx->agent); return 0; } @@ -39,35 +38,26 @@ static int ut_assert_scmi_state_postprobe(struct unit_test_state *uts, { struct sandbox_scmi_devices *scmi_devices; struct sandbox_scmi_service *scmi_ctx; - struct sandbox_scmi_agent *agent0; - struct sandbox_scmi_agent *agent1; + struct sandbox_scmi_agent *agent; /* Device references to check context against test sequence */ scmi_devices = sandbox_scmi_devices_ctx(dev); - ut_assertnonnull(scmi_devices); - ut_asserteq(3, scmi_devices->clk_count); + ut_asserteq(2, scmi_devices->clk_count); ut_asserteq(1, scmi_devices->reset_count); ut_asserteq(2, scmi_devices->regul_count); /* State of the simulated SCMI server exposed */ scmi_ctx = sandbox_scmi_service_ctx(); - agent0 = scmi_ctx->agent[0]; - agent1 = scmi_ctx->agent[1]; - - ut_asserteq(2, scmi_ctx->agent_count); - - ut_assertnonnull(agent0); - ut_asserteq(2, agent0->clk_count); - ut_assertnonnull(agent0->clk); - ut_asserteq(1, agent0->reset_count); - ut_assertnonnull(agent0->reset); - ut_asserteq(2, agent0->voltd_count); - ut_assertnonnull(agent0->voltd); - - ut_assertnonnull(agent1); - ut_assertnonnull(agent1->clk); - ut_asserteq(1, agent1->clk_count); + ut_assertnonnull(scmi_ctx); + agent = scmi_ctx->agent; + ut_assertnonnull(agent); + ut_asserteq(3, agent->clk_count); + ut_assertnonnull(agent->clk); + ut_asserteq(1, agent->reset_count); + ut_assertnonnull(agent->reset); + ut_asserteq(2, agent->voltd_count); + ut_assertnonnull(agent->voltd); return 0; } @@ -118,9 +108,8 @@ static int dm_test_scmi_clocks(struct unit_test_state *uts) { struct sandbox_scmi_devices *scmi_devices; struct sandbox_scmi_service *scmi_ctx; - struct sandbox_scmi_agent *agent0; - struct sandbox_scmi_agent *agent1; - struct udevice *dev = NULL; + struct sandbox_scmi_agent *agent; + struct udevice *dev; int ret_dev; int ret; @@ -129,48 +118,50 @@ static int dm_test_scmi_clocks(struct unit_test_state *uts) return ret; scmi_devices = sandbox_scmi_devices_ctx(dev); + ut_assertnonnull(scmi_devices); scmi_ctx = sandbox_scmi_service_ctx(); - agent0 = scmi_ctx->agent[0]; - agent1 = scmi_ctx->agent[1]; + ut_assertnonnull(scmi_ctx); + agent = scmi_ctx->agent; + ut_assertnonnull(agent); /* Test SCMI clocks rate manipulation */ + ut_asserteq(333, agent->clk[0].rate); + ut_asserteq(200, agent->clk[1].rate); + ut_asserteq(1000, agent->clk[2].rate); + ut_asserteq(1000, clk_get_rate(&scmi_devices->clk[0])); ut_asserteq(333, clk_get_rate(&scmi_devices->clk[1])); - ut_asserteq(44, clk_get_rate(&scmi_devices->clk[2])); ret_dev = clk_set_rate(&scmi_devices->clk[1], 1088); ut_assert(!ret_dev || ret_dev == 1088); - ut_asserteq(1000, agent0->clk[0].rate); - ut_asserteq(1088, agent0->clk[1].rate); - ut_asserteq(44, agent1->clk[0].rate); + ut_asserteq(1088, agent->clk[0].rate); + ut_asserteq(200, agent->clk[1].rate); + ut_asserteq(1000, agent->clk[2].rate); ut_asserteq(1000, clk_get_rate(&scmi_devices->clk[0])); ut_asserteq(1088, clk_get_rate(&scmi_devices->clk[1])); - ut_asserteq(44, clk_get_rate(&scmi_devices->clk[2])); /* restore original rate for further tests */ ret_dev = clk_set_rate(&scmi_devices->clk[1], 333); ut_assert(!ret_dev || ret_dev == 333); /* Test SCMI clocks gating manipulation */ - ut_assert(!agent0->clk[0].enabled); - ut_assert(!agent0->clk[1].enabled); - ut_assert(!agent1->clk[0].enabled); + ut_assert(!agent->clk[0].enabled); + ut_assert(!agent->clk[1].enabled); + ut_assert(!agent->clk[2].enabled); ut_asserteq(0, clk_enable(&scmi_devices->clk[1])); - ut_asserteq(0, clk_enable(&scmi_devices->clk[2])); - ut_assert(!agent0->clk[0].enabled); - ut_assert(agent0->clk[1].enabled); - ut_assert(agent1->clk[0].enabled); + ut_assert(agent->clk[0].enabled); + ut_assert(!agent->clk[1].enabled); + ut_assert(!agent->clk[2].enabled); ut_assertok(clk_disable(&scmi_devices->clk[1])); - ut_assertok(clk_disable(&scmi_devices->clk[2])); - ut_assert(!agent0->clk[0].enabled); - ut_assert(!agent0->clk[1].enabled); - ut_assert(!agent1->clk[0].enabled); + ut_assert(!agent->clk[0].enabled); + ut_assert(!agent->clk[1].enabled); + ut_assert(!agent->clk[2].enabled); return release_sandbox_scmi_test_devices(uts, dev); } @@ -180,7 +171,7 @@ static int dm_test_scmi_resets(struct unit_test_state *uts) { struct sandbox_scmi_devices *scmi_devices; struct sandbox_scmi_service *scmi_ctx; - struct sandbox_scmi_agent *agent0; + struct sandbox_scmi_agent *agent; struct udevice *dev = NULL; int ret; @@ -189,17 +180,20 @@ static int dm_test_scmi_resets(struct unit_test_state *uts) return ret; scmi_devices = sandbox_scmi_devices_ctx(dev); + ut_assertnonnull(scmi_devices); scmi_ctx = sandbox_scmi_service_ctx(); - agent0 = scmi_ctx->agent[0]; + ut_assertnonnull(scmi_ctx); + agent = scmi_ctx->agent; + ut_assertnonnull(agent); /* Test SCMI resect controller manipulation */ - ut_assert(!agent0->reset[0].asserted) + ut_assert(!agent->reset[0].asserted) ut_assertok(reset_assert(&scmi_devices->reset[0])); - ut_assert(agent0->reset[0].asserted) + ut_assert(agent->reset[0].asserted) ut_assertok(reset_deassert(&scmi_devices->reset[0])); - ut_assert(!agent0->reset[0].asserted); + ut_assert(!agent->reset[0].asserted); return release_sandbox_scmi_test_devices(uts, dev); } @@ -209,7 +203,7 @@ static int dm_test_scmi_voltage_domains(struct unit_test_state *uts) { struct sandbox_scmi_devices *scmi_devices; struct sandbox_scmi_service *scmi_ctx; - struct sandbox_scmi_agent *agent0; + struct sandbox_scmi_agent *agent; struct dm_regulator_uclass_plat *uc_pdata; struct udevice *dev; struct udevice *regul0_dev; @@ -217,8 +211,11 @@ static int dm_test_scmi_voltage_domains(struct unit_test_state *uts) ut_assertok(load_sandbox_scmi_test_devices(uts, &dev)); scmi_devices = sandbox_scmi_devices_ctx(dev); + ut_assertnonnull(scmi_devices); scmi_ctx = sandbox_scmi_service_ctx(); - agent0 = scmi_ctx->agent[0]; + ut_assertnonnull(scmi_ctx); + agent = scmi_ctx->agent; + ut_assertnonnull(agent); /* Set/Get an SCMI voltage domain level */ regul0_dev = scmi_devices->regul[0]; @@ -228,32 +225,32 @@ static int dm_test_scmi_voltage_domains(struct unit_test_state *uts) ut_assert(uc_pdata); ut_assertok(regulator_set_value(regul0_dev, uc_pdata->min_uV)); - ut_asserteq(agent0->voltd[0].voltage_uv, uc_pdata->min_uV); + ut_asserteq(agent->voltd[0].voltage_uv, uc_pdata->min_uV); ut_assert(regulator_get_value(regul0_dev) == uc_pdata->min_uV); ut_assertok(regulator_set_value(regul0_dev, uc_pdata->max_uV)); - ut_asserteq(agent0->voltd[0].voltage_uv, uc_pdata->max_uV); + ut_asserteq(agent->voltd[0].voltage_uv, uc_pdata->max_uV); ut_assert(regulator_get_value(regul0_dev) == uc_pdata->max_uV); /* Enable/disable SCMI voltage domains */ ut_assertok(regulator_set_enable(scmi_devices->regul[0], false)); ut_assertok(regulator_set_enable(scmi_devices->regul[1], false)); - ut_assert(!agent0->voltd[0].enabled); - ut_assert(!agent0->voltd[1].enabled); + ut_assert(!agent->voltd[0].enabled); + ut_assert(!agent->voltd[1].enabled); ut_assertok(regulator_set_enable(scmi_devices->regul[0], true)); - ut_assert(agent0->voltd[0].enabled); - ut_assert(!agent0->voltd[1].enabled); + ut_assert(agent->voltd[0].enabled); + ut_assert(!agent->voltd[1].enabled); ut_assertok(regulator_set_enable(scmi_devices->regul[1], true)); - ut_assert(agent0->voltd[0].enabled); - ut_assert(agent0->voltd[1].enabled); + ut_assert(agent->voltd[0].enabled); + ut_assert(agent->voltd[1].enabled); ut_assertok(regulator_set_enable(scmi_devices->regul[0], false)); - ut_assert(!agent0->voltd[0].enabled); - ut_assert(agent0->voltd[1].enabled); + ut_assert(!agent->voltd[0].enabled); + ut_assert(agent->voltd[1].enabled); return release_sandbox_scmi_test_devices(uts, dev); } diff --git a/test/image/spl_load.c b/test/image/spl_load.c index e7cabf5..df389e2 100644 --- a/test/image/spl_load.c +++ b/test/image/spl_load.c @@ -56,7 +56,6 @@ struct image_header *spl_get_load_buffer(ssize_t offset, size_t size) static int spl_test_load(struct unit_test_state *uts) { - const char *cur_prefix, *next_prefix; struct spl_image_info image; struct image_header *header; struct text_ctx text_ctx; @@ -69,10 +68,7 @@ static int spl_test_load(struct unit_test_state *uts) load.bl_len = 512; load.read = read_fit_image; - cur_prefix = spl_phase_prefix(spl_phase()); - next_prefix = spl_phase_prefix(spl_next_phase()); - ret = os_find_u_boot(fname, sizeof(fname), true, cur_prefix, - next_prefix); + ret = sandbox_find_next_phase(fname, sizeof(fname), true); if (ret) { printf("(%s not found, error %d)\n", fname, ret); return ret; diff --git a/test/py/tests/test_android/test_avb.py b/test/py/tests/test_android/test_avb.py index a04a7ff..a3f8831 100644 --- a/test/py/tests/test_android/test_avb.py +++ b/test/py/tests/test_android/test_avb.py @@ -66,7 +66,7 @@ def test_avb_mmc_uuid(u_boot_console): part_list[cur_partname] = guid_to_check[1] # lets check all guids with avb get_guid - for part, guid in part_list.iteritems(): + for part, guid in part_list.items(): avb_guid_resp = u_boot_console.run_command('avb get_uuid %s' % part) assert guid == avb_guid_resp.split('UUID: ')[1] diff --git a/test/py/tests/test_bind.py b/test/py/tests/test_bind.py index 9f234fb6..8ad277d 100644 --- a/test/py/tests/test_bind.py +++ b/test/py/tests/test_bind.py @@ -131,7 +131,7 @@ def test_bind_unbind_with_uclass(u_boot_console): child2_index = int(child2_line[0].split()[1]) #bind simple_bus as a child of bind-test-child2 - response = u_boot_console.run_command('bind {} {} simple_bus'.format(child2_uclass, child2_index, 'simple_bus')) + response = u_boot_console.run_command('bind {} {} simple_bus'.format(child2_uclass, child2_index)) #check that the child is there and its uclass/index pair is right tree = u_boot_console.run_command('dm tree') @@ -152,7 +152,7 @@ def test_bind_unbind_with_uclass(u_boot_console): assert child_of_child2_line == '' #bind simple_bus as a child of bind-test-child2 - response = u_boot_console.run_command('bind {} {} simple_bus'.format(child2_uclass, child2_index, 'simple_bus')) + response = u_boot_console.run_command('bind {} {} simple_bus'.format(child2_uclass, child2_index)) #check that the child is there and its uclass/index pair is right tree = u_boot_console.run_command('dm tree') @@ -165,7 +165,7 @@ def test_bind_unbind_with_uclass(u_boot_console): assert child_of_child2_index == child2_index + 1 #unbind the child and check it has been removed - response = u_boot_console.run_command('unbind {} {} simple_bus'.format(child2_uclass, child2_index, 'simple_bus')) + response = u_boot_console.run_command('unbind {} {} simple_bus'.format(child2_uclass, child2_index)) assert response == '' tree = u_boot_console.run_command('dm tree') @@ -176,7 +176,7 @@ def test_bind_unbind_with_uclass(u_boot_console): #unbind the child again and check it doesn't change the tree tree_old = u_boot_console.run_command('dm tree') - response = u_boot_console.run_command('unbind {} {} simple_bus'.format(child2_uclass, child2_index, 'simple_bus')) + response = u_boot_console.run_command('unbind {} {} simple_bus'.format(child2_uclass, child2_index)) tree_new = u_boot_console.run_command('dm tree') assert response == '' diff --git a/test/py/tests/test_event_dump.py b/test/py/tests/test_event_dump.py new file mode 100644 index 0000000..b753e80 --- /dev/null +++ b/test/py/tests/test_event_dump.py @@ -0,0 +1,20 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright 2021 Google LLC +# Written by Simon Glass <sjg@chromium.org> + +import pytest +import re +import u_boot_utils as util + +# This is only a partial test - coverting 64-bit sandbox. It does not test +# big-endian images, nor 32-bit images +@pytest.mark.boardspec('sandbox') +def test_event_dump(u_boot_console): + """Test that the "help" command can be executed.""" + cons = u_boot_console + sandbox = cons.config.build_dir + '/u-boot' + out = util.run_and_log(cons, ['scripts/event_dump.py', sandbox]) + expect = '''.*Event type Id Source location +-------------------- ------------------------------ ------------------------------ +EVT_MISC_INIT_F sandbox_misc_init_f .*arch/sandbox/cpu/start.c:''' + assert re.match(expect, out, re.MULTILINE) is not None diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py index 6d5b43c..5856960 100755 --- a/test/py/tests/test_fit.py +++ b/test/py/tests/test_fit.py @@ -89,6 +89,9 @@ base_fdt = ''' model = "Sandbox Verified Boot Test"; compatible = "sandbox"; + binman { + }; + reset@0 { compatible = "sandbox,reset"; reg = <0>; diff --git a/test/py/tests/test_fs/test_erofs.py b/test/py/tests/test_fs/test_erofs.py new file mode 100644 index 0000000..458a52b --- /dev/null +++ b/test/py/tests/test_fs/test_erofs.py @@ -0,0 +1,211 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (C) 2022 Huang Jianan <jnhuang95@gmail.com> +# Author: Huang Jianan <jnhuang95@gmail.com> + +import os +import pytest +import shutil +import subprocess + +EROFS_SRC_DIR = 'erofs_src_dir' +EROFS_IMAGE_NAME = 'erofs.img' + +def generate_file(name, size): + """ + Generates a file filled with 'x'. + """ + content = 'x' * size + file = open(name, 'w') + file.write(content) + file.close() + +def make_erofs_image(build_dir): + """ + Makes the EROFS images used for the test. + + The image is generated at build_dir with the following structure: + erofs_src_dir/ + ├── f4096 + ├── f7812 + ├── subdir/ + │  └── subdir-file + ├── symdir -> subdir + └── symfile -> f5096 + """ + root = os.path.join(build_dir, EROFS_SRC_DIR) + os.makedirs(root) + + # 4096: uncompressed file + generate_file(os.path.join(root, 'f4096'), 4096) + + # 7812: Compressed file + generate_file(os.path.join(root, 'f7812'), 7812) + + # sub-directory with a single file inside + subdir_path = os.path.join(root, 'subdir') + os.makedirs(subdir_path) + generate_file(os.path.join(subdir_path, 'subdir-file'), 100) + + # symlink + os.symlink('subdir', os.path.join(root, 'symdir')) + os.symlink('f7812', os.path.join(root, 'symfile')) + + input_path = os.path.join(build_dir, EROFS_SRC_DIR) + output_path = os.path.join(build_dir, EROFS_IMAGE_NAME) + args = ' '.join([output_path, input_path]) + subprocess.run(['mkfs.erofs -zlz4 ' + args], shell=True, check=True, + stdout=subprocess.DEVNULL) + +def clean_erofs_image(build_dir): + """ + Deletes the image and src_dir at build_dir. + """ + path = os.path.join(build_dir, EROFS_SRC_DIR) + shutil.rmtree(path) + image_path = os.path.join(build_dir, EROFS_IMAGE_NAME) + os.remove(image_path) + +def erofs_ls_at_root(u_boot_console): + """ + Test if all the present files and directories were listed. + """ + no_slash = u_boot_console.run_command('erofsls host 0') + slash = u_boot_console.run_command('erofsls host 0 /') + assert no_slash == slash + + expected_lines = ['./', '../', '4096 f4096', '7812 f7812', 'subdir/', + '<SYM> symdir', '<SYM> symfile', '4 file(s), 3 dir(s)'] + + output = u_boot_console.run_command('erofsls host 0') + for line in expected_lines: + assert line in output + +def erofs_ls_at_subdir(u_boot_console): + """ + Test if the path resolution works. + """ + expected_lines = ['./', '../', '100 subdir-file', '1 file(s), 2 dir(s)'] + output = u_boot_console.run_command('erofsls host 0 subdir') + for line in expected_lines: + assert line in output + +def erofs_ls_at_symlink(u_boot_console): + """ + Test if the symbolic link's target resolution works. + """ + output = u_boot_console.run_command('erofsls host 0 symdir') + output_subdir = u_boot_console.run_command('erofsls host 0 subdir') + assert output == output_subdir + + expected_lines = ['./', '../', '100 subdir-file', '1 file(s), 2 dir(s)'] + for line in expected_lines: + assert line in output + +def erofs_ls_at_non_existent_dir(u_boot_console): + """ + Test if the EROFS support will crash when get a nonexistent directory. + """ + out_non_existent = u_boot_console.run_command('erofsls host 0 fff') + out_not_dir = u_boot_console.run_command('erofsls host 0 f1000') + assert out_non_existent == out_not_dir + assert '' in out_non_existent + +def erofs_load_files(u_boot_console, files, sizes, address): + """ + Loads files and asserts their checksums. + """ + build_dir = u_boot_console.config.build_dir + for (file, size) in zip(files, sizes): + out = u_boot_console.run_command('erofsload host 0 {} {}'.format(address, file)) + + # check if the right amount of bytes was read + assert size in out + + # calculate u-boot file's checksum + out = u_boot_console.run_command('md5sum {} {}'.format(address, hex(int(size)))) + u_boot_checksum = out.split()[-1] + + # calculate original file's checksum + original_file_path = os.path.join(build_dir, EROFS_SRC_DIR + '/' + file) + out = subprocess.run(['md5sum ' + original_file_path], shell=True, check=True, + capture_output=True, text=True) + original_checksum = out.stdout.split()[0] + + # compare checksum + assert u_boot_checksum == original_checksum + +def erofs_load_files_at_root(u_boot_console): + """ + Test load file from the root directory. + """ + files = ['f4096', 'f7812'] + sizes = ['4096', '7812'] + address = '$kernel_addr_r' + erofs_load_files(u_boot_console, files, sizes, address) + +def erofs_load_files_at_subdir(u_boot_console): + """ + Test load file from the subdirectory. + """ + files = ['subdir/subdir-file'] + sizes = ['100'] + address = '$kernel_addr_r' + erofs_load_files(u_boot_console, files, sizes, address) + +def erofs_load_files_at_symlink(u_boot_console): + """ + Test load file from the symlink. + """ + files = ['symfile'] + sizes = ['7812'] + address = '$kernel_addr_r' + erofs_load_files(u_boot_console, files, sizes, address) + +def erofs_load_non_existent_file(u_boot_console): + """ + Test if the EROFS support will crash when load a nonexistent file. + """ + address = '$kernel_addr_r' + file = 'non-existent' + out = u_boot_console.run_command('erofsload host 0 {} {}'.format(address, file)) + assert 'Failed to load' in out + +def erofs_run_all_tests(u_boot_console): + """ + Runs all test cases. + """ + erofs_ls_at_root(u_boot_console) + erofs_ls_at_subdir(u_boot_console) + erofs_ls_at_symlink(u_boot_console) + erofs_ls_at_non_existent_dir(u_boot_console) + erofs_load_files_at_root(u_boot_console) + erofs_load_files_at_subdir(u_boot_console) + erofs_load_files_at_symlink(u_boot_console) + erofs_load_non_existent_file(u_boot_console) + +@pytest.mark.boardspec('sandbox') +@pytest.mark.buildconfigspec('cmd_fs_generic') +@pytest.mark.buildconfigspec('cmd_erofs') +@pytest.mark.buildconfigspec('fs_erofs') +@pytest.mark.requiredtool('mkfs.erofs') +@pytest.mark.requiredtool('md5sum') + +def test_erofs(u_boot_console): + """ + Executes the erofs test suite. + """ + build_dir = u_boot_console.config.build_dir + + try: + # setup test environment + make_erofs_image(build_dir) + image_path = os.path.join(build_dir, EROFS_IMAGE_NAME) + u_boot_console.run_command('host bind 0 {}'.format(image_path)) + # run all tests + erofs_run_all_tests(u_boot_console) + except: + clean_erofs_image(build_dir) + raise AssertionError + + # clean test environment + clean_erofs_image(build_dir) diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py index ac8ed9f..040147d 100644 --- a/test/py/tests/test_vboot.py +++ b/test/py/tests/test_vboot.py @@ -21,6 +21,14 @@ For configuration verification: - Corrupt the signature - Check that image verification no-longer works +For pre-load header verification: +- Create FIT image with a pre-load header +- Check that signature verification succeeds +- Corrupt the FIT image +- Check that signature verification fails +- Launch an FIT image without a pre-load header +- Check that image verification fails + Tests run with both SHA1 and SHA256 hashing. """ @@ -35,19 +43,21 @@ import vboot_evil # Only run the full suite on a few combinations, since it doesn't add any more # test coverage. TESTDATA = [ - ['sha1-basic', 'sha1', '', None, False, True, False], - ['sha1-pad', 'sha1', '', '-E -p 0x10000', False, False, False], - ['sha1-pss', 'sha1', '-pss', None, False, False, False], - ['sha1-pss-pad', 'sha1', '-pss', '-E -p 0x10000', False, False, False], - ['sha256-basic', 'sha256', '', None, False, False, False], - ['sha256-pad', 'sha256', '', '-E -p 0x10000', False, False, False], - ['sha256-pss', 'sha256', '-pss', None, False, False, False], - ['sha256-pss-pad', 'sha256', '-pss', '-E -p 0x10000', False, False, False], - ['sha256-pss-required', 'sha256', '-pss', None, True, False, False], - ['sha256-pss-pad-required', 'sha256', '-pss', '-E -p 0x10000', True, True, False], - ['sha384-basic', 'sha384', '', None, False, False, False], - ['sha384-pad', 'sha384', '', '-E -p 0x10000', False, False, False], - ['algo-arg', 'algo-arg', '', '-o sha256,rsa2048', False, False, True], + ['sha1-basic', 'sha1', '', None, False, True, False, False], + ['sha1-pad', 'sha1', '', '-E -p 0x10000', False, False, False, False], + ['sha1-pss', 'sha1', '-pss', None, False, False, False, False], + ['sha1-pss-pad', 'sha1', '-pss', '-E -p 0x10000', False, False, False, False], + ['sha256-basic', 'sha256', '', None, False, False, False, False], + ['sha256-pad', 'sha256', '', '-E -p 0x10000', False, False, False, False], + ['sha256-pss', 'sha256', '-pss', None, False, False, False, False], + ['sha256-pss-pad', 'sha256', '-pss', '-E -p 0x10000', False, False, False, False], + ['sha256-pss-required', 'sha256', '-pss', None, True, False, False, False], + ['sha256-pss-pad-required', 'sha256', '-pss', '-E -p 0x10000', True, True, False, False], + ['sha384-basic', 'sha384', '', None, False, False, False, False], + ['sha384-pad', 'sha384', '', '-E -p 0x10000', False, False, False, False], + ['algo-arg', 'algo-arg', '', '-o sha256,rsa2048', False, False, True, False], + ['sha256-global-sign', 'sha256', '', '', False, False, False, True], + ['sha256-global-sign-pss', 'sha256', '-pss', '', False, False, False, True], ] @pytest.mark.boardspec('sandbox') @@ -56,10 +66,10 @@ TESTDATA = [ @pytest.mark.requiredtool('fdtget') @pytest.mark.requiredtool('fdtput') @pytest.mark.requiredtool('openssl') -@pytest.mark.parametrize("name,sha_algo,padding,sign_options,required,full_test,algo_arg", +@pytest.mark.parametrize("name,sha_algo,padding,sign_options,required,full_test,algo_arg,global_sign", TESTDATA) def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, - full_test, algo_arg): + full_test, algo_arg, global_sign): """Test verified boot signing with mkimage and verification with 'bootm'. This works using sandbox only as it needs to update the device tree used @@ -81,6 +91,33 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, util.run_and_log(cons, 'dtc %s %s%s -O dtb ' '-o %s%s' % (dtc_args, datadir, dts, tmpdir, dtb)) + def dtc_options(dts, options): + """Run the device tree compiler to compile a .dts file + + The output file will be the same as the input file but with a .dtb + extension. + + Args: + dts: Device tree file to compile. + options: Options provided to the compiler. + """ + dtb = dts.replace('.dts', '.dtb') + util.run_and_log(cons, 'dtc %s %s%s -O dtb ' + '-o %s%s %s' % (dtc_args, datadir, dts, tmpdir, dtb, options)) + + def run_binman(dtb): + """Run binman to build an image + + Args: + dtb: Device tree file used as input file. + """ + pythonpath = os.environ.get('PYTHONPATH', '') + os.environ['PYTHONPATH'] = pythonpath + ':' + '%s/../scripts/dtc/pylibfdt' % tmpdir + util.run_and_log(cons, [binman, 'build', '-d', "%s/%s" % (tmpdir,dtb), + '-a', "pre-load-key-path=%s" % tmpdir, '-O', + tmpdir, '-I', tmpdir]) + os.environ['PYTHONPATH'] = pythonpath + def run_bootm(sha_algo, test_type, expect_string, boots, fit=None): """Run a 'bootm' command U-Boot. @@ -139,6 +176,23 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, cons.log.action('%s: Sign images' % sha_algo) util.run_and_log(cons, args) + def sign_fit_dtb(sha_algo, options, dtb): + """Sign the FIT + + Signs the FIT and writes the signature into it. It also writes the + public key into the dtb. + + Args: + sha_algo: Either 'sha1' or 'sha256', to select the algorithm to + use. + options: Options to provide to mkimage. + """ + args = [mkimage, '-F', '-k', tmpdir, '-K', dtb, '-r', fit] + if options: + args += options.split(' ') + cons.log.action('%s: Sign images' % sha_algo) + util.run_and_log(cons, args) + def sign_fit_norequire(sha_algo, options): """Sign the FIT @@ -176,6 +230,20 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, handle.write(struct.pack(">I", size)) return struct.unpack(">I", total_size)[0] + def corrupt_file(fit, offset, value): + """Corrupt a file + + To corrupt a file, a value is written at the specified offset + + Args: + fit: The file to corrupt + offset: Offset to write + value: Value written + """ + with open(fit, 'r+b') as handle: + handle.seek(offset) + handle.write(struct.pack(">I", value)) + def create_rsa_pair(name): """Generate a new RSA key paid and certificate @@ -374,6 +442,51 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, (dtb)) run_bootm(sha_algo, 'multi required key', '', False) + def test_global_sign(sha_algo, padding, sign_options): + """Test global image signature with the given hash algorithm and padding. + + Args: + sha_algo: Either 'sha1' or 'sha256', to select the algorithm to use + padding: Either '' or '-pss', to select the padding to use for the + rsa signature algorithm. + """ + + dtb = '%ssandbox-u-boot-global%s.dtb' % (tmpdir, padding) + cons.config.dtb = dtb + + # Compile our device tree files for kernel and U-Boot. These are + # regenerated here since mkimage will modify them (by adding a + # public key) below. + dtc('sandbox-kernel.dts') + dtc_options('sandbox-u-boot-global%s.dts' % padding, '-p 1024') + + # Build the FIT with dev key (keys NOT required). This adds the + # signature into sandbox-u-boot.dtb, NOT marked 'required'. + make_fit('simple-images.its') + sign_fit_dtb(sha_algo, '', dtb) + + # Build the dtb for binman that define the pre-load header + # with the global sigature. + dtc('sandbox-binman%s.dts' % padding) + + # Run binman to create the final image with the not signed fit + # and the pre-load header that contains the global signature. + run_binman('sandbox-binman%s.dtb' % padding) + + # Check that the signature is correctly verified by u-boot + run_bootm(sha_algo, 'global image signature', + 'signature check has succeed', True, "%ssandbox.img" % tmpdir) + + # Corrupt the image (just one byte after the pre-load header) + corrupt_file("%ssandbox.img" % tmpdir, 4096, 255); + + # Check that the signature verification fails + run_bootm(sha_algo, 'global image signature', + 'signature check has failed', False, "%ssandbox.img" % tmpdir) + + # Check that the boot fails if the global signature is not provided + run_bootm(sha_algo, 'global image signature', 'signature is mandatory', False) + cons = u_boot_console tmpdir = os.path.join(cons.config.result_dir, name) + '/' if not os.path.exists(tmpdir): @@ -381,6 +494,7 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, datadir = cons.config.source_dir + '/test/py/tests/vboot/' fit = '%stest.fit' % tmpdir mkimage = cons.config.build_dir + '/tools/mkimage' + binman = cons.config.source_dir + '/tools/binman/binman' fit_check_sign = cons.config.build_dir + '/tools/fit_check_sign' dtc_args = '-I dts -O dtb -i %s' % tmpdir dtb = '%ssandbox-u-boot.dtb' % tmpdir @@ -403,7 +517,9 @@ def test_vboot(u_boot_console, name, sha_algo, padding, sign_options, required, # afterwards. old_dtb = cons.config.dtb cons.config.dtb = dtb - if required: + if global_sign: + test_global_sign(sha_algo, padding, sign_options) + elif required: test_required_key(sha_algo, padding, sign_options) else: test_with_algo(sha_algo, padding, sign_options) diff --git a/test/py/tests/vboot/sandbox-binman-pss.dts b/test/py/tests/vboot/sandbox-binman-pss.dts new file mode 100644 index 0000000..56e3a42 --- /dev/null +++ b/test/py/tests/vboot/sandbox-binman-pss.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + filename = "sandbox.img"; + + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + padding-name = "pss"; + key-name = "dev.key"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "test.fit"; + }; + }; +}; diff --git a/test/py/tests/vboot/sandbox-binman.dts b/test/py/tests/vboot/sandbox-binman.dts new file mode 100644 index 0000000..b24aeba --- /dev/null +++ b/test/py/tests/vboot/sandbox-binman.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + filename = "sandbox.img"; + + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + key-name = "dev.key"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "test.fit"; + }; + }; +}; diff --git a/test/py/tests/vboot/sandbox-u-boot-global-pss.dts b/test/py/tests/vboot/sandbox-u-boot-global-pss.dts new file mode 100644 index 0000000..c59a682 --- /dev/null +++ b/test/py/tests/vboot/sandbox-u-boot-global-pss.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + model = "Sandbox Verified Boot Test"; + compatible = "sandbox"; + + binman { + }; + + reset@0 { + compatible = "sandbox,reset"; + }; + + image { + pre-load { + sig { + algo-name = "sha256,rsa2048"; + padding-name = "pss"; + signature-size = <256>; + mandatory = "yes"; + + key-name = "dev"; + }; + }; + }; +}; diff --git a/test/py/tests/vboot/sandbox-u-boot-global.dts b/test/py/tests/vboot/sandbox-u-boot-global.dts new file mode 100644 index 0000000..1409f9e --- /dev/null +++ b/test/py/tests/vboot/sandbox-u-boot-global.dts @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + model = "Sandbox Verified Boot Test"; + compatible = "sandbox"; + + binman { + }; + + reset@0 { + compatible = "sandbox,reset"; + }; + + image { + pre-load { + sig { + algo-name = "sha256,rsa2048"; + signature-size = <256>; + mandatory = "yes"; + + key-name = "dev"; + }; + }; + }; +}; diff --git a/test/py/tests/vboot/sandbox-u-boot.dts b/test/py/tests/vboot/sandbox-u-boot.dts index 63f8f40..5809c62 100644 --- a/test/py/tests/vboot/sandbox-u-boot.dts +++ b/test/py/tests/vboot/sandbox-u-boot.dts @@ -4,6 +4,9 @@ model = "Sandbox Verified Boot Test"; compatible = "sandbox"; + binman { + }; + reset@0 { compatible = "sandbox,reset"; }; diff --git a/test/py/tests/vboot/simple-images.its b/test/py/tests/vboot/simple-images.its new file mode 100644 index 0000000..f627864 --- /dev/null +++ b/test/py/tests/vboot/simple-images.its @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + description = "Chrome OS kernel image with one or more FDT blobs"; + #address-cells = <1>; + + images { + kernel { + data = /incbin/("test-kernel.bin"); + type = "kernel_noload"; + arch = "sandbox"; + os = "linux"; + compression = "none"; + load = <0x4>; + entry = <0x8>; + kernel-version = <1>; + }; + fdt-1 { + description = "snow"; + data = /incbin/("sandbox-kernel.dtb"); + type = "flat_dt"; + arch = "sandbox"; + compression = "none"; + fdt-version = <1>; + }; + }; + configurations { + default = "conf-1"; + conf-1 { + kernel = "kernel"; + fdt = "fdt-1"; + }; + }; +}; diff --git a/test/py/tests/vboot_evil.py b/test/py/tests/vboot_evil.py index 9825c21..e2b0cd6 100644 --- a/test/py/tests/vboot_evil.py +++ b/test/py/tests/vboot_evil.py @@ -482,4 +482,5 @@ if __name__ == '__main__': print('valid attack names: [fakeroot, kernel@]') sys.exit(1) - add_evil_node(sys.argv[1:]) + in_fname, out_fname, kernel_fname, attack = sys.argv[1:] + add_evil_node(in_fname, out_fname, kernel_fname, attack) diff --git a/test/py/u_boot_console_base.py b/test/py/u_boot_console_base.py index 3938ec1..58ec859 100644 --- a/test/py/u_boot_console_base.py +++ b/test/py/u_boot_console_base.py @@ -115,6 +115,14 @@ class ConsoleBase(object): self.at_prompt = False self.at_prompt_logevt = None + def get_spawn(self): + # This is not called, ssubclass must define this. + # Return a value to avoid: + # u_boot_console_base.py:348:12: E1128: Assigning result of a function + # call, where the function returns None (assignment-from-none) + return u_boot_spawn.Spawn([]) + + def eval_bad_patterns(self): self.bad_patterns = [pat[PAT_RE] for pat in bad_pattern_defs \ if self.disable_check_count[pat[PAT_ID]] == 0] diff --git a/test/test-main.c b/test/test-main.c index 8fcb02e..ee38d1f 100644 --- a/test/test-main.c +++ b/test/test-main.c @@ -7,6 +7,7 @@ #include <common.h> #include <console.h> #include <dm.h> +#include <event.h> #include <dm/root.h> #include <dm/test.h> #include <dm/uclass-internal.h> @@ -218,6 +219,8 @@ static int dm_test_restore(struct device_node *of_root) */ static int test_pre_run(struct unit_test_state *uts, struct unit_test *test) { + ut_assertok(event_init()); + if (test->flags & UT_TESTF_DM) ut_assertok(dm_test_pre_run(uts)); @@ -260,6 +263,7 @@ static int test_post_run(struct unit_test_state *uts, struct unit_test *test) ut_unsilence_console(uts); if (test->flags & UT_TESTF_DM) ut_assertok(dm_test_post_run(uts)); + ut_assertok(event_uninit()); return 0; } diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 7716453..935839c 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -480,8 +480,8 @@ image-pos: for each entry. This makes it easy to find out exactly where the entry ended up in the image, regardless of parent sections, etc. -expand-size: - Expand the size of this entry to fit available space. This space is only +extend-size: + Extend the size of this entry to fit available space. This space is only limited by the size of the image/section and the position of the next entry. @@ -1375,18 +1375,20 @@ Some entry types deal with data obtained from others. For example, }; This shows mkimage being passed a file consisting of SPL and U-Boot proper. It -is create by calling `Entry.collect_contents_to_file()`. Note that in this case, -the data is passed to mkimage for processing but does not appear separately in -the image. It may not appear at all, depending on what mkimage does. The -contents of the `mkimage` entry are entirely dependent on the processing done -by the entry, with the provided subnodes (`u-boot-spl` and `u-boot`) simply -providing the input data for that processing. +is created by calling `Entry.collect_contents_to_file()`. Note that in this +case, the data is passed to mkimage for processing but does not appear +separately in the image. It may not appear at all, depending on what mkimage +does. The contents of the `mkimage` entry are entirely dependent on the +processing done by the entry, with the provided subnodes (`u-boot-spl` and +`u-boot`) simply providing the input data for that processing. Note that `Entry.collect_contents_to_file()` simply concatenates the data from the different entries together, with no control over alignment, etc. Another approach is to subclass `Entry_section` so that those features become available, such as `size` and `pad-byte`. Then the contents of the entry can be obtained by -calling `BuildSectionData()`. +calling `super().BuildSectionData()` in the entry's BuildSectionData() +implementation to get the input data, then write it to a file and process it +however is desired. There are other ways to obtain data also, depending on the situation. If the entry type is simply signing data which exists elsewhere in the image, then @@ -1396,6 +1398,7 @@ is used by `Entry_vblock`, for example:: u_boot: u-boot { }; + vblock { content = <&u_boot &dtb>; keyblock = "firmware.keyblock"; @@ -1440,9 +1443,11 @@ The `soc-fw` node is a `blob-ext` (i.e. it reads in a named binary file) whereas a known blob type. When adding new entry types you are encouraged to use subnodes to provide the -data for processing, unless the `content` approach is more suitable. Ad-hoc -properties and other methods of obtaining data are discouraged, since it adds to -confusion for users. +data for processing, unless the `content` approach is more suitable. Consider +whether the input entries are contained within (or consumed by) the entry, vs +just being 'referenced' by the entry. In the latter case, the `content` approach +makes more sense. Ad-hoc properties and other methods of obtaining data are +discouraged, since it adds to confusion for users. History / Credits ----------------- @@ -1495,7 +1500,8 @@ Some ideas: - Figure out how to make Fdt support changing the node order, so that Node.AddSubnode() can support adding a node before another, existing node. Perhaps it should completely regenerate the flat tree? - +- Put faked files into a separate subdir and remove them on start-up, to avoid + seeing them as 'real' files on a subsequent run -- Simon Glass <sjg@chromium.org> diff --git a/tools/binman/cmdline.py b/tools/binman/cmdline.py index 0626b85..1d1ca43 100644 --- a/tools/binman/cmdline.py +++ b/tools/binman/cmdline.py @@ -7,7 +7,7 @@ import argparse from argparse import ArgumentParser -import state +from binman import state def make_extract_parser(subparsers): """make_extract_parser: Make a subparser for the 'extract' command diff --git a/tools/binman/control.py b/tools/binman/control.py index a179f78..d4c8dc8 100644 --- a/tools/binman/control.py +++ b/tools/binman/control.py @@ -20,6 +20,10 @@ from binman import elf from patman import command from patman import tout +# These are imported if needed since they import libfdt +state = None +Image = None + # List of images we plan to create # Make this global so that it can be referenced from tests images = OrderedDict() @@ -41,6 +45,8 @@ def _ReadImageDesc(binman_node, use_expanded): Returns: OrderedDict of Image objects, each of which describes an image """ + # For Image() + # pylint: disable=E1102 images = OrderedDict() if 'multiple-images' in binman_node.props: for node in binman_node.subnodes: @@ -501,7 +507,7 @@ def PrepareImagesAndDtbs(dtb_fname, select_images, update_fdt, use_expanded): # entry offsets remain the same. for image in images.values(): image.CollectBintools() - image.ExpandEntries() + image.gen_entries() if update_fdt: image.AddMissingProperties(True) image.ProcessFdt(dtb) diff --git a/tools/binman/elf.py b/tools/binman/elf.py index 5e7d6ae..afa05e5 100644 --- a/tools/binman/elf.py +++ b/tools/binman/elf.py @@ -85,6 +85,57 @@ def GetSymbols(fname, patterns): # Sort dict by address return OrderedDict(sorted(syms.items(), key=lambda x: x[1].address)) +def _GetFileOffset(elf, addr): + """Get the file offset for an address + + Args: + elf (ELFFile): ELF file to check + addr (int): Address to search for + + Returns + int: Offset of that address in the ELF file, or None if not valid + """ + for seg in elf.iter_segments(): + seg_end = seg['p_vaddr'] + seg['p_filesz'] + if seg.header['p_type'] == 'PT_LOAD': + if addr >= seg['p_vaddr'] and addr < seg_end: + return addr - seg['p_vaddr'] + seg['p_offset'] + +def GetFileOffset(fname, addr): + """Get the file offset for an address + + Args: + fname (str): Filename of ELF file to check + addr (int): Address to search for + + Returns + int: Offset of that address in the ELF file, or None if not valid + """ + if not ELF_TOOLS: + raise ValueError("Python: No module named 'elftools'") + with open(fname, 'rb') as fd: + elf = ELFFile(fd) + return _GetFileOffset(elf, addr) + +def GetSymbolFromAddress(fname, addr): + """Get the symbol at a particular address + + Args: + fname (str): Filename of ELF file to check + addr (int): Address to search for + + Returns: + str: Symbol name, or None if no symbol at that address + """ + if not ELF_TOOLS: + raise ValueError("Python: No module named 'elftools'") + with open(fname, 'rb') as fd: + elf = ELFFile(fd) + syms = GetSymbols(fname, None) + for name, sym in syms.items(): + if sym.address == addr: + return name + def GetSymbolFileOffset(fname, patterns): """Get the symbols from an ELF file @@ -97,15 +148,8 @@ def GetSymbolFileOffset(fname, patterns): key: Name of symbol value: Hex value of symbol """ - def _GetFileOffset(elf, addr): - for seg in elf.iter_segments(): - seg_end = seg['p_vaddr'] + seg['p_filesz'] - if seg.header['p_type'] == 'PT_LOAD': - if addr >= seg['p_vaddr'] and addr < seg_end: - return addr - seg['p_vaddr'] + seg['p_offset'] - if not ELF_TOOLS: - raise ValueError('Python elftools package is not available') + raise ValueError("Python: No module named 'elftools'") syms = {} with open(fname, 'rb') as fd: @@ -371,7 +415,7 @@ def UpdateFile(infile, outfile, start_sym, end_sym, insert): tools.write_file(outfile, newdata) tout.info('Written to offset %#x' % syms[start_sym].offset) -def read_segments(data): +def read_loadable_segments(data): """Read segments from an ELF file Args: @@ -389,7 +433,7 @@ def read_segments(data): ValueError: elftools is not available """ if not ELF_TOOLS: - raise ValueError('Python elftools package is not available') + raise ValueError("Python: No module named 'elftools'") with io.BytesIO(data) as inf: try: elf = ELFFile(inf) diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py index a67915b..02bc108 100644 --- a/tools/binman/elf_test.py +++ b/tools/binman/elf_test.py @@ -116,7 +116,7 @@ class TestElf(unittest.TestCase): entry = FakeEntry(10) section = FakeSection() with self.assertRaises(ValueError) as e: - syms = elf.LookupAndWriteSymbols('missing-file', entry, section) + elf.LookupAndWriteSymbols('missing-file', entry, section) self.assertIn("Filename 'missing-file' not found in input path", str(e.exception)) @@ -126,7 +126,7 @@ class TestElf(unittest.TestCase): section = FakeSection() elf_fname = self.ElfTestFile('u_boot_binman_syms') with self.assertRaises(ValueError) as e: - syms = elf.LookupAndWriteSymbols(elf_fname, entry, section) + elf.LookupAndWriteSymbols(elf_fname, entry, section) self.assertIn('entry_path has offset 4 (size 8) but the contents size ' 'is a', str(e.exception)) @@ -139,8 +139,7 @@ class TestElf(unittest.TestCase): entry = FakeEntry(10) section = FakeSection() elf_fname = self.ElfTestFile('u_boot_binman_syms_bad') - self.assertEqual(elf.LookupAndWriteSymbols(elf_fname, entry, section), - None) + elf.LookupAndWriteSymbols(elf_fname, entry, section) def testBadSymbolSize(self): """Test that an attempt to use an 8-bit symbol are detected @@ -152,7 +151,7 @@ class TestElf(unittest.TestCase): section = FakeSection() elf_fname =self.ElfTestFile('u_boot_binman_syms_size') with self.assertRaises(ValueError) as e: - syms = elf.LookupAndWriteSymbols(elf_fname, entry, section) + elf.LookupAndWriteSymbols(elf_fname, entry, section) self.assertIn('has size 1: only 4 and 8 are supported', str(e.exception)) @@ -165,7 +164,7 @@ class TestElf(unittest.TestCase): entry = FakeEntry(24) section = FakeSection(sym_value=None) elf_fname = self.ElfTestFile('u_boot_binman_syms') - syms = elf.LookupAndWriteSymbols(elf_fname, entry, section) + elf.LookupAndWriteSymbols(elf_fname, entry, section) self.assertEqual(tools.get_bytes(255, 20) + tools.get_bytes(ord('a'), 4), entry.data) @@ -177,7 +176,7 @@ class TestElf(unittest.TestCase): section = FakeSection() elf_fname = self.ElfTestFile('u_boot_binman_syms') with test_util.capture_sys_output() as (stdout, stderr): - syms = elf.LookupAndWriteSymbols(elf_fname, entry, section) + elf.LookupAndWriteSymbols(elf_fname, entry, section) self.assertTrue(len(stdout.getvalue()) > 0) finally: tout.init(tout.WARNING) @@ -244,7 +243,7 @@ class TestElf(unittest.TestCase): fname = self.ElfTestFile('embed_data') with self.assertRaises(ValueError) as e: elf.GetSymbolFileOffset(fname, ['embed_start', 'embed_end']) - self.assertIn('Python elftools package is not available', + self.assertIn("Python: No module named 'elftools'", str(e.exception)) finally: elf.ELF_TOOLS = old_val @@ -258,33 +257,81 @@ class TestElf(unittest.TestCase): offset = elf.GetSymbolFileOffset(fname, ['missing_sym']) self.assertEqual({}, offset) - def test_read_segments(self): - """Test for read_segments()""" + def test_read_loadable_segments(self): + """Test for read_loadable_segments()""" if not elf.ELF_TOOLS: self.skipTest('Python elftools not available') fname = self.ElfTestFile('embed_data') - segments, entry = elf.read_segments(tools.read_file(fname)) + segments, entry = elf.read_loadable_segments(tools.read_file(fname)) def test_read_segments_fail(self): - """Test for read_segments() without elftools""" + """Test for read_loadable_segments() without elftools""" try: old_val = elf.ELF_TOOLS elf.ELF_TOOLS = False fname = self.ElfTestFile('embed_data') with self.assertRaises(ValueError) as e: - elf.read_segments(tools.read_file(fname)) - self.assertIn('Python elftools package is not available', + elf.read_loadable_segments(tools.read_file(fname)) + self.assertIn("Python: No module named 'elftools'", str(e.exception)) finally: elf.ELF_TOOLS = old_val def test_read_segments_bad_data(self): - """Test for read_segments() with an invalid ELF file""" + """Test for read_loadable_segments() with an invalid ELF file""" fname = self.ElfTestFile('embed_data') with self.assertRaises(ValueError) as e: - elf.read_segments(tools.get_bytes(100, 100)) + elf.read_loadable_segments(tools.get_bytes(100, 100)) self.assertIn('Magic number does not match', str(e.exception)) + def test_get_file_offset(self): + """Test GetFileOffset() gives the correct file offset for a symbol""" + fname = self.ElfTestFile('embed_data') + syms = elf.GetSymbols(fname, ['embed']) + addr = syms['embed'].address + offset = elf.GetFileOffset(fname, addr) + data = tools.read_file(fname) + + # Just use the first 4 bytes and assume it is little endian + embed_data = data[offset:offset + 4] + embed_value = struct.unpack('<I', embed_data)[0] + self.assertEqual(0x1234, embed_value) + + def test_get_file_offset_fail(self): + """Test calling GetFileOffset() without elftools""" + try: + old_val = elf.ELF_TOOLS + elf.ELF_TOOLS = False + fname = self.ElfTestFile('embed_data') + with self.assertRaises(ValueError) as e: + elf.GetFileOffset(fname, 0) + self.assertIn("Python: No module named 'elftools'", + str(e.exception)) + finally: + elf.ELF_TOOLS = old_val + + def test_get_symbol_from_address(self): + """Test GetSymbolFromAddress()""" + fname = self.ElfTestFile('elf_sections') + sym_name = 'calculate' + syms = elf.GetSymbols(fname, [sym_name]) + addr = syms[sym_name].address + sym = elf.GetSymbolFromAddress(fname, addr) + self.assertEqual(sym_name, sym) + + def test_get_symbol_from_address_fail(self): + """Test calling GetSymbolFromAddress() without elftools""" + try: + old_val = elf.ELF_TOOLS + elf.ELF_TOOLS = False + fname = self.ElfTestFile('embed_data') + with self.assertRaises(ValueError) as e: + elf.GetSymbolFromAddress(fname, 0x1000) + self.assertIn("Python: No module named 'elftools'", + str(e.exception)) + finally: + elf.ELF_TOOLS = old_val + if __name__ == '__main__': unittest.main() diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst index 484cde5..ae4305c 100644 --- a/tools/binman/entries.rst +++ b/tools/binman/entries.rst @@ -612,6 +612,9 @@ gen-fdt-nodes Generate FDT nodes as above. This is the default if there is no `fit,operation` property. +split-elf + Split an ELF file into a separate node for each segment. + Generating nodes from an FDT list (gen-fdt-nodes) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -655,6 +658,149 @@ for each of your two files. Note that if no devicetree files are provided (with '-a of-list' as above) then no nodes will be generated. +Generating nodes from an ELF file (split-elf) +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + +This uses the node as a template to generate multiple nodes. The following +special properties are available: + +split-elf + Split an ELF file into a separate node for each segment. This uses the + node as a template to generate multiple nodes. The following special + properties are available: + + fit,load + Generates a `load = <...>` property with the load address of the + segment + + fit,entry + Generates a `entry = <...>` property with the entry address of the + ELF. This is only produced for the first entry + + fit,data + Generates a `data = <...>` property with the contents of the segment + + fit,loadables + Generates a `loadable = <...>` property with a list of the generated + nodes (including all nodes if this operation is used multiple times) + + +Here is an example showing ATF, TEE and a device tree all combined:: + + fit { + description = "test-desc"; + #address-cells = <1>; + fit,fdt-list = "of-list"; + + images { + u-boot { + description = "U-Boot (64-bit)"; + type = "standalone"; + os = "U-Boot"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + u-boot-nodtb { + }; + }; + @fdt-SEQ { + description = "fdt-NAME.dtb"; + type = "flat_dt"; + compression = "none"; + }; + @atf-SEQ { + fit,operation = "split-elf"; + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + os = "arm-trusted-firmware"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + atf-bl31 { + }; + }; + + @tee-SEQ { + fit,operation = "split-elf"; + description = "TEE"; + type = "tee"; + arch = "arm64"; + os = "tee"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + tee-os { + }; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + @config-SEQ { + description = "conf-NAME.dtb"; + fdt = "fdt-SEQ"; + firmware = "u-boot"; + fit,loadables; + }; + }; + }; + +If ATF-BL31 is available, this generates a node for each segment in the +ELF file, for example:: + + images { + atf-1 { + data = <...contents of first segment...>; + data-offset = <0x00000000>; + entry = <0x00040000>; + load = <0x00040000>; + compression = "none"; + os = "arm-trusted-firmware"; + arch = "arm64"; + type = "firmware"; + description = "ARM Trusted Firmware"; + }; + atf-2 { + data = <...contents of second segment...>; + load = <0xff3b0000>; + compression = "none"; + os = "arm-trusted-firmware"; + arch = "arm64"; + type = "firmware"; + description = "ARM Trusted Firmware"; + }; + }; + +The same applies for OP-TEE if that is available. + +If each binary is not available, the relevant template node (@atf-SEQ or +@tee-SEQ) is removed from the output. + +This also generates a `config-xxx` node for each device tree in `of-list`. +Note that the U-Boot build system uses `-a of-list=$(CONFIG_OF_LIST)` +so you can use `CONFIG_OF_LIST` to define that list. In this example it is +set up for `firefly-rk3399` with a single device tree and the default set +with `-a default-dt=$(CONFIG_DEFAULT_DEVICE_TREE)`, so the resulting output +is:: + + configurations { + default = "config-1"; + config-1 { + loadables = "atf-1", "atf-2", "atf-3", "tee-1", "tee-2"; + description = "rk3399-firefly.dtb"; + fdt = "fdt-1"; + firmware = "u-boot"; + }; + }; + +U-Boot SPL can then load the firmware (U-Boot proper) and all the loadables +(ATF and TEE), then proceed with the boot. + Entry: fmap: An entry which contains an Fmap section @@ -1009,6 +1155,44 @@ placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. +Entry: pre-load: Pre load image header +-------------------------------------- + +Properties / Entry arguments: + - key-path: Path of the directory that store key (provided by the environment variable KEY_PATH) + - content: List of phandles to entries to sign + - algo-name: Hash and signature algo to use for the signature + - padding-name: Name of the padding (pkcs-1.5 or pss) + - key-name: Filename of the private key to sign + - header-size: Total size of the header + - version: Version of the header + +This entry creates a pre-load header that contains a global +image signature. + +For example, this creates an image with a pre-load header and a binary:: + + binman { + image2 { + filename = "sandbox.bin"; + + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + padding-name = "pss"; + key-name = "private.pem"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "sandbox.itb"; + }; + }; + }; + + + Entry: scp: System Control Processor (SCP) firmware blob -------------------------------------------------------- diff --git a/tools/binman/entry.py b/tools/binman/entry.py index bf68a85..18a7a35 100644 --- a/tools/binman/entry.py +++ b/tools/binman/entry.py @@ -19,6 +19,8 @@ from patman import tout modules = {} +# This is imported if needed +state = None # An argument which can be passed to entries on the command line, in lieu of # device-tree properties. @@ -104,7 +106,7 @@ class Entry(object): self.pad_after = 0 self.offset_unset = False self.image_pos = None - self.expand_size = False + self.extend_size = False self.compress = 'none' self.missing = False self.faked = False @@ -233,6 +235,8 @@ class Entry(object): """ if 'pos' in self._node.props: self.Raise("Please use 'offset' instead of 'pos'") + if 'expand-size' in self._node.props: + self.Raise("Please use 'extend-size' instead of 'expand-size'") self.offset = fdt_util.GetInt(self._node, 'offset') self.size = fdt_util.GetInt(self._node, 'size') self.orig_offset = fdt_util.GetInt(self._node, 'orig-offset') @@ -260,7 +264,7 @@ class Entry(object): self.align_size) self.align_end = fdt_util.GetInt(self._node, 'align-end') self.offset_unset = fdt_util.GetBool(self._node, 'offset-unset') - self.expand_size = fdt_util.GetBool(self._node, 'expand-size') + self.extend_size = fdt_util.GetBool(self._node, 'extend-size') self.missing_msg = fdt_util.GetString(self._node, 'missing-msg') # This is only supported by blobs and sections at present @@ -282,8 +286,8 @@ class Entry(object): """ return {} - def ExpandEntries(self): - """Expand out entries which produce other entries + def gen_entries(self): + """Allow entries to generate other entries Some entries generate subnodes automatically, from which sub-entries are then created. This method allows those to be added to the binman @@ -413,9 +417,13 @@ class Entry(object): self.SetContents(data) return size_ok - def ObtainContents(self): + def ObtainContents(self, skip_entry=None, fake_size=0): """Figure out the contents of an entry. + Args: + skip_entry (Entry): Entry to skip when obtaining section contents + fake_size (int): Size of fake file to create if needed + Returns: True if the contents were found, False if another call is needed after the other entries are processed. @@ -772,8 +780,8 @@ features to produce new behaviours. name = '%s.%s' % (node.name, name) return name - def ExpandToLimit(self, limit): - """Expand an entry so that it ends at the given offset limit""" + def extend_to_limit(self, limit): + """Extend an entry so that it ends at the given offset limit""" if self.offset + self.size < limit: self.size = limit - self.offset # Request the contents again, since changing the size requires that @@ -986,24 +994,28 @@ features to produce new behaviours. if self.missing: missing_list.append(self) - def check_fake_fname(self, fname): + def check_fake_fname(self, fname, size=0): """If the file is missing and the entry allows fake blobs, fake it Sets self.faked to True if faked Args: fname (str): Filename to check + size (int): Size of fake file to create Returns: - fname (str): Filename of faked file + tuple: + fname (str): Filename of faked file + bool: True if the blob was faked, False if not """ if self.allow_fake and not pathlib.Path(fname).is_file(): outfname = tools.get_output_filename(os.path.basename(fname)) with open(outfname, "wb") as out: - out.truncate(1024) + out.truncate(size) self.faked = True - return outfname - return fname + tout.info(f"Entry '{self._node.path}': Faked file '{outfname}'") + return outfname, True + return fname, False def CheckFakedBlobs(self, faked_blobs_list): """Check if any entries in this section have faked external blobs @@ -1097,11 +1109,11 @@ features to produce new behaviours. """ pass - def AddBintools(self, tools): + def AddBintools(self, btools): """Add the bintools used by this entry type Args: - tools (dict of Bintool): + btools (dict of Bintool): """ pass @@ -1124,28 +1136,29 @@ features to produce new behaviours. """ self.update_hash = update_hash - def collect_contents_to_file(self, entries, prefix): + def collect_contents_to_file(self, entries, prefix, fake_size=0): """Put the contents of a list of entries into a file Args: entries (list of Entry): Entries to collect prefix (str): Filename prefix of file to write to + fake_size (int): Size of fake file to create if needed If any entry does not have contents yet, this function returns False for the data. Returns: Tuple: - bytes: Concatenated data from all the entries (or False) - str: Filename of file written (or False if no data) - str: Unique portion of filename (or False if no data) + bytes: Concatenated data from all the entries (or None) + str: Filename of file written (or None if no data) + str: Unique portion of filename (or None if no data) """ data = b'' for entry in entries: # First get the input data and put it in a file. If not available, # try later. - if not entry.ObtainContents(): - return False, False, False + if not entry.ObtainContents(fake_size=fake_size): + return None, None, None data += entry.GetData() uniq = self.GetUniqueName() fname = tools.get_output_filename(f'{prefix}.{uniq}') diff --git a/tools/binman/entry_test.py b/tools/binman/entry_test.py index 7ed9b26..1d60076 100644 --- a/tools/binman/entry_test.py +++ b/tools/binman/entry_test.py @@ -5,6 +5,7 @@ # Test for the Entry class import collections +import importlib import os import sys import unittest @@ -32,11 +33,7 @@ class TestEntry(unittest.TestCase): def _ReloadEntry(self): global entry if entry: - if sys.version_info[0] >= 3: - import importlib - importlib.reload(entry) - else: - reload(entry) + importlib.reload(entry) else: from binman import entry diff --git a/tools/binman/etype/_testing.py b/tools/binman/etype/_testing.py index 0800c25..5089de3 100644 --- a/tools/binman/etype/_testing.py +++ b/tools/binman/etype/_testing.py @@ -82,7 +82,7 @@ class Entry__testing(Entry): self.return_contents = True self.contents = b'aa' - def ObtainContents(self): + def ObtainContents(self, fake_size=0): if self.return_unknown_contents or not self.return_contents: return False if self.return_contents_later: diff --git a/tools/binman/etype/blob.py b/tools/binman/etype/blob.py index 25ec5d2..ceaefb0 100644 --- a/tools/binman/etype/blob.py +++ b/tools/binman/etype/blob.py @@ -35,16 +35,18 @@ class Entry_blob(Entry): super().__init__(section, etype, node) self._filename = fdt_util.GetString(self._node, 'filename', self.etype) - def ObtainContents(self): + def ObtainContents(self, fake_size=0): self._filename = self.GetDefaultFilename() self._pathname = tools.get_input_filename(self._filename, self.external and self.section.GetAllowMissing()) # Allow the file to be missing if not self._pathname: - self._pathname = self.check_fake_fname(self._filename) - self.SetContents(b'') + self._pathname, faked = self.check_fake_fname(self._filename, + fake_size) self.missing = True - return True + if not faked: + self.SetContents(b'') + return True self.ReadBlobContents() return True diff --git a/tools/binman/etype/blob_dtb.py b/tools/binman/etype/blob_dtb.py index 3ce7511..4159e30 100644 --- a/tools/binman/etype/blob_dtb.py +++ b/tools/binman/etype/blob_dtb.py @@ -8,6 +8,9 @@ from binman.entry import Entry from binman.etype.blob import Entry_blob +# This is imported if needed +state = None + class Entry_blob_dtb(Entry_blob): """A blob that holds a device tree diff --git a/tools/binman/etype/blob_ext_list.py b/tools/binman/etype/blob_ext_list.py index 76ad32a..f00202e 100644 --- a/tools/binman/etype/blob_ext_list.py +++ b/tools/binman/etype/blob_ext_list.py @@ -37,7 +37,7 @@ class Entry_blob_ext_list(Entry_blob): missing = False pathnames = [] for fname in self._filenames: - fname = self.check_fake_fname(fname) + fname, _ = self.check_fake_fname(fname) pathname = tools.get_input_filename( fname, self.external and self.section.GetAllowMissing()) # Allow the file to be missing diff --git a/tools/binman/etype/blob_phase.py b/tools/binman/etype/blob_phase.py index ed25e46..b937158 100644 --- a/tools/binman/etype/blob_phase.py +++ b/tools/binman/etype/blob_phase.py @@ -7,6 +7,9 @@ from binman.etype.section import Entry_section +# This is imported if needed +state = None + class Entry_blob_phase(Entry_section): """Section that holds a phase binary @@ -39,7 +42,7 @@ class Entry_blob_phase(Entry_section): self.dtb_file = dtb_file self.bss_pad = bss_pad - def ExpandEntries(self): + def gen_entries(self): """Create the subnodes""" names = [self.root_fname + '-nodtb', self.root_fname + '-dtb'] if self.bss_pad: diff --git a/tools/binman/etype/cbfs.py b/tools/binman/etype/cbfs.py index cc1fbdf..4a1837f 100644 --- a/tools/binman/etype/cbfs.py +++ b/tools/binman/etype/cbfs.py @@ -12,6 +12,9 @@ from binman.cbfs_util import CbfsWriter from binman.entry import Entry from dtoc import fdt_util +# This is imported if needed +state = None + class Entry_cbfs(Entry): """Coreboot Filesystem (CBFS) diff --git a/tools/binman/etype/fdtmap.py b/tools/binman/etype/fdtmap.py index 76e8dbe..33c9d03 100644 --- a/tools/binman/etype/fdtmap.py +++ b/tools/binman/etype/fdtmap.py @@ -15,6 +15,11 @@ from patman import tout FDTMAP_MAGIC = b'_FDTMAP_' FDTMAP_HDR_LEN = 16 +# These is imported if needed +Fdt = None +libfdt = None +state = None + def LocateFdtmap(data): """Search an image for an fdt map diff --git a/tools/binman/etype/files.py b/tools/binman/etype/files.py index 0650a69..2081bc7 100644 --- a/tools/binman/etype/files.py +++ b/tools/binman/etype/files.py @@ -13,6 +13,8 @@ from binman.etype.section import Entry_section from dtoc import fdt_util from patman import tools +# This is imported if needed +state = None class Entry_files(Entry_section): """A set of files arranged in a section @@ -46,7 +48,7 @@ class Entry_files(Entry_section): self._require_matches = fdt_util.GetBool(self._node, 'require-matches') - def ExpandEntries(self): + def gen_entries(self): files = tools.get_input_filename_glob(self._pattern) if self._require_matches and not files: self.Raise("Pattern '%s' matched no files" % self._pattern) diff --git a/tools/binman/etype/fit.py b/tools/binman/etype/fit.py index 2d4c5f6..e040771 100644 --- a/tools/binman/etype/fit.py +++ b/tools/binman/etype/fit.py @@ -2,22 +2,23 @@ # Copyright (c) 2016 Google, Inc # Written by Simon Glass <sjg@chromium.org> # -# Entry-type module for producing a FIT -# -from collections import defaultdict, OrderedDict +"""Entry-type module for producing a FIT""" + import libfdt from binman.entry import Entry, EntryArg from binman.etype.section import Entry_section +from binman import elf from dtoc import fdt_util from dtoc.fdt import Fdt from patman import tools # Supported operations, with the fit,operation property -OP_GEN_FDT_NODES = range(1) +OP_GEN_FDT_NODES, OP_SPLIT_ELF = range(2) OPERATIONS = { 'gen-fdt-nodes': OP_GEN_FDT_NODES, + 'split-elf': OP_SPLIT_ELF, } class Entry_fit(Entry_section): @@ -113,6 +114,9 @@ class Entry_fit(Entry_section): Generate FDT nodes as above. This is the default if there is no `fit,operation` property. + split-elf + Split an ELF file into a separate node for each segment. + Generating nodes from an FDT list (gen-fdt-nodes) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ @@ -155,6 +159,149 @@ class Entry_fit(Entry_section): Note that if no devicetree files are provided (with '-a of-list' as above) then no nodes will be generated. + + Generating nodes from an ELF file (split-elf) + ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + + This uses the node as a template to generate multiple nodes. The following + special properties are available: + + split-elf + Split an ELF file into a separate node for each segment. This uses the + node as a template to generate multiple nodes. The following special + properties are available: + + fit,load + Generates a `load = <...>` property with the load address of the + segment + + fit,entry + Generates a `entry = <...>` property with the entry address of the + ELF. This is only produced for the first entry + + fit,data + Generates a `data = <...>` property with the contents of the segment + + fit,loadables + Generates a `loadable = <...>` property with a list of the generated + nodes (including all nodes if this operation is used multiple times) + + + Here is an example showing ATF, TEE and a device tree all combined:: + + fit { + description = "test-desc"; + #address-cells = <1>; + fit,fdt-list = "of-list"; + + images { + u-boot { + description = "U-Boot (64-bit)"; + type = "standalone"; + os = "U-Boot"; + arch = "arm64"; + compression = "none"; + load = <CONFIG_SYS_TEXT_BASE>; + u-boot-nodtb { + }; + }; + @fdt-SEQ { + description = "fdt-NAME.dtb"; + type = "flat_dt"; + compression = "none"; + }; + @atf-SEQ { + fit,operation = "split-elf"; + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + os = "arm-trusted-firmware"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + atf-bl31 { + }; + }; + + @tee-SEQ { + fit,operation = "split-elf"; + description = "TEE"; + type = "tee"; + arch = "arm64"; + os = "tee"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + tee-os { + }; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + @config-SEQ { + description = "conf-NAME.dtb"; + fdt = "fdt-SEQ"; + firmware = "u-boot"; + fit,loadables; + }; + }; + }; + + If ATF-BL31 is available, this generates a node for each segment in the + ELF file, for example:: + + images { + atf-1 { + data = <...contents of first segment...>; + data-offset = <0x00000000>; + entry = <0x00040000>; + load = <0x00040000>; + compression = "none"; + os = "arm-trusted-firmware"; + arch = "arm64"; + type = "firmware"; + description = "ARM Trusted Firmware"; + }; + atf-2 { + data = <...contents of second segment...>; + load = <0xff3b0000>; + compression = "none"; + os = "arm-trusted-firmware"; + arch = "arm64"; + type = "firmware"; + description = "ARM Trusted Firmware"; + }; + }; + + The same applies for OP-TEE if that is available. + + If each binary is not available, the relevant template node (@atf-SEQ or + @tee-SEQ) is removed from the output. + + This also generates a `config-xxx` node for each device tree in `of-list`. + Note that the U-Boot build system uses `-a of-list=$(CONFIG_OF_LIST)` + so you can use `CONFIG_OF_LIST` to define that list. In this example it is + set up for `firefly-rk3399` with a single device tree and the default set + with `-a default-dt=$(CONFIG_DEFAULT_DEVICE_TREE)`, so the resulting output + is:: + + configurations { + default = "config-1"; + config-1 { + loadables = "atf-1", "atf-2", "atf-3", "tee-1", "tee-2"; + description = "rk3399-firefly.dtb"; + fdt = "fdt-1"; + firmware = "u-boot"; + }; + }; + + U-Boot SPL can then load the firmware (U-Boot proper) and all the loadables + (ATF and TEE), then proceed with the boot. """ def __init__(self, section, etype, node): """ @@ -164,16 +311,25 @@ class Entry_fit(Entry_section): key: relative path to entry Node (from the base of the FIT) value: Entry_section object comprising the contents of this node + _priv_entries: Internal copy of _entries which includes 'generator' + entries which are used to create the FIT, but should not be + processed as real entries. This is set up once we have the + entries + _loadables: List of generated split-elf nodes, each a node name """ super().__init__(section, etype, node) self._fit = None self._fit_props = {} + self._fdts = None + self.mkimage = None + self._priv_entries = {} + self._loadables = [] + def ReadNode(self): + super().ReadNode() for pname, prop in self._node.props.items(): if pname.startswith('fit,'): self._fit_props[pname] = prop - - self._fdts = None self._fit_list_prop = self._fit_props.get('fit,fdt-list') if self._fit_list_prop: fdts, = self.GetEntryArgsOrProps( @@ -182,17 +338,12 @@ class Entry_fit(Entry_section): self._fdts = fdts.split() self._fit_default_dt = self.GetEntryArgsOrProps([EntryArg('default-dt', str)])[0] - self.mkimage = None - - def ReadNode(self): - self.ReadEntries() - super().ReadNode() - def _get_operation(self, subnode): + def _get_operation(self, base_node, node): """Get the operation referenced by a subnode Args: - subnode (Node): Subnode (of the FIT) to check + node (Node): Subnode (of the FIT) to check Returns: int: Operation to perform @@ -200,15 +351,107 @@ class Entry_fit(Entry_section): Raises: ValueError: Invalid operation name """ - oper_name = subnode.props.get('fit,operation') + oper_name = node.props.get('fit,operation') if not oper_name: return OP_GEN_FDT_NODES oper = OPERATIONS.get(oper_name.value) - if not oper: - self.Raise(f"Unknown operation '{oper_name.value}'") + if oper is None: + self._raise_subnode(node, f"Unknown operation '{oper_name.value}'") return oper def ReadEntries(self): + def _add_entries(base_node, depth, node): + """Add entries for any nodes that need them + + Args: + base_node: Base Node of the FIT (with 'description' property) + depth: Current node depth (0 is the base 'fit' node) + node: Current node to process + + Here we only need to provide binman entries which are used to define + the 'data' for each image. We create an entry_Section for each. + """ + rel_path = node.path[len(base_node.path):] + in_images = rel_path.startswith('/images') + has_images = depth == 2 and in_images + if has_images: + # This node is a FIT subimage node (e.g. "/images/kernel") + # containing content nodes. We collect the subimage nodes and + # section entries for them here to merge the content subnodes + # together and put the merged contents in the subimage node's + # 'data' property later. + entry = Entry.Create(self.section, node, etype='section') + entry.ReadNode() + # The hash subnodes here are for mkimage, not binman. + entry.SetUpdateHash(False) + self._entries[rel_path] = entry + + for subnode in node.subnodes: + _add_entries(base_node, depth + 1, subnode) + + _add_entries(self._node, 0, self._node) + + # Keep a copy of all entries, including generator entries, since these + # removed from self._entries later. + self._priv_entries = dict(self._entries) + + def BuildSectionData(self, required): + """Build FIT entry contents + + This adds the 'data' properties to the input ITB (Image-tree Binary) + then runs mkimage to process it. + + Args: + required (bool): True if the data must be present, False if it is OK + to return None + + Returns: + bytes: Contents of the section + """ + data = self._build_input() + uniq = self.GetUniqueName() + input_fname = tools.get_output_filename(f'{uniq}.itb') + output_fname = tools.get_output_filename(f'{uniq}.fit') + tools.write_file(input_fname, data) + tools.write_file(output_fname, data) + + args = {} + ext_offset = self._fit_props.get('fit,external-offset') + if ext_offset is not None: + args = { + 'external': True, + 'pad': fdt_util.fdt32_to_cpu(ext_offset.value) + } + if self.mkimage.run(reset_timestamp=True, output_fname=output_fname, + **args) is None: + # Bintool is missing; just use empty data as the output + self.record_missing_bintool(self.mkimage) + return tools.get_bytes(0, 1024) + + return tools.read_file(output_fname) + + def _raise_subnode(self, node, msg): + """Raise an error with a paticular FIT subnode + + Args: + node (Node): FIT subnode containing the error + msg (str): Message to report + + Raises: + ValueError, as requested + """ + rel_path = node.path[len(self._node.path) + 1:] + self.Raise(f"subnode '{rel_path}': {msg}") + + def _build_input(self): + """Finish the FIT by adding the 'data' properties to it + + Arguments: + fdt: FIT to update + + Returns: + bytes: New fdt contents + """ def _process_prop(pname, prop): """Process special properties @@ -229,16 +472,22 @@ class Entry_fit(Entry_section): if not self._fit_default_dt: self.Raise("Generated 'default' node requires default-dt entry argument") if self._fit_default_dt not in self._fdts: - self.Raise("default-dt entry argument '%s' not found in fdt list: %s" % - (self._fit_default_dt, - ', '.join(self._fdts))) + self.Raise( + f"default-dt entry argument '{self._fit_default_dt}' " + f"not found in fdt list: {', '.join(self._fdts)}") seq = self._fdts.index(self._fit_default_dt) val = val[1:].replace('DEFAULT-SEQ', str(seq + 1)) fsw.property_string(pname, val) return + elif pname.startswith('fit,'): + # Ignore these, which are commands for binman to process + return + elif pname in ['offset', 'size', 'image-pos']: + # Don't add binman's calculated properties + return fsw.property(pname, prop.bytes) - def _scan_gen_fdt_nodes(subnode, depth, in_images): + def _gen_fdt_nodes(base_node, node, depth, in_images): """Generate FDT nodes This creates one node for each member of self._fdts using the @@ -248,7 +497,7 @@ class Entry_fit(Entry_section): first. Args: - subnode (None): Generator node to process + node (None): Generator node to process depth: Current node depth (0 is the base 'fit' node) in_images: True if this is inside the 'images' node, so that 'data' properties should be generated @@ -256,28 +505,77 @@ class Entry_fit(Entry_section): if self._fdts: # Generate nodes for each FDT for seq, fdt_fname in enumerate(self._fdts): - node_name = subnode.name[1:].replace('SEQ', str(seq + 1)) + node_name = node.name[1:].replace('SEQ', str(seq + 1)) fname = tools.get_input_filename(fdt_fname + '.dtb') with fsw.add_node(node_name): - for pname, prop in subnode.props.items(): - val = prop.bytes.replace( - b'NAME', tools.to_bytes(fdt_fname)) - val = val.replace( - b'SEQ', tools.to_bytes(str(seq + 1))) - fsw.property(pname, val) + for pname, prop in node.props.items(): + if pname == 'fit,loadables': + val = '\0'.join(self._loadables) + '\0' + fsw.property('loadables', val.encode('utf-8')) + elif pname == 'fit,operation': + pass + elif pname.startswith('fit,'): + self._raise_subnode( + node, f"Unknown directive '{pname}'") + else: + val = prop.bytes.replace( + b'NAME', tools.to_bytes(fdt_fname)) + val = val.replace( + b'SEQ', tools.to_bytes(str(seq + 1))) + fsw.property(pname, val) # Add data for 'images' nodes (but not 'config') if depth == 1 and in_images: fsw.property('data', tools.read_file(fname)) + + for subnode in node.subnodes: + with fsw.add_node(subnode.name): + _add_node(node, depth + 1, subnode) else: if self._fdts is None: if self._fit_list_prop: - self.Raise("Generator node requires '%s' entry argument" % - self._fit_list_prop.value) + self.Raise('Generator node requires ' + f"'{self._fit_list_prop.value}' entry argument") else: self.Raise("Generator node requires 'fit,fdt-list' property") - def _scan_node(subnode, depth, in_images): + def _gen_split_elf(base_node, node, elf_data, missing): + """Add nodes for the ELF file, one per group of contiguous segments + + Args: + base_node (Node): Template node from the binman definition + node (Node): Node to replace (in the FIT being built) + data (bytes): ELF-format data to process (may be empty) + missing (bool): True if any of the data is missing + + """ + # If any pieces are missing, skip this. The missing entries will + # show an error + if not missing: + try: + segments, entry = elf.read_loadable_segments(elf_data) + except ValueError as exc: + self._raise_subnode(node, + f'Failed to read ELF file: {str(exc)}') + for (seq, start, data) in segments: + node_name = node.name[1:].replace('SEQ', str(seq + 1)) + with fsw.add_node(node_name): + loadables.append(node_name) + for pname, prop in node.props.items(): + if not pname.startswith('fit,'): + fsw.property(pname, prop.bytes) + elif pname == 'fit,load': + fsw.property_u32('load', start) + elif pname == 'fit,entry': + if seq == 0: + fsw.property_u32('entry', entry) + elif pname == 'fit,data': + fsw.property('data', bytes(data)) + elif pname != 'fit,operation': + self._raise_subnode( + node, f"Unknown directive '{pname}'") + + def _gen_node(base_node, node, depth, in_images, entry): """Generate nodes from a template This creates one node for each member of self._fdts using the @@ -287,124 +585,93 @@ class Entry_fit(Entry_section): first. Args: - subnode (None): Generator node to process - depth: Current node depth (0 is the base 'fit' node) - in_images: True if this is inside the 'images' node, so that - 'data' properties should be generated + base_node (Node): Base Node of the FIT (with 'description' + property) + node (Node): Generator node to process + depth (int): Current node depth (0 is the base 'fit' node) + in_images (bool): True if this is inside the 'images' node, so + that 'data' properties should be generated """ - oper = self._get_operation(subnode) + oper = self._get_operation(base_node, node) if oper == OP_GEN_FDT_NODES: - _scan_gen_fdt_nodes(subnode, depth, in_images) - - def _AddNode(base_node, depth, node): - """Add a node to the FIT + _gen_fdt_nodes(base_node, node, depth, in_images) + elif oper == OP_SPLIT_ELF: + # Entry_section.ObtainContents() either returns True or + # raises an exception. + data = None + missing_list = [] + entry.ObtainContents() + entry.Pack(0) + data = entry.GetData() + entry.CheckMissing(missing_list) + + _gen_split_elf(base_node, node, data, bool(missing_list)) + + def _add_node(base_node, depth, node): + """Add nodes to the output FIT Args: - base_node: Base Node of the FIT (with 'description' property) - depth: Current node depth (0 is the base 'fit' node) - node: Current node to process + base_node (Node): Base Node of the FIT (with 'description' + property) + depth (int): Current node depth (0 is the base 'fit' node) + node (Node): Current node to process There are two cases to deal with: - hash and signature nodes which become part of the FIT - binman entries which are used to define the 'data' for each - image + image, so don't appear in the FIT """ + # Copy over all the relevant properties for pname, prop in node.props.items(): - if not pname.startswith('fit,'): - _process_prop(pname, prop) + _process_prop(pname, prop) rel_path = node.path[len(base_node.path):] in_images = rel_path.startswith('/images') + has_images = depth == 2 and in_images if has_images: - # This node is a FIT subimage node (e.g. "/images/kernel") - # containing content nodes. We collect the subimage nodes and - # section entries for them here to merge the content subnodes - # together and put the merged contents in the subimage node's - # 'data' property later. - entry = Entry.Create(self.section, node, etype='section') - entry.ReadNode() - # The hash subnodes here are for mkimage, not binman. - entry.SetUpdateHash(False) - self._entries[rel_path] = entry + entry = self._priv_entries[rel_path] + data = entry.GetData() + fsw.property('data', bytes(data)) for subnode in node.subnodes: + subnode_path = f'{rel_path}/{subnode.name}' if has_images and not (subnode.name.startswith('hash') or subnode.name.startswith('signature')): # This subnode is a content node not meant to appear in # the FIT (e.g. "/images/kernel/u-boot"), so don't call - # fsw.add_node() or _AddNode() for it. + # fsw.add_node() or _add_node() for it. pass elif self.GetImage().generate and subnode.name.startswith('@'): - _scan_node(subnode, depth, in_images) + entry = self._priv_entries.get(subnode_path) + _gen_node(base_node, subnode, depth, in_images, entry) + # This is a generator (template) entry, so remove it from + # the list of entries used by PackEntries(), etc. Otherwise + # it will appear in the binman output + to_remove.append(subnode_path) else: with fsw.add_node(subnode.name): - _AddNode(base_node, depth + 1, subnode) + _add_node(base_node, depth + 1, subnode) # Build a new tree with all nodes and properties starting from the # entry node fsw = libfdt.FdtSw() fsw.finish_reservemap() + to_remove = [] + loadables = [] with fsw.add_node(''): - _AddNode(self._node, 0, self._node) + _add_node(self._node, 0, self._node) + self._loadables = loadables fdt = fsw.as_fdt() + # Remove generator entries from the main list + for path in to_remove: + if path in self._entries: + del self._entries[path] + # Pack this new FDT and scan it so we can add the data later fdt.pack() - self._fdt = Fdt.FromData(fdt.as_bytearray()) - self._fdt.Scan() - - def BuildSectionData(self, required): - """Build FIT entry contents - - This adds the 'data' properties to the input ITB (Image-tree Binary) - then runs mkimage to process it. - - Args: - required: True if the data must be present, False if it is OK to - return None - - Returns: - Contents of the section (bytes) - """ - data = self._BuildInput(self._fdt) - uniq = self.GetUniqueName() - input_fname = tools.get_output_filename('%s.itb' % uniq) - output_fname = tools.get_output_filename('%s.fit' % uniq) - tools.write_file(input_fname, data) - tools.write_file(output_fname, data) - - args = {} - ext_offset = self._fit_props.get('fit,external-offset') - if ext_offset is not None: - args = { - 'external': True, - 'pad': fdt_util.fdt32_to_cpu(ext_offset.value) - } - if self.mkimage.run(reset_timestamp=True, output_fname=output_fname, - **args) is None: - # Bintool is missing; just use empty data as the output - self.record_missing_bintool(self.mkimage) - return tools.get_bytes(0, 1024) - - return tools.read_file(output_fname) - - def _BuildInput(self, fdt): - """Finish the FIT by adding the 'data' properties to it - - Arguments: - fdt: FIT to update - - Returns: - New fdt contents (bytes) - """ - for path, section in self._entries.items(): - node = fdt.GetNode(path) - data = section.GetData() - node.AddData('data', data) - - fdt.Sync(auto_resize=True) - data = fdt.GetContents() + data = fdt.as_bytearray() return data def SetImagePos(self, image_pos): @@ -414,7 +681,7 @@ class Entry_fit(Entry_section): according to where they ended up in the packed FIT file. Args: - image_pos: Position of this entry in the image + image_pos (int): Position of this entry in the image """ super().SetImagePos(image_pos) @@ -453,11 +720,18 @@ class Entry_fit(Entry_section): # This should never happen else: # pragma: no cover - self.Raise("%s: missing data properties" % (path)) + self.Raise(f'{path}: missing data properties') section.SetOffsetSize(offset, size) section.SetImagePos(self.image_pos) - def AddBintools(self, tools): - super().AddBintools(tools) - self.mkimage = self.AddBintool(tools, 'mkimage') + def AddBintools(self, btools): + super().AddBintools(btools) + self.mkimage = self.AddBintool(btools, 'mkimage') + + def CheckMissing(self, missing_list): + # We must use our private entry list for this since generator notes + # which are removed from self._entries will otherwise not show up as + # missing + for entry in self._priv_entries.values(): + entry.CheckMissing(missing_list) diff --git a/tools/binman/etype/gbb.py b/tools/binman/etype/gbb.py index e32fae2..7394e4e 100644 --- a/tools/binman/etype/gbb.py +++ b/tools/binman/etype/gbb.py @@ -99,5 +99,5 @@ class Entry_gbb(Entry): return True - def AddBintools(self, tools): - self.futility = self.AddBintool(tools, 'futility') + def AddBintools(self, btools): + self.futility = self.AddBintool(btools, 'futility') diff --git a/tools/binman/etype/intel_ifwi.py b/tools/binman/etype/intel_ifwi.py index 46bdf11..4fa7d63 100644 --- a/tools/binman/etype/intel_ifwi.py +++ b/tools/binman/etype/intel_ifwi.py @@ -143,5 +143,5 @@ class Entry_intel_ifwi(Entry_blob_ext): for entry in self._ifwi_entries.values(): entry.WriteSymbols(self) - def AddBintools(self, tools): - self.ifwitool = self.AddBintool(tools, 'ifwitool') + def AddBintools(self, btools): + self.ifwitool = self.AddBintool(btools, 'ifwitool') diff --git a/tools/binman/etype/mkimage.py b/tools/binman/etype/mkimage.py index 8e74ebb..5f6def2 100644 --- a/tools/binman/etype/mkimage.py +++ b/tools/binman/etype/mkimage.py @@ -51,9 +51,10 @@ class Entry_mkimage(Entry): self.ReadEntries() def ObtainContents(self): + # Use a non-zero size for any fake files to keep mkimage happy data, input_fname, uniq = self.collect_contents_to_file( - self._mkimage_entries.values(), 'mkimage') - if data is False: + self._mkimage_entries.values(), 'mkimage', 1024) + if data is None: return False output_fname = tools.get_output_filename('mkimage-out.%s' % uniq) if self.mkimage.run_cmd('-d', input_fname, *self._args, @@ -73,6 +74,16 @@ class Entry_mkimage(Entry): entry.ReadNode() self._mkimage_entries[entry.name] = entry + def SetAllowMissing(self, allow_missing): + """Set whether a section allows missing external blobs + + Args: + allow_missing: True if allowed, False if not allowed + """ + self.allow_missing = allow_missing + for entry in self._mkimage_entries.values(): + entry.SetAllowMissing(allow_missing) + def SetAllowFakeBlob(self, allow_fake): """Set whether the sub nodes allows to create a fake blob @@ -93,5 +104,5 @@ class Entry_mkimage(Entry): for entry in self._mkimage_entries.values(): entry.CheckFakedBlobs(faked_blobs_list) - def AddBintools(self, tools): - self.mkimage = self.AddBintool(tools, 'mkimage') + def AddBintools(self, btools): + self.mkimage = self.AddBintool(btools, 'mkimage') diff --git a/tools/binman/etype/pre_load.py b/tools/binman/etype/pre_load.py new file mode 100644 index 0000000..245ee75 --- /dev/null +++ b/tools/binman/etype/pre_load.py @@ -0,0 +1,162 @@ +# SPDX-License-Identifier: GPL-2.0+ +# Copyright (c) 2022 Softathome +# Written by Philippe Reynes <philippe.reynes@softathome.com> +# +# Entry-type for the global header +# + +import os +import struct +from dtoc import fdt_util +from patman import tools + +from binman.entry import Entry +from binman.etype.collection import Entry_collection +from binman.entry import EntryArg + +from Cryptodome.Hash import SHA256, SHA384, SHA512 +from Cryptodome.PublicKey import RSA +from Cryptodome.Signature import pkcs1_15 +from Cryptodome.Signature import pss + +PRE_LOAD_MAGIC = b'UBSH' + +RSAS = { + 'rsa1024': 1024 / 8, + 'rsa2048': 2048 / 8, + 'rsa4096': 4096 / 8 +} + +SHAS = { + 'sha256': SHA256, + 'sha384': SHA384, + 'sha512': SHA512 +} + +class Entry_pre_load(Entry_collection): + """Pre load image header + + Properties / Entry arguments: + - pre-load-key-path: Path of the directory that store key (provided by the environment variable PRE_LOAD_KEY_PATH) + - content: List of phandles to entries to sign + - algo-name: Hash and signature algo to use for the signature + - padding-name: Name of the padding (pkcs-1.5 or pss) + - key-name: Filename of the private key to sign + - header-size: Total size of the header + - version: Version of the header + + This entry creates a pre-load header that contains a global + image signature. + + For example, this creates an image with a pre-load header and a binary:: + + binman { + image2 { + filename = "sandbox.bin"; + + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + padding-name = "pss"; + key-name = "private.pem"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "sandbox.itb"; + }; + }; + }; + """ + + def __init__(self, section, etype, node): + super().__init__(section, etype, node) + self.algo_name = fdt_util.GetString(self._node, 'algo-name') + self.padding_name = fdt_util.GetString(self._node, 'padding-name') + self.key_name = fdt_util.GetString(self._node, 'key-name') + self.header_size = fdt_util.GetInt(self._node, 'header-size') + self.version = fdt_util.GetInt(self._node, 'version') + + def ReadNode(self): + super().ReadNode() + self.key_path, = self.GetEntryArgsOrProps([EntryArg('pre-load-key-path', str)]) + if self.key_path is None: + self.key_path = '' + + def _CreateHeader(self): + """Create a pre load header""" + hash_name, sign_name = self.algo_name.split(',') + padding_name = self.padding_name + key_name = os.path.join(self.key_path, self.key_name) + + # Check hash and signature name/type + if hash_name not in SHAS: + self.Raise(hash_name + " is not supported") + if sign_name not in RSAS: + self.Raise(sign_name + " is not supported") + + # Read the key + with open(key_name, 'rb') as pem: + key = RSA.import_key(pem.read()) + + # Check if the key has the expected size + if key.size_in_bytes() != RSAS[sign_name]: + self.Raise("The key " + self.key_name + " don't have the expected size") + + # Compute the hash + hash_image = SHAS[hash_name].new() + hash_image.update(self.image) + + # Compute the signature + if padding_name is None: + padding_name = "pkcs-1.5" + if padding_name == "pss": + salt_len = key.size_in_bytes() - hash_image.digest_size - 2 + padding = pss + padding_args = {'salt_bytes': salt_len} + elif padding_name == "pkcs-1.5": + padding = pkcs1_15 + padding_args = {} + else: + self.Raise(padding_name + " is not supported") + + sig = padding.new(key, **padding_args).sign(hash_image) + + hash_sig = SHA256.new() + hash_sig.update(sig) + + version = self.version + header_size = self.header_size + image_size = len(self.image) + ofs_img_sig = 64 + len(sig) + flags = 0 + reserved0 = 0 + reserved1 = 0 + + first_header = struct.pack('>4sIIIIIII32s', PRE_LOAD_MAGIC, + version, header_size, image_size, + ofs_img_sig, flags, reserved0, + reserved1, hash_sig.digest()) + + hash_first_header = SHAS[hash_name].new() + hash_first_header.update(first_header) + sig_first_header = padding.new(key, **padding_args).sign(hash_first_header) + + data = first_header + sig_first_header + sig + pad = bytearray(self.header_size - len(data)) + + return data + pad + + def ObtainContents(self): + """Obtain a placeholder for the header contents""" + # wait that the image is available + self.image = self.GetContents(False) + if self.image is None: + return False + self.SetContents(self._CreateHeader()) + return True + + def ProcessContents(self): + data = self._CreateHeader() + return self.ProcessContentsUpdate(data) diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py index 2515907..ccac658 100644 --- a/tools/binman/etype/section.py +++ b/tools/binman/etype/section.py @@ -163,6 +163,7 @@ class Entry_section(Entry): self._sort = False self._skip_at_start = None self._end_4gb = False + self._ignore_missing = False def ReadNode(self): """Read properties from the section node""" @@ -233,10 +234,10 @@ class Entry_section(Entry): todo) return True - def ExpandEntries(self): - super().ExpandEntries() + def gen_entries(self): + super().gen_entries() for entry in self._entries.values(): - entry.ExpandEntries() + entry.gen_entries() def AddMissingProperties(self, have_image_pos): """Add new properties to the device tree as needed for this entry""" @@ -246,7 +247,7 @@ class Entry_section(Entry): for entry in self._entries.values(): entry.AddMissingProperties(have_image_pos) - def ObtainContents(self, skip_entry=None): + def ObtainContents(self, fake_size=0, skip_entry=None): return self.GetEntryContents(skip_entry=skip_entry) def GetPaddedDataForEntry(self, entry, entry_data): @@ -385,7 +386,7 @@ class Entry_section(Entry): self._PackEntries() if self._sort: self._SortEntries() - self._ExpandEntries() + self._extend_entries() data = self.BuildSectionData(True) self.SetContents(data) @@ -403,17 +404,17 @@ class Entry_section(Entry): offset = entry.Pack(offset) return offset - def _ExpandEntries(self): - """Expand any entries that are permitted to""" + def _extend_entries(self): + """Extend any entries that are permitted to""" exp_entry = None for entry in self._entries.values(): if exp_entry: - exp_entry.ExpandToLimit(entry.offset) + exp_entry.extend_to_limit(entry.offset) exp_entry = None - if entry.expand_size: + if entry.extend_size: exp_entry = entry if exp_entry: - exp_entry.ExpandToLimit(self.size) + exp_entry.extend_to_limit(self.size) def _SortEntries(self): """Sort entries by offset""" @@ -894,6 +895,6 @@ class Entry_section(Entry): for entry in self._entries.values(): entry.CheckAltFormats(alt_formats) - def AddBintools(self, tools): + def AddBintools(self, btools): for entry in self._entries.values(): - entry.AddBintools(tools) + entry.AddBintools(btools) diff --git a/tools/binman/etype/u_boot_dtb_with_ucode.py b/tools/binman/etype/u_boot_dtb_with_ucode.py index 554b3b2..047d310 100644 --- a/tools/binman/etype/u_boot_dtb_with_ucode.py +++ b/tools/binman/etype/u_boot_dtb_with_ucode.py @@ -9,6 +9,9 @@ from binman.entry import Entry from binman.etype.blob_dtb import Entry_blob_dtb from patman import tools +# This is imported if needed +state = None + class Entry_u_boot_dtb_with_ucode(Entry_blob_dtb): """A U-Boot device tree file, with the microcode removed diff --git a/tools/binman/etype/vblock.py b/tools/binman/etype/vblock.py index a1de982..065b6ed 100644 --- a/tools/binman/etype/vblock.py +++ b/tools/binman/etype/vblock.py @@ -97,5 +97,5 @@ class Entry_vblock(Entry_collection): data = self.GetVblock(True) return self.ProcessContentsUpdate(data) - def AddBintools(self, tools): - self.futility = self.AddBintool(tools, 'futility') + def AddBintools(self, btools): + self.futility = self.AddBintool(btools, 'futility') diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py index 8f00db6..4ce181a 100644 --- a/tools/binman/ftest.py +++ b/tools/binman/ftest.py @@ -91,6 +91,9 @@ SCP_DATA = b'scp' TEST_FDT1_DATA = b'fdt1' TEST_FDT2_DATA = b'test-fdt2' ENV_DATA = b'var1=1\nvar2="2"' +PRE_LOAD_MAGIC = b'UBSH' +PRE_LOAD_VERSION = 0x11223344.to_bytes(4, 'big') +PRE_LOAD_HDR_SIZE = 0x00001000.to_bytes(4, 'big') # Subdirectory of the input dir to use to put test FDTs TEST_FDT_SUBDIR = 'fdts' @@ -202,6 +205,13 @@ class TestFunctional(unittest.TestCase): TestFunctional._MakeInputFile('env.txt', ENV_DATA) + # ELF file with two sections in different parts of memory, used for both + # ATF and OP_TEE + TestFunctional._MakeInputFile('bl31.elf', + tools.read_file(cls.ElfTestFile('elf_sections'))) + TestFunctional._MakeInputFile('tee.elf', + tools.read_file(cls.ElfTestFile('elf_sections'))) + cls.have_lz4 = comp_util.HAVE_LZ4 @classmethod @@ -991,7 +1001,7 @@ class TestFunctional(unittest.TestCase): self.assertIn("Section '/binman': Size 0x7 (7) does not match " "align-size 0x8 (8)", str(e.exception)) - def testPackAlignPowerOf2(self): + def testPackAlignPowerOf2Inv(self): """Test that invalid image alignment is detected""" with self.assertRaises(ValueError) as e: self._DoTestFile('020_pack_inv_image_align_power2.dts') @@ -2028,9 +2038,9 @@ class TestFunctional(unittest.TestCase): self.assertIn("Node '/binman/files': Missing 'pattern' property", str(e.exception)) - def testExpandSize(self): - """Test an expanding entry""" - data, _, map_data, _ = self._DoReadFileDtb('088_expand_size.dts', + def testExtendSize(self): + """Test an extending entry""" + data, _, map_data, _ = self._DoReadFileDtb('088_extend_size.dts', map=True) expect = (tools.get_bytes(ord('a'), 8) + U_BOOT_DATA + MRC_DATA + tools.get_bytes(ord('b'), 1) + U_BOOT_DATA + @@ -2050,11 +2060,11 @@ class TestFunctional(unittest.TestCase): 00000020 00000020 00000008 fill2 ''', map_data) - def testExpandSizeBad(self): - """Test an expanding entry which fails to provide contents""" + def testExtendSizeBad(self): + """Test an extending entry which fails to provide contents""" with test_util.capture_sys_output() as (stdout, stderr): with self.assertRaises(ValueError) as e: - self._DoReadFileDtb('089_expand_size_bad.dts', map=True) + self._DoReadFileDtb('089_extend_size_bad.dts', map=True) self.assertIn("Node '/binman/_testing': Cannot obtain contents when " 'expanding entry', str(e.exception)) @@ -2487,22 +2497,22 @@ class TestFunctional(unittest.TestCase): str(e.exception)) def testEntryExpand(self): - """Test expanding an entry after it is packed""" - data = self._DoReadFile('121_entry_expand.dts') + """Test extending an entry after it is packed""" + data = self._DoReadFile('121_entry_extend.dts') self.assertEqual(b'aaa', data[:3]) self.assertEqual(U_BOOT_DATA, data[3:3 + len(U_BOOT_DATA)]) self.assertEqual(b'aaa', data[-3:]) - def testEntryExpandBad(self): - """Test expanding an entry after it is packed, twice""" + def testEntryExtendBad(self): + """Test extending an entry after it is packed, twice""" with self.assertRaises(ValueError) as e: - self._DoReadFile('122_entry_expand_twice.dts') + self._DoReadFile('122_entry_extend_twice.dts') self.assertIn("Image '/binman': Entries changed size after packing", str(e.exception)) - def testEntryExpandSection(self): - """Test expanding an entry within a section after it is packed""" - data = self._DoReadFile('123_entry_expand_section.dts') + def testEntryExtendSection(self): + """Test extending an entry within a section after it is packed""" + data = self._DoReadFile('123_entry_extend_section.dts') self.assertEqual(b'aaa', data[:3]) self.assertEqual(U_BOOT_DATA, data[3:3 + len(U_BOOT_DATA)]) self.assertEqual(b'aaa', data[-3:]) @@ -3714,7 +3724,7 @@ class TestFunctional(unittest.TestCase): err = stderr.getvalue() self.assertRegex(err, "Image 'main-section'.*missing.*: intel-ifwi") - def testPackOverlap(self): + def testPackOverlapZero(self): """Test that zero-size overlapping regions are ignored""" self._DoTestFile('160_pack_overlap_zero.dts') @@ -3780,6 +3790,7 @@ class TestFunctional(unittest.TestCase): dtb.Scan() props = self._GetPropTree(dtb, BASE_DTB_PROPS + REPACK_DTB_PROPS) + self.maxDiff = None self.assertEqual({ 'image-pos': 0, 'offset': 0, @@ -3793,19 +3804,19 @@ class TestFunctional(unittest.TestCase): 'fit:offset': 4, 'fit:size': 1840, - 'fit/images/kernel:image-pos': 160, - 'fit/images/kernel:offset': 156, + 'fit/images/kernel:image-pos': 304, + 'fit/images/kernel:offset': 300, 'fit/images/kernel:size': 4, - 'fit/images/kernel/u-boot:image-pos': 160, + 'fit/images/kernel/u-boot:image-pos': 304, 'fit/images/kernel/u-boot:offset': 0, 'fit/images/kernel/u-boot:size': 4, - 'fit/images/fdt-1:image-pos': 456, - 'fit/images/fdt-1:offset': 452, + 'fit/images/fdt-1:image-pos': 552, + 'fit/images/fdt-1:offset': 548, 'fit/images/fdt-1:size': 6, - 'fit/images/fdt-1/u-boot-spl-dtb:image-pos': 456, + 'fit/images/fdt-1/u-boot-spl-dtb:image-pos': 552, 'fit/images/fdt-1/u-boot-spl-dtb:offset': 0, 'fit/images/fdt-1/u-boot-spl-dtb:size': 6, @@ -4029,6 +4040,7 @@ class TestFunctional(unittest.TestCase): self.assertEqual(expected_data, fnode.props['data'].bytes) self.assertEqual('fdt-test-fdt%d.dtb' % seq, fnode.props['description'].value) + self.assertEqual(fnode.subnodes[0].name, 'hash') def _CheckConfig(seq, expected_data): """Check the configuration nodes @@ -4095,13 +4107,6 @@ class TestFunctional(unittest.TestCase): self.assertIn("Generator node requires 'fit,fdt-list' property", str(e.exception)) - def testFitFdtEmptyList(self): - """Test handling of an empty 'of-list' entry arg""" - entry_args = { - 'of-list': '', - } - data = self._DoReadFileDtb('170_fit_fdt.dts', entry_args=entry_args)[0] - def testFitFdtMissing(self): """Test handling of a missing 'default-dt' entry arg""" entry_args = { @@ -4986,16 +4991,6 @@ fdt fdtmap Extract the devicetree blob from the fdtmap self.assertEqual('rot-cert', fent.fip_type) self.assertEqual(b'aa', fent.data) - def testFipOther(self): - """Basic FIP with something that isn't a external blob""" - data = self._DoReadFile('204_fip_other.dts') - hdr, fents = fip_util.decode_fip(data) - - self.assertEqual(2, len(fents)) - fent = fents[1] - self.assertEqual('rot-cert', fent.fip_type) - self.assertEqual(b'aa', fent.data) - def testFipNoType(self): """FIP with an entry of an unknown type""" with self.assertRaises(ValueError) as e: @@ -5318,9 +5313,215 @@ fdt fdtmap Extract the devicetree blob from the fdtmap """Check handling of an FDT map when the section cannot be found""" with self.assertRaises(ValueError) as exc: self._DoReadFileDtb('224_fit_bad_oper.dts') - self.assertIn("Node '/binman/fit': Unknown operation 'unknown'", + self.assertIn("Node '/binman/fit': subnode 'images/@fdt-SEQ': Unknown operation 'unknown'", str(exc.exception)) + def test_uses_expand_size(self): + """Test that the 'expand-size' property cannot be used anymore""" + with self.assertRaises(ValueError) as e: + data = self._DoReadFile('225_expand_size_bad.dts') + self.assertIn( + "Node '/binman/u-boot': Please use 'extend-size' instead of 'expand-size'", + str(e.exception)) + + def testMkimageMissingBlob(self): + """Test using mkimage to build an image""" + with test_util.capture_sys_output() as (stdout, stderr): + self._DoTestFile('229_mkimage_missing.dts', allow_missing=True, + allow_fake_blobs=True) + err = stderr.getvalue() + self.assertRegex( + err, + "Image '.*' has faked external blobs and is non-functional: .*") + + def testFitSplitElf(self): + """Test an image with an FIT with an split-elf operation""" + entry_args = { + 'of-list': 'test-fdt1 test-fdt2', + 'default-dt': 'test-fdt2', + 'atf-bl31-path': 'bl31.elf', + 'tee-os-path': 'tee.elf', + } + test_subdir = os.path.join(self._indir, TEST_FDT_SUBDIR) + data = self._DoReadFileDtb( + '226_fit_split_elf.dts', + entry_args=entry_args, + extra_indirs=[test_subdir])[0] + + self.assertEqual(U_BOOT_NODTB_DATA, data[-len(U_BOOT_NODTB_DATA):]) + fit_data = data[len(U_BOOT_DATA):-len(U_BOOT_NODTB_DATA)] + + base_keys = {'description', 'type', 'arch', 'os', 'compression', + 'data', 'load'} + dtb = fdt.Fdt.FromData(fit_data) + dtb.Scan() + + elf_data = tools.read_file(os.path.join(self._indir, 'bl31.elf')) + segments, entry = elf.read_loadable_segments(elf_data) + + # We assume there are two segments + self.assertEquals(2, len(segments)) + + atf1 = dtb.GetNode('/images/atf-1') + _, start, data = segments[0] + self.assertEqual(base_keys | {'entry'}, atf1.props.keys()) + self.assertEqual(entry, + fdt_util.fdt32_to_cpu(atf1.props['entry'].value)) + self.assertEqual(start, + fdt_util.fdt32_to_cpu(atf1.props['load'].value)) + self.assertEqual(data, atf1.props['data'].bytes) + + atf2 = dtb.GetNode('/images/atf-2') + self.assertEqual(base_keys, atf2.props.keys()) + _, start, data = segments[1] + self.assertEqual(start, + fdt_util.fdt32_to_cpu(atf2.props['load'].value)) + self.assertEqual(data, atf2.props['data'].bytes) + + conf = dtb.GetNode('/configurations') + self.assertEqual({'default'}, conf.props.keys()) + + for subnode in conf.subnodes: + self.assertEqual({'description', 'fdt', 'loadables'}, + subnode.props.keys()) + self.assertEqual( + ['atf-1', 'atf-2', 'tee-1', 'tee-2'], + fdt_util.GetStringList(subnode, 'loadables')) + + def _check_bad_fit(self, dts): + """Check a bad FIT + + This runs with the given dts and returns the assertion raised + + Args: + dts (str): dts filename to use + + Returns: + str: Assertion string raised + """ + entry_args = { + 'of-list': 'test-fdt1 test-fdt2', + 'default-dt': 'test-fdt2', + 'atf-bl31-path': 'bl31.elf', + 'tee-os-path': 'tee.elf', + } + test_subdir = os.path.join(self._indir, TEST_FDT_SUBDIR) + with self.assertRaises(ValueError) as exc: + self._DoReadFileDtb(dts, entry_args=entry_args, + extra_indirs=[test_subdir])[0] + return str(exc.exception) + + def testFitSplitElfBadElf(self): + """Test a FIT split-elf operation with an invalid ELF file""" + TestFunctional._MakeInputFile('bad.elf', tools.get_bytes(100, 100)) + entry_args = { + 'of-list': 'test-fdt1 test-fdt2', + 'default-dt': 'test-fdt2', + 'atf-bl31-path': 'bad.elf', + 'tee-os-path': 'tee.elf', + } + test_subdir = os.path.join(self._indir, TEST_FDT_SUBDIR) + with self.assertRaises(ValueError) as exc: + self._DoReadFileDtb( + '226_fit_split_elf.dts', + entry_args=entry_args, + extra_indirs=[test_subdir])[0] + self.assertIn( + "Node '/binman/fit': subnode 'images/@atf-SEQ': Failed to read ELF file: Magic number does not match", + str(exc.exception)) + + def testFitSplitElfBadDirective(self): + """Test a FIT split-elf invalid fit,xxx directive in an image node""" + err = self._check_bad_fit('227_fit_bad_dir.dts') + self.assertIn( + "Node '/binman/fit': subnode 'images/@atf-SEQ': Unknown directive 'fit,something'", + err) + + def testFitSplitElfBadDirectiveConfig(self): + """Test a FIT split-elf with invalid fit,xxx directive in config""" + err = self._check_bad_fit('228_fit_bad_dir_config.dts') + self.assertEqual( + "Node '/binman/fit': subnode 'configurations/@config-SEQ': Unknown directive 'fit,config'", + err) + + def checkFitSplitElf(self, **kwargs): + """Test an split-elf FIT with a missing ELF file""" + entry_args = { + 'of-list': 'test-fdt1 test-fdt2', + 'default-dt': 'test-fdt2', + 'atf-bl31-path': 'bl31.elf', + 'tee-os-path': 'missing.elf', + } + test_subdir = os.path.join(self._indir, TEST_FDT_SUBDIR) + with test_util.capture_sys_output() as (stdout, stderr): + self._DoTestFile( + '226_fit_split_elf.dts', entry_args=entry_args, + extra_indirs=[test_subdir], **kwargs) + err = stderr.getvalue() + return err + + def testFitSplitElfMissing(self): + """Test an split-elf FIT with a missing ELF file""" + err = self.checkFitSplitElf(allow_missing=True) + self.assertRegex( + err, + "Image '.*' is missing external blobs and is non-functional: .*") + + def testFitSplitElfFaked(self): + """Test an split-elf FIT with faked ELF file""" + err = self.checkFitSplitElf(allow_missing=True, allow_fake_blobs=True) + self.assertRegex( + err, + "Image '.*' is missing external blobs and is non-functional: .*") + + def testPreLoad(self): + """Test an image with a pre-load header""" + entry_args = { + 'pre-load-key-path': '.', + } + data, _, _, _ = self._DoReadFileDtb('225_pre_load.dts', + entry_args=entry_args) + self.assertEqual(PRE_LOAD_MAGIC, data[:len(PRE_LOAD_MAGIC)]) + self.assertEqual(PRE_LOAD_VERSION, data[4:4 + len(PRE_LOAD_VERSION)]) + self.assertEqual(PRE_LOAD_HDR_SIZE, data[8:8 + len(PRE_LOAD_HDR_SIZE)]) + data = self._DoReadFile('225_pre_load.dts') + self.assertEqual(PRE_LOAD_MAGIC, data[:len(PRE_LOAD_MAGIC)]) + self.assertEqual(PRE_LOAD_VERSION, data[4:4 + len(PRE_LOAD_VERSION)]) + self.assertEqual(PRE_LOAD_HDR_SIZE, data[8:8 + len(PRE_LOAD_HDR_SIZE)]) + + def testPreLoadPkcs(self): + """Test an image with a pre-load header with padding pkcs""" + data = self._DoReadFile('226_pre_load_pkcs.dts') + self.assertEqual(PRE_LOAD_MAGIC, data[:len(PRE_LOAD_MAGIC)]) + self.assertEqual(PRE_LOAD_VERSION, data[4:4 + len(PRE_LOAD_VERSION)]) + self.assertEqual(PRE_LOAD_HDR_SIZE, data[8:8 + len(PRE_LOAD_HDR_SIZE)]) + + def testPreLoadPss(self): + """Test an image with a pre-load header with padding pss""" + data = self._DoReadFile('227_pre_load_pss.dts') + self.assertEqual(PRE_LOAD_MAGIC, data[:len(PRE_LOAD_MAGIC)]) + self.assertEqual(PRE_LOAD_VERSION, data[4:4 + len(PRE_LOAD_VERSION)]) + self.assertEqual(PRE_LOAD_HDR_SIZE, data[8:8 + len(PRE_LOAD_HDR_SIZE)]) + + def testPreLoadInvalidPadding(self): + """Test an image with a pre-load header with an invalid padding""" + with self.assertRaises(ValueError) as e: + data = self._DoReadFile('228_pre_load_invalid_padding.dts') + + def testPreLoadInvalidSha(self): + """Test an image with a pre-load header with an invalid hash""" + with self.assertRaises(ValueError) as e: + data = self._DoReadFile('229_pre_load_invalid_sha.dts') + + def testPreLoadInvalidAlgo(self): + """Test an image with a pre-load header with an invalid algo""" + with self.assertRaises(ValueError) as e: + data = self._DoReadFile('230_pre_load_invalid_algo.dts') + + def testPreLoadInvalidKey(self): + """Test an image with a pre-load header with an invalid key""" + with self.assertRaises(ValueError) as e: + data = self._DoReadFile('231_pre_load_invalid_key.dts') if __name__ == "__main__": unittest.main() diff --git a/tools/binman/main.py b/tools/binman/main.py index ab25b48..9392b59 100755 --- a/tools/binman/main.py +++ b/tools/binman/main.py @@ -41,6 +41,7 @@ from patman import test_util # Bring in the libfdt module sys.path.insert(2, 'scripts/dtc/pylibfdt') sys.path.insert(2, os.path.join(srctree, 'scripts/dtc/pylibfdt')) +sys.path.insert(2, os.path.join(srctree, 'build-sandbox/scripts/dtc/pylibfdt')) sys.path.insert(2, os.path.join(srctree, 'build-sandbox_spl/scripts/dtc/pylibfdt')) # When running under python-coverage on Ubuntu 16.04, the dist-packages diff --git a/tools/binman/test/088_expand_size.dts b/tools/binman/test/088_extend_size.dts index c8a0130..f352699 100644 --- a/tools/binman/test/088_expand_size.dts +++ b/tools/binman/test/088_extend_size.dts @@ -5,7 +5,7 @@ binman { size = <40>; fill { - expand-size; + extend-size; fill-byte = [61]; size = <0>; }; @@ -13,7 +13,7 @@ offset = <8>; }; section { - expand-size; + extend-size; pad-byte = <0x62>; intel-mrc { }; @@ -25,7 +25,7 @@ section2 { type = "section"; fill { - expand-size; + extend-size; fill-byte = [63]; size = <0>; }; @@ -35,7 +35,7 @@ }; fill2 { type = "fill"; - expand-size; + extend-size; fill-byte = [64]; size = <0>; }; diff --git a/tools/binman/test/089_expand_size_bad.dts b/tools/binman/test/089_extend_size_bad.dts index edc0e5c..edc60e4 100644 --- a/tools/binman/test/089_expand_size_bad.dts +++ b/tools/binman/test/089_extend_size_bad.dts @@ -4,7 +4,7 @@ / { binman { _testing { - expand-size; + extend-size; return-contents-once; }; u-boot { diff --git a/tools/binman/test/121_entry_expand.dts b/tools/binman/test/121_entry_extend.dts index ebb7816..ebb7816 100644 --- a/tools/binman/test/121_entry_expand.dts +++ b/tools/binman/test/121_entry_extend.dts diff --git a/tools/binman/test/122_entry_expand_twice.dts b/tools/binman/test/122_entry_extend_twice.dts index 258cf85..258cf85 100644 --- a/tools/binman/test/122_entry_expand_twice.dts +++ b/tools/binman/test/122_entry_extend_twice.dts diff --git a/tools/binman/test/123_entry_expand_section.dts b/tools/binman/test/123_entry_extend_section.dts index 046f723..046f723 100644 --- a/tools/binman/test/123_entry_expand_section.dts +++ b/tools/binman/test/123_entry_extend_section.dts diff --git a/tools/binman/test/170_fit_fdt.dts b/tools/binman/test/170_fit_fdt.dts index 99d710c..0197ffd 100644 --- a/tools/binman/test/170_fit_fdt.dts +++ b/tools/binman/test/170_fit_fdt.dts @@ -36,6 +36,9 @@ description = "fdt-NAME.dtb"; type = "flat_dt"; compression = "none"; + hash { + algo = "sha256"; + }; }; }; diff --git a/tools/binman/test/224_fit_bad_oper.dts b/tools/binman/test/224_fit_bad_oper.dts index cee801e..8a8014e 100644 --- a/tools/binman/test/224_fit_bad_oper.dts +++ b/tools/binman/test/224_fit_bad_oper.dts @@ -21,7 +21,5 @@ }; }; }; - fdtmap { - }; }; }; diff --git a/tools/binman/test/225_dev.key b/tools/binman/test/225_dev.key new file mode 100644 index 0000000..b36bad2 --- /dev/null +++ b/tools/binman/test/225_dev.key @@ -0,0 +1,28 @@ +-----BEGIN PRIVATE KEY----- +MIIEvgIBADANBgkqhkiG9w0BAQEFAASCBKgwggSkAgEAAoIBAQDYngNWUvXYRXX/ +WEUI7k164fcpv1srXz+u+5Y3Yhouw3kPs+ffvYyHAPfjF7aUIAgezKk/4o7AvsxE +Rdih3T+0deAd/q/yuqN4Adzt6ImnsO/EqdtYl3Yh+Vck9xWhLd3SAw1++GfSmNMT +gxlcc/z6z+bIh2tJNtPtRSNNHMmvYYOkBmkfwcjbMXD+fe4vBwYjVrIize+l7Yuv +1qN2nFlq56pFi8Lj5vOvFyNhZHRvwcpWdUdkx39beNUfwrGhgewOeWngTcY75n7S +FY45TBR1G2PR90CQvyDinCi9Mm0u5s+1WASQWPblovfD6CPbHQu4GZm+FAs7yUvr +hA7VCyNxAgMBAAECggEAUbq0uaJNfc8faTtNuMPo2d9eGRNI+8FRTt0/3R+Xj2NT +TvhrGUD0P4++96Df012OkshXZ3I8uD6E5ZGQ3emTeqwq5kZM7oE64jGZwO3G2k1o ++cO4reFfwgvItHrBX3HlyrI6KljhG1Vr9mW1cOuWXK+KfMiTUylrpo86dYLSGeg3 +7ZlsOPArr4eof/A0iPryQZX6X5POf7k/e9qRFYsOkoRQO8pBL3J4rIKwBl3uBN3K ++FY40vCkd8JyTo2DNfHeIe1XYA9fG2ahjD2qMsw10TUsRRMd5yhonEcJ7VzGzy8m +MnuMDAr7CwbbLkKi4UfZUl6YDkojqerwLOrxikBqkQKBgQD6sS6asDgwiq5MtstE +4/PxMrVEsCdkrU+jjQN749qIt/41a6lbp0Pr6aUKKKGs0QbcnCtlpp7qmhvymBcW +hlqxk2wokKMChv4WLXjZS3DGcOdMglc81y2F+252bToN8vwUfm6DPp9/GKtejA0a +GP57GeHxoVO7vfDX1F/vZRogRQKBgQDdNCLWOlGWvnKjfgNZHgX+Ou6ZgTSAzy+/ +hRsZPlY5nwO5iD7YkIKvqBdOmfyjlUpHWk2uAcT9pfgzYygvyBRaoQhAYBGkHItt +slaMxnLd+09wWufoCbgJvFn+wVQxBLcA5PXB98ws0Dq8ZYuo6AOuoRivsSO4lblK +MW0guBJXPQKBgQDGjf0ukbH/aGfC5Oi8SJvWhuYhYC/jQo2YKUEAKCjXLnuOThZW +PHXEbUrFcAcVfH0l0B9jJIQrpiHKlAF9Wq6MhQoeWuhxQQAQCrXzzRemZJgd9gIo +cvlgbBNCgyJ/F9vmU3kuRDRJkv1wJhbee7tbPtXA7pkGUttl5pSRZI87zQKBgQC/ +0ZkwCox72xTQP9MpcYai6nnDta5Q0NnIC+Xu4wakmwcA2WweIlqhdnMXnyLcu/YY +n+9iqHgpuMXd0eukW62C1cexA13o4TPrYU36b5BmfKprdPlLVzo3fxTPfNjEVSFY +7jNLC9YLOlrkym3sf53Jzjr5B/RA+d0ewHOwfs6wxQKBgFSyfjx5wtdHK4fO+Z1+ +q3bxouZryM/4CiPCFuw4+aZmRHPmufuNCvfXdF+IH8dM0E9ObwKZAe/aMP/Y+Abx +Wz9Vm4CP6g7k3DU3INEygyjmIQQDKQ9lFdDnsP9ESzrPbaGxZhc4x2lo7qmeW1BR +/RuiAofleFkT4s+EhLrfE/v5 +-----END PRIVATE KEY----- diff --git a/tools/binman/test/225_expand_size_bad.dts b/tools/binman/test/225_expand_size_bad.dts new file mode 100644 index 0000000..d4ad9a6 --- /dev/null +++ b/tools/binman/test/225_expand_size_bad.dts @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +/ { + binman { + u-boot { + expand-size; + }; + }; +}; diff --git a/tools/binman/test/225_pre_load.dts b/tools/binman/test/225_pre_load.dts new file mode 100644 index 0000000..c1ffe1a --- /dev/null +++ b/tools/binman/test/225_pre_load.dts @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <0x11223344>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/binman/test/226_fit_split_elf.dts b/tools/binman/test/226_fit_split_elf.dts new file mode 100644 index 0000000..fab1533 --- /dev/null +++ b/tools/binman/test/226_fit_split_elf.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + u-boot { + }; + fit { + description = "test-desc"; + #address-cells = <1>; + fit,fdt-list = "of-list"; + + images { + @fdt-SEQ { + description = "fdt-NAME.dtb"; + type = "flat_dt"; + compression = "none"; + }; + atf: @atf-SEQ { + fit,operation = "split-elf"; + description = "ARM Trusted Firmware"; + type = "firmware"; + arch = "arm64"; + os = "arm-trusted-firmware"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + atf-bl31 { + }; + }; + + @tee-SEQ { + fit,operation = "split-elf"; + description = "TEE"; + type = "tee"; + arch = "arm64"; + os = "tee"; + compression = "none"; + fit,load; + fit,entry; + fit,data; + + tee-os { + }; + }; + }; + + configurations { + default = "@config-DEFAULT-SEQ"; + config: @config-SEQ { + description = "conf-NAME.dtb"; + fdt = "fdt-SEQ"; + fit,loadables; + }; + }; + }; + + u-boot-nodtb { + }; + }; +}; diff --git a/tools/binman/test/226_pre_load_pkcs.dts b/tools/binman/test/226_pre_load_pkcs.dts new file mode 100644 index 0000000..3db0a37 --- /dev/null +++ b/tools/binman/test/226_pre_load_pkcs.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + padding-name = "pkcs-1.5"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <0x11223344>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/binman/test/227_fit_bad_dir.dts b/tools/binman/test/227_fit_bad_dir.dts new file mode 100644 index 0000000..51f4816 --- /dev/null +++ b/tools/binman/test/227_fit_bad_dir.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +#include "226_fit_split_elf.dts" + +&atf { + fit,something = "bad"; +}; diff --git a/tools/binman/test/227_pre_load_pss.dts b/tools/binman/test/227_pre_load_pss.dts new file mode 100644 index 0000000..b1b01d5 --- /dev/null +++ b/tools/binman/test/227_pre_load_pss.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + padding-name = "pss"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <0x11223344>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/binman/test/228_fit_bad_dir_config.dts b/tools/binman/test/228_fit_bad_dir_config.dts new file mode 100644 index 0000000..825a346 --- /dev/null +++ b/tools/binman/test/228_fit_bad_dir_config.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +#include "226_fit_split_elf.dts" + +&config { + fit,config = "bad"; +}; diff --git a/tools/binman/test/228_pre_load_invalid_padding.dts b/tools/binman/test/228_pre_load_invalid_padding.dts new file mode 100644 index 0000000..84fe289 --- /dev/null +++ b/tools/binman/test/228_pre_load_invalid_padding.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha256,rsa2048"; + padding-name = "padding"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/binman/test/229_mkimage_missing.dts b/tools/binman/test/229_mkimage_missing.dts new file mode 100644 index 0000000..54a5a6c --- /dev/null +++ b/tools/binman/test/229_mkimage_missing.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + mkimage { + args = "-n test -T script"; + + blob-ext { + filename = "missing.bin"; + }; + }; + }; +}; diff --git a/tools/binman/test/229_pre_load_invalid_sha.dts b/tools/binman/test/229_pre_load_invalid_sha.dts new file mode 100644 index 0000000..a2b6725 --- /dev/null +++ b/tools/binman/test/229_pre_load_invalid_sha.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha2560,rsa2048"; + padding-name = "pkcs-1.5"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/binman/test/230_pre_load_invalid_algo.dts b/tools/binman/test/230_pre_load_invalid_algo.dts new file mode 100644 index 0000000..34c8d34 --- /dev/null +++ b/tools/binman/test/230_pre_load_invalid_algo.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha256,rsa20480"; + padding-name = "pkcs-1.5"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/binman/test/231_pre_load_invalid_key.dts b/tools/binman/test/231_pre_load_invalid_key.dts new file mode 100644 index 0000000..08d5a75 --- /dev/null +++ b/tools/binman/test/231_pre_load_invalid_key.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + + binman { + pre-load { + content = <&image>; + algo-name = "sha256,rsa4096"; + padding-name = "pkcs-1.5"; + key-name = "tools/binman/test/225_dev.key"; + header-size = <4096>; + version = <1>; + }; + + image: blob-ext { + filename = "refcode.bin"; + }; + }; +}; diff --git a/tools/buildman/bsettings.py b/tools/buildman/bsettings.py index 0b7208d..e634bbb 100644 --- a/tools/buildman/bsettings.py +++ b/tools/buildman/bsettings.py @@ -74,6 +74,7 @@ def CreateBuildmanConfigFile(config_fname): print('''[toolchain] # name = path # e.g. x86 = /opt/gcc-4.6.3-nolibc/x86_64-linux +other = / [toolchain-prefix] # name = path to prefix diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py index 754642d..ecbfa3e 100644 --- a/tools/buildman/builder.py +++ b/tools/buildman/builder.py @@ -1763,7 +1763,7 @@ class Builder: if self.num_threads: self.queue.put(job) else: - results = self._single_builder.RunJob(job) + self._single_builder.RunJob(job) if self.num_threads: term = threading.Thread(target=self.queue.join) diff --git a/tools/buildman/cfgutil.py b/tools/buildman/cfgutil.py index 4eba508..ab74a8e 100644 --- a/tools/buildman/cfgutil.py +++ b/tools/buildman/cfgutil.py @@ -123,10 +123,10 @@ def adjust_cfg_file(fname, adjust_cfg): C=val to set the value of C (val must have quotes if C is a string Kconfig) """ - lines = tools.ReadFile(fname, binary=False).splitlines() + lines = tools.read_file(fname, binary=False).splitlines() out_lines = adjust_cfg_lines(lines, adjust_cfg) out = '\n'.join(out_lines) + '\n' - tools.WriteFile(fname, out, binary=False) + tools.write_file(fname, out, binary=False) def convert_list_to_dict(adjust_cfg_list): """Convert a list of config changes into the dict used by adjust_cfg_file() @@ -219,7 +219,7 @@ def check_cfg_file(fname, adjust_cfg): Returns: str: None if OK, else an error string listing the problems """ - lines = tools.ReadFile(fname, binary=False).splitlines() + lines = tools.read_file(fname, binary=False).splitlines() bad_cfgs = check_cfg_lines(lines, adjust_cfg) if bad_cfgs: out = [f'{cfg:20} {line}' for cfg, line in bad_cfgs] diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py index 6fcceb0..fbf6706 100644 --- a/tools/buildman/func_test.py +++ b/tools/buildman/func_test.py @@ -524,12 +524,6 @@ class TestFunctional(unittest.TestCase): # Each commit has a config and make self.assertEqual(self._make_calls, len(boards) * self._commits * 2) - def testForceReconfigure(self): - """The -f flag should force a rebuild""" - self._RunControl('-b', TEST_BRANCH, '-C', '-o', self._output_dir) - # Each commit has a config and make - self.assertEqual(self._make_calls, len(boards) * self._commits * 2) - def testMrproper(self): """The -f flag should force a rebuild""" self._RunControl('-b', TEST_BRANCH, '-m', '-o', self._output_dir) diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py index c67895c..b9f3756 100644 --- a/tools/buildman/kconfiglib.py +++ b/tools/buildman/kconfiglib.py @@ -556,6 +556,7 @@ from os.path import dirname, exists, expandvars, islink, join, realpath VERSION = (14, 1, 0) +# pylint: disable=E1101 # File layout: # diff --git a/tools/buildman/main.py b/tools/buildman/main.py index 0127106..3b6af24 100755 --- a/tools/buildman/main.py +++ b/tools/buildman/main.py @@ -30,8 +30,8 @@ from patman import terminal from patman import test_util def RunTests(skip_net_tests, verboose, args): - import func_test - import test + from buildman import func_test + from buildman import test import doctest result = unittest.TestResult() diff --git a/tools/concurrencytest/__init__.py b/tools/concurrencytest/__init__.py new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/tools/concurrencytest/__init__.py diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index 7a3f5cb..c51e343 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -2,7 +2,7 @@ # This Dockerfile is used to build an image containing basic stuff to be used # to build U-Boot and run our test suites. -FROM ubuntu:focal-20220113 +FROM ubuntu:focal-20220302 MAINTAINER Tom Rini <trini@konsulko.com> LABEL Description=" This image is for building U-Boot inside a container" @@ -48,6 +48,7 @@ RUN apt-get update && apt-get install -y \ dosfstools \ e2fsprogs \ efitools \ + erofs-utils \ expect \ fakeroot \ flex \ diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py index c16909a..d933972 100644 --- a/tools/dtoc/fdt.py +++ b/tools/dtoc/fdt.py @@ -516,9 +516,7 @@ class Node: Returns: Prop added """ - out = b'' - for string in val: - out += bytes(string, 'utf-8') + b'\0' + out = b'\0'.join(bytes(s, 'utf-8') for s in val) + b'\0' if val else b'' return self.AddData(prop_name, out) def AddInt(self, prop_name, val): diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py index c82e774..d7c38ad 100644 --- a/tools/dtoc/fdt_util.py +++ b/tools/dtoc/fdt_util.py @@ -158,6 +158,8 @@ def GetString(node, propname, default=None): if not prop: return default value = prop.value + if not prop.bytes: + return '' if isinstance(value, list): raise ValueError("Node '%s' property '%s' has list value: expecting " "a single string" % (node.name, propname)) @@ -179,6 +181,8 @@ def GetStringList(node, propname, default=None): if not prop: return default value = prop.value + if not prop.bytes: + return [] if not isinstance(value, list): strval = GetString(node, propname) return [strval] @@ -192,8 +196,12 @@ def GetArgs(node, propname): value = GetStringList(node, propname) else: value = [] - lists = [v.split() for v in value] - args = [x for l in lists for x in l] + if not value: + args = [] + elif len(value) == 1: + args = value[0].split() + else: + args = value return args def GetBool(node, propname, default=False): diff --git a/tools/dtoc/test/dtoc_test_simple.dts b/tools/dtoc/test/dtoc_test_simple.dts index 2d321fb..aef07ef 100644 --- a/tools/dtoc/test/dtoc_test_simple.dts +++ b/tools/dtoc/test/dtoc_test_simple.dts @@ -63,5 +63,7 @@ orig-node { orig = <1 23 4>; args = "-n first", "second", "-p", "123,456", "-x"; + args2 = "a space", "there"; + args3 = "-n first second -p 123,456 -x"; }; }; diff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py index ea88954..c81bcc9 100755 --- a/tools/dtoc/test_dtoc.py +++ b/tools/dtoc/test_dtoc.py @@ -16,13 +16,13 @@ import os import struct import unittest -from dtb_platdata import Ftype -from dtb_platdata import get_value -from dtb_platdata import tab_to from dtoc import dtb_platdata from dtoc import fdt from dtoc import fdt_util from dtoc import src_scan +from dtoc.dtb_platdata import Ftype +from dtoc.dtb_platdata import get_value +from dtoc.dtb_platdata import tab_to from dtoc.src_scan import conv_name_to_c from dtoc.src_scan import get_compat_name from patman import test_util diff --git a/tools/dtoc/test_fdt.py b/tools/dtoc/test_fdt.py index 576d65b..914ed6a 100755 --- a/tools/dtoc/test_fdt.py +++ b/tools/dtoc/test_fdt.py @@ -25,7 +25,7 @@ sys.path.insert(2, os.path.join(our_path, from dtoc import fdt from dtoc import fdt_util from dtoc.fdt_util import fdt32_to_cpu, fdt64_to_cpu -from fdt import Type, BytesToValue +from dtoc.fdt import Type, BytesToValue import libfdt from patman import command from patman import test_util @@ -119,9 +119,9 @@ class TestFdt(unittest.TestCase): """Test that packing a device tree works""" self.dtb.Pack() - def testGetFdt(self): + def testGetFdtRaw(self): """Tetst that we can access the raw device-tree data""" - self.assertTrue(isinstance(self.dtb.GetContents(), bytearray)) + self.assertTrue(isinstance(self.dtb.GetContents(), bytes)) def testGetProps(self): """Tests obtaining a list of properties""" @@ -550,6 +550,12 @@ class TestProp(unittest.TestCase): data = self.fdt.getprop(self.node.Offset(), 'stringlist') self.assertEqual(b'123\x00456\0', data) + val = [] + self.node.AddStringList('stringlist', val) + self.dtb.Sync(auto_resize=True) + data = self.fdt.getprop(self.node.Offset(), 'stringlist') + self.assertEqual(b'', data) + def test_delete_node(self): """Test deleting a node""" old_offset = self.fdt.path_offset('/spl-test') @@ -637,6 +643,7 @@ class TestFdtUtil(unittest.TestCase): self.assertEqual('message', fdt_util.GetString(self.node, 'stringval')) self.assertEqual('test', fdt_util.GetString(self.node, 'missing', 'test')) + self.assertEqual('', fdt_util.GetString(self.node, 'boolval')) with self.assertRaises(ValueError) as e: self.assertEqual(3, fdt_util.GetString(self.node, 'stringarray')) @@ -651,6 +658,7 @@ class TestFdtUtil(unittest.TestCase): fdt_util.GetStringList(self.node, 'stringarray')) self.assertEqual(['test'], fdt_util.GetStringList(self.node, 'missing', ['test'])) + self.assertEqual([], fdt_util.GetStringList(self.node, 'boolval')) def testGetArgs(self): node = self.dtb.GetNode('/orig-node') @@ -659,8 +667,12 @@ class TestFdtUtil(unittest.TestCase): ['multi-word', 'message'], fdt_util.GetArgs(self.node, 'stringarray')) self.assertEqual([], fdt_util.GetArgs(self.node, 'boolval')) - self.assertEqual(['-n', 'first', 'second', '-p', '123,456', '-x'], + self.assertEqual(['-n first', 'second', '-p', '123,456', '-x'], fdt_util.GetArgs(node, 'args')) + self.assertEqual(['a space', 'there'], + fdt_util.GetArgs(node, 'args2')) + self.assertEqual(['-n', 'first', 'second', '-p', '123,456', '-x'], + fdt_util.GetArgs(node, 'args3')) with self.assertRaises(ValueError) as exc: fdt_util.GetArgs(self.node, 'missing') self.assertIn( diff --git a/tools/fit_image.c b/tools/fit_image.c index 15f7c82..1884a2e 100644 --- a/tools/fit_image.c +++ b/tools/fit_image.c @@ -59,6 +59,9 @@ static int fit_add_file_data(struct image_tool_params *params, size_t size_inc, ret = fit_set_timestamp(ptr, 0, time); } + if (!ret) + ret = fit_pre_load_data(params->keydir, dest_blob, ptr); + if (!ret) { ret = fit_cipher_data(params->keydir, dest_blob, ptr, params->comment, diff --git a/tools/image-host.c b/tools/image-host.c index eaeb765..ab6f756 100644 --- a/tools/image-host.c +++ b/tools/image-host.c @@ -14,6 +14,11 @@ #include <image.h> #include <version.h> +#include <openssl/pem.h> +#include <openssl/evp.h> + +#define IMAGE_PRE_LOAD_PATH "/image/pre-load/sig" + /** * fit_set_hash_value - set hash value in requested has node * @fit: pointer to the FIT format image header @@ -1111,6 +1116,115 @@ static int fit_config_add_verification_data(const char *keydir, return 0; } +/* + * 0) open file (open) + * 1) read certificate (PEM_read_X509) + * 2) get public key (X509_get_pubkey) + * 3) provide der format (d2i_RSAPublicKey) + */ +static int read_pub_key(const char *keydir, const void *name, + unsigned char **pubkey, int *pubkey_len) +{ + char path[1024]; + EVP_PKEY *key = NULL; + X509 *cert; + FILE *f; + int ret; + + memset(path, 0, 1024); + snprintf(path, sizeof(path), "%s/%s.crt", keydir, (char *)name); + + /* Open certificate file */ + f = fopen(path, "r"); + if (!f) { + fprintf(stderr, "Couldn't open RSA certificate: '%s': %s\n", + path, strerror(errno)); + return -EACCES; + } + + /* Read the certificate */ + cert = NULL; + if (!PEM_read_X509(f, &cert, NULL, NULL)) { + printf("Couldn't read certificate"); + ret = -EINVAL; + goto err_cert; + } + + /* Get the public key from the certificate. */ + key = X509_get_pubkey(cert); + if (!key) { + printf("Couldn't read public key\n"); + ret = -EINVAL; + goto err_pubkey; + } + + /* Get DER form */ + ret = i2d_PublicKey(key, pubkey); + if (ret < 0) { + printf("Couldn't get DER form\n"); + ret = -EINVAL; + goto err_pubkey; + } + + *pubkey_len = ret; + ret = 0; + +err_pubkey: + X509_free(cert); +err_cert: + fclose(f); + return ret; +} + +int fit_pre_load_data(const char *keydir, void *keydest, void *fit) +{ + int pre_load_noffset; + const void *algo_name; + const void *key_name; + unsigned char *pubkey = NULL; + int ret, pubkey_len; + + if (!keydir || !keydest || !fit) + return 0; + + /* Search node pre-load sig */ + pre_load_noffset = fdt_path_offset(keydest, IMAGE_PRE_LOAD_PATH); + if (pre_load_noffset < 0) { + ret = 0; + goto out; + } + + algo_name = fdt_getprop(keydest, pre_load_noffset, "algo-name", NULL); + key_name = fdt_getprop(keydest, pre_load_noffset, "key-name", NULL); + + /* Check that all mandatory properties are present */ + if (!algo_name || !key_name) { + if (!algo_name) + printf("The property algo-name is missing in the node %s\n", + IMAGE_PRE_LOAD_PATH); + if (!key_name) + printf("The property key-name is missing in the node %s\n", + IMAGE_PRE_LOAD_PATH); + ret = -ENODATA; + goto out; + } + + /* Read public key */ + ret = read_pub_key(keydir, key_name, &pubkey, &pubkey_len); + if (ret < 0) + goto out; + + /* Add the public key to the device tree */ + ret = fdt_setprop(keydest, pre_load_noffset, "public-key", + pubkey, pubkey_len); + if (ret) + printf("Can't set public-key in node %s (ret = %d)\n", + IMAGE_PRE_LOAD_PATH, ret); + + out: + return ret; +} + int fit_cipher_data(const char *keydir, void *keydest, void *fit, const char *comment, int require_keys, const char *engine_id, const char *cmdname) diff --git a/tools/moveconfig.py b/tools/moveconfig.py index cff1e30..84bc875 100755 --- a/tools/moveconfig.py +++ b/tools/moveconfig.py @@ -94,17 +94,6 @@ SIZES = { RE_REMOVE_DEFCONFIG = re.compile(r'(.*)_defconfig') ### helper functions ### -def remove_defconfig(defc): - """Drop the _defconfig suffix on a string - - Args: - defc (str): String to convert - - Returns: - str: string with the '_defconfig' suffix removed - """ - return RE_REMOVE_DEFCONFIG.match(defc)[1] - def check_top_directory(): """Exit if we are not at the top of source directory.""" for fname in 'README', 'Licenses': @@ -339,7 +328,7 @@ def read_file(fname, as_lines=True, skip_unicode=False): return inf.read() except UnicodeDecodeError as e: if not skip_unicode: - raises + raise print("Failed on file %s': %s" % (fname, e)) return None @@ -790,9 +779,6 @@ class KconfigParser: actlog = "'%s' is the same as the define in Kconfig. Do nothing." \ % value log_color = COLOR_LIGHT_PURPLE - elif action == ACTION_SPL_NOT_EXIST: - actlog = 'SPL is not enabled for this defconfig. Skip.' - log_color = COLOR_PURPLE else: sys.exit('Internal Error. This should not happen.') @@ -1621,8 +1607,7 @@ def defconfig_matches(configs, re_match): bool: True if any CONFIG matches the regex """ for cfg in configs: - m_cfg = re_match.match(cfg) - if m_cfg and m_cfg.span()[1] == len(cfg): + if re_match.fullmatch(cfg): return True return False @@ -1671,7 +1656,7 @@ def do_find_config(config_list): print(f"Error: Not in Kconfig: %s" % ' '.join(adhoc)) else: print(f'{len(out)} matches') - print(' '.join([remove_defconfig(item) for item in out])) + print(' '.join(item.split('_defconfig')[0] for item in out)) def prefix_config(cfg): diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py index dd792ef..70ba561 100644 --- a/tools/patman/checkpatch.py +++ b/tools/patman/checkpatch.py @@ -125,7 +125,7 @@ def check_patch_parse(checkpatch_output, verbose=False): Returns: namedtuple containing: ok: False=failure, True=ok - problems: List of problems, each a dict: + problems (list of problems): each a dict: 'type'; error or warning 'msg': text message 'file' : filename @@ -252,6 +252,8 @@ def check_patches(verbose, args): if (len(result.problems) != result.errors + result.warnings + result.checks): print("Internal error: some problems lost") + # Python seems to get confused by this + # pylint: disable=E1133 for item in result.problems: sys.stderr.write( get_warning_msg(col, item.get('type', '<unknown>'), diff --git a/tools/patman/command.py b/tools/patman/command.py index 2435878..92c453b 100644 --- a/tools/patman/command.py +++ b/tools/patman/command.py @@ -17,13 +17,6 @@ class CommandResult: return_code: Return code from command exception: Exception received, or None if all ok """ - def __init__(self): - self.stdout = None - self.stderr = None - self.combined = None - self.return_code = None - self.exception = None - def __init__(self, stdout='', stderr='', combined='', return_code=0, exception=None): self.stdout = stdout @@ -72,6 +65,7 @@ def run_pipe(pipe_list, infile=None, outfile=None, """ if test_result: if hasattr(test_result, '__call__'): + # pylint: disable=E1102 result = test_result(pipe_list=pipe_list) if result: return result diff --git a/tools/patman/commit.py b/tools/patman/commit.py index c331a3b..9537de4 100644 --- a/tools/patman/commit.py +++ b/tools/patman/commit.py @@ -28,10 +28,11 @@ class Commit: key: rtag type (e.g. 'Reviewed-by') value: Set of people who gave that rtag, each a name/email string warn: List of warnings for this commit, each a str + patch (str): Filename of the patch file for this commit """ def __init__(self, hash): self.hash = hash - self.subject = None + self.subject = '' self.tags = [] self.changes = {} self.cc_list = [] @@ -40,6 +41,7 @@ class Commit: self.change_id = None self.rtags = collections.defaultdict(set) self.warn = [] + self.patch = '' def __str__(self): return self.subject diff --git a/tools/patman/cros_subprocess.py b/tools/patman/cros_subprocess.py index f1b2608..cd614f3 100644 --- a/tools/patman/cros_subprocess.py +++ b/tools/patman/cros_subprocess.py @@ -113,7 +113,7 @@ class Popen(subprocess.Popen): return b'' return data - def communicate_filter(self, output): + def communicate_filter(self, output, input_buf=''): """Interact with process: Read data from stdout and stderr. This method runs until end-of-file is reached, then waits for the @@ -166,7 +166,7 @@ class Popen(subprocess.Popen): # Flush stdio buffer. This might block, if the user has # been writing to .stdin in an uncontrolled fashion. self.stdin.flush() - if input: + if input_buf: write_set.append(self.stdin) else: self.stdin.close() @@ -195,10 +195,10 @@ class Popen(subprocess.Popen): # When select has indicated that the file is writable, # we can write up to PIPE_BUF bytes without risk # blocking. POSIX defines PIPE_BUF >= 512 - chunk = input[input_offset : input_offset + 512] + chunk = input_buf[input_offset : input_offset + 512] bytes_written = os.write(self.stdin.fileno(), chunk) input_offset += bytes_written - if input_offset >= len(input): + if input_offset >= len(input_buf): self.stdin.close() write_set.remove(self.stdin) @@ -240,16 +240,6 @@ class Popen(subprocess.Popen): stderr = self.convert_data(stderr) combined = self.convert_data(combined) - # Translate newlines, if requested. We cannot let the file - # object do the translation: It is based on stdio, which is - # impossible to combine with select (unless forcing no - # buffering). - if self.universal_newlines and hasattr(file, 'newlines'): - if stdout: - stdout = self._translate_newlines(stdout) - if stderr: - stderr = self._translate_newlines(stderr) - self.wait() return (stdout, stderr, combined) diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py index 59ee90c..7b92bc6 100644 --- a/tools/patman/func_test.py +++ b/tools/patman/func_test.py @@ -341,6 +341,8 @@ Changes in v2: tools.write_file(path, text, binary=False) index = self.repo.index index.add(fname) + # pylint doesn't seem to find this + # pylint: disable=E1101 author = pygit2.Signature('Test user', 'test@email.com') committer = author tree = index.write_tree() @@ -363,6 +365,8 @@ Changes in v2: self.repo = repo new_tree = repo.TreeBuilder().write() + # pylint doesn't seem to find this + # pylint: disable=E1101 author = pygit2.Signature('Test user', 'test@email.com') committer = author _ = repo.create_commit('HEAD', author, committer, 'Created master', @@ -414,6 +418,8 @@ better than before''') first_target = repo.revparse_single('HEAD') target = repo.revparse_single('HEAD~2') + # pylint doesn't seem to find this + # pylint: disable=E1101 repo.reset(target.oid, pygit2.GIT_CHECKOUT_FORCE) self.make_commit_with_file('video: Some video improvements', ''' Fix up the video so that @@ -459,6 +465,8 @@ complicated as possible''') """Test creating patches from a branch""" repo = self.make_git_tree() target = repo.lookup_reference('refs/heads/first') + # pylint doesn't seem to find this + # pylint: disable=E1101 self.repo.checkout(target, strategy=pygit2.GIT_CHECKOUT_FORCE) control.setup() try: @@ -615,6 +623,8 @@ diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c """Test CountCommitsToBranch when there is no upstream""" repo = self.make_git_tree() target = repo.lookup_reference('refs/heads/base') + # pylint doesn't seem to find this + # pylint: disable=E1101 self.repo.checkout(target, strategy=pygit2.GIT_CHECKOUT_FORCE) # Check that it can detect the current branch diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index 9b32fd4..fb6a603 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -597,7 +597,7 @@ class PatchStream: if 'prefix' in self.series: parts.append(self.series['prefix']) if 'postfix' in self.series: - parts.append(self.serties['postfix']) + parts.append(self.series['postfix']) if 'version' in self.series: parts.append("v%s" % self.series['version']) diff --git a/tools/patman/series.py b/tools/patman/series.py index 891f278..3075378 100644 --- a/tools/patman/series.py +++ b/tools/patman/series.py @@ -122,8 +122,7 @@ class Series(dict): cc_list = list(self._generated_cc[commit.patch]) for email in sorted(set(cc_list) - to_set - cc_set): if email == None: - email = col.build(col.YELLOW, "<alias '%s' not found>" - % tag) + email = col.build(col.YELLOW, '<alias not found>') if email: print(' Cc: ', email) print diff --git a/tools/patman/settings.py b/tools/patman/settings.py index 014bb37..7c2b5c1 100644 --- a/tools/patman/settings.py +++ b/tools/patman/settings.py @@ -200,12 +200,12 @@ def CreatePatmanConfigFile(gitutil, config_fname): """ name = gitutil.get_default_user_name() if name == None: - name = raw_input("Enter name: ") + name = input("Enter name: ") email = gitutil.get_default_user_email() if email == None: - email = raw_input("Enter email: ") + email = input("Enter email: ") try: f = open(config_fname, 'w') diff --git a/tools/patman/tools.py b/tools/patman/tools.py index 5e4d4ac..2ac814d 100644 --- a/tools/patman/tools.py +++ b/tools/patman/tools.py @@ -62,8 +62,8 @@ def prepare_output_dir(dirname, preserve=False): try: os.makedirs(outdir) except OSError as err: - raise CmdError("Cannot make output directory '%s': '%s'" % - (outdir, err.strerror)) + raise ValueError( + f"Cannot make output directory 'outdir': 'err.strerror'") tout.debug("Using output directory '%s'" % outdir) else: outdir = tempfile.mkdtemp(prefix='binman.') @@ -160,7 +160,7 @@ def get_input_filename_glob(pattern): A list of matching files in all input directories """ if not indir: - return glob.glob(fname) + return glob.glob(pattern) files = [] for dirname in indir: pathname = os.path.join(dirname, pattern) @@ -201,7 +201,7 @@ def path_has_file(path_spec, fname): return True return False -def get_host_compile_tool(name): +def get_host_compile_tool(env, name): """Get the host-specific version for a compile tool This checks the environment variables that specify which version of @@ -356,7 +356,7 @@ def run_result(name, *args, **kwargs): name, extra_args = get_target_compile_tool(name) args = tuple(extra_args) + args elif for_host: - name, extra_args = get_host_compile_tool(name) + name, extra_args = get_host_compile_tool(env, name) args = tuple(extra_args) + args name = os.path.expanduser(name) # Expand paths containing ~ all_args = (name,) + args |