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-rw-r--r--arch/mips/lib/Makefile2
-rw-r--r--arch/mips/lib/cache_init.S4
-rw-r--r--arch/mips/lib/udivdi3.c17
-rw-r--r--arch/riscv/cpu/cpu.c22
-rw-r--r--arch/riscv/dts/fu740-c000-u-boot.dtsi2
-rw-r--r--arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi2
-rw-r--r--arch/riscv/dts/jh7110-u-boot.dtsi4
-rw-r--r--board/starfive/visionfive2/MAINTAINERS3
-rw-r--r--cmd/riscv/sbi.c3
-rw-r--r--configs/starfive_visionfive2_defconfig2
-rw-r--r--drivers/serial/serial_sbi.c2
-rw-r--r--include/configs/starfive-visionfive2.h14
12 files changed, 49 insertions, 28 deletions
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 9ee1fcb..1621cc9 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -14,4 +14,4 @@ obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-$(CONFIG_CMD_GO) += boot.o
obj-$(CONFIG_SPL_BUILD) += spl.o
-lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o
+lib-$(CONFIG_USE_PRIVATE_LIBGCC) += ashldi3.o ashrdi3.o lshrdi3.o udivdi3.o
diff --git a/arch/mips/lib/cache_init.S b/arch/mips/lib/cache_init.S
index 602741c..d64209d 100644
--- a/arch/mips/lib/cache_init.S
+++ b/arch/mips/lib/cache_init.S
@@ -431,9 +431,9 @@ LEAF(change_k0_cca)
#else
xor a0, a0, t0
andi a0, a0, CONF_CM_CMASK
- xor a0, a0, t0
+ xor t0, a0, t0
#endif
- mtc0 a0, CP0_CONFIG
+ mtc0 t0, CP0_CONFIG
jr.hb ra
END(change_k0_cca)
diff --git a/arch/mips/lib/udivdi3.c b/arch/mips/lib/udivdi3.c
new file mode 100644
index 0000000..4d78011
--- /dev/null
+++ b/arch/mips/lib/udivdi3.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#include "libgcc.h"
+
+#if BITS_PER_LONG == 32
+
+#include <div64.h>
+
+long long __udivdi3(long long u, word_type b)
+{
+ long long ret = u;
+
+ __div64_32(&ret, b);
+ return ret;
+}
+
+#endif /* BITS_PER_LONG == 32 */
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 8445c58..ecfefa1 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -49,14 +49,24 @@ static inline bool supports_extension(char ext)
}
if (!cpu_get_desc(dev, desc, sizeof(desc))) {
/*
- * skip the first 4 characters (rv32|rv64) and
- * check until underscore
+ * skip the first 4 characters (rv32|rv64)
*/
for (i = 4; i < sizeof(desc); i++) {
- if (desc[i] == '_' || desc[i] == '\0')
- break;
- if (desc[i] == ext)
- return true;
+ switch (desc[i]) {
+ case 's':
+ case 'x':
+ case 'z':
+ case '_':
+ case '\0':
+ /*
+ * Any of these characters mean the single
+ * letter extensions have all been consumed.
+ */
+ return false;
+ default:
+ if (desc[i] == ext)
+ return true;
+ }
}
}
diff --git a/arch/riscv/dts/fu740-c000-u-boot.dtsi b/arch/riscv/dts/fu740-c000-u-boot.dtsi
index 706224b..956237c 100644
--- a/arch/riscv/dts/fu740-c000-u-boot.dtsi
+++ b/arch/riscv/dts/fu740-c000-u-boot.dtsi
@@ -77,7 +77,7 @@
0x0 0x100b2000 0x0 0x2000
0x0 0x100b8000 0x0 0x1000>;
clocks = <&prci FU740_PRCI_CLK_DDRPLL>;
- clock-frequency = <933333324>;
+ clock-frequency = <800000004>;
bootph-pre-ram;
};
};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index 5518531..3012466 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -112,6 +112,6 @@
u-boot-spl {
};
+ };
};
};
-};
diff --git a/arch/riscv/dts/jh7110-u-boot.dtsi b/arch/riscv/dts/jh7110-u-boot.dtsi
index 2f560e7..c09d5c9 100644
--- a/arch/riscv/dts/jh7110-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-u-boot.dtsi
@@ -93,6 +93,10 @@
bootph-pre-ram;
};
+&pllclk {
+ bootph-pre-ram;
+};
+
&S7_0 {
status = "okay";
};
diff --git a/board/starfive/visionfive2/MAINTAINERS b/board/starfive/visionfive2/MAINTAINERS
index 600ff95..d7f638f 100644
--- a/board/starfive/visionfive2/MAINTAINERS
+++ b/board/starfive/visionfive2/MAINTAINERS
@@ -1,7 +1,8 @@
STARFIVE JH7110 VISIONFIVE2 BOARD
-M: Yanhong Wang <yanhong.wang@starfivetech.com>
+M: Minda Chen <minda.chen@starfivetech.com>
S: Maintained
F: arch/riscv/include/asm/arch-jh7110/
F: board/starfive/visionfive2/
F: include/configs/starfive-visionfive2.h
F: configs/starfive_visionfive2_defconfig
+F: drivers/pci/pcie_starfive_jh7110.c
diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c
index 9daf0e2..bd9d9c4 100644
--- a/cmd/riscv/sbi.c
+++ b/cmd/riscv/sbi.c
@@ -81,6 +81,7 @@ static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc,
break;
switch (impl_id) {
case 1: /* OpenSBI */
+ case 8: /* PolarFire Hart Software Services */
printf("%ld.%ld",
vers >> 16, vers & 0xffff);
break;
@@ -99,7 +100,7 @@ static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc,
}
}
if (i == ARRAY_SIZE(implementations))
- printf("Unknown implementation ID %ld", ret);
+ printf("\nUnknown implementation ID 0x%x", impl_id);
}
printf("\nMachine:\n");
ret = sbi_get_mvendorid(&mvendorid);
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index c68f3c2..7a3f1d4 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -30,8 +30,8 @@ CONFIG_RISCV_SMODE=y
# CONFIG_OF_BOARD_FIXUP is not set
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
+CONFIG_BOOTSTD_DEFAULTS=y
CONFIG_SYS_BOOTM_LEN=0x4000000
-CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE=y
CONFIG_QSPI_BOOT=y
CONFIG_SD_BOOT=y
diff --git a/drivers/serial/serial_sbi.c b/drivers/serial/serial_sbi.c
index a51a96c..f3ecfcc 100644
--- a/drivers/serial/serial_sbi.c
+++ b/drivers/serial/serial_sbi.c
@@ -17,7 +17,7 @@ static inline void _debug_uart_putc(int c)
#else
-static int sbi_dbcn_available;
+static int sbi_dbcn_available __section(".data");
static inline void _debug_uart_init(void)
{
diff --git a/include/configs/starfive-visionfive2.h b/include/configs/starfive-visionfive2.h
index 29c7447..049b0a0 100644
--- a/include/configs/starfive-visionfive2.h
+++ b/include/configs/starfive-visionfive2.h
@@ -15,17 +15,6 @@
#define __io
-/* Environment options */
-
-#define BOOT_TARGET_DEVICES(func) \
- func(NVME, nvme, 0) \
- func(USB, usb, 0) \
- func(MMC, mmc, 0) \
- func(MMC, mmc, 1) \
- func(DHCP, dhcp, na)
-
-#include <config_distro_bootcmd.h>
-
#define TYPE_GUID_SPL "2E54B353-1271-4842-806F-E436D6AF6985"
#define TYPE_GUID_UBOOT "BC13C2FF-59E6-4262-A352-B275FD6F7172"
#define TYPE_GUID_SYSTEM "EBD0A0A2-B9E5-4433-87C0-68B6B72699C7"
@@ -48,7 +37,6 @@
"type_guid_gpt_loader2=" TYPE_GUID_UBOOT "\0" \
"type_guid_gpt_system=" TYPE_GUID_SYSTEM "\0" \
"partitions=" PARTS_DEFAULT "\0" \
- "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
- BOOTENV
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
#endif /* _STARFIVE_VISIONFIVE2_H */