diff options
22 files changed, 271 insertions, 38 deletions
diff --git a/arch/arm/dts/axp22x.dtsi b/arch/arm/dts/axp22x.dtsi index a020c12..f79650a 100644 --- a/arch/arm/dts/axp22x.dtsi +++ b/arch/arm/dts/axp22x.dtsi @@ -67,6 +67,12 @@ status = "disabled"; }; + axp_gpio: gpio { + compatible = "x-powers,axp221-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + regulators { /* Default work frequency for buck regulators */ x-powers,dcdc-freq = <3000>; diff --git a/arch/arm/dts/axp809.dtsi b/arch/arm/dts/axp809.dtsi index ab8e5f2..d134d4c 100644 --- a/arch/arm/dts/axp809.dtsi +++ b/arch/arm/dts/axp809.dtsi @@ -50,4 +50,11 @@ compatible = "x-powers,axp809"; interrupt-controller; #interrupt-cells = <1>; + + axp_gpio: gpio { + compatible = "x-powers,axp809-gpio", + "x-powers,axp221-gpio"; + gpio-controller; + #gpio-cells = <2>; + }; }; diff --git a/arch/arm/dts/axp81x.dtsi b/arch/arm/dts/axp81x.dtsi index b93387b..ebaf1c3 100644 --- a/arch/arm/dts/axp81x.dtsi +++ b/arch/arm/dts/axp81x.dtsi @@ -62,16 +62,6 @@ compatible = "x-powers,axp813-gpio"; gpio-controller; #gpio-cells = <2>; - - gpio0_ldo: gpio0-ldo-pin { - pins = "GPIO0"; - function = "ldo"; - }; - - gpio1_ldo: gpio1-ldo-pin { - pins = "GPIO1"; - function = "ldo"; - }; }; battery_power_supply: battery-power { @@ -144,15 +134,11 @@ }; reg_ldo_io0: ldo-io0 { - pinctrl-names = "default"; - pinctrl-0 = <&gpio0_ldo>; /* Disable by default to avoid conflicts with GPIO */ status = "disabled"; }; reg_ldo_io1: ldo-io1 { - pinctrl-names = "default"; - pinctrl-0 = <&gpio1_ldo>; /* Disable by default to avoid conflicts with GPIO */ status = "disabled"; }; diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index b04f492..135762b 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -1197,6 +1197,7 @@ compatible = "allwinner,sun50i-a64-mipi-dphy", "allwinner,sun6i-a31-mipi-dphy"; reg = <0x01ca1000 0x1000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_MIPI_DSI>, <&ccu CLK_DSI_DPHY>; clock-names = "bus", "mod"; diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts index b5c1ff1..ce3ae19 100644 --- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts @@ -3,6 +3,7 @@ /dts-v1/; #include "sun50i-h5.dtsi" +#include "sun50i-h5-cpu-opp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> diff --git a/arch/arm/dts/sun5i-gr8-chip-pro.dts b/arch/arm/dts/sun5i-gr8-chip-pro.dts index a32cde3..5c3562b 100644 --- a/arch/arm/dts/sun5i-gr8-chip-pro.dts +++ b/arch/arm/dts/sun5i-gr8-chip-pro.dts @@ -70,7 +70,7 @@ leds { compatible = "gpio-leds"; - status { + led-0 { label = "chip-pro:white:status"; gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>; default-state = "on"; diff --git a/arch/arm/dts/sun5i-r8-chip.dts b/arch/arm/dts/sun5i-r8-chip.dts index 4bf4943..fd37bd1 100644 --- a/arch/arm/dts/sun5i-r8-chip.dts +++ b/arch/arm/dts/sun5i-r8-chip.dts @@ -70,7 +70,7 @@ leds { compatible = "gpio-leds"; - status { + led-0 { label = "chip:white:status"; gpios = <&axp_gpio 2 GPIO_ACTIVE_HIGH>; default-state = "on"; diff --git a/arch/arm/dts/sun6i-a31.dtsi b/arch/arm/dts/sun6i-a31.dtsi index f6701ec..b32d2ab 100644 --- a/arch/arm/dts/sun6i-a31.dtsi +++ b/arch/arm/dts/sun6i-a31.dtsi @@ -820,7 +820,7 @@ clocks = <&ccu CLK_APB2_UART0>; resets = <&ccu RST_APB2_UART0>; dmas = <&dma 6>, <&dma 6>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -833,7 +833,7 @@ clocks = <&ccu CLK_APB2_UART1>; resets = <&ccu RST_APB2_UART1>; dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -846,7 +846,7 @@ clocks = <&ccu CLK_APB2_UART2>; resets = <&ccu RST_APB2_UART2>; dmas = <&dma 8>, <&dma 8>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -859,7 +859,7 @@ clocks = <&ccu CLK_APB2_UART3>; resets = <&ccu RST_APB2_UART3>; dmas = <&dma 9>, <&dma 9>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -872,7 +872,7 @@ clocks = <&ccu CLK_APB2_UART4>; resets = <&ccu RST_APB2_UART4>; dmas = <&dma 10>, <&dma 10>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -885,7 +885,7 @@ clocks = <&ccu CLK_APB2_UART5>; resets = <&ccu RST_APB2_UART5>; dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; diff --git a/arch/arm/dts/sun6i-a31s-sina31s.dts b/arch/arm/dts/sun6i-a31s-sina31s.dts index 0af48e1..5695635 100644 --- a/arch/arm/dts/sun6i-a31s-sina31s.dts +++ b/arch/arm/dts/sun6i-a31s-sina31s.dts @@ -67,7 +67,7 @@ leds { compatible = "gpio-leds"; - status { + led-0 { label = "sina31s:status:usr"; gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */ }; diff --git a/arch/arm/dts/sun8i-a23-a33.dtsi b/arch/arm/dts/sun8i-a23-a33.dtsi index 06809c3..84c6d93 100644 --- a/arch/arm/dts/sun8i-a23-a33.dtsi +++ b/arch/arm/dts/sun8i-a23-a33.dtsi @@ -488,7 +488,7 @@ clocks = <&ccu CLK_BUS_UART0>; resets = <&ccu RST_BUS_UART0>; dmas = <&dma 6>, <&dma 6>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -501,7 +501,7 @@ clocks = <&ccu CLK_BUS_UART1>; resets = <&ccu RST_BUS_UART1>; dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -514,7 +514,7 @@ clocks = <&ccu CLK_BUS_UART2>; resets = <&ccu RST_BUS_UART2>; dmas = <&dma 8>, <&dma 8>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -527,7 +527,7 @@ clocks = <&ccu CLK_BUS_UART3>; resets = <&ccu RST_BUS_UART3>; dmas = <&dma 9>, <&dma 9>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -540,7 +540,7 @@ clocks = <&ccu CLK_BUS_UART4>; resets = <&ccu RST_BUS_UART4>; dmas = <&dma 10>, <&dma 10>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; diff --git a/arch/arm/dts/sun8i-a33.dtsi b/arch/arm/dts/sun8i-a33.dtsi index b3d1bdf..30fdd27 100644 --- a/arch/arm/dts/sun8i-a33.dtsi +++ b/arch/arm/dts/sun8i-a33.dtsi @@ -278,6 +278,7 @@ dphy: d-phy@1ca1000 { compatible = "allwinner,sun6i-a31-mipi-dphy"; reg = <0x01ca1000 0x1000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; clocks = <&ccu CLK_BUS_MIPI_DSI>, <&ccu CLK_DSI_DPHY>; clock-names = "bus", "mod"; diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts index b60016a..197cf69 100644 --- a/arch/arm/dts/sun8i-a83t-bananapi-m3.dts +++ b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts @@ -105,6 +105,21 @@ /* enables internal regulator and de-asserts reset */ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 WL-PMU-EN */ }; + + /* + * Power supply for the SATA disk, behind a USB-SATA bridge. + * Since it is a USB device, there is no consumer in the DT, so we + * have to keep this always on. + */ + regulator-sata-disk-pwr { + compatible = "regulator-fixed"; + regulator-name = "sata-disk-pwr"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + enable-active-high; + gpio = <&pio 3 25 GPIO_ACTIVE_HIGH>; /* PD25 */ + }; }; &cpu0 { diff --git a/arch/arm/dts/sun8i-h3-beelink-x2.dts b/arch/arm/dts/sun8i-h3-beelink-x2.dts index 27a0d51..a6d38ec 100644 --- a/arch/arm/dts/sun8i-h3-beelink-x2.dts +++ b/arch/arm/dts/sun8i-h3-beelink-x2.dts @@ -57,7 +57,7 @@ ethernet1 = &sdiowifi; }; - cec-gpio { + cec { compatible = "cec-gpio"; cec-gpios = <&pio 0 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PA14 */ hdmi-phandle = <&hdmi>; diff --git a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts index 43641cb..343b02b 100644 --- a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts @@ -57,7 +57,7 @@ regulator-ramp-delay = <50>; /* 4ms */ enable-active-high; - enable-gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ + enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ gpios-states = <0x1>; states = <1100000 0>, <1300000 1>; diff --git a/arch/arm/dts/sun8i-v3s.dtsi b/arch/arm/dts/sun8i-v3s.dtsi index db194c6..b001251 100644 --- a/arch/arm/dts/sun8i-v3s.dtsi +++ b/arch/arm/dts/sun8i-v3s.dtsi @@ -479,7 +479,7 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART0>; dmas = <&dma 6>, <&dma 6>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART0>; status = "disabled"; }; @@ -492,7 +492,7 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART1>; dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART1>; status = "disabled"; }; @@ -505,7 +505,7 @@ reg-io-width = <4>; clocks = <&ccu CLK_BUS_UART2>; dmas = <&dma 8>, <&dma 8>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; resets = <&ccu RST_BUS_UART2>; pinctrl-0 = <&uart2_pins>; pinctrl-names = "default"; diff --git a/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts index 04e59b8..4389672 100644 --- a/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts +++ b/arch/arm/dts/suniv-f1c100s-licheepi-nano.dts @@ -6,6 +6,8 @@ /dts-v1/; #include "suniv-f1c100s.dtsi" +#include <dt-bindings/gpio/gpio.h> + / { model = "Lichee Pi Nano"; compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s"; @@ -50,8 +52,22 @@ }; }; +&otg_sram { + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pe_pins>; status = "okay"; }; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */ + status = "okay"; +}; diff --git a/arch/arm/dts/suniv-f1c100s.dtsi b/arch/arm/dts/suniv-f1c100s.dtsi index 9455d27..3c61d59 100644 --- a/arch/arm/dts/suniv-f1c100s.dtsi +++ b/arch/arm/dts/suniv-f1c100s.dtsi @@ -133,6 +133,32 @@ #size-cells = <0>; }; + usb_otg: usb@1c13000 { + compatible = "allwinner,suniv-f1c100s-musb"; + reg = <0x01c13000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = <26>; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + allwinner,sram = <&otg_sram 1>; + status = "disabled"; + }; + + usbphy: phy@1c13400 { + compatible = "allwinner,suniv-f1c100s-usb-phy"; + reg = <0x01c13400 0x10>; + reg-names = "phy_ctrl"; + clocks = <&ccu CLK_USB_PHY0>; + clock-names = "usb0_phy"; + resets = <&ccu RST_USB_PHY0>; + reset-names = "usb0_reset"; + #phy-cells = <1>; + status = "disabled"; + }; + ccu: clock@1c20000 { compatible = "allwinner,suniv-f1c100s-ccu"; reg = <0x01c20000 0x400>; @@ -181,6 +207,12 @@ pins = "PE0", "PE1"; function = "uart0"; }; + + /omit-if-no-ref/ + uart1_pa_pins: uart1-pa-pins { + pins = "PA2", "PA3"; + function = "uart1"; + }; }; i2c0: i2c@1c27000 { diff --git a/arch/arm/dts/suniv-f1c200s-lctech-pi.dts b/arch/arm/dts/suniv-f1c200s-lctech-pi.dts new file mode 100644 index 0000000..2d2a3f0 --- /dev/null +++ b/arch/arm/dts/suniv-f1c200s-lctech-pi.dts @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Arm Ltd, + * based on work: + * Copyright 2022 Icenowy Zheng <uwu@icenowy.me> + */ + +/dts-v1/; +#include "suniv-f1c100s.dtsi" + +#include <dt-bindings/gpio/gpio.h> + +/ { + model = "Lctech Pi F1C200s"; + compatible = "lctech,pi-f1c200s", "allwinner,suniv-f1c200s", + "allwinner,suniv-f1c100s"; + + aliases { + serial0 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_vcc3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + broken-cd; + bus-width = <4>; + disable-wp; + vmmc-supply = <®_vcc3v3>; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pc_pins>; + status = "okay"; + + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pa_pins>; + status = "okay"; +}; + +/* + * This is a Type-C socket, but CC1/2 are not connected, and VBUS is connected + * to Vin, which supplies the board. Host mode works (if the board is powered + * otherwise), but peripheral is probably the intention. + */ +&usb_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/suniv-f1c200s-popstick-v1.1.dts b/arch/arm/dts/suniv-f1c200s-popstick-v1.1.dts new file mode 100644 index 0000000..184c245 --- /dev/null +++ b/arch/arm/dts/suniv-f1c200s-popstick-v1.1.dts @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2022 Icenowy Zheng <uwu@icenowy.me> + */ + +/dts-v1/; +#include "suniv-f1c100s.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> + +/ { + model = "Popcorn Computer PopStick v1.1"; + compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick", + "allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led { + function = LED_FUNCTION_STATUS; + color = <LED_COLOR_ID_GREEN>; + gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */ + linux,default-trigger = "heartbeat"; + }; + }; + + reg_vcc3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; +}; + +&mmc0 { + cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */ + bus-width = <4>; + disable-wp; + vmmc-supply = <®_vcc3v3>; + status = "okay"; +}; + +&otg_sram { + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pc_pins>; + status = "okay"; + + flash@0 { + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <40000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pe_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/arch/arm/dts/sunxi-h3-h5.dtsi b/arch/arm/dts/sunxi-h3-h5.dtsi index fc1af9b..bdc796f 100644 --- a/arch/arm/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/dts/sunxi-h3-h5.dtsi @@ -709,7 +709,7 @@ clocks = <&ccu CLK_BUS_UART0>; resets = <&ccu RST_BUS_UART0>; dmas = <&dma 6>, <&dma 6>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -722,7 +722,7 @@ clocks = <&ccu CLK_BUS_UART1>; resets = <&ccu RST_BUS_UART1>; dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -735,7 +735,7 @@ clocks = <&ccu CLK_BUS_UART2>; resets = <&ccu RST_BUS_UART2>; dmas = <&dma 8>, <&dma 8>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -748,7 +748,7 @@ clocks = <&ccu CLK_BUS_UART3>; resets = <&ccu RST_BUS_UART3>; dmas = <&dma 9>, <&dma 9>; - dma-names = "rx", "tx"; + dma-names = "tx", "rx"; status = "disabled"; }; diff --git a/arch/arm/include/asm/arch-sunxi/pmic_bus.h b/arch/arm/include/asm/arch-sunxi/pmic_bus.h index 3ccfe13..5ab9b28 100644 --- a/arch/arm/include/asm/arch-sunxi/pmic_bus.h +++ b/arch/arm/include/asm/arch-sunxi/pmic_bus.h @@ -6,7 +6,7 @@ */ #ifndef _SUNXI_PMIC_BUS_H -#define _SUNXI_PMIS_BUS_H +#define _SUNXI_PMIC_BUS_H int pmic_bus_init(void); int pmic_bus_read(u8 reg, u8 *data); diff --git a/configs/lctech_pi_f1c200s_defconfig b/configs/lctech_pi_f1c200s_defconfig new file mode 100644 index 0000000..310719c --- /dev/null +++ b/configs/lctech_pi_f1c200s_defconfig @@ -0,0 +1,11 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="suniv-f1c200s-lctech-pi" +CONFIG_SPL=y +CONFIG_MACH_SUNIV=y +CONFIG_DRAM_CLK=156 +CONFIG_DRAM_ZQ=0 +CONFIG_SUNXI_MINIMUM_DRAM_MB=64 +# CONFIG_VIDEO_SUNXI is not set +CONFIG_CONS_INDEX=2 +CONFIG_SPI=y |