diff options
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/rk3368-lion-u-boot.dtsi | 88 | ||||
| -rw-r--r-- | arch/arm/dts/rk3368-lion.dts | 195 | ||||
| -rw-r--r-- | arch/arm/dts/rk3368.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/rk3368/Kconfig | 21 | ||||
| -rw-r--r-- | board/theobroma-systems/lion_rk3368/Kconfig | 15 | ||||
| -rw-r--r-- | board/theobroma-systems/lion_rk3368/MAINTAINERS | 10 | ||||
| -rw-r--r-- | board/theobroma-systems/lion_rk3368/Makefile | 7 | ||||
| -rw-r--r-- | board/theobroma-systems/lion_rk3368/README | 60 | ||||
| -rw-r--r-- | board/theobroma-systems/lion_rk3368/fit_spl_atf.its | 51 | ||||
| -rw-r--r-- | board/theobroma-systems/lion_rk3368/lion_rk3368.c | 25 | ||||
| -rw-r--r-- | configs/lion-rk3368_defconfig | 92 | ||||
| -rw-r--r-- | include/configs/lion_rk3368.h | 18 |
13 files changed, 583 insertions, 4 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c2dc240..2cbdb17 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-veyron-mickey.dtb \ rk3288-veyron-minnie.dtb \ rk3328-evb.dtb \ + rk3368-lion.dtb \ rk3368-sheep.dtb \ rk3368-geekbox.dtb \ rk3368-px5-evb.dtb \ diff --git a/arch/arm/dts/rk3368-lion-u-boot.dtsi b/arch/arm/dts/rk3368-lion-u-boot.dtsi new file mode 100644 index 0000000..2053fb1 --- /dev/null +++ b/arch/arm/dts/rk3368-lion-u-boot.dtsi @@ -0,0 +1,88 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/ { + config { + u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */ + u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */ + }; + + chosen { + stdout-path = "serial0:115200n8"; + u-boot,spl-boot-order = &emmc, &sdmmc; + }; + +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&service_msch { + u-boot,dm-pre-reloc; +}; + +&dmc { + u-boot,dm-pre-reloc; + + /* + * Validation of throughput using SPEC2000 shows the following + * relative performance for the different memory schedules: + * - CBDR: 30.1 + * - CBRD: 29.8 + * - CRBD: 29.9 + * Note that the best performance for any given application workload + * may vary from the default configured here (e.g. 164.gzip is fastest + * with CBRD, whereas 252.eon and 186.crafty are fastest with CRBD). + * + * See doc/device-tree-bindings/clock/rockchip,rk3368-dmc.txt for + * details on the 'rockchip,memory-schedule' property and how it + * affects the physical-address to device-address mapping. + */ + rockchip,memory-schedule = <DMC_MSCH_CBDR>; + rockchip,ddr-frequency = <800000000>; + rockchip,ddr-speed-bin = <DDR3_1600K>; + + status = "okay"; +}; + +&pmugrf { + u-boot,dm-pre-reloc; +}; + +&sgrf { + u-boot,dm-pre-reloc; +}; + +&cru { + u-boot,dm-pre-reloc; +}; + +&grf { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&emmc { + u-boot,dm-pre-reloc; +}; + +&sdmmc { + u-boot,dm-pre-reloc; +}; + +&spi1 { + u-boot,dm-pre-reloc; + + spiflash: w25q32dw@0 { + u-boot,dm-pre-reloc; + }; +}; + + diff --git a/arch/arm/dts/rk3368-lion.dts b/arch/arm/dts/rk3368-lion.dts new file mode 100644 index 0000000..850db50 --- /dev/null +++ b/arch/arm/dts/rk3368-lion.dts @@ -0,0 +1,195 @@ +/* + * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +#include "rk3368.dtsi" +#include "rk3368-lion-u-boot.dtsi" +#include <dt-bindings/input/input.h> + +/ { + model = "Theobroma Systems RK3368-uQ7 SoM"; + compatible = "tsd,rk3368-uq7", "tsd,lion", "rockchip,rk3368"; + + aliases { + mmc0 = &emmc; + mmc1 = &sdmmc; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + ext_gmac: gmac-clk { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + #clock-cells = <0>; + }; + + vcc_sys: vcc-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&uart0 { + status = "okay"; +}; + +&emmc { + status = "okay"; + bus-width = <8>; + cap-mmc-highspeed; + clock-frequency = <150000000>; + disable-wp; + keep-power-in-suspend; + non-removable; + num-slots = <1>; + vmmc-supply = <&vcc33_io>; + vqmmc-supply = <&vcc18_io>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; +}; + +&sdmmc { + status = "okay"; +}; + +&gmac { + status = "okay"; + phy-supply = <&vcc33_io>; + phy-mode = "rgmii"; + clock_in_out = "input"; + snps,reset-gpio = <&gpio3 11 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <2 10000 50000>; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x10>; + rx_delay = <0x10>; +}; + +&i2c0 { + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio0>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + rockchip,system-power-controller; + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_sys>; + clock-output-names = "xin32k", "rk808-clkout2"; + #clock-cells = <1>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd_cpu"; + }; + + vdd_log: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd_log"; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + }; + + vcc33_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_io"; + }; + + vcc33_video: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_video"; + }; + + vdd10_pll: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_pll"; + }; + + vcc18_io: LDO_REG4 { + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_io"; + }; + + vdd10_video: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_video"; + }; + + vcc18_video: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_video"; + }; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&spi1 { + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + spiflash: w25q32dw@0 { + compatible = "spi-flash"; + reg = <0>; + spi-max-frequency = <49500000>; + spi-cpol; + spi-cpha; + }; +}; diff --git a/arch/arm/dts/rk3368.dtsi b/arch/arm/dts/rk3368.dtsi index 0dad34d..22fb7e7 100644 --- a/arch/arm/dts/rk3368.dtsi +++ b/arch/arm/dts/rk3368.dtsi @@ -238,7 +238,6 @@ }; service_msch: syscon@ffac0000 { - u-boot,dm-pre-reloc; compatible = "rockchip,rk3368-msch", "syscon"; reg = <0x0 0xffac0000 0x0 0x2000>; status = "okay"; @@ -658,7 +657,6 @@ }; pmugrf: syscon@ff738000 { - u-boot,dm-pre-reloc; compatible = "rockchip,rk3368-pmugrf", "syscon"; reg = <0x0 0xff738000 0x0 0x1000>; }; @@ -669,7 +667,6 @@ }; cru: clock-controller@ff760000 { - u-boot,dm-pre-reloc; compatible = "rockchip,rk3368-cru"; reg = <0x0 0xff760000 0x0 0x1000>; rockchip,grf = <&grf>; @@ -678,7 +675,6 @@ }; grf: syscon@ff770000 { - u-boot,dm-pre-reloc; compatible = "rockchip,rk3368-grf", "syscon"; reg = <0x0 0xff770000 0x0 0x1000>; }; diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index 6d32068..f8189f1 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -3,6 +3,26 @@ if ROCKCHIP_RK3368 choice prompt "RK3368 board" +config TARGET_LION_RK3368 + bool "Theobroma Systems RK3368-uQ7 (Lion) module" + help + The RK3368-uQ7 is a micro-Qseven form-factor (40mm x 70mm, + MXM-230 connector) system-on-module designed by Theobroma + Systems for industrial applications. + + It provides the following features: + - 8x Cortex-A53 (in 2 clusters of 4 cores each) + - (on-module) up to 4GB of DDR3 memory + - (on-module) SPI-NOR flash + - (on-module) eMMC + - Gigabit Ethernet (with an on-module KSZ9031 PHY) + - USB + - HDMI + - MIPI-DSI/single-channel LVDS (muxed on the 'LVDS-A' pin-group) + - various 'slow' interfaces (e.g. UART, SPI, I2C, I2S, ...) + - on-module STM32 providing CAN, RTC and fan-control + - (optional on-module) EAL4+-certified security module + config TARGET_SHEEP bool "Sheep board" help @@ -25,6 +45,7 @@ endchoice config SYS_SOC default "rockchip" +source "board/theobroma-systems/lion_rk3368/Kconfig" source "board/rockchip/sheep_rk3368/Kconfig" source "board/geekbuying/geekbox/Kconfig" source "board/rockchip/evb_px5/Kconfig" diff --git a/board/theobroma-systems/lion_rk3368/Kconfig b/board/theobroma-systems/lion_rk3368/Kconfig new file mode 100644 index 0000000..d7aa487 --- /dev/null +++ b/board/theobroma-systems/lion_rk3368/Kconfig @@ -0,0 +1,15 @@ +if TARGET_LION_RK3368 + +config SYS_BOARD + default "lion_rk3368" + +config SYS_VENDOR + default "theobroma-systems" + +config SYS_CONFIG_NAME + default "lion_rk3368" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/theobroma-systems/lion_rk3368/MAINTAINERS b/board/theobroma-systems/lion_rk3368/MAINTAINERS new file mode 100644 index 0000000..857f784d --- /dev/null +++ b/board/theobroma-systems/lion_rk3368/MAINTAINERS @@ -0,0 +1,10 @@ +LION-RK3368 (RK3368-uQ7 system-on-module) +M: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> +M: Klaus Goger <klaus.goger@theobroma-systems.com> +S: Maintained +F: board/theobroma-systems/lion_rk3368 +F: include/configs/lion_rk3368.h +F: arch/arm/dts/rk3368-lion.dts +F: configs/lion-rk3368_defconfig +W: https://www.theobroma-systems.com/rk3368-uq7/tech-specs +T: git git://git.theobroma-systems.com/lion-u-boot.git diff --git a/board/theobroma-systems/lion_rk3368/Makefile b/board/theobroma-systems/lion_rk3368/Makefile new file mode 100644 index 0000000..f13a20b --- /dev/null +++ b/board/theobroma-systems/lion_rk3368/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += lion_rk3368.o diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README new file mode 100644 index 0000000..47304fc --- /dev/null +++ b/board/theobroma-systems/lion_rk3368/README @@ -0,0 +1,60 @@ +Here is the step-by-step to boot to U-Boot on RK3368-uQ7 + +Get the Source and build ATF +============================ + + > git clone git://git.theobroma-systems.com/arm-trusted-firmware.git + > cd arm-trusted-firmware + > make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3368 bl31 + > cp build/rk3368/release/bl31.bin ../u-boot/bl31-rk3368.bin + +Configure U-Boot +================ + + > cd ../u-boot + > make lion-rk3368_defconfig + +Build the TPL/SPL stage +======================= + + > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm + > tools/mkimage -n rk3368 -T rksd -d tpl/u-boot-tpl.bin spl-3368.img + > cat spl/u-boot-spl-dtb.bin >> spl-3368.img + +Build the full U-Boot and a FIT image including the ATF +======================================================= + + > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb + +Write to a SD-card +================== + + > dd if=spl-3368.img of=/dev/sdb seek=64 + > dd if=u-boot.itb of=/dev/sdb seek=512 + + +If everything went according to plan, you should see the following +output on UART0: + +<debug_uart> U-Boot TPL board init +Trying to boot from BOOTROM +Returning to boot ROM... +Trying to boot from MMC1 +NOTICE: BL31: v1.3(release):v1.2-1320-gbf43a443 +NOTICE: BL31: Built : 18:04:47, Jul 5 2017 + + +U-Boot 2017.07-00158-g2395e99858 (Jul 18 2017 - 21:03:31 +0200) + +Model: Theobroma Systems RK3368-uQ7 SoM +DRAM: 2 GiB +MMC: dwmmc@ff0c0000: 1, dwmmc@ff0f0000: 0 +Using default environment + +In: serial@ff180000 +Out: serial@ff180000 +Err: serial@ff180000 +Net: +Warning: ethernet@ff290000 (eth0) using random MAC address - d2:69:35:7e:d0:1e +eth0: ethernet@ff290000 +Hit any key to stop autoboot: 2 diff --git a/board/theobroma-systems/lion_rk3368/fit_spl_atf.its b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its new file mode 100644 index 0000000..e7d98b9 --- /dev/null +++ b/board/theobroma-systems/lion_rk3368/fit_spl_atf.its @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH + * + * Minimal dts for a SPL FIT image payload. + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; + +/ { + description = "FIT image with U-Boot proper, ATF bl31, DTB"; + #address-cells = <1>; + + images { + uboot { + description = "U-Boot (64-bit)"; + data = /incbin/("../../../u-boot-nodtb.bin"); + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <0x00200000>; + }; + atf { + description = "ARM Trusted Firmware"; + data = /incbin/("../../../bl31-rk3368.bin"); + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x00010000>; + entry = <0x00010000>; + }; + + fdt { + description = "RK3368-uQ7 (Lion) flat device-tree"; + data = /incbin/("../../../u-boot.dtb"); + type = "flat_dt"; + compression = "none"; + }; + }; + + configurations { + default = "conf"; + conf { + description = "Theobroma Systems RK3368-uQ7 (Puma) SoM"; + firmware = "uboot"; + loadables = "atf"; + fdt = "fdt"; + }; + }; +}; diff --git a/board/theobroma-systems/lion_rk3368/lion_rk3368.c b/board/theobroma-systems/lion_rk3368/lion_rk3368.c new file mode 100644 index 0000000..73b1488 --- /dev/null +++ b/board/theobroma-systems/lion_rk3368/lion_rk3368.c @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <dm.h> +#include <ram.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/grf_rk3368.h> +#include <asm/arch/timer.h> +#include <syscon.h> + +DECLARE_GLOBAL_DATA_PTR; + +int mach_cpu_init(void) +{ + return 0; +} + +int board_init(void) +{ + return 0; +} diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig new file mode 100644 index 0000000..92058b3 --- /dev/null +++ b/configs/lion-rk3368_defconfig @@ -0,0 +1,92 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3368=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion" +CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its" +CONFIG_ENV_IS_IN_MMC=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_SPL=y +CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds" +CONFIG_SPL_BOOTROM_SUPPORT=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 +CONFIG_SPL_ATF_SUPPORT=y +CONFIG_SPL_ATF_TEXT_BASE=0x10000 +CONFIG_TPL=y +CONFIG_TPL_BOOTROM_SUPPORT=y +CONFIG_TPL_DRIVERS_MISC_SUPPORT=y +CONFIG_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_MTDPARTS=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent" +CONFIG_TPL_OF_PLATDATA=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_TPL_DM=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_TPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ9031=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_RGMII=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_PINCTRL_ROCKCHIP_RK3368=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DEBUG_UART_BASE=0xFF180000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_ROCKCHIP_SPI=y +CONFIG_SYSRESET=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_LZO=y +CONFIG_ERRNO_STR=y +CONFIG_SMBIOS_MANUFACTURER="rockchip" diff --git a/include/configs/lion_rk3368.h b/include/configs/lion_rk3368.h new file mode 100644 index 0000000..4118ffd --- /dev/null +++ b/include/configs/lion_rk3368.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIGS_LION_RK3368_H +#define __CONFIGS_LION_RK3368_H + +#include <configs/rk3368_common.h> + +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define KERNEL_LOAD_ADDR 0x280000 +#define DTB_LOAD_ADDR 0x5600000 +#define INITRD_LOAD_ADDR 0x5bf0000 +#define CONFIG_ENV_SIZE 0x2000 + +#endif |