diff options
56 files changed, 73 insertions, 73 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index c038a6d..8cc82f8 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1208,8 +1208,8 @@ config FSL_LAW help Use Freescale common code for Local Access Window -config SECURE_BOOT - bool "Secure Boot" +config NXP_ESBC + bool "NXP_ESBC" help Enable Freescale Secure Boot feature. Normally selected by defconfig. If unsure, do not change. diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index cac9280..c2b2ef2 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -38,7 +38,7 @@ #ifdef CONFIG_FSL_CAAM #include <fsl_sec.h> #endif -#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET) +#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_CORENET) #include <asm/fsl_pamu.h> #include <fsl_secboot_err.h> #endif @@ -440,7 +440,7 @@ ulong cpu_init_f(void) #ifdef CONFIG_SYS_DCSRBAR_PHYS ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif -#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SYS_RAMBOOT) struct law_entry law; #endif #ifdef CONFIG_ARCH_MPC8548 @@ -460,7 +460,7 @@ ulong cpu_init_f(void) disable_tlb(14); disable_tlb(15); -#if defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SYS_RAMBOOT) /* Disable the LAW created for NOR flash by the PBI commands */ law = find_law(CONFIG_SYS_PBI_FLASH_BASE); if (law.index != -1) @@ -963,7 +963,7 @@ int cpu_init_r(void) fman_enet_init(); #endif -#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_FSL_CORENET) +#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_CORENET) if (pamu_init() < 0) fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT); #endif diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index dbc7053..38e907f 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -33,7 +33,7 @@ #endif #if !defined(CONFIG_SPL) && !defined(CONFIG_SYS_RAMBOOT) && \ - !defined(CONFIG_SECURE_BOOT) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) + !defined(CONFIG_NXP_ESBC) && !defined(CONFIG_SRIO_PCIE_BOOT_SLAVE) #define NOR_BOOT #endif @@ -123,7 +123,7 @@ _start_e500: #endif -#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500MC) && \ +#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500MC) && \ !defined(CONFIG_E6500) /* ISBC uses L2 as stack. * Disable L2 cache here so that u-boot can enable it later @@ -467,7 +467,7 @@ nexti: mflr r1 /* R1 = our PC */ blt 1b #if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB) && !defined(MINIMAL_SPL) && \ - !defined(CONFIG_SECURE_BOOT) + !defined(CONFIG_NXP_ESBC) /* * TLB entry for debuggging in AS1 * Create temporary TLB entry in AS0 to handle debug exception @@ -1065,7 +1065,7 @@ create_init_ram_area: 0xffc00000, MAS3_SX|MAS3_SW|MAS3_SR, \ 0, r6 -#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT) +#elif !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC) /* create a temp mapping in AS = 1 for Flash mapping * created by PBL for ISBC code */ @@ -1080,7 +1080,7 @@ create_init_ram_area: * and for targets with CONFIG_SPL like T1, T2, T4, only for * u-boot-spl i.e. CONFIG_SPL_BUILD */ -#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_SECURE_BOOT) && \ +#elif defined(CONFIG_RAMBOOT_PBL) && defined(CONFIG_NXP_ESBC) && \ (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) /* create a temp mapping in AS = 1 for mapping CONFIG_SYS_MONITOR_BASE * to L3 Address configured by PBL for ISBC code diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 30f35e2..ca9e6aa 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -259,7 +259,7 @@ void init_laws(void) #error FSL_HW_NUM_LAWS can not be greater than 32 w/o code changes #endif -#if defined(CONFIG_SECURE_BOOT) && defined(CONFIG_E500) && \ +#if defined(CONFIG_NXP_ESBC) && defined(CONFIG_E500) && \ !defined(CONFIG_E500MC) /* ISBC (Boot ROM) creates a LAW 0 entry for non PBL platforms, * which is not disabled before transferring the control to uboot. @@ -268,7 +268,7 @@ void init_laws(void) disable_law(0); #endif -#if !defined(CONFIG_SECURE_BOOT) +#if !defined(CONFIG_NXP_ESBC) /* * if any non DDR LAWs has been created earlier, remove them before * LAW table is parsed. diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h b/arch/powerpc/include/asm/fsl_secure_boot.h index 64c1007..035bf12 100644 --- a/arch/powerpc/include/asm/fsl_secure_boot.h +++ b/arch/powerpc/include/asm/fsl_secure_boot.h @@ -7,7 +7,7 @@ #define __FSL_SECURE_BOOT_H #include <asm/config_mpc85xx.h> -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_NXP_ESBC #if defined(CONFIG_FSL_CORENET) #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 #elif defined(CONFIG_TARGET_BSC9132QDS) @@ -74,7 +74,7 @@ */ #define CONFIG_FSL_ISBC_KEY_EXT #endif -#endif /* #ifdef CONFIG_SECURE_BOOT */ +#endif /* #ifdef CONFIG_NXP_ESBC */ #ifdef CONFIG_CHAIN_OF_TRUST #ifdef CONFIG_SPL_BUILD diff --git a/board/freescale/common/p_corenet/tlb.c b/board/freescale/common/p_corenet/tlb.c index 3d9459b..c0ab1a5 100644 --- a/board/freescale/common/p_corenet/tlb.c +++ b/board/freescale/common/p_corenet/tlb.c @@ -43,7 +43,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* *I*** - Covers boot page */ #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) -#if !defined(CONFIG_SECURE_BOOT) +#if !defined(CONFIG_NXP_ESBC) /* * *I*G - L3SRAM. When L3 is used as 1M SRAM, the address of the * SRAM is at 0xfff00000, it covered the 0xfffff000. diff --git a/board/freescale/t104xrdb/tlb.c b/board/freescale/t104xrdb/tlb.c index 6511c04..9dcba79 100644 --- a/board/freescale/t104xrdb/tlb.c +++ b/board/freescale/t104xrdb/tlb.c @@ -28,7 +28,7 @@ struct fsl_e_tlb_entry tlb_table[] = { /* TLB 1 */ /* *I*** - Covers boot page */ #if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L3_ADDR) && \ - !defined(CONFIG_SECURE_BOOT) + !defined(CONFIG_NXP_ESBC) /* * *I*G - L3SRAM. When L3 is used as 256K SRAM, the address of the * SRAM is at 0xfffc0000, it covered the 0xfffff000. @@ -37,7 +37,7 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 0, BOOKE_PAGESZ_256K, 1), -#elif defined(CONFIG_SECURE_BOOT) && defined(CONFIG_SPL_BUILD) +#elif defined(CONFIG_NXP_ESBC) && defined(CONFIG_SPL_BUILD) /* * *I*G - L3SRAM. When L3 is used as 256K SRAM, in case of Secure Boot * the physical address of the SRAM is at 0xbffc0000, diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index 3eb3107..80735e9 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index af1bc88..adcc983 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index abc0886..5f4c1c2 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 81c3b3b..cade39d 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x8FF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index dca1260..1ea17b5 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x8FF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index 1e5c762..f264ca8 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index 1203bdb..1ab09ec 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index a0e9cd8..edc640e 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index f086438..8411bdd 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index a256315..50ba06f 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index 8629f8a..f887ec0 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index 51b6488..17fa25f 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index b14e7de..99e8b40 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index b24f704..10f17ed 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index 036f8e8..96eb27c 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index 349fc95..7b58ee8 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index 0fa105c..37f066a 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index dcc7d11..f304be6 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index 6ed4467..4c7f464 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index 6f43d69..aef1f3f 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 8e76629..844e4a0 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index cc2a04f..bcfb589 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index 78aef83..af9bee1 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x11000000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index 91514e1..cf254d5 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index d832063..dc3c69b 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index 483e393..2250e49 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index e6b1207..9f4cb9d 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 85f04ac..ad3bd81 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index 85fa7bd..01131a5 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index c085e68..9a92c00 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xFFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 22b4d4e..817b6dc 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index 886aba7..1deffd8 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1023RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 423d642..15c3bf9 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index 9d6bc98..c60ab38 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index cb751df..a67d50d 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index 7391eff..e59f8d7 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040D4RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 9cd30e5..e411274 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index 5f482c3..376d52d 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index d52521c..55541be 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index 7216412..e11757d 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -2,7 +2,7 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0x30001000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index a255e08..fc9144a 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index dea8479..12b9e40 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index 120bfcc..90dd565 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index fafcdd5..81bb197 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4160QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index 55a7f19..2c6a7ff 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -1,6 +1,6 @@ CONFIG_PPC=y CONFIG_SYS_TEXT_BASE=0xEFF40000 -CONFIG_SECURE_BOOT=y +CONFIG_NXP_ESBC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y # CONFIG_SYS_MALLOC_F is not set diff --git a/doc/README.mpc85xx b/doc/README.mpc85xx index 93ed641..8464e7f 100644 --- a/doc/README.mpc85xx +++ b/doc/README.mpc85xx @@ -28,11 +28,11 @@ Major Config Switches during various boot Modes NOR boot !defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SPL) NOR boot Secure - !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT) + !defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC) RAMBOOT(SD, SPI & NAND boot) defined(CONFIG_SYS_RAMBOOT) RAMBOOT Secure (SD, SPI & NAND) - defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SECURE_BOOT) + defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NXP_ESBC) NAND SPL BOOT defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_NAND_SPL) @@ -93,7 +93,7 @@ B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot 1) TLB entry to overcome e500 v1/v2 debug restriction Location : Label "_start_e500" TLB Entry : CONFIG_SYS_PPC_E500_DEBUG_TLB -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_NXP_ESBC) EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW Properties : 1M, AS1, I, G, IPROT #else @@ -104,7 +104,7 @@ B) !defined(CONFIG_SYS_RAMBOOT) i.e. NOR boot 2) TLB entry for working in AS1 Location : Label "create_init_ram_area" TLB Entry : 15 -#if defined(CONFIG_SECURE_BOOT) +#if defined(CONFIG_NXP_ESBC) EPN -->RPN : CONFIG_SYS_MONITOR_BASE --> CONFIG_SYS_PBI_FLASH_WINDOW Properties : 1M, AS1, I, G, IPROT #else diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 1152bca..344e19d 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -29,7 +29,7 @@ #endif #ifdef CONFIG_SPIFLASH -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_NXP_ESBC #define CONFIG_RAMBOOT_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc #else @@ -50,7 +50,7 @@ #endif #ifdef CONFIG_NAND -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_NXP_ESBC #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 53ee148..7cc3db9 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -13,7 +13,7 @@ #ifdef CONFIG_RAMBOOT_PBL -#ifndef CONFIG_SECURE_BOOT +#ifndef CONFIG_NXP_ESBC #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg #else #define CONFIG_SYS_FSL_PBL_PBI \ @@ -32,7 +32,7 @@ #define BOOT_PAGE_OFFSET 0x27000 #ifdef CONFIG_NAND -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_NXP_ESBC #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) /* * HDR would be appended at end of image and copied to DDR along @@ -163,7 +163,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_OFFSET (512 * 0x800) #elif defined(CONFIG_NAND) -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_NXP_ESBC #define CONFIG_RAMBOOT_NAND #define CONFIG_BOOTSCRIPT_COPY_RAM #endif diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 60e09c1..df602f6 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -12,7 +12,7 @@ #include "../board/freescale/common/ics307_clk.h" #ifdef CONFIG_RAMBOOT_PBL -#ifdef CONFIG_SECURE_BOOT +#ifdef CONFIG_NXP_ESBC #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #ifdef CONFIG_NAND |