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authorLey Foon Tan <ley.foon.tan@intel.com>2020-05-04 18:41:55 +0800
committerTom Rini <trini@konsulko.com>2020-05-06 15:12:48 -0400
commit653f7c44677cd13bb106673bb7c46542e217fa13 (patch)
tree9acf4fc82e747b1788bec31a07e6568e734a2f79 /tools
parent15c160301cf4761d45e09808f9d818525425901b (diff)
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cache: l2x0: Fix missing write to Auxiliary Control Register
In commit f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override bit") we removed writel to regs->pl310_aux_ctrl by accident. This commit restores it back. Fixes: f62782fb2999 ("cache: l2x0: Fix write to incorrect shared-override bit") Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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