diff options
| author | Simon Glass <sjg@chromium.org> | 2020-07-09 18:39:32 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2020-07-24 19:25:15 -0600 |
| commit | c6162cf87c8896094213023266737667813a86d8 (patch) | |
| tree | 6f79e82f273cea3ae0410f98520c21624d9ea59f /tools | |
| parent | 0dc706fe544dc1121c15008ec50809cd6d72ff53 (diff) | |
| download | u-boot-c6162cf87c8896094213023266737667813a86d8.zip u-boot-c6162cf87c8896094213023266737667813a86d8.tar.gz u-boot-c6162cf87c8896094213023266737667813a86d8.tar.bz2 | |
binman: Fix a few typos in the entry docs
Some typos have been fixed in the generated entry docs but the code was
not updated. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/binman/etype/intel_me.py | 2 | ||||
| -rw-r--r-- | tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/tools/binman/etype/intel_me.py b/tools/binman/etype/intel_me.py index 41c9c6b..2707ca6 100644 --- a/tools/binman/etype/intel_me.py +++ b/tools/binman/etype/intel_me.py @@ -16,7 +16,7 @@ class Entry_intel_me(Entry_blob): This file contains code used by the SoC that is required to make it work. The Management Engine is like a background task that runs things that are - not clearly documented, but may include keyboard, deplay and network + not clearly documented, but may include keyboard, display and network access. For platform that use ME it is not possible to disable it. U-Boot does not directly execute code in the ME binary. diff --git a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py index cefd425..28005c6 100644 --- a/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py +++ b/tools/binman/etype/powerpc_mpc85xx_bootpg_resetvec.py @@ -13,7 +13,7 @@ class Entry_powerpc_mpc85xx_bootpg_resetvec(Entry_blob): Properties / Entry arguments: - filename: Filename of u-boot-br.bin (default 'u-boot-br.bin') - This enrty is valid for PowerPC mpc85xx cpus. This entry holds + This entry is valid for PowerPC mpc85xx cpus. This entry holds 'bootpg + resetvec' code for PowerPC mpc85xx CPUs which needs to be placed at offset 'RESET_VECTOR_ADDRESS - 0xffc'. """ |