Merge tag 'xilinx-for-v2022.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into nextWIP/16Mar2022-next

Xilinx changes for v2022.07-rc1

microblaze:
- Add support for reserved memory

xilinx:
- Update FRU code with MAC reading

zynqmp:
- Remove double AMS setting
- DT updates (mostly for SOMs)
- Add support for zcu106 rev 1.0

zynq:
- Update nand binding

nand:
- Aligned zynq_nand to upstream DT binding

net:
- Add support for ethernet-phy-id

mmc:
- Workaround CD in zynq_sdhci driver also for ZynqMP
- Add support for dynamic/run-time SD config for SOMs

gpio:
- Add driver for slg7xl45106

firmware:
- Add support for dynamic SD config

power-domain:
- Update zynqmp driver with the latest firmware

video:
- Add skeleton driver for DP and DPDMA

i2c:
- Fix i2c to work with QEMU

pinctrl:
- Add driver for zynqmp pinctrl driver

1 files changed, 4 insertions, 4 deletions

diff --git a/test/cmd/pinmux.c b/test/cmd/pinmux.c
index 8ae807b..ba338b8 100644
--- a/test/cmd/pinmux.c
+++ b/test/cmd/pinmux.c
@@ -16,18 +16,18 @@ static int dm_test_cmd_pinmux_status_pinname(struct unit_test_state *uts)
 	/* Test that 'pinmux status <pinname>' displays the selected pin. */
 	console_record_reset();
 	run_command("pinmux status a5", 0);
-	ut_assert_nextline("a5        : gpio input .                            ");
+	ut_assert_nextlinen("a5        : gpio input .");
 	ut_assert_console_end();
 
 	console_record_reset();
 	run_command("pinmux status P7", 0);
-	ut_assert_nextline("P7        : GPIO2 bias-pull-down input-enable.      ");
+	ut_assert_nextlinen("P7        : GPIO2 bias-pull-down input-enable.");
 	ut_assert_console_end();
 
 	console_record_reset();
 	run_command("pinmux status P9", 0);
-	ut_assert_nextline("single-pinctrl pinctrl-single-no-width: missing register width");
-	ut_assert_nextline("P9 not found");
+	ut_assert_nextlinen("single-pinctrl pinctrl-single-no-width: missing register width");
+	ut_assert_nextlinen("P9 not found");
 	ut_assert_console_end();
 
 	return 0;