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| author | Peng Fan <peng.fan@nxp.com> | 2019-08-21 13:35:14 +0000 |
|---|---|---|
| committer | Lukasz Majewski <lukma@denx.de> | 2019-08-22 00:10:09 +0200 |
| commit | aeeb2e6d9c67273da5d91f7567657447878eb493 (patch) | |
| tree | d42adea665093563e3f6295e8df73b4d5ab3b7ca /scripts | |
| parent | 0520be0f67e358f57f5a1f805b24f39b143e4334 (diff) | |
| download | u-boot-aeeb2e6d9c67273da5d91f7567657447878eb493.zip u-boot-aeeb2e6d9c67273da5d91f7567657447878eb493.tar.gz u-boot-aeeb2e6d9c67273da5d91f7567657447878eb493.tar.bz2 | |
clk: support clk tree dump
The previous code only dump the clk list. This patch is
to support clk tree dump, and also dump the enable_cnt.
The code used in patch is similar to dm_dump_all, but
the code here only filter out the UCLASS_CLK devices.
On i.MX8MM, Partial output:
u-boot=> clk dump
Rate Usecnt Name
------------------------------------------
24000000 0 |-- clock-osc-24m
24000000 0 | |-- dram_pll_ref_sel
750000000 0 | | `-- dram_pll
750000000 0 | | `-- dram_pll_bypass
750000000 0 | | `-- dram_pll_out
24000000 0 | |-- arm_pll_ref_sel
1200000000 0 | | `-- arm_pll
1200000000 0 | | `-- arm_pll_bypass
1200000000 0 | | `-- arm_pll_out
1200000000 0 | | `-- arm_a53_src
1200000000 0 | | `-- arm_a53_cg
1200000000 0 | | `-- arm_a53_div
24000000 4 | |-- sys_pll1_ref_sel
800000000 4 | | `-- sys_pll1
800000000 4 | | `-- sys_pll1_bypass
800000000 4 | | `-- sys_pll1_out
40000000 0 | | |-- sys_pll1_40m
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions