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author | Tom Rini <trini@konsulko.com> | 2022-08-12 21:39:15 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2022-08-12 21:41:07 -0400 |
commit | 8f9eee8275cf475f6d9435e85aa2d04b61b3cd75 (patch) | |
tree | 1e09bcb44c8e3bc72f3a8315616ec49057e3e49d /scripts/config_whitelist.txt | |
parent | 6fc212779c990ff27a430e370bfb8fac01ddde7f (diff) | |
parent | ecf1d2741d95f5f84e31dc1d0bef149d8ff1f0a3 (diff) | |
download | u-boot-8f9eee8275cf475f6d9435e85aa2d04b61b3cd75.zip u-boot-8f9eee8275cf475f6d9435e85aa2d04b61b3cd75.tar.gz u-boot-8f9eee8275cf475f6d9435e85aa2d04b61b3cd75.tar.bz2 |
Merge branch '2022-08-12-assorted-updates'
- Clean up some code with the DH electronics boards, remove a few boards
that have had their removal ack'd, update Azure CI hosts for macOS and
Ubuntu, and migrate a few more symbols to Kconfig.
Diffstat (limited to 'scripts/config_whitelist.txt')
-rw-r--r-- | scripts/config_whitelist.txt | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 4f628e0..53328e1 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1,7 +1,6 @@ CONFIG_ARM_GIC_BASE_ADDRESS CONFIG_AUTO_ZRELADDR CONFIG_BOARDDIR -CONFIG_DEFAULT CONFIG_DFU_ALT CONFIG_DFU_ALT_BOOT_EMMC CONFIG_DFU_ALT_BOOT_SD @@ -46,7 +45,6 @@ CONFIG_FSL_FM_10GEC_REGULAR_NOTATION CONFIG_FSL_IIM CONFIG_FSL_ISBC_KEY_EXT CONFIG_FSL_LBC -CONFIG_FSL_NGPIXIS CONFIG_FSL_PMIC_BITLEN CONFIG_FSL_PMIC_BUS CONFIG_FSL_PMIC_CLK @@ -425,10 +423,6 @@ CONFIG_SH_GPIO_PFC CONFIG_SH_QSPI_BASE CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION CONFIG_SLIC -CONFIG_SMC91111 -CONFIG_SMC91111_BASE -CONFIG_SMC91111_EXT_PHY -CONFIG_SMC_USE_32_BIT CONFIG_SMDK5420 CONFIG_SMP_PEN_ADDR CONFIG_SMSC_LPC47M @@ -597,7 +591,6 @@ CONFIG_SYS_DDR_CLK_CTRL CONFIG_SYS_DDR_CLK_CTRL_800 CONFIG_SYS_DDR_CONFIG CONFIG_SYS_DDR_CONFIG_2 -CONFIG_SYS_DDR_CONFIG_256 CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_2 CONFIG_SYS_DDR_CS0_BNDS @@ -650,7 +643,6 @@ CONFIG_SYS_ETHOC_BASE CONFIG_SYS_ETHOC_BUFFER_ADDR CONFIG_SYS_EXCEPTION_VECTORS_HIGH CONFIG_SYS_FAST_CLK -CONFIG_SYS_FDT_PAD CONFIG_SYS_FEC_BUF_USE_SRAM CONFIG_SYS_FLASH0 CONFIG_SYS_FLASH1 @@ -739,21 +731,8 @@ CONFIG_SYS_FSL_DCSR_DDR_ADDR CONFIG_SYS_FSL_DDR2_ADDR CONFIG_SYS_FSL_DDR3_ADDR CONFIG_SYS_FSL_DDR_ADDR -CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY -CONFIG_SYS_FSL_DSPI_BE -CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT -CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR -CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET -CONFIG_SYS_FSL_DSP_DDR_ADDR -CONFIG_SYS_FSL_DSP_M2_RAM_ADDR -CONFIG_SYS_FSL_DSP_M3_RAM_ADDR -CONFIG_SYS_FSL_ERRATUM_A008751 CONFIG_SYS_FSL_ESDHC_ADDR -CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT -CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE -CONFIG_SYS_FSL_ESDHC_NUM -CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK CONFIG_SYS_FSL_FM CONFIG_SYS_FSL_FM1_ADDR CONFIG_SYS_FSL_FM1_DTSEC1_ADDR @@ -778,70 +757,44 @@ CONFIG_SYS_FSL_FM2_RX3_1G_OFFSET CONFIG_SYS_FSL_FM2_RX4_1G_OFFSET CONFIG_SYS_FSL_FM2_RX5_1G_OFFSET CONFIG_SYS_FSL_GUTS_ADDR -CONFIG_SYS_FSL_ISBC_VER CONFIG_SYS_FSL_JR0_ADDR CONFIG_SYS_FSL_JR0_OFFSET CONFIG_SYS_FSL_LS1_CLK_ADDR CONFIG_SYS_FSL_LSCH3_SERDES_ADDR -CONFIG_SYS_FSL_MAX_NUM_OF_SEC CONFIG_SYS_FSL_NUM_CC_PLL -CONFIG_SYS_FSL_NUM_CC_PLLS CONFIG_SYS_FSL_OCRAM_BASE CONFIG_SYS_FSL_OCRAM_SIZE -CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS CONFIG_SYS_FSL_PAMU_OFFSET -CONFIG_SYS_FSL_PCIE_COMPAT CONFIG_SYS_FSL_PMIC_I2C_ADDR CONFIG_SYS_FSL_PMU_ADDR CONFIG_SYS_FSL_PMU_CLTBENR CONFIG_SYS_FSL_QMAN_ADDR CONFIG_SYS_FSL_QMAN_OFFSET -CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_QSPI_BASE -CONFIG_SYS_FSL_QSPI_LE -CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RAID_ENGINE_ADDR CONFIG_SYS_FSL_RAID_ENGINE_OFFSET CONFIG_SYS_FSL_RCPM_ADDR -CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_RST_ADDR CONFIG_SYS_FSL_SCFG_ADDR -CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR -CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET CONFIG_SYS_FSL_SCFG_OFFSET -CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET -CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR CONFIG_SYS_FSL_SEC_ADDR CONFIG_SYS_FSL_SEC_IDX_OFFSET CONFIG_SYS_FSL_SEC_OFFSET CONFIG_SYS_FSL_SERDES CONFIG_SYS_FSL_SERDES_ADDR -CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRDS_3 CONFIG_SYS_FSL_SRDS_4 -CONFIG_SYS_FSL_SRDS_NUM_PLLS CONFIG_SYS_FSL_SRIO_ADDR CONFIG_SYS_FSL_SRIO_IB_WIN_NUM -CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_SRIO_MAX_PORTS CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM CONFIG_SYS_FSL_SRIO_OB_WIN_NUM CONFIG_SYS_FSL_SRIO_OFFSET -CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_TIMER_ADDR -CONFIG_SYS_FSL_USB1_PHY_ENABLE -CONFIG_SYS_FSL_USB2_PHY_ENABLE -CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE -CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY CONFIG_SYS_FSL_USDHC_NUM -CONFIG_SYS_FSL_WDOG_BE CONFIG_SYS_FSL_WRIOP1_ADDR CONFIG_SYS_FSL_WRIOP1_MDIO1 CONFIG_SYS_FSL_WRIOP1_MDIO2 -CONFIG_SYS_GP1DIR -CONFIG_SYS_GP1ODR -CONFIG_SYS_GP2DIR -CONFIG_SYS_GP2ODR CONFIG_SYS_GPIO1_EN CONFIG_SYS_GPIO1_FUNC CONFIG_SYS_GPIO1_LED @@ -850,8 +803,6 @@ CONFIG_SYS_GPIO_EN CONFIG_SYS_GPIO_FUNC CONFIG_SYS_GPIO_OUT CONFIG_SYS_GPR1 -CONFIG_SYS_HALT_BEFOR_RAM_JUMP -CONFIG_SYS_HMI_BASE CONFIG_SYS_HZ_CLOCK CONFIG_SYS_I2C_BUSES CONFIG_SYS_I2C_DVI_ADDR @@ -1034,7 +985,6 @@ CONFIG_SYS_MPC8xxx_DDR3_OFFSET CONFIG_SYS_MPC8xxx_DDR_OFFSET CONFIG_SYS_MPC8xxx_PIC_ADDR CONFIG_SYS_MRAM_BASE -CONFIG_SYS_MRAM_SIZE CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST CONFIG_SYS_NAND_AMASK CONFIG_SYS_NAND_BASE @@ -1246,7 +1196,6 @@ CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 CONFIG_SYS_SDRAM_BASE1 CONFIG_SYS_SDRAM_BASE2 -CONFIG_SYS_SDRAM_CFG CONFIG_SYS_SDRAM_CFG1 CONFIG_SYS_SDRAM_CFG2 CONFIG_SYS_SDRAM_CTRL |