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author | Stefan Roese <sr@denx.de> | 2007-10-05 17:04:57 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:20:49 +0100 |
commit | a424a8bb2924b90724b944165d3141f1fa8dfe5b (patch) | |
tree | 0bb488975fac12b86f15d9d43dfd568289e3798c /post/cpu/ppc4xx | |
parent | 4f2e92c11f6e2392fc8187829211a5ca7f0c1e12 (diff) | |
download | u-boot-a424a8bb2924b90724b944165d3141f1fa8dfe5b.zip u-boot-a424a8bb2924b90724b944165d3141f1fa8dfe5b.tar.gz u-boot-a424a8bb2924b90724b944165d3141f1fa8dfe5b.tar.bz2 |
POST: Add 405EX support to 4xx UART POST test
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'post/cpu/ppc4xx')
-rw-r--r-- | post/cpu/ppc4xx/uart.c | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index 7c3ed40..f47b48e 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -101,6 +101,17 @@ #define UCR0_UDIV_POS 0 #define UCR1_UDIV_POS 8 #define UDIV_MAX 127 +#elif defined(CONFIG_405EX) +#define UART0_BASE 0xef600200 +#define UART1_BASE 0xef600300 +#define CR0_MASK 0x000000ff +#define CR0_EXTCLK_ENA 0x00800000 +#define CR0_UDIV_POS 0 +#define UDIV_SUBTRACT 0 +#define UART0_SDR sdr_uart0 +#define UART1_SDR sdr_uart1 +#define MFREG(a, d) mfsdr(a, d) +#define MTREG(a, d) mtsdr(a, d) #else /* CONFIG_405GP || CONFIG_405CR */ #define UART0_BASE 0xef600300 #define UART1_BASE 0xef600400 @@ -137,7 +148,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_440) +#if defined(CONFIG_440) || defined(CONFIG_405EX) #if !defined(CFG_EXT_SERIAL_CLOCK) static void serial_divs (int baudrate, unsigned long *pudiv, unsigned short *pbdiv) @@ -183,7 +194,7 @@ static void serial_divs (int baudrate, unsigned long *pudiv, static int uart_post_init (unsigned long dev_base) { - unsigned long reg; + unsigned long reg = 0; unsigned long udiv; unsigned short bdiv; volatile char val; |