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authorTom Rini <trini@konsulko.com>2017-04-06 12:28:03 -0400
committerTom Rini <trini@konsulko.com>2017-04-06 20:40:24 -0400
commitd53ecad92f06d2e38a5cbc13af7473867c7fa277 (patch)
treecd46314f18a4e1b538a7973f1b74935f4ca2b096 /include
parent891f7ae63318293cd5807fb611f86f545080b1f6 (diff)
parente7bd15ea156f2a65d6aba167b9b7cd711caae2e6 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-sunxi
trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2 Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/exynos-common.h2
-rw-r--r--include/configs/ls1021aiot.h7
-rw-r--r--include/configs/ls1021aqds.h7
-rw-r--r--include/configs/ls1021atwr.h7
-rw-r--r--include/configs/mx7_common.h2
-rw-r--r--include/configs/sun50i.h1
-rw-r--r--include/configs/sunxi-common.h24
7 files changed, 13 insertions, 37 deletions
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index b4f7530..ade66a4 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -23,7 +23,7 @@
/* input clock of PLL: 24MHz input clock */
#define CONFIG_SYS_CLK_FREQ 24000000
-#define CONFIG_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define COUNTER_FREQUENCY CONFIG_SYS_CLK_FREQ
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index db29fa2b..dfb7238 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -36,11 +36,6 @@
#define CONFIG_CMD_EXT2
#endif
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 12500000
-
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000
@@ -243,7 +238,7 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ 12500000
+#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 4fb8b0c..15850f2 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -27,11 +27,6 @@
#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 12500000
-
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
unsigned long get_board_ddr_clk(void);
@@ -500,7 +495,7 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ 12500000
+#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index c6438d5..5d6a64a 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -56,11 +56,6 @@
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
#endif
-/*
- * Generic Timer Definitions
- */
-#define GENERIC_TIMER_CLK 12500000
-
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 100000000
@@ -370,7 +365,7 @@
#define CONFIG_PEN_ADDR_BIG_ENDIAN
#define CONFIG_LAYERSCAPE_NS_ACCESS
#define CONFIG_SMP_PEN_ADDR 0x01ee0200
-#define CONFIG_TIMER_CLK_FREQ 12500000
+#define COUNTER_FREQUENCY 12500000
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 256
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 5bf8ad7..e2b05ca 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -21,7 +21,7 @@
#define CONFIG_MXC_GPT_HCLK
#define CONFIG_SYSCOUNTER_TIMER
#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
-#define CONFIG_TIMER_CLK_FREQ CONFIG_SC_TIMER_CLK
+#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
#define CONFIG_SYS_FSL_CLK
#define CONFIG_SYS_BOOTM_LEN 0x1000000
diff --git a/include/configs/sun50i.h b/include/configs/sun50i.h
index 3e5708b..1b7bfb6 100644
--- a/include/configs/sun50i.h
+++ b/include/configs/sun50i.h
@@ -18,7 +18,6 @@
#define CONFIG_SUNXI_USB_PHYS 1
-#define COUNTER_FREQUENCY CONFIG_TIMER_CLK_FREQ
#define GICD_BASE 0x1c81000
#define GICC_BASE 0x1c82000
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 05ea172..377ae00 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -46,7 +46,7 @@
#endif
/* CPU */
-#define CONFIG_TIMER_CLK_FREQ 24000000
+#define COUNTER_FREQUENCY 24000000
/*
* The DRAM Base differs between some models. We cannot use macros for the
@@ -79,7 +79,7 @@
#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
+#ifdef CONFIG_SUNXI_HIGH_SRAM
/*
* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
* slightly bigger. Note that it is possible to map the first 32 KiB of the
@@ -175,32 +175,24 @@
#define CONFIG_SPL_BOARD_LOAD_IMAGE
#endif
-#if defined(CONFIG_MACH_SUN9I)
+#ifdef CONFIG_SUNXI_HIGH_SRAM
#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* ? KiB on sun9i */
-#elif defined(CONFIG_MACH_SUN50I)
-#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
-#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB on sun50i */
+#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB */
+#define LOW_LEVEL_SRAM_STACK 0x00018000
#else
#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
+#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
#endif
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
#ifndef CONFIG_ARM64
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
#endif
#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
-#if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
-/* FIXME: 40 KiB instead of 32 KiB ? */
-#define LOW_LEVEL_SRAM_STACK 0x00018000
-#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#else
-/* end of 32 KiB in sram */
-#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
-#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
-#endif
/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \