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| author | Tom Rini <trini@konsulko.com> | 2020-05-27 10:56:25 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-05-27 10:56:25 -0400 |
| commit | ab80137cc436e977ef91a154372ae5aeae3f4fb0 (patch) | |
| tree | 5787d169fc0ba7a7d1cc87530938ef526f85dc9e /include | |
| parent | 0d6a3e23225ad8c8e302044f8f720f657edda4f7 (diff) | |
| parent | df9ebbe17ea13de4c443849ecf23cba545dd0395 (diff) | |
| download | u-boot-ab80137cc436e977ef91a154372ae5aeae3f4fb0.zip u-boot-ab80137cc436e977ef91a154372ae5aeae3f4fb0.tar.gz u-boot-ab80137cc436e977ef91a154372ae5aeae3f4fb0.tar.bz2 | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix SPI boot on ds414 (Ezra)
- Fix PHY mode definition on armada-3720-uDPU (Jakov)
- Convert CRS305-1G-4S to generic version (Luka)
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/crs3xx-98dx3236.h (renamed from include/configs/crs305-1g-4s.h) | 6 | ||||
| -rw-r--r-- | include/configs/ds414.h | 3 |
2 files changed, 6 insertions, 3 deletions
diff --git a/include/configs/crs305-1g-4s.h b/include/configs/crs3xx-98dx3236.h index 617c8af..e2ba7b8 100644 --- a/include/configs/crs305-1g-4s.h +++ b/include/configs/crs3xx-98dx3236.h @@ -3,8 +3,8 @@ * Copyright (C) 2014 Stefan Roese <sr@denx.de> */ -#ifndef _CONFIG_CRS305_1G_4S_H -#define _CONFIG_CRS305_1G_4S_H +#ifndef _CONFIG_CRS3XX_98DX3236_H +#define _CONFIG_CRS3XX_98DX3236_H /* * High Level Configuration Options (easy to change) @@ -32,4 +32,4 @@ #undef CONFIG_SYS_MAXARGS #define CONFIG_SYS_MAXARGS 96 -#endif /* _CONFIG_CRS305_1G_4S_H */ +#endif /* _CONFIG_CRS3XX_98DX3236_H */ diff --git a/include/configs/ds414.h b/include/configs/ds414.h index e369376..b179b99 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -87,7 +87,10 @@ #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) +#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI) /* SPL related SPI defines */ +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS +#endif /* DS414 bus width is 32bits */ #define CONFIG_DDR_32BIT |