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author | Ye Li <ye.li@nxp.com> | 2020-05-03 22:41:14 +0800 |
---|---|---|
committer | Stefano Babic <sbabic@denx.de> | 2020-05-10 13:24:48 +0200 |
commit | 5fe419ef2a6154e83aab04c65ec906fef96eb5be (patch) | |
tree | 07cbf8416be9264469b1819cdeb6eb1f1630a077 /include | |
parent | d2b70205dd67f32427dde4f1a7a8966f4924dfad (diff) | |
download | u-boot-5fe419ef2a6154e83aab04c65ec906fef96eb5be.zip u-boot-5fe419ef2a6154e83aab04c65ec906fef96eb5be.tar.gz u-boot-5fe419ef2a6154e83aab04c65ec906fef96eb5be.tar.bz2 |
net: Add eth phy generic driver for shared MDIO
For dual ethernet controllers, the HW design may connect ETH phys to
one MDIO ports. So two different ethernet drivers have to share MDIO bus.
Since two ethernet drivers are independent, we can't ensure their probe
order.
To resolve this problem, introduce an eth phy generic driver and uclass.
After eth-uclass binds, we search the mdio node and binds the phy node
with the eth-phy-generic driver.
When one eth driver get its phy device, the parent of phy device will
probe prior than phy device. So this ensure the eth driver ownes the
MDIO bus will be probed before using its MDIO.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/dm/uclass-id.h | 1 | ||||
-rw-r--r-- | include/eth_phy.h | 17 |
2 files changed, 18 insertions, 0 deletions
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 37ada51..7837d45 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -47,6 +47,7 @@ enum uclass_id { UCLASS_DMA, /* Direct Memory Access */ UCLASS_EFI, /* EFI managed devices */ UCLASS_ETH, /* Ethernet device */ + UCLASS_ETH_PHY, /* Ethernet PHY device */ UCLASS_FIRMWARE, /* Firmware */ UCLASS_FS_FIRMWARE_LOADER, /* Generic loader */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ diff --git a/include/eth_phy.h b/include/eth_phy.h new file mode 100644 index 0000000..19c4965 --- /dev/null +++ b/include/eth_phy.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 NXP + */ + +#ifndef _eth_phy_h_ +#define _eth_phy_h_ + +#include <dm.h> +#include <phy.h> + +int eth_phy_binds_nodes(struct udevice *eth_dev); +int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus); +struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev); +int eth_phy_get_addr(struct udevice *dev); + +#endif |