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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-21 18:05:22 +0900 |
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committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-22 15:11:12 +0900 |
commit | 561ca649a8e3d459e95d23b903cd027096935278 (patch) | |
tree | 87504848d26d8c1916533b893009d8da46f2c443 /include | |
parent | 7a37bd64c5b17de4de28538601c2d81cb84684e7 (diff) | |
download | u-boot-561ca649a8e3d459e95d23b903cd027096935278.zip u-boot-561ca649a8e3d459e95d23b903cd027096935278.tar.gz u-boot-561ca649a8e3d459e95d23b903cd027096935278.tar.bz2 |
ARM: uniphier: make SPL optional for ARVv8 SoCs
We may want to run different firmware before running U-Boot. For
example, ARM Trusted Firmware runs before U-Boot, making U-Boot
a non-secure world boot loader. In this case, the SoC might be
initialized there, which enables us to skip SPL entirely.
This commit removes "select SPL" to make it configurable. This
also enables the Multi SoC support for the UniPhier ARMv8 SoCs.
(CONFIG_ARCH_UNIPHIER_V8_MULTI) Thanks to the driver model and
Device Tree, the U-Boot proper part is now written in a generic way.
The board/SoC parameters reside in DT. The Multi SoC support
increases the memory footprint a bit, but the U-Boot proper does
not have strict memory constraint. This will mitigate the per-SoC
(sometimes per-board) defconfig burden.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/uniphier.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index ee86663..487d3de 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -83,7 +83,7 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 -#ifdef CONFIG_ARM64 +#ifdef CONFIG_ARMV8_MULTIENTRY #define CPU_RELEASE_ADDR 0x80000000 #define COUNTER_FREQUENCY 50000000 #define CONFIG_GICV3 @@ -93,7 +93,7 @@ #elif defined(CONFIG_ARCH_UNIPHIER_LD20) #define GICR_BASE 0x5fe80000 #endif -#else +#elif !defined(CONFIG_ARM64) /* Time clock 1MHz */ #define CONFIG_SYS_TIMER_RATE 1000000 #endif @@ -274,6 +274,7 @@ /* subtract sizeof(struct image_header) */ #define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) +#ifdef CONFIG_SPL #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 #define CONFIG_SPL_MAX_SIZE 0x10000 @@ -283,5 +284,6 @@ #define CONFIG_SPL_BSS_START_ADDR 0x30016000 #endif #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 +#endif #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ |