diff options
| author | Wolfgang Denk <wd@denx.de> | 2021-09-27 17:42:38 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-09-30 08:08:56 -0400 |
| commit | 0a50b3c97b3408e52589d873d4c7b54ad365a76c (patch) | |
| tree | 6b66bfba9e5bf9c1be213f80cb2cc402578d0318 /include | |
| parent | c72231d2729cea8b683ef05d94c986ced36755b3 (diff) | |
| download | u-boot-0a50b3c97b3408e52589d873d4c7b54ad365a76c.zip u-boot-0a50b3c97b3408e52589d873d4c7b54ad365a76c.tar.gz u-boot-0a50b3c97b3408e52589d873d4c7b54ad365a76c.tar.bz2 | |
WS cleanup: remove trailing white space
Signed-off-by: Wolfgang Denk <wd@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/imx6-engicam.h | 2 | ||||
| -rw-r--r-- | include/linux/mtd/rawnand.h | 2 | ||||
| -rw-r--r-- | include/linux/serial_reg.h | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h index cf46b54..4b45e33 100644 --- a/include/configs/imx6-engicam.h +++ b/include/configs/imx6-engicam.h @@ -105,7 +105,7 @@ #ifdef CONFIG_MX6UL # define DRAM_OFFSET(x) 0x87##x # define FDT_ADDR __stringify(DRAM_OFFSET(800000)) -#else +#else # define DRAM_OFFSET(x) 0x1##x # define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) #endif diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 2fba9dc..3417ca2 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -945,7 +945,7 @@ struct nand_chip { int jedec_version; struct nand_onfi_params onfi_params; struct nand_jedec_params jedec_params; - + struct nand_data_interface *data_interface; int read_retries; diff --git a/include/linux/serial_reg.h b/include/linux/serial_reg.h index dca7efa..20ea543 100644 --- a/include/linux/serial_reg.h +++ b/include/linux/serial_reg.h @@ -3,7 +3,7 @@ * include/linux/serial_reg.h * * Copyright (C) 1992, 1994 by Theodore Ts'o. - * + * * These are the UART port assignments, expressed as offsets from the base * register. These assignments should hold for any serial port based on * a 8250, 16450, or 16550(A). @@ -88,7 +88,7 @@ #define UART_LCR 3 /* Out: Line Control Register */ /* - * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. */ #define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ |