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| author | Tom Rini <trini@konsulko.com> | 2022-02-25 11:19:53 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-03-03 16:51:20 -0500 |
| commit | f9147d636ce26eec8719ce8167887736c321ef94 (patch) | |
| tree | 3dd23e183191688c331a9a597c69a0871e9247d9 /include | |
| parent | 819b4778d6f9136676c5484ca504bd3363b89fd5 (diff) | |
| download | u-boot-f9147d636ce26eec8719ce8167887736c321ef94.zip u-boot-f9147d636ce26eec8719ce8167887736c321ef94.tar.gz u-boot-f9147d636ce26eec8719ce8167887736c321ef94.tar.bz2 | |
Convert CONFIG_CHIP_SELECTS_PER_CTRL to Kconfig
This converts the following to Kconfig:
CONFIG_CHIP_SELECTS_PER_CTRL
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Pramod Kumar <pramod.kumar_1@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
35 files changed, 0 insertions, 42 deletions
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 08ab800..093061b 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -48,7 +48,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index a9c4930..5f36951 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -170,7 +170,6 @@ extern unsigned long get_sdram_size(void); #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* DDR3 Controller Settings */ #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003f diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 3834198..045d911 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -93,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index a7c47c7..f803b51 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -152,7 +152,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #if defined(CONFIG_TARGET_T1024RDB) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 7365ee4..8a71807 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -132,7 +132,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index fec70fe..76e00cc 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -117,7 +117,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 0c47b2d..35064fe 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -112,7 +112,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 15a088f..8c9e580 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -93,7 +93,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 /* * IFC Definitions diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index a67a89a..c5a8567 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -96,7 +96,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7b3e1d7..97f6453 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -23,7 +23,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 52a5ff9..707926f 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -175,7 +175,6 @@ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) #define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index 448749a..9eeb7ef 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -19,7 +19,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_VERY_BIG_RAM -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h index 0263bb8..8191c85 100644 --- a/include/configs/ls1012a2g5rdb.h +++ b/include/configs/ls1012a2g5rdb.h @@ -10,7 +10,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* SATA */ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index ef57cf6..7735a00 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -10,9 +10,7 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x20000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #ifndef CONFIG_SPL_BUILD #undef BOOT_TARGET_DEVICES diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index c61865c..7d8d6ee 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -14,10 +14,8 @@ #define BOARD_REV_MASK 0x001A0000 /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define SYS_SDRAM_SIZE_512 0x20000000 #define SYS_SDRAM_SIZE_1024 0x40000000 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 /* ENV */ #define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index cbcb3f7..d57f28e 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h index c9a152e..c51c4f2 100644 --- a/include/configs/ls1012ardb.h +++ b/include/configs/ls1012ardb.h @@ -11,7 +11,6 @@ /* DDR */ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 /* diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 2e5b804..4e5228a 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -59,8 +59,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * Serial Port */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 864584b..b6501e8 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -54,7 +54,6 @@ #define CONFIG_SYS_DDR_RAW_TIMING #endif #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h index 5f6c2a0..824078d 100644 --- a/include/configs/ls1021atsn.h +++ b/include/configs/ls1021atsn.h @@ -77,8 +77,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* Serial Port */ #define CONFIG_SYS_NS16550_SERIAL #ifndef CONFIG_DM_SERIAL diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 38bcb5c..fada8aa 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -79,8 +79,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 - /* * IFC Definitions */ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index a517346..8bdfddc 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -40,7 +40,6 @@ /* Miscellaneous configurable options */ /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index eb95f53..e9919cd 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index dbeafe3..c904c9c 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 14ad84a..8425d17 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -11,7 +11,6 @@ #define CONFIG_LAYERSCAPE_NS_ACCESS #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_UBOOT_BASE 0x40100000 diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index d77119a..2972e3b 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -12,7 +12,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 8ed1dce..f6ff690 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -13,7 +13,6 @@ #define CONFIG_DIMM_SLOTS_PER_CTLR 1 /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 33b70c8..965fdfe 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -132,7 +132,6 @@ unsigned long long get_qixis_addr(void); #endif /* Physical Memory Map */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f2725af..766da39 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -139,7 +139,6 @@ unsigned long long get_qixis_addr(void); /* Physical Memory Map */ /* fixme: these need to be checked against the board */ -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_HWCONFIG #define HWCONFIG_BUFFER_SIZE 128 diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 7554de1..1c59a89 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -27,7 +27,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 1c05b08..de77872 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -37,7 +37,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #ifdef CONFIG_SYS_FSL_HAS_DP_DDR #define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 #endif diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index e31f8d0..c407fa8 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -34,7 +34,6 @@ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_DIMM_SLOTS_PER_CTLR 2 -#define CONFIG_CHIP_SELECTS_PER_CTRL 4 #define CONFIG_SYS_MONITOR_LEN (936 * 1024) /* Miscellaneous configurable options */ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 3a7adcc..9263189 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -164,10 +164,8 @@ #if defined(CONFIG_TARGET_P1020RDB_PD) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 #else #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_1G -#define CONFIG_CHIP_SELECTS_PER_CTRL 1 #endif #define CONFIG_SYS_SDRAM_SIZE (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19)) #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index 88b3045..296361a 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -43,8 +43,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_CHIP_SELECTS_PER_CTRL 0 - #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 482a920..4d562d4 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -60,7 +60,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL 2 /* I2C addresses of SPD EEPROMs */ #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ |