aboutsummaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2022-11-07 22:22:41 +0100
committerStefano Babic <sbabic@denx.de>2022-11-08 17:35:00 +0100
commitdbd5ca2e46055f3deedd849516d9a641e94c0600 (patch)
tree7ff84439cb0e7e0920cf09dab365eb831fcd5b0b /include
parentf067b597431ef347813031b21e87a0a45459fec0 (diff)
downloadu-boot-dbd5ca2e46055f3deedd849516d9a641e94c0600.zip
u-boot-dbd5ca2e46055f3deedd849516d9a641e94c0600.tar.gz
u-boot-dbd5ca2e46055f3deedd849516d9a641e94c0600.tar.bz2
imx8mm: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/interconnect/imx8mm.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/include/dt-bindings/interconnect/imx8mm.h b/include/dt-bindings/interconnect/imx8mm.h
new file mode 100644
index 0000000..8f10bb0
--- /dev/null
+++ b/include/dt-bindings/interconnect/imx8mm.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Interconnect framework driver for i.MX SoC
+ *
+ * Copyright (c) 2019, BayLibre
+ * Copyright (c) 2019-2020, NXP
+ * Author: Alexandre Bailon <abailon@baylibre.com>
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MM_H
+#define __DT_BINDINGS_INTERCONNECT_IMX8MM_H
+
+#define IMX8MM_ICN_NOC 1
+#define IMX8MM_ICS_DRAM 2
+#define IMX8MM_ICS_OCRAM 3
+#define IMX8MM_ICM_A53 4
+
+#define IMX8MM_ICM_VPU_H1 5
+#define IMX8MM_ICM_VPU_G1 6
+#define IMX8MM_ICM_VPU_G2 7
+#define IMX8MM_ICN_VIDEO 8
+
+#define IMX8MM_ICM_GPU2D 9
+#define IMX8MM_ICM_GPU3D 10
+#define IMX8MM_ICN_GPU 11
+
+#define IMX8MM_ICM_CSI 12
+#define IMX8MM_ICM_LCDIF 13
+#define IMX8MM_ICN_MIPI 14
+
+#define IMX8MM_ICM_USB1 15
+#define IMX8MM_ICM_USB2 16
+#define IMX8MM_ICM_PCIE 17
+#define IMX8MM_ICN_HSIO 18
+
+#define IMX8MM_ICM_SDMA2 19
+#define IMX8MM_ICM_SDMA3 20
+#define IMX8MM_ICN_AUDIO 21
+
+#define IMX8MM_ICN_ENET 22
+#define IMX8MM_ICM_ENET 23
+
+#define IMX8MM_ICN_MAIN 24
+#define IMX8MM_ICM_NAND 25
+#define IMX8MM_ICM_SDMA1 26
+#define IMX8MM_ICM_USDHC1 27
+#define IMX8MM_ICM_USDHC2 28
+#define IMX8MM_ICM_USDHC3 29
+
+#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MM_H */