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authorTom Rini <trini@konsulko.com>2021-08-26 11:47:59 -0400
committerTom Rini <trini@konsulko.com>2021-08-31 17:47:49 -0400
commitab92b38a0161f0d8efa1c2112d944ef8f755dfbe (patch)
treef4413fb22813b940ce12ca5079c67c7149ade8e3 /include
parente4ddf14305b28e788e09a9b1b5b2b2474234eb91 (diff)
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Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/M5208EVBE.h1
-rw-r--r--include/configs/M5235EVB.h1
-rw-r--r--include/configs/M5249EVB.h1
-rw-r--r--include/configs/M5253DEMO.h1
-rw-r--r--include/configs/M5272C3.h1
-rw-r--r--include/configs/M5275EVB.h1
-rw-r--r--include/configs/M5282EVB.h1
-rw-r--r--include/configs/M53017EVB.h1
-rw-r--r--include/configs/M5329EVB.h1
-rw-r--r--include/configs/M5373EVB.h1
-rw-r--r--include/configs/amcore.h1
-rw-r--r--include/configs/astro_mcf5373l.h1
-rw-r--r--include/configs/cobra5272.h1
-rw-r--r--include/configs/eb_cpu5282.h1
-rw-r--r--include/configs/mx7ulp_evk.h2
-rw-r--r--include/configs/rk3188_common.h2
-rw-r--r--include/configs/rk3368_common.h2
-rw-r--r--include/configs/sifive-unmatched.h2
-rw-r--r--include/configs/sipeed-maix.h1
-rw-r--r--include/configs/stmark2.h1
20 files changed, 0 insertions, 24 deletions
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index d75946b..93a2806 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -131,7 +131,6 @@
env/embedded.o(.text*);
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index b0e6ed4..22c5938 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -147,7 +147,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index a873469..2e8bbbb 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -102,7 +102,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index e1f5457..cc7126c 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -153,7 +153,6 @@
#endif
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 35977cc..02b8e37 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -133,7 +133,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index f66ecc8..29b0f7b 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -140,7 +140,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index acaa2f1..fb60ec8 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -140,7 +140,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index adb6cc4..7ee38f8 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -151,7 +151,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index fc6cd2c..cce6b56 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -158,7 +158,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 0b3ee11..d0bb8a1 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -160,7 +160,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index 63b941a..8376eb1 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -71,7 +71,6 @@
* This is a single unified instruction/data cache.
* sdram - single region - no masks
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 5e117fb..63e7e12 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -264,7 +264,6 @@
#endif
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index 054b659..c68cf11 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -234,7 +234,6 @@ enter a valid image address in flash */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index e4da694..97eedcf 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -133,7 +133,6 @@
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index e7d776a..fc2f8d8 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -33,8 +33,6 @@
/* UART */
#define LPUART_BASE LPUART4_RBASE
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index b567943..59a16a7 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -6,8 +6,6 @@
#ifndef __CONFIG_RK3188_COMMON_H
#define __CONFIG_RK3188_COMMON_H
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
#include <asm/arch-rockchip/hardware.h>
#include "rockchip-common.h"
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h
index 43471b94..19a5569 100644
--- a/include/configs/rk3368_common.h
+++ b/include/configs/rk3368_common.h
@@ -8,8 +8,6 @@
#include "rockchip-common.h"
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
#include <asm/arch-rockchip/hardware.h>
#include <linux/sizes.h>
diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
index 4b655ec..a51becb 100644
--- a/include/configs/sifive-unmatched.h
+++ b/include/configs/sifive-unmatched.h
@@ -36,8 +36,6 @@
#define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */
-#define CONFIG_SYS_CACHELINE_SIZE 64
-
/* Environment options */
#ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h
index 5b12878..34e726e 100644
--- a/include/configs/sipeed-maix.h
+++ b/include/configs/sipeed-maix.h
@@ -11,7 +11,6 @@
/* Start just below the second bank so we don't clobber it during reloc */
#define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF
#define CONFIG_SYS_MALLOC_LEN SZ_128K
-#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_SDRAM_SIZE SZ_8M
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index f6fa96a..c73c48c 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -131,7 +131,6 @@
#endif
/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
generated by cgit v1.1 at 2024-07-14 06:32:18 +0000