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| author | Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> | 2015-12-09 18:46:43 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-06-24 13:07:57 +0200 |
| commit | 3427f4d2045729c8995b19407daf91ea9a50e4f8 (patch) | |
| tree | ca468dac178a837e6d38b353af17640ac2c22055 /include/zynqpl.h | |
| parent | 4c86e0834aeb3ae06389534ccbc90b8bcf5d95bf (diff) | |
| download | u-boot-3427f4d2045729c8995b19407daf91ea9a50e4f8.zip u-boot-3427f4d2045729c8995b19407daf91ea9a50e4f8.tar.gz u-boot-3427f4d2045729c8995b19407daf91ea9a50e4f8.tar.bz2 | |
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
Correct the PL bitstream loading sequence for zynqaes command by
clearing the loaded PL bitstream before loading the new encrypted
bitstream using the zynq aes command. This was done by setting
the PROG_B same as in case of fpgaload commands.
This patch fixes the issue of loading the encrypted PL bitstream
onto the PL in which a bitstream has already been loaded
successfully.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'include/zynqpl.h')
| -rw-r--r-- | include/zynqpl.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/zynqpl.h b/include/zynqpl.h index 766e691..d7dc064 100644 --- a/include/zynqpl.h +++ b/include/zynqpl.h @@ -12,7 +12,8 @@ #include <xilinx.h> #ifdef CONFIG_CMD_ZYNQ_AES -int zynq_decrypt_load(u32 srcaddr, u32 dstaddr, u32 srclen, u32 dstlen); +int zynq_decrypt_load(u32 srcaddr, u32 dstaddr, u32 srclen, u32 dstlen, + u8 bstype); #endif extern struct xilinx_fpga_op zynq_op; |