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| author | Vladimir Oltean <olteanv@gmail.com> | 2019-07-19 00:29:54 +0300 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2019-07-25 13:13:31 -0500 |
| commit | bca686a4f90de853f010ce76d6ab9ea95b528907 (patch) | |
| tree | 574e8e469205f0d30e945e65c66b0e8d40b4e2e5 /include/tsec.h | |
| parent | 29db3107a526ecd795eb236e345434bf1fa3d0d4 (diff) | |
| download | u-boot-bca686a4f90de853f010ce76d6ab9ea95b528907.zip u-boot-bca686a4f90de853f010ce76d6ab9ea95b528907.tar.gz u-boot-bca686a4f90de853f010ce76d6ab9ea95b528907.tar.bz2 | |
net: tsec: Fix offset of MDIO registers for DM_ETH
By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).
That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.
So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/tsec.h')
| -rw-r--r-- | include/tsec.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/tsec.h b/include/tsec.h index e900951..b17fa95 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -17,6 +17,8 @@ #include <config.h> #include <phy.h> +#define TSEC_MDIO_REGS_OFFSET 0x520 + #ifndef CONFIG_DM_ETH #ifdef CONFIG_ARCH_LS1021A @@ -27,7 +29,7 @@ #define TSEC_MDIO_OFFSET 0x01000 #endif -#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520) +#define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + TSEC_MDIO_REGS_OFFSET) #define TSEC_GET_REGS(num, offset) \ (struct tsec __iomem *)\ |