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author | Stefan Roese <sr@denx.de> | 2007-10-31 17:55:58 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:46 +0100 |
commit | 9b94ac61d2176185c30adf0793e079ec30e68687 (patch) | |
tree | f51a4467a3daffa8b5597eb9d783c944692f7d80 /include/ppc405.h | |
parent | 06713773da4ac3d390c63d82641eb553224b27c2 (diff) | |
download | u-boot-9b94ac61d2176185c30adf0793e079ec30e68687.zip u-boot-9b94ac61d2176185c30adf0793e079ec30e68687.tar.gz u-boot-9b94ac61d2176185c30adf0793e079ec30e68687.tar.bz2 |
ppc4xx: Rework 4xx cache support
New cache handling functions added and all existing functions
moved from start.S into seperate cache.S.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/ppc405.h')
-rw-r--r-- | include/ppc405.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/ppc405.h b/include/ppc405.h index 97528e8..2c55917 100644 --- a/include/ppc405.h +++ b/include/ppc405.h @@ -22,6 +22,12 @@ #ifndef __PPC405_H__ #define __PPC405_H__ +#ifndef CONFIG_IOP480 +#define CFG_DCACHE_SIZE (16 << 10) /* For AMCC 405 CPUs */ +#else +#define CFG_DCACHE_SIZE (2 << 10) /* For PLX IOP480 (403) */ +#endif + /*--------------------------------------------------------------------- */ /* Special Purpose Registers */ /*--------------------------------------------------------------------- */ |