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authorSimon Glass <sjg@chromium.org>2019-04-25 21:59:01 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-05-08 13:02:14 +0800
commitb69b603bcdeb05f846f76da81e4a681aff6a1001 (patch)
treecf00402b9b170e76a7fd8b71db23199ef8ac0b22 /include/pch.h
parent079b38ba0485eb745cdcdac7e74986d77d2c13e2 (diff)
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x86: pch: Add an ioctl to read power-management info
Add a new ioctl() request to read information about the power-management system. This can be used to power off the device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/pch.h')
-rw-r--r--include/pch.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/include/pch.h b/include/pch.h
index 046a5fd..0b44b66 100644
--- a/include/pch.h
+++ b/include/pch.h
@@ -16,6 +16,9 @@ enum pch_req_t {
/* Returns HDA config info if Azalia V1CTL enabled, -ENOENT if not */
PCH_REQ_HDA_CONFIG,
+ /* Fills out a struct pch_pmbase_info if available */
+ PCH_REQ_PMBASE_INFO,
+
PCH_REQ_TEST1, /* Test requests for sandbox driver */
PCH_REQ_TEST2,
PCH_REQ_TEST3,
@@ -24,6 +27,21 @@ enum pch_req_t {
};
/**
+ * struct pch_pmbase_info - Information filled in by PCH_REQ_PMBASE_INFO
+ *
+ * @pmbase: IO address of power-management controller
+ * @gpio0_en_ofs: Offset of GPIO0 enable register
+ * @pm1_sts_ofs: Offset of status register
+ * @pm1_cnt_ofs: Offset of control register
+ */
+struct pch_pmbase_info {
+ u16 base;
+ u8 gpio0_en_ofs;
+ u8 pm1_sts_ofs;
+ u8 pm1_cnt_ofs;
+};
+
+/**
* struct pch_ops - Operations for the Platform Controller Hub
*
* Consider using ioctl() to add rarely used or driver-specific operations.