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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-11-22 02:38:31 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-11-29 00:28:59 +0900
commite6001371d1603f00a98af9e6dd73abdbbffd2784 (patch)
tree5820430d51ce632913f019d2fe21895f11aa28f9 /include/linux
parenta01549ba404a33636755473ea614d7e59bd525de (diff)
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mtd: nand: introduce NAND_ROW_ADDR_3 flag
Several drivers check ->chipsize to see if the third row address cycle is needed. Instead of embedding magic sizes such as 32MB, 128MB in drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since nand_scan_ident() knows well about the device, it can handle this properly. The flag is set if the row address bit width is greater than 16. Delete comments such as "One more address cycle for ..." because intention is now clear enough from the code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d]
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/mtd/nand.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 150e3b8..d1db34c 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -204,6 +204,9 @@ typedef enum {
*/
#define NAND_NEED_SCRAMBLING 0x00002000
+/* Device needs 3rd row address cycle */
+#define NAND_ROW_ADDR_3 0x00004000
+
/* Options valid for Samsung large page devices */
#define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG