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| author | Tom Rini <trini@konsulko.com> | 2022-01-19 11:43:44 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-01-19 11:43:44 -0500 |
| commit | 068415eadefbbc81f14d4ce61fcf7a7eb39650d4 (patch) | |
| tree | 80fe4b42be8857b162e5242b45fc766eb05a5a71 /include/dt-bindings | |
| parent | 93ee2bbe14d69ad1e3e2c4d5e8e33a764c14e61b (diff) | |
| parent | 11c07719d58d4627e21fc59f5ab58f85edd5c024 (diff) | |
| download | u-boot-068415eadefbbc81f14d4ce61fcf7a7eb39650d4.zip u-boot-068415eadefbbc81f14d4ce61fcf7a7eb39650d4.tar.gz u-boot-068415eadefbbc81f14d4ce61fcf7a7eb39650d4.tar.bz2 | |
Merge tag 'xilinx-for-v2022.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblazeWIP/19Jan2022
Xilinx changes for v2022.04-rc1
gpio:
- Add modepin driver
net:
- Save random mac addresses to eth variable
zynqmp gem:
- Add support for mdio bus DT description
- Add support for reset and SGMII phy configuration
- Reduce timeout for MDIO accesses
zynqmp clk:
- Fix clock handling for gem and usb
phy:
- Add zynqmp phy/serdes driver
serial:
- Add one missing compatible string
microblaze:
- Symbol alignement
- SPL fixups
- Code cleanups
zynqmp:
- Various dt changes, DP pre-reloc, gem resets, gem clocks
- Switch SOM to shared psu configuration
- Move dcache handling to firmware driver
- Workaround gmii2rgmii DT description issue
- Enable broadcasts again
- Change firmware enablement logic
- Small adjustement in firmware driver
versal:
- Support new mmc@ DT nodes
- Fix run time variable handling
- Add missing I2C_PMC ID for power domain
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/power/xlnx-versal-power.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/power/xlnx-versal-power.h b/include/dt-bindings/power/xlnx-versal-power.h index 1b75175..4a72775 100644 --- a/include/dt-bindings/power/xlnx-versal-power.h +++ b/include/dt-bindings/power/xlnx-versal-power.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* - * Copyright (C) 2019 - 2020 Xilinx, Inc. + * Copyright (C) 2019 - 2021 Xilinx, Inc. */ #ifndef _DT_BINDINGS_VERSAL_POWER_H @@ -26,6 +26,7 @@ #define PM_DEV_OSPI (0x1822402aU) #define PM_DEV_QSPI (0x1822402bU) #define PM_DEV_GPIO_PMC (0x1822402cU) +#define PM_DEV_I2C_PMC (0x1822402dU) #define PM_DEV_SDIO_0 (0x1822402eU) #define PM_DEV_SDIO_1 (0x1822402fU) #define PM_DEV_RTC (0x18224034U) |