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| author | Tom Rini <trini@konsulko.com> | 2022-07-31 21:08:24 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-08-12 16:10:49 -0400 |
| commit | 8b549c0b23619afbc9b8d26379710ecb937e20e2 (patch) | |
| tree | d422e61b543b5f06d6fce3580acbc1a37f19a604 /include/configs/socrates.h | |
| parent | 83505a7e9f8dd3e483d58f0519064bfac84e40a2 (diff) | |
| download | u-boot-8b549c0b23619afbc9b8d26379710ecb937e20e2.zip u-boot-8b549c0b23619afbc9b8d26379710ecb937e20e2.tar.gz u-boot-8b549c0b23619afbc9b8d26379710ecb937e20e2.tar.bz2 | |
Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et al
This removes the following symbols:
CONFIG_SYS_FSL_DSPI_BE
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
CONFIG_SYS_FSL_DSP_DDR_ADDR
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
CONFIG_SYS_FSL_ERRATUM_A008751
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
CONFIG_SYS_FSL_ESDHC_NUM
CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
CONFIG_SYS_FSL_ISBC_VER
CONFIG_SYS_FSL_QSPI_LE
CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
CONFIG_SYS_FSL_SRDS_NUM_PLLS
CONFIG_SYS_FSL_WDOG_BE
CONFIG_SYS_GP1DIR
CONFIG_SYS_GP1ODR
CONFIG_SYS_GP2DIR
CONFIG_SYS_GP2ODR
CONFIG_SYS_HALT_BEFOR_RAM_JUMP
CONFIG_SYS_HMI_BASE
FSL_QSPI_FLASH_NUM
FSL_QSPI_FLASH_SIZE
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include/configs/socrates.h')
| -rw-r--r-- | include/configs/socrates.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 498deb4..762ba44 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -103,7 +103,6 @@ /* FPGA and NAND */ #define CONFIG_SYS_FPGA_BASE 0xc0000000 #define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ -#define CONFIG_SYS_HMI_BASE 0xc0010000 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) #define CONFIG_SYS_MAX_NAND_DEVICE 1 |