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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-10-03 12:44:13 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-05-21 22:15:31 +0200 |
| commit | 5602330df0306a44d78c1ba67ab7e15aa6f3fc41 (patch) | |
| tree | dcb088480d63e4e5fadb867017e61c4cf5af149b /include/configs/rcar-gen3-common.h | |
| parent | b72d308c137f5ce1df41e43a301e707b7e70e489 (diff) | |
| download | u-boot-5602330df0306a44d78c1ba67ab7e15aa6f3fc41.zip u-boot-5602330df0306a44d78c1ba67ab7e15aa6f3fc41.tar.gz u-boot-5602330df0306a44d78c1ba67ab7e15aa6f3fc41.tar.bz2 | |
ARM: rmobile: Add recovery SPL for R-Car Gen3
Build an SPL which can be started via SCIF download mode on R-Car Gen3
and allows loading and executing U-Boot uImage with the next stage code.
This is also useful for starting e.g. ATF BL2, which inits the hardware
and returns to the U-Boot SPL, which can then load e.g. U-Boot proper.
The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL
while the payload, e.g. ATF BL2, executes, so there is no problem here.
However, E3 and D3 have much less SRAM, hence the loader uses a trick
where it copies itself beyond the area used by BL2 and executes from
there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS,
stack and malloc area, so the later two are placed at +0x4000 offset
from start of SRAM, another area not used by ATF BL2. To make things
even more complicated, the SCIF loader cannot load to the upper 32kiB
of the SRAM directly, hence the copying approach.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'include/configs/rcar-gen3-common.h')
| -rw-r--r-- | include/configs/rcar-gen3-common.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 20f9821..203b0a7 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -13,6 +13,10 @@ #define CONFIG_REMAKE_ELF +#ifdef CONFIG_SPL +#define CONFIG_SPL_TARGET "spl/u-boot-spl.scif" +#endif + /* boot option */ #define CONFIG_CMDLINE_TAG @@ -64,4 +68,19 @@ "tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \ "booti 0x48080000 - 0x48000000" +/* SPL support */ +#if defined(CONFIG_R8A7795) || defined(CONFIG_R8A7796) || defined(CONFIG_R8A77965) +#define CONFIG_SPL_BSS_START_ADDR 0xe633f000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 +#else +#define CONFIG_SPL_BSS_START_ADDR 0xe631f000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 +#endif +#define CONFIG_SPL_STACK 0xe6304000 +#define CONFIG_SPL_MAX_SIZE 0x7000 +#ifdef CONFIG_SPL_BUILD +#define CONFIG_CONS_SCIF2 +#define CONFIG_SH_SCIF_CLK_FREQ 65000000 +#endif + #endif /* __RCAR_GEN3_COMMON_H */ |