diff options
| author | Tom Rini <trini@konsulko.com> | 2022-11-16 13:10:41 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-05 16:06:08 -0500 |
| commit | 65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8 (patch) | |
| tree | e1b9902c5257875fc5fe8243e1e759594f90beed /include/configs/presidio_asic.h | |
| parent | a322afc9f9b69dd52a9bc72937cd5adc18ea55c7 (diff) | |
| download | u-boot-65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8.zip u-boot-65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8.tar.gz u-boot-65cc0e2a65d2c9f107b2f42db6396d9ade6c5ad8.tar.bz2 | |
global: Move remaining CONFIG_SYS_* to CFG_SYS_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/configs/presidio_asic.h')
| -rw-r--r-- | include/configs/presidio_asic.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h index bee1ef6..2b25c31 100644 --- a/include/configs/presidio_asic.h +++ b/include/configs/presidio_asic.h @@ -9,8 +9,8 @@ #define __PRESIDIO_ASIC_H /* Generic Timer Definitions */ -#define CONFIG_SYS_TIMER_RATE 25000000 -#define CONFIG_SYS_TIMER_COUNTER 0xf4321008 +#define CFG_SYS_TIMER_RATE 25000000 +#define CFG_SYS_TIMER_COUNTER 0xf4321008 /* note: arch/arm/cpu/armv8/start.S which references GICD_BASE/GICC_BASE * does not yet support DT. Thus define it here. @@ -18,7 +18,7 @@ #define GICD_BASE 0xf7011000 #define GICC_BASE 0xf7012000 -#define CONFIG_SYS_TIMER_BASE 0xf4321000 +#define CFG_SYS_TIMER_BASE 0xf4321000 /* Use external clock source */ #define PRESIDIO_APB_CLK 125000000 @@ -26,11 +26,11 @@ /* Cortina Serial Configuration */ #define CORTINA_UART_CLOCK (PRESIDIO_APB_CLK) -#define CORTINA_SERIAL_PORTS {(void *)CONFIG_SYS_SERIAL0, \ - (void *)CONFIG_SYS_SERIAL1} +#define CORTINA_SERIAL_PORTS {(void *)CFG_SYS_SERIAL0, \ + (void *)CFG_SYS_SERIAL1} -#define CONFIG_SYS_SERIAL0 PER_UART0_CFG -#define CONFIG_SYS_SERIAL1 PER_UART1_CFG +#define CFG_SYS_SERIAL0 PER_UART0_CFG +#define CFG_SYS_SERIAL1 PER_UART1_CFG /* SDRAM Bank #1 */ #define DDR_BASE 0x00000000 @@ -58,7 +58,7 @@ /* nand driver parameters */ #ifdef CONFIG_TARGET_PRESIDIO_ASIC - #define CFG_SYS_NAND_BASE CONFIG_SYS_FLASH_BASE + #define CFG_SYS_NAND_BASE CFG_SYS_FLASH_BASE #define CFG_SYS_NAND_BASE_LIST { CFG_SYS_NAND_BASE } #endif |