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| author | Mario Six <mario.six@gdsys.cc> | 2019-01-21 09:18:03 +0100 |
|---|---|---|
| committer | Mario Six <mario.six@gdsys.cc> | 2019-05-21 07:52:33 +0200 |
| commit | fe7d654d04a4ba87813dcf8acb7a17373029770d (patch) | |
| tree | acff08e60a356274b602f42d44a975b7a279eca2 /include/configs/mpc8308_p1m.h | |
| parent | daac2086ce1a36ffbd603eb643f45d14faae40e7 (diff) | |
| download | u-boot-fe7d654d04a4ba87813dcf8acb7a17373029770d.zip u-boot-fe7d654d04a4ba87813dcf8acb7a17373029770d.tar.gz u-boot-fe7d654d04a4ba87813dcf8acb7a17373029770d.tar.bz2 | |
mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to Kconfig
Migrate the BR/OR settings to Kconfig. These must be known at compile
time, so cannot be configured via DT.
Configuration of this crucial variable should still be somewhat
comfortable. Hence, make its fields configurable in Kconfig, and
assemble the final value from these.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'include/configs/mpc8308_p1m.h')
| -rw-r--r-- | include/configs/mpc8308_p1m.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h index 31bf997..cb7dabd 100644 --- a/include/configs/mpc8308_p1m.h +++ b/include/configs/mpc8308_p1m.h @@ -179,9 +179,6 @@ #define CONFIG_SYS_FLASH_BASE 0xFC000000 /* FLASH base address */ #define CONFIG_SYS_FLASH_SIZE 64 /* FLASH size is 64M */ -/* FLASH */ -#define CONFIG_SYS_BR0_PRELIM (0xFC000000 | BR_PS_16 | BR_MS_GPCM | BR_V) -#define CONFIG_SYS_OR0_PRELIM (OR_AM_64MB | OR_UPM_XAM | OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS | OR_GPCM_SCY_4 | OR_GPCM_TRLX_SET | OR_GPCM_EHTR_SET) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 @@ -196,18 +193,12 @@ */ #define CONFIG_SYS_SJA1000_BASE 0xFBFF0000 -/* SJA1000 */ -#define CONFIG_SYS_BR1_PRELIM (0xFBFF0000 | BR_PS_8 | BR_MS_GPCM | BR_V) -#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_SCY_5 | OR_GPCM_EHTR_SET) /* * CPLD on Local Bus */ #define CONFIG_SYS_CPLD_BASE 0xFBFF8000 -/* CPLD */ -#define CONFIG_SYS_BR2_PRELIM (0xFBFF8000 | BR_PS_8 | BR_MS_GPCM | BR_V) -#define CONFIG_SYS_OR2_PRELIM (OR_AM_32KB | OR_GPCM_SCY_4 | OR_GPCM_EHTR_SET) /* * Serial Port |