Merge patch series "ARM: renesas: Rename R-Mobile to Renesas"WIP/02Mar2024

Marek Vasut <marek.vasut+renesas@mailbox.org> says:

Rename R-Mobile to Renesas all over the place because the chips are
made by Renesas, while only a subset of them is from the R-Mobile line.

16 files changed, 62 insertions, 62 deletions

diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index e9296ed..a093027 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -1,6 +1,6 @@
 config CLK_RENESAS
 	bool "Renesas clock drivers"
-	depends on CLK && ARCH_RMOBILE
+	depends on CLK && ARCH_RENESAS
 	help
 	  Enable support for clock present on Renesas SoCs.
 
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 27df5d8..2df3dc4 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -333,7 +333,7 @@ config PCF8575_GPIO
 
 config RCAR_GPIO
 	bool "Renesas RCar GPIO driver"
-	depends on DM_GPIO && ARCH_RMOBILE
+	depends on DM_GPIO && ARCH_RENESAS
 	help
 	  This driver supports the GPIO banks on Renesas RCar SoCs.
 
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index d2a3a13..59c635a 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -551,7 +551,7 @@ config SPL_SYS_I2C_SANDBOX
 
 config SYS_I2C_SH
 	bool "Legacy SuperH I2C interface"
-	depends on ARCH_RMOBILE && SYS_I2C_LEGACY
+	depends on ARCH_RENESAS && SYS_I2C_LEGACY
 	help
 	  Enable the legacy SuperH I2C interface.
 
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 17618c3..cef0579 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -393,7 +393,7 @@ config HSMMC2_8BIT
 
 config SH_MMCIF
 	bool "SuperH/Renesas ARM SoCs on-chip MMCIF host controller support"
-	depends on ARCH_RMOBILE || SH
+	depends on ARCH_RENESAS || SH
 	help
 	  Support for the on-chip MMCIF host controller on SuperH/Renesas ARM SoCs platform
 
@@ -408,7 +408,7 @@ config MMC_UNIPHIER
 
 config RENESAS_SDHI
 	bool "Renesas R-Car SD/MMC Host Controller support"
-	depends on ARCH_RMOBILE
+	depends on ARCH_RENESAS
 	depends on BLK && DM_MMC
 	depends on OF_CONTROL
 	select BOUNCE_BUFFER
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index a74559c..20b1e92 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -92,7 +92,7 @@ static const u8 r8a77990_calib_table[2][CALIB_TABLE_MAX] = {
 	 11, 12, 13, 15, 16, 17, 17, 18, 18, 19, 20, 22, 24, 25, 26, 26 }
 };
 
-static int rmobile_is_gen3_mmc0(struct tmio_sd_priv *priv)
+static int rcar_is_gen3_mmc0(struct tmio_sd_priv *priv)
 {
 	/* On R-Car Gen3, MMC0 is at 0xee140000 */
 	return (uintptr_t)(priv->regbase) == 0xee140000;
@@ -885,80 +885,80 @@ static void renesas_sdhi_filter_caps(struct udevice *dev)
 	struct tmio_sd_plat *plat = dev_get_plat(dev);
 
 	/* HS400 is not supported on H3 ES1.x, M3W ES1.[012], V3M, V3H ES1.x, D3 */
-	if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
-	    (rmobile_get_cpu_rev_integer() <= 1)) ||
-	    ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
-	    (rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() <= 2)) ||
-	    (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970) ||
-	    ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77980) &&
-	    (rmobile_get_cpu_rev_integer() <= 1)) ||
-	    (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
+	if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
+	    (renesas_get_cpu_rev_integer() <= 1)) ||
+	    ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
+	    (renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() <= 2)) ||
+	    (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77970) ||
+	    ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77980) &&
+	    (renesas_get_cpu_rev_integer() <= 1)) ||
+	    (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77995))
 		plat->cfg.host_caps &= ~MMC_MODE_HS400;
 
 	/* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */
-	if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
-	    (rmobile_get_cpu_rev_integer() >= 2)) ||
-	    ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
-	    (rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() == 2)) ||
-	    (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965))
+	if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
+	    (renesas_get_cpu_rev_integer() >= 2)) ||
+	    ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
+	    (renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() == 2)) ||
+	    (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77965))
 		priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7);
 
 	/* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */
-	if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
-	    (rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() > 2)) {
+	if ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
+	    (renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() > 2)) {
 		priv->adjust_hs400_enable = true;
 		priv->adjust_hs400_offset = 3;
 		priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
 		priv->adjust_hs400_calib_table =
-			r8a7796_rev13_calib_table[!rmobile_is_gen3_mmc0(priv)];
+			r8a7796_rev13_calib_table[!rcar_is_gen3_mmc0(priv)];
 	}
 
 	/* M3W+ bad taps */
-	if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
-	    (rmobile_get_cpu_rev_integer() == 3))
+	if ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
+	    (renesas_get_cpu_rev_integer() == 3))
 		priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7);
 
 	/* M3N can use HS400 with manual adjustment */
-	if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965) {
+	if (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77965) {
 		priv->adjust_hs400_enable = true;
 		priv->adjust_hs400_offset = 3;
 		priv->adjust_hs400_calib_table =
-			r8a77965_calib_table[!rmobile_is_gen3_mmc0(priv)];
+			r8a77965_calib_table[!rcar_is_gen3_mmc0(priv)];
 	}
 
 	/* E3 can use HS400 with manual adjustment */
-	if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) {
+	if (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77990) {
 		priv->adjust_hs400_enable = true;
 		priv->adjust_hs400_offset = 3;
 		priv->adjust_hs400_calib_table =
-			r8a77990_calib_table[!rmobile_is_gen3_mmc0(priv)];
+			r8a77990_calib_table[!rcar_is_gen3_mmc0(priv)];
 	}
 
 	/* H3 ES1.x, ES2.0 and M3W ES1.[0123] uses 4 tuning taps */
-	if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
-	    (rmobile_get_cpu_rev_integer() <= 2)) ||
-	    ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
-	    (rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() <= 3)))
+	if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
+	    (renesas_get_cpu_rev_integer() <= 2)) ||
+	    ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
+	    (renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() <= 3)))
 		priv->nrtaps = 4;
 	else
 		priv->nrtaps = 8;
 #endif
 	/* H3 ES1.x and M3W ES1.0 uses bit 17 for DTRAEND */
-	if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) &&
-	    (rmobile_get_cpu_rev_integer() <= 1)) ||
-	    ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) &&
-	    (rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() == 0)))
+	if (((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7795) &&
+	    (renesas_get_cpu_rev_integer() <= 1)) ||
+	    ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A7796) &&
+	    (renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() == 0)))
 		priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD;
 	else
 		priv->read_poll_flag = TMIO_SD_DMA_INFO1_END_RD2;
 
 	/* V3M handles SD0H differently than other Gen3 SoCs */
-	if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77970)
+	if (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77970)
 		priv->needs_clkh_fallback = true;
 	else
 		priv->needs_clkh_fallback = false;
diff --git a/drivers/mmc/sh_mmcif.h b/drivers/mmc/sh_mmcif.h
index 66341e5..b131b8c 100644
--- a/drivers/mmc/sh_mmcif.h
+++ b/drivers/mmc/sh_mmcif.h
@@ -195,7 +195,7 @@ struct sh_mmcif_regs {
 #define SOFT_RST_OFF		(0 << 31)
 
 #define CLKDEV_EMMC_DATA	52000000	/* 52MHz */
-#ifdef CONFIG_ARCH_RMOBILE
+#ifdef CONFIG_ARCH_RENESAS
 #define MMC_CLK_DIV_MIN(clk)	(clk / (1 << 9))
 #define MMC_CLK_DIV_MAX(clk)	(clk / (1 << 1))
 #else
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index 0bcd6cf..4764bca 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -392,8 +392,8 @@ static int ravb_dmac_init(struct udevice *dev)
 	writel(0x00222210, eth->iobase + RAVB_REG_TGC);
 
 	/* Delay CLK: 2ns (not applicable on R-Car E3/D3) */
-	if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) ||
-	    (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77995))
+	if ((renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77990) ||
+	    (renesas_get_cpu_type() == RENESAS_CPU_TYPE_R8A77995))
 		return 0;
 
 	if (!dev_read_u32(dev, "rx-internal-delay-ps", &delay)) {
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 0e929d8..6d7b7cd 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -14,7 +14,7 @@ obj-$(CONFIG_PINCTRL_INTEL) += intel/
 obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
 obj-$(CONFIG_ARCH_NPCM)         += nuvoton/
 obj-$(CONFIG_PINCTRL_QCOM) += qcom/
-obj-$(CONFIG_ARCH_RMOBILE) += renesas/
+obj-$(CONFIG_ARCH_RENESAS) += renesas/
 obj-$(CONFIG_ARCH_RZN1) += renesas/
 obj-$(CONFIG_PINCTRL_SANDBOX)	+= pinctrl-sandbox.o
 obj-$(CONFIG_PINCTRL_SUNXI)	+= sunxi/
diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 171cd37..57e8860 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -1,8 +1,8 @@
-if ARCH_RMOBILE
+if ARCH_RENESAS
 
 config PINCTRL_PFC
 	bool "Renesas pin control drivers"
-	depends on DM && ARCH_RMOBILE
+	depends on DM && ARCH_RENESAS
 	default n if CPU_RZA1
 	help
 	  Support pin multiplexing control on Renesas SoCs.
diff --git a/drivers/pinctrl/renesas/pfc-r8a7790.c b/drivers/pinctrl/renesas/pfc-r8a7790.c
index e1811c4..acd6b01 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7790.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7790.c
@@ -6117,8 +6117,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
 static int r8a7790_pinmux_soc_init(struct sh_pfc *pfc)
 {
 	/* Initialize TDSEL on old revisions */
-	if ((rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() == 0))
+	if ((renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() == 0))
 		sh_pfc_write(pfc, 0xe6060088, 0x00155554);
 
 	return 0;
diff --git a/drivers/pinctrl/renesas/pfc-r8a7794.c b/drivers/pinctrl/renesas/pfc-r8a7794.c
index 29eab26..2f55021 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7794.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7794.c
@@ -5818,8 +5818,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
 static int r8a7794_pinmux_soc_init(struct sh_pfc *pfc)
 {
 	/* Initialize TDSEL on old revisions */
-	if ((rmobile_get_cpu_rev_integer() == 1) &&
-	    (rmobile_get_cpu_rev_fraction() == 0))
+	if ((renesas_get_cpu_rev_integer() == 1) &&
+	    (renesas_get_cpu_rev_fraction() == 0))
 		sh_pfc_write(pfc, 0xe6060068, 0x55555500);
 
 	return 0;
diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile
index 985990a..c9c46cc 100644
--- a/drivers/ram/Makefile
+++ b/drivers/ram/Makefile
@@ -28,5 +28,5 @@ obj-$(CONFIG_DRAM_SUN20I_D1) += sunxi/
 
 obj-$(CONFIG_ARCH_OCTEON) += octeon/
 
-obj-$(CONFIG_ARCH_RMOBILE) += renesas/
+obj-$(CONFIG_ARCH_RENESAS) += renesas/
 obj-$(CONFIG_CADENCE_DDR_CTRL) += cadence/
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 26460c4..88d6786 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -433,7 +433,7 @@ config DEBUG_UART_SEMIHOSTING
 
 config DEBUG_UART_SCIF
 	bool "Renesas SCIF UART"
-	depends on SH || ARCH_RMOBILE
+	depends on SH || ARCH_RENESAS
 	help
 	  Select this to enable a debug UART using the serial_sh driver. You
 	  will need to provide parameters to make this work. The driver will
@@ -893,7 +893,7 @@ config SANDBOX_SERIAL
 
 config SCIF_CONSOLE
 	bool "Renesas SCIF UART support"
-	depends on SH || ARCH_RMOBILE
+	depends on SH || ARCH_RENESAS
 	help
 	  Select this to enable Renesas SCIF UART. To operate serial ports
 	  on systems with RCar or SH SoCs, say Y to this option. If unsure,
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index 3eb1406..8aff223 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -203,7 +203,7 @@ static void rpc_spi_flush_read_cache(struct udevice *dev)
 static u32 rpc_spi_get_strobe_delay(void)
 {
 #ifndef CONFIG_RZA1
-	u32 cpu_type = rmobile_get_cpu_type();
+	u32 cpu_type = renesas_get_cpu_type();
 
 	/*
 	 * NOTE: RPC_PHYCNT_STRTIM value:
@@ -212,11 +212,11 @@ static u32 rpc_spi_get_strobe_delay(void)
 	 *       7: On other R-Car Gen3
 	 *      15: On R-Car Gen4
 	 */
-	if (cpu_type == RMOBILE_CPU_TYPE_R8A7796 && rmobile_get_cpu_rev_integer() == 1)
+	if (cpu_type == RENESAS_CPU_TYPE_R8A7796 && renesas_get_cpu_rev_integer() == 1)
 		return RPC_PHYCNT_STRTIM(6);
-	else if (cpu_type == RMOBILE_CPU_TYPE_R8A779F0 ||
-		 cpu_type == RMOBILE_CPU_TYPE_R8A779G0 ||
-		 cpu_type == RMOBILE_CPU_TYPE_R8A779H0)
+	else if (cpu_type == RENESAS_CPU_TYPE_R8A779F0 ||
+		 cpu_type == RENESAS_CPU_TYPE_R8A779G0 ||
+		 cpu_type == RENESAS_CPU_TYPE_R8A779H0)
 		return RPC_PHYCNT_STRTIM2(15);
 	else
 #endif
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 7dd1fe7..7259499 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -13,7 +13,7 @@
 #include <malloc.h>
 #include <spi.h>
 #include <wait_bit.h>
-#include <asm/arch/rmobile.h>
+#include <asm/arch/renesas.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
 
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index f96027d..6e10b62 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -97,7 +97,7 @@ config USB_XHCI_PCI
 config USB_XHCI_RCAR
 	bool "Renesas RCar USB 3.0 support"
 	default y
-	depends on ARCH_RMOBILE
+	depends on ARCH_RENESAS
 	help
 	  Choose this option to add support for USB 3.0 driver on Renesas
 	  RCar Gen3 SoCs.